Re: [U-Boot] [PATCH v5 20/25] da850: Add README.da850
On Tue, Aug 28, 2012 at 1:18 AM, Tom Rini tr...@ti.com wrote: This file documents when to build for da850evm and when to build for da850_am18xxevm. It also documents how to write the u-boot.ais file to persistent storage (such as SPI), in some cases as well as how to write a recovery image. Signed-off-by: Tom Rini tr...@ti.com Acked-by: Christian Riesch christian.rie...@omicron.at Regards, Christian --- Changes in v2: - Add README.da850_am18xxevm Changes in v3: - Fix thinko, Nand - SPI (spotted by Prabhakar Lad) - Rename to README.da850, add more direct recovery method (Christian Riesch) Changes in v4: - Further re-word README.da850 based on feedback from Christian Riesch board/davinci/da8xxevm/README.da850 | 68 +++ 1 file changed, 68 insertions(+) create mode 100644 board/davinci/da8xxevm/README.da850 diff --git a/board/davinci/da8xxevm/README.da850 b/board/davinci/da8xxevm/README.da850 new file mode 100644 index 000..621a95d --- /dev/null +++ b/board/davinci/da8xxevm/README.da850 @@ -0,0 +1,68 @@ +Summary +=== +The README is for the boot procedure used for various DA850 (or compatible +parts such as the AM1808) based boards. + +In the context of U-Boot, the board is booted in three stages. The initial +bootloader which executes upon reset is the ROM Boot Loader (RBL) and sits +in the internal ROM. The RBL initializes the internal memory and then +depending on the exact board and pin configurations will initialize another +controller (such as SPI or NAND) to continue the boot process by loading +the secondary program loader (SPL). The SPL will initialize the system +further (some clocks, SDRAM) and then load the full u-boot from a +predefined location in persistent storage to DDR and jumps to the u-boot +entry point. + +AIS is an image format defined by TI for the images that are to be loaded +to memory by the RBL. The image is divided into a series of sections and +the image's entry point is specified. Each section comes with meta data +like the target address the section is to be copied to and the size of the +section, which is used by the RBL to load the image. At the end of the +image the RBL jumps to the image entry point. The AIS format allows for +other things such as programming the clocks and SDRAM if the header is +programmed for it. We do not take advantage of this and instead use SPL as +it allows for additional flexibility (run-time detect of board revision, +loading the next image from a different media, etc). + + +Compilation +=== +The exact build target you need will depend on the board you have. For +Logic PD boards, or other boards which store the ethernet MAC address at +the end of SPI flash, run 'make da850evm'. For boards which store the +ethernet MAC address in the i2c EEPROM located at 0x50, run +'make da850_am18xxevm'. Once this build completes you will have a +u-boot.ais file that needs to be written to the correct persistent +storage. + + +Flashing the images to SPI +== +The AIS image can be written to SPI flash using the following commands. +Assuming that the network is configured and enabled and the u-boot.ais file +is tftp'able. + +U-Boot sf probe 0 +U-Boot sf erase 0 +32 +U-Boot tftp u-boot.ais +U-Boot sf write c070 0 $filesize + + +Recovery + + +In the case of a bricked board, you need to use the TI tools found +here[1] to write the u-boot.ais file. An example of recovering to the SPI +flash of an AM1808 would be: + +$ mono sfh_OMAP-L138.exe -targetType AM1808 -p /dev/ttyUSB0 \ + -flash_noubl /path/to/u-boot.ais + +For other target types and flash locations: + +$ mono sfh_OMAP-L138.exe -h + +Links += +[1] + http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L137 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 20/25] da850: Add README.da850
Hi Tom, one more comment, please see below. On Tue, Aug 28, 2012 at 1:18 AM, Tom Rini tr...@ti.com wrote: This file documents when to build for da850evm and when to build for da850_am18xxevm. It also documents how to write the u-boot.ais file to persistent storage (such as SPI), in some cases as well as how to write a recovery image. Signed-off-by: Tom Rini tr...@ti.com --- Changes in v2: - Add README.da850_am18xxevm Changes in v3: - Fix thinko, Nand - SPI (spotted by Prabhakar Lad) - Rename to README.da850, add more direct recovery method (Christian Riesch) Changes in v4: - Further re-word README.da850 based on feedback from Christian Riesch board/davinci/da8xxevm/README.da850 | 68 +++ 1 file changed, 68 insertions(+) create mode 100644 board/davinci/da8xxevm/README.da850 diff --git a/board/davinci/da8xxevm/README.da850 b/board/davinci/da8xxevm/README.da850 new file mode 100644 index 000..621a95d --- /dev/null +++ b/board/davinci/da8xxevm/README.da850 @@ -0,0 +1,68 @@ +Summary +=== +The README is for the boot procedure used for various DA850 (or compatible +parts such as the AM1808) based boards. + +In the context of U-Boot, the board is booted in three stages. The initial +bootloader which executes upon reset is the ROM Boot Loader (RBL) and sits +in the internal ROM. The RBL initializes the internal memory and then +depending on the exact board and pin configurations will initialize another +controller (such as SPI or NAND) to continue the boot process by loading +the secondary program loader (SPL). The SPL will initialize the system +further (some clocks, SDRAM) and then load the full u-boot from a +predefined location in persistent storage to DDR and jumps to the u-boot +entry point. + +AIS is an image format defined by TI for the images that are to be loaded +to memory by the RBL. The image is divided into a series of sections and +the image's entry point is specified. Each section comes with meta data +like the target address the section is to be copied to and the size of the +section, which is used by the RBL to load the image. At the end of the +image the RBL jumps to the image entry point. The AIS format allows for +other things such as programming the clocks and SDRAM if the header is +programmed for it. We do not take advantage of this and instead use SPL as +it allows for additional flexibility (run-time detect of board revision, +loading the next image from a different media, etc). + + +Compilation +=== +The exact build target you need will depend on the board you have. For +Logic PD boards, or other boards which store the ethernet MAC address at +the end of SPI flash, run 'make da850evm'. For boards which store the +ethernet MAC address in the i2c EEPROM located at 0x50, run +'make da850_am18xxevm'. Once this build completes you will have a +u-boot.ais file that needs to be written to the correct persistent +storage. + + +Flashing the images to SPI +== +The AIS image can be written to SPI flash using the following commands. +Assuming that the network is configured and enabled and the u-boot.ais file +is tftp'able. + +U-Boot sf probe 0 +U-Boot sf erase 0 +32 +U-Boot tftp u-boot.ais +U-Boot sf write c070 0 $filesize + + +Recovery + + +In the case of a bricked board, you need to use the TI tools found +here[1] to write the u-boot.ais file. An example of recovering to the SPI +flash of an AM1808 would be: + +$ mono sfh_OMAP-L138.exe -targetType AM1808 -p /dev/ttyUSB0 \ + -flash_noubl /path/to/u-boot.ais + +For other target types and flash locations: + +$ mono sfh_OMAP-L138.exe -h + +Links += +[1] + http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L137 I'm not sure if the flash loader for the L137 would work for the L138 and the AM1808 as well, please use this URL instead: http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138 Sorry, I didn't notice that in earlier versions... Christian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] U-Boot Api Problem
Since nobody seems to care about my problem is repost my question... Hello, we recently switched to the OSELAS Toolchain for ARM1136 processors and faced a problem considering the u-boot API. If compiling the API demo with -Os (as default in u-boot) the demo does not run anymore. If activating -fno-reorder-functions in the used cflags the demo runs as before with our old toolchain. Can somebody tell me, why the demo doesn't run with relocate-functions activated? Does u-boot expect a special function on a fixed adress in the demo? Any information appreciated. Thanks. Sebastian --- +++ Willkommen bei CADCON auf der ILA Berlin Air Show +++ 11.-16.09.2012, ExpoCenter Airport, Halle 2, Stand 2204 --- CADCON Ingenieurgesellschaft mbH Co. KG Geschaeftsfuehrer: Robert Bauer, Andreas Gundel Sitz der Gesellschaft: 86368 Gersthofen Registergericht: Amtsgericht Augsburg HRA 14521 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 2/8] OMAP3: twister : get MAC address from EEPROM
Signed-off-by: Stefano Babic sba...@denx.de
---
board/technexion/twister/twister.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/board/technexion/twister/twister.c
b/board/technexion/twister/twister.c
index c2b10ac..7429e93 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -100,8 +100,18 @@ int board_init(void)
int misc_init_r(void)
{
+ char *eth_addr;
+
dieid_num_r();
+ eth_addr = getenv(ethaddr);
+ if (eth_addr)
+ return 0;
+
+#ifndef CONFIG_SPL_BUILD
+ TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+
return 0;
}
--
1.7.9.5
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[U-Boot] [PATCH v1 1/8] OMAP3: tam3517: add function to read MAC from EEPROM
The manufacturer delivers the TAM3517 SOM with 4 MAC address.
They are stored on the EEPROM of the SOM. The patch adds a
function to get their values and set the ethaddr variables.
Signed-off-by: Stefano Babic sba...@denx.de
---
include/configs/tam3517-common.h | 66 ++
1 file changed, 66 insertions(+)
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 24f6f7e..51503da 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -125,6 +125,7 @@
#define CONFIG_CMD_NAND/* NAND support */
#define CONFIG_CMD_PING
#define CONFIG_CMD_USB
+#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_FLASH/* only NAND on the SOM */
#undef CONFIG_CMD_IMLS
@@ -135,6 +136,9 @@
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_SYS_I2C_BUS 0
#define CONFIG_SYS_I2C_BUS_SELECT 1
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* base address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW0x07
#define CONFIG_DRIVER_OMAP34XX_I2C
@@ -354,4 +358,66 @@
fi; \
else echo U-Boot not downloaded..exiting;fi\0 \
+
+/*
+ * this is common code for all TAM3517 boards.
+ * MAC address is stored from manufacturer in
+ * I2C EEPROM
+ */
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+
+/*
+ * The I2C EEPROM on the TAM3517 contains
+ * mac address and production data
+ */
+struct tam3517_module_info {
+ char customer[48];
+ char product[48];
+
+ /*
+* bit 0~47 : sequence number
+* bit 48~55 : week of year, from 0.
+* bit 56~63 : year
+*/
+ unsigned long long sequence_number;
+
+ /*
+* bit 0~7 : revision fixed
+* bit 8~15 : revision major
+* bit 16~31 : TNxxx
+*/
+ unsigned int revision;
+ unsigned char eth_addr[4][8];
+ unsigned char _rev[100];
+};
+
+#define TAM3517_READ_MAC_FROM_EEPROM \
+do { \
+ struct tam3517_module_info info;\
+ char buf[80], ethname[20]; \
+ int i; \
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
+ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
+ (void *)info, sizeof(info))) \
+ break; \
+ memset(buf, 0, sizeof(buf));\
+ for (i = 0 ; i ARRAY_SIZE(info.eth_addr); i++) { \
+ sprintf(buf, %02X:%02X:%02X:%02X:%02X:%02X, \
+ info.eth_addr[i][5],\
+ info.eth_addr[i][4],\
+ info.eth_addr[i][3],\
+ info.eth_addr[i][2],\
+ info.eth_addr[i][1],\
+ info.eth_addr[i][0]); \
+ \
+ if (i) \
+ sprintf(ethname, eth%daddr, i); \
+ else\
+ sprintf(ethname, ethaddr);\
+ printf(Setting %s from EEPROM with %s\n, ethname, buf);\
+ setenv(ethname, buf); \
+ } \
+} while (0)
+#endif
+
#endif /* __TAM3517_H */
--
1.7.9.5
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[U-Boot] [PATCH v1 3/8] OMAP3: mt_ventoux: Correct board pinmux
Fix some issues (some pins were not set as GPIOs)
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.h | 74 +++---
1 file changed, 33 insertions(+), 41 deletions(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index 9b2e43e..d1fee25 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -142,7 +142,8 @@ const omap3_sysinfo sysinfo = {
/*GPIO_62: FPGA_RESET */ \
MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) \
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/ \
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) \
+ /* GPIO_64*/ \
MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) \
/* DSS */\
MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \
@@ -174,26 +175,6 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \
MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \
/* CAMERA */\
- MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_FLD),(IDIS | PTD | DIS | M4)) /*GPIO_98*/\
- MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D10),(IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D11),(IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_WEN),(IEN | PTD | DIS | M4)) /*GPIO_167*/\
- MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \
@@ -209,6 +190,7 @@ const omap3_sysinfo sysinfo = {
/* GPIO_126: CardDetect */\
MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \
+ /*GPIO_128 */ \
MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \
\
MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\
@@ -250,7 +232,7 @@ const omap3_sysinfo sysinfo = {
\
MUX_VAL(CP(MCBSP4_CLKX),(IEN | PTD | DIS | M4)) \
/*GPIO_152: Ignition Sense */ \
- MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) \
+ MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M4)) \
/*GPIO_153: Power Button Sense */ \
MUX_VAL(CP(MCBSP4_DX), (IEN | PTU | DIS | M4)) \
/* GPIO_154: FPGA_DONE */ \
@@ -264,10 +246,14 @@ const omap3_sysinfo sysinfo = {
/* GPIO_150: USB status 1 */\
\
MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \
+ MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M2)) \
+ /* gpt9_pwm */\
+ MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M2)) \
+ /* gpt10_pwm */\
+ MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M2)) \
+ /* gpt8_pwm */\
+ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M2)) \
+ /* gpt11_pwm */\
\
MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) \
/*GPIO_163 : TS_PENIRQ*/ \
@@ -299,22 +285,24 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \
MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) \
/* CCDC */\
- MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \
[U-Boot] [PATCH v1 4/8] OMAP3: mt_ventoux: activate GPIO4
Signed-off-by: Stefano Babic sba...@denx.de --- include/configs/mt_ventoux.h |1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h index 5db6d57..131670a 100644 --- a/include/configs/mt_ventoux.h +++ b/include/configs/mt_ventoux.h @@ -31,6 +31,7 @@ #define CONFIG_BOOTFILEuImage #define CONFIG_AUTO_COMPLETE +#define CONFIG_OMAP3_GPIO_4 #define CONFIG_HOSTNAME mt_ventoux /* -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 5/8] OMAP3: mt_ventoux: read MAC address from EEPROM
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 16
1 file changed, 16 insertions(+)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 9fbaedd..b7744a9 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -196,6 +196,22 @@ int board_init(void)
return 0;
}
+int misc_init_r(void)
+{
+ char *eth_addr;
+
+ dieid_num_r();
+
+ eth_addr = getenv(ethaddr);
+ if (eth_addr)
+ return 0;
+
+#ifndef CONFIG_SPL_BUILD
+ TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+ return 0;
+}
+
/*
* Routine: set_muxconf_regs
* Description: Setting up the configuration Mux registers specific to the
--
1.7.9.5
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[U-Boot] [PATCH v1 7/8] video: drop duplicate set of DISPC_CONFIG register
Signed-off-by: Stefano Babic sba...@denx.de --- drivers/video/omap3_dss.c |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c index 6686718..5fcc0fb 100644 --- a/drivers/video/omap3_dss.c +++ b/drivers/video/omap3_dss.c @@ -112,7 +112,6 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg) writel(panel_cfg-pol_freq, dispc-pol_freq); writel(panel_cfg-divisor, dispc-divisor); writel(panel_cfg-lcd_size, dispc-size_lcd); - writel(panel_cfg-load_mode FRAME_MODE_SHIFT, dispc-config); writel(panel_cfg-panel_type TFTSTN_SHIFT | panel_cfg-data_lines DATALINES_SHIFT, dispc-control); writel(panel_cfg-panel_color, dispc-default_color0); -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 6/8] OMAP3: mt_ventoux: disable the buzzer at start-up
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 14 ++
board/teejet/mt_ventoux/mt_ventoux.h |4
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index b7744a9..814e72f 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -39,6 +39,9 @@
DECLARE_GLOBAL_DATA_PTR;
+#define BUZZER 140
+#define SPEAKER141
+
#ifndef CONFIG_FPGA
#error The Teejet mt_ventoux must have CONFIG_FPGA enabled
#endif
@@ -193,6 +196,17 @@ int board_init(void)
mt_ventoux_init_fpga();
+ /* GPIO_140: speaker #mute */
+ MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4))
+ /* GPIO_141: Buzz Hi */
+ MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4))
+
+ /* Turning off the buzzer */
+ gpio_request(BUZZER, BUZZER_MUTE);
+ gpio_request(SPEAKER, SPEAKER);
+ gpio_direction_output(BUZZER, 0);
+ gpio_direction_output(SPEAKER, 0);
+
return 0;
}
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index d1fee25..eadb8a5 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -223,10 +223,6 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M4)) \
/* GPIO_119: FPGA_INIT */ \
\
- MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) \
- /* GPIO_140: speaker #mute */\
- MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4)) \
- /* GPIO_141: Buzz Hi */\
MUX_VAL(CP(MCBSP3_CLKX),(IEN | PTU | EN | M4)) \
MUX_VAL(CP(MCBSP3_FSX), (IEN | PTU | EN | M4)) \
\
--
1.7.9.5
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[U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 91 ++
board/teejet/mt_ventoux/mt_ventoux.h |2 +-
include/configs/mt_ventoux.h | 16 ++
3 files changed, 108 insertions(+), 1 deletion(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 814e72f..a2bda4b 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -21,13 +21,17 @@
#include common.h
#include netdev.h
+#include malloc.h
#include fpga.h
+#include video_fb.h
#include asm/io.h
#include asm/arch/mem.h
#include asm/arch/mux.h
#include asm/arch/sys_proto.h
#include asm/omap_gpio.h
#include asm/arch/mmc_host_def.h
+#include asm/arch/dss.h
+#include asm/arch/clocks.h
#include i2c.h
#include spartan3.h
#include asm/gpio.h
@@ -53,6 +57,50 @@ DECLARE_GLOBAL_DATA_PTR;
#define FPGA_INIT 119
#define FPGA_DONE 154
+#define LCD_PWR138
+#define LCD_PON_PIN139
+
+#if defined(CONFIG_VIDEO) !defined(CONFIG_SPL_BUILD)
+static struct {
+ u32 xres;
+ u32 yres;
+} panel_resolution[] = {
+ { 480, 272 },
+ { 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+ {
+ .timing_h = ((4 /* hpb */ - 1) 20) |
+ ((8 /*hfp */- 1) 8) |
+ (41 /* hsw */ - 1), /* Horizontal timing */
+ .timing_v = (2 /*vbp */ 24) |
+ (4 /* vfp */ 8) |
+ (10 - 1), /* Vertical timing */
+ .pol_freq = 0x, /* Pol Freq */
+ .divisor= 0x0001000d, /* 33Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ },
+ {
+ .timing_h = ((20 /* hpb */ - 1) 20) |
+ ((192 /*hfp */- 1) 8) |
+ (4 /* hsw */ - 1), /* Horizontal timing */
+ .timing_v = (2 /*vbp */ 24) |
+ (20 /* vfp */ 8) |
+ (10 /* vsw */ - 1), /* Vertical timing */
+ .pol_freq = 0x4000, /* Pol Freq */
+ .divisor= 0x0001000E, /* 36Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ }
+};
+#endif
+
/* Timing definitions for FPGA */
static const u32 gpmc_fpga[] = {
FPGA_GPMC_CONFIG1,
@@ -254,3 +302,46 @@ int board_mmc_init(bd_t *bis)
return omap_mmc_init(0, 0, 0);
}
#endif
+
+#if defined(CONFIG_VIDEO) !defined(CONFIG_SPL_BUILD)
+int board_video_init(void)
+{
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ struct panel_config *panel = lcd_cfg[0];
+ char *s;
+ u32 index = 0;
+
+ void *fb;
+
+ fb = (void *)0x8800;
+
+ s = getenv(panel);
+ if (s) {
+ index = simple_strtoul(s, NULL, 10);
+ if (index ARRAY_SIZE(lcd_cfg))
+ panel = lcd_cfg[index];
+ else
+ return 0;
+ }
+
+ panel-frame_buffer = fb;
+ printf(Panel: %dx%d\n, panel_resolution[index].xres,
+ panel_resolution[index].yres);
+ panel-lcd_size = (panel_resolution[index].yres - 1) 16 |
+ (panel_resolution[index].xres - 1);
+
+ gpio_request(LCD_PWR, LCD Power);
+ gpio_request(LCD_PON_PIN, LCD Pon);
+ gpio_direction_output(LCD_PWR, 0);
+ gpio_direction_output(LCD_PON_PIN, 1);
+
+
+ setbits_le32(prcm_base-fclken_dss, FCK_DSS_ON);
+ setbits_le32(prcm_base-iclken_dss, ICK_DSS_ON);
+
+ omap3_dss_panel_config(panel);
+ omap3_dss_enable();
+
+ return 0;
+}
+#endif
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index eadb8a5..1cd7ec2 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -203,7 +203,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \
MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \
/* GPIO_138: LCD_ENVD */\
- MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \
+ MUX_VAL(CP(MMC2_DAT7), (IDIS | PTD | EN | M4)) \
/* GPIO_139: LCD_PON */\
/* McBSP */\
MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \
diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h
index 131670a..8d35943 100644
--- a/include/configs/mt_ventoux.h
+++ b/include/configs/mt_ventoux.h
@@ -2,6 +2,9 @@
* Copyright (C) 2011
* Stefano Babic, DENX Software Engineering, sba...@denx.de.
*
+ *
+ * Configuration settings for the Teejet mt_ventoux board.
+ *
*
Re: [U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
Hello Stefano,
On 28.08.2012 09:46, Stefano Babic wrote:
Signed-off-by: Stefano Babicsba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 91 ++
board/teejet/mt_ventoux/mt_ventoux.h |2 +-
include/configs/mt_ventoux.h | 16 ++
3 files changed, 108 insertions(+), 1 deletion(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 814e72f..a2bda4b 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -21,13 +21,17 @@
#includecommon.h
#includenetdev.h
+#includemalloc.h
#includefpga.h
+#includevideo_fb.h
#includeasm/io.h
#includeasm/arch/mem.h
#includeasm/arch/mux.h
#includeasm/arch/sys_proto.h
#includeasm/omap_gpio.h
#includeasm/arch/mmc_host_def.h
+#includeasm/arch/dss.h
+#includeasm/arch/clocks.h
#includei2c.h
#includespartan3.h
#includeasm/gpio.h
@@ -53,6 +57,50 @@ DECLARE_GLOBAL_DATA_PTR;
#define FPGA_INIT 119
#define FPGA_DONE 154
+#define LCD_PWR138
+#define LCD_PON_PIN139
+
+#if defined(CONFIG_VIDEO) !defined(CONFIG_SPL_BUILD)
+static struct {
+ u32 xres;
+ u32 yres;
+} panel_resolution[] = {
+ { 480, 272 },
+ { 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+ {
+ .timing_h = ((4 /* hpb */ - 1) 20) |
+ ((8 /*hfp */- 1) 8) |
+ (41 /* hsw */ - 1), /* Horizontal timing */
Could we use here a define, something like this:
#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) 20) | ((fp - 1) 8) | (sw -
1))
.panel_config = {
.timing_h = PANEL_TIMING_H(4, 8, 41),
+ .timing_v = (2 /*vbp */ 24) |
^^
Is this correct? In the manual I
see for the timing H and V settings
the same bitpositions!
+ (4 /* vfp */ 8) |
+ (10 - 1), /* Vertical timing */
#define PANEL_TIMING_V(bp, fp, sw) (((bp) 20) | ((fp) 8) | (sw - 1))
and here too ?
+ .pol_freq = 0x, /* Pol Freq */
+ .divisor= 0x0001000d, /* 33Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ },
+ {
+ .timing_h = ((20 /* hpb */ - 1) 20) |
+ ((192 /*hfp */- 1) 8) |
+ (4 /* hsw */ - 1), /* Horizontal timing */
and here ...
+ .timing_v = (2 /*vbp */ 24) |
+ (20 /* vfp */ 8) |
+ (10 /* vsw */ - 1), /* Vertical timing */
and here.
+ .pol_freq = 0x4000, /* Pol Freq */
+ .divisor= 0x0001000E, /* 36Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ }
+};
+#endif
[...]
bye,
Heiko
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Re: [U-Boot] [PATCH v2 06/12] SPL: Port SPL framework to powerpc
On 08/27/2012 06:27 PM, Tom Rini wrote: On Mon, Aug 27, 2012 at 12:51:01PM +0200, Stefan Roese wrote: This patch enables the SPL framework to be used on powerpc platforms and not only ARM. Signed-off-by: Stefan Roese s...@denx.de [snip] diff --git a/common/spl/spl.c b/common/spl/spl.c index 61936ee..3eb269e 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c [snip] @@ -36,6 +35,9 @@ DECLARE_GLOBAL_DATA_PTR; +#ifndef CONFIG_SYS_UBOOT_START +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#endif #ifndef CONFIG_SYS_MONITOR_LEN #define CONFIG_SYS_MONITOR_LEN (200 * 1024) #endif [snip] @@ -104,7 +116,7 @@ void spl_parse_image_header(const struct image_header *header) header-ih_magic); /* Let's assume U-Boot will not be more than 200 KB */ spl_image.size = CONFIG_SYS_MONITOR_LEN; -spl_image.entry_point = CONFIG_SYS_TEXT_BASE; +spl_image.entry_point = CONFIG_SYS_UBOOT_START; spl_image.load_addr = CONFIG_SYS_TEXT_BASE; spl_image.os = IH_OS_U_BOOT; spl_image.name = U-Boot; Can you post this as it's own patch? I'll pick that up for v5. Okay. Will do. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
On 28/08/2012 10:11, Heiko Schocher wrote:
Hello Stefano,
Hi Heiko,
+static struct panel_config lcd_cfg[] = {
+{
+.timing_h = ((4 /* hpb */ - 1) 20) |
+((8 /*hfp */- 1) 8) |
+(41 /* hsw */ - 1), /* Horizontal timing */
Could we use here a define, something like this:
#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) 20) | ((fp - 1) 8) |
(sw - 1))
Agree - and put it in a common header (arch/dss.h), making it accessible
to all boards. And we need only one macro PANEL_TIMING, the register has
the same layout.
I'll do in V2.
.panel_config = {
.timing_h = PANEL_TIMING_H(4, 8, 41),
+.timing_v = (2 /*vbp */ 24) |
^^
Is this correct? In the manual I
see for the timing H and V
settings
the same bitpositions!
This is not correct, thanks. It has no influence on my hardware because
it simply increments vbp, but I will fix it.
Stefano
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=
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
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Re: [U-Boot] [PATCH v2 04/12] SPL: Add NOR flash booting support
On 08/27/2012 07:59 PM, Tom Rini wrote: On 08/27/2012 10:29 AM, Daniel Schwierzeck wrote: Hi Stefan, 2012/8/27 Stefan Roese s...@denx.de: SPL NOR flash booting support is quite simple. Only copying of the images is needed. On MPC5xxx we need to make sure to only use the standard memcpy() implementation and not the MPC5xxx specific one. As the MPC5xxx version has some complexity which is not needed for this SPL booting. Signed-off-by: Stefan Roese s...@denx.de [snip] +/* + * Don't use the special MPC5xxx memcpy implementation, only use + * the standard one. + */ +#if defined(CONFIG_MPC512X) || defined(CONFIG_MPC5200) +extern void *__memcpy(void *, const void *, size_t); +#define memcpy __memcpy +#endif can't we move this to arch-specifc spl code? I think arch/CPU/SoC specific definitions should be avoided in new generic frameworks. This is a good point. And I think we can further tweak this by modifying arch/powerpc/lib/Makefile to just not build memcpy_5200.c for CONFIG_SPL_BUILD. So lets go with that, and I'll just fixup my local copy. Good idea. I'll change the powerpc Makefile accordingly. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] i2c:soft:multi: Support for multiple soft I2C buses at TRATS
Support for multiple I2C buses handling on Samsung's TRATS development board. Those patches add multiple I2C support at soft_i2c.c code and enables it at Trats development board. Lukasz Majewski (2): i2c:soft:multi: Support for multiple soft I2C buses i2c:soft:multi: Enable soft I2C multibus at Trats development board drivers/i2c/soft_i2c.c | 41 + include/configs/trats.h | 19 +-- include/i2c.h | 17 + 3 files changed, 71 insertions(+), 6 deletions(-) -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] i2c:soft:multi: Support for multiple soft I2C buses
Support for multiple soft I2C buses at soft_i2c.c
This approach defines get_multi_{sda|scl}_pin functions to switch
between multiple soft I2C buses.
Up to CONFIG_SYS_MAX_I2C_BUS devices can be utilized.
Common definition of I2C_X I2C buses is provided.
TEST HW:
Samsung's Exynos4210 evt.0.1 - Trats development board
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/i2c/soft_i2c.c | 41 +
include/i2c.h | 17 +
2 files changed, 58 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index 36c6114..7901f04 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -127,6 +127,15 @@ DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_I2C_MULTI_BUS)
static unsigned int i2c_bus_num __attribute__ ((section (.data))) = 0;
+const char *soft_i2c_name[CONFIG_SYS_MAX_I2C_BUS] = {
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ soft_i2c_4,
+ soft_i2c_5,
+ NULL,
+};
#endif /* CONFIG_I2C_MULTI_BUS */
/*---
@@ -482,3 +491,35 @@ int i2c_write(uchar chip, uint addr, int alen, uchar
*buffer, int len)
send_stop();
return(failures);
}
+
+#if defined(CONFIG_I2C_MULTI_BUS)
+/* Handle multiple I2C buses instances */
+int get_multi_scl_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SCL;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SCL;
+ };
+
+ return 0;
+}
+
+int get_multi_sda_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SDA;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SDA;
+ };
+
+ return 0;
+}
+
+int multi_i2c_init(void)
+{
+ return 0;
+}
+#endif /* CONFIG_I2C_MULTI_BUS */
diff --git a/include/i2c.h b/include/i2c.h
index 1f35acf..d563d62 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -250,4 +250,21 @@ static inline void I2C_SET_BUS(unsigned int bus)
i2c_set_bus_num(bus);
}
+/* Multi I2C busses handling */
+#if (defined(CONFIG_SOFT_I2C) defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+ I2C_2,
+ I2C_3,
+ I2C_4,
+ I2C_5,
+ I2C_6
+};
+
+extern const char *soft_i2c_name[CONFIG_SYS_MAX_I2C_BUS];
+extern int get_multi_scl_pin(void);
+extern int get_multi_sda_pin(void);
+extern int multi_i2c_init(void);
+#endif
#endif /* _I2C_H_ */
--
1.7.2.3
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[U-Boot] [PATCH 2/2] i2c:soft:multi: Enable soft I2C multibus at Trats development board
This commit enables multibus handling at Trats development board. Signed-off-by: Lukasz Majewski l.majew...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- include/configs/trats.h | 19 +-- 1 files changed, 13 insertions(+), 6 deletions(-) diff --git a/include/configs/trats.h b/include/configs/trats.h index c6fb2e0..bb764a5 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -235,12 +235,6 @@ #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_CACHELINE_SIZE 32 -#include asm/arch/gpio.h -/* - * I2C Settings - */ -#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7) -#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6) #define CONFIG_SOFT_I2C #define CONFIG_SOFT_I2C_READ_REPEATED_START @@ -248,6 +242,19 @@ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_MAX_I2C_BUS 7 +#include asm/arch/gpio.h + +#define CONFIG_SOFT_I2C_I2C4_SCL exynos4_gpio_part1_get_nr(b, 3) +#define CONFIG_SOFT_I2C_I2C4_SDA exynos4_gpio_part1_get_nr(b, 2) + +#define CONFIG_SOFT_I2C_I2C5_SCL exynos4_gpio_part1_get_nr(b, 7) +#define CONFIG_SOFT_I2C_I2C5_SDA exynos4_gpio_part1_get_nr(b, 6) + +#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin() +#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin() +/* I2C_INIT defined to skip soft_i2c.c default one */ +#define I2C_INIT multi_i2c_init() + #define CONFIG_PMIC #define CONFIG_PMIC_I2C #define CONFIG_PMIC_MAX8997 -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
Hello Stefano, Could we use here a define, something like this: #define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) 20) | ((fp - 1) 8) | (sw - 1)) Agree - and put it in a common header (arch/dss.h), making it accessible to all boards. And we need only one macro PANEL_TIMING, the register has the same layout. I'll do in V2. The hbp, hfp, hsw, vsw all have a (program to value minus 1). vbp and vfp don't, you can set those to zero. So while the layout is the same, the meaning isn't. To make the values match the lcd specification, I would prefer to have the separate defines. Regards, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] SPL: Enable use of custom defined U-Boot entry point
By setting CONFIG_SYS_UBOOT_START boards can now use a different entry point for their U-Boot image. So the U-Boot entry point is not fixed to CONFIG_SYS_TEXT_BASE any more. Signed-off-by: Stefan Roese s...@denx.de --- common/spl/spl.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index 7b5656a..26526f3 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -35,6 +35,9 @@ DECLARE_GLOBAL_DATA_PTR; +#ifndef CONFIG_SYS_UBOOT_START +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#endif #ifndef CONFIG_SYS_MONITOR_LEN #define CONFIG_SYS_MONITOR_LEN (200 * 1024) #endif @@ -103,7 +106,7 @@ void spl_parse_image_header(const struct image_header *header) header-ih_magic); /* Let's assume U-Boot will not be more than 200 KB */ spl_image.size = CONFIG_SYS_MONITOR_LEN; - spl_image.entry_point = CONFIG_SYS_TEXT_BASE; + spl_image.entry_point = CONFIG_SYS_UBOOT_START; spl_image.load_addr = CONFIG_SYS_TEXT_BASE; spl_image.os = IH_OS_U_BOOT; spl_image.name = U-Boot; -- 1.7.12 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] i2c:soft:multi: Support for multiple soft I2C buses
Hello Lukasz,
On 28.08.2012 10:33, Lukasz Majewski wrote:
Support for multiple soft I2C buses at soft_i2c.c
This approach defines get_multi_{sda|scl}_pin functions to switch
between multiple soft I2C buses.
Up to CONFIG_SYS_MAX_I2C_BUS devices can be utilized.
Common definition of I2C_X I2C buses is provided.
TEST HW:
Samsung's Exynos4210 evt.0.1 - Trats development board
Signed-off-by: Lukasz Majewskil.majew...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
---
drivers/i2c/soft_i2c.c | 41 +
include/i2c.h | 17 +
2 files changed, 58 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index 36c6114..7901f04 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -127,6 +127,15 @@ DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_I2C_MULTI_BUS)
static unsigned int i2c_bus_num __attribute__ ((section (.data))) = 0;
+const char *soft_i2c_name[CONFIG_SYS_MAX_I2C_BUS] = {
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ soft_i2c_4,
+ soft_i2c_5,
+ NULL,
+};
For what do you need soft_i2c_name? I see no usage of this in your patchset?
Also why the NULL for 0-3 and 6 positions?
And what is, if CONFIG_SYS_MAX_I2C_BUS is 7 ?
#endif /* CONFIG_I2C_MULTI_BUS */
/*---
@@ -482,3 +491,35 @@ int i2c_write(uchar chip, uint addr, int alen, uchar
*buffer, int len)
send_stop();
return(failures);
}
+
+#if defined(CONFIG_I2C_MULTI_BUS)
+/* Handle multiple I2C buses instances */
+int get_multi_scl_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SCL;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SCL;
+ };
+
+ return 0;
+}
+
+int get_multi_sda_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SDA;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SDA;
+ };
+
+ return 0;
+}
+
+int multi_i2c_init(void)
+{
+ return 0;
+}
+#endif /* CONFIG_I2C_MULTI_BUS */
Again, what is with busnr = 0-3 or 6?
This is not needed in the i2c soft file. You can define this functions
board specific ... so, no change in the driver is needed ... please
move this to board specific code.
diff --git a/include/i2c.h b/include/i2c.h
index 1f35acf..d563d62 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -250,4 +250,21 @@ static inline void I2C_SET_BUS(unsigned int bus)
i2c_set_bus_num(bus);
}
+/* Multi I2C busses handling */
+#if (defined(CONFIG_SOFT_I2C) defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+ I2C_2,
+ I2C_3,
+ I2C_4,
+ I2C_5,
+ I2C_6
+};
+
+extern const char *soft_i2c_name[CONFIG_SYS_MAX_I2C_BUS];
+extern int get_multi_scl_pin(void);
+extern int get_multi_sda_pin(void);
+extern int multi_i2c_init(void);
+#endif
#endif/* _I2C_H_ */
bye,
Heiko
--
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[U-Boot] [PATCH v2 2/2] MX28: mx28evk: Enable SPI DMA
Signed-off-by: Otavio Salvador ota...@ossystems.com.br --- Changes in v2: - new patch include/configs/mx28evk.h |1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 8d83495..a5a98fb 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -200,6 +200,7 @@ #ifdef CONFIG_CMD_SPI #define CONFIG_HARD_SPI #define CONFIG_MXS_SPI +#define CONFIG_MXS_SPI_DMA_ENABLE #define CONFIG_SPI_HALF_DUPLEX #define CONFIG_DEFAULT_SPI_BUS 2 #define CONFIG_DEFAULT_SPI_MODESPI_MODE_0 -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MX28: mx28evk: Follow m28evk change in SSP clock
On Mon, Aug 27, 2012 at 8:28 PM, Marek Vasut marek.va...@gmail.com wrote: Dear Otavio Salvador, This changes the board config to follow m28evk board configuration. Signed-off-by: Otavio Salvador ota...@ossystems.com.br ... - /* SSP2 clock at 96MHz */ - mx28_set_sspclk(MXC_SSPCLK2, 96000, 0); + /* SSP2 clock at 160MHz */ + mx28_set_sspclk(MXC_SSPCLK2, 16, 0); You _MUST_ also adjust the default SPI flash sleep, otherwise this is flat pointless change From what I see in the changes the sleep change is not board dependant and has been already done by you. I did send a v2 which enables DMA for SPI and rewords the commit log for the same used by you in m28evk change. This way we are clear about the change. -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] MX28: mx28evk: Align SSP clock speed
Align the SSP clock speed with oscilator to achieve higher transfer stability. Signed-off-by: Otavio Salvador ota...@ossystems.com.br --- Changes in v2: - reword commit log to match the change description done on m28evk. board/freescale/mx28evk/mx28evk.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c index 867d3c8..d782aea 100644 --- a/board/freescale/mx28evk/mx28evk.c +++ b/board/freescale/mx28evk/mx28evk.c @@ -49,8 +49,8 @@ int board_early_init_f(void) /* SSP0 clock at 96MHz */ mx28_set_sspclk(MXC_SSPCLK0, 96000, 0); - /* SSP2 clock at 96MHz */ - mx28_set_sspclk(MXC_SSPCLK2, 96000, 0); + /* SSP2 clock at 160MHz */ + mx28_set_sspclk(MXC_SSPCLK2, 16, 0); #ifdef CONFIG_CMD_USB mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT); -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] MX28: mx28evk: Align SSP clock speed
Dear Otavio Salvador, Align the SSP clock speed with oscilator to achieve higher transfer stability. This change is still pointless, unless you have user for this! Signed-off-by: Otavio Salvador ota...@ossystems.com.br --- Changes in v2: - reword commit log to match the change description done on m28evk. board/freescale/mx28evk/mx28evk.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c index 867d3c8..d782aea 100644 --- a/board/freescale/mx28evk/mx28evk.c +++ b/board/freescale/mx28evk/mx28evk.c @@ -49,8 +49,8 @@ int board_early_init_f(void) /* SSP0 clock at 96MHz */ mx28_set_sspclk(MXC_SSPCLK0, 96000, 0); - /* SSP2 clock at 96MHz */ - mx28_set_sspclk(MXC_SSPCLK2, 96000, 0); + /* SSP2 clock at 160MHz */ + mx28_set_sspclk(MXC_SSPCLK2, 16, 0); #ifdef CONFIG_CMD_USB mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT); Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] i2c:soft:multi: Support for multiple soft I2C buses
Hi Heiko,
#if defined(CONFIG_I2C_MULTI_BUS)
static unsigned int i2c_bus_num __attribute__ ((section
(.data))) = 0; +const char *soft_i2c_name[CONFIG_SYS_MAX_I2C_BUS]
= {
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ soft_i2c_4,
+ soft_i2c_5,
+ NULL,
+};
For what do you need soft_i2c_name? I see no usage of this in your
patchset? Also why the NULL for 0-3 and 6 positions?
And what is, if CONFIG_SYS_MAX_I2C_BUS is 7 ?
Indeed this can be removed - it is not needed (for now).
+#if defined(CONFIG_I2C_MULTI_BUS)
+/* Handle multiple I2C buses instances */
+int get_multi_scl_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SCL;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SCL;
+ };
+
+ return 0;
+}
+
+int get_multi_sda_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SDA;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SDA;
+ };
+
+ return 0;
+}
+
+int multi_i2c_init(void)
+{
+ return 0;
+}
+#endif /* CONFIG_I2C_MULTI_BUS */
Again, what is with busnr = 0-3 or 6?
This is not needed in the i2c soft file. You can define this functions
board specific ... so, no change in the driver is needed ... please
move this to board specific code.
Please consider, that get_multi_{sda|scl}_pin can be used by other
boards. Those are written in a generic way (by calling I2C_GET_BUS()).
What here I'm trying to avoid is the code duplication for each board
(e.g. Samsung's GONI, Universal, Trats, Origen ... etc).
I can agree, that now only I2C_{4|5} are defined (since for now Samsung
is using I2C_4 and I2C_5).
But other cases can be also defined.
What I see even more important is a definition of (at i2c.h):
+#if (defined(CONFIG_SOFT_I2C) defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+ I2C_2,
+ I2C_3,
+ I2C_4,
+ I2C_5,
+ I2C_6
+};
since this will organize the order of multiple (soft) I2C devices.
Imagine that 2 PMICs are on the board (I2C_4 and I2C_5). I need to
distinct those (when calling I2C_SET|GET_BUS)
And then support for another I2C device (e.g. I2C_2) at other
subsystem is provided.
Then I can:
1. Add common definition of I2C_X (as I've proposed) to i2c.h
2. Add #define I2C_X on the ./include/configs/{e.g. trats}.h board.
For second approach used I need to duplicate the code for other targets
(goni, universal, origen) when needed and I cannot avoid that someone
else will define other names - like #define MINE_I2C_X on
his/her ./include/configs/{board}.h
--
Best regards,
Lukasz Majewski
Samsung Poland RD Center | Linux Platform Group
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Re: [U-Boot] [PATCH v1 7/8] video: drop duplicate set of DISPC_CONFIG register
Hi Stefano, On 08/28/2012 09:46 AM, Stefano Babic wrote: Signed-off-by: Stefano Babic sba...@denx.de --- drivers/video/omap3_dss.c |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c index 6686718..5fcc0fb 100644 --- a/drivers/video/omap3_dss.c +++ b/drivers/video/omap3_dss.c @@ -112,7 +112,6 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg) writel(panel_cfg-pol_freq, dispc-pol_freq); writel(panel_cfg-divisor, dispc-divisor); writel(panel_cfg-lcd_size, dispc-size_lcd); - writel(panel_cfg-load_mode FRAME_MODE_SHIFT, dispc-config); writel(panel_cfg-panel_type TFTSTN_SHIFT | panel_cfg-data_lines DATALINES_SHIFT, dispc-control); writel(panel_cfg-panel_color, dispc-default_color0); The beagle board doesn't have a framebuffer, but uses the panel color only. So only the part till if (!panel_cfg-frame_buffer) is used by the beagle board, so the other should be removed. And perhaps change the FRAME_MODE_SHIFT to LOADMODE_SHIFT (both defined as 1 though). Regards, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 7/8] video: drop duplicate set of DISPC_CONFIG register
On 28/08/2012 12:40, Jeroen Hofstee wrote: Hi Stefano, Hi Jeroen, On 08/28/2012 09:46 AM, Stefano Babic wrote: Signed-off-by: Stefano Babic sba...@denx.de --- drivers/video/omap3_dss.c |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c index 6686718..5fcc0fb 100644 --- a/drivers/video/omap3_dss.c +++ b/drivers/video/omap3_dss.c @@ -112,7 +112,6 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg) writel(panel_cfg-pol_freq, dispc-pol_freq); writel(panel_cfg-divisor, dispc-divisor); writel(panel_cfg-lcd_size, dispc-size_lcd); -writel(panel_cfg-load_mode FRAME_MODE_SHIFT, dispc-config); writel(panel_cfg-panel_type TFTSTN_SHIFT | panel_cfg-data_lines DATALINES_SHIFT, dispc-control); writel(panel_cfg-panel_color, dispc-default_color0); The beagle board doesn't have a framebuffer, but uses the panel color only. So only the part till if (!panel_cfg-frame_buffer) is used by the beagle board, so the other should be removed. And perhaps change the FRAME_MODE_SHIFT to LOADMODE_SHIFT (both defined as 1 though). This is exactly the duplication. In code, after some lines : writel(panel_cfg-load_mode LOADMODE_SHIFT, dispc-config); that is equivalent to the dropped line. Then I will move this line before the check if frame_buffer is set. And by the way, I drop FRAME_MODE_SHIFT. Best regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
On 28/08/2012 10:47, Jeroen Hofstee wrote: Hello Stefano, Could we use here a define, something like this: #define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) 20) | ((fp - 1) 8) | (sw - 1)) Agree - and put it in a common header (arch/dss.h), making it accessible to all boards. And we need only one macro PANEL_TIMING, the register has the same layout. I'll do in V2. The hbp, hfp, hsw, vsw all have a (program to value minus 1). vbp and vfp don't, you can set those to zero. So while the layout is the same, the meaning isn't. To make the values match the lcd specification, I would prefer to have the separate defines. That's right - I will put two separate defines. Regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] i2c:soft:multi: Support for multiple soft I2C buses
Hello Lukasz,
On 28.08.2012 12:40, Lukasz Majewski wrote:
Hi Heiko,
#if defined(CONFIG_I2C_MULTI_BUS)
static unsigned int i2c_bus_num __attribute__ ((section
(.data))) = 0; +const char *soft_i2c_name[CONFIG_SYS_MAX_I2C_BUS]
= {
+ NULL,
+ NULL,
+ NULL,
+ NULL,
+ soft_i2c_4,
+ soft_i2c_5,
+ NULL,
+};
For what do you need soft_i2c_name? I see no usage of this in your
patchset? Also why the NULL for 0-3 and 6 positions?
And what is, if CONFIG_SYS_MAX_I2C_BUS is 7 ?
Indeed this can be removed - it is not needed (for now).
Ok.
+#if defined(CONFIG_I2C_MULTI_BUS)
+/* Handle multiple I2C buses instances */
+int get_multi_scl_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SCL;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SCL;
+ };
+
+ return 0;
+}
+
+int get_multi_sda_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SDA;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SDA;
+ };
+
+ return 0;
+}
+
+int multi_i2c_init(void)
+{
+ return 0;
+}
+#endif /* CONFIG_I2C_MULTI_BUS */
Again, what is with busnr = 0-3 or 6?
This is not needed in the i2c soft file. You can define this functions
board specific ... so, no change in the driver is needed ... please
move this to board specific code.
Please consider, that get_multi_{sda|scl}_pin can be used by other
boards. Those are written in a generic way (by calling I2C_GET_BUS()).
Got this, but why do you index them with 4 and 5 and not with 0 and 1?
What is, if another board uses 0 and 1, so this would introduce
the defines CONFIG_SOFT_I2C_I2C0_SDA and CONFIG_SOFT_I2C_I2C1_SDA
in the common get_multi_sda_pin(), which leads in compilererror for
your board(s) ... your proposed get_multi_sda_pin() is currently
samsung specific ...
What here I'm trying to avoid is the code duplication for each board
(e.g. Samsung's GONI, Universal, Trats, Origen ... etc).
If they use all the same function, they should end in a
../samsung/common/common.c
because, currently your functions are samsung specific.
common is (from my point of view) that we add in the board config file:
+#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
+#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
I can agree, that now only I2C_{4|5} are defined (since for now Samsung
is using I2C_4 and I2C_5).
and thats samsung specific ... because other boards maybe start
with I2C_0 ... and this case is not respected in your patch.
But other cases can be also defined.
Yep, and break compiling your board, as this defines are not specified.
What I see even more important is a definition of (ati2c.h):
+#if (defined(CONFIG_SOFT_I2C) defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+ I2C_2,
+ I2C_3,
+ I2C_4,
+ I2C_5,
+ I2C_6
+};
since this will organize the order of multiple (soft) I2C devices.
Imagine that 2 PMICs are on the board (I2C_4 and I2C_5). I need to
distinct those (when calling I2C_SET|GET_BUS)
And then support for another I2C device (e.g. I2C_2) at other
subsystem is provided.
Then I can:
1. Add common definition of I2C_X (as I've proposed) toi2c.h
2. Add #define I2C_X on the ./include/configs/{e.g. trats}.h board.
Why add #define I2C_X in ./include/configs/{e.g. trats}.h ?
I don´t understand this ... and you do not this in your patchserie!
For second approach used I need to duplicate the code for other targets
(goni, universal, origen) when needed and I cannot avoid that someone
or make a ../samsung/common/common.c until they are samsung specific.
else will define other names - like #define MINE_I2C_X on
his/her ./include/configs/{board}.h
Ok, but if you use I2C_4 and I2C_5, you must also define the I2C_0,
I2C_1, I2C_2 and I2C_3 cases in the get_multi_* functions, as other
boards would start with I2C_0 ...
... and add a documentation in README for this ...
but I mislike to introduce such a lot of defines ... instead of defining
get_multi_*() board/manufacturer/soc specific ... Maybe there is a
board with 10 i2c soft busses, so we must define in all boards using
soft multibus this 20 (CONFIG_SOFT_I2C_I2C*_SCL/SDA)defines ... or
at least define them if not defined in include/i2c.h ... bad.
bye,
Heiko
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[U-Boot] [PATCH] ubifs: Fix memory leak in ubifs_finddir
This patch fixes a memory leak in ubifs_finddir().
Signed-off-by: Stefan Roese s...@denx.de
Cc: dev.ma@gmail.com
---
fs/ubifs/ubifs.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
index 604eb8f..c68802b 100644
--- a/fs/ubifs/ubifs.c
+++ b/fs/ubifs/ubifs.c
@@ -295,6 +295,7 @@ static int ubifs_finddir(struct super_block *sb, char
*dirname,
struct file *file;
struct dentry *dentry;
struct inode *dir;
+ int ret = 0;
file = kzalloc(sizeof(struct file), 0);
dentry = kzalloc(sizeof(struct dentry), 0);
@@ -336,7 +337,8 @@ static int ubifs_finddir(struct super_block *sb, char
*dirname,
if ((strncmp(dirname, (char *)dent-name, nm.len) == 0)
(strlen(dirname) == nm.len)) {
*inum = le64_to_cpu(dent-inum);
- return 1;
+ ret = 1;
+ goto out_free;
}
/* Switch to the next entry */
@@ -355,11 +357,10 @@ static int ubifs_finddir(struct super_block *sb, char
*dirname,
}
out:
- if (err != -ENOENT) {
+ if (err != -ENOENT)
ubifs_err(cannot find next direntry, error %d, err);
- return err;
- }
+out_free:
if (file-private_data)
kfree(file-private_data);
if (file)
@@ -369,7 +370,7 @@ out:
if (dir)
free(dir);
- return 0;
+ return ret;
}
static unsigned long ubifs_findfile(struct super_block *sb, char *filename)
--
1.7.12
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Re: [U-Boot] [PATCH 1/2] i2c:soft:multi: Support for multiple soft I2C buses
Hi Heiko,
+#if defined(CONFIG_I2C_MULTI_BUS)
+/* Handle multiple I2C buses instances */
+int get_multi_scl_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SCL;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SCL;
+ };
+
+ return 0;
+}
+
+int get_multi_sda_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SDA;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SDA;
+ };
+
+ return 0;
+}
+
+int multi_i2c_init(void)
+{
+ return 0;
+}
+#endif /* CONFIG_I2C_MULTI_BUS */
Again, what is with busnr = 0-3 or 6?
This is not needed in the i2c soft file. You can define this
functions board specific ... so, no change in the driver is
needed ... please move this to board specific code.
Please consider, that get_multi_{sda|scl}_pin can be used by other
boards. Those are written in a generic way (by calling
I2C_GET_BUS()).
Got this, but why do you index them with 4 and 5 and not with 0 and 1?
What is, if another board uses 0 and 1, so this would introduce
the defines CONFIG_SOFT_I2C_I2C0_SDA and CONFIG_SOFT_I2C_I2C1_SDA
in the common get_multi_sda_pin(), which leads in compilererror for
your board(s) ... your proposed get_multi_sda_pin() is currently
samsung specific ...
What here I'm trying to avoid is the code duplication for each board
(e.g. Samsung's GONI, Universal, Trats, Origen ... etc).
If they use all the same function, they should end in
a ../samsung/common/common.c because, currently your functions are
samsung specific.
common is (from my point of view) that we add in the board config
file:
+#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
+#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
I can agree, that now only I2C_{4|5} are defined (since for now
Samsung is using I2C_4 and I2C_5).
and thats samsung specific ... because other boards maybe start
with I2C_0 ... and this case is not respected in your patch.
But other cases can be also defined.
Yep, and break compiling your board, as this defines are not
specified.
What I see even more important is a definition of (ati2c.h):
+#if (defined(CONFIG_SOFT_I2C) defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+ I2C_2,
+ I2C_3,
+ I2C_4,
+ I2C_5,
+ I2C_6
+};
I would like to propose that, I will rename the I2C_4 - I2C_0 and
I2C_5 - I2C_1,
then we can define at i2c.h :
+#if (defined(CONFIG_SOFT_I2C) defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+};
And this would facilitate handling of SOFT_I2C numbering across
relevant subsystems (e.g. PMICs and other).
since this will organize the order of multiple (soft) I2C devices.
Imagine that 2 PMICs are on the board (I2C_4 and I2C_5). I need to
distinct those (when calling I2C_SET|GET_BUS)
And then support for another I2C device (e.g. I2C_2) at other
subsystem is provided.
Then I can:
1. Add common definition of I2C_X (as I've proposed) toi2c.h
2. Add #define I2C_X on the ./include/configs/{e.g. trats}.h board.
Why add #define I2C_X in ./include/configs/{e.g. trats}.h ?
I don´t understand this ... and you do not this in your
patchserie!
For second approach used I need to duplicate the code for other
targets (goni, universal, origen) when needed and I cannot avoid
that someone
or make a ../samsung/common/common.c until they are samsung
specific.
else will define other names - like #define MINE_I2C_X on
his/her ./include/configs/{board}.h
Ok, but if you use I2C_4 and I2C_5, you must also define the I2C_0,
I2C_1, I2C_2 and I2C_3 cases in the get_multi_* functions, as other
boards would start with I2C_0 ...
... and add a documentation in README for this ...
but I mislike to introduce such a lot of defines ... instead of
defining get_multi_*() board/manufacturer/soc specific ... Maybe
there is a board with 10 i2c soft busses, so we must define in all
boards using soft multibus this 20
(CONFIG_SOFT_I2C_I2C*_SCL/SDA)defines ... or at least define them if
not defined in include/i2c.h ... bad.
I will move the get_multi_* functions to ../samsung/common/common.c
However, I think, that it would be good to add following declarations to
i2c.h:
extern int get_multi_scl_pin(void);
extern int get_multi_sda_pin(void);
extern int multi_i2c_init(void);
,which can be defined on different platforms.
What is your opinion about that?
--
Best regards,
Lukasz Majewski
Samsung Poland RD Center | Linux Platform Group
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[U-Boot] [PATCH v2 0/9] This patchset updates boards based on the TAM3517 SOM.
The MAC address provided by the manufacturer can be read from the EEPROM. Add also Video support to the mt_ventoux (TAM3517) board. Changes in v2: - Set dispc_config before checking for framebuffer - Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee) Stefano Babic (9): OMAP3: tam3517: add function to read MAC from EEPROM OMAP3: twister : get MAC address from EEPROM OMAP3: mt_ventoux: Correct board pinmux OMAP3: mt_ventoux: activate GPIO4 OMAP3: mt_ventoux: read MAC address from EEPROM OMAP3: mt_ventoux: disable the buzzer at start-up video: drop duplicate set of DISPC_CONFIG register OMAP3: video: add macros to set display parameters OMAP3: mt_ventoux: added video support arch/arm/include/asm/arch-omap3/dss.h |5 +- board/technexion/twister/twister.c| 10 +++ board/teejet/mt_ventoux/mt_ventoux.c | 113 + board/teejet/mt_ventoux/mt_ventoux.h | 80 ++- drivers/video/omap3_dss.c |3 +- include/configs/mt_ventoux.h | 17 + include/configs/tam3517-common.h | 66 +++ 7 files changed, 245 insertions(+), 49 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/9] OMAP3: mt_ventoux: Correct board pinmux
Fix some issues (some pins were not set as GPIOs)
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.h | 74 +++---
1 file changed, 33 insertions(+), 41 deletions(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index 9b2e43e..d1fee25 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -142,7 +142,8 @@ const omap3_sysinfo sysinfo = {
/*GPIO_62: FPGA_RESET */ \
MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) \
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/ \
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) \
+ /* GPIO_64*/ \
MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) \
/* DSS */\
MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \
@@ -174,26 +175,6 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \
MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \
/* CAMERA */\
- MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_FLD),(IDIS | PTD | DIS | M4)) /*GPIO_98*/\
- MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D10),(IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D11),(IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_WEN),(IEN | PTD | DIS | M4)) /*GPIO_167*/\
- MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \
@@ -209,6 +190,7 @@ const omap3_sysinfo sysinfo = {
/* GPIO_126: CardDetect */\
MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \
+ /*GPIO_128 */ \
MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \
\
MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\
@@ -250,7 +232,7 @@ const omap3_sysinfo sysinfo = {
\
MUX_VAL(CP(MCBSP4_CLKX),(IEN | PTD | DIS | M4)) \
/*GPIO_152: Ignition Sense */ \
- MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) \
+ MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M4)) \
/*GPIO_153: Power Button Sense */ \
MUX_VAL(CP(MCBSP4_DX), (IEN | PTU | DIS | M4)) \
/* GPIO_154: FPGA_DONE */ \
@@ -264,10 +246,14 @@ const omap3_sysinfo sysinfo = {
/* GPIO_150: USB status 1 */\
\
MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \
+ MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M2)) \
+ /* gpt9_pwm */\
+ MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M2)) \
+ /* gpt10_pwm */\
+ MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M2)) \
+ /* gpt8_pwm */\
+ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M2)) \
+ /* gpt11_pwm */\
\
MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) \
/*GPIO_163 : TS_PENIRQ*/ \
@@ -299,22 +285,24 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \
MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) \
/* CCDC */\
- MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \
[U-Boot] [PATCH v2 5/9] OMAP3: mt_ventoux: read MAC address from EEPROM
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 16
1 file changed, 16 insertions(+)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 9fbaedd..b7744a9 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -196,6 +196,22 @@ int board_init(void)
return 0;
}
+int misc_init_r(void)
+{
+ char *eth_addr;
+
+ dieid_num_r();
+
+ eth_addr = getenv(ethaddr);
+ if (eth_addr)
+ return 0;
+
+#ifndef CONFIG_SPL_BUILD
+ TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+ return 0;
+}
+
/*
* Routine: set_muxconf_regs
* Description: Setting up the configuration Mux registers specific to the
--
1.7.9.5
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[U-Boot] [PATCH v2 2/9] OMAP3: twister : get MAC address from EEPROM
Signed-off-by: Stefano Babic sba...@denx.de
---
board/technexion/twister/twister.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/board/technexion/twister/twister.c
b/board/technexion/twister/twister.c
index c2b10ac..7429e93 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -100,8 +100,18 @@ int board_init(void)
int misc_init_r(void)
{
+ char *eth_addr;
+
dieid_num_r();
+ eth_addr = getenv(ethaddr);
+ if (eth_addr)
+ return 0;
+
+#ifndef CONFIG_SPL_BUILD
+ TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+
return 0;
}
--
1.7.9.5
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[U-Boot] [PATCH v2 1/9] OMAP3: tam3517: add function to read MAC from EEPROM
The manufacturer delivers the TAM3517 SOM with 4 MAC address.
They are stored on the EEPROM of the SOM. The patch adds a
function to get their values and set the ethaddr variables.
Signed-off-by: Stefano Babic sba...@denx.de
---
Changes in v2:
- Set dispc_config before checking for framebuffer
- Use a common macro to set up the horizontal and vertical timing (Heiko
Schocker)
to not break beagleboard (Jeroen Hofstee)
include/configs/tam3517-common.h | 66 ++
1 file changed, 66 insertions(+)
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 24f6f7e..51503da 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -125,6 +125,7 @@
#define CONFIG_CMD_NAND/* NAND support */
#define CONFIG_CMD_PING
#define CONFIG_CMD_USB
+#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_FLASH/* only NAND on the SOM */
#undef CONFIG_CMD_IMLS
@@ -135,6 +136,9 @@
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_SYS_I2C_BUS 0
#define CONFIG_SYS_I2C_BUS_SELECT 1
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* base address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW0x07
#define CONFIG_DRIVER_OMAP34XX_I2C
@@ -354,4 +358,66 @@
fi; \
else echo U-Boot not downloaded..exiting;fi\0 \
+
+/*
+ * this is common code for all TAM3517 boards.
+ * MAC address is stored from manufacturer in
+ * I2C EEPROM
+ */
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+
+/*
+ * The I2C EEPROM on the TAM3517 contains
+ * mac address and production data
+ */
+struct tam3517_module_info {
+ char customer[48];
+ char product[48];
+
+ /*
+* bit 0~47 : sequence number
+* bit 48~55 : week of year, from 0.
+* bit 56~63 : year
+*/
+ unsigned long long sequence_number;
+
+ /*
+* bit 0~7 : revision fixed
+* bit 8~15 : revision major
+* bit 16~31 : TNxxx
+*/
+ unsigned int revision;
+ unsigned char eth_addr[4][8];
+ unsigned char _rev[100];
+};
+
+#define TAM3517_READ_MAC_FROM_EEPROM \
+do { \
+ struct tam3517_module_info info;\
+ char buf[80], ethname[20]; \
+ int i; \
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
+ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
+ (void *)info, sizeof(info))) \
+ break; \
+ memset(buf, 0, sizeof(buf));\
+ for (i = 0 ; i ARRAY_SIZE(info.eth_addr); i++) { \
+ sprintf(buf, %02X:%02X:%02X:%02X:%02X:%02X, \
+ info.eth_addr[i][5],\
+ info.eth_addr[i][4],\
+ info.eth_addr[i][3],\
+ info.eth_addr[i][2],\
+ info.eth_addr[i][1],\
+ info.eth_addr[i][0]); \
+ \
+ if (i) \
+ sprintf(ethname, eth%daddr, i); \
+ else\
+ sprintf(ethname, ethaddr);\
+ printf(Setting %s from EEPROM with %s\n, ethname, buf);\
+ setenv(ethname, buf); \
+ } \
+} while (0)
+#endif
+
#endif /* __TAM3517_H */
--
1.7.9.5
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[U-Boot] [PATCH v2 6/9] OMAP3: mt_ventoux: disable the buzzer at start-up
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 14 ++
board/teejet/mt_ventoux/mt_ventoux.h |4
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index b7744a9..814e72f 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -39,6 +39,9 @@
DECLARE_GLOBAL_DATA_PTR;
+#define BUZZER 140
+#define SPEAKER141
+
#ifndef CONFIG_FPGA
#error The Teejet mt_ventoux must have CONFIG_FPGA enabled
#endif
@@ -193,6 +196,17 @@ int board_init(void)
mt_ventoux_init_fpga();
+ /* GPIO_140: speaker #mute */
+ MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4))
+ /* GPIO_141: Buzz Hi */
+ MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4))
+
+ /* Turning off the buzzer */
+ gpio_request(BUZZER, BUZZER_MUTE);
+ gpio_request(SPEAKER, SPEAKER);
+ gpio_direction_output(BUZZER, 0);
+ gpio_direction_output(SPEAKER, 0);
+
return 0;
}
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index d1fee25..eadb8a5 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -223,10 +223,6 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M4)) \
/* GPIO_119: FPGA_INIT */ \
\
- MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) \
- /* GPIO_140: speaker #mute */\
- MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4)) \
- /* GPIO_141: Buzz Hi */\
MUX_VAL(CP(MCBSP3_CLKX),(IEN | PTU | EN | M4)) \
MUX_VAL(CP(MCBSP3_FSX), (IEN | PTU | EN | M4)) \
\
--
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[U-Boot] [PATCH v2 7/9] video: drop duplicate set of DISPC_CONFIG register
Signed-off-by: Stefano Babic sba...@denx.de
---
arch/arm/include/asm/arch-omap3/dss.h |1 -
drivers/video/omap3_dss.c |3 +--
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index a830c43..8913a71 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -142,7 +142,6 @@ struct venc_regs {
};
/* Few Register Offsets */
-#define FRAME_MODE_SHIFT 1
#define TFTSTN_SHIFT 3
#define DATALINES_SHIFT8
diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c
index 6686718..b1424bf 100644
--- a/drivers/video/omap3_dss.c
+++ b/drivers/video/omap3_dss.c
@@ -112,7 +112,7 @@ void omap3_dss_panel_config(const struct panel_config
*panel_cfg)
writel(panel_cfg-pol_freq, dispc-pol_freq);
writel(panel_cfg-divisor, dispc-divisor);
writel(panel_cfg-lcd_size, dispc-size_lcd);
- writel(panel_cfg-load_mode FRAME_MODE_SHIFT, dispc-config);
+ writel(panel_cfg-load_mode LOADMODE_SHIFT, dispc-config);
writel(panel_cfg-panel_type TFTSTN_SHIFT |
panel_cfg-data_lines DATALINES_SHIFT, dispc-control);
writel(panel_cfg-panel_color, dispc-default_color0);
@@ -121,7 +121,6 @@ void omap3_dss_panel_config(const struct panel_config
*panel_cfg)
if (!panel_cfg-frame_buffer)
return;
- writel(panel_cfg-load_mode LOADMODE_SHIFT, dispc-config);
writel(8 GFX_FORMAT_SHIFT | GFX_ENABLE, dispc-gfx_attributes);
writel(1, dispc-gfx_row_inc);
writel(1, dispc-gfx_pixel_inc);
--
1.7.9.5
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[U-Boot] [PATCH v2 8/9] OMAP3: video: add macros to set display parameters
Add a common macros to set the registers for horizontal
and vertical timing.
Signed-off-by: Stefano Babic sba...@denx.de
---
arch/arm/include/asm/arch-omap3/dss.h |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index 8913a71..df5b978 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -181,6 +181,10 @@ struct panel_config {
void *frame_buffer;
};
+#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) 20) | \
+((fp - 1) 8) | (sw - 1))
+#define PANEL_TIMING_V(bp, fp, sw) ((bp 20) | (fp 8) | (sw - 1))
+
/* Generic DSS Functions */
void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
u32 height, u32 width);
--
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[U-Boot] [PATCH v2 9/9] OMAP3: mt_ventoux: added video support
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 83 ++
board/teejet/mt_ventoux/mt_ventoux.h |2 +-
include/configs/mt_ventoux.h | 16 +++
3 files changed, 100 insertions(+), 1 deletion(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 814e72f..b8ad447 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -21,13 +21,17 @@
#include common.h
#include netdev.h
+#include malloc.h
#include fpga.h
+#include video_fb.h
#include asm/io.h
#include asm/arch/mem.h
#include asm/arch/mux.h
#include asm/arch/sys_proto.h
#include asm/omap_gpio.h
#include asm/arch/mmc_host_def.h
+#include asm/arch/dss.h
+#include asm/arch/clocks.h
#include i2c.h
#include spartan3.h
#include asm/gpio.h
@@ -53,6 +57,42 @@ DECLARE_GLOBAL_DATA_PTR;
#define FPGA_INIT 119
#define FPGA_DONE 154
+#define LCD_PWR138
+#define LCD_PON_PIN139
+
+#if defined(CONFIG_VIDEO) !defined(CONFIG_SPL_BUILD)
+static struct {
+ u32 xres;
+ u32 yres;
+} panel_resolution[] = {
+ { 480, 272 },
+ { 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+ {
+ .timing_h = PANEL_TIMING_H(4, 8, 41),
+ .timing_v = PANEL_TIMING_V(2, 4, 10),
+ .pol_freq = 0x, /* Pol Freq */
+ .divisor= 0x0001000d, /* 33Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ },
+ {
+ .timing_h = PANEL_TIMING_H(20, 192, 4),
+ .timing_v = PANEL_TIMING_V(2, 20, 10),
+ .pol_freq = 0x4000, /* Pol Freq */
+ .divisor= 0x0001000E, /* 36Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ }
+};
+#endif
+
/* Timing definitions for FPGA */
static const u32 gpmc_fpga[] = {
FPGA_GPMC_CONFIG1,
@@ -254,3 +294,46 @@ int board_mmc_init(bd_t *bis)
return omap_mmc_init(0, 0, 0);
}
#endif
+
+#if defined(CONFIG_VIDEO) !defined(CONFIG_SPL_BUILD)
+int board_video_init(void)
+{
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ struct panel_config *panel = lcd_cfg[0];
+ char *s;
+ u32 index = 0;
+
+ void *fb;
+
+ fb = (void *)0x8800;
+
+ s = getenv(panel);
+ if (s) {
+ index = simple_strtoul(s, NULL, 10);
+ if (index ARRAY_SIZE(lcd_cfg))
+ panel = lcd_cfg[index];
+ else
+ return 0;
+ }
+
+ panel-frame_buffer = fb;
+ printf(Panel: %dx%d\n, panel_resolution[index].xres,
+ panel_resolution[index].yres);
+ panel-lcd_size = (panel_resolution[index].yres - 1) 16 |
+ (panel_resolution[index].xres - 1);
+
+ gpio_request(LCD_PWR, LCD Power);
+ gpio_request(LCD_PON_PIN, LCD Pon);
+ gpio_direction_output(LCD_PWR, 0);
+ gpio_direction_output(LCD_PON_PIN, 1);
+
+
+ setbits_le32(prcm_base-fclken_dss, FCK_DSS_ON);
+ setbits_le32(prcm_base-iclken_dss, ICK_DSS_ON);
+
+ omap3_dss_panel_config(panel);
+ omap3_dss_enable();
+
+ return 0;
+}
+#endif
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index eadb8a5..1cd7ec2 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -203,7 +203,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \
MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \
/* GPIO_138: LCD_ENVD */\
- MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \
+ MUX_VAL(CP(MMC2_DAT7), (IDIS | PTD | EN | M4)) \
/* GPIO_139: LCD_PON */\
/* McBSP */\
MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \
diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h
index 131670a..8d35943 100644
--- a/include/configs/mt_ventoux.h
+++ b/include/configs/mt_ventoux.h
@@ -2,6 +2,9 @@
* Copyright (C) 2011
* Stefano Babic, DENX Software Engineering, sba...@denx.de.
*
+ *
+ * Configuration settings for the Teejet mt_ventoux board.
+ *
* Copyright (C) 2009 TechNexion Ltd.
*
* This program is free software; you can redistribute it and/or modify
@@ -24,6 +27,10 @@
#include tam3517-common.h
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 10) + \
+ 6 * 1024 * 1024)
+
#define MACH_TYPE_AM3517_MT_VENTOUX3832
#define CONFIG_MACH_TYPE
Re: [U-Boot] [PATCH 1/2] i2c:soft:multi: Support for multiple soft I2C buses
Hello Lukasz,
On 28.08.2012 14:12, Lukasz Majewski wrote:
Hi Heiko,
+#if defined(CONFIG_I2C_MULTI_BUS)
+/* Handle multiple I2C buses instances */
+int get_multi_scl_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SCL;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SCL;
+ };
+
+ return 0;
+}
+
+int get_multi_sda_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SDA;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SDA;
+ };
+
+ return 0;
+}
+
+int multi_i2c_init(void)
+{
+ return 0;
+}
+#endif /* CONFIG_I2C_MULTI_BUS */
Again, what is with busnr = 0-3 or 6?
This is not needed in the i2c soft file. You can define this
functions board specific ... so, no change in the driver is
needed ... please move this to board specific code.
Please consider, that get_multi_{sda|scl}_pin can be used by other
boards. Those are written in a generic way (by calling
I2C_GET_BUS()).
Got this, but why do you index them with 4 and 5 and not with 0 and 1?
What is, if another board uses 0 and 1, so this would introduce
the defines CONFIG_SOFT_I2C_I2C0_SDA and CONFIG_SOFT_I2C_I2C1_SDA
in the common get_multi_sda_pin(), which leads in compilererror for
your board(s) ... your proposed get_multi_sda_pin() is currently
samsung specific ...
What here I'm trying to avoid is the code duplication for each board
(e.g. Samsung's GONI, Universal, Trats, Origen ... etc).
If they use all the same function, they should end in
a ../samsung/common/common.c because, currently your functions are
samsung specific.
common is (from my point of view) that we add in the board config
file:
+#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
+#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
I can agree, that now only I2C_{4|5} are defined (since for now
Samsung is using I2C_4 and I2C_5).
and thats samsung specific ... because other boards maybe start
with I2C_0 ... and this case is not respected in your patch.
But other cases can be also defined.
Yep, and break compiling your board, as this defines are not
specified.
What I see even more important is a definition of (ati2c.h):
+#if (defined(CONFIG_SOFT_I2C)defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+ I2C_2,
+ I2C_3,
+ I2C_4,
+ I2C_5,
+ I2C_6
+};
I would like to propose that, I will rename the I2C_4 - I2C_0 and
I2C_5 - I2C_1,
Yep!
then we can define ati2c.h :
+#if (defined(CONFIG_SOFT_I2C)defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+};
And this would facilitate handling of SOFT_I2C numbering across
relevant subsystems (e.g. PMICs and other).
Ok.
since this will organize the order of multiple (soft) I2C devices.
Imagine that 2 PMICs are on the board (I2C_4 and I2C_5). I need to
distinct those (when calling I2C_SET|GET_BUS)
And then support for another I2C device (e.g. I2C_2) at other
subsystem is provided.
Then I can:
1. Add common definition of I2C_X (as I've proposed) toi2c.h
2. Add #define I2C_X on the ./include/configs/{e.g. trats}.h board.
Why add #define I2C_X in ./include/configs/{e.g. trats}.h ?
I don´t understand this ... and you do not this in your
patchserie!
For second approach used I need to duplicate the code for other
targets (goni, universal, origen) when needed and I cannot avoid
that someone
or make a ../samsung/common/common.c until they are samsung
specific.
else will define other names - like #define MINE_I2C_X on
his/her ./include/configs/{board}.h
Ok, but if you use I2C_4 and I2C_5, you must also define the I2C_0,
I2C_1, I2C_2 and I2C_3 cases in the get_multi_* functions, as other
boards would start with I2C_0 ...
... and add a documentation in README for this ...
but I mislike to introduce such a lot of defines ... instead of
defining get_multi_*() board/manufacturer/soc specific ... Maybe
there is a board with 10 i2c soft busses, so we must define in all
boards using soft multibus this 20
(CONFIG_SOFT_I2C_I2C*_SCL/SDA)defines ... or at least define them if
not defined in include/i2c.h ... bad.
I will move the get_multi_* functions to ../samsung/common/common.c
Good.
However, I think, that it would be good to add following declarations to
i2c.h:
extern int get_multi_scl_pin(void);
extern int get_multi_sda_pin(void);
extern int multi_i2c_init(void);
In the case CONFIG_I2C_MULTI_BUS is defined.
,which can be defined on different platforms.
What is your opinion about that?
I agree with this!
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH v3] mx5:Use IMX_GPIO_NR macro
On 28/08/2012 04:30, Ashok wrote: From 6cf58670aa251a33ecac6c53a8be88e6f4e444b7 Mon Sep 17 00:00:00 2001 From: Ashok Kumar Reddy ashokkourla2...@gmail.com Date: Tue, 28 Aug 2012 07:39:38 +0530 Subject: [PATCH v3] mx5:Use IMX_GPIO_NR macro Signed-off-by: Ashok Kumar Reddy ashokkourla2...@gmail.com --- Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MX5: efikamx: substitutes GPIO_NUMBER with IMX_GPIO_NR
The macro to get the gpio number id was renamed to
IMX_GPIO_NR as in kernel. Fix the wrong name in efika.
Signed-off-by: Stefano Babic sba...@denx.de
CC: Matt Sealey m...@genesi-usa.com
---
board/genesi/mx51_efikamx/efikamx.c | 48 +--
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/board/genesi/mx51_efikamx/efikamx.c
b/board/genesi/mx51_efikamx/efikamx.c
index 18ab8d9..3968040 100644
--- a/board/genesi/mx51_efikamx/efikamx.c
+++ b/board/genesi/mx51_efikamx/efikamx.c
@@ -81,14 +81,14 @@ static u32 get_mx_rev(void)
*/
/* set to 1 in order to get correct value on board rev 1.1 */
- gpio_direction_output(GPIO_NUMBER(3, 16), 1);
- gpio_direction_input(GPIO_NUMBER(3, 11));
- gpio_direction_input(GPIO_NUMBER(3, 16));
- gpio_direction_input(GPIO_NUMBER(3, 17));
+ gpio_direction_output(IMX_GPIO_NR(3, 16), 1);
+ gpio_direction_input(IMX_GPIO_NR(3, 11));
+ gpio_direction_input(IMX_GPIO_NR(3, 16));
+ gpio_direction_input(IMX_GPIO_NR(3, 17));
- rev |= (!!gpio_get_value(GPIO_NUMBER(3, 16))) 0;
- rev |= (!!gpio_get_value(GPIO_NUMBER(3, 17))) 1;
- rev |= (!!gpio_get_value(GPIO_NUMBER(3, 11))) 2;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(3, 16))) 0;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(3, 17))) 1;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(3, 11))) 2;
return (~rev 0x7) + 1;
}
@@ -104,11 +104,11 @@ static inline u32 get_sb_rev(void)
imx_iomux_v3_setup_multiple_pads(efikasb_revision_pads,
ARRAY_SIZE(efikasb_revision_pads));
- gpio_direction_input(GPIO_NUMBER(2, 28));
- gpio_direction_input(GPIO_NUMBER(2, 29));
+ gpio_direction_input(IMX_GPIO_NR(2, 28));
+ gpio_direction_input(IMX_GPIO_NR(2, 29));
- rev |= (!!gpio_get_value(GPIO_NUMBER(2, 28))) 0;
- rev |= (!!gpio_get_value(GPIO_NUMBER(2, 29))) 1;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(2, 28))) 0;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(2, 29))) 1;
return rev;
}
@@ -159,9 +159,9 @@ static iomux_v3_cfg_t efikamx_spi_pads[] = {
MX51_PAD_GPIO1_6__GPIO1_6,
};
-#define EFIKAMX_SPI_SS0GPIO_NUMBER(4, 24)
-#define EFIKAMX_SPI_SS1GPIO_NUMBER(4, 25)
-#define EFIKAMX_PMIC_IRQ GPIO_NUMBER(1, 6)
+#define EFIKAMX_SPI_SS0IMX_GPIO_NR(4, 24)
+#define EFIKAMX_SPI_SS1IMX_GPIO_NR(4, 25)
+#define EFIKAMX_PMIC_IRQ IMX_GPIO_NR(1, 6)
/*
* PMIC configuration
@@ -282,15 +282,15 @@ static iomux_v3_cfg_t efikamx_sdhc1_pads[] = {
MX51_PAD_GPIO1_1__SD1_WP,
};
-#define EFIKAMX_SDHC1_WP GPIO_NUMBER(1, 1)
+#define EFIKAMX_SDHC1_WP IMX_GPIO_NR(1, 1)
static iomux_v3_cfg_t efikamx_sdhc1_cd_pads[] = {
MX51_PAD_GPIO1_0__SD1_CD,
MX51_PAD_EIM_CS2__SD1_CD,
};
-#define EFIKAMX_SDHC1_CD GPIO_NUMBER(1, 0)
-#define EFIKASB_SDHC1_CD GPIO_NUMBER(2, 27)
+#define EFIKAMX_SDHC1_CD IMX_GPIO_NR(1, 0)
+#define EFIKASB_SDHC1_CD IMX_GPIO_NR(2, 27)
static iomux_v3_cfg_t efikasb_sdhc2_pads[] = {
MX51_PAD_SD2_CMD__SD2_CMD,
@@ -303,8 +303,8 @@ static iomux_v3_cfg_t efikasb_sdhc2_pads[] = {
MX51_PAD_GPIO1_8__SD2_CD,
};
-#define EFIKASB_SDHC2_CD GPIO_NUMBER(1, 8)
-#define EFIKASB_SDHC2_WP GPIO_NUMBER(1, 7)
+#define EFIKASB_SDHC2_CD IMX_GPIO_NR(1, 8)
+#define EFIKASB_SDHC2_WP IMX_GPIO_NR(1, 7)
static inline uint32_t efikamx_mmc_getcd(u32 base)
{
@@ -415,17 +415,17 @@ static inline void setup_iomux_usb(void) { }
* Smarttop LED pad config is done in the DCD
*
*/
-#define EFIKAMX_LED_BLUE GPIO_NUMBER(3, 13)
-#define EFIKAMX_LED_GREEN GPIO_NUMBER(3, 14)
-#define EFIKAMX_LED_REDGPIO_NUMBER(3, 15)
+#define EFIKAMX_LED_BLUE IMX_GPIO_NR(3, 13)
+#define EFIKAMX_LED_GREEN IMX_GPIO_NR(3, 14)
+#define EFIKAMX_LED_REDIMX_GPIO_NR(3, 15)
static iomux_v3_cfg_t efikasb_led_pads[] = {
MX51_PAD_GPIO1_3__GPIO1_3,
MX51_PAD_EIM_CS0__GPIO2_25,
};
-#define EFIKASB_CAPSLOCK_LED GPIO_NUMBER(2, 25)
-#define EFIKASB_MESSAGE_LEDGPIO_NUMBER(1, 3) /* Note: active low */
+#define EFIKASB_CAPSLOCK_LED IMX_GPIO_NR(2, 25)
+#define EFIKASB_MESSAGE_LEDIMX_GPIO_NR(1, 3) /* Note: active low */
/*
* Board initialization
--
1.7.9.5
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Re: [U-Boot] [PATCH 1/2] i2c:soft:multi: Support for multiple soft I2C buses
Hi Heiko,
Hello Lukasz,
On 28.08.2012 14:12, Lukasz Majewski wrote:
Hi Heiko,
+#if defined(CONFIG_I2C_MULTI_BUS)
+/* Handle multiple I2C buses instances */
+int get_multi_scl_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SCL;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SCL;
+ };
+
+ return 0;
+}
+
+int get_multi_sda_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_4:
+ return CONFIG_SOFT_I2C_I2C4_SDA;
+ case I2C_5:
+ return CONFIG_SOFT_I2C_I2C5_SDA;
+ };
+
+ return 0;
+}
+
+int multi_i2c_init(void)
+{
+ return 0;
+}
+#endif /* CONFIG_I2C_MULTI_BUS */
Again, what is with busnr = 0-3 or 6?
This is not needed in the i2c soft file. You can define this
functions board specific ... so, no change in the driver is
needed ... please move this to board specific code.
Please consider, that get_multi_{sda|scl}_pin can be used by other
boards. Those are written in a generic way (by calling
I2C_GET_BUS()).
Got this, but why do you index them with 4 and 5 and not with 0
and 1? What is, if another board uses 0 and 1, so this would
introduce the defines CONFIG_SOFT_I2C_I2C0_SDA and
CONFIG_SOFT_I2C_I2C1_SDA in the common get_multi_sda_pin(),
which leads in compilererror for your board(s) ... your proposed
get_multi_sda_pin() is currently samsung specific ...
What here I'm trying to avoid is the code duplication for each
board (e.g. Samsung's GONI, Universal, Trats, Origen ... etc).
If they use all the same function, they should end in
a ../samsung/common/common.c because, currently your functions are
samsung specific.
common is (from my point of view) that we add in the board config
file:
+#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
+#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
I can agree, that now only I2C_{4|5} are defined (since for now
Samsung is using I2C_4 and I2C_5).
and thats samsung specific ... because other boards maybe start
with I2C_0 ... and this case is not respected in your patch.
But other cases can be also defined.
Yep, and break compiling your board, as this defines are not
specified.
What I see even more important is a definition of (ati2c.h):
+#if (defined(CONFIG_SOFT_I2C)defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+ I2C_2,
+ I2C_3,
+ I2C_4,
+ I2C_5,
+ I2C_6
+};
I would like to propose that, I will rename the I2C_4 - I2C_0 and
I2C_5 - I2C_1,
Yep!
Ok, so we have agreed.
then we can define ati2c.h :
+#if (defined(CONFIG_SOFT_I2C)defined(CONFIG_I2C_MULTI_BUS))
+enum {
+ I2C_0,
+ I2C_1,
+};
And this would facilitate handling of SOFT_I2C numbering across
relevant subsystems (e.g. PMICs and other).
Ok.
Nice,
since this will organize the order of multiple (soft) I2C devices.
Imagine that 2 PMICs are on the board (I2C_4 and I2C_5). I need to
distinct those (when calling I2C_SET|GET_BUS)
And then support for another I2C device (e.g. I2C_2) at other
subsystem is provided.
Then I can:
1. Add common definition of I2C_X (as I've proposed) toi2c.h
2. Add #define I2C_X on the ./include/configs/{e.g. trats}.h
board.
Why add #define I2C_X in ./include/configs/{e.g.
trats}.h ? I don´t understand this ... and you do not this in your
patchserie!
For second approach used I need to duplicate the code for other
targets (goni, universal, origen) when needed and I cannot avoid
that someone
or make a ../samsung/common/common.c until they are samsung
specific.
else will define other names - like #define MINE_I2C_X on
his/her ./include/configs/{board}.h
Ok, but if you use I2C_4 and I2C_5, you must also define the I2C_0,
I2C_1, I2C_2 and I2C_3 cases in the get_multi_* functions, as
other boards would start with I2C_0 ...
... and add a documentation in README for this ...
but I mislike to introduce such a lot of defines ... instead of
defining get_multi_*() board/manufacturer/soc specific ... Maybe
there is a board with 10 i2c soft busses, so we must define in all
boards using soft multibus this 20
(CONFIG_SOFT_I2C_I2C*_SCL/SDA)defines ... or at least define them
if not defined in include/i2c.h ... bad.
I will move the get_multi_* functions
to ../samsung/common/common.c
Good.
However, I think, that it would be good to add following
declarations to i2c.h:
extern int get_multi_scl_pin(void);
extern int get_multi_sda_pin(void);
extern int multi_i2c_init(void);
In the case CONFIG_I2C_MULTI_BUS is defined.
,which can be defined on different platforms.
What is your opinion about that?
I agree with this!
Ok, I need this.
--
Best regards,
Lukasz Majewski
Samsung Poland RD Center | Linux
Re: [U-Boot] [PATCH v2 8/9] OMAP3: video: add macros to set display parameters
Hello Stefano, On 28.08.2012 14:21, Stefano Babic wrote: Add a common macros to set the registers for horizontal and vertical timing. Signed-off-by: Stefano Babicsba...@denx.de --- arch/arm/include/asm/arch-omap3/dss.h |4 1 file changed, 4 insertions(+) Acked-by: Heiko Schocher h...@denx.de bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 20/25] da850: Add README.da850
On 08/28/2012 12:27 AM, Christian Riesch wrote: Hi Tom, one more comment, please see below. On Tue, Aug 28, 2012 at 1:18 AM, Tom Rini tr...@ti.com wrote: This file documents when to build for da850evm and when to build for da850_am18xxevm. It also documents how to write the u-boot.ais file to persistent storage (such as SPI), in some cases as well as how to write a recovery image. Signed-off-by: Tom Rini tr...@ti.com --- Changes in v2: - Add README.da850_am18xxevm Changes in v3: - Fix thinko, Nand - SPI (spotted by Prabhakar Lad) - Rename to README.da850, add more direct recovery method (Christian Riesch) Changes in v4: - Further re-word README.da850 based on feedback from Christian Riesch board/davinci/da8xxevm/README.da850 | 68 +++ 1 file changed, 68 insertions(+) create mode 100644 board/davinci/da8xxevm/README.da850 diff --git a/board/davinci/da8xxevm/README.da850 b/board/davinci/da8xxevm/README.da850 new file mode 100644 index 000..621a95d --- /dev/null +++ b/board/davinci/da8xxevm/README.da850 @@ -0,0 +1,68 @@ +Summary +=== +The README is for the boot procedure used for various DA850 (or compatible +parts such as the AM1808) based boards. + +In the context of U-Boot, the board is booted in three stages. The initial +bootloader which executes upon reset is the ROM Boot Loader (RBL) and sits +in the internal ROM. The RBL initializes the internal memory and then +depending on the exact board and pin configurations will initialize another +controller (such as SPI or NAND) to continue the boot process by loading +the secondary program loader (SPL). The SPL will initialize the system +further (some clocks, SDRAM) and then load the full u-boot from a +predefined location in persistent storage to DDR and jumps to the u-boot +entry point. + +AIS is an image format defined by TI for the images that are to be loaded +to memory by the RBL. The image is divided into a series of sections and +the image's entry point is specified. Each section comes with meta data +like the target address the section is to be copied to and the size of the +section, which is used by the RBL to load the image. At the end of the +image the RBL jumps to the image entry point. The AIS format allows for +other things such as programming the clocks and SDRAM if the header is +programmed for it. We do not take advantage of this and instead use SPL as +it allows for additional flexibility (run-time detect of board revision, +loading the next image from a different media, etc). + + +Compilation +=== +The exact build target you need will depend on the board you have. For +Logic PD boards, or other boards which store the ethernet MAC address at +the end of SPI flash, run 'make da850evm'. For boards which store the +ethernet MAC address in the i2c EEPROM located at 0x50, run +'make da850_am18xxevm'. Once this build completes you will have a +u-boot.ais file that needs to be written to the correct persistent +storage. + + +Flashing the images to SPI +== +The AIS image can be written to SPI flash using the following commands. +Assuming that the network is configured and enabled and the u-boot.ais file +is tftp'able. + +U-Boot sf probe 0 +U-Boot sf erase 0 +32 +U-Boot tftp u-boot.ais +U-Boot sf write c070 0 $filesize + + +Recovery + + +In the case of a bricked board, you need to use the TI tools found +here[1] to write the u-boot.ais file. An example of recovering to the SPI +flash of an AM1808 would be: + +$ mono sfh_OMAP-L138.exe -targetType AM1808 -p /dev/ttyUSB0 \ + -flash_noubl /path/to/u-boot.ais + +For other target types and flash locations: + +$ mono sfh_OMAP-L138.exe -h + +Links += +[1] + http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L137 I'm not sure if the flash loader for the L137 would work for the L138 and the AM1808 as well, please use this URL instead: http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138 Sorry, I didn't notice that in earlier versions... Whoops, fixed, ack added, thanks! -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] How to read content of eeprom from uboot
Hi guys, I have a beaglebone and would like to read the content of thee eeprom from uboot. i2c probe gives me the following: U-Boot# i2c probe Valid chip addresses: 00 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F U-Boot# i2c dev Current bus is 0 -Boot # i2c read 0 0x24 4 i2c - I2C sub-system Usage: i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum i2c dev [dev] - show or set current I2C bus i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing) i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill) i2c nm chip address[.0, .1, .2] - write to I2C device (constant address) i2c probe - show devices on the I2C bus i2c read chip address[.0, .1, .2] length memaddress - read to memory i2c reset - re-init the I2C Controller i2c speed [speed] - show or set I2C bus speed What is the right command to read from an address? -- View this message in context: http://old.nabble.com/How-to-read-content-of-eeprom-from-uboot-tp34348207p34348207.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] EXYNOS: change the compile/clean option of spl
From: Jeong-Hyeon Kim jh...@insignal.co.kr
spl tool of exynos5 designed only for smdk5250.
It compiled when defined CONFIG_SMDK5250 and BOARD name is smdk5250.
It means that it's not considered shrink boards with different board name.
So, it changed compile condition to exynos5 family option
not a specific board name for cover the other board.
I also modified clean condition to clear compiled spl.
Otherwise, tools/mk*spl show on untracked files.
It should be ignore in git.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
Makefile|2 +-
board/samsung/origen/Makefile |6 +++---
board/samsung/smdkv310/Makefile |6 +++---
spl/Makefile|2 +-
tools/.gitignore|1 +
tools/Makefile |6 +++---
6 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/Makefile b/Makefile
index e78c2b7..3fb48ae 100644
--- a/Makefile
+++ b/Makefile
@@ -745,7 +745,7 @@ clean:
$(obj)tools/gdb/{astest,gdbcont,gdbsend} \
$(obj)tools/gen_eth_addr$(obj)tools/img2srec \
$(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
- $(obj)tools/mk{smdk5250,}spl \
+ $(obj)tools/mk{$(SOC),$(BOARD),}spl
\
$(obj)tools/ncb $(obj)tools/ubsha1
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image}\
$(obj)board/matrix_vision/*/bootscript.img \
diff --git a/board/samsung/origen/Makefile b/board/samsung/origen/Makefile
index 3a885a5..bb95cc8 100644
--- a/board/samsung/origen/Makefile
+++ b/board/samsung/origen/Makefile
@@ -41,7 +41,7 @@ OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
ALL+=$(obj).depend $(LIB)
ifdef CONFIG_SPL_BUILD
-ALL+= $(OBJTREE)/tools/mk$(BOARD)spl
+ALL+= $(OBJTREE)/tools/mk$(SOC)spl
endif
all: $(ALL)
@@ -50,8 +50,8 @@ $(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
ifdef CONFIG_SPL_BUILD
-$(OBJTREE)/tools/mk$(BOARD)spl:tools/mkv310_image.c
- $(HOSTCC) tools/mkv310_image.c -o $(OBJTREE)/tools/mk$(BOARD)spl
+$(OBJTREE)/tools/mk$(SOC)spl: tools/mkv310_image.c
+ $(HOSTCC) tools/mkv310_image.c -o $(OBJTREE)/tools/mk$(SOC)spl
endif
#
diff --git a/board/samsung/smdkv310/Makefile b/board/samsung/smdkv310/Makefile
index 56e0c16..c2f344e 100644
--- a/board/samsung/smdkv310/Makefile
+++ b/board/samsung/smdkv310/Makefile
@@ -40,7 +40,7 @@ OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
ALL:= $(obj).depend $(LIB)
ifdef CONFIG_SPL_BUILD
-ALL+= $(OBJTREE)/tools/mk$(BOARD)spl
+ALL+= $(OBJTREE)/tools/mk$(SOC)spl
endif
all: $(ALL)
@@ -49,8 +49,8 @@ $(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
ifdef CONFIG_SPL_BUILD
-$(OBJTREE)/tools/mk$(BOARD)spl:tools/mkv310_image.c
- $(HOSTCC) tools/mkv310_image.c -o $(OBJTREE)/tools/mk$(BOARD)spl
+$(OBJTREE)/tools/mk$(SOC)spl: tools/mkv310_image.c
+ $(HOSTCC) tools/mkv310_image.c -o $(OBJTREE)/tools/mk$(SOC)spl
endif
#
diff --git a/spl/Makefile b/spl/Makefile
index 2cf7bda..92f5c70 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -117,7 +117,7 @@ all:$(ALL-y)
ifdef CONFIG_SAMSUNG
$(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin
- $(OBJTREE)/tools/mk$(BOARD)spl \
+ $(OBJTREE)/tools/mk$(SOC)spl \
$(obj)u-boot-spl.bin $(obj)$(BOARD)-spl.bin
endif
diff --git a/tools/.gitignore b/tools/.gitignore
index 3557a75..5fcb8d0 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -16,3 +16,4 @@
/env/fw_printenv
/gdb/gdbcont
/gdb/gdbsend
+/mk*spl
diff --git a/tools/Makefile b/tools/Makefile
index a7d1e18..a478179 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -68,7 +68,7 @@ BIN_FILES-$(CONFIG_CMD_LOADS) += img2srec$(SFX)
BIN_FILES-$(CONFIG_XWAY_SWAP_BYTES) += xway-swap-bytes$(SFX)
BIN_FILES-y += mkenvimage$(SFX)
BIN_FILES-y += mkimage$(SFX)
-BIN_FILES-$(CONFIG_SMDK5250) += mksmdk5250spl$(SFX)
+BIN_FILES-$(CONFIG_EXYNOS5) += mkexynosspl$(SFX)
BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX)
BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
@@ -96,7 +96,7 @@ NOPED_OBJ_FILES-y += imximage.o
NOPED_OBJ_FILES-y += omapimage.o
NOPED_OBJ_FILES-y += mkenvimage.o
NOPED_OBJ_FILES-y += mkimage.o
-OBJ_FILES-$(CONFIG_SMDK5250) += mkexynosspl.o
+OBJ_FILES-$(CONFIG_EXYNOS5) += mkexynosspl.o
OBJ_FILES-$(CONFIG_MX28) += mxsboot.o
OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o
NOPED_OBJ_FILES-y += os_support.o
@@ -218,7 +218,7 @@ $(obj)mkimage$(SFX):$(obj)aisimage.o \
$(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
$(HOSTSTRIP) $@
-$(obj)mk$(BOARD)spl$(SFX): $(obj)mkexynosspl.o
[U-Boot] [PATCH 2/4] EXYNOS: add XXTI for clock source
From: Jeong-Hyeon Kim jh...@insignal.co.kr Exynos SoC series are various and cover the different range of MCLK. Several clock setting is based on MPLL, but it's to easy change depend on board configuration. So, common setting of clock need for cover the various type of memory. System clock (XXTI) is one of solution for it. Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr --- arch/arm/cpu/armv7/exynos/clock.c | 16 1 files changed, 12 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 4f3b451..680aeeb 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -246,7 +246,9 @@ static unsigned long exynos4_get_pwm_clk(void) sel = readl(clk-src_peril0); sel = (sel 24) 0xf; - if (sel == 0x6) + if (sel == 0x0 || sel == 0x1) + sclk = CONFIG_SYS_CLK_FREQ; + else if (sel == 0x6) sclk = get_pll_clk(MPLL); else if (sel == 0x7) sclk = get_pll_clk(EPLL); @@ -314,7 +316,9 @@ static unsigned long exynos4_get_uart_clk(int dev_index) sel = readl(clk-src_peril0); sel = (sel (dev_index 2)) 0xf; - if (sel == 0x6) + if (sel == 0x0 || sel == 0x1) + sclk = CONFIG_SYS_CLK_FREQ; + else if (sel == 0x6) sclk = get_pll_clk(MPLL); else if (sel == 0x7) sclk = get_pll_clk(EPLL); @@ -361,7 +365,9 @@ static unsigned long exynos5_get_uart_clk(int dev_index) sel = readl(clk-src_peric0); sel = (sel (dev_index 2)) 0xf; - if (sel == 0x6) + if (sel == 0x0 || sel == 0x1) + sclk = CONFIG_SYS_CLK_FREQ; + else if (sel == 0x6) sclk = get_pll_clk(MPLL); else if (sel == 0x7) sclk = get_pll_clk(EPLL); @@ -462,7 +468,9 @@ static unsigned long exynos4_get_lcd_clk(void) * 0x7: SCLK_EPLL * 0x8: SCLK_VPLL */ - if (sel == 0x6) + if (sel == 0x0 || sel == 0x1) + sclk = CONFIG_SYS_CLK_FREQ; + else if (sel == 0x6) sclk = get_pll_clk(MPLL); else if (sel == 0x7) sclk = get_pll_clk(EPLL); -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/4] EXYNOS: additional Exynos4 SoC series support
From: Jeong-Hyeon Kim jh...@insignal.co.kr
- Fixed MPLL register address
It's different between Exynos4210 and Exynos4412.
- Added pinmux functions for Exynos4
- Added extended gpios for Exynos4412
Exynos4412 has more gpios than Exynos4210.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
arch/arm/cpu/armv7/exynos/clock.c| 11 ++
arch/arm/cpu/armv7/exynos/pinmux.c | 241 ++
arch/arm/include/asm/arch-exynos/clock.h | 27
arch/arm/include/asm/arch-exynos/cpu.h |4 +
arch/arm/include/asm/arch-exynos/gpio.h | 21 +++-
5 files changed, 303 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 680aeeb..84a6725 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -79,14 +79,25 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
/* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
fout = (m + k / 65536) * (freq / (p * (1 s)));
} else if (pllreg == VPLL) {
+#ifdef CONFIG_EXYNOS4210
k = k 0xfff;
/* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
fout = (m + k / 1024) * (freq / (p * (1 s)));
+#else
+ k = k 0x;
+ /* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
+ fout = (m + k / 65536) * (freq / (p * (1 s)));
+#endif
} else {
+#ifdef CONFIG_EXYNOS4210
if (s 1)
s = 1;
/* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
fout = m * (freq / (p * (1 (s - 1;
+#else
+ /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
+ fout = m * (freq / (p * (1 s)));
+#endif
}
return fout;
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add..0746878 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -26,6 +26,245 @@
#include asm/arch/pinmux.h
#include asm/arch/sromc.h
+static void exynos4_uart_config(int peripheral)
+{
+ struct exynos4_gpio_part1 *gpio1 =
+ (struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
+ struct s5p_gpio_bank *bank;
+ int i, start, count;
+
+ switch (peripheral) {
+ case PERIPH_ID_UART0:
+ bank = gpio1-a0;
+ start = 0;
+ count = 4;
+ break;
+ case PERIPH_ID_UART1:
+ bank = gpio1-a0;
+ start = 4;
+ count = 4;
+ break;
+ case PERIPH_ID_UART2:
+ bank = gpio1-a1;
+ start = 0;
+ count = 4;
+ break;
+ case PERIPH_ID_UART3:
+ bank = gpio1-a1;
+ start = 4;
+ count = 2;
+ break;
+ }
+ for (i = start; i start + count; i++) {
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ }
+}
+
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *) samsung_get_base_gpio_part2();
+ struct s5p_gpio_bank *bank, *bank_ext;
+ int i, start = 0, gpio_func = 0;
+
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ bank = gpio2-k0;
+ bank_ext = gpio2-k1;
+ start = 3;
+ gpio_func = GPIO_FUNC(0x2);
+ break;
+ case PERIPH_ID_SDMMC1:
+ bank = gpio2-k1;
+ bank_ext = NULL;
+ break;
+ case PERIPH_ID_SDMMC2:
+ bank = gpio2-k2;
+ bank_ext = gpio2-k3;
+ start = 3;
+ gpio_func = GPIO_FUNC(0x3);
+ break;
+ case PERIPH_ID_SDMMC3:
+ bank = gpio2-k3;
+ bank_ext = NULL;
+ break;
+ }
+ if ((flags PINMUX_FLAG_8BIT_MODE) !bank_ext) {
+ debug(SDMMC device %d does not support 8bit mode,
+ peripheral);
+ return -1;
+ }
+ if (flags PINMUX_FLAG_8BIT_MODE) {
+ for (i = start; i = (start + 3); i++) {
+ s5p_gpio_cfg_pin(bank_ext, i, gpio_func);
+ s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
+ s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ }
+ }
+ for (i = 0; i 2; i++) {
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ }
+ for (i = 3; i = 6; i++) {
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_UP);
+
[U-Boot] [PATCH 4/4] EXYNOS: Add support for Insignal Origen QUAD board
From: Jeong-Hyeon Kim jh...@insignal.co.kr
Origen QUAD board is based on Samsung Exynos4412 SoC.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
board/insignal/origen_quad/Makefile| 63 ++
board/insignal/origen_quad/boot.c | 63 ++
board/insignal/origen_quad/clock.c | 103 ++
board/insignal/origen_quad/dmc.c | 174
board/insignal/origen_quad/lowlevel_init.S | 158 +++
board/insignal/origen_quad/origen_quad.c | 154 ++
board/insignal/origen_quad/pmic.c | 47 +
board/insignal/origen_quad/setup.h | 298
boards.cfg |1 +
include/configs/origen_quad.h | 183 +
tools/Makefile |2 +
11 files changed, 1246 insertions(+), 0 deletions(-)
create mode 100644 board/insignal/origen_quad/Makefile
create mode 100644 board/insignal/origen_quad/boot.c
create mode 100644 board/insignal/origen_quad/clock.c
create mode 100644 board/insignal/origen_quad/dmc.c
create mode 100644 board/insignal/origen_quad/lowlevel_init.S
create mode 100644 board/insignal/origen_quad/origen_quad.c
create mode 100644 board/insignal/origen_quad/pmic.c
create mode 100644 board/insignal/origen_quad/setup.h
create mode 100644 include/configs/origen_quad.h
diff --git a/board/insignal/origen_quad/Makefile
b/board/insignal/origen_quad/Makefile
new file mode 100644
index 000..04f609a
--- /dev/null
+++ b/board/insignal/origen_quad/Makefile
@@ -0,0 +1,63 @@
+#
+# Copyright (C) 2012 Samsung Electronics
+#
+# Copyright (C) 2012 Insignal
+#
+# Makefile for the Insignal OrigenQUAD board (Exynos4x12)
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+SOBJS := lowlevel_init.o
+
+COBJS := clock.o
+COBJS += dmc.o
+
+ifdef CONFIG_PMIC
+COBJS += pmic.o
+endif
+
+ifndef CONFIG_SPL_BUILD
+COBJS += origen_quad.o
+else
+COBJS += boot.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/insignal/origen_quad/boot.c
b/board/insignal/origen_quad/boot.c
new file mode 100644
index 000..10f2289
--- /dev/null
+++ b/board/insignal/origen_quad/boot.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * Copyright (C) 2012 Insignal
+ *
+ * Board initialize for the Insignal OrigenQUAD board (Exynos4x12)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include config.h
+#include setup.h
+
+#define IRAM_ADDRESS 0x0202
+#define EXTERNAL_FUNC_ADDRESS (IRAM_ADDRESS + 0x0030)
+#defineIROM_READ_SDMMC EXTERNAL_FUNC_ADDRESS
+
+void inline irom_read_sdmmc(u32 start, u32 count, u32 addr)
+{
+ void (*read_sdmmc)(u32, u32, u32) = (void *) *(u32 *)IROM_READ_SDMMC;
+ read_sdmmc(start, count, addr);
+}
+
+void board_init_f(unsigned long bootflag)
+{
+ __attribute__((noreturn)) void (*uboot)(void);
+
+
[U-Boot] [PATCH] MAKEALL: update to work with new boards.cfg syntax
Update MAKEALL to handle the optional SPL CPU field that was added to
boards.cfg. This impacts the cases in MAKEALL that have to match
against CPU type (field 3). In these cases use ':' as a field
separator to split the u-boot CPU from the SPL CPU.
Signed-off-by: Allen Martin amar...@nvidia.com
---
MAKEALL |9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/MAKEALL b/MAKEALL
index 6b9ff30..eb7dd02 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -87,9 +87,9 @@ while true ; do
-c|--cpu)
# echo Option CPU: argument \`$2'
if [ $opt_c ] ; then
- opt_c=${opt_c%)} || \$3 == \$2\)
+ opt_c=${opt_c%)} || \$3 == \$2\ || \$3 ~ /$2:/)
else
- opt_c=(\$3 == \$2\)
+ opt_c=(\$3 == \$2\ || \$3 ~ /$2:/)
fi
SELECTED='y'
shift 2 ;;
@@ -211,14 +211,17 @@ RC=0
# Helper funcs for parsing boards.cfg
boards_by_field()
{
+ FS=[ \t]+
+ [ -n $3 ] FS=$3
awk \
-v field=$1 \
-v select=$2 \
+ -F $FS \
'($1 !~ /^#/ $field == select) { print $1 }' \
boards.cfg
}
boards_by_arch() { boards_by_field 2 $@ ; }
-boards_by_cpu() { boards_by_field 3 $@ ; }
+boards_by_cpu() { boards_by_field 3 $@ [: \t]+ ; }
boards_by_soc() { boards_by_field 6 $@ ; }
#
--
1.7.9.5
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Re: [U-Boot] [PATCH V3 0/4] common/lcd cleanup
Gentle ping. -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Nikita Kiryanov Sent: Monday, August 20, 2012 9:16 AM To: Nikita Kiryanov Cc: u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH V3 0/4] common/lcd cleanup Gentle ping. On 08/09/2012 01:14 PM, Nikita Kiryanov wrote: This patch series attempts to simplify #ifdef complexity in common/lcd.c. It was compile tested on Arm and PowerPC using MAKEALL Changes in V3: - Rebased on latest u-boot-video - Removed volatile qualifiers in patch 3 since the use of volatile is discouraged and it looks like it is safe to remove them. Changes in V2: - Rebased on u-boot-video - patches 2 and 3 of original patchset dropped because I'm not sure what to do about them - simplify lcd_logo: used bitmap_display() to further simplify code - simplify lcd_display_bitmap: fixed pointer increment error - simplify lcd_display_bitmap: change to simplify lcd_logo breaks MCC200 board because it does not #define CONFIG_CMD_BMP. Added a local implementation of bitmap_display(). Nikita Kiryanov (4): common lcd: simplify lcd_logo common lcd: simplify lcd_display common lcd: simplify core functions common lcd: simplify lcd_display_bitmap board/mcc200/lcd.c | 20 +++ common/lcd.c | 145 +++- 2 files changed, 96 insertions(+), 69 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mx28evk: Convert to mxs_adjust_memory_params()
Recent conversion from mx28_adjust_memory_params to mxs_adjust_memory_params
missed to update mx28evk, which caused the board not to boot.
Apply the conversion so that the board can boot again.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx28evk/iomux.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index 16a6d8a..ae6eda3 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -173,7 +173,7 @@ const iomux_cfg_t iomux_setup[] = {
#define HW_DRAM_CTL29_CONFIG (CS_MAP 24 | COLUMN_SIZE 16 | \
ADDR_PINS 8 | APREBIT)
-void mx28_adjust_memory_params(uint32_t *dram_vals)
+void mxs_adjust_memory_params(uint32_t *dram_vals)
{
dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG;
}
--
1.7.9.5
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Re: [U-Boot] [PATCH] mx28evk: Convert to mxs_adjust_memory_params()
Dear Fabio Estevam,
Recent conversion from mx28_adjust_memory_params to
mxs_adjust_memory_params missed to update mx28evk, which caused the board
not to boot.
Oh of course ... that's an obvious flub. I'm very unhappy about the conversion
causing such trouble! Please be more careful next time.
Apply the conversion so that the board can boot again.
Yes,
Acked-by: Marek Vasut ma...@denx.de
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx28evk/iomux.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx28evk/iomux.c
b/board/freescale/mx28evk/iomux.c index 16a6d8a..ae6eda3 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -173,7 +173,7 @@ const iomux_cfg_t iomux_setup[] = {
#define HW_DRAM_CTL29_CONFIG (CS_MAP 24 | COLUMN_SIZE 16 | \
ADDR_PINS 8 | APREBIT)
-void mx28_adjust_memory_params(uint32_t *dram_vals)
+void mxs_adjust_memory_params(uint32_t *dram_vals)
{
dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG;
}
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] mx28evk: Convert to mxs_adjust_memory_params()
Dear Marek Vasut,
Dear Fabio Estevam,
Recent conversion from mx28_adjust_memory_params to
mxs_adjust_memory_params missed to update mx28evk, which caused the board
not to boot.
Oh of course ... that's an obvious flub. I'm very unhappy about the
conversion causing such trouble! Please be more careful next time.
btw. Otavio, tell me if this tortured you enough ... gotta train this, I'm not
good at it yet, but fear, soon I'll improve ;-)
Apply the conversion so that the board can boot again.
Yes,
Acked-by: Marek Vasut ma...@denx.de
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx28evk/iomux.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx28evk/iomux.c
b/board/freescale/mx28evk/iomux.c index 16a6d8a..ae6eda3 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -173,7 +173,7 @@ const iomux_cfg_t iomux_setup[] = {
#define HW_DRAM_CTL29_CONFIG (CS_MAP 24 | COLUMN_SIZE 16 | \
ADDR_PINS 8 | APREBIT)
-void mx28_adjust_memory_params(uint32_t *dram_vals)
+void mxs_adjust_memory_params(uint32_t *dram_vals)
{
dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG;
}
Best regards,
Marek Vasut
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/2] FEC: Do not pass unaligned buffer to network stack
On Sun, Aug 26, 2012 at 5:19 PM, Marek Vasut ma...@denx.de wrote: Do not pass unaligned RX buffer to the upper layers. The upper layer, especially in the ARP case, recycles the buffer and passes it back into the FEC, into it's TX path. With caches enabled, the FEC hangs on this from time to time. Nice fix, thanks. TFTP does not hang now after applying this series of patches. On a mx28evk: Tested-by: Fabio Estevam fabio.este...@freescale.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 7/9] video: drop duplicate set of DISPC_CONFIG register
On 08/28/2012 02:21 PM, Stefano Babic wrote: Signed-off-by Stefano Babic sba...@denx.de --- arch/arm/include/asm/arch-omap3/dss.h |1 - drivers/video/omap3_dss.c |3 +-- 2 files changed, 1 insertion(+), 3 deletions(-) Acked-by: Jeroen Hofstee jer...@myspectrum.nl Regards, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] MX28: mx28evk: Align SSP clock speed
On Tue, Aug 28, 2012 at 7:18 AM, Marek Vasut marek.va...@gmail.com wrote: Dear Otavio Salvador, Align the SSP clock speed with oscilator to achieve higher transfer stability. This change is still pointless, unless you have user for this! As far as I know the SPI flash uses SSP2; so it is a user of it. Signed-off-by: Otavio Salvador ota...@ossystems.com.br --- Changes in v2: - reword commit log to match the change description done on m28evk. board/freescale/mx28evk/mx28evk.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c index 867d3c8..d782aea 100644 --- a/board/freescale/mx28evk/mx28evk.c +++ b/board/freescale/mx28evk/mx28evk.c @@ -49,8 +49,8 @@ int board_early_init_f(void) /* SSP0 clock at 96MHz */ mx28_set_sspclk(MXC_SSPCLK0, 96000, 0); - /* SSP2 clock at 96MHz */ - mx28_set_sspclk(MXC_SSPCLK2, 96000, 0); + /* SSP2 clock at 160MHz */ + mx28_set_sspclk(MXC_SSPCLK2, 16, 0); #ifdef CONFIG_CMD_USB mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT); Best regards, Marek Vasut -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx28evk: Convert to mxs_adjust_memory_params()
On Tue, Aug 28, 2012 at 4:36 PM, Marek Vasut ma...@denx.de wrote:
Dear Fabio Estevam,
Recent conversion from mx28_adjust_memory_params to
mxs_adjust_memory_params missed to update mx28evk, which caused the board
not to boot.
Oh of course ... that's an obvious flub. I'm very unhappy about the conversion
causing such trouble! Please be more careful next time.
This was my fault; but good that Fabio has spot it fast.
Apply the conversion so that the board can boot again.
Yes,
Acked-by: Marek Vasut ma...@denx.de
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx28evk/iomux.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx28evk/iomux.c
b/board/freescale/mx28evk/iomux.c index 16a6d8a..ae6eda3 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -173,7 +173,7 @@ const iomux_cfg_t iomux_setup[] = {
#define HW_DRAM_CTL29_CONFIG (CS_MAP 24 | COLUMN_SIZE 16 | \
ADDR_PINS 8 | APREBIT)
-void mx28_adjust_memory_params(uint32_t *dram_vals)
+void mxs_adjust_memory_params(uint32_t *dram_vals)
{
dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG;
}
Best regards,
Marek Vasut
--
Otavio Salvador O.S. Systems
E-mail: ota...@ossystems.com.br http://www.ossystems.com.br
Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br
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Re: [U-Boot] [PATCH v2 8/9] OMAP3: video: add macros to set display parameters
On 08/28/2012 02:21 PM, Stefano Babic wrote:
Add a common macros to set the registers for horizontal
and vertical timing.
Signed-off-by: Stefano Babic sba...@denx.de
---
arch/arm/include/asm/arch-omap3/dss.h |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index 8913a71..df5b978 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -181,6 +181,10 @@ struct panel_config {
void *frame_buffer;
};
+#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) 20) | \
+((fp - 1) 8) | (sw - 1))
+#define PANEL_TIMING_V(bp, fp, sw) ((bp 20) | (fp 8) | (sw - 1))
+
/* Generic DSS Functions */
void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
u32 height, u32 width);
To make it a bit more clear what is set, perhaps we can define
the fields themselves, this would save some /* hfp */ etc.
e.g.
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index a830c43..b6ad72d 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -182,6 +182,13 @@ struct panel_config {
void *frame_buffer;
};
+#define DSS_HPB(bp)(((bp) - 1) 20)
+#define DSS_HFB(fp)(((fp) - 1) 8)
+#define DSS_HSW(sw)((sw) - 1)
+#define DSS_VPB(bp)((bp) 20)
+#define DSS_VFB(fp)((fp) 8)
+#define DSS_VSW(sw)((sw) - 1)
+
/* Generic DSS Functions */
void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
u32 height, u32 width);
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Re: [U-Boot] [PATCH v2 8/9] OMAP3: video: add macros to set display parameters
On 08/28/2012 03:22 PM, Jeroen Hofstee wrote:
On 08/28/2012 02:21 PM, Stefano Babic wrote:
Add a common macros to set the registers for horizontal
and vertical timing.
Signed-off-by: Stefano Babic sba...@denx.de
---
arch/arm/include/asm/arch-omap3/dss.h |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index 8913a71..df5b978 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -181,6 +181,10 @@ struct panel_config {
void *frame_buffer;
};
+#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) 20) | \
+ ((fp - 1) 8) | (sw - 1))
+#define PANEL_TIMING_V(bp, fp, sw) ((bp 20) | (fp 8) | (sw - 1))
+
/* Generic DSS Functions */
void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
u32 height, u32 width);
To make it a bit more clear what is set, perhaps we can define
the fields themselves, this would save some /* hfp */ etc.
e.g.
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index a830c43..b6ad72d 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -182,6 +182,13 @@ struct panel_config {
void *frame_buffer;
};
+#define DSS_HPB(bp)(((bp) - 1) 20)
+#define DSS_HFB(fp)(((fp) - 1) 8)
+#define DSS_HSW(sw)((sw) - 1)
+#define DSS_VPB(bp)((bp) 20)
+#define DSS_VFB(fp)((fp) 8)
+#define DSS_VSW(sw)((sw) - 1)
+
/* Generic DSS Functions */
void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
u32 height, u32 width);
Looks helpful to me, please make it so, thanks!
--
Tom
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[U-Boot] [PATCH v10 07/16] MAKEALL: update to work with new boards.cfg syntax
Update MAKEALL to handle the optional SPL CPU field that was added to
boards.cfg. This impacts the cases in MAKEALL that have to match
against CPU type (field 3). In these cases use ':' as a field
separator to split the u-boot CPU from the SPL CPU.
Signed-off-by: Allen Martin amar...@nvidia.com
---
MAKEALL |9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/MAKEALL b/MAKEALL
index 2e8b997..8869490 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -87,9 +87,9 @@ while true ; do
-c|--cpu)
# echo Option CPU: argument \`$2'
if [ $opt_c ] ; then
- opt_c=${opt_c%)} || \$3 == \$2\)
+ opt_c=${opt_c%)} || \$3 == \$2\ || \$3 ~ /$2:/)
else
- opt_c=(\$3 == \$2\)
+ opt_c=(\$3 == \$2\ || \$3 ~ /$2:/)
fi
SELECTED='y'
shift 2 ;;
@@ -211,14 +211,17 @@ RC=0
# Helper funcs for parsing boards.cfg
boards_by_field()
{
+ FS=[ \t]+
+ [ -n $3 ] FS=$3
awk \
-v field=$1 \
-v select=$2 \
+ -F $FS \
'($1 !~ /^#/ $field == select) { print $1 }' \
boards.cfg
}
boards_by_arch() { boards_by_field 2 $@ ; }
-boards_by_cpu() { boards_by_field 3 $@ ; }
+boards_by_cpu() { boards_by_field 3 $@ [: \t]+ ; }
boards_by_soc() { boards_by_field 6 $@ ; }
#
--
1.7.9.5
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[U-Boot] [PATCH v10 03/16] tegra20: rename CONFIG_MACH_TEGRA_GENERIC
Rename CONFIG_MACH_TEGRA_GENERIC to the less confusing CONFIG_TEGRA. The meaning of the config options is now: CONFIG_TEGRA - Any tegra chip CONFIG_TEGRA20 - A tegra20 family chip CONFIG_TEGRA30 - A tegra30 family chip (not added yet) Signed-off-by: Allen Martin amar...@nvidia.com Acked-by: Stephen Warren swar...@wwwdotorg.org Tested-by: Thierry Reding thierry.red...@avionic-design.de Signed-off-by: Tom Warren twar...@nvidia.com --- include/configs/tegra20-common.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 91cf28c..769728b 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -38,7 +38,7 @@ */ #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ #define CONFIG_TEGRA20 /* in a NVidia Tegra20 core */ -#define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */ +#define CONFIG_TEGRA /* which is a Tegra generic machine */ #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ #define CONFIG_SYS_CACHELINE_SIZE 32 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 06/16] mkconfig: remove bashisms and cleanup config.mk generation
This adds some cleanup to mkconfig related to SPL support. Bash
specific script has been replaced with awk for better shell
compatibility. config.mk generation is done through a subshell and
single redirect to improve readability.
Signed-off-by: Allen Martin amar...@nvidia.com
Signed-off-by: Tom Warren twar...@nvidia.com
---
mkconfig | 38 +-
1 file changed, 17 insertions(+), 21 deletions(-)
diff --git a/mkconfig b/mkconfig
index 9e1a7e6..d3363c6 100755
--- a/mkconfig
+++ b/mkconfig
@@ -59,12 +59,8 @@ CONFIG_NAME=${1%_config}
[ ${BOARD_NAME} ] || BOARD_NAME=${1%_config}
arch=$2
-cpu=$3
-tmp=${cpu#*:}
-if [ $tmp != $cpu ] ; then
- spl_cpu=$tmp
- cpu=${cpu%:*}
-fi
+cpu=`echo $3 | awk 'BEGIN {FS = :} ; {print $1}'`
+spl_cpu=`echo $3 | awk 'BEGIN {FS = :} ; {print $2}'`
if [ $4 = - ] ; then
board=${BOARD_NAME}
else
@@ -135,21 +131,21 @@ fi
#
# Create include file for Make
#
-echo ARCH = ${arch}config.mk
-if [ ! -z $spl_cpu ] ; then
- echo 'ifeq ($(CONFIG_SPL_BUILD),y)' config.mk
- echo CPU= ${spl_cpu} config.mk
- echo else config.mk
- echo CPU= ${cpu}config.mk
- echo endif config.mk
-else
- echo CPU= ${cpu}config.mk
-fi
-echo BOARD = ${board} config.mk
-
-[ ${vendor} ] echo VENDOR = ${vendor} config.mk
-
-[ ${soc}] echo SOC= ${soc} config.mk
+( echo ARCH = ${arch}
+if [ ! -z $spl_cpu ] ; then
+ echo 'ifeq ($(CONFIG_SPL_BUILD),y)'
+ echo CPU= ${spl_cpu}
+ echo else
+ echo CPU= ${cpu}
+ echo endif
+else
+ echo CPU= ${cpu}
+fi
+echo BOARD = ${board}
+
+[ ${vendor} ] echo VENDOR = ${vendor}
+[ ${soc}] echo SOC= ${soc}
+exit 0 ) config.mk
# Assign board directory to BOARDIR variable
if [ -z ${vendor} ] ; then
--
1.7.9.5
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[U-Boot] [PATCH v10 11/16] tegra20: add u-boot-*-tegra.bin targets
Add target for tegra20 u-boot image. This is a concatenation of tegra
spl and normal u-boot binaries. For non-devicetree builds this is
named u-boot-nodtb-tegra.bin for devicetree builds is named
u-boot-dtb-tegra.bin.
Signed-off-by: Allen Martin amar...@nvidia.com
Acked-by: Stephen Warren swar...@wwwdotorg.org
Tested-by: Thierry Reding thierry.red...@avionic-design.de
Signed-off-by: Tom Warren twar...@nvidia.com
---
Makefile | 14 ++
1 file changed, 14 insertions(+)
diff --git a/Makefile b/Makefile
index 08d58cf..001df10 100644
--- a/Makefile
+++ b/Makefile
@@ -475,6 +475,20 @@ $(obj)u-boot.spr: $(obj)u-boot.img
$(obj)spl/u-boot-spl.bin
conv=notrunc 2/dev/null
cat $(obj)spl/u-boot-spl-pad.img $(obj)u-boot.img $@
+ifeq ($(SOC),tegra20)
+ifeq ($(CONFIG_OF_SEPARATE),y)
+$(obj)u-boot-dtb-tegra.bin:$(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(obj)u-boot.dtb
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_TEXT_BASE) -O
binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
+ cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin
$(obj)u-boot.dtb $@
+ rm $(obj)spl/u-boot-spl-pad.bin
+else
+$(obj)u-boot-nodtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_TEXT_BASE) -O
binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
+ cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin $@
+ rm $(obj)spl/u-boot-spl-pad.bin
+endif
+endif
+
ifeq ($(CONFIG_SANDBOX),y)
GEN_UBOOT = \
cd $(LNDIR) $(CC) $(SYMS) -T $(obj)u-boot.lds \
--
1.7.9.5
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[U-Boot] [PATCH v10 09/16] tegra20: remove timer_init from SPL build
Don't use timer_init from tegra board.c. This comes out of arm720t
for the SPL build.
Signed-off-by: Allen Martin amar...@nvidia.com
Acked-by: Stephen Warren swar...@wwwdotorg.org
Tested-by: Thierry Reding thierry.red...@avionic-design.de
Signed-off-by: Tom Warren twar...@nvidia.com
---
board/nvidia/common/board.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index d1a7f3a..6753f95 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -49,6 +49,7 @@ const struct tegra20_sysinfo sysinfo = {
CONFIG_TEGRA20_BOARD_STRING
};
+#ifndef CONFIG_SPL_BUILD
/*
* Routine: timer_init
* Description: init the timestamp and lastinc value
@@ -57,6 +58,7 @@ int timer_init(void)
{
return 0;
}
+#endif
void __pin_mux_usb(void)
{
--
1.7.9.5
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[U-Boot] [PATCH v10 04/16] tegra20: tec: add tegra20-common-post.h
Add tegra20-common-post.h to be consistent with other tegra20 boards. Signed-off-by: Allen Martin amar...@nvidia.com Acked-by: Thierry Reding thierry.red...@avionic-design.de Acked-by: Stephen Warren swar...@wwwdotorg.org Tested-by: Thierry Reding thierry.red...@avionic-design.de Signed-off-by: Tom Warren twar...@nvidia.com --- include/configs/tec.h |2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/tec.h b/include/configs/tec.h index 39400d9..9b3f88d 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -79,4 +79,6 @@ ext2load mmc 0 0x1700 /boot/uImage; \ bootm +#include tegra20-common-post.h + #endif /* __CONFIG_H */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 02/16] tegra20: move tegra20 SoC code to arch/arm/cpu/tegra20-common
In preparation for splitting out the armv4t code from tegra20, move
the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will
be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.
Signed-off-by: Allen Martin amar...@nvidia.com
Acked-by: Stephen Warren swar...@wwwdotorg.org
Tested-by: Thierry Reding thierry.red...@avionic-design.de
Signed-off-by: Tom Warren twar...@nvidia.com
---
Makefile |3 ++
arch/arm/cpu/armv7/tegra20/Makefile| 15 ++
.../cpu/{armv7/tegra20 = tegra20-common}/Makefile | 31 +---
.../cpu/{armv7/tegra20 = tegra20-common}/ap20.c |0
.../cpu/{armv7/tegra20 = tegra20-common}/board.c |0
.../cpu/{armv7/tegra20 = tegra20-common}/clock.c |0
.../cpu/{armv7/tegra20 = tegra20-common}/crypto.c |0
.../cpu/{armv7/tegra20 = tegra20-common}/crypto.h |0
.../cpu/{armv7/tegra20 = tegra20-common}/emc.c|0
.../{armv7/tegra20 = tegra20-common}/funcmux.c|0
.../tegra20 = tegra20-common}/lowlevel_init.S |0
.../cpu/{armv7/tegra20 = tegra20-common}/pinmux.c |0
.../cpu/{armv7/tegra20 = tegra20-common}/pmu.c|0
.../{armv7/tegra20 = tegra20-common}/sys_info.c |0
.../cpu/{armv7/tegra20 = tegra20-common}/timer.c |0
.../{armv7/tegra20 = tegra20-common}/warmboot.c |0
.../tegra20 = tegra20-common}/warmboot_avp.c |0
.../tegra20 = tegra20-common}/warmboot_avp.h |0
spl/Makefile |4 +++
19 files changed, 23 insertions(+), 30 deletions(-)
copy arch/arm/cpu/{armv7/tegra20 = tegra20-common}/Makefile (66%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/ap20.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/board.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/clock.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/crypto.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/crypto.h (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/emc.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/funcmux.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/lowlevel_init.S (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/pinmux.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/pmu.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/sys_info.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/timer.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/warmboot.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/warmboot_avp.c (100%)
rename arch/arm/cpu/{armv7/tegra20 = tegra20-common}/warmboot_avp.h (100%)
diff --git a/Makefile b/Makefile
index f6471e2..08d58cf 100644
--- a/Makefile
+++ b/Makefile
@@ -322,6 +322,9 @@ endif
ifeq ($(SOC),exynos)
LIBS += $(CPUDIR)/s5p-common/libs5p-common.o
endif
+ifeq ($(SOC),tegra20)
+LIBS += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o
+endif
LIBS := $(addprefix $(obj),$(sort $(LIBS)))
.PHONY : $(LIBS)
diff --git a/arch/arm/cpu/armv7/tegra20/Makefile
b/arch/arm/cpu/armv7/tegra20/Makefile
index da62646..5f4035d 100644
--- a/arch/arm/cpu/armv7/tegra20/Makefile
+++ b/arch/arm/cpu/armv7/tegra20/Makefile
@@ -23,27 +23,16 @@
# MA 02111-1307 USA
#
-# The AVP is ARMv4T architecture so we must use special compiler
-# flags for any startup files it might use.
-CFLAGS_arch/arm/cpu/armv7/tegra20/ap20.o += -march=armv4t
-CFLAGS_arch/arm/cpu/armv7/tegra20/clock.o += -march=armv4t
-CFLAGS_arch/arm/cpu/armv7/tegra20/warmboot_avp.o += -march=armv4t
-
include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-SOBJS := lowlevel_init.o
-COBJS-y:= ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o
-COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
-COBJS-$(CONFIG_TEGRA_PMU) += pmu.o
COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o
-COBJS-$(CONFIG_TEGRA20_LP0) += crypto.o warmboot.o warmboot_avp.o
COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o
COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
all:$(obj).depend $(LIB)
diff --git a/arch/arm/cpu/armv7/tegra20/Makefile
b/arch/arm/cpu/tegra20-common/Makefile
similarity index 66%
copy from arch/arm/cpu/armv7/tegra20/Makefile
copy to arch/arm/cpu/tegra20-common/Makefile
index da62646..60be2a6 100644
--- a/arch/arm/cpu/armv7/tegra20/Makefile
+++ b/arch/arm/cpu/tegra20-common/Makefile
@@ -1,7 +1,7 @@
#
# (C) Copyright 2010,2011 Nvidia Corporation.
#
-# (C) Copyright 2000-2003
+# (C) Copyright 2000-2008
# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -14,7 +14,7 @@
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS
[U-Boot] [PATCH v10 00/16] split tegra20 arm7 code into separate SPL
This patch series fixes a long standing problem with the tegra20 u-boot build. Tegra20 contains an ARM7TDMI boot processor and a Cortex A9 main processor. Prior to this patch series this was accomplished by #ifdefing out any armv7 code from the early boot sequence and creating a single binary that runs on both both the ARM7TDMI and A9. This was very fragile as changes to compiler options or any additions or rearranging of the early boot code could add additional armv7 specific code causing it to fail on the ARM7TDMI. This patch series pulls all the armv4t code out into a separate SPL that does nothing more than initialize the A9 and transfer control to it. The resultint SPL and armv7 u-boot are concatenated together into a single image. This patch series is also available from: git://github.com/arm000/u-boot.git branch: tegra-spl-v10 Changes: v10: - added fix to MAKEALL script so that it correctly parses new boards.cfg syntax v9: - rebased mkconfig patch on top of version that went upstream to u-boot/master - fixed a whitespace checkpatch warning in arch/arm/cpu/arm720t/cpu.c v8: - rebased to u-boot-tegra/master - added changes to work with arm: Provide lowlevel_init C function wrapper for v7 - Moved JTAG init in SPL to earlier - fixed TEXT_BASE in SPL to use SPL TEXT_BASE not main u-boot TEXT_BASE - pad exception handlers in arm720t to 64 bytes with 0x12345678 to match armv7 - added another tegra2-tegra20 rename for some new code that was added to arch/arm/cpu/armv7/start.S - rolled in the mkconfig fix that was breaking ARM platforms that don't define SoC v7: - rebased to u-boot-tegra/next - added Acks and Tested-Bys v6: - changed combined SPL/u-boot target names to u-boot-dtb-tegra.bin and u-boot-nodtb-tegra.bin - fixed regression introduced in v5 that caused git bisect to fail to build at one of the patches - fix USE_PRIVATE_LIBGCC for SPL build and enable it - fix libtegra20-common.so link so it works if building with out of tree OBJDIR v5: - added missing mkdir rules in all tegra20 board Makefiles that include common code and changed them to be unconditional - make new u-boot-dtb-t2.bin rule default for tegra20 and copy resulting binary over u-boot.bin v4: - rebased to u-boot-tegra/next - reordered entire patch series to preserve git bisect, verified build and boot at each patch - merged patches that add SPL config defines and removes duplicate code from u-boot init, these have to go in atomically to preserve building at each patch - fixed compiler warnings introduced - fixed blank line at end of file on cpu.c - renamed u-boot.t2 to u-boot-t2.bin - cleaned up config.mk generation in mkconfig to make it more readable - added some text to clarify using arm720t code for arm7tdmi - rearranged SPL memory map to make resulting SPL + u-boot image much smaller - removed separate PAD_TO define in favor of just using CONFIG_SYS_TEXT_BASE - moved warmboot_save_sdram_params() from dram_init() to board_init() v3: - git bisect still does not work across this series, I'm saving that for the next revision, but I had enough changes that I wanted to get this out for review - expanded the tegra2 - tegra20 rename to include functions/variables/ defines - rebased to u-boot-tegra/next - removed some extra -march=armv4t flags, kept armv4t flags on warmboot_avp since it's special - removed bashisms from mkconfig - renamed CONFIG_MACH_TEGRA_GENERIC to CONFIG_TEGRA - moved SPL overrides to tegra2-common-post.h - changed SPL base address to 0x108000, u-boot goes to 0x208000 - moved warboot_save_sdram_params fix to separate patch - remove USE_PRIVATE_LIBGCC from non SPL build - expanded SPL support to all tegra20 boards, not just seaboard v2: - renamed tegra2 to tegra20 to match kernel and devicetree naming policy - pulled all SPL related config overrides to a separate file to clean up ifdefs from seabard.h - rebased to TOT u-boot/master and fixed a bug related to init sequence changes between this patch series and new EMC code - made u-boot.t2 target work even if CONFIG_OF is disabled - added back USE_PRIVATE_LIBGCC Allen Martin (16): tegra20: rename tegra2 - tegra20 tegra20: move tegra20 SoC code to arch/arm/cpu/tegra20-common tegra20: rename CONFIG_MACH_TEGRA_GENERIC tegra20: tec: add tegra20-common-post.h tegra20: make board mkdir commands unconditional mkconfig: remove bashisms and cleanup config.mk generation MAKEALL: update to work with new boards.cfg syntax ARM: Fix arm720t SPL build tegra20: remove timer_init from SPL build ARM: add tegra20 support to arm720t tegra20: add u-boot-*-tegra.bin targets tegra20: move SDRAM param save to later in boot tegra20: enable SPL for tegra20 boards arm: enable libgcc build for SPL spl: fix SPL build of private libgcc tegra20: Remove armv4t build flags MAINTAINERS| 18 +-- MAKEALL|9
[U-Boot] [PATCH v10 14/16] arm: enable libgcc build for SPL
Enable the building of private libgcc for SPL Signed-off-by: Allen Martin amar...@nvidia.com Acked-by: Stephen Warren swar...@wwwdotorg.org Tested-by: Thierry Reding thierry.red...@avionic-design.de Signed-off-by: Tom Warren twar...@nvidia.com --- arch/arm/lib/Makefile |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 39a9550..bd3b77f 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk LIB= $(obj)lib$(ARCH).o LIBGCC = $(obj)libgcc.o -ifndef CONFIG_SPL_BUILD GLSOBJS+= _ashldi3.o GLSOBJS+= _ashrdi3.o GLSOBJS+= _divsi3.o @@ -37,6 +36,7 @@ GLSOBJS += _umodsi3.o GLCOBJS+= div0.o +ifndef CONFIG_SPL_BUILD COBJS-y+= board.o COBJS-y+= bootm.o COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 05/16] tegra20: make board mkdir commands unconditional
Change the mkdir commands for the object directories to be unconditional. This fixes an issue when building for SPL where SRCTREE and OBJTREE are the same, but $(obj) is under SPLTREE. Signed-off-by: Allen Martin amar...@nvidia.com Acked-by: Stephen Warren swar...@wwwdotorg.org Tested-by: Thierry Reding thierry.red...@avionic-design.de Signed-off-by: Tom Warren twar...@nvidia.com --- board/avionic-design/medcom/Makefile |2 -- board/avionic-design/plutux/Makefile |2 -- board/avionic-design/tec/Makefile|2 -- board/compal/paz00/Makefile |2 -- board/compulab/trimslice/Makefile|2 -- 5 files changed, 10 deletions(-) diff --git a/board/avionic-design/medcom/Makefile b/board/avionic-design/medcom/Makefile index d96d043..864bc0e 100644 --- a/board/avionic-design/medcom/Makefile +++ b/board/avionic-design/medcom/Makefile @@ -25,9 +25,7 @@ include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) $(shell mkdir -p $(obj)../common $(obj)../../nvidia/common) -endif LIB= $(obj)lib$(BOARD).o diff --git a/board/avionic-design/plutux/Makefile b/board/avionic-design/plutux/Makefile index d96d043..864bc0e 100644 --- a/board/avionic-design/plutux/Makefile +++ b/board/avionic-design/plutux/Makefile @@ -25,9 +25,7 @@ include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) $(shell mkdir -p $(obj)../common $(obj)../../nvidia/common) -endif LIB= $(obj)lib$(BOARD).o diff --git a/board/avionic-design/tec/Makefile b/board/avionic-design/tec/Makefile index d96d043..864bc0e 100644 --- a/board/avionic-design/tec/Makefile +++ b/board/avionic-design/tec/Makefile @@ -25,9 +25,7 @@ include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) $(shell mkdir -p $(obj)../common $(obj)../../nvidia/common) -endif LIB= $(obj)lib$(BOARD).o diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile index 488e381..7f7287e 100644 --- a/board/compal/paz00/Makefile +++ b/board/compal/paz00/Makefile @@ -16,9 +16,7 @@ include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) $(shell mkdir -p $(obj)../../nvidia/common) -endif LIB= $(obj)lib$(BOARD).o diff --git a/board/compulab/trimslice/Makefile b/board/compulab/trimslice/Makefile index bf624f4..ff07879 100644 --- a/board/compulab/trimslice/Makefile +++ b/board/compulab/trimslice/Makefile @@ -24,9 +24,7 @@ include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) $(shell mkdir -p $(obj)../../nvidia/common) -endif LIB= $(obj)lib$(BOARD).o -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 13/16] tegra20: enable SPL for tegra20 boards
Add SPL options to tegra20 config files and enable SPL build for
tegra20 boards. Also remove redundant code from u-boot that is not
contained in SPL.
Signed-off-by: Allen Martin amar...@nvidia.com
Acked-by: Stephen Warren swar...@wwwdotorg.org
Tested-by: Thierry Reding thierry.red...@avionic-design.de
Signed-off-by: Tom Warren twar...@nvidia.com
---
Makefile |9 ++
arch/arm/cpu/armv7/Makefile |2 +-
arch/arm/cpu/armv7/start.S|2 -
arch/arm/cpu/tegra20-common/ap20.c| 258 +
arch/arm/cpu/tegra20-common/board.c | 23 +--
boards.cfg| 18 +--
include/configs/tegra20-common-post.h | 65 +
include/configs/tegra20-common.h | 22 ++-
8 files changed, 105 insertions(+), 294 deletions(-)
diff --git a/Makefile b/Makefile
index 001df10..3a6f49b 100644
--- a/Makefile
+++ b/Makefile
@@ -384,6 +384,15 @@ ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin
ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
+# enable combined SPL/u-boot/dtb rules for tegra
+ifeq ($(SOC),tegra20)
+ifeq ($(CONFIG_OF_SEPARATE),y)
+ALL-y += $(obj)u-boot-dtb-tegra.bin
+else
+ALL-y += $(obj)u-boot-nodtb-tegra.bin
+endif
+endif
+
all: $(ALL-y) $(SUBDIR_EXAMPLES)
$(obj)u-boot.dtb: $(obj)u-boot
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 788eada..4fdbee4 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -32,7 +32,7 @@ COBJS += cache_v7.o
COBJS += cpu.o
COBJS += syslib.o
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
+ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA20),)
SOBJS += lowlevel_init.o
endif
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 38cce93..b06bafd 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -133,7 +133,6 @@ reset:
orr r0, r0, #0xd3
msr cpsr,r0
-#if !defined(CONFIG_TEGRA20)
/*
* Setup vector:
* (OMAP4 spl TEXT_BASE is not 32 byte aligned.
@@ -149,7 +148,6 @@ reset:
ldr r0, =_start
mcr p15, 0, r0, c12, c0, 0 @Set VBAR
#endif
-#endif /* !Tegra20 */
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/arch/arm/cpu/tegra20-common/ap20.c
b/arch/arm/cpu/tegra20-common/ap20.c
index 6ff71e0..00588da 100644
--- a/arch/arm/cpu/tegra20-common/ap20.c
+++ b/arch/arm/cpu/tegra20-common/ap20.c
@@ -20,16 +20,11 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
-
#include asm/io.h
-#include asm/arch/tegra20.h
#include asm/arch/ap20.h
-#include asm/arch/clk_rst.h
-#include asm/arch/clock.h
#include asm/arch/fuse.h
#include asm/arch/gp_padctrl.h
#include asm/arch/pmc.h
-#include asm/arch/pinmux.h
#include asm/arch/scu.h
#include asm/arch/warmboot.h
#include common.h
@@ -68,235 +63,7 @@ int tegra_get_chip_type(void)
return TEGRA_SOC_UNKNOWN;
}
-/* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */
-static int ap20_cpu_is_cortexa9(void)
-{
- u32 id = readb(NV_PA_PG_UP_BASE + PG_UP_TAG_0);
- return id == (PG_UP_TAG_0_PID_CPU 0xff);
-}
-
-void init_pllx(void)
-{
- struct clk_rst_ctlr *clkrst =
- (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
- struct clk_pll_simple *pll =
- clkrst-crc_pll_simple[CLOCK_ID_XCPU - CLOCK_ID_FIRST_SIMPLE];
- u32 reg;
-
- /* If PLLX is already enabled, just return */
- if (readl(pll-pll_base) PLL_ENABLE_MASK)
- return;
-
- /* Set PLLX_MISC */
- writel(1 PLL_CPCON_SHIFT, pll-pll_misc);
-
- /* Use 12MHz clock here */
- reg = PLL_BYPASS_MASK | (12 PLL_DIVM_SHIFT);
- reg |= 1000 PLL_DIVN_SHIFT;
- writel(reg, pll-pll_base);
-
- reg |= PLL_ENABLE_MASK;
- writel(reg, pll-pll_base);
-
- reg = ~PLL_BYPASS_MASK;
- writel(reg, pll-pll_base);
-}
-
-static void enable_cpu_clock(int enable)
-{
- struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
- u32 clk;
-
- /*
-* NOTE:
-* Regardless of whether the request is to enable or disable the CPU
-* clock, every processor in the CPU complex except the master (CPU 0)
-* will have it's clock stopped because the AVP only talks to the
-* master. The AVP does not know (nor does it need to know) that there
-* are multiple processors in the CPU complex.
-*/
-
- if (enable) {
- /* Initialize PLLX */
- init_pllx();
-
- /* Wait until all clocks are stable */
- udelay(PLL_STABILIZATION_DELAY);
-
- writel(CCLK_BURST_POLICY, clkrst-crc_cclk_brst_pol);
- writel(SUPER_CCLK_DIVIDER,
[U-Boot] [PATCH v10 16/16] tegra20: Remove armv4t build flags
These flags were necessary when building tegra20 as a single binary that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support is split into a separate SPL, this is no longer necessary. Signed-off-by: Allen Martin amar...@nvidia.com Acked-by: Stephen Warren swar...@wwwdotorg.org Tested-by: Thierry Reding thierry.red...@avionic-design.de Signed-off-by: Tom Warren twar...@nvidia.com --- arch/arm/cpu/armv7/tegra20/config.mk | 12 arch/arm/cpu/tegra20-common/Makefile |2 -- 2 files changed, 14 deletions(-) diff --git a/arch/arm/cpu/armv7/tegra20/config.mk b/arch/arm/cpu/armv7/tegra20/config.mk index 714daaf..6432e75 100644 --- a/arch/arm/cpu/armv7/tegra20/config.mk +++ b/arch/arm/cpu/armv7/tegra20/config.mk @@ -23,16 +23,4 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # - -# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build these -# files with compatible flags -ifdef CONFIG_TEGRA20 -CFLAGS_arch/arm/lib/board.o += -march=armv4t -CFLAGS_arch/arm/lib/memset.o += -march=armv4t -CFLAGS_lib/string.o += -march=armv4t -CFLAGS_common/cmd_nvedit.o += -march=armv4t -endif - -USE_PRIVATE_LIBGCC = yes - CONFIG_ARCH_DEVICE_TREE := tegra20 diff --git a/arch/arm/cpu/tegra20-common/Makefile b/arch/arm/cpu/tegra20-common/Makefile index 60be2a6..43c96c6 100644 --- a/arch/arm/cpu/tegra20-common/Makefile +++ b/arch/arm/cpu/tegra20-common/Makefile @@ -27,8 +27,6 @@ include $(TOPDIR)/config.mk # The AVP is ARMv4T architecture so we must use special compiler # flags for any startup files it might use. -CFLAGS_arch/arm/cpu/tegra20-common/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/tegra20-common/clock.o += -march=armv4t CFLAGS_arch/arm/cpu/tegra20-common/warmboot_avp.o += -march=armv4t LIB= $(obj)lib$(SOC)-common.o -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 10/16] ARM: add tegra20 support to arm720t
Add support for tegra20 arm7 boot processor. This processor is used to power on the Cortex A9 and transfer control to it. In tegra this processor is an ARM7TDMI not an ARM720T, but since we don't use cache it was easier to just reuse the ARM720T code as the processors are otherwise identical except for cache and MMU. Signed-off-by: Allen Martin amar...@nvidia.com Acked-by: Stephen Warren swar...@wwwdotorg.org Tested-by: Thierry Reding thierry.red...@avionic-design.de Signed-off-by: Tom Warren twar...@nvidia.com --- arch/arm/cpu/arm720t/cpu.c |2 + arch/arm/cpu/arm720t/interrupts.c|5 + arch/arm/cpu/arm720t/start.S | 12 +- arch/arm/cpu/arm720t/tegra20/Makefile| 48 + arch/arm/cpu/arm720t/tegra20/board.h | 25 +++ arch/arm/cpu/arm720t/tegra20/config.mk | 26 +++ arch/arm/cpu/arm720t/tegra20/cpu.c | 258 ++ arch/arm/cpu/arm720t/tegra20/cpu.h | 100 ++ arch/arm/cpu/arm720t/tegra20/spl.c | 133 + arch/arm/include/asm/arch-tegra20/hardware.h | 29 +++ 10 files changed, 637 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/arm720t/tegra20/Makefile create mode 100644 arch/arm/cpu/arm720t/tegra20/board.h create mode 100644 arch/arm/cpu/arm720t/tegra20/config.mk create mode 100644 arch/arm/cpu/arm720t/tegra20/cpu.c create mode 100644 arch/arm/cpu/arm720t/tegra20/cpu.h create mode 100644 arch/arm/cpu/arm720t/tegra20/spl.c create mode 100644 arch/arm/include/asm/arch-tegra20/hardware.h diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c index 974f288..ce7b3c9 100644 --- a/arch/arm/cpu/arm720t/cpu.c +++ b/arch/arm/cpu/arm720t/cpu.c @@ -51,6 +51,8 @@ int cleanup_before_linux (void) /* Nothing more needed */ #elif defined(CONFIG_INTEGRATOR) defined(CONFIG_ARCH_INTEGRATOR) /* No cleanup before linux for IntegratorAP/CM720T as yet */ +#elif defined(CONFIG_TEGRA) + /* No cleanup before linux for tegra as yet */ #else #error No cleanup_before_linux() defined for this CPU type #endif diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c index 464dd30..c2f898f 100644 --- a/arch/arm/cpu/arm720t/interrupts.c +++ b/arch/arm/cpu/arm720t/interrupts.c @@ -180,6 +180,9 @@ int timer_init (void) PUT32(T0TC, 0); PUT32(T0TCR, 1);/* enable timer0 */ +#elif defined(CONFIG_TEGRA) + /* No timer routines for tegra as yet */ + lastdec = 0; #else #error No timer_init() defined for this CPU type #endif @@ -282,6 +285,8 @@ void __udelay (unsigned long usec) #elif defined(CONFIG_INTEGRATOR) defined(CONFIG_ARCH_INTEGRATOR) /* No timer routines for IntegratorAP/CM720T as yet */ +#elif defined(CONFIG_TEGRA) + /* No timer routines for tegra as yet */ #else #error Timer routines not defined for this CPU type #endif diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index dc047b8..2f914e9 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -59,6 +59,7 @@ _data_abort: .word _data_abort _not_used: .word _not_used _irq: .word _irq _fiq: .word _fiq +_pad: .word 0x12345678 /* now 16*4=64 */ #else _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt @@ -67,6 +68,7 @@ _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq +_pad: .word 0x12345678 /* now 16*4=64 */ #endif /* CONFIG_SPL_BUILD */ .balignl 16,0xdeadbeef @@ -87,7 +89,11 @@ _fiq:.word fiq .globl _TEXT_BASE _TEXT_BASE: +#ifdef CONFIG_SPL_BUILD + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the board-specific linker script. @@ -409,6 +415,8 @@ lock_loop: ldr r0, VPBDIV_ADR mov r1, #0x01 /* VPB clock is same as process clock */ str r1, [r0] +#elif defined(CONFIG_TEGRA) + /* No cpu_init_crit for tegra as yet */ #else #error No cpu_init_crit() defined for current CPU type #endif @@ -424,7 +432,7 @@ lock_loop: str r1, [r0] #endif -#ifndef CONFIG_LPC2292 +#if !defined(CONFIG_LPC2292) !defined(CONFIG_TEGRA) mov ip, lr /* * before relocating, we have to setup RAM timing @@ -633,6 +641,8 @@ reset_cpu: .globl reset_cpu reset_cpu: mov pc, r0 +#elif defined(CONFIG_TEGRA) + /* No specific reset actions for tegra as yet */ #else #error No reset_cpu() defined for current CPU type #endif diff --git a/arch/arm/cpu/arm720t/tegra20/Makefile b/arch/arm/cpu/arm720t/tegra20/Makefile new file mode 100644 index 000..6e48475 --- /dev/null +++ b/arch/arm/cpu/arm720t/tegra20/Makefile @@ -0,0 +1,48
[U-Boot] [PATCH v10 08/16] ARM: Fix arm720t SPL build
Take a few SPL fixes from armv7 and apply them to arm720t: -Use dummy exception handlers for SPL build -Initialize relocation register r9 to 0 for the case of no relocation -ifdef out interrupt handler code Signed-off-by: Allen Martin amar...@nvidia.com Acked-by: Stephen Warren swar...@wwwdotorg.org Tested-by: Thierry Reding thierry.red...@avionic-design.de Signed-off-by: Tom Warren twar...@nvidia.com --- arch/arm/cpu/arm720t/start.S | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 3b97e80..dc047b8 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -51,6 +51,15 @@ _start: breset ldr pc, _irq ldr pc, _fiq +#ifdef CONFIG_SPL_BUILD +_undefined_instruction: .word _undefined_instruction +_software_interrupt: .word _software_interrupt +_prefetch_abort: .word _prefetch_abort +_data_abort: .word _data_abort +_not_used: .word _not_used +_irq: .word _irq +_fiq: .word _fiq +#else _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort @@ -58,6 +67,7 @@ _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq +#endif /* CONFIG_SPL_BUILD */ .balignl 16,0xdeadbeef @@ -167,6 +177,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 - scratch for copy_loop */ ldr r3, _bss_start_ofs @@ -427,6 +438,7 @@ lock_loop: mov pc, lr +#ifndef CONFIG_SPL_BUILD /* * * @@ -589,6 +601,7 @@ fiq: bl do_fiq #endif +#endif /* CONFIG_SPL_BUILD */ #if defined(CONFIG_NETARM) .align 5 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 12/16] tegra20: move SDRAM param save to later in boot
Move warmboot_save_sdram_params() to later in the boot sequence. This code relies on devicetree to get the address of the memory controller and with upcoming changes for SPL boot it gets called early in the boot process when devicetree is not initialized yet. Signed-off-by: Allen Martin amar...@nvidia.com Acked-by: Stephen Warren swar...@wwwdotorg.org Tested-by: Thierry Reding thierry.red...@avionic-design.de Signed-off-by: Tom Warren twar...@nvidia.com --- arch/arm/cpu/tegra20-common/ap20.c |5 - board/nvidia/common/board.c|3 +++ 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/tegra20-common/ap20.c b/arch/arm/cpu/tegra20-common/ap20.c index 8b6afbc..6ff71e0 100644 --- a/arch/arm/cpu/tegra20-common/ap20.c +++ b/arch/arm/cpu/tegra20-common/ap20.c @@ -345,11 +345,6 @@ void init_pmc_scratch(void) /* ODMDATA is for kernel use to determine RAM size, LP config, etc. */ odmdata = get_odmdata(); writel(odmdata, pmc-pmc_scratch20); - -#ifdef CONFIG_TEGRA20_LP0 - /* save Sdram params to PMC 2, 4, and 24 for WB0 */ - warmboot_save_sdram_params(); -#endif } void tegra20_start(void) diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 6753f95..7ab2040 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -133,6 +133,9 @@ int board_init(void) #endif #ifdef CONFIG_TEGRA20_LP0 + /* save Sdram params to PMC 2, 4, and 24 for WB0 */ + warmboot_save_sdram_params(); + /* prepare the WB code to LP0 location */ warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); #endif -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 15/16] spl: fix SPL build of private libgcc
This fixes the SPL build to link with the SPL version of libgcc if USE_PRIVATE_LIBGCC is set to yes. Previously it was linking with the libgcc from the normal u-boot build because it gets set in PLATFORM_LIBS and passed down the to the SPL build. Signed-off-by: Allen Martin amar...@nvidia.com Acked-by: Stephen Warren swar...@wwwdotorg.org Tested-by: Thierry Reding thierry.red...@avionic-design.de Signed-off-by: Tom Warren twar...@nvidia.com --- spl/Makefile |6 ++ 1 file changed, 6 insertions(+) diff --git a/spl/Makefile b/spl/Makefile index d04d2f2..c82e9de 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -66,6 +66,12 @@ ifeq ($(SOC),tegra20) LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o endif +# Add GCC lib +ifeq ($(USE_PRIVATE_LIBGCC), yes) +PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o +PLATFORM_LIBS := $(filter-out %/libgcc.o, $(filter-out -lgcc, $(PLATFORM_LIBS))) $(PLATFORM_LIBGCC) +endif + START := $(addprefix $(SPLTREE)/,$(START)) LIBS := $(addprefix $(SPLTREE)/,$(sort $(LIBS-y))) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] EXYNOS: additional Exynos4 SoC series support
Hi,
On 8/28/12, snow.jh...@gmail.com snow.jh...@gmail.com wrote:
From: Jeong-Hyeon Kim jh...@insignal.co.kr
- Fixed MPLL register address
It's different between Exynos4210 and Exynos4412.
- Added pinmux functions for Exynos4
- Added extended gpios for Exynos4412
Exynos4412 has more gpios than Exynos4210.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
arch/arm/cpu/armv7/exynos/clock.c| 11 ++
arch/arm/cpu/armv7/exynos/pinmux.c | 241
++
arch/arm/include/asm/arch-exynos/clock.h | 27
arch/arm/include/asm/arch-exynos/cpu.h |4 +
arch/arm/include/asm/arch-exynos/gpio.h | 21 +++-
5 files changed, 303 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 680aeeb..84a6725 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -79,14 +79,25 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
/* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
fout = (m + k / 65536) * (freq / (p * (1 s)));
} else if (pllreg == VPLL) {
+#ifdef CONFIG_EXYNOS4210
we don't like the ifdefy at here. How about to check soc_is_4210 and
soc_is_4412?
k = k 0xfff;
/* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
fout = (m + k / 1024) * (freq / (p * (1 s)));
+#else
+ k = k 0x;
+ /* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
+ fout = (m + k / 65536) * (freq / (p * (1 s)));
+#endif
} else {
+#ifdef CONFIG_EXYNOS4210
ditto
if (s 1)
s = 1;
/* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
fout = m * (freq / (p * (1 (s - 1;
+#else
+ /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
+ fout = m * (freq / (p * (1 s)));
+#endif
}
return fout;
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add..0746878 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -26,6 +26,245 @@
#include asm/arch/pinmux.h
#include asm/arch/sromc.h
+static void exynos4_uart_config(int peripheral)
+{
+ struct exynos4_gpio_part1 *gpio1 =
+ (struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
+ struct s5p_gpio_bank *bank;
+ int i, start, count;
+
+ switch (peripheral) {
+ case PERIPH_ID_UART0:
+ bank = gpio1-a0;
+ start = 0;
+ count = 4;
+ break;
+ case PERIPH_ID_UART1:
+ bank = gpio1-a0;
+ start = 4;
+ count = 4;
+ break;
+ case PERIPH_ID_UART2:
+ bank = gpio1-a1;
+ start = 0;
+ count = 4;
+ break;
+ case PERIPH_ID_UART3:
+ bank = gpio1-a1;
+ start = 4;
+ count = 2;
+ break;
+ }
+ for (i = start; i start + count; i++) {
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ }
+}
+
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *) samsung_get_base_gpio_part2();
+ struct s5p_gpio_bank *bank, *bank_ext;
+ int i, start = 0, gpio_func = 0;
+
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ bank = gpio2-k0;
+ bank_ext = gpio2-k1;
+ start = 3;
+ gpio_func = GPIO_FUNC(0x2);
+ break;
+ case PERIPH_ID_SDMMC1:
+ bank = gpio2-k1;
+ bank_ext = NULL;
+ break;
+ case PERIPH_ID_SDMMC2:
+ bank = gpio2-k2;
+ bank_ext = gpio2-k3;
+ start = 3;
+ gpio_func = GPIO_FUNC(0x3);
+ break;
+ case PERIPH_ID_SDMMC3:
+ bank = gpio2-k3;
+ bank_ext = NULL;
+ break;
+ }
+ if ((flags PINMUX_FLAG_8BIT_MODE) !bank_ext) {
+ debug(SDMMC device %d does not support 8bit mode,
+ peripheral);
+ return -1;
+ }
+ if (flags PINMUX_FLAG_8BIT_MODE) {
+ for (i = start; i = (start + 3); i++) {
+ s5p_gpio_cfg_pin(bank_ext, i, gpio_func);
+ s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
+ s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ }
+ }
+ for (i = 0; i 2; i++) {
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ }
+ for (i = 3; i = 6; i++) {
+
[U-Boot] [PATCH] M28: Fix the use of gpmi-nand in mtdparts
The mtd name of the NAND in Linux is gpmi-nand, not gpmi-nand.0 as it would be expected, since the controller doesn't support multiple NANDs attached to it as of now. Rectify this flub by adjusting default mtdparts. Signed-off-by: Marek Vasut ma...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de Cc: Otavio Salvador ota...@ossystems.com.br --- include/configs/m28evk.h |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index d5cd5a8..40df437 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -172,9 +172,9 @@ #defineCONFIG_LZO #defineCONFIG_MTD_DEVICE #defineCONFIG_MTD_PARTITIONS -#defineMTDIDS_DEFAULT nand0=gpmi-nand.0 +#defineMTDIDS_DEFAULT nand0=gpmi-nand #defineMTDPARTS_DEFAULT\ - mtdparts=gpmi-nand.0: \ + mtdparts=gpmi-nand: \ 3m(bootloader)ro, \ 512k(environment),\ 512k(redundant-environment), \ -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] SF: Add Spansion S25FL064P IDs
This is a S25FL064A successor. It supports up to 104MHz bus
speed.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Heiko Schocher h...@denx.de
Cc: Mike Frysinger vap...@gentoo.org
Cc: Scott Wood scottw...@freescale.com
Cc: Wolfgang Denk w...@denx.de
---
drivers/mtd/spi/spansion.c |7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/mtd/spi/spansion.c b/drivers/mtd/spi/spansion.c
index 9a114ac..faf4414 100644
--- a/drivers/mtd/spi/spansion.c
+++ b/drivers/mtd/spi/spansion.c
@@ -90,6 +90,13 @@ static const struct spansion_spi_flash_params
spansion_spi_flash_table[] = {
.name = S25FL032P,
},
{
+ .idcode1 = 0x0216,
+ .idcode2 = 0x4d00,
+ .pages_per_sector = 256,
+ .nr_sectors = 128,
+ .name = S25FL064P,
+ },
+ {
.idcode1 = 0x2018,
.idcode2 = 0x4d01,
.pages_per_sector = 256,
--
1.7.10.4
___
U-Boot mailing list
U-Boot@lists.denx.de
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[U-Boot] [PATCH 2/2] MX28: Add LRADC dump into SPL debug
This is useful if the power management on the chip isn't properly
initialized. It's possible to use the internal LRADC to sample various
power rails and debug the problem.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/cpu/arm926ejs/mxs/mxs_init.h |2 +
arch/arm/cpu/arm926ejs/mxs/spl_boot.c |3 ++
arch/arm/cpu/arm926ejs/mxs/spl_debug.c | 89
3 files changed, 94 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
index e6f837c..acb62fa 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
@@ -44,8 +44,10 @@ void mxs_lradc_enable_batt_measurement(void);
#ifdef CONFIG_MX28_DEBUG
void mx28_common_spl_debug_halt(void);
+void mx28_read_lradc(void);
#else
static inline void mx28_common_spl_debug_halt(void) {}
+static inline void mx28_read_lradc(void) {}
#endif
#endif /* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index f4f0c09..ea52a53 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -104,6 +104,9 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
mxs_power_init();
mxs_mem_init();
+
+ mx28_read_lradc();
+
data-mem_dram_size = mxs_mem_get_size();
data-boot_mode_idx = bootmode;
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
b/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
index f0aef20..51f9b79 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
@@ -61,3 +61,92 @@ void mx28_common_spl_debug_halt(void)
/* Both magic values matched, hang. */
asm volatile(x: b x\n);
}
+
+static void my_print_int(uint32_t val)
+{
+ /* 0x = 4,294,967,295 */
+ char buf[10] = {0};
+ int i = 0;
+
+ if (!val) {
+ serial_putc('0');
+ return;
+ }
+
+ for (i = 0; i 9; i++) {
+ buf[i] = val % 10;
+ val /= 10;
+ }
+
+ for (; i = 0; i--)
+ if (buf[i])
+ break;
+ for (; i = 0; i--)
+ serial_putc(buf[i] + '0');
+}
+
+static const char * const mx28_lradc_chan_names[16] = {
+ [General Purpose 0],
+ [General Purpose 1],
+ [General Purpose 2],
+ [General Purpose 3],
+ [General Purpose 4],
+ [General Purpose 5],
+ [General Purpose 6],
+ [General Purpose 7 / Battery],
+ [Temperature sense 0],
+ [Temperature sense 1],
+ [VDDIO],
+ [VTH],
+ [VDDA],
+ [VDDD],
+ [VBG],
+ [5V input],
+};
+
+static void mx28_read_lradc_chans(int offset)
+{
+ struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
+ int i;
+ uint32_t val;
+
+ mxs_reset_block(regs-hw_lradc_ctrl0_reg);
+
+ /* Flush the block */
+ writel(0, regs-hw_lradc_ctrl0);
+ writel(0, regs-hw_lradc_ctrl1);
+ writel(0, regs-hw_lradc_ctrl2);
+ writel(0, regs-hw_lradc_ctrl3);
+
+ /* Empty the channels */
+ for (i = 0; i 8; i++)
+ writel(0, regs-hw_lradc_ch0_reg + i);
+
+ /* Map channels and trigger them */
+ writel(offset ? 0xfedcba98 : 0x76543210, regs-hw_lradc_ctrl4);
+ writel(0xff, regs-hw_lradc_ctrl0_set);
+
+ while ((readl(regs-hw_lradc_ctrl1) 0xff) != 0xff)
+ ;
+
+ /* Read and report the channels */
+ for (i = 0; i 8; i++) {
+ val = readl(regs-hw_lradc_ch0_reg + i);
+ val = LRADC_CH_VALUE_MASK;
+ serial_puts(Channel );
+ my_print_int(i + (offset * 8));
+ serial_putc(' ');
+ serial_puts(mx28_lradc_chan_names[i + (offset * 8)]);
+ serial_puts( = );
+ my_print_int(val);
+ serial_putc('\n');
+ }
+}
+
+void mx28_read_lradc(void)
+{
+ serial_init();
+ serial_putc('\n');
+ mx28_read_lradc_chans(0);
+ mx28_read_lradc_chans(1);
+}
--
1.7.10.4
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[U-Boot] [PATCH 1/2] MX28: Add CONFIG_MX28_DEBUG
This functionality allows configuring SCRATCH0 and SCRATCH1 registers
to special values, which make the SPL hang after the CPU was properly
initialized.
This is for bootstrap purposes only and MUST BE DISABLED for normal
operation.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/cpu/arm926ejs/mxs/Makefile|3 ++
arch/arm/cpu/arm926ejs/mxs/mxs_init.h |6 +++
arch/arm/cpu/arm926ejs/mxs/spl_boot.c |2 +
arch/arm/cpu/arm926ejs/mxs/spl_debug.c | 63
4 files changed, 74 insertions(+)
create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.c
diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile
b/arch/arm/cpu/arm926ejs/mxs/Makefile
index eeecf89..e75eabd 100644
--- a/arch/arm/cpu/arm926ejs/mxs/Makefile
+++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
@@ -29,6 +29,9 @@ COBJS = clock.o mxs.o iomux.o timer.o
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
+ifdef CONFIG_MX28_DEBUG
+COBJS += spl_debug.o
+endif
endif
SRCS := $(START:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
index 2ddc5bc..e6f837c 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
@@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);
void mxs_lradc_init(void);
void mxs_lradc_enable_batt_measurement(void);
+#ifdef CONFIG_MX28_DEBUG
+void mx28_common_spl_debug_halt(void);
+#else
+static inline void mx28_common_spl_debug_halt(void) {}
+#endif
+
#endif /* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index ad66c57..f4f0c09 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
data-boot_mode_idx = bootmode;
+ mx28_common_spl_debug_halt();
+
mxs_power_wait_pswitch();
}
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
b/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
new file mode 100644
index 000..f0aef20
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_debug.c
@@ -0,0 +1,63 @@
+/*
+ * Freescale i.MX28 Boot debug helpers
+ *
+ * Copyright (C) 2012 Marek Vasut ma...@denx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include config.h
+#include asm/io.h
+#include asm/arch/iomux-mx28.h
+#include asm/arch/imx-regs.h
+#include asm/arch/sys_proto.h
+#include asm/gpio.h
+
+#include mxs_init.h
+
+void mx28_common_spl_debug_halt(void)
+{
+ /*
+* Check for magic setup of DIGCTL_SCRATCH0 and DIGCTL_SCRATCH1
+* registers, which tells the system to halt after initializing
+* hardware. This is useful at bootstrap stage, otherwise shall
+* be disabled.
+*/
+ struct mxs_digctl_regs *digctl_regs =
+ (struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
+
+ const uint32_t magic0 = 0xc001f00d;
+ const uint32_t magic1 = 0x1337b4b3;
+ uint32_t reg;
+
+ reg = readl(digctl_regs-hw_digctl_scratch0);
+ if (reg != magic0)
+ return;
+
+ reg = readl(digctl_regs-hw_digctl_scratch1);
+ if (reg != magic1)
+ return;
+
+ serial_init();
+ serial_puts(Hardware init complete, SPL halted.\n);
+
+ /* Both magic values matched, hang. */
+ asm volatile(x: b x\n);
+}
--
1.7.10.4
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[U-Boot] [PATCH 1/2] MX28: Cleanup mxsboot within make mrproper
Delete the mxsboot binary if make mrproper is called.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam feste...@gmail.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Makefile |1 +
1 file changed, 1 insertion(+)
diff --git a/Makefile b/Makefile
index ce40ab3..9e9d57c 100644
--- a/Makefile
+++ b/Makefile
@@ -755,6 +755,7 @@ clean:
$(obj)tools/gen_eth_addr$(obj)tools/img2srec \
$(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
$(obj)tools/mk{smdk5250,}spl \
+ $(obj)tools/mxsboot\
$(obj)tools/ncb $(obj)tools/ubsha1
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image}\
$(obj)board/matrix_vision/*/bootscript.img \
--
1.7.10.4
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[U-Boot] [PATCH 2/2] MX28: Fixup the ad-hoc use of DIGCTL_MICROSECONDS
Use proper struct-based access for this register in the SPL code.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam feste...@freescale.com
---
arch/arm/cpu/arm926ejs/mxs/spl_boot.c |8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index ddafddb..ad66c57 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -38,12 +38,14 @@
* takes a few seconds to roll. The boot doesn't take that long, so to keep the
* code simple, it doesn't take rolling into consideration.
*/
-#defineHW_DIGCTRL_MICROSECONDS 0x8001c0c0
void early_delay(int delay)
{
- uint32_t st = readl(HW_DIGCTRL_MICROSECONDS);
+ struct mxs_digctl_regs *digctl_regs =
+ (struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
+
+ uint32_t st = readl(digctl_regs-hw_digctl_microseconds);
st += delay;
- while (st readl(HW_DIGCTRL_MICROSECONDS))
+ while (st readl(digctl_regs-hw_digctl_microseconds))
;
}
--
1.7.10.4
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Re: [U-Boot] [PATCH v2 1/2] MX28: mx28evk: Align SSP clock speed
Dear Otavio Salvador, On Tue, Aug 28, 2012 at 7:18 AM, Marek Vasut marek.va...@gmail.com wrote: Dear Otavio Salvador, Align the SSP clock speed with oscilator to achieve higher transfer stability. This change is still pointless, unless you have user for this! As far as I know the SPI flash uses SSP2; so it is a user of it. So, why dont you also align the default clockspeed of the spi flash attached to ssp2 in the config file within this patch? Lemme answer myself after taking a look ... because that's already done. Ok, Acked-by: Marek Vasut ma...@denx.de Signed-off-by: Otavio Salvador ota...@ossystems.com.br --- Changes in v2: - reword commit log to match the change description done on m28evk. board/freescale/mx28evk/mx28evk.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c index 867d3c8..d782aea 100644 --- a/board/freescale/mx28evk/mx28evk.c +++ b/board/freescale/mx28evk/mx28evk.c @@ -49,8 +49,8 @@ int board_early_init_f(void) /* SSP0 clock at 96MHz */ mx28_set_sspclk(MXC_SSPCLK0, 96000, 0); - /* SSP2 clock at 96MHz */ - mx28_set_sspclk(MXC_SSPCLK2, 96000, 0); + /* SSP2 clock at 160MHz */ + mx28_set_sspclk(MXC_SSPCLK2, 16, 0); #ifdef CONFIG_CMD_USB mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT); Best regards, Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] EXYNOS: additional Exynos4 SoC series support
On 29 August 2012 09:23, Kyungmin Park kmp...@infradead.org wrote:
Hi,
On 8/28/12, snow.jh...@gmail.com snow.jh...@gmail.com wrote:
From: Jeong-Hyeon Kim jh...@insignal.co.kr
- Fixed MPLL register address
It's different between Exynos4210 and Exynos4412.
- Added pinmux functions for Exynos4
- Added extended gpios for Exynos4412
Exynos4412 has more gpios than Exynos4210.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
arch/arm/cpu/armv7/exynos/clock.c| 11 ++
arch/arm/cpu/armv7/exynos/pinmux.c | 241
++
arch/arm/include/asm/arch-exynos/clock.h | 27
arch/arm/include/asm/arch-exynos/cpu.h |4 +
arch/arm/include/asm/arch-exynos/gpio.h | 21 +++-
5 files changed, 303 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 680aeeb..84a6725 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -79,14 +79,25 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
/* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
fout = (m + k / 65536) * (freq / (p * (1 s)));
} else if (pllreg == VPLL) {
+#ifdef CONFIG_EXYNOS4210
we don't like the ifdefy at here. How about to check soc_is_4210 and
soc_is_4412?
k = k 0xfff;
/* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
fout = (m + k / 1024) * (freq / (p * (1 s)));
+#else
+ k = k 0x;
+ /* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
+ fout = (m + k / 65536) * (freq / (p * (1 s)));
+#endif
} else {
+#ifdef CONFIG_EXYNOS4210
ditto
if (s 1)
s = 1;
/* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
fout = m * (freq / (p * (1 (s - 1;
+#else
+ /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
+ fout = m * (freq / (p * (1 s)));
+#endif
}
return fout;
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add..0746878 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -26,6 +26,245 @@
#include asm/arch/pinmux.h
#include asm/arch/sromc.h
+static void exynos4_uart_config(int peripheral)
+{
+ struct exynos4_gpio_part1 *gpio1 =
+ (struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
+ struct s5p_gpio_bank *bank;
+ int i, start, count;
+
+ switch (peripheral) {
+ case PERIPH_ID_UART0:
+ bank = gpio1-a0;
+ start = 0;
+ count = 4;
+ break;
+ case PERIPH_ID_UART1:
+ bank = gpio1-a0;
+ start = 4;
+ count = 4;
+ break;
+ case PERIPH_ID_UART2:
+ bank = gpio1-a1;
+ start = 0;
+ count = 4;
+ break;
+ case PERIPH_ID_UART3:
+ bank = gpio1-a1;
+ start = 4;
+ count = 2;
+ break;
+ }
+ for (i = start; i start + count; i++) {
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ }
+}
+
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *) samsung_get_base_gpio_part2();
+ struct s5p_gpio_bank *bank, *bank_ext;
+ int i, start = 0, gpio_func = 0;
+
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ bank = gpio2-k0;
+ bank_ext = gpio2-k1;
+ start = 3;
+ gpio_func = GPIO_FUNC(0x2);
+ break;
+ case PERIPH_ID_SDMMC1:
+ bank = gpio2-k1;
+ bank_ext = NULL;
+ break;
+ case PERIPH_ID_SDMMC2:
+ bank = gpio2-k2;
+ bank_ext = gpio2-k3;
+ start = 3;
+ gpio_func = GPIO_FUNC(0x3);
+ break;
+ case PERIPH_ID_SDMMC3:
+ bank = gpio2-k3;
+ bank_ext = NULL;
+ break;
+ }
+ if ((flags PINMUX_FLAG_8BIT_MODE) !bank_ext) {
+ debug(SDMMC device %d does not support 8bit mode,
+ peripheral);
+ return -1;
+ }
+ if (flags PINMUX_FLAG_8BIT_MODE) {
+ for (i = start; i = (start + 3); i++) {
+ s5p_gpio_cfg_pin(bank_ext, i, gpio_func);
+ s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
+ s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ }
+ }
+ for (i = 0; i 2; i++) {
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+
Re: [U-Boot] [PATCH 3/4] EXYNOS: additional Exynos4 SoC series support
From: Jeong-Hyeon Kim jh...@insignal.co.kr
- Fixed MPLL register address
It's different between Exynos4210 and Exynos4412.
- Added pinmux functions for Exynos4
- Added extended gpios for Exynos4412
Exynos4412 has more gpios than Exynos4210.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
arch/arm/cpu/armv7/exynos/clock.c| 67
arch/arm/cpu/armv7/exynos/pinmux.c | 241 ++
arch/arm/include/asm/arch-exynos/clock.h | 240 +
arch/arm/include/asm/arch-exynos/cpu.h | 14 ++-
arch/arm/include/asm/arch-exynos/gpio.h | 21 +++-
5 files changed, 578 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 680aeeb..002a493 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -92,6 +92,70 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
return fout;
}
+/* exynos4: return pll clock frequency */
+static unsigned long exynos4412_get_pll_clk(int pllreg)
+{
+ struct exynos4412_clock *clk =
+ (struct exynos4412_clock *)samsung_get_base_clock();
+ unsigned long r, m, p, s, k = 0, mask, fout;
+ unsigned int freq;
+
+ switch (pllreg) {
+ case APLL:
+ r = readl(clk-apll_con0);
+ break;
+ case MPLL:
+ r = readl(clk-mpll_con0);
+ break;
+ case EPLL:
+ r = readl(clk-epll_con0);
+ k = readl(clk-epll_con1);
+ break;
+ case VPLL:
+ r = readl(clk-vpll_con0);
+ k = readl(clk-vpll_con1);
+ break;
+ default:
+ printf(Unsupported PLL (%d)\n, pllreg);
+ return 0;
+ }
+
+ /*
+* APLL_CON: MIDV [25:16]
+* MPLL_CON: MIDV [25:16]
+* EPLL_CON: MIDV [24:16]
+* VPLL_CON: MIDV [24:16]
+*/
+ if (pllreg == APLL || pllreg == MPLL)
+ mask = 0x3ff;
+ else
+ mask = 0x1ff;
+
+ m = (r 16) mask;
+
+ /* PDIV [13:8] */
+ p = (r 8) 0x3f;
+ /* SDIV [2:0] */
+ s = r 0x7;
+
+ freq = CONFIG_SYS_CLK_FREQ;
+
+ if (pllreg == EPLL) {
+ k = k 0x;
+ /* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
+ fout = (m + k / 65536) * (freq / (p * (1 s)));
+ } else if (pllreg == VPLL) {
+ k = k 0x;
+ /* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
+ fout = (m + k / 65536) * (freq / (p * (1 s)));
+ } else {
+ /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
+ fout = m * (freq / (p * (1 s)));
+ }
+
+ return fout;
+}
+
/* exynos5: return pll clock frequency */
static unsigned long exynos5_get_pll_clk(int pllreg)
{
@@ -745,6 +809,9 @@ unsigned long get_pll_clk(int pllreg)
if (cpu_is_exynos5())
return exynos5_get_pll_clk(pllreg);
else
+ if (cpu_is_exynos4412())
+ return exynos4412_get_pll_clk(pllreg);
+ else
return exynos4_get_pll_clk(pllreg);
}
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add..0746878 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -26,6 +26,245 @@
#include asm/arch/pinmux.h
#include asm/arch/sromc.h
+static void exynos4_uart_config(int peripheral)
+{
+ struct exynos4_gpio_part1 *gpio1 =
+ (struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
+ struct s5p_gpio_bank *bank;
+ int i, start, count;
+
+ switch (peripheral) {
+ case PERIPH_ID_UART0:
+ bank = gpio1-a0;
+ start = 0;
+ count = 4;
+ break;
+ case PERIPH_ID_UART1:
+ bank = gpio1-a0;
+ start = 4;
+ count = 4;
+ break;
+ case PERIPH_ID_UART2:
+ bank = gpio1-a1;
+ start = 0;
+ count = 4;
+ break;
+ case PERIPH_ID_UART3:
+ bank = gpio1-a1;
+ start = 4;
+ count = 2;
+ break;
+ }
+ for (i = start; i start + count; i++) {
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ }
+}
+
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *) samsung_get_base_gpio_part2();
+ struct s5p_gpio_bank *bank, *bank_ext;
+ int i, start = 0, gpio_func = 0;
+
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ bank = gpio2-k0;
+ bank_ext = gpio2-k1;
+ start = 3;
+ gpio_func =
Re: [U-Boot] [PATCH 4/4] EXYNOS: Add support for Insignal Origen QUAD board
From: Jeong-Hyeon Kim jh...@insignal.co.kr
Origen QUAD board is based on Samsung Exynos4412 SoC.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
board/insignal/origen_quad/Makefile| 63 ++
board/insignal/origen_quad/boot.c | 63 ++
board/insignal/origen_quad/clock.c | 103 ++
board/insignal/origen_quad/dmc.c | 158 +++
board/insignal/origen_quad/lowlevel_init.S | 158 +++
board/insignal/origen_quad/origen_quad.c | 154 ++
board/insignal/origen_quad/pmic.c | 47 +
board/insignal/origen_quad/setup.h | 298
boards.cfg |1 +
include/configs/origen_quad.h | 183 +
tools/Makefile |2 +
11 files changed, 1230 insertions(+), 0 deletions(-)
create mode 100644 board/insignal/origen_quad/Makefile
create mode 100644 board/insignal/origen_quad/boot.c
create mode 100644 board/insignal/origen_quad/clock.c
create mode 100644 board/insignal/origen_quad/dmc.c
create mode 100644 board/insignal/origen_quad/lowlevel_init.S
create mode 100644 board/insignal/origen_quad/origen_quad.c
create mode 100644 board/insignal/origen_quad/pmic.c
create mode 100644 board/insignal/origen_quad/setup.h
create mode 100644 include/configs/origen_quad.h
diff --git a/board/insignal/origen_quad/Makefile
b/board/insignal/origen_quad/Makefile
new file mode 100644
index 000..04f609a
--- /dev/null
+++ b/board/insignal/origen_quad/Makefile
@@ -0,0 +1,63 @@
+#
+# Copyright (C) 2012 Samsung Electronics
+#
+# Copyright (C) 2012 Insignal
+#
+# Makefile for the Insignal OrigenQUAD board (Exynos4x12)
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+SOBJS := lowlevel_init.o
+
+COBJS := clock.o
+COBJS += dmc.o
+
+ifdef CONFIG_PMIC
+COBJS += pmic.o
+endif
+
+ifndef CONFIG_SPL_BUILD
+COBJS += origen_quad.o
+else
+COBJS += boot.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/insignal/origen_quad/boot.c
b/board/insignal/origen_quad/boot.c
new file mode 100644
index 000..10f2289
--- /dev/null
+++ b/board/insignal/origen_quad/boot.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * Copyright (C) 2012 Insignal
+ *
+ * Board initialize for the Insignal OrigenQUAD board (Exynos4x12)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include config.h
+#include setup.h
+
+#define IRAM_ADDRESS 0x0202
+#define EXTERNAL_FUNC_ADDRESS (IRAM_ADDRESS + 0x0030)
+#defineIROM_READ_SDMMC EXTERNAL_FUNC_ADDRESS
+
+void inline irom_read_sdmmc(u32 start, u32 count, u32 addr)
+{
+ void (*read_sdmmc)(u32, u32, u32) = (void *) *(u32 *)IROM_READ_SDMMC;
+ read_sdmmc(start, count, addr);
+}
+
+void board_init_f(unsigned long bootflag)
+{
+ __attribute__((noreturn)) void (*uboot)(void);
+
+
Re: [U-Boot] patman doesn't send patches
Hi Simon, (added list this time) On 08/28/2012 10:32 PM, Simon Glass wrote: Best to send to list and cc me. If you see this: git send-email git: 'send-email' is not a git command. See 'git --help'. try: sudo apt-get install git-email I don't see any errors. And git send-email is working just fine for me. I'm using it regularly. Any other idea what might go wrong? Again, the generated patches in the root directory look fine. But nothing is sent. Thanks, Stefan Regards, Simon On Mon, Aug 27, 2012 at 7:26 AM, Stefan Roese m...@roese.nl wrote: Hi Simon, finally I started using patman for the first time. The main problem I'm facing right now is, that the patches are not sent at all to the destination (Series-to: ...). I see no message/error/etc at the prompt, that patman even tried to send the patches. Should there be anything like this? Here the output of my current command: [stefan@ubuntu-2012 u-boot-tom-rini (a3m071-spl-v4b)]$ ./tools/patman/patman -c12 Cleaned 12 patches 0 errors, 1 warnings for 0001-SPL-Fix-build-problems-on-ARM-with-new-SPL-framework.patch: warning: arch/arm/lib/spl.c,36: externs should be avoided in .c files 0 errors, 1 warnings for 0004-SPL-Add-NOR-flash-booting-support.patch: Internal error: some problems lost warning: common/spl/spl_nor.c,26: externs should be avoided in .c files 0 errors, 2 warnings for 0008-mpc5200-Add-SPL-support.patch: Internal error: some problems lost warning: arch/powerpc/cpu/mpc5xxx/spl_boot.c,23: externs should be avoided in .c files warning: arch/powerpc/cpu/mpc5xxx/spl_boot.c,28: externs should be avoided in .c files 0 errors, 2 warnings for 0009-mpc5200-Add-a3m071-board-support.patch: Internal error: some problems lost warning: include/configs/a3m071.h,334: line over 80 characters warning: include/configs/a3m071.h,341: line over 80 characters checkpatch.pl found 0 error(s), 6 warning(s) Or does patman not even try to send, once checkpatch warning/errors are detected? Any hints really appreciated. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
