Re: [U-Boot] Pull request: u-boot-video/master

2013-07-02 Thread Anatolij Gustschin
On Mon, 1 Jul 2013 23:11:07 -0300
Otavio Salvador ota...@ossystems.com.br wrote:
...
 You didn' t put the splashpos fix.

I would prefer to wait a few days, so other people will have a chance
to review and comment. Also I didn't test the splashpos fix yet, it
was only compile-tested.

Thanks,

Anatolij
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Re: [U-Boot] [PATCH v3 0/2] Add Arndale board support

2013-07-02 Thread Chander Kashyap
Dear Inder,

On 2 July 2013 10:11, Inderpal Singh inderpal.si...@linaro.org wrote:
 The Arndale board is based on samsung's exynos5250 SOC.
 For spl generation, it depends on the patch at [5].

 First patch provides the basic arndale board support. The second patch
 adds the MMC support.

 Changes in v2:
 - split from earlier patchset at [3] as per Minkyu
 - Removed checkpatch errors pointed out by Wolfgang
 - rebased to latest u-boot-samsung master branch
 - created mmc_boot.c to remove dependency on consolidation
   patch at [4]
 - split the mmc support to new patch as it depends on [2]

 [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883
 [2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887
 [3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101
 [4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272

 Changes in v3:
 - Used dt based serial
 - rebased to latest u-boot-samsung master branch

 [5] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/164824

 Inderpal Singh (2):
   exynos5250: Add arndale board support
   exynos5250: arndale: Add mmc support

  MAINTAINERS  |4 +
  board/samsung/arndale/Makefile   |   58 +++
  board/samsung/arndale/arndale.c  |  117 ++
  board/samsung/arndale/arndale_spl.c  |   66 +++
  board/samsung/arndale/clock_init.c   |  655 
 ++
  board/samsung/arndale/clock_init.h   |  149 +++
  board/samsung/arndale/dmc_common.c   |  199 +
  board/samsung/arndale/dmc_init_ddr3.c|  228 +++
  board/samsung/arndale/lowlevel_init.S|   92 +
  board/samsung/arndale/mmc_boot.c |   58 +++
  board/samsung/arndale/setup.h|  569 ++
  board/samsung/dts/exynos5250-arndale.dts |   41 ++
  boards.cfg   |1 +
  include/configs/arndale.h|   36 ++
  14 files changed, 2273 insertions(+)
  create mode 100644 board/samsung/arndale/Makefile
  create mode 100644 board/samsung/arndale/arndale.c
  create mode 100644 board/samsung/arndale/arndale_spl.c
  create mode 100644 board/samsung/arndale/clock_init.c
  create mode 100644 board/samsung/arndale/clock_init.h
  create mode 100644 board/samsung/arndale/dmc_common.c
  create mode 100644 board/samsung/arndale/dmc_init_ddr3.c
  create mode 100644 board/samsung/arndale/lowlevel_init.S
  create mode 100644 board/samsung/arndale/mmc_boot.c
  create mode 100644 board/samsung/arndale/setup.h
  create mode 100644 board/samsung/dts/exynos5250-arndale.dts
  create mode 100644 include/configs/arndale.h

 --
 1.7.9.5

Looks good.

Acked-by: Chander Kashyap chander.kash...@gmail.com


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[U-Boot] [PATCH v2 0/3] Adopt u-boot build to OS X

2013-07-02 Thread Andreas Bießmann

Latest changes to mkimage, Makefile and added proftool broke compilation on OS
X. This series makes u-boot build clean again with some little adoptions.

Patch 'lib/rsa/rsa-sig.c: compile on OS X' supersedes
http://patchwork.ozlabs.org/patch/255283/

Changes in v2:
 - remove REG_NOERROR instead of defining it conditionally (as Jeroen
   suggested)

Andreas Bießmann (3):
  lib/rsa/rsa-sig.c: compile on OS X
  tools/proftool: remove REG_NOERROR
  Makefile: fix readelf usage

 Makefile   | 2 +-
 lib/rsa/rsa-sign.c | 1 -
 tools/proftool.c   | 2 +-
 3 files changed, 2 insertions(+), 3 deletions(-)

-- 
1.8.3.1

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Re: [U-Boot] [PATCH v3 1/2] exynos5250: Add arndale board support

2013-07-02 Thread Minkyu Kang
Dear Inderpal Singh,

On 02/07/13 13:41, Inderpal Singh wrote:
 Arndale board is based on samsung's exynos5250 soc.
 
 Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
 ---
  MAINTAINERS  |4 +
  board/samsung/arndale/Makefile   |   58 +++
  board/samsung/arndale/arndale.c  |  103 +
  board/samsung/arndale/arndale_spl.c  |   66 +++
  board/samsung/arndale/clock_init.c   |  655 
 ++
  board/samsung/arndale/clock_init.h   |  149 +++
  board/samsung/arndale/dmc_common.c   |  199 +
  board/samsung/arndale/dmc_init_ddr3.c|  228 +++
  board/samsung/arndale/lowlevel_init.S|   92 +
  board/samsung/arndale/mmc_boot.c |   58 +++
  board/samsung/arndale/setup.h|  569 ++
  board/samsung/dts/exynos5250-arndale.dts |   23 ++
  boards.cfg   |1 +
  include/configs/arndale.h|   36 ++
  14 files changed, 2241 insertions(+)
  create mode 100644 board/samsung/arndale/Makefile
  create mode 100644 board/samsung/arndale/arndale.c
  create mode 100644 board/samsung/arndale/arndale_spl.c
  create mode 100644 board/samsung/arndale/clock_init.c
  create mode 100644 board/samsung/arndale/clock_init.h
  create mode 100644 board/samsung/arndale/dmc_common.c
  create mode 100644 board/samsung/arndale/dmc_init_ddr3.c
  create mode 100644 board/samsung/arndale/lowlevel_init.S
  create mode 100644 board/samsung/arndale/mmc_boot.c
  create mode 100644 board/samsung/arndale/setup.h
  create mode 100644 board/samsung/dts/exynos5250-arndale.dts
  create mode 100644 include/configs/arndale.h
 

This patch seems to conflict with Rajeshwari's patch.
http://patchwork.ozlabs.org/patch/256058/

So, this patch  will be pending until merge.

Thanks,
Minkyu Kang.
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[U-Boot] [PATCH v2 1/3] lib/rsa/rsa-sig.c: compile on OS X

2013-07-02 Thread Andreas Bießmann
Interfaces exposed by error.h seems not to be used in rsa-sig.c, remove it.
This also fixes an compile error on OS X:

---8---
u-boot/lib/rsa/rsa-sign.c:23:19: error: error.h: No such file or directory
---8---

Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Tested-by: Lubomir Popov lpo...@mm-sol.com
---
Changes in v2: None

 lib/rsa/rsa-sign.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index a75ae24..e30d8ca 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -20,7 +20,6 @@
 #include mkimage.h
 #include stdio.h
 #include string.h
-#include error.h
 #include image.h
 #include time.h
 #include openssl/rsa.h
-- 
1.8.3.1

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[U-Boot] [PATCH v2 2/3] tools/proftool: remove REG_NOERROR

2013-07-02 Thread Andreas Bießmann
Remove non portable usage of REG_NOERROR.
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, even GNU
regex(3) do mention REG_NOERROR, just remove it.

Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
Changes in v2:
 - remove REG_NOERROR instead of defining it conditionally (as Jeroen
   suggested)

 tools/proftool.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/proftool.c b/tools/proftool.c
index a48ed28..aa05e77 100644
--- a/tools/proftool.c
+++ b/tools/proftool.c
@@ -333,7 +333,7 @@ static void check_trace_config_line(struct 
trace_configline_info *item)
if (err == REG_NOMATCH)
continue;
 
-   if (err != REG_NOERROR) {
+   if (err) {
regex_report_error(item-regex, err, match,
   item-name);
break;
-- 
1.8.3.1

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[U-Boot] [PATCH v2 3/3] Makefile: fix readelf usage

2013-07-02 Thread Andreas Bießmann
Some OS (like OS X) do not provide a generic readelf. We should enforce to use
the toochain provided readelf instead, to do so use $(CROSS_COMPILE)readelf.

Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Tested-by: Lubomir Popov lpo...@mm-sol.com
---
Changes in v2: None

 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index ba1c10b..446c2f8 100644
--- a/Makefile
+++ b/Makefile
@@ -747,7 +747,7 @@ endif   # config.mk
 # ARM relocations should all be R_ARM_RELATIVE.
 checkarmreloc: $(obj)u-boot
@if test R_ARM_RELATIVE != \
-   `readelf -r $ | cut -d ' ' -f 4 | grep R_ARM | sort -u`; \
+   `$(CROSS_COMPILE)readelf -r $ | cut -d ' ' -f 4 | grep R_ARM 
| sort -u`; \
then echo $ contains relocations other than \
R_ARM_RELATIVE; false; fi
 
-- 
1.8.3.1

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Re: [U-Boot] [PATCH 2/3] tools/proftool: add missing definition

2013-07-02 Thread Andreas Bießmann
Hi Jeroen,

On 01.07.13 22:12, Jeroen Hofstee wrote:
 Hello Andreas,
 
 On 07/01/2013 08:45 PM, Jeroen Hofstee wrote:
 Hello Andreas,

 On 06/30/2013 01:15 PM, Andreas Bießmann wrote:
 BSD (like OS X) variants of regex.h do not declare REG_NOERROR, add a
 simple
 define for them.

 Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
 ---
   +#ifndef REG_NOERROR
 +/* BSD regex.h do not expose REG_NOERROR */
 +# define REG_NOERROR 0
 +#endif
 +
 I think a neater solutions is to actually remove the REG_NOERROR.
 From man regexec, GNU 2011-09-27: regexec() returns zero for a
 successful match or REG_NOMATCH for failure.. Opengroup specs
 will mention the same. REG_NOERROR is not mentioned at all.

 e.g.:

 if (err) {
 regex_report_error(item-regex, err, match,
item-name);
 break;
 }

 should do the job in a portable way (and reads a bit better,
 as well). But this is only a cosmetic comment, the patch by
 itself should do the job.

 Just realized this is more then cosmetic. Also GNU will not have
 REG_NOERROR defined since it is an enum, so it will always
 take the #ifndef REG_NOERROR road, which boils down to !! 0.
 
 So this needs a new version instead of hiding how this works.

you are right, v2 is on the way ...

 p.s. Simon, Andreas sorry for spamming, selected the wrong email...

Ouch, sorry! Just realized that I took the wrong mail too.

Best regards

Andreas Bießmann
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Re: [U-Boot] [ANN] v2013.07-rc2

2013-07-02 Thread Lubomir Popov
Hi Tom, Marek,

On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
 Hey all,

 I've tagged and pushed v2013.07-rc2.  A bit more over the place than I
 should have gone, but picked up a lot of things that have been
 outstanding for a while.  The big thing is a refactor of the boot loop.
 Everything should be working right now, but please test.  Related to
 this is the ability to have crytpographically signed images.  It's like
 secure boot in UEFI land, but hopefully without the kerfuffle.

 If you've got changes outstanding still, please start gently poking
 custodians with patchwork links.  I've got a good bit of stuff I need to
 deal with myself still, but please prod me all the same.

What about Michael's patch

http://patchwork.ozlabs.org/patch/250290/

It is a bug fix actually (and happens to affect two of our boards ;) ).

Thanks,
Lubo
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[U-Boot] [PATCH] cosmetic: README.SPL: fix a typo

2013-07-02 Thread Masahiro Yamada
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
 doc/README.SPL | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/doc/README.SPL b/doc/README.SPL
index 4e1cb28..ac9a213 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -77,7 +77,7 @@ an SPL CPU in boards.cfg as follows:
 
normal_cpu:spl_cpu
 
-This this case CPU will be set to normal_cpu during the main u-boot
+This case CPU will be set to normal_cpu during the main u-boot
 build and spl_cpu during the SPL build.
 
 
-- 
1.8.1.2

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Re: [U-Boot] [PATCH] Origen: Correct equation to calculate PLL output frequency

2013-07-02 Thread Minkyu Kang
On 01/07/13 17:41, Rajeshwari Birje wrote:
 Hi Minkyu Kang,
 
 As per the user manual I have for EXYNOS5 it is
 FOUT = MDIV * FIN / (PDIV * 2^SDIV)

What is your version of manual?
If possible, could you please send it to me?

 
 Regards,
 Rajeshwari Shinde.
 
 On Mon, Jul 1, 2013 at 1:56 PM, Minkyu Kang mk7.k...@samsung.com wrote:
 On 01/07/13 16:42, Rajeshwari Shinde wrote:
 EXYNOS4 user manual equation for calculating PLL output is
 FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
 hence updating accordingly.

 Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
 ---
  arch/arm/cpu/armv7/exynos/clock.c |   11 +--
  1 files changed, 9 insertions(+), 2 deletions(-)

 diff --git a/arch/arm/cpu/armv7/exynos/clock.c 
 b/arch/arm/cpu/armv7/exynos/clock.c
 index e1c4246..af0fa5b 100644
 --- a/arch/arm/cpu/armv7/exynos/clock.c
 +++ b/arch/arm/cpu/armv7/exynos/clock.c
 @@ -116,8 +116,15 @@ static int exynos_get_pll_clk(int pllreg, unsigned int 
 r, unsigned int k)
   /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
   fout = (m + k / 1024) * (freq / (p * (1  s)));
   } else {
 - /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
 - fout = m * (freq / (p * (1  s)));
 + if (cpu_is_exynos4()) {
 + if (s  1)
 + s = 1;
 + /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
 + fout = m * (freq / (p * (1  (s - 1;
 + } else {
 + /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
 + fout = m * (freq / (p * (1  s)));
 + }
   }

   return fout;


 I checked about it.
 It was wrong, but your patch doesn't fit too.

 exynos4210
 FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

 exynos4412
 FOUT = MDIV * FIN / (PDIV * 2^SDIV)

 exynos5250
 FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

 At past, our code was,
 FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))
 It was changed by Akshay's patch.


 commit 234370cab4b2f096e095fe8f3284fd39740a4023
 Author: Akshay Saraswat aksha...@samsung.com
 Date:   Fri Mar 22 02:26:36 2013 +

 Exynos5: clock: Update the equation to calculate PLL output frequency

 According to the latest exynos5 user manual, the equation for
 calculating PLL output was changed to
 FOUT= MDIV x FIN/(PDIV x 2^SDIV)
 earlier it was
 FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
 So updating the clock code accordingly.

 Signed-off-by: Hatim Ali hatim...@samsung.com
 Signed-off-by: Akshay Saraswat aksha...@samsung.com
 Acked-by: Simon Glass s...@chromium.org


 According to Akshay's patch.
 exynos5250 should be
 FOUT = MDIV * FIN / (PDIV * 2^SDIV)
 but my manual (I'm not sure that is latest version) shows
 FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1))

 Akshay,
 please check this.

 Rajeshwari,
 Thank you for raise this issue,
 I'll check it and resend the patch.

 Thanks,
 Minkyu Kang.
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Thanks,
Minkyu Kang.
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Re: [U-Boot] [ANN] v2013.07-rc2

2013-07-02 Thread Simon Glass
Hi Robert,

On Tue, Jul 2, 2013 at 5:44 AM, Robert Nelson robertcnel...@gmail.comwrote:

 On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
  Hey all,
 
  I've tagged and pushed v2013.07-rc2.  A bit more over the place than I
  should have gone, but picked up a lot of things that have been
  outstanding for a while.  The big thing is a refactor of the boot loop.
  Everything should be working right now, but please test.  Related to
  this is the ability to have crytpographically signed images.  It's like
  secure boot in UEFI land, but hopefully without the kerfuffle.
 
  If you've got changes outstanding still, please start gently poking
  custodians with patchwork links.  I've got a good bit of stuff I need to
  deal with myself still, but please prod me all the same.

 So, the bootm refactor ( 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 )
 also broke bootz/zImage...

 Got it to atleast get past the invalid OS message via:

 diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
 index 02a5013..a0b55ef 100644
 --- a/common/cmd_bootm.c
 +++ b/common/cmd_bootm.c
 @@ -1744,6 +1744,12 @@ static int bootz_start(cmd_tbl_t *cmdtp, int
 flag, int argc,
 int ret;
 void *zi_start, *zi_end;

 +   memset(images, 0, sizeof(bootm_headers_t));
 +
 +   boot_start_lmb(images);
 +
 +   images-os.os = IH_OS_LINUX;
 +
 ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
   images, 1);

 However it's still locking up at Starting Kernel ...


What board is this please? I have only tested on x86, but perhaps have
missed something here.

Regards,
Simon
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Re: [U-Boot] [PATCH] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles

2013-07-02 Thread Simon Glass
On Tue, Jul 2, 2013 at 1:17 PM, Inderpal Singh inderpal.si...@linaro.orgwrote:

 Update the Makefiles so that all boards can use the same spl generation
 tool

 Signed-off-by: Inderpal Singh inderpal.si...@linaro.org


Acked-by: Simon Glass s...@chromium.org


 ---
 This is needed for the Arndale board support patch just sent
 after sending this one.

  Makefile|2 +-
  include/configs/exynos5250-dt.h |2 +-
  tools/Makefile  |4 ++--
  3 files changed, 4 insertions(+), 4 deletions(-)

 diff --git a/Makefile b/Makefile
 index af4c3c0..d8c5d3f 100644
 --- a/Makefile
 +++ b/Makefile
 @@ -821,7 +821,7 @@ clean:
$(obj)tools/gdb/{astest,gdbcont,gdbsend}   \
$(obj)tools/gen_eth_addr$(obj)tools/img2srec   \
$(obj)tools/mk{env,}image   $(obj)tools/mpc86x_clk \
 -  $(obj)tools/mk{smdk5250,}spl   \
 +  $(obj)tools/mk{$(BOARD),}spl   \
$(obj)tools/mxsboot\
$(obj)tools/ncb $(obj)tools/ubsha1 \
$(obj)tools/kernel-doc/docproc
 diff --git a/include/configs/exynos5250-dt.h
 b/include/configs/exynos5250-dt.h
 index 1c9eca2..a782880 100644
 --- a/include/configs/exynos5250-dt.h
 +++ b/include/configs/exynos5250-dt.h
 @@ -29,7 +29,7 @@
  #define CONFIG_SAMSUNG /* in a SAMSUNG core */
  #define CONFIG_S5P /* S5P Family */
  #define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */
 -#define CONFIG_SMDK5250/* which is in a SMDK5250
 */
 +#define CONFIG_EXYNOS5250

  #include asm/arch/cpu.h  /* get chip and board defs */

 diff --git a/tools/Makefile b/tools/Makefile
 index 4630f03..5eb14c5 100644
 --- a/tools/Makefile
 +++ b/tools/Makefile
 @@ -68,7 +68,7 @@ BIN_FILES-$(CONFIG_CMD_LOADS) += img2srec$(SFX)
  BIN_FILES-$(CONFIG_XWAY_SWAP_BYTES) += xway-swap-bytes$(SFX)
  BIN_FILES-y += mkenvimage$(SFX)
  BIN_FILES-y += mkimage$(SFX)
 -BIN_FILES-$(CONFIG_SMDK5250) += mksmdk5250spl$(SFX)
 +BIN_FILES-$(CONFIG_EXYNOS5250) += mk$(BOARD)spl$(SFX)
  BIN_FILES-$(CONFIG_MX23) += mxsboot$(SFX)
  BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX)
  BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
 @@ -100,7 +100,7 @@ NOPED_OBJ_FILES-y += image-host.o
  NOPED_OBJ_FILES-y += omapimage.o
  NOPED_OBJ_FILES-y += mkenvimage.o
  NOPED_OBJ_FILES-y += mkimage.o
 -OBJ_FILES-$(CONFIG_SMDK5250) += mkexynosspl.o
 +OBJ_FILES-$(CONFIG_EXYNOS5250) += mkexynosspl.o
  OBJ_FILES-$(CONFIG_MX23) += mxsboot.o
  OBJ_FILES-$(CONFIG_MX28) += mxsboot.o
  OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o
 --
 1.7.9.5

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Re: [U-Boot] I'm coming back :)

2013-07-02 Thread Simon Glass
Hi Graeme,

On Mon, Jul 1, 2013 at 12:54 PM, Graeme Russ graeme.r...@gmail.com wrote:

 Hi Guys,

 Due to personal circumstances I left the U-Boot community back in late
 October 2012.

 Now I find my circumstances have been completely flipped upside down (long
 story) and I will soon have much more time on my hands. Unfortunately, I do
 not have a dev machine yet (that may take a couple of months) but at least
 I can start by reading the list again and get up to speed with what is
 going on.

 I want to send out a huge Thank You to Simon Glass for taking over the
 custodianship of the x86 repo. It's been really great to see my little baby
 grow up. Not only that, but he has taken over the campaign of architecture
 unification. I think I'm going to really like the new look U-Boot :)


Thank you Graeme. It has definitely made it easier to add new features that
work on all archs.



 And another big Thanks toTom Rini, without whom U-Boot would have been at
 great risk of stumbling right when it was getting the greatest amount of
 momentum it ever had.

 Looking forward to being part of the team again. This time I will be
 focusing on ARM based devices, particularly the AllWinner A10 and A31. So
 Simon, I won't be taking x86 from you (I hope you don't mind)


It will be great to see you back. I haven't been quite so active on x86
since things mostly work on link. But thanks for all your help with the
reviews and tidy-ups there.

Regards,
Simon
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[U-Boot] [PATCH 1/2 v3] powerpc/85xx: Add C29x SoC support

2013-07-02 Thread Po Liu
From: Mingkai Hu mingkai...@freescale.com

The Freescale C29x family is a high performance crypto co-processor.
It combines a single e500v2 core with necessary SEC engine. There're
three SoC types(C291, C292, C293) with the following features:

 - 512K L2 Cache/SRAM and 512 KB platform SRAM
 - DDR3/DDR3L 32bit DDR controller
 - One PCI express (x1, x2, x4) Gen 2.0 Controller
 - Trust Architecture 2.0
 - SEC6.0 engine

Signed-off-by: Mingkai Hu mingkai...@freescale.com
Signed-off-by: Po Liu po@freescale.com
---
Changes for v2:
- Remove define CONFIG_C291/CONFIG_C292/CONFIG_C293, 
  replace with CONFIG_C29X
Changes for v3:
- Replace CONFIG_C29X with CONFIG_PPC_C29X
 arch/powerpc/cpu/mpc85xx/Makefile |  2 +
 arch/powerpc/cpu/mpc85xx/c29x_serdes.c| 65 +++
 arch/powerpc/cpu/mpc8xxx/cpu.c|  3 ++
 arch/powerpc/include/asm/config_mpc85xx.h | 12 ++
 arch/powerpc/include/asm/fsl_law.h|  1 +
 arch/powerpc/include/asm/immap_85xx.h | 23 +++
 arch/powerpc/include/asm/processor.h  |  3 ++
 7 files changed, 109 insertions(+)
 create mode 100644 arch/powerpc/cpu/mpc85xx/c29x_serdes.c

diff --git a/arch/powerpc/cpu/mpc85xx/Makefile 
b/arch/powerpc/cpu/mpc85xx/Makefile
index 4669883..3cb2a78 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -62,6 +62,7 @@ COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
 COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
 
 # supports ddr1/2/3
+COBJS-$(CONFIG_PPC_C29X)   += ddr-gen3.o
 COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8569)+= ddr-gen3.o
@@ -116,6 +117,7 @@ COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += 
fsl_corenet_serdes.o
 COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
 
 # SoC specific SERDES support
+COBJS-$(CONFIG_PPC_C29X)   += c29x_serdes.o
 COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
 COBJS-$(CONFIG_MPC8544) += mpc8544_serdes.o
 COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c 
b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
new file mode 100644
index 000..4b3214d
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include config.h
+#include common.h
+#include asm/io.h
+#include asm/immap_85xx.h
+#include asm/fsl_serdes.h
+
+#define SRDS1_MAX_LANES4
+
+static u32 serdes1_prtcl_map;
+
+struct serdes_config {
+   u32 protocol;
+   u8 lanes[SRDS1_MAX_LANES];
+};
+
+static const struct serdes_config serdes1_cfg_tbl[] = {
+   /* SerDes 1 */
+   {1, {PCIE1, PCIE1, PCIE1, PCIE1} },
+   {2, {PCIE1, PCIE1, PCIE1, PCIE1} },
+   {3, {PCIE1, PCIE1, NONE, NONE} },
+   {4, {PCIE1, PCIE1, NONE, NONE} },
+   {5, {PCIE1, NONE, NONE, NONE} },
+   {6, {PCIE1, NONE, NONE, NONE} },
+   {}
+};
+
+int is_serdes_configured(enum srds_prtcl device)
+{
+   return (1  device)  serdes1_prtcl_map;
+}
+
+void fsl_serdes_init(void)
+{
+   ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+   u32 pordevsr = in_be32(gur-pordevsr);
+   u32 srds_cfg = (pordevsr  MPC85xx_PORDEVSR_IO_SEL) 
+   MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+   const struct serdes_config *ptr;
+   int lane;
+
+   debug(PORDEVSR[IO_SEL_SRDS] = %x\n, srds_cfg);
+
+   if (srds_cfg  ARRAY_SIZE(serdes1_cfg_tbl)) {
+   printf(Invalid PORDEVSR[IO_SEL_SRDS] = %d\n, srds_cfg);
+   return;
+   }
+
+   ptr = serdes1_cfg_tbl[srds_cfg];
+   if (!ptr-protocol)
+   return;
+
+   for (lane = 0; lane  SRDS1_MAX_LANES; lane++) {
+   enum srds_prtcl lane_prtcl = ptr-lanes[lane];
+   serdes1_prtcl_map |= (1  lane_prtcl);
+   }
+}
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index bc26855..2eed872 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -95,6 +95,9 @@ static struct cpu_type cpu_type_list[] = {
CPU_TYPE_ENTRY(BSC9131, 9131, 1),
CPU_TYPE_ENTRY(BSC9132, 9132, 2),
CPU_TYPE_ENTRY(BSC9232, 9232, 2),
+   CPU_TYPE_ENTRY(C291, C291, 1),
+   CPU_TYPE_ENTRY(C292, C292, 1),
+   CPU_TYPE_ENTRY(C293, C293, 1),
 #elif defined(CONFIG_MPC86xx)
CPU_TYPE_ENTRY(8610, 8610, 1),
CPU_TYPE_ENTRY(8641, 8641, 2),
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h 
b/arch/powerpc/include/asm/config_mpc85xx.h
index 1d46b14..3f48802 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -626,6 +626,18 @@
 #define 

[U-Boot] [PATCH 2/2 v3] powerpc/c29xpcie: add support for C29XPCIE board

2013-07-02 Thread Po Liu
From: Mingkai Hu mingkai...@freescale.com

C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes C293PCIE board, C293PCIE board and C291PCIE board.

 - 512KB platform SRAM in addition to 512K L2 Cache/SRAM
 - 512MB soldered DDR3 32bit memory
 - CPLD System Logic
 - 64MB x16 NOR flash and 4GB x8 NAND flash
 - 16MB SPI flash

Signed-off-by: Mingkai Hu mingkai...@freescale.com
Singed-off-by: Po Liu po@freescale.com
---
Changes for v2:
- Remove define CONFIG_C291/CONFIG_C292/CONFIG_C293,
  replace with CONFIG_C29X
- Adjust the TLB config mode
- Add SEC node removal method by check the CPU SVR
- Clean up the C29XPCIE.h file
Changes for v3:
- Replace CONFIG_C29X with CONFIG_PPC_C29X
 board/freescale/c29xpcie/Makefile   |  34 +++
 board/freescale/c29xpcie/c29xpcie.c | 150 +++
 board/freescale/c29xpcie/cpld.c | 155 
 board/freescale/c29xpcie/cpld.h |  53 
 board/freescale/c29xpcie/ddr.c  |  89 +++
 board/freescale/c29xpcie/law.c  |  22 ++
 board/freescale/c29xpcie/tlb.c  |  89 +++
 boards.cfg  |   2 +
 include/configs/C29XPCIE.h  | 490 
 9 files changed, 1084 insertions(+)
 create mode 100644 board/freescale/c29xpcie/Makefile
 create mode 100644 board/freescale/c29xpcie/c29xpcie.c
 create mode 100644 board/freescale/c29xpcie/cpld.c
 create mode 100644 board/freescale/c29xpcie/cpld.h
 create mode 100644 board/freescale/c29xpcie/ddr.c
 create mode 100644 board/freescale/c29xpcie/law.c
 create mode 100644 board/freescale/c29xpcie/tlb.c
 create mode 100644 include/configs/C29XPCIE.h

diff --git a/board/freescale/c29xpcie/Makefile 
b/board/freescale/c29xpcie/Makefile
new file mode 100644
index 000..15bef9a
--- /dev/null
+++ b/board/freescale/c29xpcie/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS-y+= $(BOARD).o
+COBJS-y+= cpld.o
+COBJS-y+= ddr.o
+COBJS-y+= law.o
+COBJS-y+= tlb.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/freescale/c29xpcie/c29xpcie.c 
b/board/freescale/c29xpcie/c29xpcie.c
new file mode 100644
index 000..21f3892
--- /dev/null
+++ b/board/freescale/c29xpcie/c29xpcie.c
@@ -0,0 +1,150 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include common.h
+#include asm/processor.h
+#include asm/mmu.h
+#include asm/cache.h
+#include asm/immap_85xx.h
+#include asm/io.h
+#include miiphy.h
+#include libfdt.h
+#include fdt_support.h
+#include fsl_mdio.h
+#include tsec.h
+#include mmc.h
+#include netdev.h
+#include pci.h
+#include asm/fsl_ifc.h
+#include asm/fsl_pci.h
+
+#include cpld.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+   struct cpu_type *cpu = gd-arch.cpu;
+
+   printf(Board: %sPCIe, , cpu-name);
+   printf(CPLD Ver: 0x%02x\n, CPLD_READ(cpldver));
+
+   return 0;
+}
+
+int board_early_init_f(void)
+{
+   struct fsl_ifc *ifc = (void *)CONFIG_SYS_IFC_ADDR;
+
+   /* Clock configuration to access CPLD using IFC(GPCM) */
+   setbits_be32(ifc-ifc_gcr, 1  IFC_GCR_TBCTL_TRN_TIME_SHIFT);
+
+   return 0;
+}
+
+int board_early_init_r(void)
+{
+   const unsigned long flashbase = CONFIG_SYS_FLASH_BASE;
+   const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+
+   /*
+* Remap Boot flash region to caching-inhibited
+* so that flash can be erased properly.
+*/
+
+   /* Flush d-cache and invalidate i-cache of any FLASH data */
+   flush_dcache();
+   invalidate_icache();
+
+   /* invalidate existing TLB entry for flash */
+   disable_tlb(flash_esel);
+
+   set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
+   MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+   0, flash_esel, BOOKE_PAGESZ_64M, 1);
+
+   return 0;
+}
+

Re: [U-Boot] [PATCH v2 2/4] arm:goni:dfu Add support for DFU at GONI target

2013-07-02 Thread Minkyu Kang
On 26/06/13 19:23, Lukasz Majewski wrote:
 From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
 
 Proper adjustment for supporting DFU at GONI target has been made.
 The s5p_goni.h file has been updated. Moreover the code for low level
 USB initialization has been added to GONI board code.
 
 Signed-off-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 Tested-by: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
 Cc: Minkyu Kang mk7.k...@samsung.com
 
 ---
 Changes for v2:
 - Remove blank line
 ---
  board/samsung/goni/goni.c  |7 +++
  include/configs/s5p_goni.h |   20 +++-
  2 files changed, 26 insertions(+), 1 deletion(-)
 
 diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
 index ff76963..3c53106 100644
 --- a/board/samsung/goni/goni.c
 +++ b/board/samsung/goni/goni.c
 @@ -155,4 +155,11 @@ struct s3c_plat_otg_data s5pc110_otg_data = {
   .regs_otg = S5PC110_OTG_BASE,
   .usb_phy_ctrl = S5PC110_USB_PHY_CONTROL,
  };
 +
 +void board_usb_init(void)
 +{
 + debug(USB_udc_probe\n);
 + s3c_udc_probe(s5pc110_otg_data);
 +}
 +
  #endif
 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
 index ec43652..8a824c7 100644
 --- a/include/configs/s5p_goni.h
 +++ b/include/configs/s5p_goni.h
 @@ -86,6 +86,17 @@
  #define CONFIG_CMD_ONENAND
  #define CONFIG_CMD_MTDPARTS
  #define CONFIG_CMD_MMC
 +#define CONFIG_CMD_DFU
 +
 +/* USB Composite download gadget - g_dnl */
 +#define CONFIG_USBDOWNLOAD_GADGET
 +#define CONFIG_DFU_FUNCTION
 +#define CONFIG_DFU_MMC
 +
 +/* USB Samsung's IDs */
 +#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
 +#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
 +#define CONFIG_G_DNL_MANUFACTURER Samsung
  
  #define CONFIG_BOOTDELAY 1
  #define CONFIG_ZERO_BOOTDELAY_CHECK
 @@ -105,6 +116,10 @@
   ,60m(qboot)\
   ,-(UBI)\0
  
 +#define CONFIG_DFU_ALT \
 + u-boot mmc 80 400; \
 + uImage fat 0 2\0 \
 +
  #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
  
  #define CONFIG_BOOTCOMMAND   run mmcboot
 @@ -175,7 +190,9 @@
   bootblock=9\0 \
   ubiblock=8\0 \
   ubi=enabled\0 \
 - opts=always_resume=1
 + opts=always_resume=1\0 \
 + dfu_alt_info= CONFIG_DFU_ALT
  
  /* Miscellaneous configurable options */
  #define CONFIG_SYS_LONGHELP  /* undef to save memory */
 @@ -242,5 +259,6 @@
  #define CONFIG_USB_GADGET
  #define CONFIG_USB_GADGET_S3C_UDC_OTG
  #define CONFIG_USB_GADGET_DUALSPEED
 +#define CONFIG_USB_GADGET_VBUS_DRAW 2
  
  #endif   /* __CONFIG_H */
 

failed to apply your patch.

$ git am -s U-Boot-2-4-arm-goni-dfu-Add-support-for-DFU-at-GONI-target.patch
Applying: arm:goni:dfu Add support for DFU at GONI target
fatal: corrupt patch at line 75
Patch failed at 0001 arm:goni:dfu Add support for DFU at GONI target


$ patch --dry-run -p1  
U-Boot-2-4-arm-goni-dfu-Add-support-for-DFU-at-GONI-target.patch 
patching file board/samsung/goni/goni.c
patching file include/configs/s5p_goni.h
patch:  malformed patch at line 99: @@ -242,5 +259,6 @@


please check.

Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH 4/4 V2] EXYNOS: Move files from board/samsung to arch/arm.

2013-07-02 Thread Rajeshwari Birje
Hi Minkyu Kang,

Thank you for comments

On Tue, Jul 2, 2013 at 11:25 AM, Minkyu Kang mk7.k...@samsung.com wrote:
 Dear Rajeshwari,

 On 01/07/13 19:02, Rajeshwari Shinde wrote:
 This patch performs the following:

 1) Convert the assembly code for memory and clock initialization to C code.
 2) Move the memory and clock init codes from board/samsung to arch/arm
 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted
the common lowlevel_init from assembly to C-code
 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5.
 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is 
 already
done in _main.
 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250.

 TEST: Tested SD-MMC boot on SMDK5250 and Origen.
   Tested USB and SPI boot on SMDK5250
   Compile tested for SMDKV310.

 Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
 ---
 Changes in V2:
   - Rebased on latest u-boot-samsung tree.
   - Incorporated review comments from Minkyu Kang.
  arch/arm/cpu/armv7/exynos/Makefile |   17 +-
  .../arm/cpu/armv7/exynos}/clock_init.h |0
  arch/arm/cpu/armv7/exynos/clock_init_exynos4.c |   94 +
  .../arm/cpu/armv7/exynos/clock_init_exynos5.c  |   27 +-
  arch/arm/cpu/armv7/exynos/common_setup.h   |   43 ++
  .../arm/cpu/armv7/exynos}/dmc_common.c |7 +-
  .../arm/cpu/armv7/exynos}/dmc_init_ddr3.c  |   17 +-
  arch/arm/cpu/armv7/exynos/dmc_init_exynos4.c   |  295 ++
  .../arm/cpu/armv7/exynos/exynos4_setup.h   |   97 +-
  .../arm/cpu/armv7/exynos/exynos5_setup.h   |   28 +-
  arch/arm/cpu/armv7/exynos/lowlevel_init.c  |   72 
  .../arm/cpu/armv7/exynos}/spl_boot.c   |   77 +++-
  board/samsung/origen/Makefile  |   11 +-
  board/samsung/origen/lowlevel_init.S   |  357 -
  board/samsung/origen/mem_setup.S   |  421 
 
  board/samsung/origen/mmc_boot.c|   58 ---
  board/samsung/smdk5250/Makefile|   14 +-
  board/samsung/smdkv310/Makefile|   10 +-
  board/samsung/smdkv310/lowlevel_init.S |  414 
 ---
  board/samsung/smdkv310/mem_setup.S |  365 -
  board/samsung/smdkv310/mmc_boot.c  |   60 ---
  include/configs/exynos5250-dt.h|8 +-
  include/configs/origen.h   |9 +-
  include/configs/smdkv310.h |8 +-
  24 files changed, 743 insertions(+), 1766 deletions(-)
  rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/clock_init.h 
 (100%)
  create mode 100644 arch/arm/cpu/armv7/exynos/clock_init_exynos4.c
  rename board/samsung/smdk5250/clock_init.c = 
 arch/arm/cpu/armv7/exynos/clock_init_exynos5.c (97%)
  create mode 100644 arch/arm/cpu/armv7/exynos/common_setup.h
  rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/dmc_common.c 
 (97%)
  rename {board/samsung/smdk5250 = 
 arch/arm/cpu/armv7/exynos}/dmc_init_ddr3.c (96%)
  create mode 100644 arch/arm/cpu/armv7/exynos/dmc_init_exynos4.c
  rename board/samsung/origen/origen_setup.h = 
 arch/arm/cpu/armv7/exynos/exynos4_setup.h (86%)
  rename board/samsung/smdk5250/setup.h = 
 arch/arm/cpu/armv7/exynos/exynos5_setup.h (96%)
  create mode 100644 arch/arm/cpu/armv7/exynos/lowlevel_init.c
  rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/spl_boot.c 
 (73%)
  delete mode 100644 board/samsung/origen/lowlevel_init.S
  delete mode 100644 board/samsung/origen/mem_setup.S
  delete mode 100644 board/samsung/origen/mmc_boot.c
  delete mode 100644 board/samsung/smdkv310/lowlevel_init.S
  delete mode 100644 board/samsung/smdkv310/mem_setup.S
  delete mode 100644 board/samsung/smdkv310/mmc_boot.c

 diff --git a/arch/arm/cpu/armv7/exynos/Makefile 
 b/arch/arm/cpu/armv7/exynos/Makefile
 index b2f9152..4661155 100644
 --- a/arch/arm/cpu/armv7/exynos/Makefile
 +++ b/arch/arm/cpu/armv7/exynos/Makefile
 @@ -22,10 +22,19 @@ include $(TOPDIR)/config.mk

  LIB  = $(obj)lib$(SOC).o

 -COBJS+= clock.o power.o soc.o system.o pinmux.o tzpc.o
 -
 -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 -OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
 +COBJS-y  += clock.o power.o soc.o system.o pinmux.o tzpc.o
 +
 +ifdef CONFIG_SPL_BUILD
 +COBJS-$(CONFIG_EXYNOS5)  += clock_init_exynos5.o
 +COBJS-$(CONFIG_EXYNOS5)  += dmc_common.o dmc_init_ddr3.o
 +COBJS-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o
 +COBJS-y  += spl_boot.o
 +COBJS-y  += lowlevel_init.o
 +endif
 +
 +COBJS   := $(COBJS-y)
 +SRCS := $(COBJS:.o=.c)
 +OBJS := $(addprefix $(obj),$(COBJS))

  all:  $(obj).depend $(LIB)

 diff --git a/board/samsung/smdk5250/clock_init.h 
 b/arch/arm/cpu/armv7/exynos/clock_init.h
 similarity index 100%
 rename from 

Re: [U-Boot] [PATCH v5 1/3] Prepare for TI816X : reuse existing code from TI814X

2013-07-02 Thread TENART Antoine
Dear Wolfgang,

 Hmmm... should not any boards that used to set CONFIG_TI814X in their
 board config files (ti814x_evm) now also set CONFIG_TI81XX ?

ti814x_evm already has it.
No other board use CONFIG_TI814X.

 Please also fix the typo in the commit message:
 s/CONFIG_81XX/CONFIG_TI81XX/

Right, I'll fix that.


Regards,

-- 
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[U-Boot] UART output has problems with latest uboot source code on S5PC100 board

2013-07-02 Thread TigerLiu
Hi, Samsung Engineers:
I have a S5PC100 development board.
I tried to use latest uboot code to boot, and UART output has bugs.
It would lose many messages.
I use UART0 as the default com port.

Have you ever tried latest uboot code on S5PC100 board?

Best wishes,
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[U-Boot] [PATCH v6 0/3] Add TI816X EVM support

2013-07-02 Thread TENART Antoine
Changes for v6:
- fix typo in commit message

Changes for v5:
- use wd_timer structure for WDT
- remove some magic
- remove memtest and verify from config
- fix a redefinition warning (VTP1_CTRL_ADDR)
- rebase on top of ARM: AM33xx: Cleanup clocks and hwinit

Changes for v4:
- add arch_cpu_init function
- rework the ddr initialization and move it to clock_ti816x.c
- move common definitions from clock_ti814x.c to clock_ti81xx.h

Changes for v3:
- fix a compile error when using DDR2
- rename misspelled CONFIG_EXTRA_ENV_SETTINGS in ti816x_evm.h
  (was CONFIG_EXTRA_EMV_SETTINGS)

Changes for v2:
- patches 2-7 squashed into a single patch Add TI816X support
- removed all unused definitions
- removed my definition of DMM_BASE and reworked the DMM initialization
  using the common config_dmm() from emif4.c
- fixed coding style problems
- now use the fallback CONFIG_SYS_BAUDRATE_TABLE
- kept LONGHELP support
- removed redefinition of the device type section in cpu_ti816x.h

Antoine Tenart (3):
  Prepare for TI816X : reuse existing code from TI814X
  Add TI816X support
  Add TI816X evm board support

 MAINTAINERS|4 +
 Makefile   |2 +-
 arch/arm/cpu/armv7/Makefile|2 +-
 arch/arm/cpu/armv7/am33xx/Makefile |1 +
 arch/arm/cpu/armv7/am33xx/clock_ti814x.c   |   95 -
 arch/arm/cpu/armv7/am33xx/clock_ti816x.c   |  445 
 arch/arm/cpu/armv7/am33xx/emif4.c  |2 +
 arch/arm/cpu/armv7/omap-common/Makefile|2 +-
 arch/arm/include/asm/arch-am33xx/clock.h   |4 +
 arch/arm/include/asm/arch-am33xx/clock_ti81xx.h|  142 +++
 arch/arm/include/asm/arch-am33xx/cpu.h |2 +-
 arch/arm/include/asm/arch-am33xx/ddr_defs.h|   35 +-
 arch/arm/include/asm/arch-am33xx/hardware.h|   10 +-
 arch/arm/include/asm/arch-am33xx/hardware_am33xx.h |6 +
 arch/arm/include/asm/arch-am33xx/hardware_ti814x.h |6 +
 arch/arm/include/asm/arch-am33xx/hardware_ti816x.h |   57 +++
 arch/arm/include/asm/arch-am33xx/mmc_host_def.h|3 +
 arch/arm/include/asm/arch-am33xx/mux.h |2 +
 arch/arm/include/asm/arch-am33xx/mux_ti816x.h  |  363 
 arch/arm/include/asm/arch-am33xx/omap.h|2 +-
 arch/arm/include/asm/arch-am33xx/spl.h |   11 +-
 board/ti/ti816x/Makefile   |   47 +++
 board/ti/ti816x/evm.c  |  229 ++
 boards.cfg |1 +
 drivers/serial/ns16550.c   |4 +-
 include/configs/ti816x_evm.h   |  180 
 spl/Makefile   |2 +-
 27 files changed, 1534 insertions(+), 125 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/am33xx/clock_ti816x.c
 create mode 100644 arch/arm/include/asm/arch-am33xx/clock_ti81xx.h
 create mode 100644 arch/arm/include/asm/arch-am33xx/hardware_ti816x.h
 create mode 100644 arch/arm/include/asm/arch-am33xx/mux_ti816x.h
 create mode 100644 board/ti/ti816x/Makefile
 create mode 100644 board/ti/ti816x/evm.c
 create mode 100644 include/configs/ti816x_evm.h

-- 
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[U-Boot] [PATCH v6 1/3] Prepare for TI816X : reuse existing code from TI814X

2013-07-02 Thread TENART Antoine
Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX

Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
 Makefile|2 +-
 arch/arm/cpu/armv7/Makefile |2 +-
 arch/arm/cpu/armv7/omap-common/Makefile |2 +-
 arch/arm/include/asm/arch-am33xx/cpu.h  |2 +-
 arch/arm/include/asm/arch-am33xx/omap.h |2 +-
 drivers/serial/ns16550.c|4 ++--
 spl/Makefile|2 +-
 7 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/Makefile b/Makefile
index ba1c10b..1829565 100644
--- a/Makefile
+++ b/Makefile
@@ -338,7 +338,7 @@ LIBS-y += api/libapi.o
 LIBS-y += post/libpost.o
 LIBS-y += test/libtest.o
 
-ifneq 
($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
+ifneq 
($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI81XX),)
 LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
 endif
 
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 7a8c2d0..415ace8 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -32,7 +32,7 @@ COBJS += cache_v7.o
 COBJS  += cpu.o
 COBJS  += syslib.o
 
-ifneq 
($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI814X),)
+ifneq 
($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX),)
 SOBJS  += lowlevel_init.o
 endif
 
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile 
b/arch/arm/cpu/armv7/omap-common/Makefile
index c4b9809..20586d3 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -37,7 +37,7 @@ COBJS += vc.o
 COBJS  += abb.o
 endif
 
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
+ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI81XX),)
 COBJS  += boot-common.o
 SOBJS  += lowlevel_init.o
 endif
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h 
b/arch/arm/include/asm/arch-am33xx/cpu.h
index 3d3a7c8..13c0667 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -54,7 +54,7 @@
 /* Reset control */
 #ifdef CONFIG_AM33XX
 #define PRM_RSTCTRL(PRCM_BASE + 0x0F00)
-#elif defined(CONFIG_TI814X)
+#elif defined(CONFIG_TI81XX)
 #define PRM_RSTCTRL(PRCM_BASE + 0x00A0)
 #endif
 #define PRM_RSTST  (PRM_RSTCTRL + 8)
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h 
b/arch/arm/include/asm/arch-am33xx/omap.h
index e7576c1..777a456 100644
--- a/arch/arm/include/asm/arch-am33xx/omap.h
+++ b/arch/arm/include/asm/arch-am33xx/omap.h
@@ -32,7 +32,7 @@
 #define NON_SECURE_SRAM_START  0x402F0400
 #define NON_SECURE_SRAM_END0x4031
 #define SRAM_SCRATCH_SPACE_ADDR0x4030C000
-#elif defined(CONFIG_TI814X)
+#elif defined(CONFIG_TI81XX)
 #define NON_SECURE_SRAM_START  0x4030
 #define NON_SECURE_SRAM_END0x4032
 #define SRAM_SCRATCH_SPACE_ADDR0x4031B800
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index d77c25f..d659eb0 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -57,7 +57,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
 
serial_out(CONFIG_SYS_NS16550_IER, com_port-ier);
 #if (defined(CONFIG_OMAP)  !defined(CONFIG_OMAP3_ZOOM2)) || \
-   defined(CONFIG_AM33XX) || defined(CONFIG_TI814X)
+   defined(CONFIG_AM33XX) || defined(CONFIG_TI81XX)
serial_out(0x7, com_port-mdr1);   /* mode select reset TL16C750*/
 #endif
serial_out(UART_LCR_BKSE | UART_LCRVAL, com_port-lcr);
@@ -72,7 +72,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
serial_out(UART_LCRVAL, com_port-lcr);
 #if (defined(CONFIG_OMAP)  !defined(CONFIG_OMAP3_ZOOM2)) || \
defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
-   defined(CONFIG_TI814X)
+   defined(CONFIG_TI81XX)
 
/* /16 is proper to hit 115200 with 48MHz */
serial_out(0, com_port-mdr1);
diff --git a/spl/Makefile b/spl/Makefile
index 01873de..6a91239 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -84,7 +84,7 @@ LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/phy/libphy.o
 LIBS-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/libusb_musb-new.o
 LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/libusb_gadget.o
 
-ifneq 
($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
+ifneq 
($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI81XX),)
 LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
 endif
 
-- 
1.7.10.4
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[U-Boot] [PATCH v6 2/3] Add TI816X support

2013-07-02 Thread TENART Antoine
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
 arch/arm/cpu/armv7/am33xx/Makefile |1 +
 arch/arm/cpu/armv7/am33xx/clock_ti814x.c   |   95 -
 arch/arm/cpu/armv7/am33xx/clock_ti816x.c   |  445 
 arch/arm/cpu/armv7/am33xx/emif4.c  |2 +
 arch/arm/include/asm/arch-am33xx/clock.h   |4 +
 arch/arm/include/asm/arch-am33xx/clock_ti81xx.h|  142 +++
 arch/arm/include/asm/arch-am33xx/ddr_defs.h|   35 +-
 arch/arm/include/asm/arch-am33xx/hardware.h|   10 +-
 arch/arm/include/asm/arch-am33xx/hardware_am33xx.h |6 +
 arch/arm/include/asm/arch-am33xx/hardware_ti814x.h |6 +
 arch/arm/include/asm/arch-am33xx/hardware_ti816x.h |   57 +++
 arch/arm/include/asm/arch-am33xx/mmc_host_def.h|3 +
 arch/arm/include/asm/arch-am33xx/mux.h |2 +
 arch/arm/include/asm/arch-am33xx/mux_ti816x.h  |  363 
 arch/arm/include/asm/arch-am33xx/spl.h |   11 +-
 15 files changed, 1065 insertions(+), 117 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/am33xx/clock_ti816x.c
 create mode 100644 arch/arm/include/asm/arch-am33xx/clock_ti81xx.h
 create mode 100644 arch/arm/include/asm/arch-am33xx/hardware_ti816x.h
 create mode 100644 arch/arm/include/asm/arch-am33xx/mux_ti816x.h

diff --git a/arch/arm/cpu/armv7/am33xx/Makefile 
b/arch/arm/cpu/armv7/am33xx/Makefile
index f4ccd2a..8cb7efb 100644
--- a/arch/arm/cpu/armv7/am33xx/Makefile
+++ b/arch/arm/cpu/armv7/am33xx/Makefile
@@ -18,6 +18,7 @@ LIB   = $(obj)lib$(SOC).o
 
 COBJS-$(CONFIG_AM33XX) += clock_am33xx.o
 COBJS-$(CONFIG_TI814X) += clock_ti814x.o
+COBJS-$(CONFIG_TI816X) += clock_ti816x.o
 COBJS-$(CONFIG_AM33XX) += clock.o
 COBJS  += sys_info.o
 COBJS  += mem.o
diff --git a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c 
b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
index ca7d7ad..17913e7 100644
--- a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
@@ -108,103 +108,8 @@ struct ad_pll {
 
 #define OSC_SRC_CTRL   (PLL_SUBSYS_BASE + 0x2C0)
 
-/* PRCM */
 #define ENET_CLKCTRL_CMPL  0x3
 
-#define CM_DEFAULT_BASE(PRCM_BASE + 0x0500)
-
-struct cm_def {
-   unsigned int resv0[2];
-   unsigned int l3fastclkstctrl;
-   unsigned int resv1[1];
-   unsigned int pciclkstctrl;
-   unsigned int resv2[1];
-   unsigned int ducaticlkstctrl;
-   unsigned int resv3[1];
-   unsigned int emif0clkctrl;
-   unsigned int emif1clkctrl;
-   unsigned int dmmclkctrl;
-   unsigned int fwclkctrl;
-   unsigned int resv4[10];
-   unsigned int usbclkctrl;
-   unsigned int resv5[1];
-   unsigned int sataclkctrl;
-   unsigned int resv6[4];
-   unsigned int ducaticlkctrl;
-   unsigned int pciclkctrl;
-};
-
-#define CM_ALWON_BASE  (PRCM_BASE + 0x1400)
-
-struct cm_alwon {
-   unsigned int l3slowclkstctrl;
-   unsigned int ethclkstctrl;
-   unsigned int l3medclkstctrl;
-   unsigned int mmu_clkstctrl;
-   unsigned int mmucfg_clkstctrl;
-   unsigned int ocmc0clkstctrl;
-   unsigned int vcpclkstctrl;
-   unsigned int mpuclkstctrl;
-   unsigned int sysclk4clkstctrl;
-   unsigned int sysclk5clkstctrl;
-   unsigned int sysclk6clkstctrl;
-   unsigned int rtcclkstctrl;
-   unsigned int l3fastclkstctrl;
-   unsigned int resv0[67];
-   unsigned int mcasp0clkctrl;
-   unsigned int mcasp1clkctrl;
-   unsigned int mcasp2clkctrl;
-   unsigned int mcbspclkctrl;
-   unsigned int uart0clkctrl;
-   unsigned int uart1clkctrl;
-   unsigned int uart2clkctrl;
-   unsigned int gpio0clkctrl;
-   unsigned int gpio1clkctrl;
-   unsigned int i2c0clkctrl;
-   unsigned int i2c1clkctrl;
-   unsigned int mcasp345clkctrl;
-   unsigned int atlclkctrl;
-   unsigned int mlbclkctrl;
-   unsigned int pataclkctrl;
-   unsigned int resv1[1];
-   unsigned int uart3clkctrl;
-   unsigned int uart4clkctrl;
-   unsigned int uart5clkctrl;
-   unsigned int wdtimerclkctrl;
-   unsigned int spiclkctrl;
-   unsigned int mailboxclkctrl;
-   unsigned int spinboxclkctrl;
-   unsigned int mmudataclkctrl;
-   unsigned int resv2[2];
-   unsigned int mmucfgclkctrl;
-   unsigned int resv3[2];
-   unsigned int ocmc0clkctrl;
-   unsigned int vcpclkctrl;
-   unsigned int resv4[2];
-   unsigned int controlclkctrl;
-   unsigned int resv5[2];
-   unsigned int gpmcclkctrl;
-   unsigned int ethernet0clkctrl;
-   unsigned int ethernet1clkctrl;
-   unsigned int mpuclkctrl;
-   unsigned int debugssclkctrl;
-   unsigned int l3clkctrl;
-   unsigned int l4hsclkctrl;
-   unsigned int l4lsclkctrl;
-   unsigned int rtcclkctrl;
-   unsigned int tpccclkctrl;
-   unsigned int tptc0clkctrl;
-   unsigned int 

[U-Boot] [PATCH v6 3/3] Add TI816X evm board support

2013-07-02 Thread TENART Antoine
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
 MAINTAINERS  |4 +
 board/ti/ti816x/Makefile |   47 +
 board/ti/ti816x/evm.c|  229 ++
 boards.cfg   |1 +
 include/configs/ti816x_evm.h |  180 +
 5 files changed, 461 insertions(+)
 create mode 100644 board/ti/ti816x/Makefile
 create mode 100644 board/ti/ti816x/evm.c
 create mode 100644 include/configs/ti816x_evm.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 3e70b03..d4a89e3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -943,6 +943,10 @@ Lucas Stach d...@lynxeye.de
 
colibri_t20_irisTegra20 (ARM7  A9 Dual Core)
 
+Antoine Tenart aten...@adeneo-embedded.com
+
+   TI816X  ARM ARMV7 (TI816x Soc)
+
 Nick Thompson nick.thomp...@gefanuc.com
 
da830evmARM926EJS (DA830/OMAP-L137)
diff --git a/board/ti/ti816x/Makefile b/board/ti/ti816x/Makefile
new file mode 100644
index 000..dc23d93
--- /dev/null
+++ b/board/ti/ti816x/Makefile
@@ -0,0 +1,47 @@
+#
+# Copyright (C) 2013, Adeneo Embedded www.adeneo-embedded.com
+# Antoine Tenart, aten...@adeneo-embedded.com
+#
+# Based on TI-PSP-04.00.02.14 :
+#
+# Copyright (C) 2009, Texas Instruments, Incorporated
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation version 2.
+#
+# This program is distributed as is WITHOUT ANY WARRANTY of any
+# kind, whether express or implied; without even the implied warranty
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := evm.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+clean:
+   rm -f $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c
new file mode 100644
index 000..632ad9f
--- /dev/null
+++ b/board/ti/ti816x/evm.c
@@ -0,0 +1,229 @@
+/*
+ * evm.c
+ *
+ * Copyright (C) 2013, Adeneo Embedded www.adeneo-embedded.com
+ * Antoine Tenart, aten...@adeneo-embedded.com
+ *
+ * This file is released under the terms of GPL v2 and any later version.
+ * See the file COPYING in the root directory of the source tree for details.
+ */
+
+#include common.h
+#include spl.h
+#include asm/cache.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/cpu.h
+#include asm/arch/ddr_defs.h
+#include asm/arch/hardware.h
+#include asm/arch/sys_proto.h
+#include asm/arch/mmc_host_def.h
+#include asm/arch/mem.h
+#include asm/arch/mux.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+   gd-bd-bi_boot_params = PHYS_DRAM_1 + 0x100;
+   return 0;
+}
+
+#ifdef CONFIG_SPL_BUILD
+
+static struct module_pin_mux mmc_pin_mux[] = {
+   { OFFSET(pincntl157), PULLDOWN_EN | PULLUDDIS | MODE(0x0) },
+   { OFFSET(pincntl158), PULLDOWN_EN | PULLUDEN | MODE(0x0) },
+   { OFFSET(pincntl159), PULLUP_EN | PULLUDDIS | MODE(0x0) },
+   { OFFSET(pincntl160), PULLUP_EN | PULLUDDIS | MODE(0x0) },
+   { OFFSET(pincntl161), PULLUP_EN | PULLUDDIS | MODE(0x0) },
+   { OFFSET(pincntl162), PULLUP_EN | PULLUDDIS | MODE(0x0) },
+   { OFFSET(pincntl163), PULLUP_EN | PULLUDDIS | MODE(0x0) },
+   { -1 },
+};
+
+const struct dmm_lisa_map_regs evm_lisa_map_regs = {
+   .dmm_lisa_map_0 = 0x,
+   .dmm_lisa_map_1 = 0x,
+   .dmm_lisa_map_2 = 0x80640300,
+   .dmm_lisa_map_3 = 0xC0640320,
+};
+
+/*
+ * DDR2 related definitions
+ */
+
+static struct ddr_data ddr2_data = {
+   .datardsratio0  = ((0x4010) | (0x400)),
+   .datawdsratio0  = ((0x4A10) | (0x4A0)),
+   .datawiratio0   = ((0x010) | (0x00)),
+   .datagiratio0   = ((0x010) | (0x00)),
+   .datafwsratio0  = ((0x13A10) | (0x13A0)),
+   .datawrsratio0  = ((0x8A10) | (0x8A0)),
+   .datauserank0delay  = 0x1,
+   .datadldiff0= 0x0, /* depend on cpu rev, set later */
+};
+
+static struct cmd_control ddr2_ctrl = {
+   .cmd0csratio= 0x80,
+   .cmd0dldiff = 0x04, /* reset value is 0x4 */
+   .cmd0iclkout= 0x00,
+
+   .cmd1csratio= 0x80,
+   .cmd1dldiff = 0x04, /* reset value is 0x4 */
+   .cmd1iclkout= 0x00,
+
+   .cmd2csratio= 0x80,
+   .cmd2dldiff = 0x04, /* reset value is 0x4 */
+  

Re: [U-Boot] [ANN] v2013.07-rc2

2013-07-02 Thread Andreas Bießmann
Hi,

On 07/01/2013 10:44 PM, Robert Nelson wrote:
 On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
 Hey all,

 I've tagged and pushed v2013.07-rc2.  A bit more over the place than I
 should have gone, but picked up a lot of things that have been
 outstanding for a while.  The big thing is a refactor of the boot loop.
 Everything should be working right now, but please test.  Related to
 this is the ability to have crytpographically signed images.  It's like
 secure boot in UEFI land, but hopefully without the kerfuffle.

 If you've got changes outstanding still, please start gently poking
 custodians with patchwork links.  I've got a good bit of stuff I need to
 deal with myself still, but please prod me all the same.
 
 So, the bootm refactor ( 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 )
 also broke bootz/zImage...

and also bootm for uImage on avr32 ... will investigate it these days.

Best regards

Andreas Bießmann
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Re: [U-Boot] [PATCH v2] cmd_bootm.c: Correct BOOTM_ERR_OVERLAP handling

2013-07-02 Thread Andreas Bießmann
Hi all,

On 06/28/2013 11:41 PM, Simon Glass wrote:
 Hi Tom,
 
 On Fri, Jun 28, 2013 at 1:25 PM, Tom Rini tr...@ti.com wrote:

snip

 @@ -660,34 +680,25 @@ static int do_bootm_states(cmd_tbl_t *cmdtp, int
 flag, int argc,
 }
  #endif
 /* Now run the OS! We hope this doesn't return */
 -   if (!ret  (states  BOOTM_STATE_OS_GO))
 +   if (!ret  (states  BOOTM_STATE_OS_GO)) {
 ret = boot_selected_os(argc, argv, BOOTM_STATE_OS_GO,
 images, boot_fn, iflag);
 +   if (ret)
 +   goto err;
 +   }
 +
 +   return ret;

 
 Thanks for getting to the bottom of this.
 
 Just a question here - should this fall through to display the error with
 the code below? For example if the subcommand is not supported...

as pointed out by Simon the error message 'subcommand not supported'
disappears with this patch. On avr32 this means currently:

---8---
## Booting kernel from Legacy Image at 1040 ...
   Image Name:   Linux-3.6.2
   Image Type:   AVR32 Linux Kernel Image (gzip compressed)
   Data Size:1846216 Bytes = 1.8 MiB
   Load Address: 1000
   Entry Point:  9000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
U-Boot
---8---

Before it was at least:
---8---
## Booting kernel from Legacy Image at 1040 ...
   Image Name:   Linux-3.6.2
   Image Type:   AVR32 Linux Kernel Image (gzip compressed)
   Data Size:1846216 Bytes = 1.8 MiB
   Load Address: 1000
   Entry Point:  9000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
subcommand not supported
U-Boot
---8---

Who will fix that? I'll have a look for the avr32 specific part.

Regards

Andreas Bießmann

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[U-Boot] [PATCH] powerpc/mpc85xx: Add defines for serdes RSTCTL register

2013-07-02 Thread Shaveta Leekha
Also change the define name SRDS_RSTCTL_SDPD to
SRDS_RSTCTL_SDEN, which stands for SerDes enable
as mentioned in SerDes module guide

Signed-off-by: Shaveta Leekha shav...@freescale.com
---
 arch/powerpc/include/asm/immap_85xx.h |4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/include/asm/immap_85xx.h 
b/arch/powerpc/include/asm/immap_85xx.h
index db70d04..e236e7a 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2542,7 +2542,9 @@ typedef struct serdes_corenet {
 #define SRDS_RSTCTL_RSTDONE0x4000
 #define SRDS_RSTCTL_RSTERR 0x2000
 #define SRDS_RSTCTL_SWRST  0x1000
-#define SRDS_RSTCTL_SDPD   0x0020
+#define SRDS_RSTCTL_SDEN   0x0020
+#define SRDS_RSTCTL_SDRST_B0x0040
+#define SRDS_RSTCTL_PLLRST_B   0x0080
u32 pllcr0; /* PLL Control Register 0 */
 #define SRDS_PLLCR0_POFF   0x8000
 #define SRDS_PLLCR0_RFCK_SEL_MASK  0x7000
-- 
1.7.6.GIT


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[U-Boot] [PATCH] powerpc/asm: Move function declaration of 'serdes_get_prtcl' to fsl_serdes.h

2013-07-02 Thread Shaveta Leekha
It allows files not in the same path to use this function
as required by B4 board file

Signed-off-by: Shaveta Leekha shav...@freescale.com
---
 arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.h |1 -
 arch/powerpc/include/asm/fsl_serdes.h  |1 +
 2 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.h 
b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.h
index 2258f41..485427a 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.h
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.h
@@ -22,5 +22,4 @@
 
 int is_serdes_prtcl_valid(int serdes, u32 prtcl);
 int serdes_lane_enabled(int lane);
-enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
 #endif /* __FSL_CORENET2_SERDES_H */
diff --git a/arch/powerpc/include/asm/fsl_serdes.h 
b/arch/powerpc/include/asm/fsl_serdes.h
index ccb91fb..d428e90 100644
--- a/arch/powerpc/include/asm/fsl_serdes.h
+++ b/arch/powerpc/include/asm/fsl_serdes.h
@@ -103,6 +103,7 @@ void fsl_serdes_init(void);
 #ifdef CONFIG_FSL_CORENET
 #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
 int serdes_get_first_lane(u32 sd, enum srds_prtcl device);
+enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
 #else
 int serdes_get_first_lane(enum srds_prtcl device);
 #endif
-- 
1.7.6.GIT


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[U-Boot] [PATCH] board/b4860qds: Add support for configuring SerDes1 Refclks

2013-07-02 Thread Shaveta Leekha
1) Add support in B4860 board files for using IDT driver where
   IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer
   that generate different refclks for SerDes modules, used this driver
   for reconfiguring SerDes1 Refclks(based on SerDes1 protocols)
   for CPRI to work. CPRI works on 122.88MHz and default refclks coming
   on board are not suitable for it
2) Move SerDes1 refclk1 source selection from eth_b4860qds.c file
   to b4860qds board file, as SerDes1 Refclk1 would come from
   PHY MUX in case of certain protocols, that have been checked here.
   This change would make on board SGMIIs to work
3) Add I2C addresses for IDT8T49N222A devices in board/include file
4) Add define for PCA-I2C bus multiplexer, on which IDT devices exist

Signed-off-by: Shaveta Leekha shav...@freescale.com
---
 board/freescale/b4860qds/b4860qds.c |  112 +++
 board/freescale/b4860qds/eth_b4860qds.c |2 -
 include/configs/B4860QDS.h  |7 ++
 3 files changed, 119 insertions(+), 2 deletions(-)

diff --git a/board/freescale/b4860qds/b4860qds.c 
b/board/freescale/b4860qds/b4860qds.c
index a39c17a..e901a0f 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -37,12 +37,14 @@
 
 #include ../common/qixis.h
 #include ../common/vsc3316_3308.h
+#include ../common/idt8t49n222a_serdes_clk.h
 #include b4860qds.h
 #include b4860qds_qixis.h
 #include b4860qds_crossbar_con.h
 
 #define CLK_MUX_SEL_MASK   0x4
 #define ETH_PHY_CLK_OUT0x4
+#define PLL_NUM2
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -268,6 +270,106 @@ int configure_vsc3316_3308(void)
return 0;
 }
 
+int config_serdes1_refclks(void)
+{
+   ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+   serdes_corenet_t *srds_regs =
+   (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+   u32 serdes1_prtcl, lane;
+   unsigned int flag_sgmii_prtcl = 0;
+   int ret, i;
+
+   serdes1_prtcl = in_be32(gur-rcwsr[4]) 
+   FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
+   if (!serdes1_prtcl) {
+   printf(SERDES1 is not enabled\n);
+   return -1;
+   }
+   serdes1_prtcl = FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
+   debug(Using SERDES1 Protocol: 0x%x:\n, serdes1_prtcl);
+
+   /* Clear SRDS_RSTCTL_RST bit for both PLLs before changing refclks
+*/
+   for (i = 0; i  PLL_NUM; i++)
+   clrbits_be32(srds_regs-bank[i].rstctl, SRDS_RSTCTL_RST);
+   /* Reconfigure IDT idt8t49n222a device for CPRI to work
+* For this SerDes1's Refclk1 and refclk2 need to be set
+* to 122.88MHz
+*/
+   switch (serdes1_prtcl) {
+   case 0x2A:
+   case 0x2C:
+   case 0x2D:
+   case 0x2E:
+   debug(Configuring idt8t49n222a for CPRI SerDes clks:
+for srds_prctl:%x\n, serdes1_prtcl);
+   ret = select_i2c_ch_pca(I2C_CH_IDT);
+   if (!ret) {
+   ret = set_serdes_refclk(IDT_SERDES1_ADDRESS, 1,
+   SERDES_REFCLK_122_88,
+   SERDES_REFCLK_122_88, 0);
+   if (ret) {
+   printf(IDT8T49N222A configuration failed.\n);
+   return ret;
+   } else
+   printf(IDT8T49N222A configured.\n);
+   } else {
+   return ret;
+   }
+   select_i2c_ch_pca(I2C_CH_DEFAULT);
+
+   /* Change SerDes1's Refclk1 to 125MHz for on board
+* SGMIIs to work
+*/
+   for (lane = 0; lane  SRDS_MAX_LANES; lane++) {
+   enum srds_prtcl lane_prtcl = serdes_get_prtcl
+   (0, serdes1_prtcl, lane);
+   switch (lane_prtcl) {
+   case SGMII_FM1_DTSEC1:
+   case SGMII_FM1_DTSEC2:
+   case SGMII_FM1_DTSEC3:
+   case SGMII_FM1_DTSEC4:
+   case SGMII_FM1_DTSEC5:
+   case SGMII_FM1_DTSEC6:
+   flag_sgmii_prtcl++;
+   break;
+   default:
+   break;
+   }
+   }
+
+   if (flag_sgmii_prtcl)
+   QIXIS_WRITE(brdcfg[4], QIXIS_SRDS1CLK_125);
+
+   /* Steps For SerDes PLLs reset and reconfiguration after
+* changing SerDes's refclks
+*/
+   for (i = 0; i  PLL_NUM; i++) {
+   debug(For PLL%d reset and reconfiguration after
+   changing refclks\n, i+1);
+   clrbits_be32(srds_regs-bank[i].rstctl,
+

Re: [U-Boot] [PATCH 1/2] powerpc/83xx/km: MV88e6122 errata fix for 1.9V

2013-07-02 Thread Holger Brunck
Hi Kim,

On 05/22/2013 01:12 AM, Kim Phillips wrote:
 On Mon, 6 May 2013 15:02:39 +0200
 Holger Brunck holger.bru...@keymile.com wrote:
 
 Errata Fix: 1.9V Output from Internal 1.8V Regulator, acc.
 MV-S300889-00D.pdf , clause 4.5

 Signed-off-by: Holger Brunck holger.bru...@keymile.com
 ---
 
 patches 1-2 applied to mpc83xx/next.
 

I wonder what happened to these patches. I see them in your tree but not in
u-boot mainline. Did you miss to send a pull request?

Anyway it's no problem for us if they get in within the next merge window.

Regards
Holger

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Re: [U-Boot] [PATCH] powerpc/mpc85xx: Enabling CPC conditionally based on hwconfig options

2013-07-02 Thread Singh Sandeep-B37400
Sorry somehow I missed this earlier. Please find my reply inline.

Regards,
Sandeep


 -Original Message-
 From: Wood Scott-B07421
 Sent: 15 June 2013 01:09
 To: Singh Sandeep-B37400
 Cc: Wood Scott-B07421; u-boot@lists.denx.de; aflem...@gmail.com
 Subject: Re: [U-Boot] [PATCH] powerpc/mpc85xx: Enabling CPC conditionally
 based on hwconfig options
 
 On 06/14/2013 12:26:18 AM, Singh Sandeep-B37400 wrote:
  This was done with the intension of providing greater
  configurability. When
  en_cpc is defined then it's entirely up to user to decide which cpcs
  are to
  be enabled. Hence we do following:
 
  if_defined(en_cpc){
  only_then
  check_for_cpc_options;
  } else {
  enable_all_cpc;
  }
 
 OK, I see.
 
 What is the use case for enabling one cpc but not another?  What is the
 use case for disabling cpc at all?  The answer should go in the commit
 message.

In B4860, Starcore owns one CPC and second CPC is owned by PowerPC. So we need 
to enable only one CPC at u-boot.

 
 -Scott

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[U-Boot] [PATCH] board/freescale/common: IDT8T49N222A configuration code

2013-07-02 Thread Shaveta Leekha
Add code for configuring IDT8T49N222A device for various output refclks
- The IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer 
with
  alarm and monitoring functions suitable for networking and
  communications applications. It is able to generate wide range of output
  frequencies.
- In B4860QDS, it has been used to generate different refclks to SerDes 
modules
- Programming of these devices are performed by I2C interface.

Signed-off-by: Shaveta Leekha shav...@freescale.com
---
 board/freescale/common/Makefile  |1 +
 board/freescale/common/idt8t49n222a_serdes_clk.c |  220 ++
 board/freescale/common/idt8t49n222a_serdes_clk.h |  120 
 3 files changed, 341 insertions(+), 0 deletions(-)
 create mode 100644 board/freescale/common/idt8t49n222a_serdes_clk.c
 create mode 100644 board/freescale/common/idt8t49n222a_serdes_clk.h

diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 37236d0..a550e5a 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -70,6 +70,7 @@ COBJS-$(CONFIG_P4080DS)   += ics307_clk.o
 COBJS-$(CONFIG_P5020DS)+= ics307_clk.o
 COBJS-$(CONFIG_P5040DS)+= ics307_clk.o
 COBJS-$(CONFIG_VSC_CROSSBAR)+= vsc3316_3308.o
+COBJS-$(CONFIG_IDT8T49N222A)   += idt8t49n222a_serdes_clk.o
 
 # deal with common files for P-series corenet based devices
 SUBLIB-$(CONFIG_P2041RDB)  += p_corenet/libp_corenet.o
diff --git a/board/freescale/common/idt8t49n222a_serdes_clk.c 
b/board/freescale/common/idt8t49n222a_serdes_clk.c
new file mode 100644
index 000..8798c87
--- /dev/null
+++ b/board/freescale/common/idt8t49n222a_serdes_clk.c
@@ -0,0 +1,220 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ * Author: Shaveta Leekha shav...@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include idt8t49n222a_serdes_clk.h
+
+#define DEVICE_ID_REG  0x00
+
+static int check_pll_status(u8 idt_addr)
+{
+   u8 val = 0;
+   int ret;
+
+   ret = i2c_read(idt_addr, 0x17, 1, val, 1);
+   if (ret  0) {
+   printf(IDT:0x%x could not read status register from device.\n,
+   idt_addr);
+   return ret;
+   }
+
+   if (val  0x04) {
+   debug(idt8t49n222a PLL is LOCKED: %x\n, val);
+   } else {
+   printf(idt8t49n222a PLL is not LOCKED: %x\n, val);
+   return -1;
+   }
+
+   return 0;
+}
+
+int set_serdes_refclk(u8 idt_addr, u8 serdes_num,
+   enum serdes_refclk refclk1,
+   enum serdes_refclk refclk2, u8 feedback)
+{
+   u8 dev_id = 0;
+   int i, ret;
+
+   debug(IDT:Configuring idt8t49n222a device at I2C address: 0x%2x\n,
+   idt_addr);
+
+   ret = i2c_read(idt_addr, DEVICE_ID_REG, 1, dev_id, 1);
+   if (ret  0) {
+   debug(IDT:0x%x could not read DEV_ID from device.\n,
+   idt_addr);
+   return ret;
+   }
+
+   if ((dev_id != 0x00)  (dev_id != 0x24)  (dev_id != 0x2a)) {
+   debug(IDT: device at address 0x%x is not idt8t49n222a.\n,
+   idt_addr);
+   }
+
+   if (serdes_num != 1  serdes_num != 2) {
+   debug(serdes_num should be 1 for SerDes1 and
+2 for SerDes2.\n);
+   return -1;
+   }
+
+   if ((refclk1 == SERDES_REFCLK_122_88  refclk2 != SERDES_REFCLK_122_88)
+   || (refclk1 != SERDES_REFCLK_122_88
+refclk2 == SERDES_REFCLK_122_88)) {
+   debug(Only one refclk at 122.88MHz is not supported.
+Please set both refclk1  refclk2 to 122.88MHz
+or both not to 122.88MHz.\n);
+   return -1;
+   }
+
+   if (refclk1 != SERDES_REFCLK_100  refclk1 != SERDES_REFCLK_122_88
+refclk1 != SERDES_REFCLK_125
+refclk1 != SERDES_REFCLK_156_25) {
+   debug(refclk1 should be 100MHZ, 122.88MHz, 125MHz
+or 156.25MHz.\n);
+   return -1;
+   }
+
+   if (refclk2 != 

Re: [U-Boot] [PATCH v6 0/3] Add TI816X EVM support

2013-07-02 Thread TENART Antoine
I forgot to add the description of this patchset. Sorry for the noise.


This serie introduce the support of the TI816X EVM board.

The serie fits into the existing AM33XX SoC support and reuse some
definitions from the TI814X.

Based on the implementation in the TI-PSP-04.00.02.14 vendor tree:
http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary

It has been tested booting up a Linux kernel on TI8168 refs F and C
cards, with an MMC. SPL is working fine too.

This serie applies on top of ARM: AM33xx: Cleanup clocks and hwinit,
which is on top of u-boot merged with u-boot-arm:
http://u-boot.10912.n7.nabble.com/PATCH-0-4-ARM-AM33xx-Cleanup-clocks-and-hwinit-tt157703.html


-- 
Antoine
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Re: [U-Boot] [PATCH v2 1/1] socfpga: Adding System Manager driver which will configure the pin mux for real hardware Cyclone V

2013-07-02 Thread Pavel Machek
On Mon 2013-07-01 08:41:15, Chin Liang See wrote:
 Hi Pavel,
 
 On Mon, 2013-07-01 at 12:42 +0200, ZY - pavel wrote:
  On Fri 2013-06-28 16:20:48, Chin Liang See wrote:
   socfpga: Adding System Manager driver which will
configure the pin mux for real hardware Cyclone V 
development kit (not Virtual Platform)
   
   Signed-off-by: Chin Liang See cl...@altera.com
  
  
   +DECLARE_GLOBAL_DATA_PTR;
   +
   +/*
   + * Configure all the pin mux
   + */
  
  As noted before, I'm not sure this is correct english. Otherwise,
  patch looks good to me.
  
 
 Sorry as I thought I already done that.
 Let me fix it on next revision.

Thanks!

Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) 
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [U-Boot] [ANN] v2013.07-rc2

2013-07-02 Thread Dirk Eibach
Hi Andy,

 If you've got changes outstanding still, please start gently poking
 custodians with patchwork links.  I've got a good bit of stuff I need to
 deal with myself still, but please prod me all the same.

my series [PATCH v7 0/5] Add gdsys ControlCenter Digital board is
still missing.

You can find it here:
http://patchwork.ozlabs.org/patch/254751/
http://patchwork.ozlabs.org/patch/254749/
http://patchwork.ozlabs.org/patch/254748/
http://patchwork.ozlabs.org/patch/254750/
http://patchwork.ozlabs.org/patch/254754/

Cheers
Dirk
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Re: [U-Boot] [ANN] v2013.07-rc2

2013-07-02 Thread Robert Nelson
On Tue, Jul 2, 2013 at 2:39 AM, Simon Glass s...@chromium.org wrote:
 Hi Robert,

 On Tue, Jul 2, 2013 at 5:44 AM, Robert Nelson robertcnel...@gmail.com
 wrote:

 On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
  Hey all,
 
  I've tagged and pushed v2013.07-rc2.  A bit more over the place than I
  should have gone, but picked up a lot of things that have been
  outstanding for a while.  The big thing is a refactor of the boot loop.
  Everything should be working right now, but please test.  Related to
  this is the ability to have crytpographically signed images.  It's like
  secure boot in UEFI land, but hopefully without the kerfuffle.
 
  If you've got changes outstanding still, please start gently poking
  custodians with patchwork links.  I've got a good bit of stuff I need to
  deal with myself still, but please prod me all the same.

 So, the bootm refactor ( 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 )
 also broke bootz/zImage...

 Got it to atleast get past the invalid OS message via:

 diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
 index 02a5013..a0b55ef 100644
 --- a/common/cmd_bootm.c
 +++ b/common/cmd_bootm.c
 @@ -1744,6 +1744,12 @@ static int bootz_start(cmd_tbl_t *cmdtp, int
 flag, int argc,
 int ret;
 void *zi_start, *zi_end;

 +   memset(images, 0, sizeof(bootm_headers_t));
 +
 +   boot_start_lmb(images);
 +
 +   images-os.os = IH_OS_LINUX;
 +
 ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
   images, 1);

 However it's still locking up at Starting Kernel ...


 What board is this please? I have only tested on x86, but perhaps have
 missed something here.

So far it looks like any arm board...  I was working on specifically
the imx6 quad core wandboard bringup.  But i've also verified it on
the Panda/Beagle too...  Alll 3 of these boards worked fine with
v2013.07-rc1...

Wandboard:

Boot Sequence: (device tree boot)
load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}
bootz ${loadaddr} - ${fdt_addr}

U-Boot 2013.07-rc2-1-g23c15c2-dirty (Jul 02 2013 - 06:33:59)

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: Wandboard
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Warning: FEC using MAC address from net device

Hit any key to stop autoboot:  0
= load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
4112496 bytes read in 307 ms (12.8 MiB/s)
= load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}
22150 bytes read in 126 ms (170.9 KiB/s)
= bootz ${loadaddr} - ${fdt_addr}

Beagle xM:

Boot Sequence: (old board file boot)
fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
bootz ${loadaddr}

OMAP3 beagleboard.org # fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
reading zImage
3421392 bytes read in 246 ms (13.3 MiB/s)
OMAP3 beagleboard.org # bootz ${loadaddr}
data abort

MAYBE you should read doc/README.arm-unaligned-accesses

pc : [9ff8bf20]  lr : [9ff5d2a8]
sp : 9fef8bd8  ip : 9ff8 fp : 9fef9760
r10: 9ffa6314  r9 : 9ffa7710 r8 : 9fef8f30
r7 : 805434d0  r6 : 00020e61 r5 : ffafefff  r4 : 9ff9c6e6
r3 : 00020e61  r2 : 003434d0 r1 : 8020  r0 : 9fef8cf0
Flags: nzcv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...

U-Boot SPL 2013.07-rc2-1-g7c2cb8a-dirty (Jul 02 2013 - 06:14:53)

Regards,

-- 
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Re: [U-Boot] [PATCH] socfpga: Move board/socfpga_cyclone5 to board/socfpga

2013-07-02 Thread Pavel Machek
Hi!

 From: Dinh Nguyen dingu...@altera.com
 
 Because the SOCFPGA platform will include support for Cyclone V and
 Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
 be more generic.
 
 Signed-off-by: Dinh Nguyen dingu...@altera.com
 Cc: Chin Liang See cl...@altera.com
 Cc: Wolfgang Denk w...@denx.de
 CC: Pavel Machek pa...@denx.de

Looks good to me.

Reviewed-by: Pavel Machek pa...@denx.de

Chin's patches will need to be rediffed on top of this... But as they
need to be redone due to licensing, that should not be a problem...?

Pavel

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Re: [U-Boot] [ANN] v2013.07-rc2

2013-07-02 Thread Robert Nelson
On Tue, Jul 2, 2013 at 6:41 AM, Robert Nelson robertcnel...@gmail.com wrote:
 On Tue, Jul 2, 2013 at 2:39 AM, Simon Glass s...@chromium.org wrote:
 Hi Robert,

 On Tue, Jul 2, 2013 at 5:44 AM, Robert Nelson robertcnel...@gmail.com
 wrote:

 On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
  Hey all,
 
  I've tagged and pushed v2013.07-rc2.  A bit more over the place than I
  should have gone, but picked up a lot of things that have been
  outstanding for a while.  The big thing is a refactor of the boot loop.
  Everything should be working right now, but please test.  Related to
  this is the ability to have crytpographically signed images.  It's like
  secure boot in UEFI land, but hopefully without the kerfuffle.
 
  If you've got changes outstanding still, please start gently poking
  custodians with patchwork links.  I've got a good bit of stuff I need to
  deal with myself still, but please prod me all the same.

 So, the bootm refactor ( 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 )
 also broke bootz/zImage...

 Got it to atleast get past the invalid OS message via:

 diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
 index 02a5013..a0b55ef 100644
 --- a/common/cmd_bootm.c
 +++ b/common/cmd_bootm.c
 @@ -1744,6 +1744,12 @@ static int bootz_start(cmd_tbl_t *cmdtp, int
 flag, int argc,
 int ret;
 void *zi_start, *zi_end;

 +   memset(images, 0, sizeof(bootm_headers_t));
 +
 +   boot_start_lmb(images);
 +
 +   images-os.os = IH_OS_LINUX;
 +
 ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
   images, 1);

 However it's still locking up at Starting Kernel ...


 What board is this please? I have only tested on x86, but perhaps have
 missed something here.

 So far it looks like any arm board...  I was working on specifically
 the imx6 quad core wandboard bringup.  But i've also verified it on
 the Panda/Beagle too...  Alll 3 of these boards worked fine with
 v2013.07-rc1...

 Wandboard:

 Boot Sequence: (device tree boot)
 load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
 load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}
 bootz ${loadaddr} - ${fdt_addr}

 U-Boot 2013.07-rc2-1-g23c15c2-dirty (Jul 02 2013 - 06:33:59)

 CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
 Reset cause: POR
 Board: Wandboard
 DRAM:  2 GiB
 MMC:   FSL_SDHC: 0, FSL_SDHC: 1
 *** Warning - bad CRC, using default environment

 In:serial
 Out:   serial
 Err:   serial
 Net:   FEC [PRIME]
 Warning: FEC using MAC address from net device

 Hit any key to stop autoboot:  0
 = load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
 4112496 bytes read in 307 ms (12.8 MiB/s)
 = load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}
 22150 bytes read in 126 ms (170.9 KiB/s)
 = bootz ${loadaddr} - ${fdt_addr}
hardlock

Missed the important detail...

Regards,

-- 
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http://www.rcn-ee.com/
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Re: [U-Boot] [PATCH v4 1/1] socfpga: Adding configuration for development kit

2013-07-02 Thread Pavel Machek
On Mon 2013-07-01 16:05:20, Chin Liang See wrote:
 socfpga: Separating the configuration file for Virtual
  Target and real hardware Cyclone V development kit
 
 Signed-off-by: Chin Liang See cl...@altera.com

Looks good.

Reviewed-by: Pavel Machek pa...@denx.de

Thanks,
Pavel
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[U-Boot] [PATCH] powerpc/b4860: Disable unused devices using DEVDISR register

2013-07-02 Thread Sandeep Singh
Explicitly disabling unused IPs/blocks. This will lower
power consumption.

Signed-off-by: Sandeep Singh sand...@freescale.com
---
 arch/powerpc/cpu/mpc85xx/Makefile|1 +
 arch/powerpc/cpu/mpc85xx/b4860_cpu.c |  130 ++
 arch/powerpc/include/asm/processor.h |1 +
 board/freescale/b4860qds/b4860qds.c  |2 +
 4 files changed, 134 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/cpu/mpc85xx/b4860_cpu.c

diff --git a/arch/powerpc/cpu/mpc85xx/Makefile 
b/arch/powerpc/cpu/mpc85xx/Makefile
index cefd57b..340f3dd 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -149,6 +149,7 @@ COBJS-$(CONFIG_PPC_T4240) += t4240_serdes.o
 COBJS-$(CONFIG_PPC_T4160) += t4240_serdes.o
 COBJS-$(CONFIG_PPC_B4420) += b4860_serdes.o
 COBJS-$(CONFIG_PPC_B4860) += b4860_serdes.o
+COBJS-$(CONFIG_PPC_B4860) += b4860_cpu.o
 COBJS-$(CONFIG_BSC9132) += bsc9132_serdes.o
 COBJS-$(CONFIG_PPC_T1040) += t1040_serdes.o
 
diff --git a/arch/powerpc/cpu/mpc85xx/b4860_cpu.c 
b/arch/powerpc/cpu/mpc85xx/b4860_cpu.c
new file mode 100644
index 000..600842a
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/b4860_cpu.c
@@ -0,0 +1,130 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/processor.h
+#include asm/io.h
+
+#define DISABLE_DDR1   0x8000
+#define DISABLE_DDR2   0x4000
+#define DISABLE_MAPLE_LTE0 0x0080
+#define DISABLE_MAPLE_LTE1 0x0040
+#define DISABLE_MAPLE_WCDMA0x0020
+
+/* Set DCFG_DEVDISRn for devices to be disabled for B4860 */
+#define B4860_DCFG_DEVDISR10
+#define B4860_DCFG_DEVDISR20
+#define B4860_DCFG_DEVDISR30
+#define B4860_DCFG_DEVDISR40
+#define B4860_DCFG_DEVDISR50
+
+/* Set DCFG_DEVDISRn for devices to be disabled for G4860 */
+#define G4860_DCFG_DEVDISR10
+#define G4860_DCFG_DEVDISR20
+#define G4860_DCFG_DEVDISR3(DISABLE_MAPLE_LTE0 | DISABLE_MAPLE_LTE1 |\
+   DISABLE_MAPLE_WCDMA)
+#define G4860_DCFG_DEVDISR40
+#define G4860_DCFG_DEVDISR50
+
+/* Set DCFG_DEVDISRn for devices to be disabled for B4060 */
+#define B4060_DCFG_DEVDISR10
+#define B4060_DCFG_DEVDISR20
+#define B4060_DCFG_DEVDISR30
+#define B4060_DCFG_DEVDISR40
+#define B4060_DCFG_DEVDISR5DISABLE_DDR2
+
+/* Set DCFG_DEVDISRn for devices to be disabled for G4060 */
+#define G4060_DCFG_DEVDISR10
+#define G4060_DCFG_DEVDISR20
+#define G4060_DCFG_DEVDISR3(DISABLE_MAPLE_LTE0 | DISABLE_MAPLE_LTE1 |\
+   DISABLE_MAPLE_WCDMA)
+#define G4060_DCFG_DEVDISR40
+#define G4060_DCFG_DEVDISR5DISABLE_DDR2
+
+/* Set DCFG_DEVDISRn for devices to be disabled for B4420 */
+#define B4420_DCFG_DEVDISR10
+#define B4420_DCFG_DEVDISR20
+#define B4420_DCFG_DEVDISR3DISABLE_MAPLE_LTE1
+#define B4420_DCFG_DEVDISR40
+#define B4420_DCFG_DEVDISR5DISABLE_DDR2
+
+
+void cpu_device_disable()
+{
+   ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+   /* get devdisr */
+   u32 *devdisr1 = in_be32(gur-devdisr);
+   u32 *devdisr2 = in_be32(gur-devdisr2);
+   u32 *devdisr3 = in_be32(gur-devdisr3);
+   u32 *devdisr4 = in_be32(gur-devdisr4);
+   u32 *devdisr5 = in_be32(gur-devdisr5);
+
+   /* get SVR info */
+   u32 svr = SVR_SOC_VER(get_svr());
+
+   /*
+* Decide on the basis of SVR which devices to disable for a
+* particular personality
+*/
+   switch (svr) {
+   case SVR_B4860:
+   setbits_be32(devdisr1, B4860_DCFG_DEVDISR1);
+   setbits_be32(devdisr2, B4860_DCFG_DEVDISR2);
+   setbits_be32(devdisr3, B4860_DCFG_DEVDISR3);
+   setbits_be32(devdisr4, B4860_DCFG_DEVDISR4);
+   setbits_be32(devdisr5, B4860_DCFG_DEVDISR5);
+   break;
+   case SVR_G4860:
+   setbits_be32(devdisr1, G4860_DCFG_DEVDISR1);
+   setbits_be32(devdisr2, G4860_DCFG_DEVDISR2);
+   setbits_be32(devdisr3, G4860_DCFG_DEVDISR3);
+   setbits_be32(devdisr4, G4860_DCFG_DEVDISR4);
+   

Re: [U-Boot] [PATCH 1/1] socfpga: Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit

2013-07-02 Thread Pavel Machek
Hi!

 @@ -21,6 +21,7 @@
  void reset_cpu(ulong addr);
  void reset_deassert_peripherals_handoff(void);
 
 +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
  struct socfpga_reset_manager {
  u32padding1;
  u32ctrl;
 @@ -31,7 +32,23 @@ struct socfpga_reset_manager {
  u32per2_mod_reset;
  u32brg_mod_reset;
  };
 +#else
 +struct socfpga_reset_manager {
 +u32status;
 +u32ctrl;
 +u32counts;
 +u32padding1;
 +u32mpu_mod_reset;
 +u32per_mod_reset;
 +u32per2_mod_reset;
 +u32brg_mod_reset;
 +};
 +#endif
 
  (You could add /* this is unimplemented on virtual platform */, or
  maybe even per-field ifdef. It will still be more readable.)
 
 Oh.. I got your point now :)
 Its a good suggestion and let me do it for next revision.

Looks good now. Thanks!
Pavel
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[U-Boot] [PATCH] avr32: fix do_bootm_linux

2013-07-02 Thread Andreas Bießmann
Commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 broke bootm on avr32. It
requires to call do_bootm_linux() with flag set to BOOTM_STATE_OS_PREP before
calling it again with flag set to BOOTM_STATE_OS_GO.
Fix this by allowing flag set to BOOTM_STATE_OS_PREP, this however will
require a complete refactoring later on.

Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com

---
 arch/avr32/lib/bootm.c |9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/avr32/lib/bootm.c b/arch/avr32/lib/bootm.c
index 87f3f9c..eedab9d 100644
--- a/arch/avr32/lib/bootm.c
+++ b/arch/avr32/lib/bootm.c
@@ -187,6 +187,15 @@ int do_bootm_linux(int flag, int argc, char * const 
argv[], bootm_headers_t *ima
struct  tag *params, *params_start;
char*commandline = getenv(bootargs);
 
+   /*
+* allow the PREP bootm subcommand, it is required for bootm to work
+*
+* TODO: Andreas Bießmann andreas.de...@googlemail.com refactor the
+* do_bootm_linux() for avr32
+*/
+   if (flag  BOOTM_STATE_OS_PREP)
+   return 0;
+
if ((flag != 0)  (flag != BOOTM_STATE_OS_GO))
return 1;
 
-- 
1.7.10.4

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Re: [U-Boot] Pull request: u-boot-video/master

2013-07-02 Thread Otavio Salvador
On Tue, Jul 2, 2013 at 3:00 AM, Anatolij Gustschin ag...@denx.de wrote:
 On Mon, 1 Jul 2013 23:11:07 -0300
 Otavio Salvador ota...@ossystems.com.br wrote:
 ...
 You didn' t put the splashpos fix.

 I would prefer to wait a few days, so other people will have a chance
 to review and comment. Also I didn't test the splashpos fix yet, it
 was only compile-tested.

Ok.

--
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Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750
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[U-Boot] Run a standalone application on a core other than 0

2013-07-02 Thread João Fernandes
As the subject says, I'm trying to run the Hello world standalone
application example on a core other than 0, on a Freescale QorIQ P4080.

I tried through the shell and programmatically by exporting cpu_release
function... nothing. My first thought was that only core 0 has register r2
with the address of the global_data structure, so I tried to set it on
the other cores, but still nothing. Help on this matter is highly
appreciated.

Regards,
João Fernandes
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Re: [U-Boot] [PATCH 4/4 V2] EXYNOS: Move files from board/samsung to arch/arm.

2013-07-02 Thread Rajeshwari Birje
Hi Minkyu Kang,

On Tue, Jul 2, 2013 at 11:25 AM, Minkyu Kang mk7.k...@samsung.com wrote:
 Dear Rajeshwari,

 On 01/07/13 19:02, Rajeshwari Shinde wrote:
 This patch performs the following:

 1) Convert the assembly code for memory and clock initialization to C code.
 2) Move the memory and clock init codes from board/samsung to arch/arm
 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted
the common lowlevel_init from assembly to C-code
 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5.
 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is 
 already
done in _main.
 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250.

 TEST: Tested SD-MMC boot on SMDK5250 and Origen.
   Tested USB and SPI boot on SMDK5250
   Compile tested for SMDKV310.

 Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
 ---
 Changes in V2:
   - Rebased on latest u-boot-samsung tree.
   - Incorporated review comments from Minkyu Kang.
  arch/arm/cpu/armv7/exynos/Makefile |   17 +-
  .../arm/cpu/armv7/exynos}/clock_init.h |0
  arch/arm/cpu/armv7/exynos/clock_init_exynos4.c |   94 +
  .../arm/cpu/armv7/exynos/clock_init_exynos5.c  |   27 +-
  arch/arm/cpu/armv7/exynos/common_setup.h   |   43 ++
  .../arm/cpu/armv7/exynos}/dmc_common.c |7 +-
  .../arm/cpu/armv7/exynos}/dmc_init_ddr3.c  |   17 +-
  arch/arm/cpu/armv7/exynos/dmc_init_exynos4.c   |  295 ++
  .../arm/cpu/armv7/exynos/exynos4_setup.h   |   97 +-
  .../arm/cpu/armv7/exynos/exynos5_setup.h   |   28 +-
  arch/arm/cpu/armv7/exynos/lowlevel_init.c  |   72 
  .../arm/cpu/armv7/exynos}/spl_boot.c   |   77 +++-
  board/samsung/origen/Makefile  |   11 +-
  board/samsung/origen/lowlevel_init.S   |  357 -
  board/samsung/origen/mem_setup.S   |  421 
 
  board/samsung/origen/mmc_boot.c|   58 ---
  board/samsung/smdk5250/Makefile|   14 +-
  board/samsung/smdkv310/Makefile|   10 +-
  board/samsung/smdkv310/lowlevel_init.S |  414 
 ---
  board/samsung/smdkv310/mem_setup.S |  365 -
  board/samsung/smdkv310/mmc_boot.c  |   60 ---
  include/configs/exynos5250-dt.h|8 +-
  include/configs/origen.h   |9 +-
  include/configs/smdkv310.h |8 +-
  24 files changed, 743 insertions(+), 1766 deletions(-)
  rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/clock_init.h 
 (100%)
  create mode 100644 arch/arm/cpu/armv7/exynos/clock_init_exynos4.c
  rename board/samsung/smdk5250/clock_init.c = 
 arch/arm/cpu/armv7/exynos/clock_init_exynos5.c (97%)
  create mode 100644 arch/arm/cpu/armv7/exynos/common_setup.h
  rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/dmc_common.c 
 (97%)
  rename {board/samsung/smdk5250 = 
 arch/arm/cpu/armv7/exynos}/dmc_init_ddr3.c (96%)
  create mode 100644 arch/arm/cpu/armv7/exynos/dmc_init_exynos4.c
  rename board/samsung/origen/origen_setup.h = 
 arch/arm/cpu/armv7/exynos/exynos4_setup.h (86%)
  rename board/samsung/smdk5250/setup.h = 
 arch/arm/cpu/armv7/exynos/exynos5_setup.h (96%)
  create mode 100644 arch/arm/cpu/armv7/exynos/lowlevel_init.c
  rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/spl_boot.c 
 (73%)
  delete mode 100644 board/samsung/origen/lowlevel_init.S
  delete mode 100644 board/samsung/origen/mem_setup.S
  delete mode 100644 board/samsung/origen/mmc_boot.c
  delete mode 100644 board/samsung/smdkv310/lowlevel_init.S
  delete mode 100644 board/samsung/smdkv310/mem_setup.S
  delete mode 100644 board/samsung/smdkv310/mmc_boot.c

 diff --git a/arch/arm/cpu/armv7/exynos/Makefile 
 b/arch/arm/cpu/armv7/exynos/Makefile
 index b2f9152..4661155 100644
 --- a/arch/arm/cpu/armv7/exynos/Makefile
 +++ b/arch/arm/cpu/armv7/exynos/Makefile
 @@ -22,10 +22,19 @@ include $(TOPDIR)/config.mk

  LIB  = $(obj)lib$(SOC).o

 -COBJS+= clock.o power.o soc.o system.o pinmux.o tzpc.o
 -
 -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 -OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
 +COBJS-y  += clock.o power.o soc.o system.o pinmux.o tzpc.o
 +
 +ifdef CONFIG_SPL_BUILD
 +COBJS-$(CONFIG_EXYNOS5)  += clock_init_exynos5.o
 +COBJS-$(CONFIG_EXYNOS5)  += dmc_common.o dmc_init_ddr3.o
 +COBJS-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o
 +COBJS-y  += spl_boot.o
 +COBJS-y  += lowlevel_init.o
 +endif
 +
 +COBJS   := $(COBJS-y)
 +SRCS := $(COBJS:.o=.c)
 +OBJS := $(addprefix $(obj),$(COBJS))

  all:  $(obj).depend $(LIB)

 diff --git a/board/samsung/smdk5250/clock_init.h 
 b/arch/arm/cpu/armv7/exynos/clock_init.h
 similarity index 100%
 rename from board/samsung/smdk5250/clock_init.h
 rename 

Re: [U-Boot] [PATCH v2] cmd_bootm.c: Correct BOOTM_ERR_OVERLAP handling

2013-07-02 Thread Tom Rini
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 07/02/2013 06:49 AM, Andreas Bießmann wrote:
 Hi all,
 
 On 06/28/2013 11:41 PM, Simon Glass wrote:
 Hi Tom,
 
 On Fri, Jun 28, 2013 at 1:25 PM, Tom Rini tr...@ti.com wrote:
 
 snip
 
 @@ -660,34 +680,25 @@ static int do_bootm_states(cmd_tbl_t
 *cmdtp, int flag, int argc, } #endif /* Now run the OS! We hope
 this doesn't return */ -   if (!ret  (states 
 BOOTM_STATE_OS_GO)) +   if (!ret  (states 
 BOOTM_STATE_OS_GO)) { ret = boot_selected_os(argc, argv,
 BOOTM_STATE_OS_GO, images, boot_fn, iflag); +   if
 (ret) +   goto err; +   } + +
 return ret;
 
 
 Thanks for getting to the bottom of this.
 
 Just a question here - should this fall through to display the
 error with the code below? For example if the subcommand is not
 supported...
 
 as pointed out by Simon the error message 'subcommand not
 supported' disappears with this patch. On avr32 this means
 currently:
 
 ---8--- ## Booting kernel from Legacy Image at 1040 ... Image
 Name:   Linux-3.6.2 Image Type:   AVR32 Linux Kernel Image (gzip
 compressed) Data Size:1846216 Bytes = 1.8 MiB Load Address:
 1000 Entry Point:  9000 Verifying Checksum ... OK 
 Uncompressing Kernel Image ... OK U-Boot ---8---
 
 Before it was at least: ---8--- ## Booting kernel from Legacy
 Image at 1040 ... Image Name:   Linux-3.6.2 Image Type:   AVR32
 Linux Kernel Image (gzip compressed) Data Size:1846216 Bytes =
 1.8 MiB Load Address: 1000 Entry Point:  9000 Verifying
 Checksum ... OK Uncompressing Kernel Image ... OK subcommand not
 supported U-Boot ---8---
 
 Who will fix that? I'll have a look for the avr32 specific part.

The patch I posted yesterday should fix that.

- -- 
Tom
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Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/

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Re: [U-Boot] [ANN] v2013.07-rc2

2013-07-02 Thread Tom Rini
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 07/02/2013 06:37 AM, Andreas Bießmann wrote:
 Hi,
 
 On 07/01/2013 10:44 PM, Robert Nelson wrote:
 On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
 Hey all,
 
 I've tagged and pushed v2013.07-rc2.  A bit more over the place
 than I should have gone, but picked up a lot of things that
 have been outstanding for a while.  The big thing is a refactor
 of the boot loop. Everything should be working right now, but
 please test.  Related to this is the ability to have
 crytpographically signed images.  It's like secure boot in UEFI
 land, but hopefully without the kerfuffle.
 
 If you've got changes outstanding still, please start gently
 poking custodians with patchwork links.  I've got a good bit of
 stuff I need to deal with myself still, but please prod me all
 the same.
 
 So, the bootm refactor ( 35fc84fa1ff51e15ecd3e464dac87eb105ffed30
 ) also broke bootz/zImage...
 
 and also bootm for uImage on avr32 ... will investigate it these
 days.

Hurk, I hope avr32 is the same problem Stefan found/fixed with
PowerPC, can you check / test that quickly?  See last patch to
arch/powerpc/lib/bootm.c.

- -- 
Tom
-BEGIN PGP SIGNATURE-
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/

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[U-Boot] [RFC PATCH] arm: arm926ejs: flush cache before disable it

2013-07-02 Thread Bo Shen
flush cache before disable it

Signed-off-by: Bo Shen voice.s...@gmail.com
---
 arch/arm/cpu/arm926ejs/cpu.c |5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c
index 626384c..10aa165 100644
--- a/arch/arm/cpu/arm926ejs/cpu.c
+++ b/arch/arm/cpu/arm926ejs/cpu.c
@@ -46,15 +46,14 @@ int cleanup_before_linux (void)
 
disable_interrupts ();
 
+   /* flush I/D-cache */
+   cache_flush();
 
/* turn off I/D-cache */
icache_disable();
dcache_disable();
l2_cache_disable();
 
-   /* flush I/D-cache */
-   cache_flush();
-
return 0;
 }
 
-- 
1.7.10.4

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Re: [U-Boot] [ANN] v2013.07-rc2

2013-07-02 Thread Andreas Bießmann
On 07/02/2013 02:34 PM, Tom Rini wrote:
 On 07/02/2013 06:37 AM, Andreas Bießmann wrote:
 Hi,
 
 On 07/01/2013 10:44 PM, Robert Nelson wrote:
 On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
 Hey all,

 I've tagged and pushed v2013.07-rc2.  A bit more over the place
 than I should have gone, but picked up a lot of things that
 have been outstanding for a while.  The big thing is a refactor
 of the boot loop. Everything should be working right now, but
 please test.  Related to this is the ability to have
 crytpographically signed images.  It's like secure boot in UEFI
 land, but hopefully without the kerfuffle.

 If you've got changes outstanding still, please start gently
 poking custodians with patchwork links.  I've got a good bit of
 stuff I need to deal with myself still, but please prod me all
 the same.

 So, the bootm refactor ( 35fc84fa1ff51e15ecd3e464dac87eb105ffed30
 ) also broke bootz/zImage...
 
 and also bootm for uImage on avr32 ... will investigate it these
 days.
 
 Hurk, I hope avr32 is the same problem Stefan found/fixed with
 PowerPC, can you check / test that quickly?  See last patch to
 arch/powerpc/lib/bootm.c.

got it: http://patchwork.ozlabs.org/patch/256393/

Let it settle some days, would you pick it directly or do you prefer a PR?

Best regards

Andreas Bießmann


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Re: [U-Boot] [PATCH v2] cmd_bootm.c: Correct BOOTM_ERR_OVERLAP handling

2013-07-02 Thread Andreas Bießmann
On 07/02/2013 02:35 PM, Tom Rini wrote:
 On 07/02/2013 06:49 AM, Andreas Bießmann wrote:
 Hi all,
 
 On 06/28/2013 11:41 PM, Simon Glass wrote:
 Hi Tom,

 On Fri, Jun 28, 2013 at 1:25 PM, Tom Rini tr...@ti.com wrote:
 
 snip
 
 @@ -660,34 +680,25 @@ static int do_bootm_states(cmd_tbl_t
 *cmdtp, int flag, int argc, } #endif /* Now run the OS! We hope
 this doesn't return */ -   if (!ret  (states 
 BOOTM_STATE_OS_GO)) +   if (!ret  (states 
 BOOTM_STATE_OS_GO)) { ret = boot_selected_os(argc, argv,
 BOOTM_STATE_OS_GO, images, boot_fn, iflag); +   if
 (ret) +   goto err; +   } + +
 return ret;


 Thanks for getting to the bottom of this.

 Just a question here - should this fall through to display the
 error with the code below? For example if the subcommand is not
 supported...
 
 as pointed out by Simon the error message 'subcommand not
 supported' disappears with this patch. 

snip

 Who will fix that? I'll have a look for the avr32 specific part.
 
 The patch I posted yesterday should fix that.

Oups, overseen, you mean http://patchwork.ozlabs.org/patch/256125/ right?

Best regards

Andreas Bießmann


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[U-Boot] [PATCH 0/7] USB: XHCI: Add xHCI host controller stack driver

2013-07-02 Thread Vivek Gautam
This change adds necessary xHCI host controller stack layer.
This stack will eventually interact with SoC specific USB 3.0
controller drivers to enable USB 3.0 support on different boards.

Based on 'master' branch of u-boot-usb tree.

The series also includes patches to support xHCI on exynos5250,
including required driver, device tree changes and a temporary
config change to test things finally on smdk5250.

Vivek Gautam (7):
  arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZE
  USB: xHCI: Add stack support for xHCI
  USB: XHCI: Add xHCI host controller support for Exynos5
  arm: exynos: Add methods to control power to USB 3.0 PHY
  exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI
  exynos5: dts: Add device node for XHCI
  temp: ARM: EXYNOS5: Enable xHCI support for Exynos5

 arch/arm/cpu/armv7/exynos/power.c  |   22 +
 arch/arm/dts/exynos5250.dtsi   |   12 +
 arch/arm/include/asm/arch-exynos/cpu.h |8 +
 arch/arm/include/asm/arch-exynos/power.h   |5 +
 arch/arm/include/asm/arch-exynos/xhci-exynos.h |   90 ++
 common/usb.c   |   27 +-
 drivers/usb/host/Makefile  |4 +
 drivers/usb/host/xhci-exynos5.c|  324 ++
 drivers/usb/host/xhci-mem.c|  731 ++
 drivers/usb/host/xhci-ring.c   |  899 +
 drivers/usb/host/xhci.c| 1040 +++
 drivers/usb/host/xhci.h| 1281 
 include/configs/exynos5250-dt.h|7 +
 include/fdtdec.h   |2 +
 include/linux/usb/dwc3.h   |  190 
 include/usb.h  |9 +-
 lib/fdtdec.c   |2 +
 17 files changed, 4650 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-exynos/xhci-exynos.h
 create mode 100644 drivers/usb/host/xhci-exynos5.c
 create mode 100644 drivers/usb/host/xhci-mem.c
 create mode 100644 drivers/usb/host/xhci-ring.c
 create mode 100644 drivers/usb/host/xhci.c
 create mode 100644 drivers/usb/host/xhci.h
 create mode 100644 include/linux/usb/dwc3.h

-- 
1.7.6.5

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Re: [U-Boot] [PATCH v2] cmd_bootm.c: Correct BOOTM_ERR_OVERLAP handling

2013-07-02 Thread Tom Rini
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 07/02/2013 08:58 AM, Andreas Bießmann wrote:
 On 07/02/2013 02:35 PM, Tom Rini wrote:
 On 07/02/2013 06:49 AM, Andreas Bießmann wrote:
 Hi all,
 
 On 06/28/2013 11:41 PM, Simon Glass wrote:
 Hi Tom,
 
 On Fri, Jun 28, 2013 at 1:25 PM, Tom Rini tr...@ti.com
 wrote:
 
 snip
 
 @@ -660,34 +680,25 @@ static int do_bootm_states(cmd_tbl_t 
 *cmdtp, int flag, int argc, } #endif /* Now run the OS! We
 hope this doesn't return */ -   if (!ret  (states  
 BOOTM_STATE_OS_GO)) +   if (!ret  (states  
 BOOTM_STATE_OS_GO)) { ret = boot_selected_os(argc, argv, 
 BOOTM_STATE_OS_GO, images, boot_fn, iflag); +
 if (ret) +   goto err; +   } + + 
 return ret;
 
 
 Thanks for getting to the bottom of this.
 
 Just a question here - should this fall through to display
 the error with the code below? For example if the subcommand
 is not supported...
 
 as pointed out by Simon the error message 'subcommand not 
 supported' disappears with this patch.
 
 snip
 
 Who will fix that? I'll have a look for the avr32 specific
 part.
 
 The patch I posted yesterday should fix that.
 
 Oups, overseen, you mean http://patchwork.ozlabs.org/patch/256125/
 right?

Correct.

- -- 
Tom
-BEGIN PGP SIGNATURE-
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/

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=DxRB
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[U-Boot] [PATCH 1/7] arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZE

2013-07-02 Thread Vivek Gautam
XHCI stack driver needs this to align buffers to
CacheLine boundary. So define the same to be '64'

Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
 include/configs/exynos5250-dt.h |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index e2a096b..de76836 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -54,6 +54,8 @@
 /* Keep L2 Cache Disabled */
 #define CONFIG_SYS_DCACHE_OFF
 
+#define CONFIG_SYS_CACHELINE_SIZE  64
+
 /* Enable ACE acceleration for SHA1 and SHA256 */
 #define CONFIG_EXYNOS_ACE_SHA
 #define CONFIG_SHA_HW_ACCEL
-- 
1.7.6.5

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[U-Boot] [PATCH 3/7] USB: XHCI: Add xHCI host controller support for Exynos5

2013-07-02 Thread Vivek Gautam
This adds driver layer for xHCI controller in Samsung's
exynos5 soc. This interacts with xHCI host controller stack.

Signed-off-by: Vikas C Sajjan vikas.saj...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
 arch/arm/include/asm/arch-exynos/cpu.h |8 +
 arch/arm/include/asm/arch-exynos/xhci-exynos.h |   90 +++
 drivers/usb/host/Makefile  |1 +
 drivers/usb/host/xhci-exynos5.c|  324 
 include/linux/usb/dwc3.h   |  190 ++
 5 files changed, 613 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-exynos/xhci-exynos.h
 create mode 100644 drivers/usb/host/xhci-exynos5.c
 create mode 100644 include/linux/usb/dwc3.h

diff --git a/arch/arm/include/asm/arch-exynos/cpu.h 
b/arch/arm/include/asm/arch-exynos/cpu.h
index 1ff7642..9c3d4c2 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -64,6 +64,8 @@
 #define EXYNOS4_DP_BASEDEVICE_NOT_AVAILABLE
 #define EXYNOS4_SPI_ISP_BASE   DEVICE_NOT_AVAILABLE
 #define EXYNOS4_ACE_SFR_BASE   DEVICE_NOT_AVAILABLE
+#define EXYNOS4_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4_USB3PHY_BASE   DEVICE_NOT_AVAILABLE
 
 /* EXYNOS4X12 */
 #define EXYNOS4X12_GPIO_PART3_BASE 0x0386
@@ -99,6 +101,8 @@
 #define EXYNOS4X12_SPI_BASEDEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_SPI_ISP_BASEDEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_ACE_SFR_BASEDEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_USB_HOST_XHCI_BASE  DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_USB3PHY_BASEDEVICE_NOT_AVAILABLE
 
 /* EXYNOS5 Common*/
 #define EXYNOS5_I2C_SPACING0x1
@@ -118,6 +122,8 @@
 #define EXYNOS5_DMC_CTRL_BASE  0x10DD
 #define EXYNOS5_GPIO_PART1_BASE0x1140
 #define EXYNOS5_MIPI_DSIM_BASE 0x11D0
+#define EXYNOS5_USB_HOST_XHCI_BASE 0x1200
+#define EXYNOS5_USB3PHY_BASE   0x1210
 #define EXYNOS5_USB_HOST_EHCI_BASE 0x1211
 #define EXYNOS5_USBPHY_BASE0x1213
 #define EXYNOS5_USBOTG_BASE0x1214
@@ -232,7 +238,9 @@ SAMSUNG_BASE(swreset, SWRESET)
 SAMSUNG_BASE(timer, PWMTIMER_BASE)
 SAMSUNG_BASE(uart, UART_BASE)
 SAMSUNG_BASE(usb_phy, USBPHY_BASE)
+SAMSUNG_BASE(usb3_phy, USB3PHY_BASE)
 SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE)
+SAMSUNG_BASE(usb_xhci, USB_HOST_XHCI_BASE)
 SAMSUNG_BASE(usb_otg, USBOTG_BASE)
 SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
 SAMSUNG_BASE(power, POWER_BASE)
diff --git a/arch/arm/include/asm/arch-exynos/xhci-exynos.h 
b/arch/arm/include/asm/arch-exynos/xhci-exynos.h
new file mode 100644
index 000..acbb37d
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/xhci-exynos.h
@@ -0,0 +1,90 @@
+/* Copyright (c) 2012 Samsung Electronics Co. Ltd
+ *
+ * Exynos Phy register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _ASM_ARCH_XHCI_EXYNOS_H_
+#define _ASM_ARCH_XHCI_EXYNOS_H_
+
+/* Phy register MACRO definitions */
+
+#define LINKSYSTEM_FLADJ_MASK  (0x3f  1)
+#define LINKSYSTEM_FLADJ(_x)   ((_x)  1)
+#define LINKSYSTEM_XHCI_VERSION_CONTROL(0x1  27)
+
+#define PHYUTMI_OTGDISABLE (1  6)
+#define PHYUTMI_FORCESUSPEND   (1  1)
+#define PHYUTMI_FORCESLEEP (1  0)
+
+#define PHYCLKRST_SSC_REFCLKSEL_MASK   (0xff  23)
+#define PHYCLKRST_SSC_REFCLKSEL(_x)((_x)  23)
+
+#define PHYCLKRST_SSC_RANGE_MASK   (0x03  21)
+#define PHYCLKRST_SSC_RANGE(_x)((_x)  21)
+
+#define PHYCLKRST_SSC_EN   (0x1  20)
+#define PHYCLKRST_REF_SSP_EN   (0x1  19)
+#define PHYCLKRST_REF_CLKDIV2  (0x1  18)
+
+#define PHYCLKRST_MPLL_MULTIPLIER_MASK (0x7f  11)
+#define PHYCLKRST_MPLL_MULTIPLIER_100MHZ_REF   (0x19  11)
+#define PHYCLKRST_MPLL_MULTIPLIER_50M_REF  (0x02  11)
+#define PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF(0x68  11)
+#define PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF(0x7d  11)
+#define PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF (0x02  11)
+
+#define PHYCLKRST_FSEL_MASK(0x3f  5)
+#define PHYCLKRST_FSEL(_x) ((_x)  5)
+#define PHYCLKRST_FSEL_PAD_100MHZ  (0x27  5)
+#define PHYCLKRST_FSEL_PAD_24MHZ   (0x2a  5)
+#define PHYCLKRST_FSEL_PAD_20MHZ   (0x31  5)
+#define PHYCLKRST_FSEL_PAD_19_2MHZ (0x38  5)
+
+#define PHYCLKRST_RETENABLEN   (0x1  4)
+
+#define PHYCLKRST_REFCLKSEL_MASK   (0x03  2)
+#define 

[U-Boot] [PATCH 4/7] arm: exynos: Add methods to control power to USB 3.0 PHY

2013-07-02 Thread Vivek Gautam
Adding methods to turn on/off power to USB3.0 type PHY
as and when required by the controller.

Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
 arch/arm/cpu/armv7/exynos/power.c|   22 ++
 arch/arm/include/asm/arch-exynos/power.h |5 +
 2 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/power.c 
b/arch/arm/cpu/armv7/exynos/power.c
index 6375a81..f5e631b 100644
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -75,6 +75,28 @@ void set_usbhost_phy_ctrl(unsigned int enable)
exynos5_set_usbhost_phy_ctrl(enable);
 }
 
+static void exynos5_set_usbdrd_phy_ctrl(unsigned int enable)
+{
+   struct exynos5_power *power =
+   (struct exynos5_power *)samsung_get_base_power();
+
+   if (enable) {
+   /* Enabling USBDRD_PHY */
+   setbits_le32(power-usbdrd_phy_control,
+   POWER_USB_DRD_PHY_CTRL_EN);
+   } else {
+   /* Disabling USBDRD_PHY */
+   clrbits_le32(power-usbdrd_phy_control,
+   POWER_USB_DRD_PHY_CTRL_EN);
+   }
+}
+
+void set_usbdrd_phy_ctrl(unsigned int enable)
+{
+   if (cpu_is_exynos5())
+   exynos5_set_usbdrd_phy_ctrl(enable);
+}
+
 static void exynos5_dp_phy_control(unsigned int enable)
 {
unsigned int cfg;
diff --git a/arch/arm/include/asm/arch-exynos/power.h 
b/arch/arm/include/asm/arch-exynos/power.h
index 3549667..41db585 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -863,6 +863,11 @@ void set_hw_thermal_trip(void);
 #define POWER_USB_HOST_PHY_CTRL_EN (1  0)
 #define POWER_USB_HOST_PHY_CTRL_DISABLE(0  0)
 
+void set_usbdrd_phy_ctrl(unsigned int enable);
+
+#define POWER_USB_DRD_PHY_CTRL_EN  (1  0)
+#define POWER_USB_DRD_PHY_CTRL_DISABLE (0  0)
+
 void set_dp_phy_ctrl(unsigned int enable);
 
 #define EXYNOS_DP_PHY_ENABLE   (1  0)
-- 
1.7.6.5

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[U-Boot] [PATCH 7/7] temp: ARM: EXYNOS5: Enable xHCI support for Exynos5

2013-07-02 Thread Vivek Gautam
This enables support for xHCI host controller on Exynos5
and further disables EHCI support, to make sure only one
host controller is enabled at a time.

Signed-off-by: Vikas C Sajjan vikas.saj...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
 include/configs/exynos5250-dt.h |5 +
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index de76836..bf7bab6 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -150,8 +150,13 @@
 
 /* USB */
 #define CONFIG_CMD_USB
+/*
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_EXYNOS
+*/
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_XHCI_EXYNOS
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 #define CONFIG_USB_STORAGE
 
 /* USB boot mode */
-- 
1.7.6.5

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[U-Boot] [PATCH 5/7] exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI

2013-07-02 Thread Vivek Gautam
Adding required compatible string for xHCI host controller
as well as USB 3.0 PHY to enable dt support for usb 3.0 on
exynos5.

Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
 include/fdtdec.h |2 ++
 lib/fdtdec.c |2 ++
 2 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index d93e102..28b426e 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -87,7 +87,9 @@ enum fdt_compat_id {
COMPAT_GOOGLE_CROS_EC,  /* Google CROS_EC Protocol */
COMPAT_GOOGLE_CROS_EC_KEYB, /* Google CROS_EC Keyboard */
COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
+   COMPAT_SAMSUNG_EXYNOS5_XHCI,/* Exynos5 XHCI controller */
COMPAT_SAMSUNG_EXYNOS_USB_PHY,  /* Exynos phy controller for usb2.0 */
+   COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos phy controller for usb3.0 */
COMPAT_SAMSUNG_EXYNOS_TMU,  /* Exynos TMU */
COMPAT_SAMSUNG_EXYNOS_FIMD, /* Exynos Display controller */
COMPAT_SAMSUNG_EXYNOS5_DP,  /* Exynos Display port controller */
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index b314268..e62fed0 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -60,7 +60,9 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(GOOGLE_CROS_EC, google,cros-ec),
COMPAT(GOOGLE_CROS_EC_KEYB, google,cros-ec-keyb),
COMPAT(SAMSUNG_EXYNOS_EHCI, samsung,exynos-ehci),
+   COMPAT(SAMSUNG_EXYNOS5_XHCI, samsung,exynos5250-xhci),
COMPAT(SAMSUNG_EXYNOS_USB_PHY, samsung,exynos-usb-phy),
+   COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, samsung,exynos5250-usb3-phy),
COMPAT(SAMSUNG_EXYNOS_TMU, samsung,exynos-tmu),
COMPAT(SAMSUNG_EXYNOS_FIMD, samsung,exynos-fimd),
COMPAT(SAMSUNG_EXYNOS5_DP, samsung,exynos5-dp),
-- 
1.7.6.5

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[U-Boot] [PATCH 6/7] exynos5: dts: Add device node for XHCI

2013-07-02 Thread Vivek Gautam
Adding device node for xhci host controller to enable
usb 3.0 on exynos5250.

Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
 arch/arm/dts/exynos5250.dtsi |   12 
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 2d6dfff..b6a247a 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -139,6 +139,18 @@
interrupts = 0 130 0;
};
 
+   xhci@1200 {
+   compatible = samsung,exynos5250-xhci;
+   reg = 0x1200 0x1;
+   #address-cells = 1;
+   #size-cells = 1;
+
+   phy {
+   compatible = samsung,exynos5250-usb3-phy;
+   reg = 0x1210 0x100;
+   };
+   };
+
ehci@1211 {
compatible = samsung,exynos-ehci;
reg = 0x1211 0x100;
-- 
1.7.6.5

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Re: [U-Boot] [PATCH] cmd_bootm.c: Correct check/return for unsupported sub-command

2013-07-02 Thread Andreas Bießmann
On 07/01/2013 03:09 PM, Tom Rini wrote:
 With the do_bootm_states re-organization, we have the call to any
 potential sub-commands in a single spot.  If one fails, we can then stop
 right there and return to the caller.  Prior to these calls we have
 already ensured that ret is zero so we will not be returning this error
 for some other case.
 
 Signed-off-by: Tom Rini tr...@ti.com

Tested-by: Andreas Bießmann andreas.de...@googlemail.com

on avr32

 ---
  common/cmd_bootm.c |9 +++--
  1 file changed, 7 insertions(+), 2 deletions(-)

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Re: [U-Boot] [PATCH] avr32: fix do_bootm_linux

2013-07-02 Thread Tom Rini
On Tue, Jul 02, 2013 at 01:57:44PM +0200, Andreas Bie??mann wrote:

 Commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 broke bootm on avr32. It
 requires to call do_bootm_linux() with flag set to BOOTM_STATE_OS_PREP before
 calling it again with flag set to BOOTM_STATE_OS_GO.
 Fix this by allowing flag set to BOOTM_STATE_OS_PREP, this however will
 require a complete refactoring later on.
 
 Signed-off-by: Andreas Bie??mann andreas.de...@googlemail.com
 
 ---
  arch/avr32/lib/bootm.c |9 +
  1 file changed, 9 insertions(+)
 
 diff --git a/arch/avr32/lib/bootm.c b/arch/avr32/lib/bootm.c
 index 87f3f9c..eedab9d 100644
 --- a/arch/avr32/lib/bootm.c
 +++ b/arch/avr32/lib/bootm.c
 @@ -187,6 +187,15 @@ int do_bootm_linux(int flag, int argc, char * const 
 argv[], bootm_headers_t *ima
   struct  tag *params, *params_start;
   char*commandline = getenv(bootargs);
  
 + /*
 +  * allow the PREP bootm subcommand, it is required for bootm to work
 +  *
 +  * TODO: Andreas Bie??mann andreas.de...@googlemail.com refactor the
 +  * do_bootm_linux() for avr32
 +  */
 + if (flag  BOOTM_STATE_OS_PREP)
 + return 0;
 +
   if ((flag != 0)  (flag != BOOTM_STATE_OS_GO))
   return 1;

Good catch!  I'm going to make a v2 of this patch that fixes all of the
other arches that're missing this hunk.

-- 
Tom


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[U-Boot] [PATCH 1/4 V3] EXYNOS: Add API for power reset and exit wakeup

2013-07-02 Thread Rajeshwari Shinde
This patch adds APIs to get power reset status and exit the wakeup condition for
both exynos5 and exynos4

Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Expanded the comments for get_reset_status function declaration.
Changes in V3:
- None
 arch/arm/cpu/armv7/exynos/power.c|   50 ++
 arch/arm/include/asm/arch-exynos/power.h |   12 +++
 2 files changed, 62 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/power.c 
b/arch/arm/cpu/armv7/exynos/power.c
index 6375a81..5d3bda2 100644
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -140,3 +140,53 @@ void set_hw_thermal_trip(void)
setbits_le32(power-ps_hold_control, POWER_ENABLE_HW_TRIP);
}
 }
+
+static uint32_t exynos5_get_reset_status(void)
+{
+   struct exynos5_power *power =
+   (struct exynos5_power *)samsung_get_base_power();
+
+   return power-inform1;
+}
+
+static uint32_t exynos4_get_reset_status(void)
+{
+   struct exynos4_power *power =
+   (struct exynos4_power *)samsung_get_base_power();
+
+   return power-inform1;
+}
+
+uint32_t get_reset_status(void)
+{
+   if (cpu_is_exynos5())
+   return exynos5_get_reset_status();
+   else
+   return  exynos4_get_reset_status();
+}
+
+static void exynos5_power_exit_wakeup(void)
+{
+   struct exynos5_power *power =
+   (struct exynos5_power *)samsung_get_base_power();
+   typedef void (*resume_func)(void);
+
+   ((resume_func)power-inform0)();
+}
+
+static void exynos4_power_exit_wakeup(void)
+{
+   struct exynos4_power *power =
+   (struct exynos4_power *)samsung_get_base_power();
+   typedef void (*resume_func)(void);
+
+   ((resume_func)power-inform0)();
+}
+
+void power_exit_wakeup(void)
+{
+   if (cpu_is_exynos5())
+   exynos5_power_exit_wakeup();
+   else
+   exynos4_power_exit_wakeup();
+}
diff --git a/arch/arm/include/asm/arch-exynos/power.h 
b/arch/arm/include/asm/arch-exynos/power.h
index 3549667..b8db663 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -888,4 +888,16 @@ void set_ps_hold_ctrl(void);
  * source as XXTI
  */
 void set_xclkout(void);
+
+/*
+ *  Read inform1 to get the reset status.
+ *  @return: the value can be either S5P_CHECK_SLEEP or
+ *  S5P_CHECK_DIDLE or S5P_CHECK_LPA as stored in inform1
+ *  if none of these then its normal booting.
+ */
+uint32_t get_reset_status(void);
+
+
+/* Read the resume function and call it */
+void power_exit_wakeup(void);
 #endif
-- 
1.7.4.4

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[U-Boot] [PATCH 0/4 V3]EXYNOS: Convert Assembly code to c and make it common

2013-07-02 Thread Rajeshwari Shinde
Convert the assembly code in board/samsung to c and move the same to arch/arm.
lds file made common across SMDKV310, Origen and SMDK5250.
Add the power reset and exit wakeup api for exynos.
Initialise GPIO for uart in Origen and SMDKV310 using pinmux.

Changes in V2:
- Rebased on latest u-boot-samsung tree.
- Incorporated review comments from Simon glass and
Minkyu Kang.
Changes in V3:
- Optimised the mem_ctrl_init function for exynos4.
- Removed magic numbers.

Rajeshwari Shinde (4):
  EXYNOS: Add API for power reset and exit wakeup
  EXYNOS: LDS file move to common
  EXYNOS4210: Configure GPIO for uart
  EXYNOS: Move files from board/samsung to arch/arm

 arch/arm/cpu/armv7/exynos/Makefile |   17 +-
 .../arm/cpu/armv7/exynos}/clock_init.h |0
 arch/arm/cpu/armv7/exynos/clock_init_exynos4.c |   94 +
 .../arm/cpu/armv7/exynos/clock_init_exynos5.c  |   47 +--
 arch/arm/cpu/armv7/exynos/common_setup.h   |   43 ++
 .../arm/cpu/armv7/exynos}/dmc_common.c |7 +-
 .../arm/cpu/armv7/exynos}/dmc_init_ddr3.c  |   19 +-
 arch/arm/cpu/armv7/exynos/dmc_init_exynos4.c   |  225 +++
 .../arm/cpu/armv7/exynos/exynos4_setup.h   |  386 +--
 .../arm/cpu/armv7/exynos/exynos5_setup.h   |   28 +-
 arch/arm/cpu/armv7/exynos/lowlevel_init.c  |   73 
 arch/arm/cpu/armv7/exynos/pinmux.c |   40 ++
 arch/arm/cpu/armv7/exynos/power.c  |   50 +++
 .../arm/cpu/armv7/exynos}/spl_boot.c   |   74 +++-
 arch/arm/include/asm/arch-exynos/cpu.h |5 +-
 arch/arm/include/asm/arch-exynos/power.h   |   12 +
 .../exynos-uboot-spl.lds}  |0
 board/samsung/origen/Makefile  |   11 +-
 board/samsung/origen/lowlevel_init.S   |  357 -
 board/samsung/origen/mem_setup.S   |  421 
 board/samsung/origen/mmc_boot.c|   58 ---
 board/samsung/origen/origen.c  |   46 +++
 board/samsung/smdk5250/Makefile|   14 +-
 board/samsung/smdkv310/Makefile|   10 +-
 board/samsung/smdkv310/lowlevel_init.S |  414 ---
 board/samsung/smdkv310/mem_setup.S |  365 -
 board/samsung/smdkv310/mmc_boot.c  |   60 ---
 board/samsung/smdkv310/smdkv310.c  |   46 +++
 include/configs/exynos5250-dt.h|   10 +-
 include/configs/origen.h   |   10 +-
 include/configs/smdkv310.h |9 +-
 31 files changed, 970 insertions(+), 1981 deletions(-)
 rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/clock_init.h 
(100%)
 create mode 100644 arch/arm/cpu/armv7/exynos/clock_init_exynos4.c
 rename board/samsung/smdk5250/clock_init.c = 
arch/arm/cpu/armv7/exynos/clock_init_exynos5.c (95%)
 create mode 100644 arch/arm/cpu/armv7/exynos/common_setup.h
 rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/dmc_common.c (97%)
 rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/dmc_init_ddr3.c 
(95%)
 create mode 100644 arch/arm/cpu/armv7/exynos/dmc_init_exynos4.c
 rename board/samsung/origen/origen_setup.h = 
arch/arm/cpu/armv7/exynos/exynos4_setup.h (65%)
 rename board/samsung/smdk5250/setup.h = 
arch/arm/cpu/armv7/exynos/exynos5_setup.h (96%)
 create mode 100644 arch/arm/cpu/armv7/exynos/lowlevel_init.c
 rename {board/samsung/smdk5250 = arch/arm/cpu/armv7/exynos}/spl_boot.c (74%)
 rename board/samsung/{smdk5250/smdk5250-uboot-spl.lds = 
common/exynos-uboot-spl.lds} (100%)
 delete mode 100644 board/samsung/origen/lowlevel_init.S
 delete mode 100644 board/samsung/origen/mem_setup.S
 delete mode 100644 board/samsung/origen/mmc_boot.c
 delete mode 100644 board/samsung/smdkv310/lowlevel_init.S
 delete mode 100644 board/samsung/smdkv310/mem_setup.S
 delete mode 100644 board/samsung/smdkv310/mmc_boot.c

-- 
1.7.4.4

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[U-Boot] [PATCH 3/4 V3] EXYNOS4210: Configure GPIO for uart

2013-07-02 Thread Rajeshwari Shinde
This patch configures the gpio values for UART
on Origen and SMDKV310 using pinmux

Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
 arch/arm/cpu/armv7/exynos/pinmux.c |   40 +++
 board/samsung/origen/origen.c  |   46 
 board/samsung/smdkv310/smdkv310.c  |   46 
 include/configs/origen.h   |1 +
 include/configs/smdkv310.h |1 +
 5 files changed, 134 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c 
b/arch/arm/cpu/armv7/exynos/pinmux.c
index bd499b4..2042062 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -408,9 +408,49 @@ static int exynos4_mmc_config(int peripheral, int flags)
return 0;
 }
 
+static void exynos4_uart_config(int peripheral)
+{
+   struct exynos4_gpio_part1 *gpio1 =
+   (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
+   struct s5p_gpio_bank *bank;
+   int i, start, count;
+
+   switch (peripheral) {
+   case PERIPH_ID_UART0:
+   bank = gpio1-a0;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART1:
+   bank = gpio1-a0;
+   start = 4;
+   count = 4;
+   break;
+   case PERIPH_ID_UART2:
+   bank = gpio1-a1;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART3:
+   bank = gpio1-a1;
+   start = 4;
+   count = 2;
+   break;
+   }
+   for (i = start; i  start + count; i++) {
+   s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+   s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+   }
+}
 static int exynos4_pinmux_config(int peripheral, int flags)
 {
switch (peripheral) {
+   case PERIPH_ID_UART0:
+   case PERIPH_ID_UART1:
+   case PERIPH_ID_UART2:
+   case PERIPH_ID_UART3:
+   exynos4_uart_config(peripheral);
+   break;
case PERIPH_ID_I2C0:
case PERIPH_ID_I2C1:
case PERIPH_ID_I2C2:
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index 638e7b1..b7dbb91 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -25,6 +25,8 @@
 #include asm/arch/cpu.h
 #include asm/arch/gpio.h
 #include asm/arch/mmc.h
+#include asm/arch/periph.h
+#include asm/arch/pinmux.h
 
 DECLARE_GLOBAL_DATA_PTR;
 struct exynos4_gpio_part1 *gpio1;
@@ -39,6 +41,50 @@ int board_init(void)
return 0;
 }
 
+static int board_uart_init(void)
+{
+   int err;
+
+   err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART0 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART1 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART2 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART3 not configured\n);
+   return err;
+   }
+
+   return 0;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+   int err;
+   err = board_uart_init();
+   if (err) {
+   debug(UART init failed\n);
+   return err;
+   }
+   return err;
+}
+#endif
+
 int dram_init(void)
 {
gd-ram_size= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
diff --git a/board/samsung/smdkv310/smdkv310.c 
b/board/samsung/smdkv310/smdkv310.c
index 81ac8f6..015b920 100644
--- a/board/samsung/smdkv310/smdkv310.c
+++ b/board/samsung/smdkv310/smdkv310.c
@@ -26,6 +26,8 @@
 #include asm/arch/cpu.h
 #include asm/arch/gpio.h
 #include asm/arch/mmc.h
+#include asm/arch/periph.h
+#include asm/arch/pinmux.h
 #include asm/arch/sromc.h
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -137,3 +139,47 @@ int board_mmc_init(bd_t *bis)
return err;
 }
 #endif
+
+static int board_uart_init(void)
+{
+   int err;
+
+   err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART0 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART1 not configured\n);
+   return err;
+   }
+
+   err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
+   if (err) {
+   debug(UART2 not configured\n);
+   return err;
+   }
+
+   err = 

[U-Boot] [PATCH 2/4 V3] EXYNOS: LDS file move to common

2013-07-02 Thread Rajeshwari Shinde
smdk5250-uboot-spl.lds is moved to common folder, so that it can be reused.
It is renamed to exynos-uboot-spl.lds

Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
Tested-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
 .../exynos-uboot-spl.lds}  |0
 include/configs/exynos5250-dt.h|2 +-
 2 files changed, 1 insertions(+), 1 deletions(-)
 rename board/samsung/{smdk5250/smdk5250-uboot-spl.lds = 
common/exynos-uboot-spl.lds} (100%)

diff --git a/board/samsung/smdk5250/smdk5250-uboot-spl.lds 
b/board/samsung/common/exynos-uboot-spl.lds
similarity index 100%
rename from board/samsung/smdk5250/smdk5250-uboot-spl.lds
rename to board/samsung/common/exynos-uboot-spl.lds
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 1c9eca2..6c7a052 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -153,7 +153,7 @@
 #define COPY_BL2_FNPTR_ADDR0x02020030
 
 /* specific .lds file */
-#define CONFIG_SPL_LDSCRIPTboard/samsung/smdk5250/smdk5250-uboot-spl.lds
+#define CONFIG_SPL_LDSCRIPTboard/samsung/common/exynos-uboot-spl.lds
 #define CONFIG_SPL_TEXT_BASE   0x02023400
 #define CONFIG_SPL_MAX_FOOTPRINT   (14 * 1024)
 
-- 
1.7.4.4

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[U-Boot] [PATCH v2] avr32: fix do_bootm_linux

2013-07-02 Thread Tom Rini
From: Andreas Bießmann andreas.de...@googlemail.com

Commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 broke bootm on avr32. It
requires to call do_bootm_linux() with flag set to BOOTM_STATE_OS_PREP before
calling it again with flag set to BOOTM_STATE_OS_GO.
Fix this by allowing flag set to BOOTM_STATE_OS_PREP, this however will
require a complete refactoring later on.

Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
[trini: Apply to m68k, microblaze, nds32, nios2, openrisc, sh and sparc]
Signed-off-by: Tom Rini tr...@ti.com
---
 arch/avr32/lib/bootm.c  |9 +
 arch/m68k/lib/bootm.c   |6 ++
 arch/microblaze/lib/bootm.c |6 ++
 arch/nds32/lib/bootm.c  |6 ++
 arch/nios2/lib/bootm.c  |6 ++
 arch/openrisc/lib/bootm.c   |6 ++
 arch/sh/lib/bootm.c |6 ++
 arch/sparc/lib/bootm.c  |6 ++
 8 files changed, 51 insertions(+)

diff --git a/arch/avr32/lib/bootm.c b/arch/avr32/lib/bootm.c
index 87f3f9c..eedab9d 100644
--- a/arch/avr32/lib/bootm.c
+++ b/arch/avr32/lib/bootm.c
@@ -187,6 +187,15 @@ int do_bootm_linux(int flag, int argc, char * const 
argv[], bootm_headers_t *ima
struct  tag *params, *params_start;
char*commandline = getenv(bootargs);
 
+   /*
+* allow the PREP bootm subcommand, it is required for bootm to work
+*
+* TODO: Andreas Bießmann andreas.de...@googlemail.com refactor the
+* do_bootm_linux() for avr32
+*/
+   if (flag  BOOTM_STATE_OS_PREP)
+   return 0;
+
if ((flag != 0)  (flag != BOOTM_STATE_OS_GO))
return 1;
 
diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c
index 56b6512..cc45167 100644
--- a/arch/m68k/lib/bootm.c
+++ b/arch/m68k/lib/bootm.c
@@ -75,6 +75,12 @@ int do_bootm_linux(int flag, int argc, char * const argv[], 
bootm_headers_t *ima
void  (*kernel) (bd_t *, ulong, ulong, ulong, ulong);
struct lmb *lmb = images-lmb;
 
+   /*
+* allow the PREP bootm subcommand, it is required for bootm to work
+*/
+   if (flag  BOOTM_STATE_OS_PREP)
+   return 0;
+
if ((flag != 0)  (flag != BOOTM_STATE_OS_GO))
return 1;
 
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index b328f94..c5dfc9e 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -40,6 +40,12 @@ int do_bootm_linux(int flag, int argc, char * const argv[],
char*commandline = getenv(bootargs);
ulong   rd_data_start, rd_data_end;
 
+   /*
+* allow the PREP bootm subcommand, it is required for bootm to work
+*/
+   if (flag  BOOTM_STATE_OS_PREP)
+   return 0;
+
if ((flag != 0)  (flag != BOOTM_STATE_OS_GO))
return 1;
 
diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c
index 03f58bf..65ae1eb 100644
--- a/arch/nds32/lib/bootm.c
+++ b/arch/nds32/lib/bootm.c
@@ -58,6 +58,12 @@ int do_bootm_linux(int flag, int argc, char *argv[], 
bootm_headers_t *images)
char *commandline = getenv(bootargs);
 #endif
 
+   /*
+* allow the PREP bootm subcommand, it is required for bootm to work
+*/
+   if (flag  BOOTM_STATE_OS_PREP)
+   return 0;
+
if ((flag != 0)  (flag != BOOTM_STATE_OS_GO))
return 1;
 
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
index 114e146..51597ea 100644
--- a/arch/nios2/lib/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -45,6 +45,12 @@ int do_bootm_linux(int flag, int argc, char * const argv[], 
bootm_headers_t *ima
if (of_flat_tree)
initrd_end = (ulong)of_flat_tree;
 
+   /*
+* allow the PREP bootm subcommand, it is required for bootm to work
+*/
+   if (flag  BOOTM_STATE_OS_PREP)
+   return 0;
+
if ((flag != 0)  (flag != BOOTM_STATE_OS_GO))
return 1;
 
diff --git a/arch/openrisc/lib/bootm.c b/arch/openrisc/lib/bootm.c
index 7f716b8..24ca0a7 100644
--- a/arch/openrisc/lib/bootm.c
+++ b/arch/openrisc/lib/bootm.c
@@ -41,6 +41,12 @@ int do_bootm_linux(int flag, int argc, char * const argv[],
void(*kernel) (unsigned int);
ulong   rd_data_start, rd_data_end;
 
+   /*
+* allow the PREP bootm subcommand, it is required for bootm to work
+*/
+   if (flag  BOOTM_STATE_OS_PREP)
+   return 0;
+
if ((flag != 0)  (flag != BOOTM_STATE_OS_GO))
return 1;
 
diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c
index 57273fa..4fdc7aa 100644
--- a/arch/sh/lib/bootm.c
+++ b/arch/sh/lib/bootm.c
@@ -79,6 +79,12 @@ int do_bootm_linux(int flag, int argc, char * const argv[], 
bootm_headers_t *ima
unsigned long size = images-ep - (unsigned long)param;
char *bootargs = getenv(bootargs);
 
+   /*
+* allow the PREP bootm subcommand, it is required for bootm to work
+*/
+   

Re: [U-Boot] [PATCH v2] avr32: fix do_bootm_linux

2013-07-02 Thread Tom Rini
On Tue, Jul 02, 2013 at 09:17:04AM -0400, Tom Rini wrote:

 From: Andreas Bie??mann andreas.de...@googlemail.com

OK, forgot to update the topline commit message to:
avr32/m68k/microblaze/nds32/nios2/openrisc/sh/sparc: fix do_bootm_linux

-- 
Tom


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Re: [U-Boot] [PATCH] avr32: fix do_bootm_linux

2013-07-02 Thread Andreas Bießmann
On 07/02/2013 03:03 PM, Tom Rini wrote:
 On Tue, Jul 02, 2013 at 01:57:44PM +0200, Andreas Bießmann wrote:
 
 Commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 broke bootm on avr32. It
 requires to call do_bootm_linux() with flag set to BOOTM_STATE_OS_PREP before
 calling it again with flag set to BOOTM_STATE_OS_GO.
 Fix this by allowing flag set to BOOTM_STATE_OS_PREP, this however will
 require a complete refactoring later on.

 Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com

 ---
  arch/avr32/lib/bootm.c |9 +
  1 file changed, 9 insertions(+)

 diff --git a/arch/avr32/lib/bootm.c b/arch/avr32/lib/bootm.c
 index 87f3f9c..eedab9d 100644
 --- a/arch/avr32/lib/bootm.c
 +++ b/arch/avr32/lib/bootm.c
 @@ -187,6 +187,15 @@ int do_bootm_linux(int flag, int argc, char * const 
 argv[], bootm_headers_t *ima
  struct  tag *params, *params_start;
  char*commandline = getenv(bootargs);
  
 +/*
 + * allow the PREP bootm subcommand, it is required for bootm to work
 + *
 + * TODO: Andreas Bie??mann andreas.de...@googlemail.com refactor the
 + * do_bootm_linux() for avr32
 + */
 +if (flag  BOOTM_STATE_OS_PREP)
 +return 0;
 +
  if ((flag != 0)  (flag != BOOTM_STATE_OS_GO))
  return 1;
 
 Good catch!  I'm going to make a v2 of this patch that fixes all of the
 other arches that're missing this hunk.

Ok, thank you Tom

Regards,

Andreas Bießmann
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[U-Boot] [PULL] u-boot-usb/master

2013-07-02 Thread Marek Vasut
Some more fixes for RC2

The following changes since commit e6bf18dba2a21bebf2c421b1c2e188225f6485a1:

  Prepare v2013.07-rc2 (2013-06-28 18:03:51 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-usb.git master   





for you to fetch changes up to befd387242143ba0f7e298cfef6baf26c4260ec0:





  usb: add support for the USB Ethernet adapter D-Link DUB-E100 H/W Ver C1 
(2013-06-30 18:41:08 +0200) 
 






Heiko Schocher (5): 


  dfu: make data buffer size configurable
  usb, dfu gadget: switch to dfu mode in dfu_bind
  usb, g_dnl: make possibility to fixup the device_desc board specific
  usb, musb-new: add wdt trigger
  usb: fix unaligned access in device_qual()

Lukasz Majewski (1):
  dfu:function: Fix number of allocated DFU function pointers

Pierre Aubert (1):
  usb: add support for the USB Ethernet adapter D-Link DUB-E100 H/W Ver C1

Piotr Wilczek (2):
  drivers:usb: use get|put_unaligned_le16
  usb:composite: use memcpy to avoid unaligned access

 README  |6 ++
 drivers/dfu/dfu.c   |   49 
+
 drivers/usb/eth/asix.c  |1 +
 drivers/usb/gadget/composite.c  |3 ++-
 drivers/usb/gadget/f_dfu.c  |6 --
 drivers/usb/gadget/f_mass_storage.c |8 
 drivers/usb/gadget/g_dnl.c  |7 +++
 drivers/usb/musb-new/musb_uboot.c   |2 ++
 include/dfu.h   |4 +++-
 include/g_dnl.h |2 +-
 include/linux/usb/composite.h   |2 +-
 11 files changed, 72 insertions(+), 18 deletions(-)
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Re: [U-Boot] [ANN] v2013.07-rc2

2013-07-02 Thread Simon Glass
Hi Robert,

On Jul 2, 2013 8:41 PM, Robert Nelson robertcnel...@gmail.com wrote:

 On Tue, Jul 2, 2013 at 2:39 AM, Simon Glass s...@chromium.org wrote:
  Hi Robert,
 
  On Tue, Jul 2, 2013 at 5:44 AM, Robert Nelson robertcnel...@gmail.com
  wrote:
 
  On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
   Hey all,
  
   I've tagged and pushed v2013.07-rc2.  A bit more over the place than
I
   should have gone, but picked up a lot of things that have been
   outstanding for a while.  The big thing is a refactor of the boot
loop.
   Everything should be working right now, but please test.  Related to
   this is the ability to have crytpographically signed images.  It's
like
   secure boot in UEFI land, but hopefully without the kerfuffle.
  
   If you've got changes outstanding still, please start gently poking
   custodians with patchwork links.  I've got a good bit of stuff I
need to
   deal with myself still, but please prod me all the same.
 
  So, the bootm refactor ( 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 )
  also broke bootz/zImage...
 
  Got it to atleast get past the invalid OS message via:
 
  diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
  index 02a5013..a0b55ef 100644
  --- a/common/cmd_bootm.c
  +++ b/common/cmd_bootm.c
  @@ -1744,6 +1744,12 @@ static int bootz_start(cmd_tbl_t *cmdtp, int
  flag, int argc,
  int ret;
  void *zi_start, *zi_end;
 
  +   memset(images, 0, sizeof(bootm_headers_t));
  +
  +   boot_start_lmb(images);
  +
  +   images-os.os = IH_OS_LINUX;
  +
  ret = do_bootm_states(cmdtp, flag, argc, argv,
BOOTM_STATE_START,
images, 1);
 
  However it's still locking up at Starting Kernel ...
 
 
  What board is this please? I have only tested on x86, but perhaps have
  missed something here.

 So far it looks like any arm board...  I was working on specifically
 the imx6 quad core wandboard bringup.  But i've also verified it on
 the Panda/Beagle too...  Alll 3 of these boards worked fine with
 v2013.07-rc1...

 Wandboard:

 Boot Sequence: (device tree boot)
 load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
 load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}
 bootz ${loadaddr} - ${fdt_addr}

 U-Boot 2013.07-rc2-1-g23c15c2-dirty (Jul 02 2013 - 06:33:59)

 CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
 Reset cause: POR
 Board: Wandboard
 DRAM:  2 GiB
 MMC:   FSL_SDHC: 0, FSL_SDHC: 1
 *** Warning - bad CRC, using default environment

 In:serial
 Out:   serial
 Err:   serial
 Net:   FEC [PRIME]
 Warning: FEC using MAC address from net device

 Hit any key to stop autoboot:  0
 = load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
 4112496 bytes read in 307 ms (12.8 MiB/s)
 = load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /dtbs/${fdt_file}
 22150 bytes read in 126 ms (170.9 KiB/s)
 = bootz ${loadaddr} - ${fdt_addr}

 Beagle xM:

 Boot Sequence: (old board file boot)
 fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage
 bootz ${loadaddr}

 OMAP3 beagleboard.org # fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
zImage
 reading zImage
 3421392 bytes read in 246 ms (13.3 MiB/s)
 OMAP3 beagleboard.org # bootz ${loadaddr}
 data abort

 MAYBE you should read doc/README.arm-unaligned-accesses

 pc : [9ff8bf20]  lr : [9ff5d2a8]
 sp : 9fef8bd8  ip : 9ff8 fp : 9fef9760
 r10: 9ffa6314  r9 : 9ffa7710 r8 : 9fef8f30
 r7 : 805434d0  r6 : 00020e61 r5 : ffafefff  r4 : 9ff9c6e6
 r3 : 00020e61  r2 : 003434d0 r1 : 8020  r0 : 9fef8cf0
 Flags: nzcv  IRQs off  FIQs off  Mode SVC_32
 Resetting CPU ...

 resetting ...

 U-Boot SPL 2013.07-rc2-1-g7c2cb8a-dirty (Jul 02 2013 - 06:14:53)

Thanks for the details. I will take a look later today US time.

Regards,
Simon


 Regards,

 --
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 http://www.rcn-ee.com/
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Re: [U-Boot] UART output has problems with latest uboot source code on S5PC100 board

2013-07-02 Thread Lukasz Majewski
On Tue, 02 Jul 2013 17:21:28 +0800, tiger...@viatech.com.cn wrote:
 Hi, Samsung Engineers:
 I have a S5PC100 development board.
 I tried to use latest uboot code to boot, and UART output has bugs.
 It would lose many messages.
 I use UART0 as the default com port.
 
 Have you ever tried latest uboot code on S5PC100 board?
 

In the MAINTAINERS file you can find a list of boards (not only from
SAMSUNG) and contact information to people responsible for them.


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-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PULL] u-boot-usb/master

2013-07-02 Thread Lukasz Majewski
On Tue, 02 Jul 2013 16:04:59 +0200, Marek Vasut wrote:
   
   
 
 Heiko Schocher
 (5): dfu: make data buffer size configurable
   usb, dfu gadget: switch to dfu mode in dfu_bind
   usb, g_dnl: make possibility to fixup the device_desc board
 specific usb, musb-new: add wdt trigger
   usb: fix unaligned access in device_qual()
 
 Lukasz Majewski (1):
   dfu:function: Fix number of allocated DFU function pointers
 
 Pierre Aubert (1):
   usb: add support for the USB Ethernet adapter D-Link DUB-E100
 H/W Ver C1
 
 Piotr Wilczek (2):
   drivers:usb: use get|put_unaligned_le16
   usb:composite: use memcpy to avoid unaligned access

Marek can you wait until following DFU fixes are tested/evaluated:

http://patchwork.ozlabs.org/patch/255471/
http://patchwork.ozlabs.org/patch/255472/

Tom  Heiko, can you look onto them?

 
  README  |6 ++
  drivers/dfu/dfu.c   |   49 
 +
  drivers/usb/eth/asix.c  |1 +
  drivers/usb/gadget/composite.c  |3 ++-
  drivers/usb/gadget/f_dfu.c  |6 --
  drivers/usb/gadget/f_mass_storage.c |8 
  drivers/usb/gadget/g_dnl.c  |7 +++
  drivers/usb/musb-new/musb_uboot.c   |2 ++
  include/dfu.h   |4 +++-
  include/g_dnl.h |2 +-
  include/linux/usb/composite.h   |2 +-
  11 files changed, 72 insertions(+), 18 deletions(-)
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-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH] mtd: mxc_nand: Fix crash after MTD resync

2013-07-02 Thread Marek Vasut
The driver triggered a BUG() in nand_base.c:3214/nand_scan_tail()
because the ecc.strength was incorrectly set in case of NAND_ECC_HW
instead of NAND_ECC_HW_SYNDROME ECC mode.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Scott Wood scottw...@freescale.com
---
 drivers/mtd/nand/mxc_nand.c |7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index ac435f2..08c7b8b 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -1238,15 +1238,12 @@ int board_nand_init(struct nand_chip *this)
this-ecc.write_oob = mxc_nand_write_oob_syndrome;
this-ecc.bytes = 9;
this-ecc.prepad = 7;
-   } else {
-   this-ecc.mode = NAND_ECC_HW;
-   }
-
-   if (this-ecc.mode == NAND_ECC_HW) {
if (is_mxc_nfc_1())
this-ecc.strength = 1;
else
this-ecc.strength = 4;
+   } else {
+   this-ecc.mode = NAND_ECC_HW;
}
 
host-pagesize_2k = 0;
-- 
1.7.10.4

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[U-Boot] [RFC] [UBOOT] [PATCH v3 2/7] USB: Adapt the usb-compat.h to uboot and fix compiler errors

2013-07-02 Thread Dan Murphy
Adapt the usb-compat.h to uBoot.

Use #ifndef __UBOOT__ for code that is not applicable to uBoot.
Use #ifdef __UBOOT__ to add code that is uBoot specific.

Create linux-compat.h - Linux kernel compatibility definitions that do not
exist in the uBoot.  Moved the compatibility definitions from 
lin_gadget_compat.h
to this file as well.

Create usb-mod-devicetable.h - Is a partial back port of mod_devicetable.h in 
the linux
kernel only taking the portion needed for USB

Already existing header files were modified to pick up the new header files.

Currently musb will not compile.

Signed-off-by: Dan Murphy dmur...@ti.com
---
 drivers/usb/musb-new/musb_host.h|1 +
 drivers/usb/musb-new/usb-compat.h   |   30 
 include/linux/usb/gadget.h  |  184 +++-
 include/linux/usb/linux-compat.h|  233 +++
 include/linux/usb/usb-compat.h  |  186 +---
 include/linux/usb/usb-mod-devicetable.h |  131 +
 include/usb.h   |  119 +---
 include/usb/lin_gadget_compat.h |   29 +---
 8 files changed, 684 insertions(+), 229 deletions(-)
 create mode 100644 include/linux/usb/linux-compat.h
 create mode 100644 include/linux/usb/usb-mod-devicetable.h

diff --git a/drivers/usb/musb-new/musb_host.h b/drivers/usb/musb-new/musb_host.h
index ebebe0c..49cb094 100644
--- a/drivers/usb/musb-new/musb_host.h
+++ b/drivers/usb/musb-new/musb_host.h
@@ -35,6 +35,7 @@
 #ifndef _MUSB_HOST_H
 #define _MUSB_HOST_H
 #ifdef __UBOOT__
+#include linux/usb/usb-compat.h
 #include usb-compat.h
 #endif
 
diff --git a/drivers/usb/musb-new/usb-compat.h 
b/drivers/usb/musb-new/usb-compat.h
index 27f656f..bdb5f0e 100644
--- a/drivers/usb/musb-new/usb-compat.h
+++ b/drivers/usb/musb-new/usb-compat.h
@@ -6,13 +6,6 @@
 struct usb_hcd {
void *hcd_priv;
 };
-
-struct usb_host_endpoint {
-   struct usb_endpoint_descriptor  desc;
-   struct list_head urb_list;
-   void *hcpriv;
-};
-
 /*
  * urb-transfer_flags:
  *
@@ -20,29 +13,6 @@ struct usb_host_endpoint {
  */
 #define URB_SHORT_NOT_OK   0x0001  /* report short reads as errors */
 #define URB_ZERO_PACKET0x0040  /* Finish bulk OUT with short 
packet */
-
-struct urb;
-
-typedef void (*usb_complete_t)(struct urb *);
-
-struct urb {
-   void *hcpriv;   /* private data for host controller */
-   struct list_head urb_list;  /* list head for use by the urb's
-* current owner */
-   struct usb_device *dev; /* (in) pointer to associated device */
-   struct usb_host_endpoint *ep;   /* (internal) pointer to endpoint */
-   unsigned int pipe;  /* (in) pipe information */
-   int status; /* (return) non-ISO status */
-   unsigned int transfer_flags;/* (in) URB_SHORT_NOT_OK | ...*/
-   void *transfer_buffer;  /* (in) associated data buffer */
-   dma_addr_t transfer_dma;/* (in) dma addr for transfer_buffer */
-   u32 transfer_buffer_length; /* (in) data buffer length */
-   u32 actual_length;  /* (return) actual transfer length */
-   unsigned char *setup_packet;/* (in) setup packet (control only) */
-   int start_frame;/* (modify) start frame (ISO) */
-   usb_complete_t complete;/* (in) completion routine */
-};
-
 #define usb_hcd_link_urb_to_ep(hcd, urb)   ({  \
int ret = 0;\
list_add_tail(urb-urb_list, urb-ep-urb_list);  \
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 220d068..f987ff2 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -18,7 +18,11 @@
 #ifndef __LINUX_USB_GADGET_H
 #define __LINUX_USB_GADGET_H
 
+#include common.h
 #include linux/list.h
+#include linux/usb/linux-compat.h
+
+#define USB_GADGET_DELAYED_STATUS   0x7fff /* Impossibly large value */
 
 struct usb_ep;
 
@@ -83,6 +87,11 @@ struct usb_request {
unsignedlength;
dma_addr_t  dma;
 
+   struct scatterlist  *sg;
+   unsignednum_sgs;
+   unsignednum_mapped_sgs;
+
+   unsignedstream_id:16;
unsignedno_interrupt:1;
unsignedzero:1;
unsignedshort_not_ok:1;
@@ -119,6 +128,8 @@ struct usb_ep_ops {
int (*dequeue) (struct usb_ep *ep, struct usb_request *req);
 
int (*set_halt) (struct usb_ep *ep, int value);
+   int (*set_wedge) (struct usb_ep *ep);
+
int (*fifo_status) (struct usb_ep *ep);
void (*fifo_flush) (struct usb_ep *ep);
 };
@@ -140,10 +151,17 @@ struct usb_ep_ops {
  */
 struct usb_ep {
void*driver_data;
+
const char  *name;
 

[U-Boot] [RFC] [UBOOT] [PATCH v3 5/7] omap5: usb: Add usb otg clocks and enable

2013-07-02 Thread Dan Murphy
Add and enable the USB OTG clocks.

Signed-off-by: Dan Murphy dmur...@ti.com
---
 arch/arm/cpu/armv7/omap5/hw_data.c  |   14 ++
 arch/arm/cpu/armv7/omap5/prcm-regs.c|1 +
 arch/arm/include/asm/arch-omap5/clock.h |4 
 arch/arm/include/asm/omap_common.h  |1 +
 common/cmd_usb.c|6 +-
 include/configs/omap5_common.h  |9 +
 6 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c 
b/arch/arm/cpu/armv7/omap5/hw_data.c
index 56cf1f8..7b88338 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -456,6 +456,20 @@ void enable_basic_clocks(void)
OPTFCLKEN_SCRM_PER_MASK);
setbits_le32((*prcm)-cm_wkupaon_scrm_clkctrl,
OPTFCLKEN_SCRM_CORE_MASK);
+
+/* TODO wrap this with USB defines */
+   /* Setting OCP2SCP1 register */
+   setbits_le32((*prcm)-cm_l3init_ocp2scp1_clkctrl,
+   MODULE_CLKCTRL_MODULEMODE_HW_AUTO);
+
+   /* Select USB OTG SS clock */
+   setbits_le32((*prcm)-cm_l3init_usb_otg_ss_clkctrl,
+   (MODULE_CLKCTRL_MODULEMODE_HW_AUTO |
+OPTFCLKEN_USB_OTG_SS_FCLK_MASK));
+
+   /* Setting l3init register */
+   setbits_le32((*prcm)-cm_l3init_clkstctrl, 
OPTFCLKEN_USB_OTG_SS_FCLK_MASK);
+
 }
 
 void enable_basic_uboot_clocks(void)
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c 
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index e839ff5..f90da58 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -718,6 +718,7 @@ struct prcm_regs const omap5_es2_prcm = {
.cm_l3init_p1500_clkctrl = 0x4a009678,
.cm_l3init_fsusb_clkctrl = 0x4a0096d0,
.cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0,
+   .cm_l3init_usb_otg_ss_clkctrl = 0x4a0096f0,
 
/* prm irqstatus regs */
.prm_irqstatus_mpu_2 = 0x4ae06014,
diff --git a/arch/arm/include/asm/arch-omap5/clock.h 
b/arch/arm/include/asm/arch-omap5/clock.h
index 4d2765d..24ef2bc 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -165,6 +165,10 @@
 /* CM_L3INIT_USBPHY_CLKCTRL */
 #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK  8
 
+/* CM_L3INIT_USB_OTG_SS_CLKCTRL */
+#define OPTFCLKEN_USB_OTG_SS_FCLK_SHIFT8
+#define OPTFCLKEN_USB_OTG_SS_FCLK_MASK (1  8)
+
 /* CM_MPU_MPU_CLKCTRL */
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24
 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK  (3  24)
diff --git a/arch/arm/include/asm/omap_common.h 
b/arch/arm/include/asm/omap_common.h
index 0dbe81b..11cc870 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -241,6 +241,7 @@ struct prcm_regs {
u32 cm_l3init_p1500_clkctrl;
u32 cm_l3init_fsusb_clkctrl;
u32 cm_l3init_ocp2scp1_clkctrl;
+   u32 cm_l3init_usb_otg_ss_clkctrl;
 
u32 prm_irqstatus_mpu_2;
 
diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index 70e803b..816fb23 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -31,6 +31,7 @@
 #include asm/unaligned.h
 #include part.h
 #include usb.h
+#include linux/usb/usb-compat.h
 
 #ifdef CONFIG_USB_STORAGE
 static int usb_stor_curr_dev = -1; /* current device */
@@ -160,6 +161,7 @@ static void usb_display_string(struct usb_device *dev, int 
index)
 
 static void usb_display_desc(struct usb_device *dev)
 {
+#if 0
if (dev-descriptor.bDescriptorType == USB_DT_DEVICE) {
printf(%d: %s,  USB Revision %x.%x\n, dev-devnum,
usb_get_class_desc(dev-config.if_desc[0].desc.bInterfaceClass),
@@ -189,7 +191,7 @@ static void usb_display_desc(struct usb_device *dev)
(dev-descriptor.bcdDevice8)  0xff,
dev-descriptor.bcdDevice  0xff);
}
-
+#endif
 }
 
 static void usb_display_conf_desc(struct usb_config_descriptor *config,
@@ -350,10 +352,12 @@ static void usb_show_tree_graph(struct usb_device *dev, 
char *pre)
pre[index++] = ' ';
pre[index++] = has_child ? '|' : ' ';
pre[index] = 0;
+#if 0
printf( %s (%s, %dmA)\n, usb_get_class_desc(

dev-config.if_desc[0].desc.bInterfaceClass),
portspeed(dev-speed),
dev-config.desc.bMaxPower * 2);
+#endif
if (strlen(dev-mf) || strlen(dev-prod) || strlen(dev-serial))
printf( %s  %s %s %s\n, pre, dev-mf, dev-prod, dev-serial);
printf( %s\n, pre);
diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
index b87ee42..1df553e 100644
--- a/include/configs/omap5_common.h
+++ b/include/configs/omap5_common.h
@@ -96,6 +96,15 @@
 
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
+/* USB */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_DWC3
+#define 

[U-Boot] Backport of DWC3 and xHCI stack from Linux kernel to uBoot

2013-07-02 Thread Dan Murphy
This patch series has been generated in an effort to get comments on 
the implementation of the dwc and xHCI code within the uBoot.

v3 series adds the xHCI back port from the linux kernel

The first patch is the one of major concern as this patch will make an
attempt to commonize the usb headers so that there is re-use and prepare
the usb headers for future usb code back ports from the linux kernel.

This code will compile for omap5 and omap4 but fails for am335x. 
Before I invest anymore time in this I would like to understand if there are
any comments on the overall implemenation.


 Makefile|1 +
 arch/arm/cpu/armv7/omap5/hw_data.c  |   14 +
 arch/arm/cpu/armv7/omap5/prcm-regs.c|1 +
 arch/arm/include/asm/arch-omap5/clock.h |4 +
 arch/arm/include/asm/omap_common.h  |1 +
 common/cmd_usb.c|6 +-
 common/usb.c|1 +
 common/usb_hub.c|1 +
 drivers/usb/dwc3/Makefile   |   53 +
 drivers/usb/dwc3/core.c |  853 ++
 drivers/usb/dwc3/core.h |  990 +++
 drivers/usb/dwc3/dwc3-omap.c|  507 
 drivers/usb/dwc3/dwc3-omap.h|   41 +
 drivers/usb/dwc3/dwc3-uboot.c   |  384 +++
 drivers/usb/dwc3/ep0.c  | 1089 +++
 drivers/usb/dwc3/gadget.c   | 2819 ++
 drivers/usb/dwc3/gadget.h   |  196 ++
 drivers/usb/dwc3/host.c |  108 +
 drivers/usb/dwc3/io.h   |   81 +
 drivers/usb/host/Makefile   |7 +
 drivers/usb/host/xhci-ext-caps.h|  167 ++
 drivers/usb/host/xhci-hub.c | 1231 
 drivers/usb/host/xhci-mem.c | 2554 
 drivers/usb/host/xhci-plat.c|  207 ++
 drivers/usb/host/xhci-ring.c| 4059 ++
 drivers/usb/host/xhci.c | 4815 +++
 drivers/usb/host/xhci.h | 1872 
 drivers/usb/musb-new/musb_host.h|1 +
 drivers/usb/musb-new/usb-compat.h   |   30 -
 include/asm-generic/scatterlist.h   |   34 +
 include/configs/omap5_common.h  |   10 +
 include/linux/usb/ch11.h|  279 ++
 include/linux/usb/gadget.h  |  184 +-
 include/linux/usb/hcd.h |  680 +
 include/linux/usb/linux-compat.h|  280 ++
 include/linux/usb/usb-compat.h  | 1965 +
 include/linux/usb/usb-mod-devicetable.h |  131 +
 include/usb.h   |  153 +-
 include/usb/lin_gadget_compat.h |   29 +-
 39 files changed, 25593 insertions(+), 245 deletions(-)


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[U-Boot] [RFC] [UBOOT] [PATCH v3 4/7] USB: dwc3: dwc3 code adaption for uBoot

2013-07-02 Thread Dan Murphy
All code not applicable to uBoot is ifdef'd out with

ifndef __UBOOT__ as it is done in the musb-new directory.

This code has not been fully debuged or excersized.

Signed-off-by: Dan Murphy dmur...@ti.com
---
 Makefile  |1 +
 drivers/usb/dwc3/Makefile |   53 ++
 drivers/usb/dwc3/core.c   |   90 +-
 drivers/usb/dwc3/core.h   |   53 +-
 drivers/usb/dwc3/dwc3-omap.c  |   28 ++-
 drivers/usb/dwc3/dwc3-omap.h  |   41 +
 drivers/usb/dwc3/dwc3-uboot.c |  384 +
 drivers/usb/dwc3/ep0.c|   31 +++-
 drivers/usb/dwc3/gadget.c |   75 +++-
 drivers/usb/dwc3/gadget.h |2 +
 drivers/usb/dwc3/host.c   |   27 ++-
 drivers/usb/dwc3/io.h |   15 ++
 12 files changed, 779 insertions(+), 21 deletions(-)
 create mode 100644 drivers/usb/dwc3/Makefile
 create mode 100644 drivers/usb/dwc3/dwc3-omap.h
 create mode 100644 drivers/usb/dwc3/dwc3-uboot.c

diff --git a/Makefile b/Makefile
index fdaddb9..e4a6264 100644
--- a/Makefile
+++ b/Makefile
@@ -327,6 +327,7 @@ LIBS-y += drivers/usb/gadget/libusb_gadget.o
 LIBS-y += drivers/usb/host/libusb_host.o
 LIBS-y += drivers/usb/musb/libusb_musb.o
 LIBS-y += drivers/usb/musb-new/libusb_musb-new.o
+LIBS-y += drivers/usb/dwc3/libusb_dwc3.o
 LIBS-y += drivers/usb/phy/libusb_phy.o
 LIBS-y += drivers/usb/ulpi/libusb_ulpi.o
 LIBS-y += drivers/video/libvideo.o
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
new file mode 100644
index 000..0d589cc
--- /dev/null
+++ b/drivers/usb/dwc3/Makefile
@@ -0,0 +1,53 @@
+#
+# (C) Copyright 2013
+# Texas Instruments Incorporated.
+#
+# Author: Dan Murphy dmur...@ti.com
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB:= $(obj)libusb_dwc3.o
+
+COBJS-$(CONFIG_USB_DWC3) += core.o dwc3-uboot.o
+COBJS-$(CONFIG_USB_DWC3_GADGET) += gadget.o ep0.o
+COBJS-$(CONFIG_USB_DWC3_HOST) += host.o
+COBJS-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o
+
+CFLAGS_NO_WARN := $(call cc-option,-Wno-unused-variable) \
+   $(call cc-option,-Wno-unused-label)
+CFLAGS += $(CFLAGS_NO_WARN)
+
+COBJS  := $(COBJS-y)
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+all:   $(LIB)
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
+
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index c35d49d..1bf1882 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -6,6 +6,8 @@
  * Authors: Felipe Balbi ba...@ti.com,
  * Sebastian Andrzej Siewior bige...@linutronix.de
  *
+ * Back-ported by: Dan Murphy dmur...@ti.com
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
@@ -36,6 +38,9 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#define __UBOOT__
+#ifndef __UBOOT__
+
 #include linux/module.h
 #include linux/kernel.h
 #include linux/slab.h
@@ -51,14 +56,28 @@
 #include linux/of.h
 
 #include linux/usb/otg.h
+
+#include linux/usb/ch9.h
+#include linux/usb/gadget.h
+
+#else
+#include common.h
+
+#include linux/err.h
 #include linux/usb/ch9.h
 #include linux/usb/gadget.h
+#include linux/usb/linux-compat.h
+
+#endif
 
 #include core.h
 #include gadget.h
 #include io.h
 
+#ifndef __UBOOT__
+/* TODO: Need to move over the debug files */
 #include debug.h
+#endif
 
 static char *maximum_speed = super;
 module_param(maximum_speed, charp, 0);
@@ -98,9 +117,11 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc)
reg = dwc3_readl(dwc-regs, DWC3_GUSB2PHYCFG(0));
reg |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
dwc3_writel(dwc-regs, DWC3_GUSB2PHYCFG(0), reg);
-
+#ifndef __UBOOT__
+   /* FIX THIS DM */
usb_phy_init(dwc-usb2_phy);
usb_phy_init(dwc-usb3_phy);
+#endif
mdelay(100);
 
/* Clear USB3 PHY reset */
@@ -145,7 +166,11 @@ static struct dwc3_event_buffer 
*dwc3_alloc_one_event_buffer(struct dwc3 *dwc,
 {
struct dwc3_event_buffer

[U-Boot] [RFC] [UBOOT] [PATCH v3 7/7] USB: Modify the xHCI to adapt to the uBoot code base

2013-07-02 Thread Dan Murphy
Modify the xHCI Linux kernel code base with #ifdefs __UBOOT__ to
adapt the xHCI to the uBoot code.

DMA and Radix needs investigating.

Signed-off-by: Dan Murphy dmur...@ti.com
---
 common/usb.c  |1 +
 common/usb_hub.c  |1 +
 drivers/usb/host/Makefile |7 +
 drivers/usb/host/xhci-ext-caps.h  |   12 ++
 drivers/usb/host/xhci-hub.c   |   19 +-
 drivers/usb/host/xhci-mem.c   |  113 ++--
 drivers/usb/host/xhci-pci.c   |  356 -
 drivers/usb/host/xhci-plat.c  |8 +-
 drivers/usb/host/xhci-ring.c  |   52 +-
 drivers/usb/host/xhci.c   |   82 +++--
 drivers/usb/host/xhci.h   |   20 ++-
 include/asm-generic/scatterlist.h |   34 
 include/configs/omap5_common.h|1 +
 include/linux/usb/ch11.h  |   13 ++
 include/linux/usb/hcd.h   |   10 +-
 include/linux/usb/linux-compat.h  |   47 +
 include/linux/usb/usb-compat.h|4 +-
 include/usb.h |   34 +---
 18 files changed, 382 insertions(+), 432 deletions(-)
 delete mode 100644 drivers/usb/host/xhci-pci.c
 create mode 100644 include/asm-generic/scatterlist.h

diff --git a/common/usb.c b/common/usb.c
index 55fff5b..99aead8 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -53,6 +53,7 @@
 #include asm/unaligned.h
 
 #include usb.h
+#include linux/usb/hcd.h
 #ifdef CONFIG_4xx
 #include asm/4xx_pci.h
 #endif
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 774ba63..e18e34d 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -49,6 +49,7 @@
 #include asm/unaligned.h
 
 #include usb.h
+#include linux/usb/ch11.h /* usb structure information */
 #ifdef CONFIG_4xx
 #include asm/4xx_pci.h
 #endif
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 98f2a10..a483182 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -58,6 +58,12 @@ COBJS-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
 COBJS-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 COBJS-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
 
+COBJS-$(CONFIG_USB_XHCI) += xhci.o
+COBJS-$(CONFIG_USB_XHCI) += xhci-hub.o
+COBJS-$(CONFIG_USB_XHCI) += xhci-ring.o
+COBJS-$(CONFIG_USB_XHCI) += xhci-mem.o
+COBJS-$(CONFIG_USB_XHCI) += xhci-plat.o
+
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
@@ -75,3 +81,4 @@ include $(SRCTREE)/rules.mk
 sinclude $(obj).depend
 
 #
+
diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h
index 377f424..f3cddb1 100644
--- a/drivers/usb/host/xhci-ext-caps.h
+++ b/drivers/usb/host/xhci-ext-caps.h
@@ -87,6 +87,8 @@
 /* true: Controller Not Ready to accept doorbell or op reg writes after reset 
*/
 #define XHCI_STS_CNR   (1  11)
 
+#define __UBOOT__
+#ifndef __UBOOT__
 #include linux/io.h
 
 /**
@@ -153,3 +155,13 @@ static inline int xhci_find_ext_cap_by_id(void __iomem 
*base, int ext_offset, in
return ext_offset;
return 0;
 }
+#else
+static inline int xhci_find_next_cap_offset(void __iomem *base, int ext_offset)
+{
+   return 0;
+}
+static inline int xhci_find_ext_cap_by_id(void __iomem *base, int ext_offset, 
int id)
+{
+   return 0;
+}
+#endif
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index 187a3ec..8f01cb3 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -19,10 +19,11 @@
  * along with this program; if not, write to the Free Software Foundation,
  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
-
+#define __UBOOT__
+#ifndef __UBOOT__
 #include linux/gfp.h
 #include asm/unaligned.h
-
+#endif
 #include xhci.h
 
 #definePORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
@@ -632,8 +633,13 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 
wValue,
!DEV_SUPERSPEED(temp)) {
if ((temp  PORT_RESET) || !(temp  PORT_PE))
goto error;
+#ifndef __UBOOT__
if (time_after_eq(jiffies,
bus_state-resume_done[wIndex])) {
+#else
+   /* TODO fix this to equate to time_after_eq API */
+   if (bus_state-resume_done[wIndex]) {
+#endif
xhci_dbg(xhci, Resume USB2 port %d\n,
wIndex + 1);
bus_state-resume_done[wIndex] = 0;
@@ -1009,10 +1015,19 @@ int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
retval = -ENODEV;
break;
}
+#ifndef __UBOOT__
if ((temp  mask) != 0 ||
(bus_state-port_c_suspend  1  i) ||
(bus_state-resume_done[i]  time_after_eq(
jiffies, bus_state-resume_done[i]))) {
+#else
+   

Re: [U-Boot] [RFC] [UBOOT] [PATCH v3 1/7] USB: Backport kernel usb header file

2013-07-02 Thread Nishanth Menon

On 07/02/2013 10:15 AM, Dan Murphy wrote:

Backport the kernel USB header file include/linux/usb.h
that contains the structures and constants for the linux kernel drivers.
Rename the usb.h to usb-compat.h so that it is not confused with the
uBoot include usb.h file.

Kernel base commit ID:aa4f608478acb7ed69dfcff4f3c404100b78ac49
v3.10-rc4-21-gaa4f608 - is'nt it better to take a tagged kernel like 
v3.10 instead of an random intermediate commit?


snip
--
Regards,
Nishanth Menon
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Re: [U-Boot] [RFC] [UBOOT] [PATCH v3 1/7] USB: Backport kernel usb header file

2013-07-02 Thread Dan Murphy
On 07/02/2013 10:18 AM, Nishanth Menon wrote:
 On 07/02/2013 10:15 AM, Dan Murphy wrote:
 Backport the kernel USB header file include/linux/usb.h
 that contains the structures and constants for the linux kernel drivers.
 Rename the usb.h to usb-compat.h so that it is not confused with the
 uBoot include usb.h file.

 Kernel base commit ID:aa4f608478acb7ed69dfcff4f3c404100b78ac49
 v3.10-rc4-21-gaa4f608 - is'nt it better to take a tagged kernel like v3.10 
 instead of an random intermediate commit?

 snip
At the time this patch was created this was the commit ID I had.

This is only RFC.  I will advance the kernel code once I have some feedback on 
the approach and move to a released tag.

Dan

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Re: [U-Boot] [PATCH 0/7] USB: XHCI: Add xHCI host controller stack driver

2013-07-02 Thread Dan Murphy
Vivek

On 07/02/2013 07:59 AM, Vivek Gautam wrote:
 This change adds necessary xHCI host controller stack layer.
 This stack will eventually interact with SoC specific USB 3.0
 controller drivers to enable USB 3.0 support on different boards.

 Based on 'master' branch of u-boot-usb tree.

 The series also includes patches to support xHCI on exynos5250,
 including required driver, device tree changes and a temporary
 config change to test things finally on smdk5250.

 Vivek Gautam (7):
   arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZE
   USB: xHCI: Add stack support for xHCI
   USB: XHCI: Add xHCI host controller support for Exynos5
   arm: exynos: Add methods to control power to USB 3.0 PHY
   exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI
   exynos5: dts: Add device node for XHCI
   temp: ARM: EXYNOS5: Enable xHCI support for Exynos5

  arch/arm/cpu/armv7/exynos/power.c  |   22 +
  arch/arm/dts/exynos5250.dtsi   |   12 +
  arch/arm/include/asm/arch-exynos/cpu.h |8 +
  arch/arm/include/asm/arch-exynos/power.h   |5 +
  arch/arm/include/asm/arch-exynos/xhci-exynos.h |   90 ++
  common/usb.c   |   27 +-
  drivers/usb/host/Makefile  |4 +
  drivers/usb/host/xhci-exynos5.c|  324 ++
  drivers/usb/host/xhci-mem.c|  731 ++
  drivers/usb/host/xhci-ring.c   |  899 +
  drivers/usb/host/xhci.c| 1040 +++
  drivers/usb/host/xhci.h| 1281 
 
  include/configs/exynos5250-dt.h|7 +
  include/fdtdec.h   |2 +
  include/linux/usb/dwc3.h   |  190 
  include/usb.h  |9 +-
  lib/fdtdec.c   |2 +
  17 files changed, 4650 insertions(+), 3 deletions(-)
  create mode 100644 arch/arm/include/asm/arch-exynos/xhci-exynos.h
  create mode 100644 drivers/usb/host/xhci-exynos5.c
  create mode 100644 drivers/usb/host/xhci-mem.c
  create mode 100644 drivers/usb/host/xhci-ring.c
  create mode 100644 drivers/usb/host/xhci.c
  create mode 100644 drivers/usb/host/xhci.h
  create mode 100644 include/linux/usb/dwc3.h


I have done similar work for the DWC and xHCI back port.  We seem to have two 
different implementations.

See my V3 patch series.  If you want the initial patch sets or v2 let me know.
http://patchwork.ozlabs.org/patch/256451/
http://patchwork.ozlabs.org/patch/256449/
3/7 is waiting approval
http://patchwork.ozlabs.org/patch/256452/
http://patchwork.ozlabs.org/patch/256450/
6/7 is waiting approval
http://patchwork.ozlabs.org/patch/256453/

Marek

Please let us know which xHCI/DWC implementation you would like to have in main 
line.

Dan


-- 
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[U-Boot] imx: Kernel not booting with fdt

2013-07-02 Thread Matthias Weißer

Hi

I try to boot a current 3.11 kernel on a custom iMX25 board using DT. 
u-boot starts the kernel but it stops working just after the first 
eralyprintk lines are out. The u-boot/kernel output:


bootm 0x8100 - 0x8080
## Booting kernel from Legacy Image at 8100 ...
   Image Name:   Linux-3.10.0
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:3834336 Bytes = 3.7 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 8080
   Booting using the fdt blob at 0x8080
   Loading Kernel Image ... OK
OK
   Loading Device Tree to 8374f000, end 837545d4 ... OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[0.00] Booting Linux on physical CPU 0x0
[0.00] Initializing cgroup subsys cpuset
[0.00] Initializing cgroup subsys cpu
[0.00] Initializing cgroup subsys cpuacct
[0.00] Linux version 3.10.0 (mweisser@ubuntu) (gcc version 4.7.3 
(Ubuntu/Linaro 4.7.3-1ubuntu1) ) #4 Tue Jul 2 1

7:13:13 CEST 2013
[0.00] CPU: ARM926EJ-S [41069264] revision 4 (ARMv5TEJ), cr=00053177
[0.00] CPU: VIVT data cache, VIVT instruction cache
[0.00] Machine: Generic DT based system, model: Graf-Syteco zmx25
[0.00] bootconsole [earlycon0] enabled
[0.00] Memory policy: ECC disabled, Data cache writeback

As this is my first contact with DT I expect a trivial error on my side. 
Anyone with any hint?


Regards
Matthias
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Re: [U-Boot] [PULL] u-boot-usb/master

2013-07-02 Thread Marek Vasut
Dear Lukasz Majewski,

 On Tue, 02 Jul 2013 16:04:59 +0200, Marek Vasut wrote:
  
  Heiko Schocher
  (5): dfu: make data buffer size configurable
  
usb, dfu gadget: switch to dfu mode in dfu_bind
usb, g_dnl: make possibility to fixup the device_desc board
  
  specific usb, musb-new: add wdt trigger
  
usb: fix unaligned access in device_qual()
  
  Lukasz Majewski (1):
dfu:function: Fix number of allocated DFU function pointers
  
  Pierre Aubert (1):
usb: add support for the USB Ethernet adapter D-Link DUB-E100
  
  H/W Ver C1
  
  Piotr Wilczek (2):
drivers:usb: use get|put_unaligned_le16
usb:composite: use memcpy to avoid unaligned access
 
 Marek can you wait until following DFU fixes are tested/evaluated:
 
 http://patchwork.ozlabs.org/patch/255471/
 http://patchwork.ozlabs.org/patch/255472/

Dang, I sent a USB PR just now. Heiko, can you review it and tell me what's 
missing?

Best regards,
Marek Vasut
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[U-Boot] [RFC] Supporting multiple variants of an SoC

2013-07-02 Thread Tom Rini
Hey guys,

I'm wondering about something and looking for input.  As has come up a
few times now, we have the ability for a single binary to run on a few
systems (there's both i.MX examples and AM335x examples), but what we
don't have is agreement on the best way to handle things that must
(today) be done at build time.  For example, am335x_evm supports both
the kitchen sink style EVM which includes NAND, and Beaglebone
White/Black, which do not.  But we default to env on NAND as that was
the first board up.  What might provide the best end-user experience (in
their binary) would be adding a build target of am335x_evm_bbb that:
- Uses eMMC for environment
- Uses GPIO (since we have a button available) for skipping Falcon Mode
and then adding am335x_evm_sd_only that:
- Uses a file on FAT for environment
- Uses a character (c) for skipping Falcon Mode
and maybe even adding am335x_evm_nand that:
- Uses NAND for environment (still default)
- Checks environment for skipping Falcon Mode

That said, when others have suggested something like this before,
Wolfgang has pointed out and NAK'd the idea of adding N different
configuration as that adds (potentially) a lot of build time for
custodians/etc that tend to build --soc or --arch or other group
targets.  So, what do we want to do here?  I guess longer term, if we
are able to focus on switching to Kconfig, it would become we provide a
generic defconfig for am335x (or imx6 or ...) with a best-fit-for-all
set and communities can provide tweaked binaries as needed.  But do we
want to think about any stop-gap solutions here?

-- 
Tom


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Re: [U-Boot] Regression due to 020bbcb usb: hub: Power-cycle on root-hub ports

2013-07-02 Thread Vivek Gautam
On Mon, Jul 1, 2013 at 10:11 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 07/01/2013 07:49 AM, Vivek Gautam wrote:
 Hi Marek,


 On Sun, Jun 30, 2013 at 10:08 PM, Marek Vasut ma...@denx.de wrote:
 Dear Stephen Warren,

 (Sorry to those on to/cc; I'm resending this so it goes to the correct
 mailing list)

 Dear Stephen,
 sorry for the delay in responding to this.


 Commit 020bbcb usb: hub: Power-cycle on root-hub ports causes a
 regression on Tegra systems.

 The first time usb start is executed, it appears to work correctly.
 However, any subsequent time it is executed, it takes a long time, and
 eventually fails to find any USB devices.

 This situation can happen quite often; for example, if the user forgets
 to plug in a USB device before booting, runs usb start, realizes that,
 then plugs it in and runs usb start again. This is compounded on at
 least one of the Tegra boards, since CONFIG_PREBOOT is set to usb
 start on systems (laptops/clamshells) which have built-in USB keyboards.

 If I simply revert this patch, then everything works again. (Yes,
 reverting requires fixing a small merge conflict.)

 Do you have any idea what the problem can be? I'm tempted to simply ask
 for the patch to be reverted since it causes a regression.

 Thanks for any idea how to fix this!

 BUMP? Vivek, any ideas? Otherwise I'm reverting this.
 ...
 There's one BUG that i could see in  0bf796f  commit.
 Now that we parallelized the sequence to power cycle ports, so if
 get_port_status for any port failed,
 it returns from hub_power_on() and not power-on any of the port.

 Below is the change i suggest.
 ...
 can you please confirm if you problem is related to this BUG in the
 sequence of power-cycling the ports.

 I applied that change, and it does not solve the problem on Tegra, nor
 do I see any of the messages that were changed from debug to printf.
 Below is the log:

 U-Boot 2013.04-00281-g0e8ef51 (Jul 01 2013 - 10:33:36)

 TEGRA20
 Board: NVIDIA Seaboard
 DRAM:  1 GiB
 NAND:  512 MiB
 MMC:   Tegra SD/MMC: 0, Tegra SD/MMC: 1
 In:tegra-kbc
 Out:   lcd
 Err:   lcd
 Net:   Net Initialization Skipped
 No ethernet found.
 (Re)start USB...
 USB0:   USB EHCI 1.00
 scanning bus 0 for devices... 2 USB Device(s) found
 USB1:   USB EHCI 1.00
 scanning bus 1 for devices... 2 USB Device(s) found
 USB2:   lowlevel init failed
scanning usb for storage devices... 0 Storage Device(s) found
scanning usb for ethernet devices...
 Warning: asx0 using MAC address from net device
 1 Ethernet Device(s) found
 Hit any key to stop autoboot:  0


 Tegra20 (SeaBoard) # usb start
 (Re)start USB...
 USB0:   USB EHCI 1.00
 scanning bus 0 for devices... 2 USB Device(s) found
 USB1:   USB EHCI 1.00
 scanning bus 1 for devices... 1 USB Device(s) found

 (there's a much longer pause when scanning this bus every time except
 the very first)

This long pause could be from the 10sec delay present in
common/usb_hub.c: usb_hub_configure(): line 475
(the do-while loop present to check Current Connect Status and Connect
Status Change bits)

I could actually see somewhat similar issue of long pause on xHCI
port, if we didn't apply patches:
0bf796f usb: hub: Parallelize power-cycling of root-hub ports
020bbcb usb: hub: Power-cycle on root-hub ports

This was because, once usb_hub_power_on() was called, Connect Status
Change bit of xHC port was
getting cleared though Current Connect Status was still asserted, even
untill that no code handles that bit.

For xHC, setting the Port_power bit, in case that bit was initially
asserted clears CSC bit.


 USB2:   lowlevel init failed
scanning usb for storage devices... 0 Storage Device(s) found
scanning usb for ethernet devices... 0 Ethernet Device(s) found


 Tegra20 (SeaBoard) # usb start
 (Re)start USB...
 USB0:   USB EHCI 1.00
 scanning bus 0 for devices... 2 USB Device(s) found
 USB1:   USB EHCI 1.00
 scanning bus 1 for devices... 1 USB Device(s) found
 USB2:   lowlevel init failed
scanning usb for storage devices... 0 Storage Device(s) found
scanning usb for ethernet devices... 0 Ethernet Device(s) found

I think we should be checking EHCI registers now, PORTSC register to
be specific to see how the
port power is getting affected.
On smdk5250 i am unable see this behavior, which is having only one
controller unlike
seaboard which i can see has 3 controllers.



-- 
Best Regards
Vivek
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Re: [U-Boot] [RFC] Supporting multiple variants of an SoC

2013-07-02 Thread Stephen Warren
On 07/02/2013 10:28 AM, Tom Rini wrote:
 Hey guys,
 
 I'm wondering about something and looking for input.  As has come
 up a few times now, we have the ability for a single binary to run
 on a few systems (there's both i.MX examples and AM335x examples),
 but what we don't have is agreement on the best way to handle
 things that must (today) be done at build time.  For example,
 am335x_evm supports both the kitchen sink style EVM which
 includes NAND, and Beaglebone White/Black, which do not.  But we
 default to env on NAND as that was the first board up.  What might
 provide the best end-user experience (in their binary) would be
 adding a build target of am335x_evm_bbb that: - Uses eMMC for
 environment - Uses GPIO (since we have a button available) for
 skipping Falcon Mode and then adding am335x_evm_sd_only that: -
 Uses a file on FAT for environment - Uses a character (c) for
 skipping Falcon Mode and maybe even adding am335x_evm_nand that: -
 Uses NAND for environment (still default) - Checks environment for
 skipping Falcon Mode
 
 That said, when others have suggested something like this before, 
 Wolfgang has pointed out and NAK'd the idea of adding N different 
 configuration as that adds (potentially) a lot of build time for 
 custodians/etc that tend to build --soc or --arch or other group 
 targets.  So, what do we want to do here?  I guess longer term, if
 we are able to focus on switching to Kconfig, it would become we
 provide a generic defconfig for am335x (or imx6 or ...) with a
 best-fit-for-all set and communities can provide tweaked binaries
 as needed.  But do we want to think about any stop-gap solutions
 here?

Can there be a single generic binary, which is configured at run-time
by device-tree? Tegra and at least some Samsung Exynos boards (snow I
guess) seem headed that way, although the conversion is nowhere near
complete and hasn't yet covered the specific differences you listed above.
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Re: [U-Boot] [PATCH 2/2 v3] powerpc/c29xpcie: add support for C29XPCIE board

2013-07-02 Thread Scott Wood

On 07/02/2013 01:39:09 AM, Po Liu wrote:

+int board_early_init_r(void)
+{
+   const unsigned long flashbase = CONFIG_SYS_FLASH_BASE;
+   const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+
+   /*
+* Remap Boot flash region to caching-inhibited
+* so that flash can be erased properly.
+*/
+
+   /* Flush d-cache and invalidate i-cache of any FLASH data */
+   flush_dcache();
+   invalidate_icache();
+
+   /* invalidate existing TLB entry for flash */
+   disable_tlb(flash_esel);
+
+   set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
+   MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+   0, flash_esel, BOOKE_PAGESZ_64M, 1);


Don't set MAS3_SX on I/O regions.


+#if defined(CONFIG_OF_BOARD_SETUP)
+void fdt_del_sec(void *blob, int offset)
+{
+   int nodeoff = 0;
+
+	while ((nodeoff = fdt_node_offset_by_compat_reg(blob,  
fsl,sec-v6.0,
+			CONFIG_SYS_CCSRBAR_PHYS +  
CONFIG_SYS_FSL_SEC_OFFSET

+   + offset * 0x2)) = 0) {
+   fdt_del_node(blob, nodeoff);
+   offset++;
+   }
+}


Whitespace


+static u8 __cpld_read(unsigned int reg)
+{
+   void *p = (void *)CONFIG_SYS_CPLD_BASE;
+
+   return in_8(p + reg);
+}
+
+u8 cpld_read(unsigned int reg) __attribute__((weak,  
alias(__cpld_read)));

+
+static void __cpld_write(unsigned int reg, u8 value)
+{
+   void *p = (void *)CONFIG_SYS_CPLD_BASE;
+
+   out_8(p + reg, value);
+}
+
+void cpld_write(unsigned int reg, u8 value)
+   __attribute__((weak, alias(__cpld_write)));


Why does this need to be weak?  Where do you expect to call  
cpld_read/write that isn't specific to this board?  What sort of  
behavior could a non-board-specific caller possibly expect?



+/**
+ * Set the boot bank to the alternate bank
+ */
+void __cpld_set_altbank(u8 banksel)
+{
+   u8 reg11 = CPLD_READ(flhcsr);
+
+   switch (banksel) {
+   case 1:
+   CPLD_WRITE(flhcsr, (reg11  CPLD_BANKSEL_MASK)
+   | CPLD_BANKSEL_EN | CPLD_SELECT_BANK1);
+   break;
+   case 2:
+   CPLD_WRITE(flhcsr, (reg11  CPLD_BANKSEL_MASK)
+   | CPLD_BANKSEL_EN | CPLD_SELECT_BANK2);
+   break;
+   case 3:
+   CPLD_WRITE(flhcsr, (reg11  CPLD_BANKSEL_MASK)
+   | CPLD_BANKSEL_EN | CPLD_SELECT_BANK3);
+   break;
+   case 4:
+   CPLD_WRITE(flhcsr, (reg11  CPLD_BANKSEL_MASK)
+   | CPLD_BANKSEL_EN | CPLD_SELECT_BANK4);
+   break;


So there's a __cpld_write, a cpld_write, *and* a CPLD_WRITE?


+#define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
+#define CPLD_WRITE(reg, value) cpld_write(offsetof(struct cpld_data,  
reg), \

+   value)


Ugh.  Why not just initialize a pointer to CONFIG_SYS_CPLD_BASE, and use
normal I/O accessors on that, just like every other driver that isn't  
the

p2041rdb CPLD code you copied this from?


+struct law_entry law_table[] = {
+	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M,  
LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K,  
LAW_TRGT_IF_IFC),
+	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M,  
LAW_TRGT_IF_IFC),


The NAND SRAM window is 16K.  There is no reason to make the LAW 1M.


+   /* TLB 1 */
+   /* *I*** - Covers boot page */
+   SET_TLB_ENTRY(1, 0xf000, 0xf000,
+   MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+   0, 0, BOOKE_PAGESZ_4K, 1),


Comment says *I*** but code says *I*G*.

Do we still use this mapping at all?


+   /* *I*G* - CCSRBAR */
+   SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
+   MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+   0, 1, BOOKE_PAGESZ_1M, 1),
+
+	SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE,  
CONFIG_SYS_FLASH_BASE_PHYS,

+   MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
+   0, 2, BOOKE_PAGESZ_64M, 1),


Why do most of these entries have a comment but some (like this flash
entry) don't?  Be consistent.  Probably better to remove all of these
comments since they don't say anything that isn't clear from the code,
and are often wrong.

+	SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE,  
CONFIG_SYS_NAND_BASE_PHYS,

+   MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+   0, 6, BOOKE_PAGESZ_1M, 1),


Again, this can be 16K.


+   /* *I*G - platform SRAM */
+   SET_TLB_ENTRY(1, CONFIG_SYS_PLATFORM_SRAM_BASE,
+   CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS,
+   MAS3_SX|MAS3_SW|MAS3_SR, 0,
+   0, 7, BOOKE_PAGESZ_256K, 1),
+   SET_TLB_ENTRY(1, CONFIG_SYS_PLATFORM_SRAM_BASE + 0x4,
+   CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS + 0x4,
+   

Re: [U-Boot] [PATCH v2 2/3] tools/proftool: remove REG_NOERROR

2013-07-02 Thread Jeroen Hofstee

Hello Andreas,

On 07/02/2013 08:37 AM, Andreas Bießmann wrote:

Remove non portable usage of REG_NOERROR.
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, even GNU
regex(3) do mention REG_NOERROR, just remove it.

   ^ does _not_

Perhaps Tom can amend it while applying. Anyway ..

Acked-by: Jeroen Hofstee jer...@myspectrum.nl

And compile tested on FreeBSD (the 3 of them).

Regards,
Jeroen


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Re: [U-Boot] [PATCH] mtd: mxc_nand: Fix crash after MTD resync

2013-07-02 Thread Scott Wood

On 07/02/2013 10:11:55 AM, Marek Vasut wrote:

The driver triggered a BUG() in nand_base.c:3214/nand_scan_tail()
because the ecc.strength was incorrectly set in case of NAND_ECC_HW
instead of NAND_ECC_HW_SYNDROME ECC mode.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Scott Wood scottw...@freescale.com
---
 drivers/mtd/nand/mxc_nand.c |7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index ac435f2..08c7b8b 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -1238,15 +1238,12 @@ int board_nand_init(struct nand_chip *this)
this-ecc.write_oob = mxc_nand_write_oob_syndrome;
this-ecc.bytes = 9;
this-ecc.prepad = 7;
-   } else {
-   this-ecc.mode = NAND_ECC_HW;
-   }
-
-   if (this-ecc.mode == NAND_ECC_HW) {
if (is_mxc_nfc_1())
this-ecc.strength = 1;
else
this-ecc.strength = 4;
+   } else {
+   this-ecc.mode = NAND_ECC_HW;
}


Where does ecc.strength now get set for the non-SYNDROME case?

-Scott
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Re: [U-Boot] compiled failed when turned off gcc optimazition

2013-07-02 Thread Mike Dunn
On 07/01/2013 12:51 PM, Wolfgang Denk wrote:
 Dear Mike Dunn,
 
 In message 51d1c455.9010...@newsguy.com you wrote:

 But there's a good motivation for wanting to turn off optimization.
 
 I disagree here.  If you are hunting down a problem, you want to be as
 close at the original code as possible.  Disabling optimization is
 such a dramatic change to the generated code that you actually debug a
 different program.


I guess it depends on what problem being debugged...  I think your point is
valid for things like tracking down race conditions or misbehaving hardware.
But for more mundane problems like logical errors in the code, optimizations get
in the way.  It would be nice to be able to experiment with optimizations off.
Just knowing that a particular problem still exists when unoptimized code is run
will provide some clues.


 
 Single-stepping with a debugger at the C source level is almost useless.  
 I've
 since gotten better at single-stepping at the assembly level while using the
 mixed c and assembly view of gdb.
 
 Hm... Did you read up the documentation, say [1], and try out these
 recommendations?
 
 [1] http://www.denx.de/wiki/view/DULG/DebuggingTricks


No, but I will.  Many thanks!
Mike

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Re: [U-Boot] imx: Kernel not booting with fdt

2013-07-02 Thread Stefano Babic
Hi Matthias,

Am 02/07/2013 17:26, schrieb Matthias Weißer:
 Hi
 
 I try to boot a current 3.11 kernel on a custom iMX25 board using DT.
 u-boot starts the kernel but it stops working just after the first
 eralyprintk lines are out. The u-boot/kernel output:
 
 bootm 0x8100 - 0x8080

Never tried with a imx25, but it looks correct and there is enough space
between kernel and DT to avoid some corruption.

 ## Booting kernel from Legacy Image at 8100 ...
Image Name:   Linux-3.10.0
Image Type:   ARM Linux Kernel Image (uncompressed)
Data Size:3834336 Bytes = 3.7 MiB
Load Address: 80008000
Entry Point:  80008000
Verifying Checksum ... OK
 ## Flattened Device Tree blob at 8080
Booting using the fdt blob at 0x8080
Loading Kernel Image ... OK
 OK
Loading Device Tree to 8374f000, end 837545d4 ... OK
 
 Starting kernel ...
 
 Uncompressing Linux... done, booting the kernel.
 [0.00] Booting Linux on physical CPU 0x0
 [0.00] Initializing cgroup subsys cpuset
 [0.00] Initializing cgroup subsys cpu
 [0.00] Initializing cgroup subsys cpuacct
 [0.00] Linux version 3.10.0 (mweisser@ubuntu) (gcc version 4.7.3
 (Ubuntu/Linaro 4.7.3-1ubuntu1) ) #4 Tue Jul 2 1
 7:13:13 CEST 2013
 [0.00] CPU: ARM926EJ-S [41069264] revision 4 (ARMv5TEJ),
 cr=00053177
 [0.00] CPU: VIVT data cache, VIVT instruction cache
 [0.00] Machine: Generic DT based system, model: Graf-Syteco zmx25
 [0.00] bootconsole [earlycon0] enabled
 [0.00] Memory policy: ECC disabled, Data cache writeback
 
 As this is my first contact with DT I expect a trivial error on my side.
 Anyone with any hint?

I cannot say a lot - it seems more an issue inside the dts file as how
you start the kernel. Maybe you can look in the _log_buf if you get some
more info.

Best regards,
Stefano

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[U-Boot] Please pull u-boot-ti/master

2013-07-02 Thread Tom Rini
Hello,

The following changes since commit e6c7f86f03b0ad25e9ef70df3ee1989b6b789d7c:

  Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-06-28 
17:51:13 +0200)

are available in the git repository at:


  git://git.denx.de/u-boot-ti.git master

for you to fetch changes up to 87bd05d78f0f5765f3d3e1517c76794c82dab7cc:

  ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5 
(2013-07-02 09:21:16 -0400)


Axel Lin (1):
  ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5

Ilya Ledvich (1):
  am33xx: fix the ddr_cmdtctrl structure

Lokesh Vutla (1):
  ARM: OMAP4+: Fix MA detection during SDRAM_AUTO_DETECTION

Michael Trimarchi (1):
  usb: omap: ulpi: fix ulpi transceiver access

 arch/arm/cpu/armv7/omap-common/emif-common.c |3 ++
 arch/arm/cpu/armv7/omap5/hw_data.c   |2 ++
 arch/arm/cpu/armv7/omap5/hwinit.c|4 ++-
 arch/arm/include/asm/arch-am33xx/ddr_defs.h  |1 -
 arch/arm/include/asm/arch-am33xx/gpio.h  |2 ++
 arch/arm/include/asm/arch-omap3/gpio.h   |2 ++
 arch/arm/include/asm/arch-omap4/gpio.h   |2 ++
 arch/arm/include/asm/arch-omap5/gpio.h   |4 +++
 drivers/gpio/omap_gpio.c |2 +-
 drivers/usb/ulpi/omap-ulpi-viewport.c|   42 ++
 10 files changed, 28 insertions(+), 36 deletions(-)

-- 
Tom


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Re: [U-Boot] usb: omap: ulpi: fix ulpi reading/writing functions

2013-07-02 Thread Tom Rini
On Mon, Jun 10, 2013 at 04:23:33PM +0200, Michael Trimarchi wrote:

 Fix ulpi reading and writing function.
  * Both functions need to have the bit31 setted.
  * Right now uboot use 0 to enumerate port 1 and 1 to
enumerate port 2 and so on. Omap code use 1 for port 1 and 2 for port 2.
Add a +1 fix the problem
 
 Signed-off-by: Michael Trimarchi mich...@amarulasolutions.com
 Tested-by: Lubomir Popov lpo...@mm-sol.com
 Acked-by: Igor Grinberg grinb...@compulab.co.il

Applied to u-boot-ti/master, thanks!

-- 
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Re: [U-Boot] am33xx: fix the ddr_cmdtctrl structure

2013-07-02 Thread Tom Rini
On Mon, Jun 17, 2013 at 04:59:27PM +0300, Ilya Ledvich wrote:

 Fix the wrong mapping between the DDR I/O control registers on AM33XX
 SoCs and the software representation in the SPL code.
 The most recent public TRM defines the following DDR I/O control registers
 offsets:
  * ddr_cmd0_ioctrl : offset 0x44E11404
  * ddr_cmd1_ioctrl : offset 0x44E11408
  * ddr_cmd2_ioctrl : offset 0x44E1140C
  * ddr_data0_ioctrl: offset 0x44E11440
  * ddr_data1_ioctrl: offset 0x44E11444
 
 While the struct ddr_cmdtctrl has also some reserved bits in the beginning.
 The struct is mapped to the address 0x44E11404. As a result cm0ioctl points
 to the ddr_cmd1_ioctrl register, cm1ioctl to the ddr_cmd2_ioctrl and etc.
 Registers ddr_cmd0_ioctrl and ddr_data0_ioctrl are never configured because
 of this mapping mismatch.
 
 Signed-off-by: Ilya Ledvich i...@compulab.co.il
 Reviewed-by: Peter Korsgaard jac...@sunsite.dk

Applied to u-boot-ti/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, v4] usb: omap: ulpi: fix ulpi transceiver access

2013-07-02 Thread Tom Rini
On Mon, Jun 10, 2013 at 06:18:04PM +0200, Michael Trimarchi wrote:

 This patch fix the omap access to the transceiver
 configuration registers using the ulpi bus. As reported by
 the documentation the bit31 is used only to check if the
 transaction is done or still running and the reading and
 writing operation have different offset and have different
 values. What we need to do at the end of a transaction is
 leave the bus in done state. Anyway an error using the ulpi
 omap register is not recoverable so any error give out the
 usage of this interface.
 
 Tested on a custom OMAP5430 board with a TUSB1210 ULPI PHY
 on USBB1.
 
 Signed-off-by: Michael Trimarchi mich...@amarulasolutions.com
 Acked-by: Igor Grinberg grinb...@compulab.co.il
 Tested-by: Lubomir Popov lpo...@mm-sol.com
 Cc: Stefano Babic sba...@denx.de
 Cc: Marek Vasut ma...@denx.de
 Cc: Tom Rini tr...@ti.com

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5

2013-07-02 Thread Tom Rini
On Fri, Jun 21, 2013 at 06:54:25PM +0800, Axel Lin wrote:

 The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs.
 These SoCs have different gpio count but currently omap_gpio driver uses hard
 coded 192 which is wrong.
 
 This patch fixes this issue by:
 1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h.
 2. Update gpio bank settings and enable GPIO modules 7  8 clocks for OMAP5.
 
 Thanks for Lubomir Popov to provide valuable comments to fix this issue.
 
 Signed-off-by: Axel Lin axel@ingics.com
 Tested-by: Lubomir Popov lpo...@mm-sol.com
 Acked-by: Heiko Schocher h...@denx.de

Applied to u-boot-ti/master, thanks!

-- 
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Re: [U-Boot] ARM: OMAP4+: Fix MA detection during SDRAM_AUTO_DETECTION

2013-07-02 Thread Tom Rini
On Wed, Jun 19, 2013 at 10:50:45AM +0530, Lokesh Vutla wrote:

 During SDRAM_AUTO_DETECTION MA is not configured.
 For Soc's  OMAP4460 MA is present. So populating
 MA for the same.
 
 Tested on OMAP4430 PANDA, OMAP4460 PANDA.
 
 Reported-by: Dan Murphy dmur...@ti.com
 Signed-off-by: Lokesh Vutla lokeshvu...@ti.com

Applied to u-boot-ti/master, thanks!

-- 
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Re: [U-Boot] [PULL] u-boot-usb/master

2013-07-02 Thread Tom Rini
On Tue, Jul 02, 2013 at 04:47:41PM +0200, Lukasz Majewski wrote:

 On Tue, 02 Jul 2013 16:04:59 +0200, Marek Vasut wrote:
  
  
  
  Heiko Schocher
  (5): dfu: make data buffer size configurable
usb, dfu gadget: switch to dfu mode in dfu_bind
usb, g_dnl: make possibility to fixup the device_desc board
  specific usb, musb-new: add wdt trigger
usb: fix unaligned access in device_qual()
  
  Lukasz Majewski (1):
dfu:function: Fix number of allocated DFU function pointers
  
  Pierre Aubert (1):
usb: add support for the USB Ethernet adapter D-Link DUB-E100
  H/W Ver C1
  
  Piotr Wilczek (2):
drivers:usb: use get|put_unaligned_le16
usb:composite: use memcpy to avoid unaligned access
 
 Marek can you wait until following DFU fixes are tested/evaluated:
 
 http://patchwork.ozlabs.org/patch/255471/
 http://patchwork.ozlabs.org/patch/255472/
 
 Tom  Heiko, can you look onto them?

I plan to apply them to master shortly.

-- 
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[U-Boot] [PATCHv2] socfpga: Move board/socfpga_cyclone5 to board/socfpga

2013-07-02 Thread dinguyen
From: Dinh Nguyen dingu...@altera.com

Because the SOCFPGA platform will include support for Cyclone V and
Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
be more generic.

Signed-off-by: Dinh Nguyen dingu...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Chin Liang See cl...@altera.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Tom Rini tr...@ti.com
---
 .../altera/{socfpga_cyclone5 = socfpga}/Makefile  |0
 .../socfpga_cyclone5.c |0
 boards.cfg |2 +-
 3 files changed, 1 insertion(+), 1 deletion(-)
 rename board/altera/{socfpga_cyclone5 = socfpga}/Makefile (100%)
 rename board/altera/{socfpga_cyclone5 = socfpga}/socfpga_cyclone5.c (100%)

diff --git a/board/altera/socfpga_cyclone5/Makefile 
b/board/altera/socfpga/Makefile
similarity index 100%
rename from board/altera/socfpga_cyclone5/Makefile
rename to board/altera/socfpga/Makefile
diff --git a/board/altera/socfpga_cyclone5/socfpga_cyclone5.c 
b/board/altera/socfpga/socfpga_cyclone5.c
similarity index 100%
rename from board/altera/socfpga_cyclone5/socfpga_cyclone5.c
rename to board/altera/socfpga/socfpga_cyclone5.c
diff --git a/boards.cfg b/boards.cfg
index c0c4282..eea92d5 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -335,7 +335,7 @@ kzm9garm armv7   kzm9g  
 kmc
 armadillo-800eva arm armv7   armadillo-800eva
atmark-techno  rmobile
 zynq arm armv7   zynq
xilinx zynq
 zynq_dcc arm armv7   zynq
xilinx zynqzynq:ZYNQ_DCC
-socfpga_cyclone5arm armv7  socfpga_cyclone5
altera  socfpga
+socfpga_cyclone5arm armv7  socfpgaaltera   
socfpga
 actux1_4_16  arm ixp actux1  - 
 -   actux1:FLASH2X2
 actux1_4_32  arm ixp actux1  - 
 -   actux1:FLASH2X2,RAM_32MB
 actux1_8_16  arm ixp actux1  - 
 -   actux1:FLASH1X8
-- 
1.7.9.5


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Re: [U-Boot] [RFC] Supporting multiple variants of an SoC

2013-07-02 Thread Tom Rini
On Tue, Jul 02, 2013 at 11:58:51AM -0600, Stephen Warren wrote:
 On 07/02/2013 10:28 AM, Tom Rini wrote:
  Hey guys,
  
  I'm wondering about something and looking for input.  As has come
  up a few times now, we have the ability for a single binary to run
  on a few systems (there's both i.MX examples and AM335x examples),
  but what we don't have is agreement on the best way to handle
  things that must (today) be done at build time.  For example,
  am335x_evm supports both the kitchen sink style EVM which
  includes NAND, and Beaglebone White/Black, which do not.  But we
  default to env on NAND as that was the first board up.  What might
  provide the best end-user experience (in their binary) would be
  adding a build target of am335x_evm_bbb that: - Uses eMMC for
  environment - Uses GPIO (since we have a button available) for
  skipping Falcon Mode and then adding am335x_evm_sd_only that: -
  Uses a file on FAT for environment - Uses a character (c) for
  skipping Falcon Mode and maybe even adding am335x_evm_nand that: -
  Uses NAND for environment (still default) - Checks environment for
  skipping Falcon Mode
  
  That said, when others have suggested something like this before, 
  Wolfgang has pointed out and NAK'd the idea of adding N different 
  configuration as that adds (potentially) a lot of build time for 
  custodians/etc that tend to build --soc or --arch or other group 
  targets.  So, what do we want to do here?  I guess longer term, if
  we are able to focus on switching to Kconfig, it would become we
  provide a generic defconfig for am335x (or imx6 or ...) with a
  best-fit-for-all set and communities can provide tweaked binaries
  as needed.  But do we want to think about any stop-gap solutions
  here?
 
 Can there be a single generic binary, which is configured at run-time
 by device-tree? Tegra and at least some Samsung Exynos boards (snow I
 guess) seem headed that way, although the conversion is nowhere near
 complete and hasn't yet covered the specific differences you listed above.

We don't, today, support switching where environment comes from at
run-time, but we kind of could add that.  Same with the SPL related
changes.  But, is it worth doing the effort now vs device model (which
would lead to easier run time environment backing switching) and Kconfig
and so on?

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Re: [U-Boot] [PATCH v6 1/3] Prepare for TI816X : reuse existing code from TI814X

2013-07-02 Thread Tom Rini
On Tue, Jul 02, 2013 at 12:05:58PM +0200, TENART Antoine wrote:

 Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX
 
 Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
 ---
  Makefile|2 +-
  arch/arm/cpu/armv7/Makefile |2 +-
  arch/arm/cpu/armv7/omap-common/Makefile |2 +-
  arch/arm/include/asm/arch-am33xx/cpu.h  |2 +-
  arch/arm/include/asm/arch-am33xx/omap.h |2 +-
  drivers/serial/ns16550.c|4 ++--
  spl/Makefile|2 +-

OK, you had a hunk changing include/configs/ti814x_evm.h as well and
that seems to have been lost.

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