date:20140702

From: Dirk Eibach dirk.eib...@gdsys.cc

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 board/gdsys/p1022/sdhc_boot.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gdsys/p1022/sdhc_boot.c b/board/gdsys/p1022/sdhc_boot.c
index e432318..fd0e910 100644
--- a/board/gdsys/p1022/sdhc_boot.c
+++ b/board/gdsys/p1022/sdhc_boot.c
@@ -32,7 +32,7 @@
 #define ESDHC_BOOT_IMAGE_SIZE  0x48
 #define ESDHC_BOOT_IMAGE_ADDR  0x50
 
-int mmc_get_env_addr(struct mmc *mmc, u32 *env_addr)
+int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)
 {
u8 *tmp_buf;
u32 blklen, code_offset, code_len, n;
-- 
1.8.3

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[U-Boot] [PATCH v2 03/13] board: controlcenterd: Use new API for setting i2c bus

From: Dirk Eibach dirk.eib...@gdsys.cc

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc

---

Changes in v2:
- use defines for I2C bus numbers

 board/gdsys/p1022/controlcenterd-id.c | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/board/gdsys/p1022/controlcenterd-id.c 
b/board/gdsys/p1022/controlcenterd-id.c
index 3fca3c5..419fc2e 100644
--- a/board/gdsys/p1022/controlcenterd-id.c
+++ b/board/gdsys/p1022/controlcenterd-id.c
@@ -86,6 +86,11 @@ enum {
ESDHC_BOOT_IMAGE_ENTRY_OFS  = 0x60,
 };
 
+enum {
+   I2C_SOC_0 = 0,
+   I2C_SOC_1 = 1,
+};
+
 struct key_program {
uint32_t magic;
uint32_t code_crc;
@@ -1156,7 +1161,7 @@ static void ccdm_hang(void)
int j;
 #endif
 
-   I2C_SET_BUS(0);
+   I2C_SET_BUS(I2C_SOC_0);
pca9698_direction_output(0x22, 0, 0); /* Finder */
pca9698_direction_output(0x22, 4, 0); /* Status */
 
@@ -1189,8 +1194,8 @@ int startup_ccdm_id_module(void)
int result = 0;
unsigned int orig_i2c_bus;
 
-   orig_i2c_bus = I2C_GET_BUS();
-   I2C_SET_BUS(1);
+   orig_i2c_bus = i2c_get_bus_num();
+   i2c_set_bus_num(I2C_SOC_1);
 
/* goto end; */
 
@@ -1216,7 +1221,7 @@ int startup_ccdm_id_module(void)
 failure:
result = 1;
 end:
-   I2C_SET_BUS(orig_i2c_bus);
+   i2c_set_bus_num(orig_i2c_bus);
if (result)
ccdm_hang();
 
-- 
1.8.3

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[U-Boot] [PATCH v2 13/13] fit: make sha256 support optional

From: Dirk Eibach dirk.eib...@gdsys.cc

sha256 has some beefy memory footprint.
Make it optional for constrained systems.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2:
- make sha256 support optional

 include/configs/dlvision-10g.h | 1 +
 include/configs/io.h   | 1 +
 include/configs/iocon.h| 1 +
 include/configs/neo.h  | 1 +
 include/image.h| 5 +
 5 files changed, 9 insertions(+)

diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 2567a22..6153a40 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -40,6 +40,7 @@
 /* new uImage format support */
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
+#define CONFIG_FIT_DISABLE_SHA256
 
 #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
 
diff --git a/include/configs/io.h b/include/configs/io.h
index 649c0fb..8e32c25 100644
--- a/include/configs/io.h
+++ b/include/configs/io.h
@@ -40,6 +40,7 @@
 /* new uImage format support */
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
+#define CONFIG_FIT_DISABLE_SHA256
 
 #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
 
diff --git a/include/configs/iocon.h b/include/configs/iocon.h
index 35ba1bd..ae05bcb 100644
--- a/include/configs/iocon.h
+++ b/include/configs/iocon.h
@@ -39,6 +39,7 @@
 /* new uImage format support */
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
+#define CONFIG_FIT_DISABLE_SHA256
 
 #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
 
diff --git a/include/configs/neo.h b/include/configs/neo.h
index 75dc862..4937730 100644
--- a/include/configs/neo.h
+++ b/include/configs/neo.h
@@ -37,6 +37,7 @@
 /* new uImage format support */
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
+#define CONFIG_FIT_DISABLE_SHA256
 
 #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
 
diff --git a/include/image.h b/include/image.h
index b71e4ba..61d5885 100644
--- a/include/image.h
+++ b/include/image.h
@@ -72,6 +72,11 @@ struct lmb;
 #  define IMAGE_ENABLE_SHA256  1
 # endif
 
+#ifdef CONFIG_FIT_DISABLE_SHA256
+#undef CONFIG_SHA256
+#undef IMAGE_ENABLE_SHA256
+#endif
+
 #ifndef IMAGE_ENABLE_CRC32
 #define IMAGE_ENABLE_CRC32 0
 #endif
-- 
1.8.3

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[U-Boot] [PATCH v2 06/13] board: gdsys: Fix dlvision-10g I2C configuration

From: Dirk Eibach dirk.eib...@gdsys.cc

PPC4xx config options were not complete.
ICS8N3QV01 and SIL1178 needed some more configuration.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 include/configs/dlvision-10g.h | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 05a97bf..16895bf 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -97,7 +97,10 @@
 /*
  * I2C stuff
  */
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0  10
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0  0x7F
 
 #define CONFIG_SYS_I2C_IHS
 #define CONFIG_SYS_I2C_IHS_CH0
@@ -118,6 +121,11 @@
  { 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } }
 #define CONFIG_DTT_TACH_LIMIT  0xa10
 
+#define CONFIG_SYS_ICS8N3QV01
+#define CONFIG_SYS_ICS8N3QV01_I2C  {0, 1}
+#define CONFIG_SYS_SIL1178
+#define CONFIG_SYS_SIL1178_I2C {0, 1}
+
 /* EBC peripherals */
 
 #define CONFIG_SYS_FLASH_BASE  0xFC00
@@ -317,9 +325,7 @@
 /*
  * OSD Setup
  */
-#define CONFIG_SYS_ICS8N3QV01
 #define CONFIG_SYS_MPC92469AC
-#define CONFIG_SYS_SIL1178
 #define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT
 
 #endif /* __CONFIG_H */
-- 
1.8.3

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[U-Boot] [PATCH v2 09/13] board: gdsys: Make gdsys osd hardware detection more robust

From: Dirk Eibach dirk.eib...@gdsys.cc

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 board/gdsys/405ep/iocon.c  |  17 ++-
 board/gdsys/common/osd.c   | 113 +++--
 drivers/i2c/ihs_i2c.c  |   1 -
 include/configs/dlvision-10g.h |   2 -
 include/configs/iocon.h|   6 ---
 5 files changed, 79 insertions(+), 60 deletions(-)

diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index 079dfb2..6ae15e1 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -15,7 +15,6 @@
 #include 405ep.h
 #include gdsys_fpga.h
 
-#include ../common/dp501.h
 #include ../common/osd.h
 #include ../common/mclink.h
 
@@ -99,8 +98,6 @@ enum {
 unsigned int mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
-int dp501_i2c[] = CONFIG_SYS_DP501_I2C;
-
 static int setup_88e1518(const char *bus, unsigned char addr);
 
 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
@@ -374,20 +371,16 @@ int last_stage_init(void)
u16 fpga_features;
int feature_carrier_speed = fpga_features  (14);
bool ch0_rgmii2_present = false;
-   int old_bus = i2c_get_bus_num();
 
FPGA_GET_REG(0, fpga_features, fpga_features);
 
-   /* Turn on Parade DP501 */
-   pca9698_direction_output(0x20, 9, 1);
-   udelay(50);
-
-   i2c_set_bus_num(dp501_i2c[0]);
-   dp501_powerup(0x08);
-   i2c_set_bus_num(old_bus);
+   if (!legacy) {
+   /* Turn on Parade DP501 */
+   pca9698_direction_output(0x20, 9, 1);
+   udelay(50);
 
-   if (!legacy)
ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
+   }
 
print_fpga_info(0, ch0_rgmii2_present);
osd_probe(0);
diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index a839a4e..1c765e4 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -9,6 +9,7 @@
 #include i2c.h
 #include malloc.h
 
+#include dp501.h
 #include gdsys_fpga.h
 
 #define CH7301_I2C_ADDR 0x75
@@ -24,6 +25,8 @@
 #define SIL1178_MASTER_I2C_ADDRESS 0x38
 #define SIL1178_SLAVE_I2C_ADDRESS 0x39
 
+#define DP501_I2C_ADDR 0x08
+
 #define PIXCLK_640_480_60 2518
 
 enum {
@@ -54,18 +57,23 @@ u16 *buf;
 
 unsigned int max_osd_screen = CONFIG_SYS_OSD_SCREENS - 1;
 
-#ifdef CONFIG_SYS_CH7301
-int ch7301_i2c[] = CONFIG_SYS_CH7301_I2C;
+#ifdef CONFIG_SYS_ICS8N3QV01_I2C
+int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C;
 #endif
 
-#ifdef CONFIG_SYS_ICS8N3QV01
-int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C;
+#ifdef CONFIG_SYS_CH7301_I2C
+int ch7301_i2c[] = CONFIG_SYS_CH7301_I2C;
 #endif
 
-#ifdef CONFIG_SYS_SIL1178
+#ifdef CONFIG_SYS_SIL1178_I2C
 int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C;
 #endif
 
+#ifdef CONFIG_SYS_DP501_I2C
+int dp501_i2c[] = CONFIG_SYS_DP501_I2C;
+#endif
+
+
 #ifdef CONFIG_SYS_MPC92469AC
 static void mpc92469ac_calc_parameters(unsigned int fout,
unsigned int *post_div, unsigned int *feedback_div)
@@ -118,7 +126,7 @@ static void mpc92469ac_set(unsigned screen, unsigned int 
fout)
 }
 #endif
 
-#ifdef CONFIG_SYS_ICS8N3QV01
+#ifdef CONFIG_SYS_ICS8N3QV01_I2C
 
 static unsigned int ics8n3qv01_get_fout_calc(unsigned index)
 {
@@ -283,6 +291,8 @@ int osd_probe(unsigned screen)
u16 features;
u8 value;
int old_bus = i2c_get_bus_num();
+   bool pixclock_present = false;
+   bool output_driver_present = false;
 
FPGA_GET_REG(0, osd.version, version);
FPGA_GET_REG(0, osd.features, features);
@@ -297,51 +307,76 @@ int osd_probe(unsigned screen)
printf(OSD%d:  Digital-OSD version %01d.%02d, %d x%d characters\n,
screen, version/100, version%100, base_width, base_height);
 
-#ifdef CONFIG_SYS_CH7301
-   i2c_set_bus_num(ch7301_i2c[screen]);
-   value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID);
-   if (value != 0x17) {
-   printf(   Probing CH7301 failed, DID %02x\n, value);
-   i2c_set_bus_num(old_bus);
-   return -1;
-   }
-   i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08);
-   i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16);
-   i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60);
-   i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09);
-   i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0);
-#endif
+   /* setup pixclock */
 
 #ifdef CONFIG_SYS_MPC92469AC
+   pixclock_present = true;
mpc92469ac_set(screen, PIXCLK_640_480_60);
 #endif
 
-#ifdef CONFIG_SYS_ICS8N3QV01
+#ifdef CONFIG_SYS_ICS8N3QV01_I2C
i2c_set_bus_num(ics8n3qv01_i2c[screen]);
-   ics8n3qv01_set(PIXCLK_640_480_60);
+   if (!i2c_probe(ICS8N3QV01_I2C_ADDR)) {
+   ics8n3qv01_set(PIXCLK_640_480_60);
+   pixclock_present = true;
+   }
 #endif
 
-#ifdef CONFIG_SYS_SIL1178
+   if (!pixclock_present)
+   printf(   no pixelclock found\n);
+
+   /* setup output

[U-Boot] [PATCH v2 10/13] board: gdsys: Enable scrambling on DP501

From: Dirk Eibach dirk.eib...@gdsys.cc

For proper displayport performance, scrambling has to be enabled, but
is turned off on DP501 by default.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 board/gdsys/common/dp501.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index 7958bae..7eb15ed 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -61,6 +61,7 @@ void dp501_powerup(u8 addr)
i2c_reg_write(addr, 0x71, 0x20); /* Enable Aux burst write */
dp501_setbits(addr, 0x78, 0x30); /* Disable HPD2 IRQ */
dp501_clrbits(addr, 0x2f, 0x40); /* Link FIFO reset selection */
+   dp501_clrbits(addr, 0x60, 0x20); /* Enable scrambling */
 
 #ifdef CONFIG_SYS_DP501_VCAPCTRL0
i2c_reg_write(addr, 0x24, CONFIG_SYS_DP501_VCAPCTRL0);
-- 
1.8.3

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[U-Boot] [PATCH v2 04/13] board: iocon: Support DisplayPort hardware

From: Dirk Eibach dirk.eib...@gdsys.cc

There is a new iocon hardware flavor, supporting DisplayPort finally.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 board/gdsys/405ep/iocon.c   |  12 +
 board/gdsys/common/Makefile |   2 +-
 board/gdsys/common/dp501.c  |  33 +
 board/gdsys/common/osd.c| 112 
 include/configs/iocon.h |   9 +++-
 5 files changed, 83 insertions(+), 85 deletions(-)

diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index 7a98e41..079dfb2 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -15,6 +15,7 @@
 #include 405ep.h
 #include gdsys_fpga.h
 
+#include ../common/dp501.h
 #include ../common/osd.h
 #include ../common/mclink.h
 
@@ -98,6 +99,8 @@ enum {
 unsigned int mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
+int dp501_i2c[] = CONFIG_SYS_DP501_I2C;
+
 static int setup_88e1518(const char *bus, unsigned char addr);
 
 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
@@ -371,9 +374,18 @@ int last_stage_init(void)
u16 fpga_features;
int feature_carrier_speed = fpga_features  (14);
bool ch0_rgmii2_present = false;
+   int old_bus = i2c_get_bus_num();
 
FPGA_GET_REG(0, fpga_features, fpga_features);
 
+   /* Turn on Parade DP501 */
+   pca9698_direction_output(0x20, 9, 1);
+   udelay(50);
+
+   i2c_set_bus_num(dp501_i2c[0]);
+   dp501_powerup(0x08);
+   i2c_set_bus_num(old_bus);
+
if (!legacy)
ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
 
diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile
index fb841e0..7f8b427 100644
--- a/board/gdsys/common/Makefile
+++ b/board/gdsys/common/Makefile
@@ -8,6 +8,6 @@
 obj-$(CONFIG_SYS_FPGA_COMMON) += fpga.o
 obj-$(CONFIG_IO) += miiphybb.o
 obj-$(CONFIG_IO64) += miiphybb.o
-obj-$(CONFIG_IOCON) += osd.o mclink.o
+obj-$(CONFIG_IOCON) += osd.o mclink.o dp501.o
 obj-$(CONFIG_DLVISION_10G) += osd.o
 obj-$(CONFIG_CONTROLCENTERD) += dp501.o
diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index 52f3ea1..e00e589 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -60,8 +60,31 @@ void dp501_powerup(u8 addr)
i2c_reg_write(addr, 0x71, 0x20); /* Enable Aux burst write */
dp501_setbits(addr, 0x78, 0x30); /* Disable HPD2 IRQ */
dp501_clrbits(addr, 0x2f, 0x40); /* Link FIFO reset selection */
+
+#ifdef CONFIG_SYS_DP501_VCAPCTRL0
+   i2c_reg_write(addr, 0x24, CONFIG_SYS_DP501_VCAPCTRL0);
+#else
i2c_reg_write(addr, 0x24, 0xc0); /* SDR mode 0, ext. H/VSYNC */
+#endif
+
+#ifdef CONFIG_SYS_DP501_DIFFERENTIAL
+   i2c_reg_write(addr + 2, 0x24, 0x10); /* clock input differential */
+   i2c_reg_write(addr + 2, 0x25, 0x04);
+   i2c_reg_write(addr + 2, 0x26, 0x10);
+#else
i2c_reg_write(addr + 2, 0x24, 0x02); /* clock input single ended */
+#endif
+
+   i2c_reg_write(addr + 2, 0x00, 0x18); /* driving strength */
+   i2c_reg_write(addr + 2, 0x03, 0x06); /* driving strength */
+   i2c_reg_write(addr, 0x2c, 0x00); /* configure N value */
+   i2c_reg_write(addr, 0x2d, 0x00); /* configure N value */
+   i2c_reg_write(addr, 0x2e, 0x0c); /* configure N value */
+   i2c_reg_write(addr, 0x76, 0xff); /* clear all interrupt */
+   dp501_setbits(addr, 0x78, 0x03); /* clear all interrupt */
+   i2c_reg_write(addr, 0x75, 0xf8); /* aux channel reset */
+   i2c_reg_write(addr, 0x75, 0x00); /* clear aux channel reset */
+   i2c_reg_write(addr, 0x87, 0x70); /* set retry counter as 7 */
 
if (dp501_detect_cable_adapter(addr)) {
printf(DVI/HDMI cable adapter detected\n);
@@ -69,16 +92,6 @@ void dp501_powerup(u8 addr)
dp501_clrbits(addr, 0x00, 0x08); /* DVI/HDMI HDCP operation */
} else {
printf(no DVI/HDMI cable adapter detected\n);
-   i2c_reg_write(addr + 2, 0x00, 0x18); /* driving strength */
-   i2c_reg_write(addr + 2, 0x03, 0x06); /* driving strength */
-   i2c_reg_write(addr, 0x2c, 0x00); /* configure N value */
-   i2c_reg_write(addr, 0x2d, 0x00); /* configure N value */
-   i2c_reg_write(addr, 0x2e, 0x0c); /* configure N value */
-   i2c_reg_write(addr, 0x76, 0xff); /* clear all interrupt */
-   dp501_setbits(addr, 0x78, 0x03); /* clear all interrupt */
-   i2c_reg_write(addr, 0x75, 0xf8); /* aux channel reset */
-   i2c_reg_write(addr, 0x75, 0x00); /* clear aux channel reset */
-   i2c_reg_write(addr, 0x87, 0x70); /* set retry counter as 7 */
dp501_setbits(addr, 0x00, 0x08); /* for DP HDCP operation */
 
dp501_link_training(addr);
diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index c49cd9a..a839a4e 100644
--- a/board/gdsys/common/osd.c
+++

[U-Boot] [PATCH v2 11/13] board: iocon: Modify iocon hardware startup

From: Dirk Eibach dirk.eib...@gdsys.cc

To avoid peer ChReceivePathStatus-messages on iocon startup, initialize
PHYs as soon as possible.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 board/gdsys/405ep/iocon.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index 6ae15e1..1bac970 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -377,14 +377,10 @@ int last_stage_init(void)
if (!legacy) {
/* Turn on Parade DP501 */
pca9698_direction_output(0x20, 9, 1);
-   udelay(50);
 
ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
}
 
-   print_fpga_info(0, ch0_rgmii2_present);
-   osd_probe(0);
-
/* wait for FPGA done */
for (k = 0; k  ARRAY_SIZE(mclink_controllers); ++k) {
unsigned int ctr = 0;
@@ -413,13 +409,16 @@ int last_stage_init(void)
}
}
 
-   /* wait for slave-PLLs to be up and running */
+   /* give slave-PLLs and Parade DP501 some time to be up and running */
udelay(50);
 
mclink_fpgacount = CONFIG_SYS_MCLINK_MAX;
slaves = mclink_probe();
mclink_fpgacount = 0;
 
+   print_fpga_info(0, ch0_rgmii2_present);
+   osd_probe(0);
+
if (slaves = 0)
return 0;
 
-- 
1.8.3

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[U-Boot] [PATCH v2 05/13] i2c: IHS I2C master driver

From: Dirk Eibach dirk.eib...@gdsys.cc

IHS I2C master support was merely a hack in the osd driver.
Now it is a proper u-boot I2C framework driver, supporting the
v2.00 master features.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc

---

Changes in v2:
- move ihs_i2c to drivers/i2c
- split unrelated changes

 drivers/i2c/Makefile   |   1 +
 drivers/i2c/ihs_i2c.c  | 204 +
 include/configs/dlvision-10g.h |  11 +++
 include/configs/iocon.h|  23 -
 include/gdsys_fpga.h   |  25 +++--
 5 files changed, 246 insertions(+), 18 deletions(-)
 create mode 100644 drivers/i2c/ihs_i2c.c

diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index e33586d..96bd45d 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SYS_I2C) += i2c_core.o
 obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o
 obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
 obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o
 obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
 obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
 obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
new file mode 100644
index 000..ecc5856
--- /dev/null
+++ b/drivers/i2c/ihs_i2c.c
@@ -0,0 +1,204 @@
+/*
+ * (C) Copyright 2013
+ * Dirk Eibach,  Guntermann  Drunck GmbH, eib...@gdsys.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include i2c.h
+#include gdsys_fpga.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+   I2CINT_ERROR_EV = 1  13,
+   I2CINT_TRANSMIT_EV = 1  14,
+   I2CINT_RECEIVE_EV = 1  15,
+};
+
+enum {
+   I2CMB_WRITE = 1  10,
+   I2CMB_2BYTE = 1  11,
+   I2CMB_HOLD_BUS = 1  13,
+   I2CMB_NATIVE = 2  14,
+};
+
+static int wait_for_int(bool read)
+{
+   u16 val;
+   unsigned int ctr = 0;
+
+   FPGA_GET_REG(I2C_ADAP_HWNR, i2c.interrupt_status, val);
+   while (!(val  (I2CINT_ERROR_EV
+  | (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV {
+   udelay(10);
+   if (ctr++  5000) {
+   printf(I2C timeout\n);
+   return 1;
+   }
+   FPGA_GET_REG(I2C_ADAP_HWNR, i2c.interrupt_status, val);
+   }
+
+   return (val  I2CINT_ERROR_EV) ? 1 : 0;
+}
+
+static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read,
+   bool is_last)
+{
+   u16 val;
+
+   FPGA_SET_REG(I2C_ADAP_HWNR, i2c.interrupt_status, I2CINT_ERROR_EV
+| I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV);
+   FPGA_GET_REG(I2C_ADAP_HWNR, i2c.interrupt_status, val);
+
+   if (!read  len) {
+   val = buffer[0];
+
+   if (len  1)
+   val |= buffer[1]  8;
+   FPGA_SET_REG(I2C_ADAP_HWNR, i2c.write_mailbox_ext, val);
+   }
+
+   FPGA_SET_REG(I2C_ADAP_HWNR, i2c.write_mailbox,
+I2CMB_NATIVE
+| (read ? 0 : I2CMB_WRITE)
+| (chip  1)
+| ((len  1) ? I2CMB_2BYTE : 0)
+| (is_last ? 0 : I2CMB_HOLD_BUS));
+
+   if (wait_for_int(read))
+   return 1;
+
+   if (read) {
+   FPGA_GET_REG(I2C_ADAP_HWNR, i2c.read_mailbox_ext, val);
+   buffer[0] = val  0xff;
+   if (len  1)
+   buffer[1] = val  8;
+   }
+
+   return 0;
+}
+
+static int ihs_i2c_address(uchar chip, uint addr, int alen, bool hold_bus)
+{
+   int shift = (alen-1) * 8;
+
+   while (alen) {
+   int transfer = MIN(alen, 2);
+   uchar buf[2];
+   bool is_last = alen = transfer;
+
+   buf[0] = addr  shift;
+   if (alen  1)
+   buf[1] = addr  (shift - 8);
+
+   if (ihs_i2c_transfer(chip, buf, transfer, false,
+hold_bus ? false : is_last))
+   return 1;
+
+   shift -= 16;
+   alen -= transfer;
+   }
+
+   return 0;
+}
+
+static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, uint addr,
+ int alen, uchar *buffer, int len, bool read)
+{
+   if (len = 0)
+   return 1;
+
+   if (ihs_i2c_address(chip, addr, alen, !read))
+   return 1;
+
+   while (len) {
+   int transfer = MIN(len, 2);
+
+   if (ihs_i2c_transfer(chip, buffer, transfer, read,
+len = transfer))
+   return 1;
+
+   buffer += transfer;
+   addr += transfer;
+   len -= transfer;
+   }
+
+   return 0;
+}
+
+
+static void ihs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
+{
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+   /*
+* Call board specific i2c bus reset routine before accessing the
+

[U-Boot] [PATCH v2 12/13] board: gdsys: Remove commands to reduce footprint

From: Dirk Eibach dirk.eib...@gdsys.cc

Commit 2842c1c fit: add sha256 support badly increased
memory footprint, so some of our boards did not build anymore.
Since monitor base must not be changed I removed some commands
to save memory.

Maybe making sha256 optional for fit would be an option for
the future since it really has some beefy footprint.


Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 include/configs/dlvision-10g.h | 7 ++-
 include/configs/io.h   | 7 ++-
 include/configs/iocon.h| 4 
 include/configs/neo.h  | 8 ++--
 4 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 08ab5c3..2567a22 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -64,9 +64,14 @@
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
-#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_DTT
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_DIAG
 #undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_IRQ
+#undef CONFIG_CMD_NFS
 
 /*
  * SDRAM configuration (please see cpu/ppc/sdram.[ch])
diff --git a/include/configs/io.h b/include/configs/io.h
index 9da6cc6..649c0fb 100644
--- a/include/configs/io.h
+++ b/include/configs/io.h
@@ -64,9 +64,14 @@
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
-#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_DTT
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_DIAG
 #undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_IRQ
+#undef CONFIG_CMD_NFS
 
 /*
  * SDRAM configuration (please see cpu/ppc/sdram.[ch])
diff --git a/include/configs/iocon.h b/include/configs/iocon.h
index 1836d12..35ba1bd 100644
--- a/include/configs/iocon.h
+++ b/include/configs/iocon.h
@@ -64,6 +64,10 @@
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_FPGAD
 #undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_IRQ
+#undef CONFIG_CMD_NFS
 
 /*
  * SDRAM configuration (please see cpu/ppc/sdram.[ch])
diff --git a/include/configs/neo.h b/include/configs/neo.h
index d549985..75dc862 100644
--- a/include/configs/neo.h
+++ b/include/configs/neo.h
@@ -61,10 +61,14 @@
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DATE
 #define CONFIG_CMD_DTT
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_DIAG
 #undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_IRQ
+#undef CONFIG_CMD_NFS
 
 /*
  * SDRAM configuration (please see cpu/ppc/sdram.[ch])
-- 
1.8.3

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[U-Boot] [PATCH v2 07/13] board: gdsys: Increase iocon and dlv10g version string

From: Dirk Eibach dirk.eib...@gdsys.cc

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 include/configs/dlvision-10g.h | 2 +-
 include/configs/iocon.h| 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 16895bf..c2289ce 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -17,7 +17,7 @@
  * Include common defines/options for all AMCC eval boards
  */
 #define CONFIG_HOSTNAMEdlvsion-10g
-#define CONFIG_IDENT_STRING dlvision-10g 0.05
+#define CONFIG_IDENT_STRING dlvision-10g 0.06
 #include amcc-common.h
 
 #define CONFIG_BOARD_EARLY_INIT_F
diff --git a/include/configs/iocon.h b/include/configs/iocon.h
index 36b4b55..1aebab3 100644
--- a/include/configs/iocon.h
+++ b/include/configs/iocon.h
@@ -17,7 +17,7 @@
  * Include common defines/options for all AMCC eval boards
  */
 #define CONFIG_HOSTNAMEiocon
-#define CONFIG_IDENT_STRING iocon 0.05
+#define CONFIG_IDENT_STRING iocon 0.06
 #include amcc-common.h
 
 #define CONFIG_BOARD_EARLY_INIT_F
-- 
1.8.3

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[U-Boot] [PATCH v2 08/13] board: gdsys: Configure bridge on DP501 to support DDC only

From: Dirk Eibach dirk.eib...@gdsys.cc

The I2C bridge on DP501 supports EDID, MCCS and HDCP by default.
Allow EDID only to avoid I2C address conflicts.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 board/gdsys/common/dp501.c   | 1 +
 include/configs/controlcenterd.h | 7 ---
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index e00e589..7958bae 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -54,6 +54,7 @@ static void dp501_link_training(u8 addr)
 void dp501_powerup(u8 addr)
 {
dp501_clrbits(addr, 0x0a, 0x30); /* power on encoder */
+   dp501_setbits(addr, 0x0a, 0x0e); /* block HDCP and MCCS on I2C bride*/
i2c_reg_write(addr, 0x27, 0x30); /* Hardware auto detect DVO timing */
dp501_setbits(addr, 0x72, 0x80); /* DPCD read enable */
dp501_setbits(addr, 0x30, 0x20); /* RS polynomial select */
diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index 868813f..ec3145f 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -199,9 +199,10 @@
 #define CONFIG_SYS_FSL_I2C2_SPEED  40
 #define CONFIG_SYS_FSL_I2C2_SLAVE  0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
-/* Probing DP501 I2C-Bridge will hang */
-#define CONFIG_SYS_I2C_NOPROBES{ {0, 0x30}, {0, 0x37}, {0, 
0x3a}, \
- {0, 0x3b}, {0, 0x50} }
+
+#ifndef CONFIG_TRAILBLAZER
+#define CONFIG_CMD_I2C
+#endif
 
 #define CONFIG_PCA9698 /* NXP PCA9698 */
 
-- 
1.8.3

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[U-Boot] [PATCH v2 01/13] board: controlcenterd: Fix pci access

From: Dirk Eibach dirk.eib...@gdsys.cc

readl was called with values instead of pointers to these values.
Why this ever did work is a mystery...

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 board/gdsys/p1022/controlcenterd.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/board/gdsys/p1022/controlcenterd.c 
b/board/gdsys/p1022/controlcenterd.c
index 8ccd9ce..0a3517d 100644
--- a/board/gdsys/p1022/controlcenterd.c
+++ b/board/gdsys/p1022/controlcenterd.c
@@ -386,9 +386,9 @@ static void hydra_initialize(void)
fpga = pci_map_bar(devno, PCI_BASE_ADDRESS_0,
PCI_REGION_MEM);
 
-   versions = readl(fpga-versions);
-   fpga_version = readl(fpga-fpga_version);
-   fpga_features = readl(fpga-fpga_features);
+   versions = readl(fpga-versions);
+   fpga_version = readl(fpga-fpga_version);
+   fpga_features = readl(fpga-fpga_features);
 
hardware_version = versions  0xf;
feature_uart_channels = (fpga_features  6)  0x1f;
-- 
1.8.3

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[U-Boot] [PATCH v2 0/13] Fixes on gdsys boards and some new functionality

From: Dirk Eibach dirk.eib...@gdsys.cc



Changes in v2:
- make sha256 support optional
- move ihs_i2c to drivers/i2c
- split unrelated changes
- use defines for I2C bus numbers

Dirk Eibach (13):
  board: controlcenterd: Fix pci access
  board: gdsys: Adapt sdhc_boot.c to mmc_get_env_addr API change
  board: controlcenterd: Use new API for setting i2c bus
  board: iocon: Support DisplayPort hardware
  i2c: IHS I2C master driver
  board: gdsys: Fix dlvision-10g I2C configuration
  board: gdsys: Increase iocon and dlv10g version string
  board: gdsys: Configure bridge on DP501 to support DDC only
  board: gdsys: Make gdsys osd hardware detection more robust
  board: gdsys: Enable scrambling on DP501
  board: iocon: Modify iocon hardware startup
  board: gdsys: Remove commands to reduce footprint
  fit: make sha256 support optional

 board/gdsys/405ep/iocon.c |  14 ++-
 board/gdsys/common/Makefile   |   2 +-
 board/gdsys/common/dp501.c|  35 --
 board/gdsys/common/osd.c  | 189 +++
 board/gdsys/p1022/controlcenterd-id.c |  13 ++-
 board/gdsys/p1022/controlcenterd.c|   6 +-
 board/gdsys/p1022/sdhc_boot.c |   2 +-
 drivers/i2c/Makefile  |   1 +
 drivers/i2c/ihs_i2c.c | 203 ++
 include/configs/controlcenterd.h  |   7 +-
 include/configs/dlvision-10g.h|  29 -
 include/configs/io.h  |   8 +-
 include/configs/iocon.h   |  35 --
 include/configs/neo.h |   9 +-
 include/gdsys_fpga.h  |  25 ++---
 include/image.h   |   5 +
 16 files changed, 434 insertions(+), 149 deletions(-)
 create mode 100644 drivers/i2c/ihs_i2c.c

-- 
1.8.3

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Re: [U-Boot] SPL broken on i.mx31 platforms

2014-07-02 Thread Stefano Babic

Hi Helmut,

On 01/07/2014 15:53, Fabio Estevam wrote:
 
 I don't have access to a mx31 board at the moment to investigate this bug.
 
 Maybe Albert, Stefano or Magnus could help?

I have not at the moment access to a mx31 board, sorry.

Regards,
Stefano



-- 
=
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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[U-Boot] [PATCH v3] Implement generalised RSA public exponents for verified boot

2014-07-02 Thread michael

From: Michael van der Westhuizen mich...@smart-africa.com

Remove the verified boot limitation that only allows a single
RSA public exponent of 65537 (F4).  This change allows use with
existing PKI infrastructure and has been tested with HSM-based
PKI.

Change the configuration OF tree format to store the RSA public
exponent as a 64 bit integer and implement backward compatibility
for verified boot configuration trees without this extra field.

Parameterise vboot_test.sh to test different public exponents.

Mathematics and other hard work by Andrew Bott.

Tested with the following public exponents: 3, 5, 17, 257, 39981,
50457, 65537 and 4294967297.

Signed-off-by: Andrew Bott andrew.b...@ipaccess.com
Signed-off-by: Andrew Wishart andrew.wish...@ipaccess.com
Signed-off-by: Neil Piercy neil.pie...@ipaccess.com
Signed-off-by: Michael van der Westhuizen mich...@smart-africa.com
Cc: Simon Glass s...@chromium.org
---
Changes for v2:
   - None.  Resend to address line wrapping issues.
Changes for v3:
   - Address review comments, cleaning up variable names and
 rewording error messages.
   - Rebase against current master.
   - Apply as many suggested simplifications as feasible.

 doc/uImage.FIT/signature.txt |  4 +-
 include/u-boot/rsa.h |  1 +
 lib/rsa/rsa-sign.c   | 60 ++--
 lib/rsa/rsa-verify.c | 93 +---
 test/vboot/vboot_test.sh | 10 -
 5 files changed, 158 insertions(+), 10 deletions(-)

diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt
index a6ab543..b2f89fc 100644
--- a/doc/uImage.FIT/signature.txt
+++ b/doc/uImage.FIT/signature.txt
@@ -66,7 +66,8 @@ Creating an RSA key and certificate
 ---
 To create a new public key, size 2048 bits:
 
-$ openssl genrsa -F4 -out keys/dev.key 2048
+$ openssl genpkey -algorithm RSA -out keys/dev.key \
+-pkeyopt rsa_keygen_bits:2048 -pkeyopt rsa_keygen_pubexp:65537
 
 To create a certificate for this:
 
@@ -159,6 +160,7 @@ For RSA the following are mandatory:
 
 - rsa,num-bits: Number of key bits (e.g. 2048)
 - rsa,modulus: Modulus (N) as a big-endian multi-word integer
+- rsa,exponent: Public exponent (E) as a 64 bit unsigned integer
 - rsa,r-squared: (2^num-bits)^2 as a big-endian multi-word integer
 - rsa,n0-inverse: -1 / modulus[0] mod 2^32
 
diff --git a/include/u-boot/rsa.h b/include/u-boot/rsa.h
index 325751a..fd08a61 100644
--- a/include/u-boot/rsa.h
+++ b/include/u-boot/rsa.h
@@ -27,6 +27,7 @@ struct rsa_public_key {
uint32_t n0inv; /* -1 / modulus[0] mod 2^32 */
uint32_t *modulus;  /* modulus as little endian array */
uint32_t *rr;   /* R^2 as little endian array */
+   uint64_t exponent;  /* public exponent */
 };
 
 #if IMAGE_ENABLE_SIGN
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 83f5e87..f4d4338 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -261,10 +261,57 @@ err_priv:
 }
 
 /*
+ * rsa_get_exponent(): - Get the public exponent from an RSA key
+ */
+static int rsa_get_exponent(RSA *key, uint64_t *e)
+{
+   int ret;
+   BIGNUM *bn_te;
+   uint64_t te;
+
+   ret = -EINVAL;
+   bn_te = NULL;
+
+   if (!e)
+   goto cleanup;
+
+   if (BN_num_bits(key-e)  64)
+   goto cleanup;
+
+   *e = BN_get_word(key-e);
+
+   if (BN_num_bits(key-e)  33) {
+   ret = 0;
+   goto cleanup;
+   }
+
+   bn_te = BN_dup(key-e);
+   if (!bn_te)
+   goto cleanup;
+
+   if (!BN_rshift(bn_te, bn_te, 32))
+   goto cleanup;
+
+   if (!BN_mask_bits(bn_te, 32))
+   goto cleanup;
+
+   te = BN_get_word(bn_te);
+   te = 32;
+   *e |= te;
+   ret = 0;
+
+cleanup:
+   if (bn_te)
+   BN_free(bn_te);
+
+   return ret;
+}
+
+/*
  * rsa_get_params(): - Get the important parameters of an RSA public key
  */
-int rsa_get_params(RSA *key, uint32_t *n0_invp, BIGNUM **modulusp,
-  BIGNUM **r_squaredp)
+int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp,
+  BIGNUM **modulusp, BIGNUM **r_squaredp)
 {
BIGNUM *big1, *big2, *big32, *big2_32;
BIGNUM *n, *r, *r_squared, *tmp;
@@ -286,6 +333,9 @@ int rsa_get_params(RSA *key, uint32_t *n0_invp, BIGNUM 
**modulusp,
return -ENOMEM;
}
 
+   if (0 != rsa_get_exponent(key, exponent))
+   ret = -1;
+
if (!BN_copy(n, key-n) || !BN_set_word(big1, 1L) ||
!BN_set_word(big2, 2L) || !BN_set_word(big32, 32L))
ret = -1;
@@ -386,6 +436,7 @@ static int fdt_add_bignum(void *blob, int noffset, const 
char *prop_name,
 int rsa_add_verify_data(struct image_sign_info *info, void *keydest)
 {
BIGNUM *modulus, *r_squared;
+   uint64_t exponent;
uint32_t n0_inv;
int parent, node;
char name[100];
@@ -397,7

Re: [U-Boot] [PATCH v2 05/13] i2c: IHS I2C master driver

2014-07-02 Thread Heiko Schocher


Hello Dirk,

Am 02.07.2014 09:31, schrieb dirk.eib...@gdsys.cc:

From: Dirk Eibachdirk.eib...@gdsys.cc

IHS I2C master support was merely a hack in the osd driver.
Now it is a proper u-boot I2C framework driver, supporting the
v2.00 master features.

Signed-off-by: Dirk Eibachdirk.eib...@gdsys.cc

---

Changes in v2:
- move ihs_i2c to drivers/i2c
- split unrelated changes

  drivers/i2c/Makefile   |   1 +
  drivers/i2c/ihs_i2c.c  | 204 +
  include/configs/dlvision-10g.h |  11 +++
  include/configs/iocon.h|  23 -
  include/gdsys_fpga.h   |  25 +++--
  5 files changed, 246 insertions(+), 18 deletions(-)
  create mode 100644 drivers/i2c/ihs_i2c.c


Please add a small entry in README, which describes your new config
defines, thanks!

Beside of this, your driver looks Ok to me, thanks!

bye,
Heiko
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Re: [U-Boot] [PATCH v3 06/11] arm:reset: call the reset_misc() before the cpu reset


Hello Minkyu,

On 07/02/2014 09:03 AM, Minkyu Kang wrote:

On 01/07/14 23:36, Przemyslaw Marczak wrote:

Hello Minkyu,

On 06/27/2014 01:34 PM, Przemyslaw Marczak wrote:

On 06/27/2014 11:40 AM, Minkyu Kang wrote:

Dear Przemyslaw Marczak,

On 26/06/14 23:15, Przemyslaw Marczak wrote:

On an Odroid U3 board, the SOC is unable to reset the eMMC card
in the DWMMC mode by the cpu software reset. Manual reset of the card
by switching proper gpio pin - fixes this issue.

Such solution needs to add a call to pre reset function.
This is done by the reset_misc() function, which is called before
reset_cpu().
The function reset_misc() is a weak function.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Tom Rini tr...@ti.com
---
   arch/arm/lib/reset.c | 7 +++
   include/common.h | 1 +
   2 files changed, 8 insertions(+)


I'm not sure that we really need to add this function to arm common.
We can do this in reset_cpu (arch/arm/cpu/armv7/exynos/soc.c).
But if other SoCs also need to add such things then, it can be added
as arm common.

Thanks,
Minkyu Kang.



No one used this before, so probably better is to move it into exynos
soc.c code.

Thank you,


I'm working on a next patch set version. And the idea with calling reset_misc() 
from soc.c is quite bad. Function reset_cpu() is actually dedicated only for 
cpu software reset - as its name suggest.
So I prefer leave the reset_misc call inside do_reset().


Sorry. I didn't understand the reason.
Could you please explain more in detail?

Thanks,
Minkyu Kang.


I mean that we should take in to account the function names, e.g.:
- do_reset() - do the all reset needed things, and call:
 - reset_misc() - reset/prepare various devices before the CPU reset
 - reset_cpu() - do the CPU software reset only

The particular Odroid reset procedure is more board specific than SOC 
specific, and this is why it is implemented in board file.

So I think that the place of call to reset_misc() in common code is good.

Thanks
--
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Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] SPL broken on i.mx31 platforms

2014-07-02 Thread Albert ARIBAUD

Hi Helmut,

On Wed, 02 Jul 2014 09:04:46 +0200, Helmut Raiger
helmut.rai...@hale.at wrote:

 Hi,
  Hi,
 
   the commit 41623c91 breaks the SPL on i.mx31 platforms.
  The original startup code (start.S) was position independent to
  allow relocation in board_init_f. This is necessary as the internal
  RAM used by the IPL to load the first 2kB from NAND is also
  used by the NAND controller to buffer pages.
  As far as the issue goes: where and how exactly is the code not
  position independent now?
 The first statement is now:
 
  ldr pc, _reset
 _reset: .word reset
 
 reset is an address generated by the linker (here 0x87dc0060).
 Originally this was:
 
  b reset
 
 which is a relative branch (here 0x60 bytes forward).
 
 I have to add, that changing this back does not fix the issue, something 
 else is in disorder.
 I'm still working on it.
 
  Does changing the startup code back to PIC generate any
  drawbacks on other ARM platforms?
  How would this changing back to PIC be implemented? Not by reverting
  the patch, I hope.
 No, it will only be a minor change, I think, but I thought there might
 have been an additional intention behind the change to position
 dependent code. One could link the first part to 0xB800
 (the original position of the SPL when loaded by the IPL) and
 the part after the relocation to CONFIG_SPL_TEXT_BASE.
  What was the intention of the change besides unifying?
  Any other intent would be stated in the commit message.
 Ok, so the PIC issue was just an oversight.
 
  Maybe Albert, Stefano or Magnus could help?
  I don't have mx31 hardware either.
 
 
 It seems we are the only ones still dealing with this old lad ;-)

Full position independence was a lucky side effect of the code, not an
intended feature; relocation is precisely here because moving code
around usually won't work.

However, no relocation record (relative or other) are generated for the
indirect vectors, so that'll need a fix as well. It basically works in
U-Boot because most of the targets get loaded at their link-time base
address, so the indirect vectors are correct.

I suspect in your case, SPL was linked for one address and gets jumped
into at another address.

Can you tell me which board exactly you are experiencing the issue on?

 Helmut

Amicalement,
-- 
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[U-Boot] [PATCH v4 01/12] samsung: misc: fix soc revision setting in the set_board_info()

The byte order of soc revision was inverted, now it is fixed.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
 board/samsung/common/misc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 03106fd..a453a82 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -26,8 +26,8 @@ void set_board_info(void)
 {
char info[64];
 
-   snprintf(info, ARRAY_SIZE(info), %d.%d, s5p_cpu_rev  0x0f,
-(s5p_cpu_rev  0xf0)  0x04);
+   snprintf(info, ARRAY_SIZE(info), %u.%u, (s5p_cpu_rev  0xf0)  4,
+s5p_cpu_rev  0xf);
setenv(soc_rev, info);
 
snprintf(info, ARRAY_SIZE(info), %x, s5p_cpu_id);
-- 
1.9.1

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[U-Boot] [PATCH v4 00/12] Add support to Odroid U3/X2

This patch set introduces changes to common Samsung code
as a preparation of new board support:
- boot device check - code cleanup
- automatic init order of mmc drivers
- automatic setting of dfu entities which depends on boot device
- pre reset function call for board own implementation
- setting board info environment for multi board support

New board config:
- odroid_config - Odroid U3/X2 support

Przemyslaw Marczak (12):
  samsung: misc: fix soc revision setting in the set_board_info()
  exynos: pinmux: fix the gpio names for exynos4x12 mmc
  arch:exynos: boot mode: add get_boot_mode(), code cleanup
  board:samsung: check the boot device and init the right mmc driver.
  samsung: misc: add function for setting $dfu_alt_info
  samsung:board: misc_init_r: call set_dfu_alt_info()
  arm:reset: call the reset_misc() before the cpu reset
  samsung: board: enable support of multiple board types
  samsung: misc: use board specific functions to set env board info
  odroid: add board file for Odroid X2/U3 based on Samsung Exynos4412
  odroid: add odroid U3/X2 device tree description
  odroid: add odroid_config

 arch/arm/cpu/armv7/exynos/pinmux.c   |   4 +-
 arch/arm/cpu/armv7/exynos/power.c|   7 +
 arch/arm/cpu/armv7/exynos/spl_boot.c |   5 +-
 arch/arm/dts/Makefile|   3 +-
 arch/arm/dts/exynos4412-odroid.dts   |  70 +
 arch/arm/include/asm/arch-exynos/power.h |  20 ++
 arch/arm/include/asm/arch-exynos/spl.h   |  17 +-
 arch/arm/lib/reset.c |   6 +
 board/samsung/common/board.c |  52 +++-
 board/samsung/common/misc.c  |  55 +++-
 board/samsung/odroid/Makefile|   8 +
 board/samsung/odroid/odroid.c| 466 +++
 board/samsung/odroid/setup.h | 227 +++
 boards.cfg   |   1 +
 doc/README.odroid| 144 ++
 include/common.h |   1 +
 include/configs/odroid.h | 232 +++
 include/samsung/misc.h   |  11 +
 18 files changed, 1291 insertions(+), 38 deletions(-)
 create mode 100644 arch/arm/dts/exynos4412-odroid.dts
 create mode 100644 board/samsung/odroid/Makefile
 create mode 100644 board/samsung/odroid/odroid.c
 create mode 100644 board/samsung/odroid/setup.h
 create mode 100644 doc/README.odroid
 create mode 100644 include/configs/odroid.h

-- 
1.9.1

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[U-Boot] [PATCH v4 02/12] exynos: pinmux: fix the gpio names for exynos4x12 mmc

This change fixes the bad gpio configuration for the exynos dwmmc.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Beomho Seo beomho@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Jaehoon Chung jh80.ch...@samsung.com
---
 arch/arm/cpu/armv7/exynos/pinmux.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c 
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 86a0c75..b929486 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -704,8 +704,8 @@ static int exynos4x12_mmc_config(int peripheral, int flags)
ext_func = S5P_GPIO_FUNC(0x3);
break;
case PERIPH_ID_SDMMC4:
-   start = EXYNOS4_GPIO_K00;
-   start_ext = EXYNOS4_GPIO_K13;
+   start = EXYNOS4X12_GPIO_K00;
+   start_ext = EXYNOS4X12_GPIO_K13;
func = S5P_GPIO_FUNC(0x3);
ext_func = S5P_GPIO_FUNC(0x4);
break;
-- 
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[U-Boot] [PATCH v4 03/12] arch:exynos: boot mode: add get_boot_mode(), code cleanup

This patch introduces code clean-up for exynos boot mode check.
It includes:
- removal of typedef: boot_mode
- move the boot mode enum to arch-exynos/power.h
- add new function: get_boot_mode() for OM[5:1] pin check
- update spl boot code

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
 arch/arm/cpu/armv7/exynos/power.c|  7 +++
 arch/arm/cpu/armv7/exynos/spl_boot.c |  5 ++---
 arch/arm/include/asm/arch-exynos/power.h | 20 
 arch/arm/include/asm/arch-exynos/spl.h   | 17 ++---
 4 files changed, 31 insertions(+), 18 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/power.c 
b/arch/arm/cpu/armv7/exynos/power.c
index 638ee0b..e1ab3d6 100644
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -202,3 +202,10 @@ void power_exit_wakeup(void)
else
exynos4_power_exit_wakeup();
 }
+
+unsigned int get_boot_mode(void)
+{
+   unsigned int om_pin = samsung_get_base_power();
+
+   return readl(om_pin)  OM_PIN_MASK;
+}
diff --git a/arch/arm/cpu/armv7/exynos/spl_boot.c 
b/arch/arm/cpu/armv7/exynos/spl_boot.c
index ade45fd..c9b0884 100644
--- a/arch/arm/cpu/armv7/exynos/spl_boot.c
+++ b/arch/arm/cpu/armv7/exynos/spl_boot.c
@@ -20,7 +20,6 @@
 #include clock_init.h
 
 DECLARE_GLOBAL_DATA_PTR;
-#define OM_STAT (0x1f  1)
 
 /* Index into irom ptr table */
 enum index {
@@ -184,7 +183,7 @@ static void exynos_spi_copy(unsigned int uboot_size, 
unsigned int uboot_addr)
 */
 void copy_uboot_to_ram(void)
 {
-   enum boot_mode bootmode = BOOT_MODE_OM;
+   u32 bootmode = BOOT_MODE_OM;
 
u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst) = NULL;
u32 offset = 0, size = 0;
@@ -207,7 +206,7 @@ void copy_uboot_to_ram(void)
 #endif
 
if (bootmode == BOOT_MODE_OM)
-   bootmode = readl(samsung_get_base_power())  OM_STAT;
+   bootmode = get_boot_mode();
 
switch (bootmode) {
 #ifdef CONFIG_SPI_BOOTING
diff --git a/arch/arm/include/asm/arch-exynos/power.h 
b/arch/arm/include/asm/arch-exynos/power.h
index 4f2447b..d08f58b 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -1670,6 +1670,26 @@ struct exynos5420_power {
 };
 #endif /* __ASSEMBLY__ */
 
+#define OM_PIN_BITS0x1f
+#define OM_PIN_SHIFT   0x1
+#define OM_PIN_MASK(OM_PIN_BITS  OM_PIN_SHIFT)
+
+enum {
+   /*
+* Assign the OM pin values for respective boot modes.
+* Exynos4 does not support spi boot and the mmc boot OM
+* pin values are the same across Exynos4 and Exynos5.
+*/
+   BOOT_MODE_MMC = 4,
+   BOOT_MODE_EMMC = 8, /* EMMC4.4 */
+   BOOT_MODE_SERIAL = 20,
+   /* Boot based on Operating Mode pin settings */
+   BOOT_MODE_OM = 32,
+   BOOT_MODE_USB,  /* Boot using USB download */
+};
+
+unsigned int get_boot_mode(void);
+
 void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable);
 
 #define EXYNOS_MIPI_PHY_ENABLE (1  0)
diff --git a/arch/arm/include/asm/arch-exynos/spl.h 
b/arch/arm/include/asm/arch-exynos/spl.h
index b1d68c3..cdcb2bc 100644
--- a/arch/arm/include/asm/arch-exynos/spl.h
+++ b/arch/arm/include/asm/arch-exynos/spl.h
@@ -8,20 +8,7 @@
 #define __ASM_ARCH_EXYNOS_SPL_H__
 
 #include asm/arch-exynos/dmc.h
-
-enum boot_mode {
-   /*
-* Assign the OM pin values for respective boot modes.
-* Exynos4 does not support spi boot and the mmc boot OM
-* pin values are the same across Exynos4 and Exynos5.
-*/
-   BOOT_MODE_MMC = 4,
-   BOOT_MODE_EMMC = 8, /* EMMC4.4 */
-   BOOT_MODE_SERIAL = 20,
-   /* Boot based on Operating Mode pin settings */
-   BOOT_MODE_OM = 32,
-   BOOT_MODE_USB,  /* Boot using USB download */
-};
+#include asm/arch/power.h
 
 #ifndef __ASSEMBLY__
 /* Parameters of early board initialization in SPL */
@@ -62,7 +49,7 @@ struct spl_machine_param {
 * table only for mmc boot.
 */
u32 uboot_size;
-   enum boot_mode  boot_source;/* Boot device */
+   unsignedboot_source;/* Boot device */
unsignedfrequency_mhz;  /* Frequency of memory in MHz */
unsignedarm_freq_mhz;   /* ARM Frequency in MHz */
u32 serial_base;/* Serial base address */
-- 
1.9.1

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[U-Boot] [PATCH v4 04/12] board:samsung: check the boot device and init the right mmc driver.

It is possible to boot device using a micro SD or eMMC slots.
In this situation, boot device should be registered as a block
device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV
is usually set to 0 in the most config cases.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes V3:
- separate two changes into two commits

Changes V4:
- board.c: add functions: init_mmc() and init_dwmmc()
- board_mmc_init(): call get_boot_mode()
---
 board/samsung/common/board.c | 37 +++--
 1 file changed, 27 insertions(+), 10 deletions(-)

diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 9dc7c83..4d3f216 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -240,22 +240,39 @@ int board_eth_init(bd_t *bis)
 }
 
 #ifdef CONFIG_GENERIC_MMC
-int board_mmc_init(bd_t *bis)
+static int init_mmc(void)
+{
+#ifdef CONFIG_SDHCI
+   return exynos_mmc_init(gd-fdt_blob);
+#else
+   return 0;
+#endif
+}
+
+static int init_dwmmc(void)
 {
-   int ret;
 #ifdef CONFIG_DWMMC
-   /* dwmmc initializattion for available channels */
-   ret = exynos_dwmmc_init(gd-fdt_blob);
-   if (ret)
-   debug(dwmmc init failed\n);
+   return exynos_dwmmc_init(gd-fdt_blob);
+#else
+   return 0;
 #endif
+}
+
+int board_mmc_init(bd_t *bis)
+{
+   int ret;
+
+   if (get_boot_mode() == BOOT_MODE_MMC) {
+   ret = init_mmc();
+   ret |= init_dwmmc();
+   } else {
+   ret = init_dwmmc();
+   ret |= init_mmc();
+   }
 
-#ifdef CONFIG_SDHCI
-   /* mmc initializattion for available channels */
-   ret = exynos_mmc_init(gd-fdt_blob);
if (ret)
debug(mmc init failed\n);
-#endif
+
return ret;
 }
 #endif
-- 
1.9.1

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[U-Boot] [PATCH v4 06/12] samsung:board: misc_init_r: call set_dfu_alt_info()

This change enable automatic setting of dfu alt info
on every boot. This is useful in case of booting one
u-boot binary from multiple media.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
 board/samsung/common/board.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 4d3f216..a46e87b 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -324,6 +324,9 @@ int arch_early_init_r(void)
 #ifdef CONFIG_MISC_INIT_R
 int misc_init_r(void)
 {
+#ifdef CONFIG_SET_DFU_ALT_INFO
+   set_dfu_alt_info();
+#endif
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
set_board_info();
 #endif
-- 
1.9.1

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[U-Boot] [PATCH v4 09/12] samsung: misc: use board specific functions to set env board info

This change adds setup of environmental board info using
get_board_name() and get_board_type() functions for config
CONFIG_BOARD_TYPES.

This is useful in case of running many boards with just one config.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com

---
Changes v2:
- set_board_info: move the bdtype pointer to avoid unused pointer
  compilation warning

Changes v3:
- samsung: misc: change get_board_type_fdt() to get_board_type()
- samsung: misc: set env $boardname using get_board_* functions
  for CONFIG_BOARD_TYPES
- update commit msg
---
 board/samsung/common/misc.c | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 5a3eb93..ec864bf 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -76,8 +76,17 @@ void set_board_info(void)
setenv(board_rev, info);
 #endif
 #ifdef CONFIG_OF_LIBFDT
-   snprintf(info, ARRAY_SIZE(info),  %s%x-%s.dtb,
-CONFIG_SYS_SOC, s5p_cpu_id, CONFIG_SYS_BOARD);
+   const char *bdtype = ;
+   const char *bdname = CONFIG_SYS_BOARD;
+
+#ifdef CONFIG_BOARD_TYPES
+   bdtype = get_board_type();
+   bdname = get_board_name();
+   sprintf(info, %s%s, bdname, bdtype);
+   setenv(boardname, info);
+#endif
+   snprintf(info, ARRAY_SIZE(info),  %s%x-%s%s.dtb,
+CONFIG_SYS_SOC, s5p_cpu_id, bdname, bdtype);
setenv(fdtfile, info);
 #endif
 }
-- 
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[U-Boot] [PATCH v4 05/12] samsung: misc: add function for setting $dfu_alt_info

This change introduces new common function:
- set_dfu_alt_info() - put dfu system and bootloader setting
   into $dfu_alt_info.
functions declaration:
- char *get_dfu_alt_system(void)
- char *get_dfu_alt_boot(void)
- void set_dfu_alt_info(void)
and new config:
- CONFIG_SET_DFU_ALT_INFO

This function can be used for auto setting dfu configuration on boot.
Such feature is useful for multi board support by one u-boot binary.
Each board should define two functions:
- get_dfu_alt_system()
- get_dfu_alt_boot()

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com

---
Changes v2:
- change config names:
  CONFIG_SET_DFU_BOOT_ALT to CONFIG_DFU_ALT_BOOTLOADER and
  CONFIG_DFU_BOOT_ALT_* to CONFIG_DFU_ALT_BOOT_*
- change function name: set_dfu_boot_alt() to set_dfu_alt_boot()
- remove superfluous ifdefs

Changes v3:
- set $dfu_alt_info at every boot
- new config: CONFIG_SET_DFU_ALT_INFO
- update commit msg

Changes v4:
- set_dfu_alt_info(): add checking the pointer returned by malloc
---
 board/samsung/common/misc.c | 38 ++
 include/samsung/misc.h  |  6 ++
 2 files changed, 44 insertions(+)

diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index a453a82..5a3eb93 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -11,6 +11,7 @@
 #include samsung/misc.h
 #include errno.h
 #include version.h
+#include malloc.h
 #include linux/sizes.h
 #include asm/arch/cpu.h
 #include asm/arch/gpio.h
@@ -21,6 +22,43 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_SET_DFU_ALT_INFO
+void set_dfu_alt_info(void)
+{
+   char *alt_boot = NULL;
+   char *alt_system = NULL;
+   char *buf = NULL;
+   int buf_len;
+
+   puts(DFU alt info setting: );
+
+   alt_boot = get_dfu_alt_boot();
+   if (!alt_boot)
+   goto error;
+
+   alt_system = get_dfu_alt_system();
+   if (!alt_system)
+   goto error;
+
+   buf_len = strlen(alt_boot) + strlen(alt_system) + 2;
+   buf = malloc(buf_len);
+   if (!buf)
+   goto error;
+
+   sprintf(buf, %s;%s, alt_boot, alt_system);
+   setenv(dfu_alt_info, buf);
+
+   free(buf);
+
+   puts(done\n);
+
+   return;
+error:
+   puts(error\n);
+   setenv(dfu_alt_info, Settings not found!);
+}
+#endif
+
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 void set_board_info(void)
 {
diff --git a/include/samsung/misc.h b/include/samsung/misc.h
index 10653a1..e82bf32 100644
--- a/include/samsung/misc.h
+++ b/include/samsung/misc.h
@@ -28,4 +28,10 @@ void check_boot_mode(void);
 void draw_logo(void);
 #endif
 
+#ifdef CONFIG_SET_DFU_ALT_INFO
+char *get_dfu_alt_system(void);
+char *get_dfu_alt_boot(void);
+void set_dfu_alt_info(void);
+#endif
+
 #endif /* __SAMSUNG_MISC_COMMON_H__ */
-- 
1.9.1

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[U-Boot] [PATCH v4 10/12] odroid: add board file for Odroid X2/U3 based on Samsung Exynos4412

This board file supports standard features of Odroid X2 and U3 boards:
- Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to 800MHz,
- MAX77686 power regulator,
- USB PHY,
- enable XCL205 - power for board peripherials
- check board type: U3 or X2.
- enable Odroid U3 FAN cooler

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Tom Rini tr...@ti.com

---
Changes v2:
- enable fan on odroid U3

Changes v3:
- odroid.c: clean up board name related code
- odroid.c: remove static from set_board_type()
- odroid.c: add implementation of functions: get_dfu_alt_*
- odroid.c: include misc.h

Changes v4:
odroid.c: dfu_get_alt_boot: add call get_boot_mode()
---
 board/samsung/odroid/Makefile |   8 +
 board/samsung/odroid/odroid.c | 466 ++
 board/samsung/odroid/setup.h  | 227 
 3 files changed, 701 insertions(+)
 create mode 100644 board/samsung/odroid/Makefile
 create mode 100644 board/samsung/odroid/odroid.c
 create mode 100644 board/samsung/odroid/setup.h

diff --git a/board/samsung/odroid/Makefile b/board/samsung/odroid/Makefile
new file mode 100644
index 000..b98aaeb
--- /dev/null
+++ b/board/samsung/odroid/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2014 Samsung Electronics Co., Ltd. All rights reserved.
+# Przemyslaw Marczak p.marc...@samsung.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  := odroid.o
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
new file mode 100644
index 000..28706af
--- /dev/null
+++ b/board/samsung/odroid/odroid.c
@@ -0,0 +1,466 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ * Przemyslaw Marczak p.marc...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/gpio.h
+#include asm/arch/cpu.h
+#include power/pmic.h
+#include power/max77686_pmic.h
+#include errno.h
+#include usb.h
+#include usb/s3c_udc.h
+#include samsung/misc.h
+#include setup.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_BOARD_TYPES
+/* Odroid board types */
+enum {
+   ODROID_TYPE_U3,
+   ODROID_TYPE_X2,
+};
+
+void set_board_type(void)
+{
+   int val;
+
+   /* Check GPC1 pin 2 */
+   gpio_set_pull(EXYNOS4X12_GPIO_C12, S5P_GPIO_PULL_NONE);
+   gpio_set_drv(EXYNOS4X12_GPIO_C12, S5P_GPIO_DRV_4X);
+   gpio_direction_input(EXYNOS4X12_GPIO_C12);
+
+   /* XCL205 - needs some latch time */
+   mdelay(10);
+
+   /* Check GPC1 pin2 - LED supplied by XCL205 - X2 only */
+   val = gpio_get_value(EXYNOS4X12_GPIO_C12);
+   if (val)
+   gd-board_type = ODROID_TYPE_X2;
+   else
+   gd-board_type = ODROID_TYPE_U3;
+}
+
+const char *get_board_name(void)
+{
+   const char *board_name = odroid;
+
+   return board_name;
+}
+
+const char *get_board_type(void)
+{
+   const char *board_type[] = {u3, x2};
+
+   return board_type[gd-board_type];
+}
+#endif
+
+#ifdef CONFIG_SET_DFU_ALT_INFO
+char *get_dfu_alt_system(void)
+{
+   return getenv(dfu_alt_system);
+}
+
+char *get_dfu_alt_boot(void)
+{
+   char *alt_boot = NULL;
+
+   switch (get_boot_mode()) {
+   case BOOT_MODE_MMC:
+   alt_boot = CONFIG_DFU_ALT_BOOT_SD;
+   break;
+   default:
+   alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
+   break;
+   }
+
+   if (!alt_boot)
+   return NULL;
+
+   setenv(dfu_alt_boot, alt_boot);
+
+   return alt_boot;
+}
+#endif
+
+static void board_clock_init(void)
+{
+   unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc;
+   struct exynos4x12_clock *clk = (struct exynos4x12_clock *)
+   samsung_get_base_clock();
+
+   /*
+* CMU_CPU clocks src to MPLL
+* Bit values: 0  ; 1
+* MUX_APLL_SEL:FIN_PLL   ; FOUT_APLL
+* MUX_CORE_SEL:MOUT_APLL ; SCLK_MPLL
+* MUX_HPM_SEL: MOUT_APLL ; SCLK_MPLL_USER_C
+* MUX_MPLL_USER_SEL_C: FIN_PLL   ; SCLK_MPLL
+   */
+   clr_src_cpu = MUX_APLL_SEL(0x1) | MUX_CORE_SEL(0x1) |
+ MUX_HPM_SEL(0x1) | MUX_MPLL_USER_SEL_C(0x1);
+   set = MUX_APLL_SEL(0) | MUX_CORE_SEL(1) | MUX_HPM_SEL(1) |
+ MUX_MPLL_USER_SEL_C(1);
+
+   clrsetbits_le32(clk-src_cpu, clr_src_cpu, set);
+
+   /* Wait for mux change */
+   while (readl(clk-mux_stat_cpu)  MUX_STAT_CPU_CHANGING)
+   continue;
+
+   /* Set APLL to 1000MHz */
+   clr_pll_con0 = SDIV(0x7) | PDIV(0x3f) | MDIV(0x3ff) | FSEL(0x1);
+   set = SDIV(0) | PDIV(3) | MDIV(125) | FSEL(1);
+
+   clrsetbits_le32(clk-apll_con0, clr_pll_con0, set);
+
+   /* Wait for PLL to be locked */
+   while (!(readl(clk-apll_con0)  PLL_LOCKED_BIT))
+   continue;
+
+

[U-Boot] [PATCH v4 07/12] arm:reset: call the reset_misc() before the cpu reset

On an Odroid U3 board, the SOC is unable to reset the eMMC card
in the DWMMC mode by the cpu software reset. Manual reset of the card
by switching proper gpio pin - fixes this issue.

Such solution needs to add a call to pre reset function.
This is done by the reset_misc() function, which is called before reset_cpu().
The function reset_misc() is a weak function.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
Cc: Tom Rini tr...@ti.com

Changes v4:
- arch/arm/reset: fix weak function attribute to proper style
---
 arch/arm/lib/reset.c | 6 ++
 include/common.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c
index 7a03580..9a95f08 100644
--- a/arch/arm/lib/reset.c
+++ b/arch/arm/lib/reset.c
@@ -23,6 +23,10 @@
 
 #include common.h
 
+__weak void reset_misc(void)
+{
+}
+
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
puts (resetting ...\n);
@@ -30,6 +34,8 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
udelay (5); /* wait 50 ms */
 
disable_interrupts();
+
+   reset_misc();
reset_cpu(0);
 
/*NOTREACHED*/
diff --git a/include/common.h b/include/common.h
index 232136c..04bab78 100644
--- a/include/common.h
+++ b/include/common.h
@@ -629,6 +629,7 @@ int checkicache   (void);
 intcheckdcache   (void);
 void   upmconfig (unsigned int, unsigned int *, unsigned int);
 ulong  get_tbclk (void);
+void   reset_misc(void);
 void   reset_cpu (ulong addr);
 #if defined (CONFIG_OF_LIBFDT)  defined (CONFIG_OF_BOARD_SETUP)
 void ft_cpu_setup(void *blob, bd_t *bd);
-- 
1.9.1

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[U-Boot] [PATCH v4 08/12] samsung: board: enable support of multiple board types

This change adds declaration of functions:
- set_board_type() - called at checkboard()
- get_board_type() - called at checkboard()
- get_board_name()

For supporting multiple board types in a one config - it is welcome
to display the current board model. This is what get_board_type()
should return.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com

---
Changes v3:
- change the commit order
- include/samsung/misc.h: add new functions declaration
- update a commit message

Changes v4:
- checkboard(): remove redundant variable
---
 board/samsung/common/board.c | 12 +---
 include/samsung/misc.h   |  5 +
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index a46e87b..3e27130 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -280,11 +280,17 @@ int board_mmc_init(bd_t *bis)
 #ifdef CONFIG_DISPLAY_BOARDINFO
 int checkboard(void)
 {
-   const char *board_name;
+   const char *board_info;
 
-   board_name = fdt_getprop(gd-fdt_blob, 0, model, NULL);
-   printf(Board: %s\n, board_name ? board_name : unknown);
+   board_info = fdt_getprop(gd-fdt_blob, 0, model, NULL);
+   printf(Board: %s\n, board_info ? board_info : unknown);
+#ifdef CONFIG_BOARD_TYPES
+   set_board_type();
 
+   board_info = get_board_type();
+
+   printf(Model: %s\n, board_info ? board_info : unknown);
+#endif
return 0;
 }
 #endif
diff --git a/include/samsung/misc.h b/include/samsung/misc.h
index e82bf32..cc41997 100644
--- a/include/samsung/misc.h
+++ b/include/samsung/misc.h
@@ -33,5 +33,10 @@ char *get_dfu_alt_system(void);
 char *get_dfu_alt_boot(void);
 void set_dfu_alt_info(void);
 #endif
+#ifdef CONFIG_BOARD_TYPES
+void set_board_type(void);
+const char *get_board_type(void);
+const char *get_board_name(void);
+#endif
 
 #endif /* __SAMSUNG_MISC_COMMON_H__ */
-- 
1.9.1

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[U-Boot] [PATCH v4 11/12] odroid: add odroid U3/X2 device tree description

This is a standard description for Odroid boards.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Tom Rini tr...@ti.com
---
 arch/arm/dts/Makefile  |  3 +-
 arch/arm/dts/exynos4412-odroid.dts | 70 ++
 2 files changed, 72 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/exynos4412-odroid.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 933a464..ff95ad9 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,7 +1,8 @@
 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
exynos4210-universal_c210.dtb \
exynos4210-trats.dtb \
-   exynos4412-trats2.dtb
+   exynos4412-trats2.dtb \
+   exynos4412-odroid.dtb
 
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
diff --git a/arch/arm/dts/exynos4412-odroid.dts 
b/arch/arm/dts/exynos4412-odroid.dts
new file mode 100644
index 000..24d0bf1
--- /dev/null
+++ b/arch/arm/dts/exynos4412-odroid.dts
@@ -0,0 +1,70 @@
+/*
+ * Odroid-U3/X2 board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ exynos4.dtsi
+
+/ {
+   model = Odroid based on Exynos4412;
+   compatible = samsung,odroid, samsung,exynos4412;
+
+   aliases {
+   i2c0 = /i2c@1386;
+   serial0 = /serial@1380;
+   console = /serial@1381;
+   mmc2 = sdhci@1253;
+   mmc4 = dwmmc@1255;
+   };
+
+   i2c@1386 {
+   samsung,i2c-sda-delay = 100;
+   samsung,i2c-slave-addr = 0x10;
+   samsung,i2c-max-bus-freq = 10;
+   status = okay;
+
+   max77686_pmic@09 {
+   compatible = maxim,max77686_pmic;
+   interrupts = 7 0;
+   reg = 0x09 0 0;
+   #clock-cells = 1;
+   };
+   };
+
+   serial@1381 {
+   status = okay;
+   };
+
+   sdhci@1251 {
+   status = disabled;
+   };
+
+   sdhci@1252 {
+   status = disabled;
+   };
+
+   sdhci@1253 {
+   samsung,bus-width = 4;
+   samsung,timing = 1 2 3;
+   cd-gpios = gpio 0xC2 0;
+   };
+
+   sdhci@1254 {
+   status = disabled;
+   };
+
+   dwmmc@1255 {
+   samsung,bus-width = 8;
+   samsung,timing = 2 1 0;
+   samsung,removable = 0;
+   fifoth_val = 0x203f0040;
+   bus_hz = 4;
+   div = 0x3;
+   index = 4;
+   };
+};
-- 
1.9.1

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[U-Boot] [PATCH v4 12/12] odroid: add odroid_config

This config is valid for two devices:
- Odroid X2,
- Odroid U3.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Tom Rini tr...@ti.com

---
Changes v2:
- odroid config: add CONFIG_DFU_ALT_BOOTLOADER
- odroid config: change name of CONFIG_DFU_BOOT_ALT_* to CONFIG_DFU_ALT_BOOT_*

Changes v3:
- odroid.h: update CONFIG_DFU_ALT_BOOT_** with required bootloader binaries
- odroid.h: add multi image support (CONFIG_FIT)
- odroid.h: add autoboot script for multi boot options
- odroid.h: change env name: dfu_alt_info - dfu_alt_system
- odroid.h: update config name: CONFIG_SET_DFU_ALT_INFO
- odroid.h: reduce boot delay to 0 seconds
- update: doc/README.odroid
---
 boards.cfg   |   1 +
 doc/README.odroid| 144 +
 include/configs/odroid.h | 232 +++
 3 files changed, 377 insertions(+)
 create mode 100644 doc/README.odroid
 create mode 100644 include/configs/odroid.h

diff --git a/boards.cfg b/boards.cfg
index 1527ebe..8e8bcb3 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -297,6 +297,7 @@ Active  arm armv7  exynos  samsung  
   smdk5420
 Active  arm armv7  exynos  samsung smdkv310
smdkv310  - 

Chander Kashyap k.chan...@samsung.com
 Active  arm armv7  exynos  samsung trats   
trats - 

Lukasz Majewski l.majew...@samsung.com
 Active  arm armv7  exynos  samsung trats2  
trats2- 

Piotr Wilczek p.wilc...@samsung.com
+Active  arm armv7  exynos  samsung odroid  
odroid- 

Przemyslaw Marczak p.marc...@samsung.com
 Active  arm armv7  exynos  samsung universal_c210  
s5pc210_universal - 

Przemyslaw Marczak p.marc...@samsung.com
 Active  arm armv7  highbank-   highbank
highbank  - 

Rob Herring r...@kernel.org
 Active  arm armv7  keystoneti  k2hk_evm
k2hk_evm  - 

Vitaly Andrianov vita...@ti.com
diff --git a/doc/README.odroid b/doc/README.odroid
new file mode 100644
index 000..15aba10
--- /dev/null
+++ b/doc/README.odroid
@@ -0,0 +1,144 @@
+ U-boot for Odroid X2/U3
+
+
+1. Summary
+==
+This is a quick instruction for setup Odroid boards based on Exynos4412.
+Board config: odroid_config
+
+2. Supported devices
+
+This U-BOOT config can be used on two boards:
+- Odroid U3
+- Odroid X2
+with CPU Exynos 4412 rev 2.0 and 2GB of RAM
+
+3. Boot sequence
+
+iROM-BL1-(BL2 + TrustZone)-U-BOOT
+
+This version of U-BOOT doesn't implement SPL but it is required(BL2)
+and can be found in boot.tar.gz from here:
+http://dev.odroid.com/projects/4412boot/wiki/FrontPage?action=downloadvalue=boot.tar.gz
+
+4. Boot media layout
+
+The table below shows SD/eMMC cards layout for U-boot.
+The block offset is starting from 0 and the block size is 512B.
+ -
+|  Binary   | Block offset| part type |
+|   name| SD   | eMMC |(eMMC only)|
+ -
+| Bl1   | 1| 0|  1 (boot) |
+| Bl2   | 31   | 30   |  1 (boot) |
+| U-boot| 63   | 62   |  1 (boot) |
+| Tzsw  | 2111 | 2110 |  1 (boot) |
+| Uboot Env | 2500 | 2500 |  0 (user) |
+ -
+
+5. Prepare the SD boot card - with SD card reader
+=
+To prepare bootable media you need boot binaries provided by hardkernel.
+File boot.tar.gz (link in point 3.) contains:
+- E4412_S.bl1.HardKernel.bin
+- E4412_S.tzsw.signed.bin
+- bl2.signed.bin
+- sd_fusing.sh
+- u-boot.bin
+
+This is all you need to boot this board. But if you want to use your custom

Re: [U-Boot] [PATCH] ARM: kirkwood: fix cpu info for 6282 device id


On 02.07.2014 02:17, Luka Perkov wrote:

Signed-off-by: Luka Perkov l...@openwrt.org
CC: Prafulla Wadaskar prafu...@marvell.com
CC: Stefan Roese s...@denx.de


Acked-by: Stefan Roese s...@denx.de

Thanks,
Stefan

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Re: [U-Boot] [PATCH] kirkwood: cosmetic: style fixes in kwbimage.cfg files


On 02.07.2014 02:16, Luka Perkov wrote:

When diffing through the various kwbimage.cfg files only show
relevant changes.

Signed-off-by: Luka Perkov l...@openwrt.org
CC: Prafulla Wadaskar prafu...@marvell.com
CC: Stefan Roese s...@denx.de


Acked-by: Stefan Roese s...@denx.de

Thanks,
Stefan

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Re: [U-Boot] [PATCH] kirkwood: define empty CONFIG_MVGBE_PORTS by default


On 02.07.2014 02:17, Luka Perkov wrote:

Each board with defines it's own set of values. If we do not define
CONFIG_MVGBE_PORTS we will hit following error:

mvgbe.c: In function 'mvgbe_initialize':
mvgbe.c:700:34: error: 'CONFIG_MVGBE_PORTS' undeclared (first use in this 
function)
   u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS;

This patch fixes above described problem.

Signed-off-by: Luka Perkov l...@openwrt.org
CC: Prafulla Wadaskar prafu...@marvell.com
CC: Stefan Roese s...@denx.de


Acked-by: Stefan Roese s...@denx.de

Thanks,
Stefan

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Re: [U-Boot] [PATCH] kirkwood: ib62x0: add CONFIG_SYS_GENERIC_BOARD define


On 02.07.2014 02:18, Luka Perkov wrote:

Signed-off-by: Luka Perkov l...@openwrt.org
CC: Prafulla Wadaskar prafu...@marvell.com
CC: Stefan Roese s...@denx.de


Acked-by: Stefan Roese s...@denx.de

Thanks,
Stefan

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Re: [U-Boot] enbw_cmc, da850evm_direct_nor, and calimain vectors table misaligned (was: [PATCH] arm: fix a build error with CONFIG_USE_IRQ)

2014-07-02 Thread Christian Riesch

Hello Albert,

On Wed, Jun 18, 2014 at 2:55 PM, Christian Riesch
christian.rie...@omicron.at wrote:
 Am I missing something here? What would be the preferred solution to
 make the board working again?

Any comments on this? What shall we do to get the boards working again?
Thanks,
Christian
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[U-Boot] [PULL] u-boot-usb/master

2014-07-02 Thread Marek Vasut

The following changes since commit ba9b42c81b0734d53edfbb1fe4a6ded7de78c5ab:

  Merge branch 'sandbox' of git://git.denx.de/u-boot-x86 (2014-06-24 14:06:22 
-0400)

are available in the git repository at:


  git://git.denx.de/u-boot-usb.git HEAD

for you to fetch changes up to dcb89b5aa0a90f791a594e0177cb144fdccec784:

  usb: ci_udc: use var name ep/ci_ep consistently (2014-07-02 15:45:38 +0200)


Ilya Ledvich (1):
  usb: eth: smsc95xx: add LAN9500A device ID

Jeroen Hofstee (5):
  usb: cosmetic: double const
  usb:composite: clear the whole common buffer
  usb:g_dnl:f_thor: remove memset before memcpy
  usb: xhci: (likely) fix bracket in if condition
  usb: fastboot: fix potential buffer overflow

Stephen Warren (11):
  usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
  usb: ci_udc: fix typo in debug message
  dfu: free entities when parsing fails
  usb: ci_udc: fix ci_flush_{qh,qtd} calls in ci_udc_probe()
  usb: ci_udc: don't assume QTDs are adjacent when transmitting ZLPs
  usb: ci_udc: lift ilist size calculations to global scope
  usb: ci_udc: fix items array size/stride calculation
  usb: ci_udc: remove controller.items array
  usb: ci_udc: don't memalign() struct ci_req allocations
  USB: gadget: atmel: zero out allocated requests
  usb: ci_udc: use var name ep/ci_ep consistently

Yasuhisa Umano (1):
  usb: r8a66597: Fix initilization size of r8a66597 info structure

yasuhisa umano (1):
  usb: r8a66597: Fix initialization hub that using R8A66597_MAX_ROOT_HUB

 common/cmd_dfu.c|  5 +++--
 drivers/usb/eth/asix.c  |  2 +-
 drivers/usb/eth/mcs7830.c   |  2 +-
 drivers/usb/eth/smsc95xx.c  |  1 +
 drivers/usb/gadget/atmel_usba_udc.c |  2 +-
 drivers/usb/gadget/ci_udc.c | 92 

 drivers/usb/gadget/ci_udc.h |  1 -
 drivers/usb/gadget/f_fastboot.c | 11 +++
 drivers/usb/gadget/f_mass_storage.c |  4 ++--
 drivers/usb/gadget/f_thor.c |  1 -
 drivers/usb/host/r8a66597-hcd.c |  6 +++---
 drivers/usb/host/xhci.c |  4 ++--
 12 files changed, 69 insertions(+), 62 deletions(-)
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[U-Boot] Fwd: Debian platform firmware strategy?

2014-07-02 Thread Chris Moore

Hi Paul,

I hope you don't mind my forwarding your message below to the U-Boot ML.
I think U-Boot ML subscribers may be interested in this discussion.
My apologies in advance if I am wrong.

Cheers,
Chris

Message original
Sujet: Debian platform firmware strategy?
Date de renvoi :Wed, 2 Jul 2014 02:24:53 + (UTC)
De (renvoi) : debian-...@lists.debian.org
Date : Wed, 2 Jul 2014 10:24:31 +0800
De :Paul Wise p...@debian.org
Pour : debian-...@lists.debian.org

Hi all,

Platform firmware is an odd beast in the world of software. It is
mostly different per device. It is mostly proprietary and binary only.
When it isn't proprietary, the code is probably not merged upstream.
Sometimes it is very hard or impossible to update. It is very easy to
brick a device with a firmware update. Some devices are unbrickable
due to read-only secondary platform firmware chosen at boot time with
a button or via USB. Updating/replacing the platform firmware could
have unforeseen consequences (not being able to boot other OSes for
eg).

On x86 we ignore the platform firmware, don't package any libre
firmware (i.e. coreboot) and chainload our own bootloaders before
starting an OS.

On ARM the platform firmware is way less standardised but is often
u-boot. u-boot mainline is packaged and apparently has support for 6
armel devices and 13 armhf devices. Other devices ship with either a
locked proprietary bootloader (Android devices mostly), a forked
u-boot or some other FOSS bootloader. Sometimes the device ships with
older less capable versions of u-boot which complicate installation
(extra boot partitions required etc).

What should Debian's strategy/policy wrt platform firmware be?

Currently it seems to be just leave the platform firmware alone and
leave it up to the user to research if they can install libre
firmware.

I'm thinking we should promote using Free Software where possible and
packaged versions of that Free Software where possible. Due to the
possibility of unforeseeable circumstances, that promotion should
probably only consist of a default-to-no suggestion to replace
existing platform firmware if only intending to use Debian on the
device.

--
bye,
pabs

http://wiki.debian.org/PaulWise

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Re: [U-Boot] [PULL] u-boot-usb/master

2014-07-02 Thread Tom Rini

On Wed, Jul 02, 2014 at 03:54:03PM +0200, Marek Vasut wrote:

 The following changes since commit ba9b42c81b0734d53edfbb1fe4a6ded7de78c5ab:
 
   Merge branch 'sandbox' of git://git.denx.de/u-boot-x86 (2014-06-24 14:06:22 
 -0400)
 
 are available in the git repository at:
 
 
   git://git.denx.de/u-boot-usb.git HEAD
 
 for you to fetch changes up to dcb89b5aa0a90f791a594e0177cb144fdccec784:
 
   usb: ci_udc: use var name ep/ci_ep consistently (2014-07-02 15:45:38 +0200)
 
 
 Ilya Ledvich (1):
   usb: eth: smsc95xx: add LAN9500A device ID
 
 Jeroen Hofstee (5):
   usb: cosmetic: double const
   usb:composite: clear the whole common buffer
   usb:g_dnl:f_thor: remove memset before memcpy
   usb: xhci: (likely) fix bracket in if condition
   usb: fastboot: fix potential buffer overflow
 
 Stephen Warren (11):
   usb: ci_udc: fix interaction with CONFIG_USB_ETH_CDC
   usb: ci_udc: fix typo in debug message
   dfu: free entities when parsing fails
   usb: ci_udc: fix ci_flush_{qh,qtd} calls in ci_udc_probe()
   usb: ci_udc: don't assume QTDs are adjacent when transmitting ZLPs
   usb: ci_udc: lift ilist size calculations to global scope
   usb: ci_udc: fix items array size/stride calculation
   usb: ci_udc: remove controller.items array
   usb: ci_udc: don't memalign() struct ci_req allocations
   USB: gadget: atmel: zero out allocated requests
   usb: ci_udc: use var name ep/ci_ep consistently
 
 Yasuhisa Umano (1):
   usb: r8a66597: Fix initilization size of r8a66597 info structure
 
 yasuhisa umano (1):
   usb: r8a66597: Fix initialization hub that using R8A66597_MAX_ROOT_HUB
 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] Fwd: Debian platform firmware strategy?

On 07/02/2014 11:33 AM, Chris Moore wrote:
 Hi Paul,
 
 I hope you don't mind my forwarding your message below to the U-Boot ML.
 I think U-Boot ML subscribers may be interested in this discussion.
 My apologies in advance if I am wrong.
 
 Cheers,
 Chris
 
  Message original 
 Sujet: Debian platform firmware strategy?
 Date de renvoi : Wed, 2 Jul 2014 02:24:53 + (UTC)
 De (renvoi) : debian-...@lists.debian.org
 Date : Wed, 2 Jul 2014 10:24:31 +0800
 De : Paul Wise p...@debian.org
 Pour : debian-...@lists.debian.org
 
 
 
 Hi all,
 
 Platform firmware is an odd beast in the world of software. It is
 mostly different per device. It is mostly proprietary and binary only.
 When it isn't proprietary, the code is probably not merged upstream.
 Sometimes it is very hard or impossible to update. It is very easy to
 brick a device with a firmware update. Some devices are unbrickable
 due to read-only secondary platform firmware chosen at boot time with
 a button or via USB. Updating/replacing the platform firmware could
 have unforeseen consequences (not being able to boot other OSes for
 eg).
 
 On x86 we ignore the platform firmware, don't package any libre
 firmware (i.e. coreboot) and chainload our own bootloaders before
 starting an OS.
 
 On ARM the platform firmware is way less standardised but is often
 u-boot. u-boot mainline is packaged and apparently has support for 6
 armel devices and 13 armhf devices. Other devices ship with either a
 locked proprietary bootloader (Android devices mostly), a forked
 u-boot or some other FOSS bootloader. Sometimes the device ships with
 older less capable versions of u-boot which complicate installation
 (extra boot partitions required etc).
 
 What should Debian's strategy/policy wrt platform firmware be?

It depends partially on where the firmware resides on the device.

Some boards have a separate flash device just for the firmware. For
example, all Tegra boards supported by mainline would fall into this
category, I think. (even when they boot from eMMC, the bootloader is in
the eMMC boot HW partition, not the main user data partition)

I would assert that for these systems, the user should be fully
responsible for installing the firmware. Installing firmware first as a
separate step is a pre-requisite to being able to plug in a bootable
installer disk/SD-card/..., and it would be nice to support installing
to ARM devices the same way as happens on x86 PCs where the HW makes
this possible.

At least for Tegra I've put a lot of effort into making the process of
installing mainline U-Boot easy. I assume other vendors do the same, or
could...

Other boards require at least some of the firmware to exist in a
filesystem and that filesystem is typically the same filesystem that is
used for the root filesystem (or at least is a partition on the same
storage device). Things like the Raspberry Pi and I think BeagleBone
etc. fall into this category.

For those systems, the OS (installer, packages, etc.) obviously has to
manage getting that firmware onto the media during installation or image
generation (or at least not trash any pre-created partition that
contains the firmware during installation). Whether any auto-updates
happen after that is an interesting issue.

 Currently it seems to be just leave the platform firmware alone and
 leave it up to the user to research if they can install libre
 firmware.
 
 I'm thinking we should promote using Free Software where possible and
 packaged versions of that Free Software where possible. Due to the
 possibility of unforeseeable circumstances, that promotion should
 probably only consist of a default-to-no suggestion to replace
 existing platform firmware if only intending to use Debian on the
 device.
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[U-Boot] Requesting a custodian tree for sunxi (Allwinner) maintenance

2014-07-02 Thread Ian Campbell

Hi,

Hans and I would like to propose the creation of a uboot-sunxi.git
custodian tree for things relating to the Allwinner platforms. It would
be a downstream of uboot-arm.git tree with responsibility for it shared
between us. This was previously mentioned on list[0] but we figured it
deserved it's own thread.

I have attached the public half of a fresh ssh key generated for this
purpose. Hans, you should follow up with yours.

Thanks,
Ian.
[0] http://lists.denx.de/pipermail/u-boot/2014-June/182701.html


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[U-Boot] [ANN] U-Boot v2014.07-rc4 released

2014-07-02 Thread Tom Rini

Hey all,

I've pushed v2014.07-rc4 out to the repository and tarballs should exist
soon.

So I think I've picked up most of the outstanding patches that are
bugfixes now.  I know there's still some FAT related changes to go pick
up (and I intend to shortly), and Albert should have one more PR for
u-boot-arm.

As always, if anything is broken please speak up.

Thanks all!

-- 
Tom


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Re: [U-Boot] [PATCH 1/3] i2c: tegra: use repeated start for reads

On 06/25/2014 10:57 AM, Stephen Warren wrote:
 From: Stephen Warren swar...@nvidia.com
 
 I2C read transactions are typically implemented as follows:
 
 START(write) address REPEATED_START(read) data... STOP
 
 However, Tegra's I2C driver currently implements reads as follows:
 
 START(write) address STOP START(read) data... STOP
 
 This sequence confuses at least the AS3722 PMIC on the Jetson TK1 board,
 leading to corrupted read data in some cases. Fix the driver to chain
 the transactions together using repeated starts to solve this.

Heiko, do these patches look good?
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Re: [U-Boot] [ANN] U-Boot v2014.07-rc4 released

2014-07-02 Thread Wolfgang Denk

Dear Tom,

In message 20140702180207.GD29202@bill-the-cat you wrote:
 
 I've pushed v2014.07-rc4 out to the repository and tarballs should exist
 soon.

Thanks.  Tarball is on FTP server.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH v5 1/4] mx6: Add support for the mx6solox variant

2014-07-02 Thread Fabio Estevam

Hi Stefano,

On Tue, Jun 24, 2014 at 5:40 PM, Fabio Estevam feste...@gmail.com wrote:
 From: Fabio Estevam fabio.este...@freescale.com

 mx6solox is the newest member of the mx6 family.

 Some of the new features on this variants are:
 - Cortex M4 microcontroller (besides the CortexA9)
 - Dual Gigabit Ethernet

 Add the initial support for it.

 Signed-off-by: Fabio Estevam fabio.este...@freescale.com

Any comments about this series?
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[U-Boot] [PATCH] ARM: tegra: Use mem size from MC rather than ODMDATA

From: Stephen Warren swar...@nvidia.com

In at least Tegra124, the Tegra memory controller (MC) has a register
that controls the memory size. Read this to determine the memory size
rather than requiring this to be redundantly encoded into the ODMDATA.
This way, changes to the BCT (i.e. MC configuration) automatically
updated SW's view of the memory size, without requiring manual changes
to the ODMDATA.

Future work potentially required:
* Clip the memory size to architectural limits; U-Boot probably doesn't
  and won't support either LPAE or Tegra's swiss cheese memory layout,
  at least one of which would be required for 2GB RAM.
* Subtract out any carveout required by firmware on future SoCs.

Based-on-work-by: Tom Warren twar...@nvidia.com
Signed-off-by: Stephen Warren swar...@nvidia.com
---
Note: this patch depends on Bryan's/Alex's ARM: tegra: Disable VPR,
since that introduces mc.h, which this patch relies on.
---
 arch/arm/cpu/tegra-common/board.c | 18 +-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/tegra-common/board.c 
b/arch/arm/cpu/tegra-common/board.c
index 6a6faf4b2760..433da09d10c2 100644
--- a/arch/arm/cpu/tegra-common/board.c
+++ b/arch/arm/cpu/tegra-common/board.c
@@ -27,11 +27,12 @@ enum {
UART_COUNT = 5,
 };
 
+#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \
+   defined(CONFIG_TEGRA114)
 /*
  * Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0,
  * so we are using this value to identify memory size.
  */
-
 unsigned int query_sdram_size(void)
 {
struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
@@ -72,6 +73,21 @@ unsigned int query_sdram_size(void)
}
 #endif
 }
+#else
+#include asm/arch/mc.h
+
+/* Read the RAM size directly from the memory controller */
+unsigned int query_sdram_size(void)
+{
+   struct mc_ctlr *const mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+   u32 size_mb;
+
+   size_mb = readl(mc-mc_emem_cfg);
+   debug(mc-mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n, size_mb);
+
+   return size_mb * 1024 * 1024;
+}
+#endif
 
 int dram_init(void)
 {
-- 
1.8.1.5

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[U-Boot] Pull request: u-boot-arm/master

2014-07-02 Thread Albert ARIBAUD

Hi Tom,

The following changes since commit
ba9b42c81b0734d53edfbb1fe4a6ded7de78c5ab:

  Merge branch 'sandbox' of git://git.denx.de/u-boot-x86 (2014-06-24
  14:06:22 -0400)

are available in the git repository at:


  git://git.denx.de/u-boot-arm master

for you to fetch changes up to 304f936aeaab0c3cc9d5af438fd3498ac7682991:

  Merge remote-tracking branch 'u-boot-samsung/master' (2014-07-01
  20:52:51 +0200)



Akshay Saraswat (9):
  Exynos5: DMC: Modify the definition of ddr3_mem_ctrl_init
  Exynos5420: Remove code for enabling read leveling
  Exynos5420: DMC: Add software read leveling
  Exynos: SPI: Fix reading data from SPI flash
  Exynos5420: Let macros be used for exynos5420
  Exynos5420: Introduce support for the Peach-Pit board
  Exynos5: Config: Place environment at the end of SPI flash
  Exynos5: Config: Increase SPL footprint for Exynos5420
  Exynos5: Config: Enable USB boot mode for all Exynos5 SoCs

Albert ARIBAUD (8):
  Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'
  Merge branch 'u-boot/master' into 'u-boot-arm/master'
  Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'
  Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'
  Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
  Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
  Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
  Merge remote-tracking branch 'u-boot-samsung/master'

Alison Wang (2):
  arm: vf610: Add QSPI driver support
  arm: imx: Add two macros for VF610 in IOMUX_PAD structure

Andreas Bießmann (2):
  avr32: migrate cache functions
  macb: make checkpatch clean

Ash Charles (3):
  omap: Don't enable GPMC CS0 with nothing attached
  omap4: duovero: Correct name of default device tree
  omap3: overo: Select fdtfile for expansion board

Axel Lin (1):
  spi: davinci: Fix register address for SPI1_BUS

Chao Fu (1):
  arm: vf610: Add QSPI support for VF610TWR

Doug Anderson (1):
  DMC: exynos5420: Gate CLKM to when reading PHY_CON13

Eric Nelson (1):
  serial_mxc: disable new features of autobaud detection

Fabio Estevam (10):
  mx6sabreauto: Add the mx6dual-lite variant
  mx6sabred: Add PFUZE100 PMIC support
  mx25pdk: Add generic board support
  mx6: Fix definition of IOMUXC_GPR12_DEVICE_TYPE_RC
  embestmx6boards: Fix CONFIG_CONSOLE_DEV
  embestmx6boards: Fix the dtb file name for riotboard
  mx28evk: Fix warning when CONFIG_ENV_IS_IN_SPI_FLASH is selected
  mx28evk: Add a target for SPI NOR boot
  mx28evk: Add documentation on how to boot from SPI NOR
  mx25pdk: Remove CONFIG_SYS_GENERIC_BOARD

Felipe Balbi (5):
  board: ti: am43xx: print unsupported board name
  cpu: armv7: am33x: ddr: write emif ref_ctrl_shadow register
  board: ti: am43xx: add support for AM43xx Starter Kit
  board: ti: am43xx: add AM437x SK PHY Address
  board: ti: am43xx: enable QSPI and Gbit Ethernet on AM437x SK

Jeroen Hofstee (4):
  tegra20: display: fix checking of return value
  ARM: tegra: fix include guard
  omap3: board: trivial: add void for no args
  PMIC: MAX77686: fix invalid bus check

Khoronzhuk, Ivan (2):
  mtd: nand: davinci: add header file for driver definitions
  ARM: keystone: aemif: move aemif driver to
drivers/memory/ti-aemif.c

Marek Vasut (1):
  arm: mx5: Enable CONFIG_SYS_GENERIC_BOARD on M53EVK

Mark Rutland (1):
  arm64: zero cntvoff_el2

Masahiro Yamada (3):
  spl: consolidate arch/arm/include/asm/arch-*/spl.h
  arm: fix a double-definition error of _start symbol
  arm: zynq: fix a bug in Zynq linker script

Michael Pratt (1):
  Exynos: Split 5250 and 5420 memory bank configuration

Minkyu Kang (1):
  Revert exynos: Enable PSHOLD in SPL

Nobuhiro Iwamatsu (2):
  arm: rmobile: koelsch: Remove NOR-Flash support from boards.cfg
  arm: rmobile: lager: Remove NOR-Flash support from boards.cfg

Przemyslaw Marczak (2):
  trats/trats2: exynos_power_init: return 0 if no battery detected.
  Samsung: Goni: change maintainer to Robert Baldyga

Shawn Guo (1):
  mx6: drop ARM errata 742230

Stefano Babic (4):
  MX25: fix build due to missing sys_proto.h
  imx: correct HAB status for new chip TO
  OMAP: disable gpmc timeout safely for reenabling
  vf610: fix build due to missing sys_proto.h

Stephen Warren (2):
  ARM: tegra: fix extlinux.conf search location
  ARM: tegra: set initrd_high so boot scripts work

Steve Rae (1):
  arm: bcm281xx: Add CONFIG_SYS_GENERIC_BOARD

Tim Harvey (12):
  spl: nand: add support for mxs nand
  mx6: add common SPL configuration
  mx6: add boot device support for SPL
  imx: add comments and remove unused struct fields
  mx6: add structs for mmdc and ddr iomux registers
  mx6: add mmdc configuration

[U-Boot] [U-boot] [Patch 0/3] Add support for NAND U-boot image upgrade

This series adds opportunity to write U-boot image on AEMIF NAND device
using standard nand u-boot commands. Also added script to automate this
process.

This series is logical continue of
[U-boot] [Patch v3 0/3] keystone: nand: add additional nand ecclayout
series (http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/189378).

For more informations see:
http://www.ti.com/lit/ug/spruhj3/spruhj3.pdf

Based on u-boot-ti.git master

Ivan Khoronzhuk (3):
  mtd: nand: davinci: add opportunity to write keystone U-boot image
  keystone: add support for NAND gpheader image
  k2hk_evm: add script to automate NAND flash process

 Makefile|   6 ++
 board/ti/k2hk_evm/README|  27 +-
 drivers/mtd/nand/davinci_nand.c | 196 
 include/configs/k2hk_evm.h  |   8 +-
 4 files changed, 234 insertions(+), 3 deletions(-)

-- 
1.8.3.2

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[U-Boot] [U-boot] [Patch 1/3] mtd: nand: davinci: add opportunity to write keystone U-boot image

The Keystone SoCs use the same NAND driver as Davinci.
This patch adds opportunity to write Keystone U-boot image to NAND
device using appropriate RBL ECC layout. This is needed only if RBL
boots U-boot from NAND device and that's supposed that raw u-boot
partition is used only for writing image.

The main problem is that default Davinci ECC layout is different from
Keystone RBL layout. To read U-boot image the RBL needs that image was
written using RBL ECC layout.

The BBT table is written using default Davinci layout and has to
be updated using one. The BBT can be updated only while erasing
chip or by forced bad block assigning, so erase function has to
use native ecc layout in order to be able to write BBT correctly.
So if we're writing to NAND U-boot address we use RBL layout for
others we use default ECC layout.

Also remove definition for CONFIG_CMD_NAND_ECCLAYOUT as there is no
reasons to use ECC layout commands. It was added by mistake.

Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 drivers/mtd/nand/davinci_nand.c | 196 
 include/configs/k2hk_evm.h  |   4 +-
 2 files changed, 199 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 5d42509..a079b1e 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -305,6 +305,189 @@ static struct nand_ecclayout 
nand_davinci_4bit_layout_oobfirst = {
 #endif
 };
 
+#if defined CONFIG_KEYSTONE_RBL_NAND
+#if defined(CONFIG_SYS_NAND_PAGE_2K)
+static struct nand_ecclayout nand_keystone_rbl_4bit_layout_oobfirst = {
+   .eccbytes = 40,
+   .eccpos = {
+   6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+   22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+   38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+   54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+   },
+   .oobfree = {
+   {.offset = 2, .length = 4, },
+   {.offset = 16, .length = 6, },
+   {.offset = 32, .length = 6, },
+   {.offset = 48, .length = 6, },
+   },
+#elif defined(CONFIG_SYS_NAND_PAGE_4K)
+   .eccbytes = 80,
+   .eccpos = {
+   6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+   22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+   38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+   54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+   70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
+   86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
+   102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
+   118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
+   },
+   .oobfree = {
+   {.offset = 2, .length = 4, },
+   {.offset = 16, .length = 6, },
+   {.offset = 32, .length = 6, },
+   {.offset = 48, .length = 6, },
+   {.offset = 64, .length = 6, },
+   {.offset = 80, .length = 6, },
+   {.offset = 96, .length = 6, },
+   {.offset = 112, .length = 6, },
+   },
+#endif
+};
+
+#ifdef CONFIG_SYS_NAND_PAGE_2K
+#define CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE  
CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE  11
+#elif defined(CONFIG_SYS_NAND_PAGE_4K)
+#define CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE  
CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE  12
+#endif
+
+/**
+ * nand_davinci_write_page - write one page
+ * @mtd: MTD device structure
+ * @chip: NAND chip descriptor
+ * @buf: the data to write
+ * @oob_required: must write chip-oob_poi to OOB
+ * @page: page number to write
+ * @cached: cached programming
+ * @raw: use _raw version of write_page
+ */
+static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip 
*chip,
+  const uint8_t *buf, int oob_required,
+  int page, int cached, int raw)
+{
+   int status;
+   int ret = 0;
+   struct nand_ecclayout *saved_ecc_layout;
+
+   /* save current ECC layout and assign Keystone RBL ECC layout */
+   if (page  CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) {
+   saved_ecc_layout = chip-ecc.layout;
+   chip-ecc.layout = nand_keystone_rbl_4bit_layout_oobfirst;
+   mtd-oobavail = chip-ecc.layout-oobavail;
+   }
+
+   chip-cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
+
+   if (unlikely(raw))
+   status = chip-ecc.write_page_raw(mtd, chip, buf, oob_required);
+   else
+   status = chip-ecc.write_page(mtd, chip, buf, oob_required);
+
+   if (status  0) {
+   ret = status;
+   goto err;
+   }
+
+   chip-cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
+   status = chip-waitfunc(mtd, chip);
+
+   /*
+* See if operation failed and additional status checks are
+* available.
+*/
+   if ((status  NAND_STATUS_FAIL)  (chip-errstat))
+   status = chip-errstat(mtd, chip, FL_WRITING, status, page);
+
+

[U-Boot] [U-boot] [Patch 3/3] k2hk_evm: add script to automate NAND flash process

Add script to automate NAND flash process. As for now the board has
two burn scripts - burn to boot from SPI NOR flash and burn to boot
from AEMIF NAND flash, rename burn_uboot script to burn_uboot_spi.
Also update README to contain NAND burn U-boot process description.

Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 board/ti/k2hk_evm/README   | 27 ++-
 include/configs/k2hk_evm.h |  4 +++-
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/board/ti/k2hk_evm/README b/board/ti/k2hk_evm/README
index bfeb05b..1da721c 100644
--- a/board/ti/k2hk_evm/README
+++ b/board/ti/k2hk_evm/README
@@ -43,6 +43,7 @@ Supported image formats:-
  - u-boot.bin: for loading and running u-boot.bin through Texas instruments
code composure studio (CCS)
  - u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
+ - u-boot-nand.gph: gpimage for programming AEMIF NAND flash for NAND boot
 
 Build instructions:
 ===
@@ -55,6 +56,10 @@ To build u-boot-spi.gph
   make k2hk_evm_config
   make u-boot-spi.gph
 
+To build u-boot-nand.gph
+  make k2hk_evm_config
+  make u-boot-nand.gph
+
 Load and Run U-Boot on K2HK EVM using CCS
 =
 
@@ -115,8 +120,28 @@ instructions:-
 5. At the U-Boot console type following to setup u-boot environment variables.
setenv addr_uboot 0x8700
setenv filesize size in hex of u-boot-spi.gph rounded to hex 0x1
-   run burn_uboot
+   run burn_uboot_spi
Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
to SPI Little Endian Boot mode as per instruction at
http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup.
 6. Power ON the EVM. The EVM now boots with u-boot image on the NOR flash.
+
+AEMIF NAND Flash programming instructions
+==
+U-Boot image can be flashed to first 1024KB of the NAND flash using following
+instructions:-
+
+1. Start CCS and run U-boot as described above.
+2. Suspend Target. Select Run - Suspend from top level menu
+   CortexA15_1 (Free Running)
+3. Load u-boot-nand.gph binary from build folder on to DDR address 0x8700
+   through CCS as described in step 2 of Load and Run U-Boot on K2HK EVM
+   using CCS, but using address 0x8700.
+4. Free Run the target as desribed earlier (step 4) to get u-boot prompt
+5. At the U-Boot console type following to setup u-boot environment variables.
+   setenv filesize size in hex of u-boot-nand.gph rounded to hex 0x1
+   run burn_uboot_nand
+   Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
+   to ARM NAND Boot mode as per instruction at
+   http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup.
+6. Power ON the EVM. The EVM now boots with u-boot image on the NAND flash.
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index 3f87741..95ca56e 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -221,8 +221,10 @@
get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0   \
get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0   \
get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0 \
-   burn_uboot=sf probe; sf erase 0 0x10; \
+   burn_uboot_spi=sf probe; sf erase 0 0x10; 
\
sf write ${addr_uboot} 0 ${filesize}\0\
+   burn_uboot_nand=nand erase 0 0x10;\
+   nand write ${addr_uboot} 0 ${filesize}\0  \
args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0  \
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs \
root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,2048\0   \
-- 
1.8.3.2

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[U-Boot] [U-boot] [Patch 2/3] keystone: add support for NAND gpheader image

Add support for NAND gpheader image. TI Keystone2 ROM bootloader
expects 8 bytes of trailing zeroes in the nand u-boot image.
So add zeros at the end of the nand gph image.

Acked-by: Murali Karicheri m-kariche...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
 Makefile | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/Makefile b/Makefile
index 966fd14..76a712e 100644
--- a/Makefile
+++ b/Makefile
@@ -937,6 +937,12 @@ OBJCOPYFLAGS_u-boot-spi.gph = -I binary -O binary 
--pad-to=$(CONFIG_SPL_PAD_TO)
 u-boot-spi.gph: spl/u-boot-spl.gph u-boot.img FORCE
$(call if_changed,pad_cat)
 
+MKIMAGEFLAGS_u-boot-nand.gph = -A $(ARCH) -T gpimage -C none \
+   -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -n U-Boot
+u-boot-nand.gph: u-boot.bin FORCE
+   $(call if_changed,mkimage)
+   @dd if=/dev/zero bs=8 count=1 2/dev/null  $@
+
 ifneq ($(CONFIG_SUNXI),)
 OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
   --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
-- 
1.8.3.2

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Re: [U-Boot] [PATCH] ARM: tegra: Use mem size from MC rather than ODMDATA

2014-07-02 Thread Wolfgang Denk

Dear Stephen Warren,

In message 1404331950-4916-1-git-send-email-swar...@wwwdotorg.org you wrote:
 
 In at least Tegra124, the Tegra memory controller (MC) has a register
 that controls the memory size. Read this to determine the memory size
 rather than requiring this to be redundantly encoded into the ODMDATA.
 This way, changes to the BCT (i.e. MC configuration) automatically
 updated SW's view of the memory size, without requiring manual changes
 to the ODMDATA.

Is there a specific reason for not using get_ram_size()?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Microsoft Compatibility:
 your old Windows 3.11 application crash exactly as the new ones.
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Re: [U-Boot] [PATCH] ARM: tegra: Use mem size from MC rather than ODMDATA

On 07/02/2014 03:18 PM, Wolfgang Denk wrote:
 Dear Stephen Warren,
 
 In message 1404331950-4916-1-git-send-email-swar...@wwwdotorg.org you wrote:

 In at least Tegra124, the Tegra memory controller (MC) has a register
 that controls the memory size. Read this to determine the memory size
 rather than requiring this to be redundantly encoded into the ODMDATA.
 This way, changes to the BCT (i.e. MC configuration) automatically
 updated SW's view of the memory size, without requiring manual changes
 to the ODMDATA.
 
 Is there a specific reason for not using get_ram_size()?

Since we know the exact RAM size, we may as well simply use it directly
rather than probing for it.

I know that if non-existent peripheral addresses are accessed by the
CPU, the CPU or some bus hangs. I'm not sure if the same applies to
addresses within the memory window where there is not actually RAM
present on a particular board, but I'd rather not risk it by touching
them during probing.

BTW, I'm out on vacation starting tomorrow, so may not respond soon.
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Re: [U-Boot] Pull request: u-boot-arm/master

2014-07-02 Thread Tom Rini

On Wed, Jul 02, 2014 at 10:33:16PM +0200, Albert ARIBAUD wrote:

 Hi Tom,
 
 The following changes since commit
 ba9b42c81b0734d53edfbb1fe4a6ded7de78c5ab:
 
   Merge branch 'sandbox' of git://git.denx.de/u-boot-x86 (2014-06-24
   14:06:22 -0400)
 
 are available in the git repository at:
 
 
   git://git.denx.de/u-boot-arm master
 
 for you to fetch changes up to 304f936aeaab0c3cc9d5af438fd3498ac7682991:
 
   Merge remote-tracking branch 'u-boot-samsung/master' (2014-07-01
   20:52:51 +0200)
 
 
 
 Akshay Saraswat (9):
   Exynos5: DMC: Modify the definition of ddr3_mem_ctrl_init
   Exynos5420: Remove code for enabling read leveling
   Exynos5420: DMC: Add software read leveling
   Exynos: SPI: Fix reading data from SPI flash
   Exynos5420: Let macros be used for exynos5420
   Exynos5420: Introduce support for the Peach-Pit board
   Exynos5: Config: Place environment at the end of SPI flash
   Exynos5: Config: Increase SPL footprint for Exynos5420
   Exynos5: Config: Enable USB boot mode for all Exynos5 SoCs
 
 Albert ARIBAUD (8):
   Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'
   Merge branch 'u-boot/master' into 'u-boot-arm/master'
   Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'
   Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'
   Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
   Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
   Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
   Merge remote-tracking branch 'u-boot-samsung/master'
 
 Alison Wang (2):
   arm: vf610: Add QSPI driver support
   arm: imx: Add two macros for VF610 in IOMUX_PAD structure
 
 Andreas Bießmann (2):
   avr32: migrate cache functions
   macb: make checkpatch clean
 
 Ash Charles (3):
   omap: Don't enable GPMC CS0 with nothing attached
   omap4: duovero: Correct name of default device tree
   omap3: overo: Select fdtfile for expansion board
 
 Axel Lin (1):
   spi: davinci: Fix register address for SPI1_BUS
 
 Chao Fu (1):
   arm: vf610: Add QSPI support for VF610TWR
 
 Doug Anderson (1):
   DMC: exynos5420: Gate CLKM to when reading PHY_CON13
 
 Eric Nelson (1):
   serial_mxc: disable new features of autobaud detection
 
 Fabio Estevam (10):
   mx6sabreauto: Add the mx6dual-lite variant
   mx6sabred: Add PFUZE100 PMIC support
   mx25pdk: Add generic board support
   mx6: Fix definition of IOMUXC_GPR12_DEVICE_TYPE_RC
   embestmx6boards: Fix CONFIG_CONSOLE_DEV
   embestmx6boards: Fix the dtb file name for riotboard
   mx28evk: Fix warning when CONFIG_ENV_IS_IN_SPI_FLASH is selected
   mx28evk: Add a target for SPI NOR boot
   mx28evk: Add documentation on how to boot from SPI NOR
   mx25pdk: Remove CONFIG_SYS_GENERIC_BOARD
 
 Felipe Balbi (5):
   board: ti: am43xx: print unsupported board name
   cpu: armv7: am33x: ddr: write emif ref_ctrl_shadow register
   board: ti: am43xx: add support for AM43xx Starter Kit
   board: ti: am43xx: add AM437x SK PHY Address
   board: ti: am43xx: enable QSPI and Gbit Ethernet on AM437x SK
 
 Jeroen Hofstee (4):
   tegra20: display: fix checking of return value
   ARM: tegra: fix include guard
   omap3: board: trivial: add void for no args
   PMIC: MAX77686: fix invalid bus check
 
 Khoronzhuk, Ivan (2):
   mtd: nand: davinci: add header file for driver definitions
   ARM: keystone: aemif: move aemif driver to
 drivers/memory/ti-aemif.c
 
 Marek Vasut (1):
   arm: mx5: Enable CONFIG_SYS_GENERIC_BOARD on M53EVK
 
 Mark Rutland (1):
   arm64: zero cntvoff_el2
 
 Masahiro Yamada (3):
   spl: consolidate arch/arm/include/asm/arch-*/spl.h
   arm: fix a double-definition error of _start symbol
   arm: zynq: fix a bug in Zynq linker script
 
 Michael Pratt (1):
   Exynos: Split 5250 and 5420 memory bank configuration
 
 Minkyu Kang (1):
   Revert exynos: Enable PSHOLD in SPL
 
 Nobuhiro Iwamatsu (2):
   arm: rmobile: koelsch: Remove NOR-Flash support from boards.cfg
   arm: rmobile: lager: Remove NOR-Flash support from boards.cfg
 
 Przemyslaw Marczak (2):
   trats/trats2: exynos_power_init: return 0 if no battery detected.
   Samsung: Goni: change maintainer to Robert Baldyga
 
 Shawn Guo (1):
   mx6: drop ARM errata 742230
 
 Stefano Babic (4):
   MX25: fix build due to missing sys_proto.h
   imx: correct HAB status for new chip TO
   OMAP: disable gpmc timeout safely for reenabling
   vf610: fix build due to missing sys_proto.h
 
 Stephen Warren (2):
   ARM: tegra: fix extlinux.conf search location
   ARM: tegra: set initrd_high so boot scripts work
 
 Steve Rae (1):
   arm: bcm281xx: Add CONFIG_SYS_GENERIC_BOARD
 
 Tim Harvey (12):
   spl: nand: add support for mxs nand
   mx6: add common

Re: [U-Boot] SPL broken on i.mx31 platforms

2014-07-02 Thread Benoît Thébaudeau

)Dear Helmut Raiger,

On Wed, Jul 2, 2014 at 9:04 AM, Helmut Raiger helmut.rai...@hale.at wrote:
  the commit 41623c91 breaks the SPL on i.mx31 platforms.

Here, you are talking about mx31pdk, right?

 The original startup code (start.S) was position independent to
 allow relocation in board_init_f. This is necessary as the internal
 RAM used by the IPL to load the first 2kB from NAND is also
 used by the NAND controller to buffer pages.
 As far as the issue goes: where and how exactly is the code not
 position independent now?

 The first statement is now:

 ldr pc, _reset
 _reset: .word reset

 reset is an address generated by the linker (here 0x87dc0060).
 Originally this was:

 b reset

 which is a relative branch (here 0x60 bytes forward).
 I have to add, that changing this back does not fix the issue, something
 else is in disorder.
 I'm still working on it.

Do you mean reverting this commit, or only these two lines? In the
former case, where does bisect lead to, and in the latter case, have
you checked the assembler code in the linked SPL for this branch?

 Does changing the startup code back to PIC generate any
 drawbacks on other ARM platforms?

 How would this changing back to PIC be implemented? Not by reverting
 the patch, I hope.

 No, it will only be a minor change, I think, but I thought there might
 have been an additional intention behind the change to position
 dependent code. One could link the first part to 0xB800
 (the original position of the SPL when loaded by the IPL) and
 the part after the relocation to CONFIG_SPL_TEXT_BASE.

Actually, the ROM bootloader first copies the first NAND page to
0xB800. Then, the SPL placed here but linked at
CONFIG_SPL_TEXT_BASE copies itself to CONFIG_SPL_TEXT_BASE in order to
free the NFC buffer so that it can be used by the SPL. There is no
relocation going on at this stage, but only a copy, and the SPL code
size is limited to 2 kiB. Then, the SPL does its NAND load job towards
CONFIG_SYS_TEXT_BASE and starts executing the non-SPL binary, which
then relocates itself according to the heap size, etc.

Hence, as you said the code launching board_init_f() must be either
PIC or linked at 0xB800, and the rest of the SPL code must be
either PIC or linked at CONFIG_SPL_TEXT_BASE. So the fact that this
commit breaks the PICness of the initial branch is indeed an issue.

As a test, can you try to replace the 2 _reset lines in vectors.S with
b _reset after _start:, and a _reset: label at the end of the
file? This assumes that start.S starts with the reset: label, and
that the start.o .text sections are placed right after the .vectors
section in the SPL linker script, both being true for mx31pdk.

Best regards,
Benoît
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[U-Boot] [PATCH 2/4] serial: sh: Add support R8A7794

This adds the preset value to register for R8A7794.

Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
 drivers/serial/serial_sh.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index f5e9854..341997c 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -226,7 +226,8 @@ struct uart_port {
 # define SCSPTR3 0xffc60020/* 16 bit SCIF */
 # define SCIF_ORER 0x0001  /* Overrun error bit */
 # define SCSCR_INIT(port)  0x38/* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+   defined(CONFIG_R8A7794)
 # define SCIF_ORER 0x0001
 # define SCSCR_INIT(port)  0x32/* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
 #else
-- 
2.0.0

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[U-Boot] [PATCH 4/4] arm: rmobile: Add support Alt board

The alt board has R8A7794, 1GB DDR3-SDRAM, USB, Ethernet, QSPI,
MMC, SDHI and more.

This commit supports the following functions:
 - DDR3-SDRAM
 - SCIF
 - I2C
 - Ethernet
 - QSPI

Signed-off-by: Hisashi Nakamura hisashi.nakamura...@renesas.com
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
 board/renesas/alt/Makefile |   9 +
 board/renesas/alt/alt.c| 173 +
 board/renesas/alt/qos.c| 944 +
 board/renesas/alt/qos.h|  12 +
 boards.cfg |   1 +
 include/configs/alt.h  | 166 
 6 files changed, 1305 insertions(+)
 create mode 100644 board/renesas/alt/Makefile
 create mode 100644 board/renesas/alt/alt.c
 create mode 100644 board/renesas/alt/qos.c
 create mode 100644 board/renesas/alt/qos.h
 create mode 100644 include/configs/alt.h

diff --git a/board/renesas/alt/Makefile b/board/renesas/alt/Makefile
new file mode 100644
index 000..9ed12bd
--- /dev/null
+++ b/board/renesas/alt/Makefile
@@ -0,0 +1,9 @@
+#
+# board/renesas/alt/Makefile
+#
+# Copyright (C) 2014 Renesas Electronics Corporation
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+obj-y  := alt.o qos.o
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
new file mode 100644
index 000..9d8e8f9
--- /dev/null
+++ b/board/renesas/alt/alt.c
@@ -0,0 +1,173 @@
+/*
+ * board/renesas/alt/alt.c
+ *
+ * Copyright (C) 2014 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include common.h
+#include malloc.h
+#include asm/processor.h
+#include asm/mach-types.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/arch/sys_proto.h
+#include asm/gpio.h
+#include asm/arch/rmobile.h
+#include netdev.h
+#include miiphy.h
+#include i2c.h
+#include div64.h
+#include qos.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CLK2MHZ(clk)   (clk / 1000 / 1000)
+void s_init(void)
+{
+   struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
+   struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
+
+   /* Watchdog init */
+   writel(0xA5A5A500, rwdt-rwtcsra);
+   writel(0xA5A5A500, swdt-swtcsra);
+
+   /* QoS */
+   qos_init();
+}
+
+#define MSTPSR10xE6150038
+#define SMSTPCR1   0xE6150134
+#define TMU0_MSTP125   (1  25)
+
+#define MSTPSR70xE61501C4
+#define SMSTPCR7   0xE615014C
+#define SCIF0_MSTP719  (1  19)
+
+#define MSTPSR80xE61509A0
+#define SMSTPCR8   0xE6150990
+#define ETHER_MSTP813  (1  13)
+
+#define mstp_setbits(type, addr, saddr, set) \
+   out_##type((saddr), in_##type(addr) | (set))
+#define mstp_clrbits(type, addr, saddr, clear) \
+   out_##type((saddr), in_##type(addr)  ~(clear))
+#define mstp_setbits_le32(addr, saddr, set) \
+   mstp_setbits(le32, addr, saddr, set)
+#define mstp_clrbits_le32(addr, saddr, clear)   \
+   mstp_clrbits(le32, addr, saddr, clear)
+
+int board_early_init_f(void)
+{
+   /* TMU */
+   mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
+
+   /* SCIF0 */
+   mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP719);
+
+   /* ETHER */
+   mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813);
+
+   return 0;
+}
+
+void arch_preboot_os(void)
+{
+   /* Disable TMU0 */
+   mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
+}
+
+int board_init(void)
+{
+   /* adress of boot parameters */
+   gd-bd-bi_boot_params = ALT_SDRAM_BASE + 0x100;
+
+   /* Init PFC controller */
+   r8a7794_pinmux_init();
+
+   /* Ether Enable */
+   gpio_request(GPIO_FN_ETH_CRS_DV, NULL);
+   gpio_request(GPIO_FN_ETH_RX_ER, NULL);
+   gpio_request(GPIO_FN_ETH_RXD0, NULL);
+   gpio_request(GPIO_FN_ETH_RXD1, NULL);
+   gpio_request(GPIO_FN_ETH_LINK, NULL);
+   gpio_request(GPIO_FN_ETH_REFCLK, NULL);
+   gpio_request(GPIO_FN_ETH_MDIO, NULL);
+   gpio_request(GPIO_FN_ETH_TXD1, NULL);
+   gpio_request(GPIO_FN_ETH_TX_EN, NULL);
+   gpio_request(GPIO_FN_ETH_MAGIC, NULL);
+   gpio_request(GPIO_FN_ETH_TXD0, NULL);
+   gpio_request(GPIO_FN_ETH_MDC, NULL);
+   gpio_request(GPIO_FN_IRQ8, NULL);
+
+   /* PHY reset */
+   gpio_request(GPIO_GP_1_24, NULL);
+   gpio_direction_output(GPIO_GP_1_24, 0);
+   mdelay(20);
+   gpio_set_value(GPIO_GP_1_24, 1);
+   udelay(1);
+
+   return 0;
+}
+
+#define CXR24 0xEE7003C0 /* MAC address high register */
+#define CXR25 0xEE7003C8 /* MAC address low register */
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_SH_ETHER
+   int ret = -ENODEV;
+   u32 val;
+   unsigned char enetaddr[6];
+
+   ret = sh_eth_initialize(bis);
+   if (!eth_getenv_enetaddr(ethaddr, enetaddr))
+   return ret;
+
+   /* Set Mac address */
+   val = enetaddr[0]  24 | enetaddr[1]  16 |
+   enetaddr[2]  8 | enetaddr[3];
+   writel(val, CXR24);
+
+   val = enetaddr[4]  8 | enetaddr[5];
+   writel(val, CXR25);
+
+   return ret;

[U-Boot] [PATCH 0/4] Add support Alt board of Renesas R-Car

This patch series supports ARM SoC R8A7794 and Alt board of Renesas R-Car.
This board has R8A7794 (R-Car E2) is the ARM cortex A9 SoCs of Renesas,
and this patch has the following devices of board.

 - DDR3-SDRAM
 - SCIF (Serial console)
 - I2C 
 - Ethernet
 - QSPI

Nobuhiro Iwamatsu (4):
  net: sh-eth: Add support R8A7794
  serial: sh: Add support R8A7794
  arm: rmobile: Add support R8A7794
  arm: rmobile: Add support Alt board

 arch/arm/cpu/armv7/rmobile/Makefile  |1 +
 arch/arm/cpu/armv7/rmobile/cpu_info.c|1 +
 arch/arm/cpu/armv7/rmobile/pfc-r8a7794.c | 1513 ++
 arch/arm/include/asm/arch-rmobile/gpio.h |3 +
 arch/arm/include/asm/arch-rmobile/r8a7794-gpio.h |  176 +++
 arch/arm/include/asm/arch-rmobile/r8a7794.h  |   14 +
 arch/arm/include/asm/arch-rmobile/rcar-base.h|4 +-
 arch/arm/include/asm/arch-rmobile/rmobile.h  |2 +
 board/renesas/alt/Makefile   |9 +
 board/renesas/alt/alt.c  |  173 +++
 board/renesas/alt/qos.c  |  944 ++
 board/renesas/alt/qos.h  |   12 +
 boards.cfg   |1 +
 drivers/net/sh_eth.c |5 +-
 drivers/net/sh_eth.h |6 +-
 drivers/serial/serial_sh.h   |3 +-
 include/configs/alt.h|  166 +++
 17 files changed, 3026 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/rmobile/pfc-r8a7794.c
 create mode 100644 arch/arm/include/asm/arch-rmobile/r8a7794-gpio.h
 create mode 100644 arch/arm/include/asm/arch-rmobile/r8a7794.h
 create mode 100644 board/renesas/alt/Makefile
 create mode 100644 board/renesas/alt/alt.c
 create mode 100644 board/renesas/alt/qos.c
 create mode 100644 board/renesas/alt/qos.h
 create mode 100644 include/configs/alt.h

-- 
2.0.0

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[U-Boot] [PATCH 1/4] net: sh-eth: Add support R8A7794

R8A7794 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7794.

Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
 drivers/net/sh_eth.c | 5 +++--
 drivers/net/sh_eth.h | 6 --
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 5e132f2..eb2af68 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -410,7 +410,8 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 
 #if defined(CONFIG_CPU_SH7734) || defined(CONFIG_R8A7740)
sh_eth_write(eth, CONFIG_SH_ETHER_SH7734_MII, RMII_MII);
-#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+   defined(CONFIG_R8A7794)
sh_eth_write(eth, sh_eth_read(eth, RMIIMR) | 0x1, RMIIMR);
 #endif
/* Configure phy */
@@ -436,7 +437,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 #elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
sh_eth_write(eth, 1, RTRATE);
 #elif defined(CONFIG_CPU_SH7724) || defined(CONFIG_R8A7790) || \
-   defined(CONFIG_R8A7791)
+   defined(CONFIG_R8A7791) || defined(CONFIG_R8A7794)
val = ECMR_RTM;
 #endif
} else if (phy-speed == 10) {
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 331c07c..5b513b0 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -303,7 +303,8 @@ static const u16 
sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
 #elif defined(CONFIG_R8A7740)
 #define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xE9A0
-#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+   defined(CONFIG_R8A7794)
 #define SH_ETH_TYPE_ETHER
 #define BASE_IO_ADDR   0xEE700200
 #endif
@@ -511,7 +512,8 @@ enum FELIC_MODE_BIT {
ECMR_PRM = 0x0001,
 #ifdef CONFIG_CPU_SH7724
ECMR_RTM = 0x0010,
-#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+   defined(CONFIG_R8A7794)
ECMR_RTM = 0x0004,
 #endif
 
-- 
2.0.0

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Re: [U-Boot] [PATCH 1/3] i2c: tegra: use repeated start for reads

2014-07-02 Thread Heiko Schocher


Hello Stephen,

Am 02.07.2014 20:37, schrieb Stephen Warren:

On 06/25/2014 10:57 AM, Stephen Warren wrote:

From: Stephen Warrenswar...@nvidia.com

I2C read transactions are typically implemented as follows:

START(write) address REPEATED_START(read) data... STOP

However, Tegra's I2C driver currently implements reads as follows:

START(write) address STOP START(read) data... STOP

This sequence confuses at least the AS3722 PMIC on the Jetson TK1 board,
leading to corrupted read data in some cases. Fix the driver to chain
the transactions together using repeated starts to solve this.


Heiko, do these patches look good?


Yes, they look good to me... Hmm.. as you ask, I think you want to have
them in v2014.07 ? As it is a bugfix it should go into it, but as it
also changes the behaviour of the driver, I am unsure if it can go in
so close before the new release ... some Tested-by would be nice ...

I applied them to the u-boot-i2c.git tree, and if nobody objects
against them, I send tomorrow a pull request to Tom.

bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[U-Boot] [PATCH] blackfin, powerpc: remove redundant definitions of ARRAY_SIZE

2014-07-02 Thread Masahiro Yamada

Since ARRAY_SIZE macro is defined in include/common.h,
re-defining it in arch-specific files is redundant.

Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Stefan Roese s...@denx.de
Cc: Sonic Zhang sonic.zh...@analog.com
---

I built all Blackfin and Powerpc boards.
I confirmed this patch has no bad impact.


 arch/blackfin/include/asm/config-pre.h | 3 ---
 arch/powerpc/cpu/ppc4xx/speed.c| 2 --
 2 files changed, 5 deletions(-)

diff --git a/arch/blackfin/include/asm/config-pre.h 
b/arch/blackfin/include/asm/config-pre.h
index d0fd537..2d8b293 100644
--- a/arch/blackfin/include/asm/config-pre.h
+++ b/arch/blackfin/include/asm/config-pre.h
@@ -9,9 +9,6 @@
 #ifndef __ASM_BLACKFIN_CONFIG_PRE_H__
 #define __ASM_BLACKFIN_CONFIG_PRE_H__
 
-/* Misc helper functions */
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-
 /* Bootmode defines -- your config needs to select this via 
CONFIG_BFIN_BOOT_MODE.
  * Depending on your cpu, some of these may not be valid, check your HRM.
  * The actual values here are meaningless as long as they're unique.
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 7e077d5..4baee77 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -19,8 +19,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DEBUGF(fmt,args...)
 #endif
 
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-
 #if defined(CONFIG_405GP)
 
 void get_sys_info (PPC4xx_SYS_INFO * sysInfo)
-- 
1.9.1

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Re: [U-Boot] [PATCH] blackfin, powerpc: remove redundant definitions of ARRAY_SIZE