Re: [U-Boot] [PATCH 1/3] common: board: support systems with where RAM ends beyond 4GB
On 12/23/2014 10:34 AM, Stephen Warren wrote: From: Stephen Warren swar...@nvidia.com Some systems have so much RAM that the end of RAM is beyond 4GB. An example would be a Tegra124 system (where RAM starts at 2GB physical) that has more than 2GB of RAM. In this case, we can gd-ram_size to represent the actual RAM size, so that the actual RAM size is passed to the OS. This is useful if the OS implements LPAE, and can actually use the extra RAM. However, U-Boot does not implement LPAE and so must deal with 32-bit physical addresses. To this end, we enhance board_get_usable_ram_top() to detect the over-sized case, and limit the relocation addres so that it fits into 32-bits of physical address space. TomW, TomR, does this series look good? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/fsl: support low power boot for e500 and later
On Thu, 2015-01-15 at 14:04 +0800, Dongsheng Wang wrote: From: Wang Dongsheng dongsheng.w...@freescale.com low power boot means u-boot will put non-boot cpus into a low power status. Non-boot cpus don't need any more spin wait. e500, e500v2 will going to DOZE status. e500mc, e5500, e6500rev1 will going to PW10 state. e6500rev2 will going to PW20 state. e500/e500v2 will be kicked up by MPIC-IPI, e500mc later will be kicked up by doorbell. This will break compatibility with existing kernels (and violate ePAPR since you haven't changed the release-method string). It must be optional and (for now) off by default. What benefits are we getting for this churn and complexity? Do we really need to optimize for the case where not all CPUs are used? Where is this new mechanism documented? diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index a2c0ad4..a97a1b6 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -297,10 +297,15 @@ __secondary_start_page: mtspr SPRN_MAS7,r11 tlbwe + li r6, 0 + /* * __bootpg_addr has the address of __second_half_boot_page * jump there in AS=1 space with cache enabled */ + .align 6 + .global jump_half_boot_page +jump_half_boot_page: half_boot_page is confusing. lis r13,toreset(__bootpg_addr)@h ori r13,r13,toreset(__bootpg_addr)@l lwz r11,0(r13) @@ -371,6 +376,9 @@ __second_half_boot_page: * }; * we pad this struct to 64 bytes so each entry is in its own cacheline */ + cmpwi r6, 1 + beq 3f What does a value of 1 mean for r6? What about 0? Could you use symbolic constants? Why not just set the IVOR to where you really want to enter, rather than conditionally branching there based on a value that happens to correspond to whether you're entering via an interrupt? li r3,0 li r8,1 mfspr r4,SPRN_PIR @@ -402,7 +410,132 @@ __second_half_boot_page: #endif lwz r4,ENTRY_ADDR_LOWER(r10) andi. r11,r4,1 - bne 3b + beq 6f + + li r6, 0 + addir6, r6, 1 Why not just li r6, 1? + /* External Interrupt exception. */ + lis r7, toreset(jump_half_boot_page)@h + mtspr SPRN_IVPR, r7 + li r7, toreset(jump_half_boot_page)@l + +#ifdef CONFIG_E500MC + /* e500MC, e5500, e6500 will use doorbell to send ipi signal */ + mtspr SPRN_IVOR36, r7 +#endif + + /* + * For e500mc later: + * EE will open in low power state, IVOR4 make sure we can ACK + * trash interrupt and keep we can loop in wait state again until + * the desired interrupt coming. I don't understand EE will open. Do you mean EE will be set? Why would we get unexpected interrupts? + * + * e500, e500v2: + * Kernel will use MPCI to send ipi signal, so we must set IVOR4. + */ MPIC + mtspr SPRN_IVOR4, r7 + + isync + +#ifdef CONFIG_E500MC + /* PW20 AltiVec idle feature only exists for E6500 */ + mfspr r0, SPRN_PVR + rlwinm r11, r0, 16, 16, 31 + lis r12, 0 + ori r12, r12, PVR_VER_E6500@l + cmpwr11, r12 + bne 5f + + /* Fix erratum, e6500 rev1 does not support PW20 AltiVec idle */ + rlwinm r11, r0, 0, 16, 31 + cmpwi r11, 0x20 + blt 5f PW10 isn't enough here? +#define PW20_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */ If you must use PW20 please set the timeout long enough that it's obvious we won't hit it during normal bootup. + /* + * Set all of cpu PIR-ID is 0, wait kernel send doorbell or MPIC-IPI + * signal. + * + * When kernel kick one of cpus, all cpus will be wakenup. To make + * sure that only the target cpu is effected, other cpus (by checking + * spin_table-addr_l) should go back to low power state. + * + * U-boot has renumber the cpu PIR Why we need to set all of PIR to + * the same value? + * A: Before kernel kicking cpu, the doorbell message was not configured + * for target cpu(cpu_messages-data). If we try to send a + * non-configured message to target cpu, it cannot correctly receive + * doorbell interrput. So SET ALL OF CPU'S PIR to the same value to + * let all cpus catch the interrupt. + * + * Why set PIR to zero? + * A: U-boot cannot know how many cpus will be kicked up(Kernel allow us + * to configure NR_CPUS) and IPI is a per_cpu variable, u-boot cannot + * set a appropriate PIR for every cpu, but the boot cpu(CPU0) always be + * there. So set PIR is zero as a default PIR ID for each CPUs. What does NR_CPUS have to do with the appropriate PIR for each CPU? + /* + * If proxy mode enable in MPIC, Read EPR to ACK INTERRUPT + * Or proxy mode
Re: [U-Boot] [PATCH v2 04/22] x86: video: Add support for CONFIG_CONSOLE_SCROLL_LINES
Hi Anatolij,
On 1 January 2015 at 16:17, Simon Glass s...@chromium.org wrote:
Some machines are very slow to scroll their displays. To cope with this,
support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows
the display to operate at an acceptable speed by scrolling 5 lines at
a time.
This same option is available for LCDs so when these systems are unified
this code can be unified also.
Signed-off-by: Simon Glass s...@chromium.org
Are you happy with this patch? If so, is it OK for me to pick it up via x86?
---
Changes in v2: None
drivers/video/cfb_console.c | 26 +-
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index a653bb4..75cdf61 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -312,7 +312,11 @@ void console_cursor(int state);
#define CONSOLE_ROW_SECOND (video_console_address + CONSOLE_ROW_SIZE)
#define CONSOLE_ROW_LAST (video_console_address + CONSOLE_SIZE -
CONSOLE_ROW_SIZE)
#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * CONSOLE_ROWS)
-#define CONSOLE_SCROLL_SIZE(CONSOLE_SIZE - CONSOLE_ROW_SIZE)
+
+/* By default we scroll by a single line */
+#ifndef CONFIG_CONSOLE_SCROLL_LINES
+#define CONFIG_CONSOLE_SCROLL_LINES 1
+#endif
/* Macros */
#ifdef VIDEO_FB_LITTLE_ENDIAN
@@ -753,26 +757,33 @@ static void console_clear_line(int line, int begin, int
end)
static void console_scrollup(void)
{
+ const int rows = CONFIG_CONSOLE_SCROLL_LINES;
+ int i;
+
/* copy up rows ignoring the first one */
#ifdef VIDEO_HW_BITBLT
video_hw_bitblt(VIDEO_PIXEL_SIZE, /* bytes per pixel */
0, /* source pos x */
video_logo_height +
- VIDEO_FONT_HEIGHT, /* source pos y */
+ VIDEO_FONT_HEIGHT * rows, /* source pos y */
0, /* dest pos x */
video_logo_height, /* dest pos y */
VIDEO_VISIBLE_COLS, /* frame width */
VIDEO_VISIBLE_ROWS
- video_logo_height
- - VIDEO_FONT_HEIGHT /* frame height */
+ - VIDEO_FONT_HEIGHT * rows /* frame height */
);
#else
- memcpyl(CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND,
- CONSOLE_SCROLL_SIZE 2);
+ memcpyl(CONSOLE_ROW_FIRST, CONSOLE_ROW_FIRST + rows *
CONSOLE_ROW_SIZE,
+ (CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows) 2);
#endif
/* clear the last one */
- console_clear_line(CONSOLE_ROWS - 1, 0, CONSOLE_COLS - 1);
+ for (i = 1; i = rows; i++)
+ console_clear_line(CONSOLE_ROWS - i, 0, CONSOLE_COLS - 1);
+
+ /* Decrement row number */
+ console_row -= rows;
}
static void console_back(void)
@@ -884,9 +895,6 @@ static void console_newline(int n)
if (console_row = CONSOLE_ROWS) {
/* Scroll everything up */
console_scrollup();
-
- /* Decrement row number */
- console_row = CONSOLE_ROWS - 1;
}
}
--
2.2.0.rc0.207.ga3a616c
Regards,
Simon
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Re: [U-Boot] [PATCH 07/18] dm: i2c: s3c24x0: adjust to dm-i2c api
Hi Przemyslaw, On 9 January 2015 at 01:57, Przemyslaw Marczak p.marc...@samsung.com wrote: Hello Heiko Schocher, On 01/09/2015 07:31 AM, Heiko Schocher wrote: Hello Przemyslaw Marczak, just some nitpick ... [snip] Thank you for the review, I will fix this in the next patchset version. I'd like to apply this to u-boot-dm soon - can you please resend this patch with the nits fixed? I don't have any comments beyond what Heiko says. Also, you probably saw the compatibility layer for I2C which should make it possible for you to run the old PMIC framework with I2C using driver model. It should make it easier to get everything done. It is in u-boot-dm/testing. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] common: mark commands as default to match config_cmd_default.h
Hi Simon, Alexey, On Thu, 15 Jan 2015 12:44:16 -0700 Simon Glass s...@chromium.org wrote: Frankly I don't like this approach with post-processing steps. It will inevitably end-up with messed up configs. Why don't we just use default values in Kconfig for ARCH/SOC/Board? It's pretty obvious that 1 board may have N flavors but then have a baseline options selected in board/vendor/board_name/Kconfig and only put options that differ between boards in your defconfigs. This way savedefconfig will automatically strip down all extra lines for a particular board. This is how things work in Linux kernel and Buildroot Kconfig-based build systems. Probably I'm missing something here because U-Boot differs from mentioned projects in some aspects - if so please correct me. I started with this approach and Masahiro was not very keen on it. I'm OK with it, particularly as it is already supported, but I wonder whether we can do better. Shall we go with this way? It is true that I was not very keen on it at first, but after discussion with you, I understand that this is the best solution we can do now in terms of code maintainability. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] distro_bootcmd: read DHCP boot script name from a variable
From: Stephen Warren swar...@nvidia.com
Modify $bootcmd_dhcp to read the downloaded script filename from an
environment variable rather than hard-coding it. This allows the user
(or another script) to select a different script name if they want,
without editing the whole value of $bootcmd_dhcp.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
include/config_distro_bootcmd.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index be616e8bfd0e..4ed149a56088 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -118,7 +118,7 @@
#define BOOTENV_DEV_DHCP(devtypeu, devtypel, instance) \
bootcmd_dhcp= \
BOOTENV_RUN_USB_INIT \
- if dhcp ${scriptaddr} boot.scr.uimg; then \
+ if dhcp ${scriptaddr} ${boot_script_dhcp}; then \
source ${scriptaddr}; \
fi\0
#define BOOTENV_DEV_NAME_DHCP(devtypeu, devtypel, instance) \
@@ -162,6 +162,7 @@
BOOTENV_SHARED_IDE \
boot_prefixes=/ /boot/\0 \
boot_scripts=boot.scr.uimg boot.scr\0 \
+ boot_script_dhcp=boot.scr.uimg\0 \
BOOTENV_BOOT_TARGETS \
bootpart=1\0 \
\
--
1.9.1
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[U-Boot] [PATCH v3 3/3] ARM: at91: at91sam9x5: save environment to a FAT file in MMC card
This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of saving it in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by: Josh Wu josh...@atmel.com Acked-by: Bo Shen voice.s...@atmel.com --- Changes in v3: None Changes in v2: - refined commit messages - fix a compile error for at91sam9x5 mmc env file. include/configs/at91sam9x5ek.h | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index b1d4baa..6d8b71d 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -203,11 +203,12 @@ bootm 0x2200 #else /* CONFIG_SYS_USE_MMC */ /* bootstrap + u-boot + env + linux in mmc */ -#define CONFIG_ENV_IS_IN_MMC -/* For FAT system, most cases it should be in the reserved sector */ -#define CONFIG_ENV_OFFSET 0x2000 -#define CONFIG_ENV_SIZE0x1000 -#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_IS_IN_FAT +#define CONFIG_FAT_WRITE +#define FAT_ENV_INTERFACE mmc +#define FAT_ENV_FILE uboot.env +#define FAT_ENV_DEVICE_AND_PART 0 +#define CONFIG_ENV_SIZE0x4000 #endif #ifdef CONFIG_SYS_USE_MMC -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/3] ARM: at91: sama5d3xek: save enviroment as a FAT file in MMC card
This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by: Josh Wu josh...@atmel.com Acked-by: Bo Shen voice.s...@atmel.com --- Changes in v3: - move CONFIG_FAT_WRITE macro to share with USB and MMC Changes in v2: None include/configs/sama5d3xek.h | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index f2849d7..1ed 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -191,6 +191,7 @@ #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) #define CONFIG_CMD_FAT +#define CONFIG_FAT_WRITE #endif #define CONFIG_SYS_LOAD_ADDR 0x2200 /* load address */ @@ -215,13 +216,14 @@ bootm 0x2200 - 0x2100 #elif CONFIG_SYS_USE_MMC /* bootstrap + u-boot + env in sd card */ -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET 0x2000 -#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_IS_IN_FAT +#define FAT_ENV_INTERFACE mmc +#define FAT_ENV_FILE uboot.env +#define FAT_ENV_DEVICE_AND_PART0 +#define CONFIG_ENV_SIZE0x4000 #define CONFIG_BOOTCOMMAND fatload mmc 0:1 0x2100 dtb; \ fatload mmc 0:1 0x2200 uImage; \ bootm 0x2200 - 0x2100 -#define CONFIG_SYS_MMC_ENV_DEV 0 #else #define CONFIG_ENV_IS_NOWHERE #endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] x86: Access the VGA ROM when needed
On 14 January 2015 at 21:37, Simon Glass s...@chromium.org wrote: Add code to the generic pci_rom file to access the VGA ROM in PCI space when needed. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Use 0xfffe instead of ~-2 drivers/pci/pci_auto.c | 28 +++- drivers/pci/pci_rom.c | 7 ++- include/pci.h | 9 + 3 files changed, 42 insertions(+), 2 deletions(-) Applied to u-boot-x86. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 03/26] dm: core: Improve comments for uclass_first/next_device()
Mention that the devices are probed ready for use. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: None include/dm/uclass.h | 4 1 file changed, 4 insertions(+) diff --git a/include/dm/uclass.h b/include/dm/uclass.h index f6ec6d7..2577ae6 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -141,6 +141,8 @@ int uclass_get_device_by_of_offset(enum uclass_id id, int node, /** * uclass_first_device() - Get the first device in a uclass * + * The device returned is probed if necessary, and ready for use + * * @id: Uclass ID to look up * @devp: Returns pointer to the first device in that uclass, or NULL if none * @return 0 if OK (found or not found), -1 on error @@ -150,6 +152,8 @@ int uclass_first_device(enum uclass_id id, struct udevice **devp); /** * uclass_next_device() - Get the next device in a uclass * + * The device returned is probed if necessary, and ready for use + * * @devp: On entry, pointer to device to lookup. On exit, returns pointer * to the next device in the same uclass, or NULL if none * @return 0 if OK (found or not found), -1 on error -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 02/26] dm: Don't run tests if U-Boot cannot be built
There is no point in running the tests if U-Boot cannot be built. Abort in
this case.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
test/dm/test-dm.sh | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/test/dm/test-dm.sh b/test/dm/test-dm.sh
index bb99677..8ebc392 100755
--- a/test/dm/test-dm.sh
+++ b/test/dm/test-dm.sh
@@ -1,9 +1,14 @@
#!/bin/sh
+die() {
+ echo $1
+ exit 1
+}
+
NUM_CPUS=$(cat /proc/cpuinfo |grep -c processor)
dtc -I dts -O dtb test/dm/test.dts -o test/dm/test.dtb
-make O=sandbox sandbox_config
-make O=sandbox -s -j${NUM_CPUS}
+make O=sandbox sandbox_config || die Cannot configure U-Boot
+make O=sandbox -s -j${NUM_CPUS} || die Cannot build U-Boot
dd if=/dev/zero of=spi.bin bs=1M count=2
./sandbox/u-boot -d test/dm/test.dtb -c dm test
rm spi.bin
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 0/26] dm: Add additional bus functionality
The current bus implementation is simple but leaves some things to drivers which are better handled in the uclass. At present uclasses cannot provide a common way of dealing with children (i.e. devices on the bus), so we have duplication in the drivers. The same code is repeated in each driver when it would be better to put it in the uclass. Secondly, we don't have the concept of per-child platform data for devices on the bus. Instead the per-child data can only exist when the child is actually probed. This is not really suitable. Examples of things we want to know before a child is probed are: - chip address (for I2C) - chip select (for SPI) - device address (for PCI) These things are static and do not change when the device is probed and removed. In some cases (such as SPI mode and maximum speed), the data may be copied to run-time data when the device is probed. It may then be changed while the driver is active, but the original platform data is never changed by drivers once it is set up. To address these issues, additional functions are added: - per-child platform data, which can be defined by the uclass and (if necessary) overriden by the bus driver. This allows the bus's uclass to provide some consistency here - per-child post-bind and pre-probe methods in the uclass. These allow the bus uclass to set up the per-child platform data, and also to do any last-minute adjustments before the child is probed. With these changes, some code can be removed from the existing I2C and SPI drivers and this has been done as part of this series. With this series I2C and SPI are tested on: - jetson-tk1 (Tegra 124) - beaver (Tegra 30) - seaboard (Tegra 20, I2C only) - trimslice (Tegra 20, SPI only) - snow (Exynos 5250) - pit (Exynos 5420, note I2C probe is previously broken) - link (x86) - sandbox Note: Some of these changes were previously included in the DM PCI RFC. This series is available at u-boot-dm/i2c-working. Changes in v2: - Add a TODO to remove struct dm_spi_bus - Add additional comments to spi.h - Add new patch to provide an offset length parameter where needed - Add patches to tidy up cros_ec using new I2C/SPI features - Copy max_hz and mode from platdata to spi_slave when probing - Drop RFC prefix since this series has been properly tested now - Tidy up soft_spi driver also - Update commit message to describe immuatable platform data - Update the spi-howto docs Simon Glass (26): dm: i2c: Provide an offset length parameter where needed dm: Don't run tests if U-Boot cannot be built dm: core: Improve comments for uclass_first/next_device() dm: core: Set device tree node for root device dm: core: Tidy up error handling in device_bind() dm: core: Allocate platform data when binding a device dm: core: Allow parents to have platform data for their children dm: core: Allow uclasses to specific the platdata for a device's children dm: core: Add a post_bind method for parents dm: core: Add a function to get a device's uclass ID dm: core: Add a flag to control sequence numbering dm: core: Allow uclasses to specific the private data for a device's children dm: spi: Move the per-child data size to the uclass dm: core: Allow the uclass to set up a device's child after binding dm: sandbox: sf: Tidy up the error handling in sandbox_sf_probe() dm: core: Allow uclass to set up a device's child before it is probed dm: spi: Set up the spi_slave device pointer in child_pre_probe() dm: spi: Move slave details to child platdata dm: i2c: Move slave details to child platdata dm: tegra: Drop unused COMPAT features for I2C, SPI dm: exynos: Drop unused COMPAT features for SPI dm: core: Ignore disabled devices when binding dm: cros_ec: Don't require protocol 3 support dm: cros_ec: Move cros_ec_i2c over to driver model dm: cros_ec_spi: Remove old pre-driver-model code dm: Update documentation for new bus features arch/arm/cpu/tegra20-common/pmu.c | 2 +- board/avionic-design/common/tamonten-ng.c | 2 +- board/nvidia/cardhu/cardhu.c | 4 +- board/nvidia/dalmore/dalmore.c| 4 +- board/nvidia/whistler/whistler.c | 4 +- board/toradex/apalis_t30/apalis_t30.c | 2 +- common/cmd_i2c.c | 2 +- doc/driver-model/README.txt | 91 +-- doc/driver-model/spi-howto.txt| 40 - drivers/core/device-remove.c | 16 +- drivers/core/device.c | 119 ++ drivers/core/root.c | 8 + drivers/core/uclass.c | 34 +++- drivers/i2c/i2c-uclass-compat.c | 2 +- drivers/i2c/i2c-uclass.c | 68 drivers/i2c/i2c-uniphier-f.c | 12 -- drivers/i2c/i2c-uniphier.c| 12 -- drivers/i2c/s3c24x0_i2c.c | 12 -- drivers/i2c/sandbox_i2c.c | 30 +--- drivers/i2c/tegra_i2c.c
[U-Boot] [PATCH v2 10/26] dm: core: Add a function to get a device's uclass ID
This is useful to check which uclass a device is in.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/core/device.c | 5 +
include/dm/device.h | 8
test/dm/core.c| 11 +++
3 files changed, 24 insertions(+)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index aa54575..c284730 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -438,3 +438,8 @@ ulong dev_get_of_data(struct udevice *dev)
{
return dev-of_id-data;
}
+
+enum uclass_id device_get_uclass_id(struct udevice *dev)
+{
+ return dev-uclass-uc_drv-id;
+}
diff --git a/include/dm/device.h b/include/dm/device.h
index 50f1b4f..81afa8c 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -245,6 +245,14 @@ struct udevice *dev_get_parent(struct udevice *child);
*/
ulong dev_get_of_data(struct udevice *dev);
+/*
+ * device_get_uclass_id() - return the uclass ID of a device
+ *
+ * @dev: Device to check
+ * @return uclass ID for the device
+ */
+enum uclass_id device_get_uclass_id(struct udevice *dev);
+
/**
* device_get_child() - Get the child of a device by index
*
diff --git a/test/dm/core.c b/test/dm/core.c
index ff5c2a7..eccda09 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -598,3 +598,14 @@ static int dm_test_uclass_before_ready(struct
dm_test_state *dms)
}
DM_TEST(dm_test_uclass_before_ready, 0);
+
+static int dm_test_device_get_uclass_id(struct dm_test_state *dms)
+{
+ struct udevice *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_TEST, 0, dev));
+ ut_asserteq(UCLASS_TEST, device_get_uclass_id(dev));
+
+ return 0;
+}
+DM_TEST(dm_test_device_get_uclass_id, DM_TESTF_SCAN_PDATA);
--
2.2.0.rc0.207.ga3a616c
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 08/26] dm: core: Allow uclasses to specific the platdata for a device's children
In many cases the child platform data for a device's children is defined by
the uclass rather than the individual devices. For example, a SPI bus needs
to know the chip select and speed for each of its children. It makes sense
to allow this information to be defined the SPI uclass rather than each
individual driver.
If the device provides a size value for its child platdata, then use it.
Failng that, fall back to that provided by the uclass.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/core/device.c | 4
include/dm/uclass.h | 5 +
test/dm/bus.c | 32 ++--
3 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 0682e2e..8791688 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -83,6 +83,10 @@ int device_bind(struct udevice *parent, struct driver *drv,
const char *name,
if (parent !dev-parent_platdata) {
int size = parent-driver-per_child_platdata_auto_alloc_size;
+ if (!size) {
+ size = parent-uclass-uc_drv-
+ per_child_platdata_auto_alloc_size;
+ }
if (size) {
dev-flags |= DM_FLAG_ALLOC_PARENT_PDATA;
dev-parent_platdata = calloc(1, size);
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 2577ae6..7d92d34 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -60,6 +60,10 @@ struct udevice;
* @per_device_auto_alloc_size: Each device can hold private data owned
* by the uclass. If required this will be automatically allocated if this
* value is non-zero.
+ * @per_child_platdata_auto_alloc_size: A bus likes to store information about
+ * its children. If non-zero this is the size of this data, to be allocated
+ * in the child device's parent_platdata pointer. This value is only used as
+ * a falback if this member is 0 in the driver.
* @ops: Uclass operations, providing the consistent interface to devices
* within the uclass.
*/
@@ -74,6 +78,7 @@ struct uclass_driver {
int (*destroy)(struct uclass *class);
int priv_auto_alloc_size;
int per_device_auto_alloc_size;
+ int per_child_platdata_auto_alloc_size;
const void *ops;
};
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 63c8a9f..26b8293 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -279,8 +279,7 @@ static int dm_test_bus_parent_ops(struct dm_test_state *dms)
}
DM_TEST(dm_test_bus_parent_ops, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
-/* Test that the bus can store platform data about each child */
-static int dm_test_bus_parent_platdata(struct dm_test_state *dms)
+static int test_bus_parent_platdata(struct dm_test_state *dms)
{
struct dm_test_parent_platdata *plat;
struct udevice *bus, *dev;
@@ -351,4 +350,33 @@ static int dm_test_bus_parent_platdata(struct
dm_test_state *dms)
return 0;
}
+
+/* Test that the bus can store platform data about each child */
+static int dm_test_bus_parent_platdata(struct dm_test_state *dms)
+{
+ return test_bus_parent_platdata(dms);
+}
DM_TEST(dm_test_bus_parent_platdata, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* As above but the size is controlled by the uclass */
+static int dm_test_bus_parent_platdata_uclass(struct dm_test_state *dms)
+{
+ struct udevice *bus;
+ int size;
+ int ret;
+
+ /* Set the driver size to 0 so that the uclass size is used */
+ ut_assertok(uclass_find_device(UCLASS_TEST_BUS, 0, bus));
+ size = bus-driver-per_child_platdata_auto_alloc_size;
+ bus-uclass-uc_drv-per_child_platdata_auto_alloc_size = size;
+ bus-driver-per_child_platdata_auto_alloc_size = 0;
+ ret = test_bus_parent_platdata(dms);
+ if (ret)
+ return ret;
+ bus-uclass-uc_drv-per_child_platdata_auto_alloc_size = 0;
+ bus-driver-per_child_platdata_auto_alloc_size = size;
+
+ return 0;
+}
+DM_TEST(dm_test_bus_parent_platdata_uclass,
+ DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
2.2.0.rc0.207.ga3a616c
___
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http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3] ARM: at91: sama5d3_xplained: save environment in a FAT file in MMC card
This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of saving it in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by: Josh Wu josh...@atmel.com Acked-by: Bo Shen voice.s...@atmel.com --- Changes in v3: - move CONFIG_FAT_WRITE macro to share with USB and MMC Changes in v2: - refined commit messages include/configs/sama5d3_xplained.h | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index d5588b1..3ff2b07 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -169,13 +169,14 @@ bootz 0x2200 - 0x2100 #elif CONFIG_SYS_USE_MMC /* bootstrap + u-boot + env in sd card */ -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET 0x2000 -#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_IS_IN_FAT +#define FAT_ENV_INTERFACE mmc +#define FAT_ENV_FILE uboot.env +#define FAT_ENV_DEVICE_AND_PART0 +#define CONFIG_ENV_SIZE0x4000 #define CONFIG_BOOTCOMMAND fatload mmc 0:1 0x2100 at91-sama5d3_xplained.dtb; \ fatload mmc 0:1 0x2200 zImage; \ bootz 0x2200 - 0x2100 -#define CONFIG_SYS_MMC_ENV_DEV 0 #else #define CONFIG_ENV_IS_NOWHERE #endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/3] ARM: at91: save mmc environment in a FAT file instead of some sectors
I sent these patches days ago with other patches which refactor SAMA5 common configuration files, see URL: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/203128/focus=203182 Since the patches which refactor SAMA5 common configuration files is rejected. So this time I only send the patches which only convert the mmc environment to FAT file. Changes in v3: - move CONFIG_FAT_WRITE macro to share with USB and MMC Changes in v2: - refined commit messages - fix a compile error for at91sam9x5 mmc env file. Josh Wu (3): ARM: at91: sama5d3_xplained: save environment in a FAT file in MMC card ARM: at91: sama5d3xek: save enviroment as a FAT file in MMC card ARM: at91: at91sam9x5: save environment to a FAT file in MMC card include/configs/at91sam9x5ek.h | 11 ++- include/configs/sama5d3_xplained.h | 9 + include/configs/sama5d3xek.h | 10 ++ 3 files changed, 17 insertions(+), 13 deletions(-) -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 12/26] dm: core: Allow uclasses to specific the private data for a device's children
In many cases the per-child private data for a device's children is defined
by the uclass rather than the individual driver. For example, a SPI bus
needs to store information about each of its children, but all SPI drivers
store the same information. It makes sense to allow the uclass to define
this data.
If the driver provides a size value for its per-child private data, then use
it. Failng that, fall back to that provided by the uclass.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/core/device-remove.c | 4
drivers/core/device.c| 4
include/dm/uclass.h | 4
test/dm/bus.c| 31 +--
4 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
index 56c358a..3a5f48d 100644
--- a/drivers/core/device-remove.c
+++ b/drivers/core/device-remove.c
@@ -126,6 +126,10 @@ void device_free(struct udevice *dev)
}
if (dev-parent) {
size = dev-parent-driver-per_child_auto_alloc_size;
+ if (!size) {
+ size = dev-parent-uclass-uc_drv-
+ per_child_auto_alloc_size;
+ }
if (size) {
free(dev-parent_priv);
dev-parent_priv = NULL;
diff --git a/drivers/core/device.c b/drivers/core/device.c
index a149a7a..2639fcb 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -201,6 +201,10 @@ int device_probe_child(struct udevice *dev, void
*parent_priv)
/* Ensure all parents are probed */
if (dev-parent) {
size = dev-parent-driver-per_child_auto_alloc_size;
+ if (!size) {
+ size = dev-parent-uclass-uc_drv-
+ per_child_auto_alloc_size;
+ }
if (size) {
dev-parent_priv = calloc(1, size);
if (!dev-parent_priv) {
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 9000b22..ac6c850 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -63,6 +63,9 @@ struct udevice;
* @per_device_auto_alloc_size: Each device can hold private data owned
* by the uclass. If required this will be automatically allocated if this
* value is non-zero.
+ * @per_child_auto_alloc_size: Each child device (of a parent in this
+ * uclass) can hold parent data for the device/uclass. This value is only
+ * used as a falback if this member is 0 in the driver.
* @per_child_platdata_auto_alloc_size: A bus likes to store information about
* its children. If non-zero this is the size of this data, to be allocated
* in the child device's parent_platdata pointer. This value is only used as
@@ -82,6 +85,7 @@ struct uclass_driver {
int (*destroy)(struct uclass *class);
int priv_auto_alloc_size;
int per_device_auto_alloc_size;
+ int per_child_auto_alloc_size;
int per_child_platdata_auto_alloc_size;
const void *ops;
uint32_t flags;
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 972c449..e909697 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -192,7 +192,7 @@ DM_TEST(dm_test_bus_children_iterators,
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
/* Test that the bus can store data about each child */
-static int dm_test_bus_parent_data(struct dm_test_state *dms)
+static int test_bus_parent_data(struct dm_test_state *dms)
{
struct dm_test_parent_data *parent_data;
struct udevice *bus, *dev;
@@ -251,9 +251,36 @@ static int dm_test_bus_parent_data(struct dm_test_state
*dms)
return 0;
}
-
+/* Test that the bus can store data about each child */
+static int dm_test_bus_parent_data(struct dm_test_state *dms)
+{
+ return test_bus_parent_data(dms);
+}
DM_TEST(dm_test_bus_parent_data, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+/* As above but the size is controlled by the uclass */
+static int dm_test_bus_parent_data_uclass(struct dm_test_state *dms)
+{
+ struct udevice *bus;
+ int size;
+ int ret;
+
+ /* Set the driver size to 0 so that the uclass size is used */
+ ut_assertok(uclass_find_device(UCLASS_TEST_BUS, 0, bus));
+ size = bus-driver-per_child_auto_alloc_size;
+ bus-uclass-uc_drv-per_child_auto_alloc_size = size;
+ bus-driver-per_child_auto_alloc_size = 0;
+ ret = test_bus_parent_data(dms);
+ if (ret)
+ return ret;
+ bus-uclass-uc_drv-per_child_auto_alloc_size = 0;
+ bus-driver-per_child_auto_alloc_size = size;
+
+ return 0;
+}
+DM_TEST(dm_test_bus_parent_data_uclass,
+ DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
/* Test that the bus ops are called when a child is probed/removed */
static int dm_test_bus_parent_ops(struct dm_test_state *dms)
{
--
2.2.0.rc0.207.ga3a616c
[U-Boot] [PATCH v2 07/26] dm: core: Allow parents to have platform data for their children
For buses it is common for parents to need to know the address of the child
on the bus, the bus speed to use for that child, and other information. This
can be provided in platform data attached to each child.
Add driver model support for this, including auto-allocation which can be
requested using a new property to specify the size of the data.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/core/device-remove.c | 4 +++
drivers/core/device.c| 30 ++--
include/dm/device.h | 19 +++
test/dm/bus.c| 81
4 files changed, 132 insertions(+), 2 deletions(-)
diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
index 2c82577..56c358a 100644
--- a/drivers/core/device-remove.c
+++ b/drivers/core/device-remove.c
@@ -92,6 +92,10 @@ int device_unbind(struct udevice *dev)
free(dev-platdata);
dev-platdata = NULL;
}
+ if (dev-flags DM_FLAG_ALLOC_PARENT_PDATA) {
+ free(dev-parent_platdata);
+ dev-parent_platdata = NULL;
+ }
ret = uclass_unbind_device(dev);
if (ret)
return ret;
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 23ee771..0682e2e 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -80,6 +80,18 @@ int device_bind(struct udevice *parent, struct driver *drv,
const char *name,
goto fail_alloc1;
}
}
+ if (parent !dev-parent_platdata) {
+ int size = parent-driver-per_child_platdata_auto_alloc_size;
+
+ if (size) {
+ dev-flags |= DM_FLAG_ALLOC_PARENT_PDATA;
+ dev-parent_platdata = calloc(1, size);
+ if (!dev-parent_platdata) {
+ ret = -ENOMEM;
+ goto fail_alloc2;
+ }
+ }
+ }
/* put dev into parent's successor list */
if (parent)
@@ -107,8 +119,12 @@ fail_bind:
dev-name);
}
fail_uclass_bind:
- if (parent)
- list_del(dev-sibling_node);
+ list_del(dev-sibling_node);
+ if (dev-flags DM_FLAG_ALLOC_PARENT_PDATA) {
+ free(dev-parent_platdata);
+ dev-parent_platdata = NULL;
+ }
+fail_alloc2:
if (dev-flags DM_FLAG_ALLOC_PDATA) {
free(dev-platdata);
dev-platdata = NULL;
@@ -247,6 +263,16 @@ void *dev_get_platdata(struct udevice *dev)
return dev-platdata;
}
+void *dev_get_parent_platdata(struct udevice *dev)
+{
+ if (!dev) {
+ dm_warn(%s: null device, __func__);
+ return NULL;
+ }
+
+ return dev-parent_platdata;
+}
+
void *dev_get_priv(struct udevice *dev)
{
if (!dev) {
diff --git a/include/dm/device.h b/include/dm/device.h
index 13598a1..096d84b 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -26,6 +26,9 @@ struct driver_info;
/* DM should init this device prior to relocation */
#define DM_FLAG_PRE_RELOC (1 2)
+/* DM is responsible for allocating and freeing parent_platdata */
+#define DM_FLAG_ALLOC_PARENT_PDATA (1 3)
+
/**
* struct udevice - An instance of a driver
*
@@ -46,6 +49,7 @@ struct driver_info;
* @driver: The driver used by this device
* @name: Name of device, typically the FDT node name
* @platdata: Configuration data for this device
+ * @parent_platdata: The parent bus's configuration data for this device
* @of_offset: Device tree node offset for this device (- for none)
* @of_id: Pointer to the udevice_id structure which created the device
* @parent: Parent of this device, or NULL for the top level device
@@ -65,6 +69,7 @@ struct udevice {
struct driver *driver;
const char *name;
void *platdata;
+ void *parent_platdata;
int of_offset;
const struct udevice_id *of_id;
struct udevice *parent;
@@ -146,6 +151,9 @@ struct udevice_id {
* device_probe_child() pass it in. So far the use case for allocating it
* is SPI, but I found that unsatisfactory. Since it is here I will leave it
* until things are clearer.
+ * @per_child_platdata_auto_alloc_size: A bus likes to store information about
+ * its children. If non-zero this is the size of this data, to be allocated
+ * in the child's parent_platdata pointer.
* @ops: Driver-specific operations. This is typically a list of function
* pointers defined by the driver, to implement driver functions required by
* the uclass.
@@ -165,6 +173,7 @@ struct driver {
int priv_auto_alloc_size;
int platdata_auto_alloc_size;
int per_child_auto_alloc_size;
+ int per_child_platdata_auto_alloc_size;
const void *ops;/* driver-specific operations */
uint32_t flags;
};
[U-Boot] [PATCH v2 01/26] dm: i2c: Provide an offset length parameter where needed
Rather than assuming that the chip offset length is 1, allow it to be
provided. This allows chips that don't use the default offset length to
be used (at present they are only supported by the command line 'i2c'
command which sets the offset length explicitly).
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to provide an offset length parameter where needed
arch/arm/cpu/tegra20-common/pmu.c | 2 +-
board/avionic-design/common/tamonten-ng.c | 2 +-
board/nvidia/cardhu/cardhu.c | 4 ++--
board/nvidia/dalmore/dalmore.c| 4 ++--
board/nvidia/whistler/whistler.c | 4 ++--
board/toradex/apalis_t30/apalis_t30.c | 2 +-
common/cmd_i2c.c | 2 +-
drivers/i2c/i2c-uclass.c | 16 +---
drivers/i2c/sandbox_i2c.c | 2 +-
drivers/power/as3722.c| 2 +-
include/i2c.h | 8 ++--
test/dm/i2c.c | 10 +-
12 files changed, 32 insertions(+), 26 deletions(-)
diff --git a/arch/arm/cpu/tegra20-common/pmu.c
b/arch/arm/cpu/tegra20-common/pmu.c
index 36a76a2..a774246 100644
--- a/arch/arm/cpu/tegra20-common/pmu.c
+++ b/arch/arm/cpu/tegra20-common/pmu.c
@@ -52,7 +52,7 @@ int pmu_set_nominal(void)
debug(%s: Cannot find DVC I2C bus\n, __func__);
return ret;
}
- ret = i2c_get_chip(bus, PMI_I2C_ADDRESS, dev);
+ ret = i2c_get_chip(bus, PMI_I2C_ADDRESS, 1, dev);
if (ret) {
debug(%s: Cannot find DVC I2C chip\n, __func__);
return ret;
diff --git a/board/avionic-design/common/tamonten-ng.c
b/board/avionic-design/common/tamonten-ng.c
index bca9183..1704627 100644
--- a/board/avionic-design/common/tamonten-ng.c
+++ b/board/avionic-design/common/tamonten-ng.c
@@ -55,7 +55,7 @@ void pmu_write(uchar reg, uchar data)
struct udevice *dev;
int ret;
- ret = i2c_get_chip_for_busnum(4, PMU_I2C_ADDRESS, dev);
+ ret = i2c_get_chip_for_busnum(4, PMU_I2C_ADDRESS, 1, dev);
if (ret) {
debug(%s: Cannot find PMIC I2C chip\n, __func__);
return;
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
index fc31d29..1540526 100644
--- a/board/nvidia/cardhu/cardhu.c
+++ b/board/nvidia/cardhu/cardhu.c
@@ -46,7 +46,7 @@ void board_sdmmc_voltage_init(void)
int ret;
int i;
- ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, dev);
+ ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, dev);
if (ret) {
debug(%s: Cannot find PMIC I2C chip\n, __func__);
return;
@@ -94,7 +94,7 @@ int tegra_pcie_board_init(void)
u8 addr, data[1];
int err;
- err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, dev);
+ err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, dev);
if (err) {
debug(failed to find PMU bus\n);
return err;
diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index c0991c5..d7c1a69 100644
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -55,7 +55,7 @@ void board_sdmmc_voltage_init(void)
uchar reg, data_buffer[1];
int ret;
- ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, dev);
+ ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, dev);
if (ret) {
debug(%s: Cannot find PMIC I2C chip\n, __func__);
return;
@@ -83,7 +83,7 @@ void board_sdmmc_voltage_init(void)
data_buffer[0] = 0x03;
reg = 0x14;
- ret = i2c_get_chip_for_busnum(0, BAT_I2C_ADDRESS, dev);
+ ret = i2c_get_chip_for_busnum(0, BAT_I2C_ADDRESS, 1, dev);
if (ret) {
debug(%s: Cannot find charger I2C chip\n, __func__);
return;
diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c
index ad6ea09..3476f11 100644
--- a/board/nvidia/whistler/whistler.c
+++ b/board/nvidia/whistler/whistler.c
@@ -27,7 +27,7 @@ void pin_mux_mmc(void)
int ret;
/* Turn on MAX8907B LDO12 to 2.8V for J40 power */
- ret = i2c_get_chip_for_busnum(0, 0x3c, dev);
+ ret = i2c_get_chip_for_busnum(0, 0x3c, 1, dev);
if (ret) {
printf(%s: Cannot find MAX8907B I2C chip\n, __func__);
return;
@@ -64,7 +64,7 @@ void pin_mux_usb(void)
*/
/* Turn on TAC6416's GPIO 0+1 for USB1/3's VBUS */
- ret = i2c_get_chip_for_busnum(0, 0x20, dev);
+ ret = i2c_get_chip_for_busnum(0, 0x20, 1, dev);
if (ret) {
printf(%s: Cannot find TAC6416 I2C chip\n, __func__);
return;
diff --git a/board/toradex/apalis_t30/apalis_t30.c
b/board/toradex/apalis_t30/apalis_t30.c
index 1c4b4c1..6244214 100644
--- a/board/toradex/apalis_t30/apalis_t30.c
+++
[U-Boot] [PATCH v2 06/26] dm: core: Allocate platform data when binding a device
When using allocated platform data, allocate it when we bind the device.
This makes it possible to fill in this information before the device is
probed.
This fits with the platform data model (when not using device tree),
since platform data exists at bind-time.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/core/device-remove.c | 8
drivers/core/device.c| 20
test/dm/test-fdt.c | 4 ++--
3 files changed, 18 insertions(+), 14 deletions(-)
diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
index 8fc6b71..2c82577 100644
--- a/drivers/core/device-remove.c
+++ b/drivers/core/device-remove.c
@@ -88,6 +88,10 @@ int device_unbind(struct udevice *dev)
if (ret)
return ret;
+ if (dev-flags DM_FLAG_ALLOC_PDATA) {
+ free(dev-platdata);
+ dev-platdata = NULL;
+ }
ret = uclass_unbind_device(dev);
if (ret)
return ret;
@@ -111,10 +115,6 @@ void device_free(struct udevice *dev)
free(dev-priv);
dev-priv = NULL;
}
- if (dev-flags DM_FLAG_ALLOC_PDATA) {
- free(dev-platdata);
- dev-platdata = NULL;
- }
size = dev-uclass-uc_drv-per_device_auto_alloc_size;
if (size) {
free(dev-uclass_priv);
diff --git a/drivers/core/device.c b/drivers/core/device.c
index eca8eda..23ee771 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -72,8 +72,14 @@ int device_bind(struct udevice *parent, struct driver *drv,
const char *name,
#else
dev-req_seq = -1;
#endif
- if (!dev-platdata drv-platdata_auto_alloc_size)
+ if (!dev-platdata drv-platdata_auto_alloc_size) {
dev-flags |= DM_FLAG_ALLOC_PDATA;
+ dev-platdata = calloc(1, drv-platdata_auto_alloc_size);
+ if (!dev-platdata) {
+ ret = -ENOMEM;
+ goto fail_alloc1;
+ }
+ }
/* put dev into parent's successor list */
if (parent)
@@ -103,6 +109,11 @@ fail_bind:
fail_uclass_bind:
if (parent)
list_del(dev-sibling_node);
+ if (dev-flags DM_FLAG_ALLOC_PDATA) {
+ free(dev-platdata);
+ dev-platdata = NULL;
+ }
+fail_alloc1:
free(dev);
return ret;
@@ -148,13 +159,6 @@ int device_probe_child(struct udevice *dev, void
*parent_priv)
}
}
/* Allocate private data if requested */
- if (dev-flags DM_FLAG_ALLOC_PDATA) {
- dev-platdata = calloc(1, drv-platdata_auto_alloc_size);
- if (!dev-platdata) {
- ret = -ENOMEM;
- goto fail;
- }
- }
size = dev-uclass-uc_drv-per_device_auto_alloc_size;
if (size) {
dev-uclass_priv = calloc(1, size);
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index cd2c389..dc4ebf9 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -143,12 +143,12 @@ static int dm_test_fdt(struct dm_test_state *dms)
/* These are num_devices compatible root-level device tree nodes */
ut_asserteq(num_devices, list_count_items(uc-dev_head));
- /* Each should have no platdata / priv */
+ /* Each should have platform data but no private data */
for (i = 0; i num_devices; i++) {
ret = uclass_find_device(UCLASS_TEST_FDT, i, dev);
ut_assert(!ret);
ut_assert(!dev_get_priv(dev));
- ut_assert(!dev-platdata);
+ ut_assert(dev-platdata);
}
ut_assertok(dm_check_devices(dms, num_devices));
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 13/26] dm: spi: Move the per-child data size to the uclass
This is common to all SPI drivers and specifies a structure used by the
uclass. It makes more sense to define it in the uclass.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/spi/cadence_qspi.c | 1 -
drivers/spi/designware_spi.c | 1 -
drivers/spi/exynos_spi.c | 1 -
drivers/spi/sandbox_spi.c| 1 -
drivers/spi/soft_spi.c | 1 -
drivers/spi/spi-uclass.c | 1 +
drivers/spi/tegra114_spi.c | 1 -
drivers/spi/tegra20_sflash.c | 1 -
drivers/spi/tegra20_slink.c | 1 -
9 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 98ae3b8..a75fc46 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -340,6 +340,5 @@ U_BOOT_DRIVER(cadence_spi) = {
.ofdata_to_platdata = cadence_spi_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct cadence_spi_platdata),
.priv_auto_alloc_size = sizeof(struct cadence_spi_priv),
- .per_child_auto_alloc_size = sizeof(struct spi_slave),
.probe = cadence_spi_probe,
};
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 700f616..2624844 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -421,6 +421,5 @@ U_BOOT_DRIVER(dw_spi) = {
.ofdata_to_platdata = dw_spi_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct dw_spi_platdata),
.priv_auto_alloc_size = sizeof(struct dw_spi_priv),
- .per_child_auto_alloc_size = sizeof(struct spi_slave),
.probe = dw_spi_probe,
};
diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c
index f078973..a46d8c1 100644
--- a/drivers/spi/exynos_spi.c
+++ b/drivers/spi/exynos_spi.c
@@ -425,6 +425,5 @@ U_BOOT_DRIVER(exynos_spi) = {
.ofdata_to_platdata = exynos_spi_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct exynos_spi_platdata),
.priv_auto_alloc_size = sizeof(struct exynos_spi_priv),
- .per_child_auto_alloc_size = sizeof(struct spi_slave),
.probe = exynos_spi_probe,
};
diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c
index e717424..bad5660 100644
--- a/drivers/spi/sandbox_spi.c
+++ b/drivers/spi/sandbox_spi.c
@@ -160,6 +160,5 @@ U_BOOT_DRIVER(spi_sandbox) = {
.name = spi_sandbox,
.id = UCLASS_SPI,
.of_match = sandbox_spi_ids,
- .per_child_auto_alloc_size = sizeof(struct spi_slave),
.ops= sandbox_spi_ops,
};
diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c
index 423c98d..9f7d80e 100644
--- a/drivers/spi/soft_spi.c
+++ b/drivers/spi/soft_spi.c
@@ -240,7 +240,6 @@ U_BOOT_DRIVER(soft_spi) = {
.ofdata_to_platdata = soft_spi_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct soft_spi_platdata),
.priv_auto_alloc_size = sizeof(struct soft_spi_priv),
- .per_child_auto_alloc_size = sizeof(struct spi_slave),
.probe = soft_spi_probe,
.child_pre_probe= soft_spi_child_pre_probe,
};
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 35756ad..e5dfb30 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -348,6 +348,7 @@ UCLASS_DRIVER(spi) = {
.post_bind = spi_post_bind,
.post_probe = spi_post_probe,
.per_device_auto_alloc_size = sizeof(struct dm_spi_bus),
+ .per_child_auto_alloc_size = sizeof(struct spi_slave),
};
UCLASS_DRIVER(spi_generic) = {
diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index 2d97625..53ff9ea 100644
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -407,6 +407,5 @@ U_BOOT_DRIVER(tegra114_spi) = {
.ofdata_to_platdata = tegra114_spi_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct tegra_spi_platdata),
.priv_auto_alloc_size = sizeof(struct tegra114_spi_priv),
- .per_child_auto_alloc_size = sizeof(struct spi_slave),
.probe = tegra114_spi_probe,
};
diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 7d0d0f3..78c74cd 100644
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -348,6 +348,5 @@ U_BOOT_DRIVER(tegra20_sflash) = {
.ofdata_to_platdata = tegra20_sflash_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct tegra_spi_platdata),
.priv_auto_alloc_size = sizeof(struct tegra20_sflash_priv),
- .per_child_auto_alloc_size = sizeof(struct spi_slave),
.probe = tegra20_sflash_probe,
};
diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index 213fa5f..597d6ad 100644
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -361,6 +361,5 @@ U_BOOT_DRIVER(tegra30_spi) = {
.ofdata_to_platdata = tegra30_spi_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct tegra_spi_platdata),
.priv_auto_alloc_size = sizeof(struct
[U-Boot] [PATCH v2 05/26] dm: core: Tidy up error handling in device_bind()
Make the error handling more standard to make it easier to build on top of
it. Also correct a bug in the error path where there is no parent.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/core/device.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 963b16f..eca8eda 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -81,18 +81,13 @@ int device_bind(struct udevice *parent, struct driver *drv,
const char *name,
ret = uclass_bind_device(dev);
if (ret)
- goto fail_bind;
+ goto fail_uclass_bind;
/* if we fail to bind we remove device from successors and free it */
if (drv-bind) {
ret = drv-bind(dev);
- if (ret) {
- if (uclass_unbind_device(dev)) {
- dm_warn(Failed to unbind dev '%s' on error
path\n,
- dev-name);
- }
+ if (ret)
goto fail_bind;
- }
}
if (parent)
dm_dbg(Bound device %s to %s\n, dev-name, parent-name);
@@ -101,8 +96,15 @@ int device_bind(struct udevice *parent, struct driver *drv,
const char *name,
return 0;
fail_bind:
- list_del(dev-sibling_node);
+ if (uclass_unbind_device(dev)) {
+ dm_warn(Failed to unbind dev '%s' on error path\n,
+ dev-name);
+ }
+fail_uclass_bind:
+ if (parent)
+ list_del(dev-sibling_node);
free(dev);
+
return ret;
}
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 04/26] dm: core: Set device tree node for root device
The root device corresponds to the root device tree node, so set this up. Also add a few notes to the documentation. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: None doc/driver-model/README.txt | 4 drivers/core/root.c | 3 +++ 2 files changed, 7 insertions(+) diff --git a/doc/driver-model/README.txt b/doc/driver-model/README.txt index eafa825..4041569 100644 --- a/doc/driver-model/README.txt +++ b/doc/driver-model/README.txt @@ -363,6 +363,10 @@ can leave out platdata_auto_alloc_size. In this case you can use malloc in your ofdata_to_platdata (or probe) method to allocate the required memory, and you should free it in the remove method. +The driver model tree is intended to mirror that of the device tree. The +root driver is at device tree offset 0 (the root node, '/'), and its +children are the children of the root node. + Declaring Uclasses -- diff --git a/drivers/core/root.c b/drivers/core/root.c index 47b3acf..a5b0a61 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -49,6 +49,9 @@ int dm_init(void) ret = device_bind_by_name(NULL, false, root_info, DM_ROOT_NON_CONST); if (ret) return ret; +#ifdef CONFIG_OF_CONTROL + DM_ROOT_NON_CONST-of_offset = 0; +#endif ret = device_probe(DM_ROOT_NON_CONST); if (ret) return ret; -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 17/26] dm: spi: Set up the spi_slave device pointer in child_pre_probe()
At present we use struct spi_slave as our device pointer in a lot of places
to avoid changing the old SPI API. At some point this will go away.
But for now, it is better if the SPI uclass sets up this pointer, rather
than relying on passing it into the device when it is probed. We can use the
new uclass child_pre_probe() method to do this.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/spi/spi-uclass.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index e5dfb30..2c134eb 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -108,6 +108,15 @@ int spi_post_probe(struct udevice *dev)
return 0;
}
+int spi_child_pre_probe(struct udevice *dev)
+{
+ struct spi_slave *slave = dev_get_parentdata(dev);
+
+ slave-dev = dev;
+
+ return 0;
+}
+
int spi_chip_select(struct udevice *dev)
{
struct spi_slave *slave = dev_get_parentdata(dev);
@@ -347,6 +356,7 @@ UCLASS_DRIVER(spi) = {
.flags = DM_UC_FLAG_SEQ_ALIAS,
.post_bind = spi_post_bind,
.post_probe = spi_post_probe,
+ .child_pre_probe = spi_child_pre_probe,
.per_device_auto_alloc_size = sizeof(struct dm_spi_bus),
.per_child_auto_alloc_size = sizeof(struct spi_slave),
};
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 20/26] dm: tegra: Drop unused COMPAT features for I2C, SPI
These have moved to driver model so we don't need the fdtdec support.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
include/fdtdec.h | 6 --
lib/fdtdec.c | 6 --
2 files changed, 12 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index f0d2412..094a8e3 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -115,9 +115,6 @@ enum fdt_compat_id {
COMPAT_NVIDIA_TEGRA20_USB, /* Tegra20 USB port */
COMPAT_NVIDIA_TEGRA30_USB, /* Tegra30 USB port */
COMPAT_NVIDIA_TEGRA114_USB, /* Tegra114 USB port */
- COMPAT_NVIDIA_TEGRA114_I2C, /* Tegra114 I2C w/single clock source */
- COMPAT_NVIDIA_TEGRA20_I2C, /* Tegra20 i2c */
- COMPAT_NVIDIA_TEGRA20_DVC, /* Tegra20 dvc (really just i2c) */
COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra20 memory controller */
COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */
COMPAT_NVIDIA_TEGRA20_KBC, /* Tegra20 Keyboard */
@@ -127,9 +124,6 @@ enum fdt_compat_id {
COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */
COMPAT_NVIDIA_TEGRA30_SDMMC,/* Tegra30 SDMMC controller */
COMPAT_NVIDIA_TEGRA20_SDMMC,/* Tegra20 SDMMC controller */
- COMPAT_NVIDIA_TEGRA20_SFLASH, /* Tegra 2 SPI flash controller */
- COMPAT_NVIDIA_TEGRA20_SLINK,/* Tegra 2 SPI SLINK controller */
- COMPAT_NVIDIA_TEGRA114_SPI, /* Tegra 114 SPI controller */
COMPAT_NVIDIA_TEGRA124_PCIE,/* Tegra 124 PCIe controller */
COMPAT_NVIDIA_TEGRA30_PCIE, /* Tegra 30 PCIe controller */
COMPAT_NVIDIA_TEGRA20_PCIE, /* Tegra 20 PCIe controller */
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 3306028..e8aa5e7 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -26,9 +26,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(NVIDIA_TEGRA20_USB, nvidia,tegra20-ehci),
COMPAT(NVIDIA_TEGRA30_USB, nvidia,tegra30-ehci),
COMPAT(NVIDIA_TEGRA114_USB, nvidia,tegra114-ehci),
- COMPAT(NVIDIA_TEGRA114_I2C, nvidia,tegra114-i2c),
- COMPAT(NVIDIA_TEGRA20_I2C, nvidia,tegra20-i2c),
- COMPAT(NVIDIA_TEGRA20_DVC, nvidia,tegra20-i2c-dvc),
COMPAT(NVIDIA_TEGRA20_EMC, nvidia,tegra20-emc),
COMPAT(NVIDIA_TEGRA20_EMC_TABLE, nvidia,tegra20-emc-table),
COMPAT(NVIDIA_TEGRA20_KBC, nvidia,tegra20-kbc),
@@ -38,9 +35,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(NVIDIA_TEGRA124_SDMMC, nvidia,tegra124-sdhci),
COMPAT(NVIDIA_TEGRA30_SDMMC, nvidia,tegra30-sdhci),
COMPAT(NVIDIA_TEGRA20_SDMMC, nvidia,tegra20-sdhci),
- COMPAT(NVIDIA_TEGRA20_SFLASH, nvidia,tegra20-sflash),
- COMPAT(NVIDIA_TEGRA20_SLINK, nvidia,tegra20-slink),
- COMPAT(NVIDIA_TEGRA114_SPI, nvidia,tegra114-spi),
COMPAT(NVIDIA_TEGRA124_PCIE, nvidia,tegra124-pcie),
COMPAT(NVIDIA_TEGRA30_PCIE, nvidia,tegra30-pcie),
COMPAT(NVIDIA_TEGRA20_PCIE, nvidia,tegra20-pcie),
--
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[U-Boot] [PATCH v2 25/26] dm: cros_ec_spi: Remove old pre-driver-model code
This is no-longer needed since all platforms use SPI for cros_ec.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add patches to tidy up cros_ec using new I2C/SPI features
drivers/misc/cros_ec_spi.c | 51 ++
1 file changed, 2 insertions(+), 49 deletions(-)
diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c
index 25a5a04..9359c56 100644
--- a/drivers/misc/cros_ec_spi.c
+++ b/drivers/misc/cros_ec_spi.c
@@ -21,14 +21,9 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_DM_CROS_EC
int cros_ec_spi_packet(struct udevice *udev, int out_bytes, int in_bytes)
{
struct cros_ec_dev *dev = udev-uclass_priv;
-#else
-int cros_ec_spi_packet(struct cros_ec_dev *dev, int out_bytes, int in_bytes)
-{
-#endif
struct spi_slave *slave = dev_get_parentdata(dev-dev);
int rv;
@@ -67,18 +62,11 @@ int cros_ec_spi_packet(struct cros_ec_dev *dev, int
out_bytes, int in_bytes)
* @param din_len Maximum size of response in bytes
* @return number of bytes in response, or -1 on error
*/
-#ifdef CONFIG_DM_CROS_EC
int cros_ec_spi_command(struct udevice *udev, uint8_t cmd, int cmd_version,
const uint8_t *dout, int dout_len,
uint8_t **dinp, int din_len)
{
struct cros_ec_dev *dev = udev-uclass_priv;
-#else
-int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
-const uint8_t *dout, int dout_len,
-uint8_t **dinp, int din_len)
-{
-#endif
struct spi_slave *slave = dev_get_parentdata(dev-dev);
int in_bytes = din_len + 4; /* status, length, checksum, trailer */
uint8_t *out;
@@ -166,46 +154,12 @@ int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t
cmd, int cmd_version,
return len;
}
-#ifndef CONFIG_DM_CROS_EC
-int cros_ec_spi_decode_fdt(struct cros_ec_dev *dev, const void *blob)
-{
- /* Decode interface-specific FDT params */
- dev-max_frequency = fdtdec_get_int(blob, dev-node,
- spi-max-frequency, 50);
- dev-cs = fdtdec_get_int(blob, dev-node, reg, 0);
-
- return 0;
-}
-
-/**
- * Initialize SPI protocol.
- *
- * @param dev CROS_EC device
- * @param blob Device tree blob
- * @return 0 if ok, -1 on error
- */
-int cros_ec_spi_init(struct cros_ec_dev *dev, const void *blob)
-{
- int ret;
-
- ret = spi_setup_slave_fdt(blob, dev-node, dev-parent_node,
- slave);
- if (ret) {
- debug(%s: Could not setup SPI slave\n, __func__);
- return ret;
- }
-
- return 0;
-}
-#endif
-
-#ifdef CONFIG_DM_CROS_EC
-int cros_ec_probe(struct udevice *dev)
+static int cros_ec_probe(struct udevice *dev)
{
return cros_ec_register(dev);
}
-struct dm_cros_ec_ops cros_ec_ops = {
+static struct dm_cros_ec_ops cros_ec_ops = {
.packet = cros_ec_spi_packet,
.command = cros_ec_spi_command,
};
@@ -222,4 +176,3 @@ U_BOOT_DRIVER(cros_ec_spi) = {
.probe = cros_ec_probe,
.ops= cros_ec_ops,
};
-#endif
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 21/26] dm: exynos: Drop unused COMPAT features for SPI
This has moved to driver model so we don't need the fdtdec support.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
include/fdtdec.h | 1 -
lib/fdtdec.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 094a8e3..4cc69de 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -134,7 +134,6 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller */
COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
- COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
COMPAT_GOOGLE_CROS_EC, /* Google CROS_EC Protocol */
COMPAT_GOOGLE_CROS_EC_KEYB, /* Google CROS_EC Keyboard */
COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index e8aa5e7..89dac4c 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -44,7 +44,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_S3C2440_I2C, samsung,s3c2440-i2c),
COMPAT(SAMSUNG_EXYNOS5_SOUND, samsung,exynos-sound),
COMPAT(WOLFSON_WM8994_CODEC, wolfson,wm8994-codec),
- COMPAT(SAMSUNG_EXYNOS_SPI, samsung,exynos-spi),
COMPAT(GOOGLE_CROS_EC, google,cros-ec),
COMPAT(GOOGLE_CROS_EC_KEYB, google,cros-ec-keyb),
COMPAT(SAMSUNG_EXYNOS_EHCI, samsung,exynos-ehci),
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 19/26] dm: i2c: Move slave details to child platdata
At present we go through various contortions to store the I2C's chip
address in its private data. This only exists when the chip is active so
must be set up when it is probed. Until the device is probed we don't
actually record what address it will appear on.
However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the address when the child is bound,
and avoid the messy contortions.
Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/i2c/i2c-uclass-compat.c | 2 +-
drivers/i2c/i2c-uclass.c| 53 +
drivers/i2c/i2c-uniphier-f.c| 12 --
drivers/i2c/i2c-uniphier.c | 12 --
drivers/i2c/s3c24x0_i2c.c | 12 --
drivers/i2c/sandbox_i2c.c | 28 +-
drivers/i2c/tegra_i2c.c | 18 --
include/i2c.h | 4 ++--
8 files changed, 41 insertions(+), 100 deletions(-)
diff --git a/drivers/i2c/i2c-uclass-compat.c b/drivers/i2c/i2c-uclass-compat.c
index d8de46a..223f238 100644
--- a/drivers/i2c/i2c-uclass-compat.c
+++ b/drivers/i2c/i2c-uclass-compat.c
@@ -20,7 +20,7 @@ static int i2c_compat_get_device(uint chip_addr, int alen,
ret = i2c_get_chip_for_busnum(cur_busnum, chip_addr, alen, devp);
if (ret)
return ret;
- chip = dev_get_parentdata(*devp);
+ chip = dev_get_parent_platdata(*devp);
if (chip-offset_len != alen) {
printf(I2C chip %x: requested alen %d does not match chip
offset_len %d\n,
chip_addr, alen, chip-offset_len);
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 94b49df..83c7a04 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -50,7 +50,7 @@ static int i2c_setup_offset(struct dm_i2c_chip *chip, uint
offset,
static int i2c_read_bytewise(struct udevice *dev, uint offset,
uint8_t *buffer, int len)
{
- struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
struct udevice *bus = dev_get_parent(dev);
struct dm_i2c_ops *ops = i2c_get_ops(bus);
struct i2c_msg msg[2], *ptr;
@@ -79,7 +79,7 @@ static int i2c_read_bytewise(struct udevice *dev, uint offset,
static int i2c_write_bytewise(struct udevice *dev, uint offset,
const uint8_t *buffer, int len)
{
- struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
struct udevice *bus = dev_get_parent(dev);
struct dm_i2c_ops *ops = i2c_get_ops(bus);
struct i2c_msg msg[1];
@@ -102,7 +102,7 @@ static int i2c_write_bytewise(struct udevice *dev, uint
offset,
int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
{
- struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
struct udevice *bus = dev_get_parent(dev);
struct dm_i2c_ops *ops = i2c_get_ops(bus);
struct i2c_msg msg[2], *ptr;
@@ -133,7 +133,7 @@ int dm_i2c_read(struct udevice *dev, uint offset, uint8_t
*buffer, int len)
int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
int len)
{
- struct dm_i2c_chip *chip = dev_get_parentdata(dev);
+ struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
struct udevice *bus = dev_get_parent(dev);
struct dm_i2c_ops *ops = i2c_get_ops(bus);
struct i2c_msg msg[1];
@@ -223,7 +223,7 @@ static int i2c_probe_chip(struct udevice *bus, uint
chip_addr,
static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint
offset_len,
struct udevice **devp)
{
- struct dm_i2c_chip chip;
+ struct dm_i2c_chip *chip;
char name[30], *str;
struct udevice *dev;
int ret;
@@ -236,11 +236,11 @@ static int i2c_bind_driver(struct udevice *bus, uint
chip_addr, uint offset_len,
goto err_bind;
/* Tell the device what we know about it */
- memset(chip, '\0', sizeof(chip));
- chip.chip_addr = chip_addr;
- chip.offset_len = offset_len;
- ret = device_probe_child(dev, chip);
- debug(%s: device_probe_child: ret=%d\n, __func__, ret);
+ chip = dev_get_parent_platdata(dev);
+ chip-chip_addr = chip_addr;
+ chip-offset_len = offset_len;
+ ret = device_probe(dev);
+ debug(%s: device_probe: ret=%d\n, __func__, ret);
if (ret)
goto err_probe;
@@ -248,6 +248,10 @@ static int i2c_bind_driver(struct udevice *bus, uint
chip_addr, uint offset_len,
return 0;
err_probe:
+ /*
+* If the device failed to probe, unbind it. There is nothing there
+
[U-Boot] [PATCH v2 18/26] dm: spi: Move slave details to child platdata
At present we go through various contortions to store the SPI slave's chip
select in its private data. This only exists when the slave is active so
must be set up when it is probed. Until the device is probed we don't
actually know what chip select it will appear on.
However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the chip select when the child is bound,
and avoid the messy contortions.
Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add a TODO to remove struct dm_spi_bus
- Add additional comments to spi.h
- Copy max_hz and mode from platdata to spi_slave when probing
- Tidy up soft_spi driver also
drivers/misc/cros_ec_spi.c | 19 ---
drivers/mtd/spi/sandbox.c | 5 +++
drivers/mtd/spi/sf_probe.c | 3 +-
drivers/spi/soft_spi.c | 9 -
drivers/spi/spi-uclass.c | 83 +++---
include/spi.h | 42 +--
test/dm/spi.c | 6 ++--
7 files changed, 91 insertions(+), 76 deletions(-)
diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c
index e6dba29..25a5a04 100644
--- a/drivers/misc/cros_ec_spi.c
+++ b/drivers/misc/cros_ec_spi.c
@@ -202,25 +202,6 @@ int cros_ec_spi_init(struct cros_ec_dev *dev, const void
*blob)
#ifdef CONFIG_DM_CROS_EC
int cros_ec_probe(struct udevice *dev)
{
- struct spi_slave *slave = dev_get_parentdata(dev);
- int ret;
-
- /*
-* TODO(s...@chromium.org)
-*
-* This is really horrible at present. It is an artifact of removing
-* the child_pre_probe() method for SPI. Everything here could go in
-* an automatic function, except that spi_get_bus_and_cs() wants to
-* set it up manually and call device_probe_child().
-*
-* The solution may be to re-enable the child_pre_probe() method for
-* SPI and have it do nothing if the child is already passed in via
-* device_probe_child().
-*/
- slave-dev = dev;
- ret = spi_ofdata_to_platdata(gd-fdt_blob, dev-of_offset, slave);
- if (ret)
- return ret;
return cros_ec_register(dev);
}
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 106dda9..d576d31 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -590,6 +590,11 @@ int sandbox_sf_bind_emul(struct sandbox_state *state, int
busnum, int cs,
void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs)
{
+ struct udevice *dev;
+
+ dev = state-spi[busnum][cs].emul;
+ device_remove(dev);
+ device_unbind(dev);
state-spi[busnum][cs].emul = NULL;
}
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index ce9987f..4103723 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -481,11 +481,12 @@ int spi_flash_std_erase(struct udevice *dev, u32 offset,
size_t len)
int spi_flash_std_probe(struct udevice *dev)
{
struct spi_slave *slave = dev_get_parentdata(dev);
+ struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
struct spi_flash *flash;
flash = dev-uclass_priv;
flash-dev = dev;
- debug(%s: slave=%p, cs=%d\n, __func__, slave, slave-cs);
+ debug(%s: slave=%p, cs=%d\n, __func__, slave, plat-cs);
return spi_flash_probe_slave(slave, flash);
}
diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c
index 9f7d80e..6ae45f5 100644
--- a/drivers/spi/soft_spi.c
+++ b/drivers/spi/soft_spi.c
@@ -179,14 +179,6 @@ static int soft_spi_set_mode(struct udevice *dev, unsigned
int mode)
return 0;
}
-static int soft_spi_child_pre_probe(struct udevice *dev)
-{
- struct spi_slave *slave = dev_get_parentdata(dev);
-
- slave-dev = dev;
- return spi_ofdata_to_platdata(gd-fdt_blob, dev-of_offset, slave);
-}
-
static const struct dm_spi_ops soft_spi_ops = {
.claim_bus = soft_spi_claim_bus,
.release_bus= soft_spi_release_bus,
@@ -241,5 +233,4 @@ U_BOOT_DRIVER(soft_spi) = {
.platdata_auto_alloc_size = sizeof(struct soft_spi_platdata),
.priv_auto_alloc_size = sizeof(struct soft_spi_priv),
.probe = soft_spi_probe,
- .child_pre_probe= soft_spi_child_pre_probe,
};
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 2c134eb..63a6217 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -98,11 +98,21 @@ int spi_post_bind(struct udevice *dev)
return dm_scan_fdt_node(dev, gd-fdt_blob, dev-of_offset, false);
}
-int spi_post_probe(struct udevice *dev)
+int spi_child_post_bind(struct udevice *dev)
{
- struct dm_spi_bus *spi = dev-uclass_priv;
+ struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
- spi-max_hz =
[U-Boot] [PATCH v2 24/26] dm: cros_ec: Move cros_ec_i2c over to driver model
Update the driver model support, and remove the old code. Change snow to
use this new support.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add patches to tidy up cros_ec using new I2C/SPI features
drivers/misc/cros_ec_i2c.c | 107 +
include/configs/snow.h | 5 +++
2 files changed, 45 insertions(+), 67 deletions(-)
diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c
index 513cdb1..c9d1b49 100644
--- a/drivers/misc/cros_ec_i2c.c
+++ b/drivers/misc/cros_ec_i2c.c
@@ -14,20 +14,16 @@
*/
#include common.h
+#include dm.h
+#include errno.h
#include i2c.h
#include cros_ec.h
-#ifdef DEBUG_TRACE
-#define debug_trace(fmt, b...) debug(fmt, #b)
-#else
-#define debug_trace(fmt, b...)
-#endif
-
-int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+int cros_ec_i2c_command(struct udevice *udev, uint8_t cmd, int cmd_version,
const uint8_t *dout, int dout_len,
uint8_t **dinp, int din_len)
{
- int old_bus = 0;
+ struct cros_ec_dev *dev = udev-uclass_priv;
/* version8, cmd8, arglen8, out8[dout_len], csum8 */
int out_bytes = dout_len + 4;
/* response8, arglen8, in8[din_len], checksum8 */
@@ -37,19 +33,17 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t
cmd, int cmd_version,
uint8_t *in_ptr;
int len, csum, ret;
- old_bus = i2c_get_bus_num();
-
/*
* Sanity-check I/O sizes given transaction overhead in internal
* buffers.
*/
if (out_bytes sizeof(dev-dout)) {
debug(%s: Cannot send %d bytes\n, __func__, dout_len);
- return -1;
+ return -ENOSPC;
}
if (in_bytes sizeof(dev-din)) {
debug(%s: Cannot receive %d bytes\n, __func__, din_len);
- return -1;
+ return -ENOSPC;
}
assert(dout_len = 0);
assert(dinp);
@@ -72,7 +66,7 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd,
int cmd_version,
/* Something we don't support */
debug(%s: Protocol version %d unsupported\n,
__func__, dev-protocol_version);
- return -1;
+ return -EPROTONOSUPPORT;
}
*ptr++ = EC_CMD_VERSION0 + cmd_version;
@@ -86,36 +80,18 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t
cmd, int cmd_version,
*ptr++ = (uint8_t)
cros_ec_calc_checksum(dev-dout, dout_len + 3);
- /* Set to the proper i2c bus */
- if (i2c_set_bus_num(dev-bus_num)) {
- debug(%s: Cannot change to I2C bus %d\n, __func__,
- dev-bus_num);
- return -1;
- }
-
/* Send output data */
cros_ec_dump_data(out, -1, dev-dout, out_bytes);
- ret = i2c_write(dev-addr, 0, 0, dev-dout, out_bytes);
- if (ret) {
- debug(%s: Cannot complete I2C write to 0x%x\n,
- __func__, dev-addr);
- ret = -1;
- }
+ ret = dm_i2c_write(udev, 0, dev-dout, out_bytes);
+ if (ret)
+ debug(%s: Cannot complete I2C write\n, udev-name);
if (!ret) {
- ret = i2c_read(dev-addr, 0, 0, in_ptr, in_bytes);
- if (ret) {
- debug(%s: Cannot complete I2C read from 0x%x\n,
- __func__, dev-addr);
- ret = -1;
- }
+ ret = dm_i2c_read(udev, 0, in_ptr, in_bytes);
+ if (ret)
+ debug(%s: Cannot complete I2C read\n, udev-name);
}
- /* Return to original bus number */
- i2c_set_bus_num(old_bus);
- if (ret)
- return ret;
-
if (*in_ptr != EC_RES_SUCCESS) {
debug(%s: Received bad result code %d\n, __func__, *in_ptr);
return -(int)*in_ptr;
@@ -125,13 +101,13 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t
cmd, int cmd_version,
if (len + 3 sizeof(dev-din)) {
debug(%s: Received length %#02x too large\n,
__func__, len);
- return -1;
+ return -ENOSPC;
}
csum = cros_ec_calc_checksum(in_ptr, 2 + len);
if (csum != in_ptr[2 + len]) {
debug(%s: Invalid checksum rx %#02x, calced %#02x\n,
__func__, in_ptr[2 + din_len], csum);
- return -1;
+ return -EBADMSG;
}
din_len = min(din_len, len);
cros_ec_dump_data(in, -1, in_ptr, din_len + 3);
@@ -142,35 +118,32 @@ int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t
cmd, int cmd_version,
return din_len;
}
-int cros_ec_i2c_decode_fdt(struct cros_ec_dev *dev, const void *blob)
+static int cros_ec_probe(struct udevice *dev)
{
- /* Decode
[U-Boot] [PATCH v3 01/12] x86: dts: Add compatible string for Intel ICH9 SPI controller
Add this to the enum so that we can use the various fdtdec functions. A
later commit will move this driver to driver model.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Use intel,ich-spi as the compatible string
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 75af750..8c2bd21 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -173,6 +173,7 @@ enum fdt_compat_id {
COMPAT_INTEL_MODEL_206AX, /* Intel Model 206AX CPU */
COMPAT_INTEL_GMA, /* Intel Graphics Media Accelerator */
COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */
+ COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 487122e..e989241 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -83,6 +83,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(INTEL_MODEL_206AX, intel,model-206ax),
COMPAT(INTEL_GMA, intel,gma),
COMPAT(AMS_AS3722, ams,as3722),
+ COMPAT(INTEL_ICH_SPI, intel,ich-spi),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v3 02/12] net: Add a separate file for IP checksumming
Move the checksum code out into its own file so it can be used elsewhere.
Also use a new version which supports a length which is not a multiple of
2 and add a new function to add two checksums.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Add new patch to move checksum to its own file in net/
Changes in v2: None
include/net.h | 30 +
net/Makefile | 1 +
net/checksum.c | 60 ++
3 files changed, 91 insertions(+)
create mode 100644 net/checksum.c
diff --git a/include/net.h b/include/net.h
index 3da35fe..73ea88b 100644
--- a/include/net.h
+++ b/include/net.h
@@ -482,6 +482,36 @@ extern void net_set_ip_header(uchar *pkt, IPaddr_t dest,
IPaddr_t source);
extern void net_set_udp_header(uchar *pkt, IPaddr_t dest, int dport,
int sport, int len);
+/**
+ * compute_ip_checksum() - Compute IP checksum
+ *
+ * @addr: Address to check (must be 16-bit aligned)
+ * @nbytes:Number of bytes to check (normally a multiple of 2)
+ * @return 16-bit IP checksum
+ */
+unsigned compute_ip_checksum(const void *addr, unsigned nbytes);
+
+/**
+ * add_ip_checksums() - add two IP checksums
+ *
+ * @offset:Offset of first sum (if odd we do a byte-swap)
+ * @sum: First checksum
+ * @new_sum: New checksum to add
+ * @return updated 16-bit IP checksum
+ */
+unsigned add_ip_checksums(unsigned offset, unsigned sum, unsigned new_sum);
+
+/**
+ * ip_checksum_ok() - check if a checksum is correct
+ *
+ * This works by making sure the checksum sums to 0
+ *
+ * @addr: Address to check (must be 16-bit aligned)
+ * @nbytes:Number of bytes to check (normally a multiple of 2)
+ * @return true if the checksum matches, false if not
+ */
+int ip_checksum_ok(const void *addr, unsigned nbytes);
+
/* Checksum */
extern int NetCksumOk(uchar *, int); /* Return true if cksum OK */
extern uintNetCksum(uchar *, int); /* Calculate the checksum */
diff --git a/net/Makefile b/net/Makefile
index 9425950..e9cc8ad 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -7,6 +7,7 @@
#ccflags-y += -DDEBUG
+obj-y += checksum.o
obj-$(CONFIG_CMD_NET) += arp.o
obj-$(CONFIG_CMD_NET) += bootp.o
obj-$(CONFIG_CMD_CDP) += cdp.o
diff --git a/net/checksum.c b/net/checksum.c
new file mode 100644
index 000..a8c9ff5
--- /dev/null
+++ b/net/checksum.c
@@ -0,0 +1,60 @@
+/*
+ * This file was originally taken from the FreeBSD project.
+ *
+ * Copyright (c) 2001 Charles Mott c...@linktel.net
+ * Copyright (c) 2008 coresystems GmbH
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier:BSD-2-Clause
+ */
+
+#include common.h
+#include net.h
+
+unsigned compute_ip_checksum(const void *vptr, unsigned nbytes)
+{
+ int sum, oddbyte;
+ const unsigned short *ptr = vptr;
+
+ sum = 0;
+ while (nbytes 1) {
+ sum += *ptr++;
+ nbytes -= 2;
+ }
+ if (nbytes == 1) {
+ oddbyte = 0;
+ ((u8 *)oddbyte)[0] = *(u8 *)ptr;
+ ((u8 *)oddbyte)[1] = 0;
+ sum += oddbyte;
+ }
+ sum = (sum 16) + (sum 0x);
+ sum += (sum 16);
+ sum = ~sum 0x;
+
+ return sum;
+}
+
+unsigned add_ip_checksums(unsigned offset, unsigned sum, unsigned new)
+{
+ unsigned long checksum;
+
+ sum = ~sum 0x;
+ new = ~new 0x;
+ if (offset 1) {
+ /*
+* byte-swap the sum if it came from an odd offset; since the
+* computation is endian independant this works.
+*/
+ new = ((new 8) 0xff) | ((new 8) 0xff00);
+ }
+ checksum = sum + new;
+ if (checksum 0x)
+ checksum -= 0x;
+
+ return (~checksum) 0x;
+}
+
+int ip_checksum_ok(const void *addr, unsigned nbytes)
+{
+ return !(compute_ip_checksum(addr, nbytes) 0xfffe);
+}
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v3 08/12] x86: dts: Add SPI flash MRC details for chromebook_link
Correct the SPI flash compatible string, add an alias and specify the
position of the MRC cache, used to store SDRAM training settings for the
Memory Reference Code.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Drop accidental creation of link.dts due to bad rebase
Changes in v2:
- Make changes to chromebook_link.dts since link.dts is gone
- Use intel,ich-spi as the compatible string
arch/x86/dts/chromebook_link.dts | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index 9490b16..45ada61 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -7,6 +7,10 @@
model = Google Link;
compatible = google,link, intel,celeron-ivybridge;
+ aliases {
+ spi0 = /spi;
+ };
+
config {
silent_console = 0;
};
@@ -150,11 +154,20 @@
spi {
#address-cells = 1;
#size-cells = 0;
- compatible = intel,ich9;
+ compatible = intel,ich-spi;
spi-flash@0 {
+ #size-cells = 1;
+ #address-cells = 1;
reg = 0;
compatible = winbond,w25q64, spi-flash;
memory-map = 0xff80 0x0080;
+ rw-mrc-cache {
+ label = rw-mrc-cache;
+ /* Alignment: 4k (for updating) */
+ reg = 0x003e 0x0001;
+ type = wiped;
+ wipe-value = [ff];
+ };
};
};
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v3 09/12] x86: Implement a cache for Memory Reference Code parameters
The memory reference code takes a very long time to 'train' its SDRAM
interface, around half a second. To avoid this delay on every boot we can
store the parameters from the last training sessions to speed up the next.
Add an implementation of this, storing the training data in CMOS RAM and
SPI flash.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Use checksum code from net/checksum.c
Changes in v2:
- Update for the new CMOS RAM access functions in the RTC
- Add a comment about why both CMOS RAM and SPI flash are used for the cache
arch/x86/cpu/ivybridge/Makefile| 1 +
arch/x86/cpu/ivybridge/mrccache.c | 156 +++
arch/x86/cpu/ivybridge/sdram.c | 253 +
arch/x86/include/asm/arch-ivybridge/mrccache.h | 51 +
arch/x86/include/asm/global_data.h | 3 +
5 files changed, 464 insertions(+)
create mode 100644 arch/x86/cpu/ivybridge/mrccache.c
create mode 100644 arch/x86/include/asm/arch-ivybridge/mrccache.h
diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile
index 0c7efae..3576b83 100644
--- a/arch/x86/cpu/ivybridge/Makefile
+++ b/arch/x86/cpu/ivybridge/Makefile
@@ -14,6 +14,7 @@ obj-y += lpc.o
obj-y += me_status.o
obj-y += model_206ax.o
obj-y += microcode_intel.o
+obj-y += mrccache.o
obj-y += northbridge.o
obj-y += pch.o
obj-y += pci.o
diff --git a/arch/x86/cpu/ivybridge/mrccache.c
b/arch/x86/cpu/ivybridge/mrccache.c
new file mode 100644
index 000..0f1a64b
--- /dev/null
+++ b/arch/x86/cpu/ivybridge/mrccache.c
@@ -0,0 +1,156 @@
+/*
+ * From Coreboot src/southbridge/intel/bd82x6x/mrccache.c
+ *
+ * Copyright (C) 2014 Google Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include common.h
+#include errno.h
+#include fdtdec.h
+#include net.h
+#include spi.h
+#include spi_flash.h
+#include asm/arch/mrccache.h
+#include asm/arch/sandybridge.h
+
+static struct mrc_data_container *next_mrc_block(
+ struct mrc_data_container *mrc_cache)
+{
+ /* MRC data blocks are aligned within the region */
+ u32 mrc_size = sizeof(*mrc_cache) + mrc_cache-data_size;
+ if (mrc_size (MRC_DATA_ALIGN - 1UL)) {
+ mrc_size = ~(MRC_DATA_ALIGN - 1UL);
+ mrc_size += MRC_DATA_ALIGN;
+ }
+
+ u8 *region_ptr = (u8 *)mrc_cache;
+ region_ptr += mrc_size;
+ return (struct mrc_data_container *)region_ptr;
+}
+
+static int is_mrc_cache(struct mrc_data_container *cache)
+{
+ return cache (cache-signature == MRC_DATA_SIGNATURE);
+}
+
+/*
+ * Find the largest index block in the MRC cache. Return NULL if none is
+ * found.
+ */
+struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry)
+{
+ struct mrc_data_container *cache, *next;
+ ulong base_addr, end_addr;
+ uint id;
+
+ base_addr = (1ULL 32) - CONFIG_ROM_SIZE + entry-offset;
+ end_addr = base_addr + entry-length;
+ cache = NULL;
+
+ /* Search for the last filled entry in the region */
+ for (id = 0, next = (struct mrc_data_container *)base_addr;
+is_mrc_cache(next);
+id++) {
+ cache = next;
+ next = next_mrc_block(next);
+ if ((ulong)next = end_addr)
+ break;
+ }
+
+ if (id-- == 0) {
+ debug(%s: No valid MRC cache found.\n, __func__);
+ return NULL;
+ }
+
+ /* Verify checksum */
+ if (cache-checksum != compute_ip_checksum(cache-data,
+ cache-data_size)) {
+ printf(%s: MRC cache checksum mismatch\n, __func__);
+ return NULL;
+ }
+
+ debug(%s: picked entry %u from cache block\n, __func__, id);
+
+ return cache;
+}
+
+/**
+ * find_next_mrc_cache() - get next cache entry
+ *
+ * @entry: MRC cache flash area
+ * @cache: Entry to start from
+ *
+ * @return next cache entry if found, NULL if we got to the end
+ */
+static struct mrc_data_container *find_next_mrc_cache(struct fmap_entry *entry,
+ struct mrc_data_container *cache)
+{
+ ulong base_addr, end_addr;
+
+ base_addr = (1ULL 32) - CONFIG_ROM_SIZE + entry-offset;
+ end_addr = base_addr + entry-length;
+
+ cache = next_mrc_block(cache);
+ if ((ulong)cache = end_addr) {
+ /* Crossed the boundary */
+ cache = NULL;
+ debug(%s: no available entries found\n, __func__);
+ } else {
+ debug(%s: picked next entry from cache block at %p\n,
+ __func__, cache);
+ }
+
+ return cache;
+}
+
+int mrccache_update(struct spi_flash *sf, struct fmap_entry *entry,
+ struct mrc_data_container *cur)
+{
+ struct mrc_data_container *cache;
+ ulong offset;
+ ulong base_addr;
+ int ret;
+
+ /* Find the last used block */
+
[U-Boot] [PATCH v3 0/12] Add support for caching Memory Reference Code data
Since the memory reference code is so slow on x86, add a feature to bypass this, storing the previous parameters in SPI flash. This saves around 500ms on each boot. Also enable a SPI flash environment. Changes in v3: - Add new patch to move checksum to its own file in net/ - Adjust net/ code to use the new checksum functions - Use checksum code that is now in net/checksum.c - Adjust functions to remain compatible with other RTC drivers - Drop accidental creation of link.dts due to bad rebase - Use checksum code from net/checksum.c - Add misc_init_r() call for link now that it is shared with chromebook_link Changes in v2: - Use intel,ich-spi as the compatible string - Refactor IP checksum patches - Adjust the mc146818 driver instead of adding a new cmos.h header - Make changes to chromebook_link.dts since link.dts is gone - Use intel,ich-spi as the compatible string - Update for the new CMOS RAM access functions in the RTC - Add a comment about why both CMOS RAM and SPI flash are used for the cache Simon Glass (12): x86: dts: Add compatible string for Intel ICH9 SPI controller net: Add a separate file for IP checksumming net: Use new checksum functions x86: Use ipchecksum from net/ x86: rtc: mc146818: Add helpers to read/write CMOS RAM x86: spi: Add device tree support Allow architecture-specific memory reservation x86: dts: Add SPI flash MRC details for chromebook_link x86: Implement a cache for Memory Reference Code parameters x86: config: Enable hook for saving MRC configuration x86: ivybridge: Drop the Kconfig MRC cache information x86: config: chromebook_link: Enable environment arch/x86/cpu/coreboot/Makefile | 1 - arch/x86/cpu/coreboot/coreboot.c| 5 + arch/x86/cpu/coreboot/ipchecksum.c | 55 -- arch/x86/cpu/coreboot/tables.c | 8 +- arch/x86/cpu/ivybridge/Kconfig | 28 --- arch/x86/cpu/ivybridge/Makefile | 1 + arch/x86/cpu/ivybridge/mrccache.c | 156 +++ arch/x86/cpu/ivybridge/sdram.c | 253 arch/x86/dts/chromebook_link.dts| 15 +- arch/x86/include/asm/arch-coreboot/ipchecksum.h | 37 arch/x86/include/asm/arch-ivybridge/mrccache.h | 51 + arch/x86/include/asm/global_data.h | 3 + common/board_f.c| 7 + drivers/rtc/mc146818.c | 121 +++- drivers/spi/ich.c | 7 + include/configs/chromebook_link.h | 8 + include/configs/x86-common.h| 1 + include/fdtdec.h| 1 + include/net.h | 32 ++- include/rtc.h | 32 +++ lib/fdtdec.c| 1 + net/Makefile| 1 + net/checksum.c | 60 ++ net/net.c | 25 +-- net/ping.c | 10 +- 25 files changed, 713 insertions(+), 206 deletions(-) delete mode 100644 arch/x86/cpu/coreboot/ipchecksum.c create mode 100644 arch/x86/cpu/ivybridge/mrccache.c delete mode 100644 arch/x86/include/asm/arch-coreboot/ipchecksum.h create mode 100644 arch/x86/include/asm/arch-ivybridge/mrccache.h create mode 100644 net/checksum.c -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 3/5] common/board_r: manual relocation for cmd table
Hi Andreas,
On 19 January 2015 at 16:29, Andreas Bießmann
andreas.de...@googlemail.com wrote:
This is required for architectures still need manual relocation like avr32,
mk68
and others.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
common/board_r.c | 12
1 file changed, 12 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index a301cc2..e712902 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -294,6 +294,15 @@ static int initr_announce(void)
return 0;
}
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+static int initr_manual_reloc_cmdtable(void)
+{
+ fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
+ ll_entry_count(cmd_tbl_t, cmd));
+ return 0;
+}
+#endif
+
#if !defined(CONFIG_SYS_NO_FLASH)
static int initr_flash(void)
{
@@ -718,6 +727,9 @@ init_fnc_t init_sequence_r[] = {
initr_serial,
initr_announce,
INIT_FUNC_WATCHDOG_RESET
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+ initr_manual_reloc_cmdtable,
+#endif
#ifdef CONFIG_PPC
initr_trap,
#endif
--
Reviewed-by: Simon Glass s...@chromium.org
Why do you need manual reloc? Is this a toolchain bug?
Regards,
Simon
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[U-Boot] [PATCH v2 11/26] dm: core: Add a flag to control sequence numbering
At present we try to use the 'reg' property and device tree aliases to give
devices a sequence number. The 'reg' property is often actually a memory
address, so the sequence numbers thus-obtained are not useful. It would be
better if the devices were just sequentially numbered in that case. In fact
neither I2C nor SPI use this feature, so drop it.
Some devices need us to look up an alias to number them within the uclass.
Add a flag to control this, so it is not done unless it is needed.
Adjust the tests to test this new behaviour.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
doc/driver-model/README.txt| 51 +++---
drivers/core/device.c | 28 +++
drivers/i2c/i2c-uclass.c | 1 +
drivers/serial/serial-uclass.c | 1 +
drivers/spi/spi-uclass.c | 1 +
include/dm/uclass.h| 5 +
test/dm/bus.c | 3 ++-
test/dm/test-fdt.c | 9
test/dm/test.dts | 16 +
9 files changed, 57 insertions(+), 58 deletions(-)
diff --git a/doc/driver-model/README.txt b/doc/driver-model/README.txt
index 4041569..2fc900b 100644
--- a/doc/driver-model/README.txt
+++ b/doc/driver-model/README.txt
@@ -388,12 +388,12 @@ Device Sequence Numbers
U-Boot numbers devices from 0 in many situations, such as in the command
line for I2C and SPI buses, and the device names for serial ports (serial0,
serial1, ...). Driver model supports this numbering and permits devices
-to be locating by their 'sequence'. This numbering unique identifies a
+to be locating by their 'sequence'. This numbering uniquely identifies a
device in its uclass, so no two devices within a particular uclass can have
the same sequence number.
Sequence numbers start from 0 but gaps are permitted. For example, a board
-may have I2C buses 0, 1, 4, 5 but no 2 or 3. The choice of how devices are
+may have I2C buses 1, 4, 5 but no 0, 2 or 3. The choice of how devices are
numbered is up to a particular board, and may be set by the SoC in some
cases. While it might be tempting to automatically renumber the devices
where there are gaps in the sequence, this can lead to confusion and is
@@ -403,7 +403,7 @@ Each device can request a sequence number. If none is
required then the
device will be automatically allocated the next available sequence number.
To specify the sequence number in the device tree an alias is typically
-used.
+used. Make sure that the uclass has the DM_UC_FLAG_SEQ_ALIAS flag set.
aliases {
serial2 = /serial@2223;
@@ -413,43 +413,18 @@ This indicates that in the uclass called serial, the
named node
(/serial@2223) will be given sequence number 2. Any command or driver
which requests serial device 2 will obtain this device.
-Some devices represent buses where the devices on the bus are numbered or
-addressed. For example, SPI typically numbers its slaves from 0, and I2C
-uses a 7-bit address. In these cases the 'reg' property of the subnode is
-used, for example:
+More commonly you can use phandles:
-{
- aliases {
- spi2 = /spi@2230;
- };
-
- spi@2230 {
- #address-cells = 1;
- #size-cells = 1;
- spi-flash@0 {
- reg = 0;
- ...
- }
- eeprom@1 {
- reg = 1;
- };
- };
-
-In this case we have a SPI bus with two slaves at 0 and 1. The SPI bus
-itself is numbered 2. So we might access the SPI flash with:
-
- sf probe 2:0
-
-and the eeprom with
-
- sspi 2:1 32 ef
-
-These commands simply need to look up the 2nd device in the SPI uclass to
-find the right SPI bus. Then, they look at the children of that bus for the
-right sequence number (0 or 1 in this case).
+aliases {
+ serial2 = serial_2;
+};
+...
+serial_2: serial@2223 {
+...
+};
-Typically the alias method is used for top-level nodes and the 'reg' method
-is used only for buses.
+The alias resolves to the same string in this case, but this version is
+easier to read.
Device sequence numbers are resolved when a device is probed. Before then
the sequence number is only a request which may or may not be honoured,
diff --git a/drivers/core/device.c b/drivers/core/device.c
index c284730..a149a7a 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -53,24 +53,22 @@ int device_bind(struct udevice *parent, struct driver *drv,
const char *name,
dev-driver = drv;
dev-uclass = uc;
- /*
-* For some devices, such as a SPI or I2C bus, the 'reg' property
-* is a reasonable indicator of the sequence number. But if there is
-* an alias, we use that in preference. In any case, this is just
-* a 'requested' sequence, and will be resolved (and -seq updated)
-* when the device is probed.
-*/
dev-seq = -1;
+
[U-Boot] [PATCH v2 23/26] dm: cros_ec: Don't require protocol 3 support
I2C is now deprecated on ARM platforms and there are no devices that use it
with the v3 protocol. We can't require v3 support if we want to support I2C.
Adjust the error handling to suit.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add patches to tidy up cros_ec using new I2C/SPI features
drivers/misc/cros_ec.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index 7b20ffc..5846e76 100644
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -154,7 +154,9 @@ static int prepare_proto3_response_buffer(struct
cros_ec_dev *dev, int din_len)
* @param dev CROS-EC device
* @param dinp Returns pointer to response data
* @param din_len Maximum size of response in bytes
- * @return number of bytes of response data, or 0 if error
+ * @return number of bytes of response data, or 0 if error. Note that error
+ * codes can be from errno.h or -ve EC_RES_INVALID_CHECKSUM values (and they
+ * overlap!)
*/
static int handle_proto3_response(struct cros_ec_dev *dev,
uint8_t **dinp, int din_len)
@@ -228,7 +230,7 @@ static int send_command_proto3(struct cros_ec_dev *dev,
#ifdef CONFIG_DM_CROS_EC
ops = dm_cros_ec_get_ops(dev-dev);
- rv = ops-packet(dev-dev, out_bytes, in_bytes);
+ rv = ops-packet ? ops-packet(dev-dev, out_bytes, in_bytes) : -ENOSYS;
#else
switch (dev-interface) {
#ifdef CONFIG_CROS_EC_SPI
@@ -320,7 +322,7 @@ static int send_command(struct cros_ec_dev *dev, uint8_t
cmd, int cmd_version,
* If not NULL, it will be updated to point to the data
* and will always be double word aligned (64-bits)
* @param din_len Maximum size of response in bytes
- * @return number of bytes in response, or -1 on error
+ * @return number of bytes in response, or -ve on error
*/
static int ec_command_inptr(struct cros_ec_dev *dev, uint8_t cmd,
int cmd_version, const void *dout, int dout_len, uint8_t **dinp,
@@ -387,7 +389,7 @@ static int ec_command_inptr(struct cros_ec_dev *dev,
uint8_t cmd,
* It not NULL, it is a place for ec_command() to copy the
* data to.
* @param din_len Maximum size of response in bytes
- * @return number of bytes in response, or -1 on error
+ * @return number of bytes in response, or -ve on error
*/
static int ec_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
const void *dout, int dout_len,
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 22/26] dm: core: Ignore disabled devices when binding
We don't want to bind devices which should never be used.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add patches to tidy up cros_ec using new I2C/SPI features
drivers/core/root.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/core/root.c b/drivers/core/root.c
index a5b0a61..73e3c72 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -9,6 +9,7 @@
#include common.h
#include errno.h
+#include fdtdec.h
#include malloc.h
#include libfdt.h
#include dm/device.h
@@ -92,6 +93,10 @@ int dm_scan_fdt_node(struct udevice *parent, const void
*blob, int offset,
if (pre_reloc_only
!fdt_getprop(blob, offset, u-boot,dm-pre-reloc, NULL))
continue;
+ if (!fdtdec_get_is_enabled(blob, offset)) {
+ dm_dbg( - ignoring disabled device\n);
+ continue;
+ }
err = lists_bind_fdt(parent, blob, offset, NULL);
if (err !ret)
ret = err;
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 09/26] dm: core: Add a post_bind method for parents
Allow parent drivers to be called when a new child is bound to them. This
allows a bus to set up information it needs for that child.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/core/device.c | 12
include/dm/device.h | 2 ++
test/dm/bus.c | 35 +++
3 files changed, 49 insertions(+)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 8791688..aa54575 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -111,12 +111,24 @@ int device_bind(struct udevice *parent, struct driver
*drv, const char *name,
if (ret)
goto fail_bind;
}
+ if (parent parent-driver-child_post_bind) {
+ ret = parent-driver-child_post_bind(dev);
+ if (ret)
+ goto fail_child_post_bind;
+ }
+
if (parent)
dm_dbg(Bound device %s to %s\n, dev-name, parent-name);
*devp = dev;
return 0;
+fail_child_post_bind:
+ if (drv-unbind drv-unbind(dev)) {
+ dm_warn(unbind() method failed on dev '%s' on error path\n,
+ dev-name);
+ }
+
fail_bind:
if (uclass_unbind_device(dev)) {
dm_warn(Failed to unbind dev '%s' on error path\n,
diff --git a/include/dm/device.h b/include/dm/device.h
index 096d84b..50f1b4f 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -132,6 +132,7 @@ struct udevice_id {
* @remove: Called to remove a device, i.e. de-activate it
* @unbind: Called to unbind a device from its driver
* @ofdata_to_platdata: Called before probe to decode device tree data
+ * @child_post_bind: Called after a new child has been bound
* @child_pre_probe: Called before a child device is probed. The device has
* memory allocated but it has not yet been probed.
* @child_post_remove: Called after a child device is removed. The device
@@ -168,6 +169,7 @@ struct driver {
int (*remove)(struct udevice *dev);
int (*unbind)(struct udevice *dev);
int (*ofdata_to_platdata)(struct udevice *dev);
+ int (*child_post_bind)(struct udevice *dev);
int (*child_pre_probe)(struct udevice *dev);
int (*child_post_remove)(struct udevice *dev);
int priv_auto_alloc_size;
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 26b8293..e18a6f7 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -17,6 +17,7 @@ DECLARE_GLOBAL_DATA_PTR;
struct dm_test_parent_platdata {
int count;
+ int bind_flag;
};
enum {
@@ -31,6 +32,16 @@ static int testbus_drv_probe(struct udevice *dev)
return dm_scan_fdt_node(dev, gd-fdt_blob, dev-of_offset, false);
}
+static int testbus_child_post_bind(struct udevice *dev)
+{
+ struct dm_test_parent_platdata *plat;
+
+ plat = dev_get_parent_platdata(dev);
+ plat-bind_flag = 1;
+
+ return 0;
+}
+
static int testbus_child_pre_probe(struct udevice *dev)
{
struct dm_test_parent_data *parent_data = dev_get_parentdata(dev);
@@ -64,6 +75,7 @@ U_BOOT_DRIVER(testbus_drv) = {
.of_match = testbus_ids,
.id = UCLASS_TEST_BUS,
.probe = testbus_drv_probe,
+ .child_post_bind = testbus_child_post_bind,
.priv_auto_alloc_size = sizeof(struct dm_test_priv),
.platdata_auto_alloc_size = sizeof(struct dm_test_pdata),
.per_child_auto_alloc_size = sizeof(struct dm_test_parent_data),
@@ -380,3 +392,26 @@ static int dm_test_bus_parent_platdata_uclass(struct
dm_test_state *dms)
}
DM_TEST(dm_test_bus_parent_platdata_uclass,
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that the child post_bind method is called */
+static int dm_test_bus_child_post_bind(struct dm_test_state *dms)
+{
+ struct dm_test_parent_platdata *plat;
+ struct udevice *bus, *dev;
+ int child_count;
+
+ ut_assertok(uclass_get_device(UCLASS_TEST_BUS, 0, bus));
+ for (device_find_first_child(bus, dev), child_count = 0;
+dev;
+device_find_next_child(dev)) {
+ /* Check that platform data is allocated */
+ plat = dev_get_parent_platdata(dev);
+ ut_assert(plat != NULL);
+ ut_asserteq(1, plat-bind_flag);
+ child_count++;
+ }
+ ut_asserteq(3, child_count);
+
+ return 0;
+}
+DM_TEST(dm_test_bus_child_post_bind, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 14/26] dm: core: Allow the uclass to set up a device's child after binding
For buses, after a child is bound, allow the uclass to perform some
processing. This can be used to figure out the address of the child (e.g.
the chip select for SPI slaves) so that it is ready to be probed.
This avoids bus drivers having to repeat the same process, which really
should be done by the uclass, since it is common.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/core/uclass.c | 21 -
include/dm/uclass.h | 2 ++
test/dm/bus.c | 26 ++
3 files changed, 44 insertions(+), 5 deletions(-)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 901b06e..29811be 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -319,18 +319,29 @@ int uclass_bind_device(struct udevice *dev)
int ret;
uc = dev-uclass;
-
list_add_tail(dev-uclass_node, uc-dev_head);
+ if (dev-parent) {
+ struct uclass_driver *parent_drv = dev-parent-uclass-uc_drv;
+
+ if (parent_drv-child_post_bind) {
+ ret = parent_drv-child_post_bind(dev);
+ if (ret)
+ goto err;
+ }
+ }
if (uc-uc_drv-post_bind) {
ret = uc-uc_drv-post_bind(dev);
- if (ret) {
- list_del(dev-uclass_node);
- return ret;
- }
+ if (ret)
+ goto err;
}
return 0;
+err:
+ /* There is no need to undo the parent's post_bind call */
+ list_del(dev-uclass_node);
+
+ return ret;
}
int uclass_unbind_device(struct udevice *dev)
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index ac6c850..5c5b8f4 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -55,6 +55,7 @@ struct udevice;
* @pre_unbind: Called before a device is unbound from this uclass
* @post_probe: Called after a new device is probed
* @pre_remove: Called before a device is removed
+ * @child_post_bind: Called after a child is bound to a device in this uclass
* @init: Called to set up the uclass
* @destroy: Called to destroy the uclass
* @priv_auto_alloc_size: If non-zero this is the size of the private data
@@ -81,6 +82,7 @@ struct uclass_driver {
int (*pre_unbind)(struct udevice *dev);
int (*post_probe)(struct udevice *dev);
int (*pre_remove)(struct udevice *dev);
+ int (*child_post_bind)(struct udevice *dev);
int (*init)(struct uclass *class);
int (*destroy)(struct uclass *class);
int priv_auto_alloc_size;
diff --git a/test/dm/bus.c b/test/dm/bus.c
index e909697..c123ed7 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -18,6 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
struct dm_test_parent_platdata {
int count;
int bind_flag;
+ int uclass_bind_flag;
};
enum {
@@ -38,6 +39,7 @@ static int testbus_child_post_bind(struct udevice *dev)
plat = dev_get_parent_platdata(dev);
plat-bind_flag = 1;
+ plat-uclass_bind_flag = 2;
return 0;
}
@@ -443,3 +445,27 @@ static int dm_test_bus_child_post_bind(struct
dm_test_state *dms)
return 0;
}
DM_TEST(dm_test_bus_child_post_bind, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that the child post_bind method is called */
+static int dm_test_bus_child_post_bind_uclass(struct dm_test_state *dms)
+{
+ struct dm_test_parent_platdata *plat;
+ struct udevice *bus, *dev;
+ int child_count;
+
+ ut_assertok(uclass_get_device(UCLASS_TEST_BUS, 0, bus));
+ for (device_find_first_child(bus, dev), child_count = 0;
+dev;
+device_find_next_child(dev)) {
+ /* Check that platform data is allocated */
+ plat = dev_get_parent_platdata(dev);
+ ut_assert(plat != NULL);
+ ut_asserteq(2, plat-uclass_bind_flag);
+ child_count++;
+ }
+ ut_asserteq(3, child_count);
+
+ return 0;
+}
+DM_TEST(dm_test_bus_child_post_bind_uclass,
+ DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH 2/2] sandbox: Add a -D option to use a default device tree
It is painful to specify the full path to the device tree with the -d
option. It is normally kept in the same directory as U-Boot, so provide
an option to use this by default.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/sandbox/cpu/start.c | 20
1 file changed, 20 insertions(+)
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index 42353d8..097f29a 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -6,6 +6,7 @@
#include common.h
#include os.h
#include cli.h
+#include malloc.h
#include asm/getopt.h
#include asm/io.h
#include asm/sections.h
@@ -102,6 +103,25 @@ static int sandbox_cmdline_cb_fdt(struct sandbox_state
*state, const char *arg)
}
SANDBOX_CMDLINE_OPT_SHORT(fdt, 'd', 1, Specify U-Boot's control FDT);
+static int sandbox_cmdline_cb_default_fdt(struct sandbox_state *state,
+ const char *arg)
+{
+ const char *fmt = %s.dtb;
+ char *fname;
+ int len;
+
+ len = strlen(state-argv[0]) + strlen(fmt) + 1;
+ fname = os_malloc(len);
+ if (!fname)
+ return -ENOMEM;
+ snprintf(fname, len, fmt, state-argv[0]);
+ state-fdt_fname = fname;
+
+ return 0;
+}
+SANDBOX_CMDLINE_OPT_SHORT(default_fdt, 'D', 0,
+ Use the default u-boot.dtb control FDT in U-Boot directory);
+
static int sandbox_cmdline_cb_interactive(struct sandbox_state *state,
const char *arg)
{
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v2 15/26] dm: sandbox: sf: Tidy up the error handling in sandbox_sf_probe()
Use a single exit point when we have an error and add debugging there.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/mtd/spi/sandbox.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 3024b98..106dda9 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -141,8 +141,10 @@ static int sandbox_sf_probe(struct udevice *dev)
assert(bus-seq != -1);
if (bus-seq CONFIG_SANDBOX_SPI_MAX_BUS)
spec = state-spi[bus-seq][cs].spec;
- if (!spec)
- return -ENOENT;
+ if (!spec) {
+ ret = -ENOENT;
+ goto error;
+ }
file = strchr(spec, ':');
if (!file) {
@@ -196,6 +198,7 @@ static int sandbox_sf_probe(struct udevice *dev)
return 0;
error:
+ debug(%s: Got error %d\n, __func__, ret);
return ret;
}
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH 1/2] sandbox: Correct cros-ec keyboard definition
The other boards got updated to the standard binding. Update sandbox as
well.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/sandbox/dts/sandbox.dts | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 4c63e4f..9ce31bf 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -74,10 +74,8 @@
cros-ec-keyb {
compatible = google,cros-ec-keyb;
- google,key-rows = 8;
- google,key-columns = 13;
- google,repeat-delay-ms = 240;
- google,repeat-rate-ms = 30;
+ keypad,num-rows = 8;
+ keypad,num-columns = 13;
google,ghost-filter;
/*
* Keymap entries take the form of 0xRRCC where
--
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[U-Boot] [PATCH 1/3] x86: Add missing DECLARE_GLOBAL_DATA_PTR for mtrr.c
arch/x86/cpu/mtrr.c has access to the U-Boot global data thus
DECLARE_GLOBAL_DATA_PTR is needed.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/cpu/mtrr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index d5a825d..ac8765f 100644
--- a/arch/x86/cpu/mtrr.c
+++ b/arch/x86/cpu/mtrr.c
@@ -17,6 +17,8 @@
#include asm/msr.h
#include asm/mtrr.h
+DECLARE_GLOBAL_DATA_PTR;
+
/* Prepare to adjust MTRRs */
void mtrr_open(struct mtrr_state *state)
{
--
1.8.2.1
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[U-Boot] [PATCH 2/3] x86: Save mtrr support flag in global data
CPUID (EAX 01H) returns MTRR support flag in EDX bit 12. Probe this
flag in x86_cpu_init_f() and save it in global data.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/cpu/cpu.c | 7 +++
arch/x86/include/asm/global_data.h | 3 ++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 30e5069..ed7905c 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -223,6 +223,11 @@ static bool has_cpuid(void)
return flag_is_changeable_p(X86_EFLAGS_ID);
}
+static bool has_mtrr(void)
+{
+ return cpuid_edx(0x0001) (1 12) ? true : false;
+}
+
static int build_vendor_name(char *vendor_name)
{
struct cpuid_result result;
@@ -318,6 +323,8 @@ int x86_cpu_init_f(void)
gd-arch.x86_model = c.x86_model;
gd-arch.x86_mask = c.x86_mask;
gd-arch.x86_device = cpu.device;
+
+ gd-arch.has_mtrr = has_mtrr();
}
return 0;
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index 24e3052..6499b9e 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -63,7 +63,8 @@ struct arch_global_data {
void*hob_list; /* FSP HOB list */
#endif
struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS];
- int mtrr_req_count;
+ int mtrr_req_count;
+ int has_mtrr;
};
#endif
--
1.8.2.1
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[U-Boot] [PATCH 3/3] x86: Test mtrr support flag before accessing mtrr msr
On some x86 processors (like Intel Quark) the MTRR registers are not
supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
Accessing the MTRR registers on such processors will cause #GP so we
must test the support flag before accessing MTRR MSRs.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/cpu/mtrr.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index ac8765f..68f1b04 100644
--- a/arch/x86/cpu/mtrr.c
+++ b/arch/x86/cpu/mtrr.c
@@ -22,6 +22,9 @@ DECLARE_GLOBAL_DATA_PTR;
/* Prepare to adjust MTRRs */
void mtrr_open(struct mtrr_state *state)
{
+ if (!gd-arch.has_mtrr)
+ return;
+
state-enable_cache = dcache_status();
if (state-enable_cache)
@@ -33,6 +36,9 @@ void mtrr_open(struct mtrr_state *state)
/* Clean up after adjusting MTRRs, and enable them */
void mtrr_close(struct mtrr_state *state)
{
+ if (!gd-arch.has_mtrr)
+ return;
+
wrmsrl(MTRR_DEF_TYPE_MSR, state-deftype | MTRR_DEF_TYPE_EN);
if (state-enable_cache)
enable_caches();
@@ -45,6 +51,9 @@ int mtrr_commit(bool do_caches)
uint64_t mask;
int i;
+ if (!gd-arch.has_mtrr)
+ return 0;
+
mtrr_open(state);
for (i = 0; i gd-arch.mtrr_req_count; i++, req++) {
mask = ~(req-size - 1);
@@ -66,6 +75,9 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size)
struct mtrr_request *req;
uint64_t mask;
+ if (!gd-arch.has_mtrr)
+ return 0;
+
if (gd-arch.mtrr_req_count == MAX_MTRR_REQUESTS)
return -ENOSPC;
req = gd-arch.mtrr_req[gd-arch.mtrr_req_count++];
--
1.8.2.1
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Re: [U-Boot] [PATCH] sunxi: display: Make lcd display clk phase configurable
Hi Hans, On 19 January 2015 at 13:10, Hans de Goede hdego...@redhat.com wrote: Hi, On 19-01-15 20:46, Simon Glass wrote: Hi Hans, On 19 January 2015 at 12:06, Hans de Goede hdego...@redhat.com wrote: Hi, On 18-01-15 04:12, Simon Glass wrote: Hi Hans, On 13 January 2015 at 04:33, Hans de Goede hdego...@redhat.com wrote: While running some tests with an Olinuxino-A13-Micro + a 7 Olimex LCD module I noticed that the screen flickered. This is caused by the lcd display clk phase reg value being set to 0, where it should be 1 in this setup. This commit adds a Kconfig option for the lcd display clk phase, so that we can set it per board. This defaults to 1, because looking at all the fex files in sunxi-boards, that is by far the most used value. This commit updated the Ippo and MSI Primo73 tablet defconfigs to override the default of 1 with 0, as that is the correct value for those tablets, this keeps the register settings the same as before this commit. The Olinuxino-A13 defconfigs are not updated, changing the register setting for these boards from 0 to 1, this is intentional. Signed-off-by: Hans de Goede hdego...@redhat.com --- arch/arm/include/asm/arch-sunxi/display.h | 4 +--- board/sunxi/Kconfig | 7 +++ configs/Ippo_q8h_v1_2_defconfig | 1 + configs/Ippo_q8h_v5_defconfig | 1 + configs/MSI_Primo73_defconfig | 1 + drivers/video/sunxi_display.c | 7 +-- 6 files changed, 12 insertions(+), 9 deletions(-) Are you planning to move this to device tree at some point? Yes, one of the free-electrons guys is working on a kms driver, once we've that and thus stable devicetree bindings for the display blocks I want to move all this over to devicetree. OK thanks. More generally for sunxi I am wondering how common the board code can be. Already you have managed to support all sun7i boards in essentially a single config, for example. I wonder if we might support all sun7i boards with just different device trees? Not sure about other variants? My long term vision is along the lines of having one u-boot binary each for sun4i, sun5i, sun6i, etc. and then be able to append a dtb to that u-boot binary, combine it with the right spl, and presto we've u-boot ready for the specific board as described by the dtb. Sounds good. The tricky bit is making the spl board agnostic, as we only have 32k sram to work with, some of which is used by the BROM. We can overwrite it when booting from mmc, but not when FEL booting (sunxi BROM usb gadget mode boot), and we also need to put the initial stack there, so dtb parsing is sort of out of the question since the dtb itself would likely already be larger then the space we've. So the spl side will likely end up using some linker magic to put a struct with config parameters (like dram parameters) at a fixed offset and then use some utility to extract those from a dtb and patch them into the spl or some such. I did write an fdtgrep tool to cut down a device tree to only selected nodes, etc. So it might be possible, and the simplest option. If you do the linker magic idea, we should try to unify it across all SoCs. Exynos already has a binary table - in Chrome OS we have a tool which converts the device tree to the binary table. It's best avoided though. Note this is where I would like to be, currently thinks like supporting newer sunxi SoCs has higher priority though, but if you want to help us getting there that would be great :) I think it would make sense to support newer devices with driver model and device tree, at least. I have already helped a little, I have my hands full for quite a while on various things at present. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] x86: Fix various code format issues in start16.S
Various minor code format issues are fixed in start16.S: - U-boot - U-Boot - 32bit - 32-bit - Use TAB instead of SPACE to indent - Move the indention location of the GDT comment block Signed-off-by: Bin Meng bmeng...@gmail.com --- arch/x86/cpu/start16.S | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S index 9550502..826e2b4 100644 --- a/arch/x86/cpu/start16.S +++ b/arch/x86/cpu/start16.S @@ -1,5 +1,5 @@ /* - * U-boot - x86 Startup Code + * U-Boot - x86 Startup Code * * (C) Copyright 2008-2011 * Graeme Russ, graeme.r...@gmail.com @@ -28,7 +28,7 @@ start16: movl$GD_FLG_COLD_BOOT, %ebx xorl%eax, %eax - movl%eax, %cr3/* Invalidate TLB */ + movl%eax, %cr3 /* Invalidate TLB */ /* Turn off cache (this might require a 486-class CPU) */ movl%cr0, %eax @@ -49,7 +49,7 @@ o32 cslgdtgdt_ptr jmp ff ff: - /* Finally restore BIST and jump to the 32bit initialization code */ + /* Finally restore BIST and jump to the 32-bit initialization code */ movw$code32start, %ax movw%ax, %bp movl%ecx, %eax @@ -64,17 +64,17 @@ idt_ptr: .word 0 /* limit */ .long 0 /* base */ -/* - * The following Global Descriptor Table is just enough to get us into - * 'Flat Protected Mode' - It will be discarded as soon as the final - * GDT is setup in a safe location in RAM - */ + /* +* The following Global Descriptor Table is just enough to get us into +* 'Flat Protected Mode' - It will be discarded as soon as the final +* GDT is setup in a safe location in RAM +*/ gdt_ptr: .word 0x1f/* limit (31 bytes = 4 GDT entries - 1) */ .long BOOT_SEG + gdt /* base */ -/* Some CPUs are picky about GDT alignment... */ -.align 16 + /* Some CPUs are picky about GDT alignment... */ + .align 16 gdt: /* * The GDT table ... -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] dm:gpio:mxc get configuration from dtb
Hi Simon,
On 1/20/2015 3:45 AM, Simon Glass wrote:
Hi Peng.
On 18 January 2015 at 23:11, Peng Fan peng@freescale.com wrote:
This patch supports getting gpios' configuration from dtb.
CONFIG_OF_CONTROL is used to indicated which part is for device tree,
and which is not.
This patch is already tested on mx6sxsabresd board. Since device tree
has not been upstreamed, if want to test this patch. The followings
need to be done.
+ pieces of code does not gpio_request when using gpio_direction_xxx and
etc, need to request gpio.
+ move the gpio settings from board_early_init_f to board_init
+ define CONFIG_DM ,CONFIG_DM_GPIO and CONFIG_OF_CONTROL
+ Add device tree file and do related configuration in
`make ARCH=arm menuconfig`
Sorry I am going to repeat some of Igor's comments...
I've seen Igor's comments.I'll address them.
Signed-off-by: Peng Fan peng@freescale.com
---
drivers/gpio/mxc_gpio.c | 76 +
1 file changed, 76 insertions(+)
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 8bb9e39..8603068 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -14,6 +14,10 @@
#include asm/arch/imx-regs.h
#include asm/gpio.h
#include asm/io.h
+#ifdef CONFIG_OF_CONTROL
+#include fdtdec.h
+DECLARE_GLOBAL_DATA_PTR;
+#endif
Hopefully #ifdef not needed.
Ok. I'll try to remove them in v2 patch.
enum mxc_gpio_direction {
MXC_GPIO_DIRECTION_IN,
@@ -258,6 +262,7 @@ static const struct dm_gpio_ops gpio_mxc_ops = {
.get_function = mxc_gpio_get_function,
};
+#ifndef CONFIG_OF_CONTROL
static const struct mxc_gpio_plat mxc_plat[] = {
{ (struct gpio_regs *)GPIO1_BASE_ADDR },
{ (struct gpio_regs *)GPIO2_BASE_ADDR },
@@ -274,6 +279,7 @@ static const struct mxc_gpio_plat mxc_plat[] = {
{ (struct gpio_regs *)GPIO7_BASE_ADDR },
#endif
Same here.
};
+#endif
static int mxc_gpio_probe(struct udevice *dev)
{
@@ -283,7 +289,19 @@ static int mxc_gpio_probe(struct udevice *dev)
int banknum;
char name[18], *str;
+#ifdef CONFIG_OF_CONTROL
+ /*
+* In dts file add:
+* aliases {
+* gpio0 = gpio1;
+* gpio1 = gpio2;
+* .
+* };
+* Then set banknum accoring dev's seq number. */
+ banknum = dev-seq;
+#else
banknum = plat - mxc_plat;
+#endif
sprintf(name, GPIO%d_, banknum + 1);
str = strdup(name);
if (!str)
@@ -295,14 +313,71 @@ static int mxc_gpio_probe(struct udevice *dev)
return 0;
}
+#ifdef CONFIG_OF_CONTROL
+static int mxc_gpio_bind(struct udevice *device)
+{
+ struct mxc_gpio_plat *plat = device-platdata;
+ struct gpio_regs *ctrl;
+
+ if (plat)
+ return 0;
+ /*
+* In the dts file, gpiox bank are as following:
+* gpio1: gpio@0209c000 {
+* compatible = fsl,imx6q-gpio, fsl,imx35-gpio;
+* reg = 0x0209c000 0x4000;
+* interrupts = 0 66 0x04 0 67 0x04;
+* gpio-controller;
+* #gpio-cells = 2;
+* interrupt-controller;
+* #interrupt-cells = 2;
+* };
+*
+* gpio2: gpio@020a {
+* compatible = fsl,imx6q-gpio, fsl,imx35-gpio;
+* reg = 0x020a 0x4000;
+* interrupts = 0 68 0x04 0 69 0x04;
+* gpio-controller;
+* #gpio-cells = 2;
+* interrupt-controller;
+* #interrupt-cells = 2;
+* };
+*
+* gpio1 is the 1st bank, gpio2 is the 2nd bank and gpio3
+*/
+
+ ctrl = (struct gpio_regs *)fdtdec_get_addr(gd-fdt_blob,
+ device-of_offset, reg);
+ plat = calloc(1, sizeof(*plat));
+ if (!plat)
+ return -ENOMEM;
+
+ plat-regs = ctrl;
+
+ device-platdata = plat;
+
+ return 0;
+}
+
+static const struct udevice_id mxc_gpio_ids[] = {
+ { .compatible = fsl,imx35-gpio },
+ { }
+};
+#endif
+
U_BOOT_DRIVER(gpio_mxc) = {
.name = gpio_mxc,
.id = UCLASS_GPIO,
.ops= gpio_mxc_ops,
.probe = mxc_gpio_probe,
.priv_auto_alloc_size = sizeof(struct mxc_bank_info),
+#ifdef CONFIG_OF_CONTROL
+ .of_match = mxc_gpio_ids,
+ .bind = mxc_gpio_bind,
+#endif
};
+#ifndef CONFIG_OF_CONTROL
U_BOOT_DEVICES(mxc_gpios) = {
{ gpio_mxc, mxc_plat[0] },
{ gpio_mxc, mxc_plat[1] },
@@ -320,3 +395,4 @@ U_BOOT_DEVICES(mxc_gpios) = {
#endif
};
#endif
+#endif
Overall I wonder why you don't just convert the boards to device tree?
It might be more work, but it would be a lot cleaner.
Yeah. Agree. Converting the boards to device tree may
[U-Boot] [RFC PATCH 5/5] grasshopper: enable generic board
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com --- include/configs/grasshopper.h |4 1 file changed, 4 insertions(+) diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h index 83f0ed2..54eb977 100644 --- a/include/configs/grasshopper.h +++ b/include/configs/grasshopper.h @@ -62,6 +62,10 @@ #define CONFIG_USART_BASE ATMEL_BASE_USART1 #define CONFIG_USART_ID1 +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R + /* User serviceable stuff */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH 3/5] common/board_r: manual relocation for cmd table
This is required for architectures still need manual relocation like avr32, mk68
and others.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
common/board_r.c | 12
1 file changed, 12 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index a301cc2..e712902 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -294,6 +294,15 @@ static int initr_announce(void)
return 0;
}
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+static int initr_manual_reloc_cmdtable(void)
+{
+ fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
+ ll_entry_count(cmd_tbl_t, cmd));
+ return 0;
+}
+#endif
+
#if !defined(CONFIG_SYS_NO_FLASH)
static int initr_flash(void)
{
@@ -718,6 +727,9 @@ init_fnc_t init_sequence_r[] = {
initr_serial,
initr_announce,
INIT_FUNC_WATCHDOG_RESET
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+ initr_manual_reloc_cmdtable,
+#endif
#ifdef CONFIG_PPC
initr_trap,
#endif
--
1.7.10.4
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Re: [U-Boot] [RFC PATCH 3/5] common/board_r: manual relocation for cmd table
Hi Andreas,
On 19 January 2015 at 16:41, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Hi Simon,
On 20.01.15 00:34, Simon Glass wrote:
Hi Andreas,
On 19 January 2015 at 16:29, Andreas Bießmann
andreas.de...@googlemail.com wrote:
This is required for architectures still need manual relocation like avr32,
mk68
and others.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
common/board_r.c | 12
1 file changed, 12 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index a301cc2..e712902 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -294,6 +294,15 @@ static int initr_announce(void)
return 0;
}
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+static int initr_manual_reloc_cmdtable(void)
+{
+ fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
+ ll_entry_count(cmd_tbl_t, cmd));
+ return 0;
+}
+#endif
+
#if !defined(CONFIG_SYS_NO_FLASH)
static int initr_flash(void)
{
@@ -718,6 +727,9 @@ init_fnc_t init_sequence_r[] = {
initr_serial,
initr_announce,
INIT_FUNC_WATCHDOG_RESET
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+ initr_manual_reloc_cmdtable,
+#endif
#ifdef CONFIG_PPC
initr_trap,
#endif
--
Reviewed-by: Simon Glass s...@chromium.org
Why do you need manual reloc? Is this a toolchain bug?
Just not implemented yet for avr32. It is on my list, but avr32 has not
my highest priority ;)
As long as there are other arches which need this also I think it is
some more time to shift ... the generic board deadline end of 2014 was a
bit stricter, I don't want to kick avr32 out of u-boot now. So let's get
generic board working for avr32 in the next release ;)
OK - it would be good to tidy this up.
Regards,
Simon
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[U-Boot] [RFC PATCH 1/5] avr32: use dlmalloc for DMA buffers
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
arch/avr32/include/asm/dma-mapping.h |7 -
arch/avr32/lib/board.c | 51 --
include/configs/atngw100.h |1 -
include/configs/atngw100mkii.h |1 -
include/configs/atstk1002.h |1 -
include/configs/atstk1006.h |1 -
include/configs/favr-32-ezkit.h |1 -
include/configs/grasshopper.h|1 -
include/configs/hammerhead.h |1 -
include/configs/mimc200.h|1 -
10 files changed, 6 insertions(+), 60 deletions(-)
diff --git a/arch/avr32/include/asm/dma-mapping.h
b/arch/avr32/include/asm/dma-mapping.h
index dbdd2fe..1cde827 100644
--- a/arch/avr32/include/asm/dma-mapping.h
+++ b/arch/avr32/include/asm/dma-mapping.h
@@ -14,7 +14,12 @@ enum dma_data_direction {
DMA_TO_DEVICE = 1,
DMA_FROM_DEVICE = 2,
};
-extern void *dma_alloc_coherent(size_t len, unsigned long *handle);
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+ *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
+ return (void *)*handle;
+}
static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
enum dma_data_direction dir)
diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c
index bf0997f..7d13ac5 100644
--- a/arch/avr32/lib/board.c
+++ b/arch/avr32/lib/board.c
@@ -45,50 +45,6 @@ int cpu_mmc_init(bd_t *bd)
return atmel_mci_init((void *)ATMEL_BASE_MMCI);
}
-#ifdef CONFIG_SYS_DMA_ALLOC_LEN
-#include asm/arch/cacheflush.h
-#include asm/io.h
-
-static unsigned long dma_alloc_start;
-static unsigned long dma_alloc_end;
-static unsigned long dma_alloc_brk;
-
-static void dma_alloc_init(void)
-{
- unsigned long monitor_addr;
-
- monitor_addr = CONFIG_SYS_MONITOR_BASE + gd-reloc_off;
- dma_alloc_end = monitor_addr - CONFIG_SYS_MALLOC_LEN;
- dma_alloc_start = dma_alloc_end - CONFIG_SYS_DMA_ALLOC_LEN;
- dma_alloc_brk = dma_alloc_start;
-
- printf(DMA: Using memory from 0x%08lx to 0x%08lx\n,
- dma_alloc_start, dma_alloc_end);
-
- invalidate_dcache_range((unsigned long)cached(dma_alloc_start),
- dma_alloc_end);
-}
-
-void *dma_alloc_coherent(size_t len, unsigned long *handle)
-{
- unsigned long paddr = dma_alloc_brk;
-
- if (dma_alloc_brk + len dma_alloc_end)
- return NULL;
-
- dma_alloc_brk = ((paddr + len + CONFIG_SYS_DCACHE_LINESZ - 1)
- ~(CONFIG_SYS_DCACHE_LINESZ - 1));
-
- *handle = paddr;
- return uncached(paddr);
-}
-#else
-static inline void dma_alloc_init(void)
-{
-
-}
-#endif
-
static int init_baudrate(void)
{
gd-baudrate = getenv_ulong(baudrate, 10, CONFIG_BAUDRATE);
@@ -180,12 +136,6 @@ void board_init_f(ulong board_type)
/* Reserve memory for malloc() */
addr -= CONFIG_SYS_MALLOC_LEN;
-#ifdef CONFIG_SYS_DMA_ALLOC_LEN
- /* Reserve DMA memory (must be cache aligned) */
- addr = ~(CONFIG_SYS_DCACHE_LINESZ - 1);
- addr -= CONFIG_SYS_DMA_ALLOC_LEN;
-#endif
-
#ifdef CONFIG_LCD
#ifdef CONFIG_FB_ADDR
printf(LCD: Frame buffer allocated at preset 0x%08x\n,
@@ -264,7 +214,6 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
/* The malloc area is right below the monitor image in RAM */
mem_malloc_init(CONFIG_SYS_MONITOR_BASE + gd-reloc_off -
CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN);
- dma_alloc_init();
enable_interrupts();
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index 9c81e31..540e86a 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -143,7 +143,6 @@
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INTRAM_BASE +
CONFIG_SYS_INTRAM_SIZE)
#define CONFIG_SYS_MALLOC_LEN (256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x0040)
diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h
index 7b4f9cf..35eae76 100644
--- a/include/configs/atngw100mkii.h
+++ b/include/configs/atngw100mkii.h
@@ -164,7 +164,6 @@
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INTRAM_BASE +
CONFIG_SYS_INTRAM_SIZE)
#define CONFIG_SYS_MALLOC_LEN (256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x0040)
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index 8f3fd0b..9e58238 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -158,7 +158,6 @@
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INTRAM_BASE +
[U-Boot] [RFC PATCH 2/5] avr32: rename cpu_init() - arch_cpu_init()
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
arch/avr32/cpu/cpu.c|2 +-
arch/avr32/include/asm/u-boot.h |2 ++
arch/avr32/lib/board.c |2 +-
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c
index cef630e..cd226a6 100644
--- a/arch/avr32/cpu/cpu.c
+++ b/arch/avr32/cpu/cpu.c
@@ -27,7 +27,7 @@
DECLARE_GLOBAL_DATA_PTR;
-int cpu_init(void)
+int arch_cpu_init(void)
{
extern void _evba(void);
diff --git a/arch/avr32/include/asm/u-boot.h b/arch/avr32/include/asm/u-boot.h
index 6aef808..2387f8a 100644
--- a/arch/avr32/include/asm/u-boot.h
+++ b/arch/avr32/include/asm/u-boot.h
@@ -25,4 +25,6 @@ typedef struct bd_info {
/* For image.h:image_check_target_arch() */
#define IH_ARCH_DEFAULT IH_ARCH_AVR32
+int arch_cpu_init(void);
+
#endif /* __ASM_U_BOOT_H__ */
diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c
index 7d13ac5..95f9526 100644
--- a/arch/avr32/lib/board.c
+++ b/arch/avr32/lib/board.c
@@ -98,7 +98,7 @@ void board_init_f(ulong board_type)
/* Perform initialization sequence */
board_early_init_f();
- cpu_init();
+ arch_cpu_init();
board_postclk_init();
env_init();
init_baudrate();
--
1.7.10.4
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Re: [U-Boot] [RFC PATCH 3/5] common/board_r: manual relocation for cmd table
Hi Simon,
On 20.01.15 00:34, Simon Glass wrote:
Hi Andreas,
On 19 January 2015 at 16:29, Andreas Bießmann
andreas.de...@googlemail.com wrote:
This is required for architectures still need manual relocation like avr32,
mk68
and others.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
common/board_r.c | 12
1 file changed, 12 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index a301cc2..e712902 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -294,6 +294,15 @@ static int initr_announce(void)
return 0;
}
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+static int initr_manual_reloc_cmdtable(void)
+{
+ fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
+ ll_entry_count(cmd_tbl_t, cmd));
+ return 0;
+}
+#endif
+
#if !defined(CONFIG_SYS_NO_FLASH)
static int initr_flash(void)
{
@@ -718,6 +727,9 @@ init_fnc_t init_sequence_r[] = {
initr_serial,
initr_announce,
INIT_FUNC_WATCHDOG_RESET
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+ initr_manual_reloc_cmdtable,
+#endif
#ifdef CONFIG_PPC
initr_trap,
#endif
--
Reviewed-by: Simon Glass s...@chromium.org
Why do you need manual reloc? Is this a toolchain bug?
Just not implemented yet for avr32. It is on my list, but avr32 has not
my highest priority ;)
As long as there are other arches which need this also I think it is
some more time to shift ... the generic board deadline end of 2014 was a
bit stricter, I don't want to kick avr32 out of u-boot now. So let's get
generic board working for avr32 in the next release ;)
Best regards
Andreas Bießmann
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[U-Boot] [PATCH v2 16/26] dm: core: Allow uclass to set up a device's child before it is probed
Some buses need to set up their devices before they can be used. This setup
may well be common to all buses in a particular uclass. Support a common
pre-probe method for the uclass, called before any bus devices are probed.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
drivers/core/device.c| 4
drivers/core/uclass.c| 13 +
include/dm/test.h| 3 +++
include/dm/uclass-internal.h | 11 +++
include/dm/uclass.h | 1 +
test/dm/bus.c| 46
test/dm/test-fdt.c | 7 +++
7 files changed, 85 insertions(+)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 2639fcb..b050272 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -227,6 +227,10 @@ int device_probe_child(struct udevice *dev, void
*parent_priv)
}
dev-seq = seq;
+ ret = uclass_pre_probe_child(dev);
+ if (ret)
+ goto fail;
+
if (dev-parent dev-parent-driver-child_pre_probe) {
ret = dev-parent-driver-child_pre_probe(dev);
if (ret)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 29811be..8c91370 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -391,6 +391,19 @@ int uclass_resolve_seq(struct udevice *dev)
return seq;
}
+int uclass_pre_probe_child(struct udevice *dev)
+{
+ struct uclass_driver *uc_drv;
+
+ if (!dev-parent)
+ return 0;
+ uc_drv = dev-parent-uclass-uc_drv;
+ if (uc_drv-child_pre_probe)
+ return uc_drv-child_pre_probe(dev);
+
+ return 0;
+}
+
int uclass_post_probe_device(struct udevice *dev)
{
struct uclass_driver *uc_drv = dev-uclass-uc_drv;
diff --git a/include/dm/test.h b/include/dm/test.h
index f08c05d..707c69e 100644
--- a/include/dm/test.h
+++ b/include/dm/test.h
@@ -67,6 +67,8 @@ enum {
struct dm_test_priv {
int ping_total;
int op_count[DM_TEST_OP_COUNT];
+ int uclass_flag;
+ int uclass_total;
};
/**
@@ -88,6 +90,7 @@ struct dm_test_uclass_priv {
*
* @sum: Test value used to check parent data works correctly
* @flag: Used to track calling of parent operations
+ * @uclass_flag: Used to track calling of parent operations by uclass
*/
struct dm_test_parent_data {
int sum;
diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h
index f718f37..f2f254a 100644
--- a/include/dm/uclass-internal.h
+++ b/include/dm/uclass-internal.h
@@ -44,6 +44,17 @@ int uclass_bind_device(struct udevice *dev);
int uclass_unbind_device(struct udevice *dev);
/**
+ * uclass_pre_probe_child() - Deal with a child that is about to be probed
+ *
+ * Perform any pre-processing that is needed by the uclass before it can be
+ * probed.
+ *
+ * @dev: Pointer to the device
+ * #return 0 on success, -ve on error
+ */
+int uclass_pre_probe_child(struct udevice *dev);
+
+/**
* uclass_post_probe_device() - Deal with a device that has just been probed
*
* Perform any post-processing of a probed device that is needed by the
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 5c5b8f4..d6c40c6 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -83,6 +83,7 @@ struct uclass_driver {
int (*post_probe)(struct udevice *dev);
int (*pre_remove)(struct udevice *dev);
int (*child_post_bind)(struct udevice *dev);
+ int (*child_pre_probe)(struct udevice *dev);
int (*init)(struct uclass *class);
int (*destroy)(struct uclass *class);
int priv_auto_alloc_size;
diff --git a/test/dm/bus.c b/test/dm/bus.c
index c123ed7..faffe6a 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -53,6 +53,15 @@ static int testbus_child_pre_probe(struct udevice *dev)
return 0;
}
+static int testbus_child_pre_probe_uclass(struct udevice *dev)
+{
+ struct dm_test_priv *priv = dev_get_priv(dev);
+
+ priv-uclass_flag++;
+
+ return 0;
+}
+
static int testbus_child_post_remove(struct udevice *dev)
{
struct dm_test_parent_data *parent_data = dev_get_parentdata(dev);
@@ -91,6 +100,7 @@ UCLASS_DRIVER(testbus) = {
.name = testbus,
.id = UCLASS_TEST_BUS,
.flags = DM_UC_FLAG_SEQ_ALIAS,
+ .child_pre_probe = testbus_child_pre_probe_uclass,
};
/* Test that we can probe for children */
@@ -469,3 +479,39 @@ static int dm_test_bus_child_post_bind_uclass(struct
dm_test_state *dms)
}
DM_TEST(dm_test_bus_child_post_bind_uclass,
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/*
+ * Test that the bus' uclass' child_pre_probe() is called before the
+ * device's probe() method
+ */
+static int dm_test_bus_child_pre_probe_uclass(struct dm_test_state *dms)
+{
+ struct udevice *bus, *dev;
+ int child_count;
+
+ /*
+* See testfdt_drv_probe() which effectively checks that the
[U-Boot] [PATCH v2 26/26] dm: Update documentation for new bus features
Now that we have new bus features, update README.txt and the SPI docs to
explain these.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Drop RFC prefix since this series has been properly tested now
- Update commit message to describe immuatable platform data
- Update the spi-howto docs
doc/driver-model/README.txt| 36 ++--
doc/driver-model/spi-howto.txt | 40 +---
2 files changed, 63 insertions(+), 13 deletions(-)
diff --git a/doc/driver-model/README.txt b/doc/driver-model/README.txt
index 2fc900b..f12e23f 100644
--- a/doc/driver-model/README.txt
+++ b/doc/driver-model/README.txt
@@ -441,11 +441,18 @@ access to other devices. Example of buses include SPI and
I2C. Typically
the bus provides some sort of transport or translation that makes it
possible to talk to the devices on the bus.
-Driver model provides a few useful features to help with implementing
-buses. Firstly, a bus can request that its children store some 'parent
-data' which can be used to keep track of child state. Secondly, the bus can
-define methods which are called when a child is probed or removed. This is
-similar to the methods the uclass driver provides.
+Driver model provides some useful features to help with implementing buses.
+Firstly, a bus can request that its children store some 'parent data' which
+can be used to keep track of child state. Secondly, the bus can define
+methods which are called when a child is probed or removed. This is similar
+to the methods the uclass driver provides. Thirdly, per-child platform data
+can be provided to specify things like the child's address on the bus. This
+persists across child probe()/remove() cycles.
+
+For consistency and ease of implementation, the bus uclass can specify the
+per-child platform data, so that it can be the same for all children of buses
+in that uclass. There are also uclass methods which can be called when
+children are bound and probed.
Here an explanation of how a bus fits with a uclass may be useful. Consider
a USB bus with several devices attached to it, each from a different (made
@@ -460,15 +467,23 @@ Each of the devices is connected to a different address
on the USB bus.
The bus device wants to store this address and some other information such
as the bus speed for each device.
-To achieve this, the bus device can use dev-parent_priv in each of its
-three children. This can be auto-allocated if the bus driver has a non-zero
-value for per_child_auto_alloc_size. If not, then the bus device can
-allocate the space itself before the child device is probed.
+To achieve this, the bus device can use dev-parent_platdata in each of its
+three children. This can be auto-allocated if the bus driver (or bus uclass)
+has a non-zero value for per_child_platdata_auto_alloc_size. If not, then
+the bus device or uclass can allocate the space itself before the child
+device is probed.
Also the bus driver can define the child_pre_probe() and child_post_remove()
methods to allow it to do some processing before the child is activated or
after it is deactivated.
+Similarly the bus uclass can define the child_post_bind() method to obtain
+the per-child platform data from the device tree and set it up for the child.
+The bus uclass can also provide a child_pre_probe() method. Very often it is
+the bus uclass that controls these features, since it avoids each driver
+having to do the same processing. Of course the driver can still tweak and
+override these activities.
+
Note that the information that controls this behaviour is in the bus's
driver, not the child's. In fact it is possible that child has no knowledge
that it is connected to a bus. The same child device may even be used on two
@@ -495,7 +510,8 @@ bus device, regardless of its own views on the matter.
The uclass for the device can also contain data private to that uclass.
But note that each device on the bus may be a memeber of a different
uclass, and this data has nothing to do with the child data for each child
-on the bus.
+on the bus. It is the bus' uclass that controls the child with respect to
+the bus.
Driver Lifecycle
diff --git a/doc/driver-model/spi-howto.txt b/doc/driver-model/spi-howto.txt
index 719dbd5..5bc29ad 100644
--- a/doc/driver-model/spi-howto.txt
+++ b/doc/driver-model/spi-howto.txt
@@ -3,7 +3,8 @@ How to port a SPI driver to driver model
Here is a rough step-by-step guide. It is based around converting the
exynos SPI driver to driver model (DM) and the example code is based
-around U-Boot v2014.10-rc2 (commit be9f643).
+around U-Boot v2014.10-rc2 (commit be9f643). This has been updated for
+v2015.04.
It is quite long since it includes actual code examples.
@@ -262,8 +263,8 @@ U_BOOT_DEVICE(board_spi0) = {
.platdata = platdata_spi0,
};
-You will unfortunately need to put the struct into a header file in this
-case so that your board file can use it.
+You
[U-Boot] [PATCH 2/2] ARM: tegra: support running in non-secure mode
From: Stephen Warren swar...@nvidia.com
When the CPU is in non-secure (NS) mode (when running U-Boot under a
secure monitor), certain actions cannot be taken, since they would need
to write to secure-only registers. One example is configuring the ARM
architectural timer's CNTFRQ register.
We could support this in one of two ways:
1) Compile twice, once for secure mode (in which case anything goes) and
once for non-secure mode (in which case certain actions are disabled).
This complicates things, since everyone needs to keep track of
different U-Boot binaries for different situations.
2) Detect NS mode at run-time, and optionally skip any impossible actions.
This has the advantage of a single U-Boot binary working in all cases.
(2) is not possible on ARM in general, since there's no architectural way
to detect secure-vs-non-secure. However, there is a Tegra-specific way to
detect this.
This patches uses that feature to detect secure vs. NS mode on Tegra, and
uses that to:
* Skip the ARM arch timer initialization.
* Set/clear an environment variable so that boot scripts can take
different action depending on which mode the CPU is in. This might be
something like:
if CPU is secure:
load secure monitor code into RAM.
boot secure monitor.
secure monitor will restart (a new copy of) U-Boot in NS mode.
else:
execute normal boot process
Signed-off-by: Stephen Warren swar...@nvidia.com
---
README | 7 +++
arch/arm/cpu/tegra-common/board.c| 19 +++
arch/arm/cpu/tegra-common/clock.c| 6 +-
arch/arm/include/asm/arch-tegra/ap.h | 4
board/nvidia/common/board.c | 9 +
5 files changed, 44 insertions(+), 1 deletion(-)
diff --git a/README b/README
index fefa71c0a6c5..4d4ffc9c495f 100644
--- a/README
+++ b/README
@@ -621,6 +621,13 @@ The following options need to be configured:
exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!
+- Tegra SoC options:
+ CONFIG_TEGRA_SUPPORT_NON_SECURE
+
+ Support executing U-Boot in non-secure (NS) mode. Certain
+ impossible actions will be skipped if the CPU is in NS mode,
+ such as ARM architectural timer initialization.
+
- Driver Model
Driver model is a new framework for devices in U-Boot
introduced in early 2014. U-Boot is being progressively
diff --git a/arch/arm/cpu/tegra-common/board.c
b/arch/arm/cpu/tegra-common/board.c
index 87511a31df18..0ebaf1932556 100644
--- a/arch/arm/cpu/tegra-common/board.c
+++ b/arch/arm/cpu/tegra-common/board.c
@@ -11,6 +11,7 @@
#include asm/arch/funcmux.h
#include asm/arch/mc.h
#include asm/arch/tegra.h
+#include asm/arch-tegra/ap.h
#include asm/arch-tegra/board.h
#include asm/arch-tegra/pmc.h
#include asm/arch-tegra/sys_proto.h
@@ -28,6 +29,24 @@ enum {
UART_COUNT = 5,
};
+#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
+#if !defined(CONFIG_TEGRA124)
+#error tegra_cpu_is_non_secure has only been validated on Tegra124
+#endif
+bool tegra_cpu_is_non_secure(void)
+{
+ /*
+* This register reads 0x in non-secure mode. This register
+* only implements bits 31:20, so the lower bits will always read 0 in
+* secure mode. Thus, the lower bits are an indicator for secure vs.
+* non-secure mode.
+*/
+ struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+ uint32_t mc_s_cfg0 = readl(mc-mc_security_cfg0);
+ return (mc_s_cfg0 1) == 1;
+}
+#endif
+
/* Read the RAM size directly from the memory controller */
unsigned int query_sdram_size(void)
{
diff --git a/arch/arm/cpu/tegra-common/clock.c
b/arch/arm/cpu/tegra-common/clock.c
index 11c7435505c1..7c274b5f9940 100644
--- a/arch/arm/cpu/tegra-common/clock.c
+++ b/arch/arm/cpu/tegra-common/clock.c
@@ -20,6 +20,7 @@
#include asm/io.h
#include asm/arch/clock.h
#include asm/arch/tegra.h
+#include asm/arch-tegra/ap.h
#include asm/arch-tegra/clk_rst.h
#include asm/arch-tegra/timer.h
#include div64.h
@@ -573,7 +574,10 @@ void clock_init(void)
debug(PLLX = %d\n, pll_rate[CLOCK_ID_XCPU]);
/* Do any special system timer/TSC setup */
- arch_timer_init();
+#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
+ if (!tegra_cpu_is_non_secure())
+#endif
+ arch_timer_init();
}
static void set_avp_clock_source(u32 src)
diff --git a/arch/arm/include/asm/arch-tegra/ap.h
b/arch/arm/include/asm/arch-tegra/ap.h
index 5c8be94d9772..ca40e4e0bce6 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -74,3 +74,7 @@ static inline void config_vpr(void)
{
}
#endif
+
+#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
+bool tegra_cpu_is_non_secure(void);
+#endif
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 80ef8fdcb23b..018dddba1558 100644
---
[U-Boot] [PATCH 1/2] ARM: tegra: move common config defines centrally
From: Stephen Warren swar...@nvidia.com All boards need CONFIG_BOARD_EARLY_INIT_F, and many actively need CONFIG_BOARD_LATE_INIT. Move both of these into tegra-common.h so that board config headers don't need to repeatedly define them. Later commits will add new code in board_late_init() which applies to all boards, so CONFIG_BOARD_LATE_INIT should be enabled for all Tegra boards. Signed-off-by: Stephen Warren swar...@nvidia.com --- This series is based upon: * My 3-patch series starting with common: board: support systems with where RAM ends beyond 4GB probably just for diff context if anything. * Ian Campbell's tegra124: Add more registers to struct mc_ctlr This adds required new fields to struct mc_ctlr. Both of those dependencies are probably only relevant patch 2/2. --- include/configs/apalis_t30.h | 2 -- include/configs/beaver.h | 2 -- include/configs/cardhu.h | 2 -- include/configs/colibri_t20_iris.h | 2 -- include/configs/colibri_t30.h | 2 -- include/configs/dalmore.h | 2 -- include/configs/harmony.h | 3 --- include/configs/jetson-tk1.h | 2 -- include/configs/medcom-wide.h | 3 --- include/configs/nyan-big.h | 2 -- include/configs/paz00.h| 3 --- include/configs/plutux.h | 3 --- include/configs/seaboard.h | 3 --- include/configs/tec-ng.h | 2 -- include/configs/tec.h | 3 --- include/configs/tegra-common.h | 2 ++ include/configs/trimslice.h| 2 -- include/configs/venice2.h | 2 -- include/configs/ventana.h | 3 --- include/configs/whistler.h | 2 -- 20 files changed, 2 insertions(+), 45 deletions(-) diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 61809fcdbea7..73404e27f448 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -22,8 +22,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_APALIS_T30 -#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 5df460c96b1d..58013c6c9b2e 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -36,8 +36,6 @@ #define MACH_TYPE_BEAVER 4597/* not yet in mach-types.h */ #define CONFIG_MACH_TYPE MACH_TYPE_BEAVER -#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 5e13b655c287..55de464acb04 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -39,8 +39,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_CARDHU -#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/colibri_t20_iris.h b/include/configs/colibri_t20_iris.h index 2b876fede111..4888c945fe2d 100644 --- a/include/configs/colibri_t20_iris.h +++ b/include/configs/colibri_t20_iris.h @@ -18,8 +18,6 @@ #define CONFIG_TEGRA_UARTA_SDIO1 #define CONFIG_SYS_NS16550_COM1NV_PA_APB_UARTA_BASE -#define CONFIG_BOARD_EARLY_INIT_F - /* SD/MMC support */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index ce6f23b8c4f1..9951b0eeba88 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -21,8 +21,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_T30 -#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 0b04ee67b36a..5f5eb3b3139d 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -32,8 +32,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_DALMORE -#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/harmony.h b/include/configs/harmony.h index ff9fbc9965a2..ad3dcdb7bab1 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -27,9 +27,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_HARMONY -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */ - /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 0a79c7cfc361..8c016b795519 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -24,8 +24,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1NV_PA_APB_UARTD_BASE -#define CONFIG_BOARD_EARLY_INIT_F - /* I2C */ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index ac5208fa0d34..f721a4d6a21a 100644 --- a/include/configs/medcom-wide.h +++
[U-Boot] [PATCH] fdt: pci: Permit use of reg property for setting device address
In commit a62e84d the old functionality of obtaining a PCI address from the
'reg' property was lost. Add it back, so we can support both a compatible
string list and a 'reg' property.
This patch fixes PCIe ethernet on Tegra boards.
Signed-off-by: Simon Glass s...@chromium.org
---
lib/fdtdec.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 89dac4c..0488607 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -219,8 +219,14 @@ int fdtdec_get_pci_bdf(const void *blob, int node,
/* get vendor id device id from the compatible string */
ret = fdtdec_get_pci_vendev(blob, node, dt_vendor, dt_device);
- if (ret)
- return ret;
+ if (ret) {
+ /* Fall back to using the 'reg' property */
+ ret = fdtdec_get_int(blob, node, reg, -1);
+ if (ret == -1)
+ return -ENOENT;
+ *bdf = ret 0xff;
+ return 0;
+ }
/* extract the bdf from fdt_pci_addr */
*bdf = addr-phys_hi 0x00;
--
2.2.0.rc0.207.ga3a616c
___
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Re: [U-Boot] [PATCH] ARM: at91: mmc portA support is only for at91sam9g20ek_2mmc board
Hi, Bo On 1/19/2015 4:30 PM, Bo Shen wrote: Hi Josh, On 01/19/2015 03:25 PM, Josh Wu wrote: Current the MMC support will enable MCI port A, Which is only exist for 2mmc board. So by default we need to disable MMC (port A) support. And only enable it for 2mmc board. Otherwise, dataflash won't work in at91sam9260ek board as MMC has confliction with Dataflash in the CLK pin. Signed-off-by: Josh Wu josh...@atmel.com --- configs/at91sam9g20ek_2mmc_defconfig | 3 +++ configs/at91sam9g20ek_mmc_defconfig | 3 --- include/configs/at91sam9260ek.h | 6 -- 3 files changed, 7 insertions(+), 5 deletions(-) create mode 100644 configs/at91sam9g20ek_2mmc_defconfig delete mode 100644 configs/at91sam9g20ek_mmc_defconfig diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig new file mode 100644 index 000..4eef04f --- /dev/null +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS=AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC +CONFIG_ARM=y +CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9g20ek_mmc_defconfig b/configs/at91sam9g20ek_mmc_defconfig deleted file mode 100644 index 8cca2e5..000 --- a/configs/at91sam9g20ek_mmc_defconfig +++ /dev/null If removed this default configuration file, we can not use mmc at all, am I right? I change this file name from 'at91sam9g20ek_mmc_defconfig' to 'at91sam9g20ek_2mmc_defconfig'. So only when you use 'at91sam9g20ek_2mmc_defconfig', the mmc is enabled. Best Regards, Josh Wu @@ -1,3 +0,0 @@ -CONFIG_SYS_EXTRA_OPTIONS=AT91SAM9G20,SYS_USE_MMC -CONFIG_ARM=y -CONFIG_TARGET_AT91SAM9260EK=y diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index a6a80de..c4b2e16 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -90,7 +90,6 @@ #define CONFIG_CMD_PING1 #define CONFIG_CMD_DHCP1 #define CONFIG_CMD_NAND1 -#define CONFIG_CMD_MMC #define CONFIG_CMD_FAT #define CONFIG_CMD_USB1 @@ -133,14 +132,17 @@ # define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9260EK #endif -/* DataFlash */ #ifndef CONFIG_AT91SAM9G20EK_2MMC +/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH1 #define CONFIG_SYS_MAX_DATAFLASH_BANKS2 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS00xC000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS10xD000 /* CS1 */ #define AT91_SPI_CLK1500 +#else +/* Enable MMC. The MCCK is conflicted with DataFlash */ +#define CONFIG_CMD_MMC #endif #ifdef CONFIG_AT91SAM9G20EK Best Regards, Bo Shen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: mx6: Add Barco platinum-picon and platinum-titanium
On 10/12/2014 10:15, Stefan Roese wrote: This patch adds the new Barco platinum platform. It currently includes those two boards: platinum-titanium - This is the same board as the titanium that is already supported in mainline U-Boot. But its now moved to this new platform to support multiple flavors of imx6 boards in one directory. Its also moved to support SPL booting. And with this we use the run-time DDR configuration of this SPL support. The board is equipped with the Micron MT41J128M16JT-125 DDR chips. We now can remove the DDR related registers tuples from the imximage.cfg file. As all this is done in the SPL at run-time. platinum-picon -- This board is new and based on the MX6DL with 1GiB DDR using the Micron MT41K256M16HA DDR3 chips. Its also equipped with 2 NAND chips (each 512MiB). Signed-off-by: Stefan Roese s...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Pieter Ronsijn pieter.rons...@barco.com --- Applied to -u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: at91: mmc portA support is only for at91sam9g20ek_2mmc board
Hi Josh, On 01/19/2015 03:25 PM, Josh Wu wrote: Current the MMC support will enable MCI port A, Which is only exist for 2mmc board. So by default we need to disable MMC (port A) support. And only enable it for 2mmc board. Otherwise, dataflash won't work in at91sam9260ek board as MMC has confliction with Dataflash in the CLK pin. Signed-off-by: Josh Wu josh...@atmel.com --- configs/at91sam9g20ek_2mmc_defconfig | 3 +++ configs/at91sam9g20ek_mmc_defconfig | 3 --- include/configs/at91sam9260ek.h | 6 -- 3 files changed, 7 insertions(+), 5 deletions(-) create mode 100644 configs/at91sam9g20ek_2mmc_defconfig delete mode 100644 configs/at91sam9g20ek_mmc_defconfig diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig new file mode 100644 index 000..4eef04f --- /dev/null +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS=AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC +CONFIG_ARM=y +CONFIG_TARGET_AT91SAM9260EK=y diff --git a/configs/at91sam9g20ek_mmc_defconfig b/configs/at91sam9g20ek_mmc_defconfig deleted file mode 100644 index 8cca2e5..000 --- a/configs/at91sam9g20ek_mmc_defconfig +++ /dev/null If removed this default configuration file, we can not use mmc at all, am I right? @@ -1,3 +0,0 @@ -CONFIG_SYS_EXTRA_OPTIONS=AT91SAM9G20,SYS_USE_MMC -CONFIG_ARM=y -CONFIG_TARGET_AT91SAM9260EK=y diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index a6a80de..c4b2e16 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -90,7 +90,6 @@ #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -#define CONFIG_CMD_MMC #define CONFIG_CMD_FAT #define CONFIG_CMD_USB1 @@ -133,14 +132,17 @@ # define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9260EK #endif -/* DataFlash */ #ifndef CONFIG_AT91SAM9G20EK_2MMC +/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 #define CONFIG_SYS_MAX_DATAFLASH_BANKS2 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD000 /* CS1 */ #define AT91_SPI_CLK 1500 +#else +/* Enable MMC. The MCCK is conflicted with DataFlash */ +#define CONFIG_CMD_MMC #endif #ifdef CONFIG_AT91SAM9G20EK Best Regards, Bo Shen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/6] imx:mx6sxsabresd board spl support
Hi Peng,
series looks ok to me - just a small question:
On 30/12/2014 10:24, Peng Fan wrote:
Add board level spl support for mx6sxsabresd board.
Signed-off-by: Peng Fan peng@freescale.com
---
board/freescale/mx6sxsabresd/MAINTAINERS| 1 +
board/freescale/mx6sxsabresd/mx6sxsabresd.c | 168
2 files changed, 169 insertions(+)
diff --git a/board/freescale/mx6sxsabresd/MAINTAINERS
b/board/freescale/mx6sxsabresd/MAINTAINERS
index f52f300..c0f5d9c 100644
--- a/board/freescale/mx6sxsabresd/MAINTAINERS
+++ b/board/freescale/mx6sxsabresd/MAINTAINERS
@@ -4,3 +4,4 @@ S:Maintained
F: board/freescale/mx6sxsabresd/
F: include/configs/mx6sxsabresd.h
F: configs/mx6sxsabresd_defconfig
+F: configs/mx6sxsabresd_spl_defconfig
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index fd8bc72..74f6d40 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -326,6 +326,7 @@ int board_mmc_getcd(struct mmc *mmc)
int board_mmc_init(bd_t *bis)
{
+#ifndef CONFIG_SPL_BUILD
int i, ret;
/*
@@ -369,6 +370,47 @@ int board_mmc_init(bd_t *bis)
}
return 0;
+#else
+ struct src *src_regs = (struct src *)SRC_BASE_ADDR;
+ u32 val;
+ u32 port;
+
+ val = readl(src_regs-sbmr1);
+
+ if ((val 0xc0) != 0x40) {
+ printf(Not boot from USDHC!\n);
+ return -EINVAL;
+ }
+
+ port = (val 11) 0x3;
+ printf(port %d\n, port);
+ switch (port) {
+ case 1:
+ imx_iomux_v3_setup_multiple_pads(
+ usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
+ break;
+ case 2:
+ imx_iomux_v3_setup_multiple_pads(
+ usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
+ gpio_direction_input(USDHC3_CD_GPIO);
+ gpio_direction_output(USDHC3_PWR_GPIO, 1);
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+ break;
+ case 3:
+ imx_iomux_v3_setup_multiple_pads(
+ usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
+ gpio_direction_input(USDHC4_CD_GPIO);
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR;
+ break;
+ }
+
+ gd-arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
+ return fsl_esdhc_initialize(bis, usdhc_cfg[0]);
+#endif
}
int board_init(void)
@@ -394,3 +436,129 @@ int checkboard(void)
return 0;
}
+
+#ifdef CONFIG_SPL_BUILD
+#include libfdt.h
+#include spl.h
+#include asm/arch/mx6-ddr.h
+
+const struct mx6sx_iomux_ddr_regs mx6_ddr_ioregs = {
+ .dram_dqm0 = 0x0028,
+ .dram_dqm1 = 0x0028,
+ .dram_dqm2 = 0x0028,
+ .dram_dqm3 = 0x0028,
+ .dram_ras = 0x0020,
+ .dram_cas = 0x0020,
+ .dram_odt0 = 0x0020,
+ .dram_odt1 = 0x0020,
+ .dram_sdba2 = 0x,
+ .dram_sdcke0 = 0x3000,
+ .dram_sdcke1 = 0x3000,
+ .dram_sdclk_0 = 0x0030,
+ .dram_sdqs0 = 0x0028,
+ .dram_sdqs1 = 0x0028,
+ .dram_sdqs2 = 0x0028,
+ .dram_sdqs3 = 0x0028,
+ .dram_reset = 0x0020,
+};
+
+const struct mx6sx_iomux_grp_regs mx6_grp_ioregs = {
+ .grp_addds = 0x0020,
+ .grp_ddrmode_ctl = 0x0002,
+ .grp_ddrpke = 0x,
+ .grp_ddrmode = 0x0002,
+ .grp_b0ds = 0x0028,
+ .grp_b1ds = 0x0028,
+ .grp_ctlds = 0x0020,
+ .grp_ddr_type = 0x000c,
+ .grp_b2ds = 0x0028,
+ .grp_b3ds = 0x0028,
+};
+
+const struct mx6_mmdc_calibration mx6_mmcd_calib = {
+ .p0_mpwldectrl0 = 0x00290025,
+ .p0_mpwldectrl1 = 0x00220022,
+ .p0_mpdgctrl0 = 0x41480144,
+ .p0_mpdgctrl1 = 0x01340130,
+ .p0_mprddlctl = 0x3C3E4244,
+ .p0_mpwrdlctl = 0x34363638,
+};
+
+static struct mx6_ddr3_cfg mem_ddr = {
+ .mem_speed = 1600,
+ .density = 4,
+ .width = 32,
+ .banks = 8,
+ .rowaddr = 15,
+ .coladdr = 10,
+ .pagesz = 2,
+ .trcd = 1375,
+ .trcmin = 4875,
+ .trasmin = 3500,
+};
+
+static void ccgr_init(void)
+{
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ writel(0x, ccm-CCGR0);
+ writel(0x, ccm-CCGR1);
+ writel(0x, ccm-CCGR2);
+ writel(0x, ccm-CCGR3);
+ writel(0x, ccm-CCGR4);
+ writel(0x, ccm-CCGR5);
+ writel(0x, ccm-CCGR6);
+ writel(0x, ccm-CCGR7);
+}
+
Is it ok to enable all clocks ? This is quite uncommon in U-Boot and it
can raise some
Re: [U-Boot] [PATCH v2 2/3] ARM: at91: sama5d3xek: save enviroment as a FAT file in MMC card
Hi Josh, On 01/19/2015 03:06 PM, Josh Wu wrote: This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by: Josh Wu josh...@atmel.com Ackey-by: Bo Shen voice.s...@atmel.com --- include/configs/sama5d3xek.h | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index f2849d7..c29f25b 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -215,13 +215,15 @@ bootm 0x2200 - 0x2100 #elif CONFIG_SYS_USE_MMC /* bootstrap + u-boot + env in sd card */ -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET 0x2000 -#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_IS_IN_FAT +#define CONFIG_FAT_WRITE Nitpick: Can you move in the following condition include? ---8--- #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) #define CONFIG_CMD_FAT #endif ---8--- +#define FAT_ENV_INTERFACE mmc +#define FAT_ENV_FILE uboot.env +#define FAT_ENV_DEVICE_AND_PART0 +#define CONFIG_ENV_SIZE0x4000 #define CONFIG_BOOTCOMMANDfatload mmc 0:1 0x2100 dtb; \ fatload mmc 0:1 0x2200 uImage; \ bootm 0x2200 - 0x2100 -#define CONFIG_SYS_MMC_ENV_DEV 0 #else #define CONFIG_ENV_IS_NOWHERE #endif Best Regards, Bo Shen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/3] ARM: at91: sama5d3_xplained: save environment in a FAT file in MMC card
Hi Josh, On 01/19/2015 03:06 PM, Josh Wu wrote: This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of saving it in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by: Josh Wu josh...@atmel.com After you remove the duplicated definition. Acked-by: Bo Shen voice.s...@atmel.com --- include/configs/sama5d3_xplained.h | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index d5588b1..a697035 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -169,13 +169,15 @@ bootz 0x2200 - 0x2100 #elif CONFIG_SYS_USE_MMC /* bootstrap + u-boot + env in sd card */ -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET 0x2000 -#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_IS_IN_FAT +#define CONFIG_FAT_WRITE This has been defined in ---8--- #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) #define CONFIG_CMD_FAT #define CONFIG_FAT_WRITE ---8--- +#define FAT_ENV_INTERFACE mmc +#define FAT_ENV_FILE uboot.env +#define FAT_ENV_DEVICE_AND_PART0 +#define CONFIG_ENV_SIZE0x4000 #define CONFIG_BOOTCOMMANDfatload mmc 0:1 0x2100 at91-sama5d3_xplained.dtb; \ fatload mmc 0:1 0x2200 zImage; \ bootz 0x2200 - 0x2100 -#define CONFIG_SYS_MMC_ENV_DEV 0 #else #define CONFIG_ENV_IS_NOWHERE #endif Best Regards, Bo Shen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/6] imx:mx6sxsabresd board spl support
Hi Stefano,
On 1/19/2015 4:18 PM, Stefano Babic wrote:
Hi Peng,
series looks ok to me - just a small question:
On 30/12/2014 10:24, Peng Fan wrote:
Add board level spl support for mx6sxsabresd board.
Signed-off-by: Peng Fan peng@freescale.com
---
board/freescale/mx6sxsabresd/MAINTAINERS| 1 +
board/freescale/mx6sxsabresd/mx6sxsabresd.c | 168
2 files changed, 169 insertions(+)
diff --git a/board/freescale/mx6sxsabresd/MAINTAINERS
b/board/freescale/mx6sxsabresd/MAINTAINERS
index f52f300..c0f5d9c 100644
--- a/board/freescale/mx6sxsabresd/MAINTAINERS
+++ b/board/freescale/mx6sxsabresd/MAINTAINERS
@@ -4,3 +4,4 @@ S: Maintained
F:board/freescale/mx6sxsabresd/
F:include/configs/mx6sxsabresd.h
F:configs/mx6sxsabresd_defconfig
+F: configs/mx6sxsabresd_spl_defconfig
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index fd8bc72..74f6d40 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -326,6 +326,7 @@ int board_mmc_getcd(struct mmc *mmc)
int board_mmc_init(bd_t *bis)
{
+#ifndef CONFIG_SPL_BUILD
int i, ret;
/*
@@ -369,6 +370,47 @@ int board_mmc_init(bd_t *bis)
}
return 0;
+#else
+ struct src *src_regs = (struct src *)SRC_BASE_ADDR;
+ u32 val;
+ u32 port;
+
+ val = readl(src_regs-sbmr1);
+
+ if ((val 0xc0) != 0x40) {
+ printf(Not boot from USDHC!\n);
+ return -EINVAL;
+ }
+
+ port = (val 11) 0x3;
+ printf(port %d\n, port);
+ switch (port) {
+ case 1:
+ imx_iomux_v3_setup_multiple_pads(
+ usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
+ break;
+ case 2:
+ imx_iomux_v3_setup_multiple_pads(
+ usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
+ gpio_direction_input(USDHC3_CD_GPIO);
+ gpio_direction_output(USDHC3_PWR_GPIO, 1);
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+ break;
+ case 3:
+ imx_iomux_v3_setup_multiple_pads(
+ usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
+ gpio_direction_input(USDHC4_CD_GPIO);
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR;
+ break;
+ }
+
+ gd-arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
+ return fsl_esdhc_initialize(bis, usdhc_cfg[0]);
+#endif
}
int board_init(void)
@@ -394,3 +436,129 @@ int checkboard(void)
return 0;
}
+
+#ifdef CONFIG_SPL_BUILD
+#include libfdt.h
+#include spl.h
+#include asm/arch/mx6-ddr.h
+
+const struct mx6sx_iomux_ddr_regs mx6_ddr_ioregs = {
+ .dram_dqm0 = 0x0028,
+ .dram_dqm1 = 0x0028,
+ .dram_dqm2 = 0x0028,
+ .dram_dqm3 = 0x0028,
+ .dram_ras = 0x0020,
+ .dram_cas = 0x0020,
+ .dram_odt0 = 0x0020,
+ .dram_odt1 = 0x0020,
+ .dram_sdba2 = 0x,
+ .dram_sdcke0 = 0x3000,
+ .dram_sdcke1 = 0x3000,
+ .dram_sdclk_0 = 0x0030,
+ .dram_sdqs0 = 0x0028,
+ .dram_sdqs1 = 0x0028,
+ .dram_sdqs2 = 0x0028,
+ .dram_sdqs3 = 0x0028,
+ .dram_reset = 0x0020,
+};
+
+const struct mx6sx_iomux_grp_regs mx6_grp_ioregs = {
+ .grp_addds = 0x0020,
+ .grp_ddrmode_ctl = 0x0002,
+ .grp_ddrpke = 0x,
+ .grp_ddrmode = 0x0002,
+ .grp_b0ds = 0x0028,
+ .grp_b1ds = 0x0028,
+ .grp_ctlds = 0x0020,
+ .grp_ddr_type = 0x000c,
+ .grp_b2ds = 0x0028,
+ .grp_b3ds = 0x0028,
+};
+
+const struct mx6_mmdc_calibration mx6_mmcd_calib = {
+ .p0_mpwldectrl0 = 0x00290025,
+ .p0_mpwldectrl1 = 0x00220022,
+ .p0_mpdgctrl0 = 0x41480144,
+ .p0_mpdgctrl1 = 0x01340130,
+ .p0_mprddlctl = 0x3C3E4244,
+ .p0_mpwrdlctl = 0x34363638,
+};
+
+static struct mx6_ddr3_cfg mem_ddr = {
+ .mem_speed = 1600,
+ .density = 4,
+ .width = 32,
+ .banks = 8,
+ .rowaddr = 15,
+ .coladdr = 10,
+ .pagesz = 2,
+ .trcd = 1375,
+ .trcmin = 4875,
+ .trasmin = 3500,
+};
+
+static void ccgr_init(void)
+{
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ writel(0x, ccm-CCGR0);
+ writel(0x, ccm-CCGR1);
+ writel(0x, ccm-CCGR2);
+ writel(0x, ccm-CCGR3);
+ writel(0x, ccm-CCGR4);
+ writel(0x, ccm-CCGR5);
+ writel(0x, ccm-CCGR6);
+ writel(0x,
Re: [U-Boot] [PATCH 0/2] Invoke board specific board_usb_cleanup function
On Monday, January 19, 2015 at 08:07:14 AM, Inha Song wrote: This patches invoke board-specific usb cleanup interface (board_usb_cleanup) After USB initalization. Inha Song (2): usb: common: provide a _weak board_usb_cleanup() function usb: invoke board specific USB cleanup interface Hi, where do you plan to use this _weak function please ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mxsboot : Support of 224-bytes OOB area length
Hi Alexandre,
On 08/01/2015 17:14, Alexandre Coffignal wrote:
Add support for the NAND Flash chip with page size of 4096+224-bytes OOB area
length
For example Micron MT29F4G08 NAND flash device defines a OOB area which is
224 bytes long (oobsize).
Signed-off-by: Alexandre Coffignal acoffig...@geral.com
---
tools/mxsboot.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/tools/mxsboot.c b/tools/mxsboot.c
index 90b2173..6d48cfb 100644
--- a/tools/mxsboot.c
+++ b/tools/mxsboot.c
@@ -142,6 +142,9 @@ static inline uint32_t
mx28_nand_get_ecc_strength(uint32_t page_data_size,
if (page_oob_size == 218)
return 16;
+
+ if (page_oob_size == 224)
+ return 16;
}
return 0;
@@ -269,6 +272,9 @@ static struct mx28_nand_fcb *mx28_nand_get_fcb(uint32_t
size)
} else if (nand_oobsize == 218) {
fcb-ecc_block_n_ecc_type = 8;
fcb-ecc_block_0_ecc_type = 8;
+ } else if (nand_oobsize == 224) {
+ fcb-ecc_block_n_ecc_type = 8;
+ fcb-ecc_block_0_ecc_type = 8;
}
}
I have not your use case, but it looks ok for me and I merge it.
Applied to -u-boot-imx, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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Re: [U-Boot] [PATCH v2 1/3] ARM: at91: sama5d3_xplained: save environment in a FAT file in MMC card
On 1/19/2015 4:16 PM, Bo Shen wrote: Hi Josh, On 01/19/2015 03:06 PM, Josh Wu wrote: This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of saving it in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by: Josh Wu josh...@atmel.com After you remove the duplicated definition. Acked-by: Bo Shen voice.s...@atmel.com Thanks. --- include/configs/sama5d3_xplained.h | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index d5588b1..a697035 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -169,13 +169,15 @@ bootz 0x2200 - 0x2100 #elif CONFIG_SYS_USE_MMC /* bootstrap + u-boot + env in sd card */ -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET0x2000 -#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_IS_IN_FAT +#define CONFIG_FAT_WRITE This has been defined in ---8--- #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) #define CONFIG_CMD_FAT #define CONFIG_FAT_WRITE ---8--- Okay, you are right. Will do. Best Regards, Josh Wu +#define FAT_ENV_INTERFACEmmc +#define FAT_ENV_FILEuboot.env +#define FAT_ENV_DEVICE_AND_PART0 +#define CONFIG_ENV_SIZE0x4000 #define CONFIG_BOOTCOMMANDfatload mmc 0:1 0x2100 at91-sama5d3_xplained.dtb; \ fatload mmc 0:1 0x2200 zImage; \ bootz 0x2200 - 0x2100 -#define CONFIG_SYS_MMC_ENV_DEV0 #else #define CONFIG_ENV_IS_NOWHERE #endif Best Regards, Bo Shen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6sxsabresd: Remove unneeded board_late_init()
On 29/12/2014 19:23, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Since commit 1f98e31bc0b2c37a (imx: mx6sxsabresd: Use the pfuze common init function) board_late_init() became empty, so we can safely remove this unneeded function. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to -u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] wandboard: Use 32bit color depth for Fusion LCD
Hi Otavio,
On 15/01/2015 16:32, Otavio Salvador wrote:
The Fusion LCD needs the 32bit color depth to properly work; the
default is different on the 3.10.17 kernels and it is better to ensure
it work out of box using proper default color setting.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
include/configs/wandboard.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 809017c..117d1f7 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -175,7 +175,7 @@
if i2c probe 0x10; then \
setenv bootargs ${bootargs} \
video=mxcfb${nextcon}:dev=lcd,800x480@60, \
- if=RGB666; \
+ if=RGB666,bpp=32; \
if test 0 -eq ${nextcon}; then \
setenv fbmem fbmem=10M; \
else \
Applied to -u-boot-imx, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
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Re: [U-Boot] [PATCH v2 3/3] ARM: at91: at91sam9x5: save environment to a FAT file in MMC card
Hi Josh, On 01/19/2015 03:06 PM, Josh Wu wrote: This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of saving it in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by: Josh Wu josh...@atmel.com Acked-by: Bo Shen voice.s...@atmel.com --- include/configs/at91sam9x5ek.h | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index b1d4baa..6d8b71d 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -203,11 +203,12 @@ bootm 0x2200 #else /* CONFIG_SYS_USE_MMC */ /* bootstrap + u-boot + env + linux in mmc */ -#define CONFIG_ENV_IS_IN_MMC -/* For FAT system, most cases it should be in the reserved sector */ -#define CONFIG_ENV_OFFSET 0x2000 -#define CONFIG_ENV_SIZE0x1000 -#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_IS_IN_FAT +#define CONFIG_FAT_WRITE +#define FAT_ENV_INTERFACE mmc +#define FAT_ENV_FILE uboot.env +#define FAT_ENV_DEVICE_AND_PART 0 +#define CONFIG_ENV_SIZE0x4000 #endif #ifdef CONFIG_SYS_USE_MMC Best Regards, Bo Shen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 05/12] x86: rtc: mc146818: Add helpers to read/write CMOS RAM
On x86 we use CMOS RAM to read and write some settings. Add basic support
for this, including access to registers 128-255.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Adjust functions to remain compatible with other RTC drivers
Changes in v2:
- Adjust the mc146818 driver instead of adding a new cmos.h header
drivers/rtc/mc146818.c | 121 +
include/rtc.h | 32 +
2 files changed, 105 insertions(+), 48 deletions(-)
diff --git a/drivers/rtc/mc146818.c b/drivers/rtc/mc146818.c
index 39e6041..c9d318c 100644
--- a/drivers/rtc/mc146818.c
+++ b/drivers/rtc/mc146818.c
@@ -27,9 +27,6 @@
/* Set this to 1 to clear the CMOS RAM */
#define CLEAR_CMOS 0
-static uchar rtc_read (uchar reg);
-static void rtc_write (uchar reg, uchar val);
-
#define RTC_PORT_MC146818 CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70
#define RTC_SECONDS0x00
#define RTC_SECONDS_ALARM 0x01
@@ -60,24 +57,24 @@ int rtc_get (struct rtc_time *tmp)
{
uchar sec, min, hour, mday, wday, mon, year;
/* here check if rtc can be accessed */
- while((rtc_read(RTC_CONFIG_A)0x80)==0x80);
- sec = rtc_read (RTC_SECONDS);
- min = rtc_read (RTC_MINUTES);
- hour= rtc_read (RTC_HOURS);
- mday= rtc_read (RTC_DATE_OF_MONTH);
- wday= rtc_read (RTC_DAY_OF_WEEK);
- mon = rtc_read (RTC_MONTH);
- year= rtc_read (RTC_YEAR);
+ while ((rtc_read8(RTC_CONFIG_A) 0x80) == 0x80);
+ sec = rtc_read8(RTC_SECONDS);
+ min = rtc_read8(RTC_MINUTES);
+ hour= rtc_read8(RTC_HOURS);
+ mday= rtc_read8(RTC_DATE_OF_MONTH);
+ wday= rtc_read8(RTC_DAY_OF_WEEK);
+ mon = rtc_read8(RTC_MONTH);
+ year= rtc_read8(RTC_YEAR);
#ifdef RTC_DEBUG
printf ( Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x
hr: %02x min: %02x sec: %02x\n,
year, mon, mday, wday,
hour, min, sec );
printf ( Alarms: month: %02x hour: %02x min: %02x sec: %02x\n,
- rtc_read (RTC_CONFIG_D) 0x3F,
- rtc_read (RTC_HOURS_ALARM),
- rtc_read (RTC_MINUTES_ALARM),
- rtc_read (RTC_SECONDS_ALARM) );
+ rtc_read8(RTC_CONFIG_D) 0x3F,
+ rtc_read8(RTC_HOURS_ALARM),
+ rtc_read8(RTC_MINUTES_ALARM),
+ rtc_read8(RTC_SECONDS_ALARM));
#endif
tmp-tm_sec = bcd2bin (sec 0x7F);
tmp-tm_min = bcd2bin (min 0x7F);
@@ -108,80 +105,108 @@ int rtc_set (struct rtc_time *tmp)
tmp-tm_year, tmp-tm_mon, tmp-tm_mday, tmp-tm_wday,
tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
#endif
- rtc_write(RTC_CONFIG_B,0x82); /* disables the RTC to update the regs */
+ rtc_write8(RTC_CONFIG_B, 0x82); /* disable the RTC to update the regs */
- rtc_write (RTC_YEAR, bin2bcd(tmp-tm_year % 100));
- rtc_write (RTC_MONTH, bin2bcd(tmp-tm_mon));
- rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp-tm_wday));
- rtc_write (RTC_DATE_OF_MONTH, bin2bcd(tmp-tm_mday));
- rtc_write (RTC_HOURS, bin2bcd(tmp-tm_hour));
- rtc_write (RTC_MINUTES, bin2bcd(tmp-tm_min ));
- rtc_write (RTC_SECONDS, bin2bcd(tmp-tm_sec ));
- rtc_write(RTC_CONFIG_B,0x02); /* enables the RTC to update the regs */
+ rtc_write8(RTC_YEAR, bin2bcd(tmp-tm_year % 100));
+ rtc_write8(RTC_MONTH, bin2bcd(tmp-tm_mon));
+ rtc_write8(RTC_DAY_OF_WEEK, bin2bcd(tmp-tm_wday));
+ rtc_write8(RTC_DATE_OF_MONTH, bin2bcd(tmp-tm_mday));
+ rtc_write8(RTC_HOURS, bin2bcd(tmp-tm_hour));
+ rtc_write8(RTC_MINUTES, bin2bcd(tmp-tm_min));
+ rtc_write8(RTC_SECONDS, bin2bcd(tmp-tm_sec));
+ rtc_write8(RTC_CONFIG_B, 0x02); /* enable the RTC to update the regs */
return 0;
}
void rtc_reset (void)
{
- rtc_write(RTC_CONFIG_B,0x82); /* disables the RTC to update the regs */
- rtc_write(RTC_CONFIG_A,0x20); /* Normal OP */
- rtc_write(RTC_CONFIG_B,0x00);
- rtc_write(RTC_CONFIG_B,0x00);
- rtc_write(RTC_CONFIG_B,0x02); /* enables the RTC to update the regs */
+ rtc_write8(RTC_CONFIG_B, 0x82); /* disable the RTC to update the regs */
+ rtc_write8(RTC_CONFIG_A, 0x20); /* Normal OP */
+ rtc_write8(RTC_CONFIG_B, 0x00);
+ rtc_write8(RTC_CONFIG_B, 0x00);
+ rtc_write8(RTC_CONFIG_B, 0x02); /* enable the RTC to update the regs */
}
/* - */
-#ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
/*
* use direct memory access
*/
-static uchar rtc_read (uchar reg)
+int rtc_read8(int reg)
{
+#ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg);
+#else
+ int ofs = 0;
+
+ if (reg = 128) {
+ ofs = 2;
+ reg -= 128;
+ }
+ out8(RTC_PORT_MC146818 + ofs, reg);
+
+
[U-Boot] [PATCH v3 06/12] x86: spi: Add device tree support
As a temporary measure before the ICH driver moves over to driver model,
add device tree support to the driver.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
drivers/spi/ich.c| 7 +++
include/configs/x86-common.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 0379444..fdff158 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -153,6 +153,13 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
unsigned int cs,
return ich-slave;
}
+struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,
+ int spi_node)
+{
+ /* We only support a single SPI at present */
+ return spi_setup_slave(0, 0, 2000, 0);
+}
+
void spi_free_slave(struct spi_slave *slave)
{
struct ich_spi_slave *ich = to_ich_spi(slave);
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 4f0a3c5..ecedfc3 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -211,6 +211,7 @@
#define CONFIG_CMD_SF_TEST
#define CONFIG_CMD_SPI
#define CONFIG_SPI
+#define CONFIG_OF_SPI_FLASH
/*---
* Environment configuration
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v3 03/12] net: Use new checksum functions
Drop the old checksum functions in favour of the new ones.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Adjust net/ code to use the new checksum functions
Changes in v2: None
include/net.h | 4
net/net.c | 25 ++---
net/ping.c| 10 --
3 files changed, 6 insertions(+), 33 deletions(-)
diff --git a/include/net.h b/include/net.h
index 73ea88b..43e3d28 100644
--- a/include/net.h
+++ b/include/net.h
@@ -512,10 +512,6 @@ unsigned add_ip_checksums(unsigned offset, unsigned sum,
unsigned new_sum);
*/
int ip_checksum_ok(const void *addr, unsigned nbytes);
-/* Checksum */
-extern int NetCksumOk(uchar *, int); /* Return true if cksum OK */
-extern uintNetCksum(uchar *, int); /* Calculate the checksum */
-
/* Callbacks */
extern rxhand_f *net_get_udp_handler(void);/* Get UDP RX packet handler */
extern void net_set_udp_handler(rxhand_f *); /* Set UDP RX packet handler */
diff --git a/net/net.c b/net/net.c
index 2bea07b..b60ce62 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1086,7 +1086,7 @@ NetReceive(uchar *inpkt, int len)
if ((ip-ip_hl_v 0x0f) 0x05)
return;
/* Check the Checksum of the header */
- if (!NetCksumOk((uchar *)ip, IP_HDR_SIZE / 2)) {
+ if (!ip_checksum_ok((uchar *)ip, IP_HDR_SIZE)) {
debug(checksum bad\n);
return;
}
@@ -1291,27 +1291,6 @@ common:
/**/
int
-NetCksumOk(uchar *ptr, int len)
-{
- return !((NetCksum(ptr, len) + 1) 0xfffe);
-}
-
-
-unsigned
-NetCksum(uchar *ptr, int len)
-{
- ulong xsum;
- ushort *p = (ushort *)ptr;
-
- xsum = 0;
- while (len-- 0)
- xsum += *p++;
- xsum = (xsum 0x) + (xsum 16);
- xsum = (xsum 0x) + (xsum 16);
- return xsum 0x;
-}
-
-int
NetEthHdrSize(void)
{
ushort myvlanid;
@@ -1410,7 +1389,7 @@ void net_set_udp_header(uchar *pkt, IPaddr_t dest, int
dport, int sport,
net_set_ip_header(pkt, dest, NetOurIP);
ip-ip_len = htons(IP_UDP_HDR_SIZE + len);
ip-ip_p = IPPROTO_UDP;
- ip-ip_sum = ~NetCksum((uchar *)ip, IP_HDR_SIZE 1);
+ ip-ip_sum = compute_ip_checksum(ip, IP_HDR_SIZE);
ip-udp_src = htons(sport);
ip-udp_dst = htons(dport);
diff --git a/net/ping.c b/net/ping.c
index 2be56ed..366f518 100644
--- a/net/ping.c
+++ b/net/ping.c
@@ -29,14 +29,14 @@ static void set_icmp_header(uchar *pkt, IPaddr_t dest)
ip-ip_len = htons(IP_ICMP_HDR_SIZE);
ip-ip_p = IPPROTO_ICMP;
- ip-ip_sum = ~NetCksum((uchar *)ip, IP_HDR_SIZE 1);
+ ip-ip_sum = compute_ip_checksum(ip, IP_HDR_SIZE);
icmp-type = ICMP_ECHO_REQUEST;
icmp-code = 0;
icmp-checksum = 0;
icmp-un.echo.id = 0;
icmp-un.echo.sequence = htons(PingSeqNo++);
- icmp-checksum = ~NetCksum((uchar *)icmp, ICMP_HDR_SIZE 1);
+ icmp-checksum = compute_ip_checksum(icmp, ICMP_HDR_SIZE);
}
static int ping_send(void)
@@ -101,13 +101,11 @@ void ping_receive(struct ethernet_hdr *et, struct
ip_udp_hdr *ip, int len)
ip-ip_off = 0;
NetCopyIP((void *)ip-ip_dst, ip-ip_src);
NetCopyIP((void *)ip-ip_src, NetOurIP);
- ip-ip_sum = ~NetCksum((uchar *)ip,
- IP_HDR_SIZE 1);
+ ip-ip_sum = compute_ip_checksum(ip, IP_HDR_SIZE);
icmph-type = ICMP_ECHO_REPLY;
icmph-checksum = 0;
- icmph-checksum = ~NetCksum((uchar *)icmph,
- (len - IP_HDR_SIZE) 1);
+ icmph-checksum = compute_ip_checksum(icmph, len - IP_HDR_SIZE);
NetSendPacket((uchar *)et, eth_hdr_size + len);
return;
/* default:
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v3 10/12] x86: config: Enable hook for saving MRC configuration
Add a hook to ensure that this information is saved.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Add misc_init_r() call for link now that it is shared with chromebook_link
Changes in v2: None
arch/x86/cpu/coreboot/coreboot.c | 5 +
include/configs/chromebook_link.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 6d06d5a..4cdd0d4 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -99,3 +99,8 @@ void panic_puts(const char *str)
while (*str)
NS16550_putc(port, *str++);
}
+
+int misc_init_r(void)
+{
+ return 0;
+}
diff --git a/include/configs/chromebook_link.h
b/include/configs/chromebook_link.h
index 7e6d239..6e8b9ef 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -20,6 +20,7 @@
#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MISC_INIT_R
#define CONFIG_NR_DRAM_BANKS 8
#define CONFIG_X86_MRC_ADDR0xfffa
--
2.2.0.rc0.207.ga3a616c
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Re: [U-Boot] [PATCH] board_f: save malloc_base from zeroing in case of CONFIG_SYS_MALLOC_F_LEN
Hello Alexey, On Mon, 19 Jan 2015 20:55:03 +0300, Alexey Brodkin alexey.brod...@synopsys.com wrote: In case of CONFIG_SYS_MALLOC_F_LEN malloc_base is used for early start-up code and is set very early, typically in start.S or crt1.S. There is no crt1.S in U-Boot. Did you mean crt0.S? In current implementation in case of CONFIG_SYS_GENERIC_GLOBAL_DATA all global data gets zeroed on board_init_f entry. But by that time malloc_base could have been set already, which means it will be zeroed and subsequent C-code will be executed improperly (if executed at all - if there's no memory mapped to 0 or it is read-only then on some arches there will be an exception and others will quetly die). To work-around described situation we just need to make sure malloc_base is saved prior zeroing global data and recovered afterwards. Keeping data from being zeroed etc is usually done through GD. Could malloc_base be placed there instead of creating a specific exemption for it? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] Enable journal replay for UBIFS
Hello Anton, Am 19.01.2015 14:48, schrieb Anton Habegger: During mount_ubifs the ubifs_replay_journal was disabled. This patch enables it again and fix some unrecoverable UBIFS volumes. The following patch enables the error handling for ubifs_replay_journal as well. Please see discussion Unreadable UBIFS partition after power cuts. Signed-off-by: Anton Habegger anton.habeg...@delta-es.com --- fs/ubifs/Makefile | 2 +- fs/ubifs/gc.c | 987 ++ fs/ubifs/replay.c | 8 +- fs/ubifs/super.c | 8 +- fs/ubifs/tnc.c| 7 +- 5 files changed, 997 insertions(+), 15 deletions(-) create mode 100644 fs/ubifs/gc.c Thanks! diff --git a/fs/ubifs/Makefile b/fs/ubifs/Makefile index 8c8c6ac..5efb349 100644 --- a/fs/ubifs/Makefile +++ b/fs/ubifs/Makefile @@ -12,4 +12,4 @@ obj-y := ubifs.o io.o super.o sb.o master.o lpt.o obj-y += lpt_commit.o scan.o lprops.o obj-y += tnc.o tnc_misc.o debug.o crc16.o budget.o -obj-y += log.o orphan.o recovery.o replay.o +obj-y += log.o orphan.o recovery.o replay.o gc.o Hmm do we really need this in u-boot? Ah, the most functions are unneeded ... ok. diff --git a/fs/ubifs/gc.c b/fs/ubifs/gc.c new file mode 100644 index 000..159ee67 --- /dev/null +++ b/fs/ubifs/gc.c @@ -0,0 +1,987 @@ +/* + * This file is part of UBIFS. + * + * Copyright (C) 2006-2008 Nokia Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 51 + * Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * Authors: Adrian Hunter + * Artem Bityutskiy (Битюцкий Артём) + */ + +/* + * This file implements garbage collection. The procedure for garbage collection + * is different depending on whether a LEB as an index LEB (contains index + * nodes) or not. For non-index LEBs, garbage collection finds a LEB which + * contains a lot of dirty space (obsolete nodes), and copies the non-obsolete + * nodes to the journal, at which point the garbage-collected LEB is free to be + * reused. For index LEBs, garbage collection marks the non-obsolete index nodes + * dirty in the TNC, and after the next commit, the garbage-collected LEB is + * to be reused. Garbage collection will cause the number of dirty index nodes + * to grow, however sufficient space is reserved for the index to ensure the + * commit will never run out of space. + * + * Notes about dead watermark. At current UBIFS implementation we assume that + * LEBs which have less than @c-dead_wm bytes of free + dirty space are full + * and not worth garbage-collecting. The dead watermark is one min. I/O unit + * size, or min. UBIFS node size, depending on what is greater. Indeed, UBIFS + * Garbage Collector has to synchronize the GC head's write buffer before + * returning, so this is about wasting one min. I/O unit. However, UBIFS GC can + * actually reclaim even very small pieces of dirty space by garbage collecting + * enough dirty LEBs, but we do not bother doing this at this implementation. + * + * Notes about dark watermark. The results of GC work depends on how big are + * the UBIFS nodes GC deals with. Large nodes make GC waste more space. Indeed, + * if GC move data from LEB A to LEB B and nodes in LEB A are large, GC would + * have to waste large pieces of free space at the end of LEB B, because nodes + * from LEB A would not fit. And the worst situation is when all nodes are of + * maximum size. So dark watermark is the amount of free + dirty space in LEB + * which are guaranteed to be reclaimable. If LEB has less space, the GC might + * be unable to reclaim it. So, LEBs with free + dirty greater than dark + * watermark are good LEBs from GC's point of few. The other LEBs are not so + * good, and GC takes extra care when moving them. + */ +#ifndef __UBOOT__ +#include linux/slab.h +#include linux/pagemap.h +#include linux/list_sort.h +#endif +#include ubifs.h + +#ifndef __UBOOT__ +/* + * GC may need to move more than one LEB to make progress. The below constants + * define soft and hard limits on the number of LEBs the garbage collector + * may move. + */ +#define SOFT_LEBS_LIMIT 4 +#define HARD_LEBS_LIMIT 32 + +/** + * switch_gc_head - switch the garbage collection journal head. + * @c: UBIFS file-system description object + * @buf: buffer to write + * @len: length of the buffer to write + * @lnum: LEB number written is returned here + * @offs: offset written is returned here + * + * This function switch the GC
Re: [U-Boot] [PATCH v2 04/22] x86: video: Add support for CONFIG_CONSOLE_SCROLL_LINES
On Thu, 1 Jan 2015 16:17:57 -0700 Simon Glass s...@chromium.org wrote: Some machines are very slow to scroll their displays. To cope with this, support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows the display to operate at an acceptable speed by scrolling 5 lines at a time. This same option is available for LCDs so when these systems are unified this code can be unified also. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: None drivers/video/cfb_console.c | 26 +- 1 file changed, 17 insertions(+), 9 deletions(-) Acked-by: Anatolij Gustschin ag...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] printf and R9 in ARM architecture
In standalone applications, it seems that the execution of printf function in U-Boot is dependent on the value of register R9, which is setup in app_startup. But r9 can be used by your program at the decision of gcc compilation which is not aware of this dependence. This is especially the case if +O2 is used! My version is U-Boot 2014.10 Regards, Dashi Cao ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] mtd:mxs:nand support oobsize bigger than 512
Hi Marek,
And this one.
On 12/19/2014 12:39 PM, Peng Fan wrote:
If ecc chunk data size is 512 and oobsize is bigger than 512, there is
a chance that block_mark_bit_offset conflicts with bch ecc area.
The following graph is modified from kernel gpmi-nand.c driver with each data
block 512 bytes.
We can see that Block Mark conflicts with ecc area from bch view.
We can enlarge the ecc chunk size to avoid this problem to those oobsize
which is larger than 512.
| P|
|-|
| |
|(Block Mark) |
| P' | | | |
|---| D | | O'|
| |-| |-|
V V V V V
+---+--+-+--+-+--+-+--+-+---+
| M | data |E| data |E| data |E| data |E| |
+---+--+-+--+-+--+-+--+-+---+
^ ^
| O|
||
P : the page size for BCH module.
E : The ECC strength.
G : the length of Galois Field.
N : The chunk count of per page.
M : the metasize of per page.
C : the ecc chunk size, aka the data above.
P': the nand chip's page size.
O : the nand chip's oob size.
O': the free oob.
Signed-off-by: Peng Fan peng@freescale.com
---
arch/arm/include/asm/imx-common/regs-bch.h | 2 ++
drivers/mtd/nand/mxs_nand.c| 33 ++
2 files changed, 27 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/imx-common/regs-bch.h
b/arch/arm/include/asm/imx-common/regs-bch.h
index a33d341..5c47783 100644
--- a/arch/arm/include/asm/imx-common/regs-bch.h
+++ b/arch/arm/include/asm/imx-common/regs-bch.h
@@ -148,6 +148,7 @@ struct mxs_bch_regs {
#define BCH_FLASHLAYOUT0_ECC0_ECC30 (0xf 12)
#define BCH_FLASHLAYOUT0_ECC0_ECC32 (0x10 12)
#define BCH_FLASHLAYOUT0_GF13_0_GF14_1 (1 10)
+#defineBCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET 10
#define BCH_FLASHLAYOUT0_DATA0_SIZE_MASK0xfff
#define BCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET 0
@@ -178,6 +179,7 @@ struct mxs_bch_regs {
#define BCH_FLASHLAYOUT1_ECCN_ECC30 (0xf 12)
#define BCH_FLASHLAYOUT1_ECCN_ECC32 (0x10 12)
#define BCH_FLASHLAYOUT1_GF13_0_GF14_1 (1 10)
+#defineBCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET 10
#define BCH_FLASHLAYOUT1_DATAN_SIZE_MASK0xfff
#define BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET 0
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index a45fcf9..0db9eb3 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -29,6 +29,7 @@
#define MXS_NAND_DMA_DESCRIPTOR_COUNT 4
+#define MXS_NAND_MAX_CHUNK_DATA_CHUNK_SIZE 1024
#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE 512
#if defined(CONFIG_MX6)
#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT2
@@ -68,6 +69,8 @@ struct mxs_nand_info {
};
struct nand_ecclayout fake_ecc_layout;
+static int chunk_data_size = MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+static int gf_len = 13;
/*
* Cache management functions
@@ -130,12 +133,12 @@ static void mxs_nand_return_dma_descs(struct
mxs_nand_info *info)
static uint32_t mxs_nand_ecc_chunk_cnt(uint32_t page_data_size)
{
- return page_data_size / MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+ return page_data_size / chunk_data_size;
}
static uint32_t mxs_nand_ecc_size_in_bits(uint32_t ecc_strength)
{
- return ecc_strength * 13;
+ return ecc_strength * gf_len;
}
static uint32_t mxs_nand_aux_status_offset(void)
@@ -149,7 +152,7 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t
page_data_size,
int ecc_strength;
ecc_strength = ((page_oob_size - MXS_NAND_METADATA_SIZE) * 8)
- / (13 * mxs_nand_ecc_chunk_cnt(page_data_size));
+ / (gf_len * mxs_nand_ecc_chunk_cnt(page_data_size));
return round_down(ecc_strength, 2);
}
@@ -164,7 +167,7 @@ static inline uint32_t mxs_nand_get_mark_offset(uint32_t
page_data_size,
uint32_t block_mark_chunk_bit_offset;
uint32_t block_mark_bit_offset;
-
Re: [U-Boot] [PATCH 1/2] mtd:mxs:nand calculate ecc strength dynamically
Hi Marek,
Since you are familiar with this driver, would you please help review
this patch?
On 12/19/2014 12:39 PM, Peng Fan wrote:
Calculate ecc strength according oobsize, but not hardcoded
which is not aligned with kernel driver
Signed-off-by: Peng Fan peng@freescale.com
Signed-off-by: Ye.Li b37...@freescale.com
---
drivers/mtd/nand/mxs_nand.c | 22 --
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 7a064ab..a45fcf9 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -146,26 +146,12 @@ static uint32_t mxs_nand_aux_status_offset(void)
static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
uint32_t page_oob_size)
{
- if (page_data_size == 2048) {
- if (page_oob_size == 64)
- return 8;
+ int ecc_strength;
- if (page_oob_size == 112)
- return 14;
- }
-
- if (page_data_size == 4096) {
- if (page_oob_size == 128)
- return 8;
-
- if (page_oob_size == 218)
- return 16;
+ ecc_strength = ((page_oob_size - MXS_NAND_METADATA_SIZE) * 8)
+ / (13 * mxs_nand_ecc_chunk_cnt(page_data_size));
- if (page_oob_size == 224)
- return 16;
- }
-
- return 0;
+ return round_down(ecc_strength, 2);
}
static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
Thanks,
Peng.
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Re: [U-Boot] [PATCH 05/12] sunxi: Move setting of CPU system control register SMP bit to save_boot_params
Hello Hans, On Mon, 19 Jan 2015 20:04:58 +0100, Hans de Goede hdego...@redhat.com wrote: Hi, On 17-01-15 23:51, Ian Campbell wrote: On Thu, 2015-01-15 at 15:52 +0100, Hans de Goede wrote: According to the Cortex-A7 MPCore Technical Reference Manual: You must ensure this bit is set to 1 before the caches and MMU are enabled, or any cache and TLB maintenance operations are performed. Given that this is a feature of the Cortex-A7 (actually, I believe it applies to at least Cortex-A15 too) and not really specific to sunxi, perhaps we can make this more generic? Strange enough the bit is different between the A7 and A15, for the A7 the docs say it must be set before doing anything with caches, on the A15 it only needs to be set for the core to accept cache management operations from other cpu cores (or so the docs say), which is likely why it is not in the standard init sequence yet, as for u-boot it seems to only be necessary to do this on a Cortex A7. I agree that it would be good to move this to the generic start.S though, Albert ? [...] Since arch/arm/cpu/armv7/start.S: cpu_init_cp15 does several cache operations, we should thus enable the SMP bit earlier, and the only chance to do that is to do it at save_boot_params time. Would it be so terrible to add an ifdef CORTEX_A7 here, or to call out to (or call as a macro) a soc_init_cp15? From my pov no that would not be too terrible, but ... I'm cc-ing Albert for input these questions. That indeed is Albert's call. Will look into this today. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 10/12] x86: config: Enable hook for saving MRC configuration
On Tue, Jan 20, 2015 at 1:16 PM, Simon Glass s...@chromium.org wrote:
Add a hook to ensure that this information is saved.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Add misc_init_r() call for link now that it is shared with chromebook_link
Changes in v2: None
arch/x86/cpu/coreboot/coreboot.c | 5 +
include/configs/chromebook_link.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/arch/x86/cpu/coreboot/coreboot.c
b/arch/x86/cpu/coreboot/coreboot.c
index 6d06d5a..4cdd0d4 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -99,3 +99,8 @@ void panic_puts(const char *str)
while (*str)
NS16550_putc(port, *str++);
}
+
+int misc_init_r(void)
+{
+ return 0;
+}
diff --git a/include/configs/chromebook_link.h
b/include/configs/chromebook_link.h
index 7e6d239..6e8b9ef 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -20,6 +20,7 @@
#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MISC_INIT_R
#define CONFIG_NR_DRAM_BANKS 8
#define CONFIG_X86_MRC_ADDR0xfffa
--
Reviewed-by: Bin Meng bmeng...@gmail.com
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Re: [U-Boot] [PATCH v2 01/26] dm: i2c: Provide an offset length parameter where needed
Hello Simon, Am 20.01.2015 04:12, schrieb Simon Glass: Rather than assuming that the chip offset length is 1, allow it to be provided. This allows chips that don't use the default offset length to be used (at present they are only supported by the command line 'i2c' command which sets the offset length explicitly). Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Add new patch to provide an offset length parameter where needed arch/arm/cpu/tegra20-common/pmu.c | 2 +- board/avionic-design/common/tamonten-ng.c | 2 +- board/nvidia/cardhu/cardhu.c | 4 ++-- board/nvidia/dalmore/dalmore.c| 4 ++-- board/nvidia/whistler/whistler.c | 4 ++-- board/toradex/apalis_t30/apalis_t30.c | 2 +- common/cmd_i2c.c | 2 +- drivers/i2c/i2c-uclass.c | 16 +--- drivers/i2c/sandbox_i2c.c | 2 +- drivers/power/as3722.c| 2 +- include/i2c.h | 8 ++-- test/dm/i2c.c | 10 +- 12 files changed, 32 insertions(+), 26 deletions(-) Acked-by: Heiko Schocher h...@denx.de bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 04/22] x86: video: Add support for CONFIG_CONSOLE_SCROLL_LINES
Hi Simon, On Mon, 19 Jan 2015 17:33:08 -0700 Simon Glass s...@chromium.org wrote: Hi Anatolij, On 1 January 2015 at 16:17, Simon Glass s...@chromium.org wrote: Some machines are very slow to scroll their displays. To cope with this, support the CONFIG_CONSOLE_SCROLL_LINES option. Setting this to 5 allows the display to operate at an acceptable speed by scrolling 5 lines at a time. This same option is available for LCDs so when these systems are unified this code can be unified also. Signed-off-by: Simon Glass s...@chromium.org Are you happy with this patch? If so, is it OK for me to pick it up via x86? yes, it is OK for me. Thanks, Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Fwd: u-boot.img size limit for spl fat load ?
Hello Ayoub, On Mon, 19 Jan 2015 13:33:30 +0100, Ayoub Zaki ayoub.z...@googlemail.com wrote: I set TEXT_BASE to : #define CONFIG_SYS_TEXT_BASE0x8060 Now u-boot.img can be up to 4MB sized and it solved my problem :) Thank you very much for your help. No problem. :) Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 04/12] x86: Use ipchecksum from net/
The existing IP checksum function is only accessible to the 'coreboot' cpu.
Drop it in favour of the new code in the network subsystem.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Use checksum code that is now in net/checksum.c
Changes in v2:
- Refactor IP checksum patches
arch/x86/cpu/coreboot/Makefile | 1 -
arch/x86/cpu/coreboot/ipchecksum.c | 55 -
arch/x86/cpu/coreboot/tables.c | 8 ++--
arch/x86/include/asm/arch-coreboot/ipchecksum.h | 37 -
4 files changed, 4 insertions(+), 97 deletions(-)
delete mode 100644 arch/x86/cpu/coreboot/ipchecksum.c
delete mode 100644 arch/x86/include/asm/arch-coreboot/ipchecksum.h
diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
index 35e6cdd..b6e870a 100644
--- a/arch/x86/cpu/coreboot/Makefile
+++ b/arch/x86/cpu/coreboot/Makefile
@@ -16,7 +16,6 @@
obj-y += car.o
obj-y += coreboot.o
obj-y += tables.o
-obj-y += ipchecksum.o
obj-y += sdram.o
obj-y += timestamp.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/coreboot/ipchecksum.c
b/arch/x86/cpu/coreboot/ipchecksum.c
deleted file mode 100644
index 3340872..000
--- a/arch/x86/cpu/coreboot/ipchecksum.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * It has originally been taken from the FreeBSD project.
- *
- * Copyright (c) 2001 Charles Mott c...@linktel.net
- * Copyright (c) 2008 coresystems GmbH
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *notice, this list of conditions and the following disclaimer in the
- *documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include linux/types.h
-#include linux/compiler.h
-#include asm/arch/ipchecksum.h
-
-unsigned short ipchksum(const void *vptr, unsigned long nbytes)
-{
- int sum, oddbyte;
- const unsigned short *ptr = vptr;
-
- sum = 0;
- while (nbytes 1) {
- sum += *ptr++;
- nbytes -= 2;
- }
- if (nbytes == 1) {
- oddbyte = 0;
- ((u8 *)oddbyte)[0] = *(u8 *) ptr;
- ((u8 *)oddbyte)[1] = 0;
- sum += oddbyte;
- }
- sum = (sum 16) + (sum 0x);
- sum += (sum 16);
- return ~sum;
-}
diff --git a/arch/x86/cpu/coreboot/tables.c b/arch/x86/cpu/coreboot/tables.c
index 92b7528..2b12b19 100644
--- a/arch/x86/cpu/coreboot/tables.c
+++ b/arch/x86/cpu/coreboot/tables.c
@@ -8,7 +8,7 @@
*/
#include common.h
-#include asm/arch/ipchecksum.h
+#include net.h
#include asm/arch/sysinfo.h
#include asm/arch/tables.h
@@ -131,11 +131,11 @@ static int cb_parse_header(void *addr, int len, struct
sysinfo_t *info)
return 0;
/* Make sure the checksums match. */
- if (ipchksum((u16 *) header, sizeof(*header)) != 0)
+ if (!ip_checksum_ok(header, sizeof(*header)))
return -1;
- if (ipchksum((u16 *) (ptr + sizeof(*header)),
-header-table_bytes) != header-table_checksum)
+ if (compute_ip_checksum(ptr + sizeof(*header), header-table_bytes) !=
+ header-table_checksum)
return -1;
/* Now, walk the tables. */
diff --git a/arch/x86/include/asm/arch-coreboot/ipchecksum.h
b/arch/x86/include/asm/arch-coreboot/ipchecksum.h
deleted file mode 100644
index 1d73b4d..000
--- a/arch/x86/include/asm/arch-coreboot/ipchecksum.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * It has originally been taken from the FreeBSD project.
- *
- * Copyright (c) 2001 Charles Mott c...@linktel.net
- * Copyright (c) 2008 coresystems GmbH
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted
[U-Boot] [PATCH v3 07/12] Allow architecture-specific memory reservation
All memory to be reserved for use after relocation by adding a new call
to perform this reservation.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
common/board_f.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/common/board_f.c b/common/board_f.c
index 3a4b32c..215108b 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -807,6 +807,12 @@ static int initf_dm(void)
return 0;
}
+/* Architecture-specific memory reservation */
+__weak int reserve_arch(void)
+{
+ return 0;
+}
+
static init_fnc_t init_sequence_f[] = {
#ifdef CONFIG_SANDBOX
setup_ram_buf,
@@ -970,6 +976,7 @@ static init_fnc_t init_sequence_f[] = {
setup_machine,
reserve_global_data,
reserve_fdt,
+ reserve_arch,
reserve_stacks,
setup_dram_config,
show_dram_config,
--
2.2.0.rc0.207.ga3a616c
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Re: [U-Boot] [PATCH] arm: fix exception vectors
Hello Bill, On Mon, 19 Jan 2015 10:40:07 -0500, Bill Pringlemeir bpringlem...@nbsps.com wrote: On Mon, 19 Jan 2015 11:11:34 +0100, Luca Ellero As far as I can see the mechanism to relocate vectors is implemented only on iMX25/27 and involves high vectors address (0x). On 19 Jan 2015, albert.u.b...@aribaud.net wrote: You are correct that the mechanism is /used/ only by mx25 and mx27. However, it has been introduced to support /all/ SoCs (or even boards), not only mx25, mx27, and /all/ exception vector handling scenarios, not only high vectors addresses. Actually, the standard high and low address is handled by default, and mx25 and mx27 are cases where this default is overriden /because/ high or low vector addresses are *unapplicable* for them due to their memory mapping. On Mon, 19 Jan 2015 11:11:34 +0100, Luca Ellero The problem is that, after relocation, U-Boot doesn't fix the vector table addresses, they still point to the old addresses (before relocation). This is wrong and this patch fixes them to point to the new addresses. On 19 Jan 2015, albert.u.b...@aribaud.net wrote: You are right about the problem, and this problem is exactly what the relocate_vectors mechanism is here to fix -- exactly the same problem mx25 and mx27 had before we fixed it (quite recently actually, as it was done mid-November, between 2015.01-rc1 and 2015.01-rc1 rc2). On Mon, 19 Jan 2015 11:11:34 +0100, Luca Ellero I had to use this patch trying to implement IRQ support for a Freescale iMX6 board. iMX6 does not provide RAM at the high vectors address and trying to access them leads to errors, so I couldn't use them. On 19 Jan 2015, albert.u.b...@aribaud.net wrote: This is *exactly* the case where you should define your own version of relocate_vectors (probably at SoC level). A key difference is the ARM CPU architecture version. The ARMv7/Cortex on the imx6 will support vector table 'remaps'. Currently I see, #ifdef CONFIG_HAS_VBAR /* * If the ARM processor has the security extensions, * use VBAR to relocate the exception vectors. */ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd-relocaddr */ mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */ #else This should be available for the CPUs, but I don't see this symbol besides a 'Kconfig'. There are three versions on the Cortex, but the VBAR (whether secure or not) is the the correct one. At least in theory, this code if activated should work for the iMx6 and an override of the 'weak' relocate vectors is not needed. I think trying to use the 'VBAR' is the correct way to go? Possibly, though one should take into account the fact that the SoC design around the armv7 core (and the associated ROM code) might or might not allow changing the VBAR. Best is to look up the i.MX6 technical specs, especially the chapter on exceptions. If no specific indication is given that changing VBAR is forbidden, then yes, one should rely on CONFIG_HAS_VBAR (which should be set for all ARMv7-based targets). Fwiw, Bill Pringlemeir. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] dm:gpio:mxc add DT support
This patch add DT support for mxc gpio driver.
Include a bank_index entry in platdata. This can avoid using
`plat - mxc_plat` to calculate bank number. Also this can simplify code.
There are two places still using CONFIG_OF_CONTROL macro, just to
shrink code size if only support DM but not support DT.
1. The U_BOOT_DEVICES and mxc_plat array are complied out. To DT,
platdata is alloced using calloc, so there is no need to use mxc_plat.
2. add a function mxc_get_gpio_addr to get reg property if DT support.
If no DT, this function just returns NULL.
The following situations are tested:
1. with DM, without DT
2. with DM and DT
3. without DM
Since device tree has not been upstreamed, if want to test this patch.
The followings need to be done.
+ pieces of code does not gpio_request when using gpio_direction_xxx and
etc, need to request gpio.
+ move the gpio settings from board_early_init_f to board_init
+ define CONFIG_DM ,CONFIG_DM_GPIO and CONFIG_OF_CONTROL
+ Add device tree file and do related configuration in
`make ARCH=arm menuconfig`
These will be done in future patches by step.
Signed-off-by: Peng Fan peng@freescale.com
---
Changes v2:
1. remove uneccessary #ifdef
2. add more stuff in commit log
3. include a new function mxc_get_gpio_addr to get register base.
This function is different for DT and not DT, by `#ifdef`.
If using one implementation for DT and not DT, final image will be big.
4. include a new entry in platdata, named bank_index. it can simplify DT
support. To no DT, bank_index is static initilized; to DT, bank_index
is get from device's req_seq.
drivers/gpio/mxc_gpio.c | 89 +++--
1 file changed, 71 insertions(+), 18 deletions(-)
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 8bb9e39..5826620 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -23,6 +23,7 @@ enum mxc_gpio_direction {
#define GPIO_PER_BANK 32
struct mxc_gpio_plat {
+ int bank_index;
struct gpio_regs *regs;
};
@@ -150,6 +151,9 @@ int gpio_direction_output(unsigned gpio, int value)
#endif
#ifdef CONFIG_DM_GPIO
+#include fdtdec.h
+DECLARE_GLOBAL_DATA_PTR;
+
static int mxc_gpio_is_output(struct gpio_regs *regs, int offset)
{
u32 val;
@@ -258,23 +262,6 @@ static const struct dm_gpio_ops gpio_mxc_ops = {
.get_function = mxc_gpio_get_function,
};
-static const struct mxc_gpio_plat mxc_plat[] = {
- { (struct gpio_regs *)GPIO1_BASE_ADDR },
- { (struct gpio_regs *)GPIO2_BASE_ADDR },
- { (struct gpio_regs *)GPIO3_BASE_ADDR },
-#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
- defined(CONFIG_MX53) || defined(CONFIG_MX6)
- { (struct gpio_regs *)GPIO4_BASE_ADDR },
-#endif
-#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
- { (struct gpio_regs *)GPIO5_BASE_ADDR },
- { (struct gpio_regs *)GPIO6_BASE_ADDR },
-#endif
-#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
- { (struct gpio_regs *)GPIO7_BASE_ADDR },
-#endif
-};
-
static int mxc_gpio_probe(struct udevice *dev)
{
struct mxc_bank_info *bank = dev_get_priv(dev);
@@ -283,7 +270,7 @@ static int mxc_gpio_probe(struct udevice *dev)
int banknum;
char name[18], *str;
- banknum = plat - mxc_plat;
+ banknum = plat-bank_index;
sprintf(name, GPIO%d_, banknum + 1);
str = strdup(name);
if (!str)
@@ -295,12 +282,77 @@ static int mxc_gpio_probe(struct udevice *dev)
return 0;
}
+#ifdef CONFIG_OF_CONTROL
+static struct gpio_regs *mxc_get_gpio_addr(struct udevice *device)
+{
+ fdt_addr_t addr;
+ addr = fdtdec_get_addr(gd-fdt_blob, device-of_offset, reg);
+ if (addr == FDT_ADDR_T_NONE)
+ return NULL;
+ else
+ return (struct gpio_regs *)addr;
+}
+#else
+static struct gpio_regs *mxc_get_gpio_addr(struct udevice *device)
+{
+ return NULL;
+}
+#endif
+
+static int mxc_gpio_bind(struct udevice *device)
+{
+ struct mxc_gpio_plat *plat = device-platdata;
+ struct gpio_regs *regs;
+
+ if (plat)
+ return 0;
+
+ regs = mxc_get_gpio_addr(device);
+ if (!regs)
+ return -ENXIO;
+
+ plat = calloc(1, sizeof(*plat));
+ if (!plat)
+ return -ENOMEM;
+
+ plat-regs = regs;
+ plat-bank_index = device-req_seq;
+ device-platdata = plat;
+
+ return 0;
+}
+
+static const struct udevice_id mxc_gpio_ids[] = {
+ { .compatible = fsl,imx35-gpio },
+ { }
+};
+
U_BOOT_DRIVER(gpio_mxc) = {
.name = gpio_mxc,
.id = UCLASS_GPIO,
.ops= gpio_mxc_ops,
.probe = mxc_gpio_probe,
.priv_auto_alloc_size = sizeof(struct mxc_bank_info),
+ .of_match = mxc_gpio_ids,
+ .bind = mxc_gpio_bind,
+};
+
+#ifndef CONFIG_OF_CONTROL
+static
Re: [U-Boot] Unreadable UBIFS partition after power cuts
Hello Anton, Am 19.01.2015 12:29, schrieb Anton Habegger: Hello Heiko I was able to enable the uibfs_replay_journal, and so far this solved my issue. Great to hear! Below the patch. I'm not sure about the U-Boot replacement for atomic_long_read? I assume U-Boot has no concurrency, then maybe it is safe, just to assign the long direct. Yes and no ... We have no processes or threads in U-Boot, so we should have no concurrency here, but you should introduce atomic_long_read() instead, so we have no difference to linux code. There is already in U-Boot code atomic.h ... but atomic_long_read() is missing ... so, it should not so difficult to intriduce this missing function, thanks! Is this correct? Furthermore I wasn't able to enable the error case, ubifs_destroy_journal, because there is a dependency to the garbage collector gc.c. So far I didn't found time to integrate this stuff. What do you think, Is this the right way to fix this issue? Yes, you are on the right way ... thanks for your work! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 11/12] x86: ivybridge: Drop the Kconfig MRC cache information
This is now stored in the device tree. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v3: None Changes in v2: None arch/x86/cpu/ivybridge/Kconfig | 28 1 file changed, 28 deletions(-) diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index afca957..e4595be 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -26,20 +26,6 @@ config CACHE_MRC_SIZE_KB int default 256 -config MRC_CACHE_BASE - hex - default 0xff80 - -config MRC_CACHE_LOCATION - hex - depends on !CHROMEOS - default 0x1ec000 - -config MRC_CACHE_SIZE - hex - depends on !CHROMEOS - default 0x1 - config DCACHE_RAM_BASE hex default 0xff7f @@ -64,20 +50,6 @@ config CACHE_MRC_SIZE_KB int default 512 -config MRC_CACHE_BASE - hex - default 0xff80 - -config MRC_CACHE_LOCATION - hex - depends on !CHROMEOS - default 0x37 - -config MRC_CACHE_SIZE - hex - depends on !CHROMEOS - default 0x1 - config DCACHE_RAM_BASE hex default 0xff7e -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 12/12] x86: config: chromebook_link: Enable environment
Enable an environment area. Signed-off-by: Simon Glass s...@chromium.org Reviewed-by: Bin Meng bmeng...@gmail.com --- Changes in v3: None Changes in v2: None include/configs/chromebook_link.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 6e8b9ef..7b460e8 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -64,6 +64,13 @@ #define CONFIG_CMD_CROS_EC #define CONFIG_ARCH_EARLY_INIT_R +#undef CONFIG_ENV_IS_NOWHERE +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x003f8000 + #define CONFIG_STD_DEVICES_SETTINGS stdin=usbkbd,vga,serial\0 \ stdout=vga,serial\0 \ stderr=vga,serial\0 -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] Invoke board specific board_usb_cleanup function
Hi Marek, I want to use this function for support Thor/DFU download in Odroid-XU3. For Odroid-XU3 usb support, we need to DWC3 code. (As I know, DWC3 patchsets (Kishon Vijay Abraham I) are RFC state) So, I used DWC3 patchset temporarily and I knew that I should be call dwc3_uboot_exit() function. As a result, I have implemented board_usb_cleanup() function in smdk5420.c board file for called dwc3_uboot_exit() function. If board_usb_cleanup is dead code, I will fix it. Best Regards, Inha Song. On Mon, 19 Jan 2015 09:50:34 +0100 Marek Vasut ma...@denx.de wrote: On Monday, January 19, 2015 at 08:07:14 AM, Inha Song wrote: This patches invoke board-specific usb cleanup interface (board_usb_cleanup) After USB initalization. Inha Song (2): usb: common: provide a _weak board_usb_cleanup() function usb: invoke board specific USB cleanup interface Hi, where do you plan to use this _weak function please ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/10][v5] hash: Add function to find hash_algo struct with progressive hash
The hash_algo structure has some implementations in which progressive hash
API's are not defined. These are basically the hardware based implementations
of SHA. An API is added to find the algo which has progressive hash API's
defined. This can then be integrated with RSA checksum library which uses
Progressive Hash API's.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
CC: Simon Glass s...@chromium.org
---
Changes in v5:
None
Changes in v4:
Few cosmetic changes. Currently I have not replaced CONFIG_SHA1 with
CONFIG_CMD_SHA1SUM.
Waiting for reply from Simon and Denx for the same.
Changes in v3 :
Corrected ifdef for SHA1
Changes in v2 :
Added commit message
common/hash.c | 33 -
include/hash.h | 14 ++
2 files changed, 38 insertions(+), 9 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index 12d6759..ea1ec60 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -20,7 +20,7 @@
#include asm/io.h
#include asm/errno.h
-#ifdef CONFIG_CMD_SHA1SUM
+#ifdef CONFIG_SHA1
static int hash_init_sha1(struct hash_algo *algo, void **ctxp)
{
sha1_context *ctx = malloc(sizeof(sha1_context));
@@ -125,12 +125,7 @@ static struct hash_algo hash_algo[] = {
CHUNKSZ_SHA256,
},
#endif
- /*
-* This is CONFIG_CMD_SHA1SUM instead of CONFIG_SHA1 since otherwise
-* it bloats the code for boards which use SHA1 but not the 'hash'
-* or 'sha1sum' commands.
-*/
-#ifdef CONFIG_CMD_SHA1SUM
+#ifdef CONFIG_SHA1
{
sha1,
SHA1_SUM_LEN,
@@ -140,7 +135,6 @@ static struct hash_algo hash_algo[] = {
hash_update_sha1,
hash_finish_sha1,
},
-#define MULTI_HASH
#endif
#ifdef CONFIG_SHA256
{
@@ -152,7 +146,6 @@ static struct hash_algo hash_algo[] = {
hash_update_sha256,
hash_finish_sha256,
},
-#define MULTI_HASH
#endif
{
crc32,
@@ -165,6 +158,10 @@ static struct hash_algo hash_algo[] = {
},
};
+#if defined(CONFIG_SHA256) || defined(CONFIG_CMD_SHA1SUM)
+#define MULTI_HASH
+#endif
+
#if defined(CONFIG_HASH_VERIFY) || defined(CONFIG_CMD_HASH)
#define MULTI_HASH
#endif
@@ -311,6 +308,24 @@ int hash_lookup_algo(const char *algo_name, struct
hash_algo **algop)
return -EPROTONOSUPPORT;
}
+int hash_progressive_lookup_algo(const char *algo_name,
+struct hash_algo **algop)
+{
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(hash_algo); i++) {
+ if (!strcmp(algo_name, hash_algo[i].name)) {
+ if (hash_algo[i].hash_init) {
+ *algop = hash_algo[i];
+ return 0;
+ }
+ }
+ }
+
+ debug(Unknown hash algorithm '%s'\n, algo_name);
+ return -EPROTONOSUPPORT;
+}
+
void hash_show(struct hash_algo *algo, ulong addr, ulong len, uint8_t *output)
{
int i;
diff --git a/include/hash.h b/include/hash.h
index d8ec4f0..c0a7ebc 100644
--- a/include/hash.h
+++ b/include/hash.h
@@ -128,6 +128,20 @@ int hash_block(const char *algo_name, const void *data,
unsigned int len,
int hash_lookup_algo(const char *algo_name, struct hash_algo **algop);
/**
+ * hash_progressive_lookup_algo() - Look up hash_algo for prog. hash support
+ *
+ * The function returns the pointer to the struct or -EPROTONOSUPPORT if the
+ * algorithm is not available with progressive hash support.
+ *
+ * @algo_name: Hash algorithm to look up
+ * @algop: Pointer to the hash_algo struct if found
+ *
+ * @return 0 if ok, -EPROTONOSUPPORT for an unknown algorithm.
+ */
+int hash_progressive_lookup_algo(const char *algo_name,
+struct hash_algo **algop);
+
+/**
* hash_show() - Print out a hash algorithm and value
*
* You will get a message like this (without a newline at the end):
--
1.8.1.4
___
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[U-Boot] [PATCH 09/10][v5] Use hash.c in mkimage
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
CC: Simon Glass s...@chromium.org
---
Changes in v5:
New patch based on WIP patch by Simon.
common/hash.c | 79 +-
include/hash.h | 34 +
tools/Makefile | 1 +
3 files changed, 64 insertions(+), 50 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index ea1ec60..6ddca3a 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -10,15 +10,24 @@
* SPDX-License-Identifier:GPL-2.0+
*/
+#ifndef USE_HOSTCC
#include common.h
#include command.h
#include malloc.h
#include hw_sha.h
-#include hash.h
#include u-boot/sha1.h
#include u-boot/sha256.h
#include asm/io.h
#include asm/errno.h
+#else
+#include mkimage.h
+#include u-boot/md5.h
+#include time.h
+#include image.h
+#endif /* !USE_HOSTCC*/
+
+#include hash.h
+#include u-boot/crc.h
#ifdef CONFIG_SHA1
static int hash_init_sha1(struct hash_algo *algo, void **ctxp)
@@ -173,6 +182,40 @@ static struct hash_algo hash_algo[] = {
#define multi_hash() 0
#endif
+int hash_lookup_algo(const char *algo_name, struct hash_algo **algop)
+{
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(hash_algo); i++) {
+ if (!strcmp(algo_name, hash_algo[i].name)) {
+ *algop = hash_algo[i];
+ return 0;
+ }
+ }
+
+ debug(Unknown hash algorithm '%s'\n, algo_name);
+ return -EPROTONOSUPPORT;
+}
+
+int hash_progressive_lookup_algo(const char *algo_name,
+struct hash_algo **algop)
+{
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(hash_algo); i++) {
+ if (!strcmp(algo_name, hash_algo[i].name)) {
+ if (hash_algo[i].hash_init) {
+ *algop = hash_algo[i];
+ return 0;
+ }
+ }
+ }
+
+ debug(Unknown hash algorithm '%s'\n, algo_name);
+ return -EPROTONOSUPPORT;
+}
+
+#ifndef USE_HOSTCC
/**
* store_result: Store the resulting sum to an address or variable
*
@@ -293,39 +336,6 @@ static int parse_verify_sum(struct hash_algo *algo, char
*verify_str,
return 0;
}
-int hash_lookup_algo(const char *algo_name, struct hash_algo **algop)
-{
- int i;
-
- for (i = 0; i ARRAY_SIZE(hash_algo); i++) {
- if (!strcmp(algo_name, hash_algo[i].name)) {
- *algop = hash_algo[i];
- return 0;
- }
- }
-
- debug(Unknown hash algorithm '%s'\n, algo_name);
- return -EPROTONOSUPPORT;
-}
-
-int hash_progressive_lookup_algo(const char *algo_name,
-struct hash_algo **algop)
-{
- int i;
-
- for (i = 0; i ARRAY_SIZE(hash_algo); i++) {
- if (!strcmp(algo_name, hash_algo[i].name)) {
- if (hash_algo[i].hash_init) {
- *algop = hash_algo[i];
- return 0;
- }
- }
- }
-
- debug(Unknown hash algorithm '%s'\n, algo_name);
- return -EPROTONOSUPPORT;
-}
-
void hash_show(struct hash_algo *algo, ulong addr, ulong len, uint8_t *output)
{
int i;
@@ -441,3 +451,4 @@ int hash_command(const char *algo_name, int flags,
cmd_tbl_t *cmdtp, int flag,
return 0;
}
+#endif
diff --git a/include/hash.h b/include/hash.h
index c0a7ebc..f4eb100 100644
--- a/include/hash.h
+++ b/include/hash.h
@@ -17,7 +17,6 @@ enum {
HASH_FLAG_ENV = 1 1, /* Allow env vars */
};
-#ifndef USE_HOSTCC
#if defined(CONFIG_SHA1SUM_VERIFY) || defined(CONFIG_CRC32_VERIFY)
#define CONFIG_HASH_VERIFY
#endif
@@ -77,6 +76,7 @@ struct hash_algo {
int size);
};
+#ifndef USE_HOSTCC
/**
* hash_command: Process a hash command for a particular algorithm
*
@@ -115,6 +115,23 @@ int hash_block(const char *algo_name, const void *data,
unsigned int len,
uint8_t *output, int *output_size);
/**
+ * hash_show() - Print out a hash algorithm and value
+ *
+ * You will get a message like this (without a newline at the end):
+ *
+ * sha1 for 9eb3337c ... 9eb3338f ==
7942ef1df479fd3130f716eb9613d107dab7e257
+ *
+ * @algo: Algorithm used for hash
+ * @addr: Address of data that was hashed
+ * @len: Length of data that was hashed
+ * @output:Hash value to display
+ */
+void hash_show(struct hash_algo *algo, ulong addr, ulong len,
+ uint8_t *output);
+
+#endif /* !USE_HOSTCC */
+
+/**
* hash_lookup_algo() - Look up the hash_algo struct for an algorithm
*
* The function returns the pointer to the struct or -EPROTONOSUPPORT if the
@@ -141,19 +158,4 @@ int hash_lookup_algo(const char *algo_name, struct
hash_algo **algop);
int hash_progressive_lookup_algo(const char *algo_name,
[U-Boot] [PATCH 10/10][v5] rsa: Use checksum algorithms from struct hash_algo
Currently the hash functions used in RSA are called directly from the sha1
and sha256 libraries. Change the RSA checksum library to use the progressive
hash API's registered with struct hash_algo. This will allow the checksum
library to use the hardware accelerated progressive hash API's once available.
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
CC: Simon Glass s...@chromium.org
---
Changes in v5:
Both tools and uboot use the same code in rsa-checksum.c
Changes in v4:
No changes in this patch. Still under discussion
Changes in v3:
Modified rsa-verify to check for return from checksum function
Changes in v2:
Added generic function hash_calculate. Pass an additional
argument as name of algorithm.
common/image-sig.c| 6 +++---
include/configs/ls1021aqds.h | 4 +++-
include/image.h | 5 +++--
include/u-boot/rsa-checksum.h | 17 +++
lib/rsa/rsa-checksum.c| 50 ++-
lib/rsa/rsa-verify.c | 7 +-
6 files changed, 58 insertions(+), 31 deletions(-)
diff --git a/common/image-sig.c b/common/image-sig.c
index 8601eda..2c9f0cd 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -38,7 +38,7 @@ struct checksum_algo checksum_algos[] = {
#if IMAGE_ENABLE_SIGN
EVP_sha1,
#endif
- sha1_calculate,
+ hash_calculate,
padding_sha1_rsa2048,
},
{
@@ -48,7 +48,7 @@ struct checksum_algo checksum_algos[] = {
#if IMAGE_ENABLE_SIGN
EVP_sha256,
#endif
- sha256_calculate,
+ hash_calculate,
padding_sha256_rsa2048,
},
{
@@ -58,7 +58,7 @@ struct checksum_algo checksum_algos[] = {
#if IMAGE_ENABLE_SIGN
EVP_sha256,
#endif
- sha256_calculate,
+ hash_calculate,
padding_sha256_rsa4096,
}
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 8dc04f2..4072870 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -146,7 +146,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_HAS_SERDES
-#define CONFIG_FSL_CAAM/* Enable CAAM */
#if !defined(CONFIG_SD_BOOT) !defined(CONFIG_NAND_BOOT) \
!defined(CONFIG_QSPI_BOOT)
@@ -512,6 +511,7 @@ unsigned long get_board_ddr_clk(void);
bootargs=root=/dev/ram0 rw console=ttyS0,115200\0 \
fdt_high=0xcfff\0 \
initrd_high=0xcfff\0 \
+ fdtcontroladdr=0x600a\0 \
hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0
/*
@@ -595,4 +595,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_BLOB
#endif
+#define CONFIG_OF_CONTROL
+
#endif
diff --git a/include/image.h b/include/image.h
index af30d60..ec55f23 100644
--- a/include/image.h
+++ b/include/image.h
@@ -926,8 +926,9 @@ struct checksum_algo {
#if IMAGE_ENABLE_SIGN
const EVP_MD *(*calculate_sign)(void);
#endif
- void (*calculate)(const struct image_region region[],
- int region_count, uint8_t *checksum);
+ int (*calculate)(const char *name,
+const struct image_region region[],
+int region_count, uint8_t *checksum);
const uint8_t *rsa_padding;
};
diff --git a/include/u-boot/rsa-checksum.h b/include/u-boot/rsa-checksum.h
index c996fb3..3c69d85 100644
--- a/include/u-boot/rsa-checksum.h
+++ b/include/u-boot/rsa-checksum.h
@@ -16,9 +16,18 @@ extern const uint8_t padding_sha256_rsa4096[];
extern const uint8_t padding_sha256_rsa2048[];
extern const uint8_t padding_sha1_rsa2048[];
-void sha256_calculate(const struct image_region region[], int region_count,
- uint8_t *checksum);
-void sha1_calculate(const struct image_region region[], int region_count,
- uint8_t *checksum);
+/**
+ * hash_calculate() - Calculate hash over the data
+ *
+ * @name: Name of algorithm to be used for hash calculation
+ * @region: Array having info of regions over which hash needs to be calculated
+ * @region_count: Number of regions in the region array
+ * @checksum: Buffer contanining the output hash
+ *
+ * @return 0 if OK, 0 if error
+ */
+int hash_calculate(const char *name,
+ const struct image_region region[], int region_count,
+ uint8_t *checksum);
#endif
diff --git a/lib/rsa/rsa-checksum.c b/lib/rsa/rsa-checksum.c
index 8d8b59f..68d9d65 100644
--- a/lib/rsa/rsa-checksum.c
+++ b/lib/rsa/rsa-checksum.c
@@ -10,12 +10,13 @@
#include asm/byteorder.h
#include asm/errno.h
#include asm/unaligned.h
+#include hash.h
#else
#include fdt_host.h
-#endif
-#include u-boot/rsa.h
#include u-boot/sha1.h
#include u-boot/sha256.h
+#endif
+#include u-boot/rsa.h
/* PKCS 1.5 paddings as described in the RSA PKCS#1 v2.1 standard. */
@@ -136,28 +137,37 @@ const uint8_t
