[U-Boot] [PATCH v3] spi: tegra20: Add support for mode selection

[Mirza Krak]

From: Mirza Krak 

Respect the mode passed in set_mode ops.

Signed-off-by: Mirza Krak 
---

Changes in v3:
* Move mode selection to .set_mode ops from .claim_bus ops

Changes in v2:
* Refactor clearing the CPOL and CPHA bits. Based on comments from Jagan Teki.

 drivers/spi/tegra20_slink.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index fbb665b86f3f..08c644c2173a 100644
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -36,6 +36,11 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SLINK_CMD_ENB  (1 << 31)
 #define SLINK_CMD_GO   (1 << 30)
 #define SLINK_CMD_M_S  (1 << 28)
+#define SLINK_CMD_IDLE_SCLK_DRIVE_LOW  (0 << 24)
+#define SLINK_CMD_IDLE_SCLK_DRIVE_HIGH (1 << 24)
+#define SLINK_CMD_IDLE_SCLK_PULL_LOW   (2 << 24)
+#define SLINK_CMD_IDLE_SCLK_PULL_HIGH  (3 << 24)
+#define SLINK_CMD_IDLE_SCLK_MASK   (3 << 24)
 #define SLINK_CMD_CK_SDA   (1 << 21)
 #define SLINK_CMD_CS_POL   (1 << 13)
 #define SLINK_CMD_CS_VAL   (1 << 12)
@@ -331,6 +336,22 @@ static int tegra30_spi_set_speed(struct udevice *bus, uint 
speed)
 static int tegra30_spi_set_mode(struct udevice *bus, uint mode)
 {
struct tegra30_spi_priv *priv = dev_get_priv(bus);
+   struct spi_regs *regs = priv->regs;
+   u32 reg;
+
+   reg = readl(>command);
+
+   /* Set CPOL and CPHA */
+   reg &= ~(SLINK_CMD_IDLE_SCLK_MASK | SLINK_CMD_CK_SDA);
+   if (mode & SPI_CPHA)
+   reg |= SLINK_CMD_CK_SDA;
+
+   if (mode & SPI_CPOL)
+   reg |= SLINK_CMD_IDLE_SCLK_DRIVE_HIGH;
+   else
+   reg |= SLINK_CMD_IDLE_SCLK_DRIVE_LOW;
+
+   writel(reg, >command);

priv->mode = mode;
debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode);
--
2.1.0

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[U-Boot] [PATCH] gpio: atmel: Add the PIO4 driver support

[Wenyou Yang]

The PIO4 is introduced from SAMA5D2, as a new version
for Atmel PIO controller.

Signed-off-by: Wenyou Yang 
---

 arch/arm/mach-at91/include/mach/atmel_pio4.h |   48 +
 drivers/gpio/Kconfig |   11 +
 drivers/gpio/Makefile|1 +
 drivers/gpio/atmel_pio4.c|  278 ++
 4 files changed, 338 insertions(+)
 create mode 100644 arch/arm/mach-at91/include/mach/atmel_pio4.h
 create mode 100644 drivers/gpio/atmel_pio4.c

diff --git a/arch/arm/mach-at91/include/mach/atmel_pio4.h 
b/arch/arm/mach-at91/include/mach/atmel_pio4.h
new file mode 100644
index 000..5748da6
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/atmel_pio4.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation.
+ *   Wenyou Yang 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __ATMEL_PIO4_H
+#define __ATMEL_PIO4_H
+
+#ifndef __ASSEMBLY__
+
+struct atmel_pio4_port {
+   u32 mskr;   /* 0x00 PIO Mask Register */
+   u32 cfgr;   /* 0x04 PIO Configuration Register */
+   u32 pdsr;   /* 0x08 PIO Pin Data Status Register */
+   u32 locksr; /* 0x0C PIO Lock Status Register */
+   u32 sodr;   /* 0x10 PIO Set Output Data Register */
+   u32 codr;   /* 0x14 PIO Clear Output Data Register */
+   u32 odsr;   /* 0x18 PIO Output Data Status Register */
+   u32 reserved0;
+   u32 ier;/* 0x20 PIO Interrupt Enable Register */
+   u32 idr;/* 0x24 PIO Interrupt Disable Register */
+   u32 imr;/* 0x28 PIO Interrupt Mask Register */
+   u32 isr;/* 0x2C PIO Interrupt Status Register */
+   u32 reserved1[3];
+   u32 iofr;   /* 0x3C PIO I/O Freeze Register */
+};
+
+#endif
+
+#define AT91_PIO_PORTA 0x0
+#define AT91_PIO_PORTB 0x1
+#define AT91_PIO_PORTC 0x2
+#define AT91_PIO_PORTD 0x3
+
+int atmel_pio4_set_gpio(u32 port, u32 pin, u32 use_pullup);
+int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 use_pullup);
+int atmel_pio4_set_b_periph(u32 port, u32 pin, u32 use_pullup);
+int atmel_pio4_set_c_periph(u32 port, u32 pin, u32 use_pullup);
+int atmel_pio4_set_d_periph(u32 port, u32 pin, u32 use_pullup);
+int atmel_pio4_set_e_periph(u32 port, u32 pin, u32 use_pullup);
+int atmel_pio4_set_f_periph(u32 port, u32 pin, u32 use_pullup);
+int atmel_pio4_set_g_periph(u32 port, u32 pin, u32 use_pullup);
+void atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value);
+u32 atmel_pio4_get_pio_input(u32 port, u32 pin);
+
+#endif
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index ef57a89..ddc47c6 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -21,6 +21,17 @@ config DWAPB_GPIO
help
  Support for the Designware APB GPIO driver.
 
+config ATMEL_PIO4
+   bool "ATMEL PIO4 driver"
+   depends on DM
+   default n
+   help
+ Say yes here to support the Atmel PIO4 driver.
+ The PIO4 is new version of Atmel PIO controller, which manages
+ up to 128 fully programmable input/output lines. Each I/O line
+ may be dedicated as a general purpose I/O or be assigned to
+ a function of an embedded peripheral.
+
 config LPC32XX_GPIO
bool "LPC32XX GPIO driver"
depends on DM
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index c58aa4d..fb4fd25 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -12,6 +12,7 @@ endif
 obj-$(CONFIG_DM_GPIO)  += gpio-uclass.o
 
 obj-$(CONFIG_AT91_GPIO)+= at91_gpio.o
+obj-$(CONFIG_ATMEL_PIO4)   += atmel_pio4.o
 obj-$(CONFIG_INTEL_ICH6_GPIO)  += intel_ich6_gpio.o
 obj-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
 obj-$(CONFIG_KONA_GPIO)+= kona_gpio.o
diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
new file mode 100644
index 000..21095ce
--- /dev/null
+++ b/drivers/gpio/atmel_pio4.c
@@ -0,0 +1,278 @@
+/*
+ * Atmel PIO4 device driver
+ *
+ * Copyright (C) 2015 Atmel Corporation
+ *  Wenyou.Yang 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define ATMEL_PIO4_PINS_PER_BANK   32
+
+/*
+ * Register Field Definitions
+ */
+#define ATMEL_PIO4_CFGR_FUNC   (0x07 << 0)
+#defineATMEL_PIO4_CFGR_FUNC_GPIO   (0x0 << 0)
+#defineATMEL_PIO4_CFGR_FUNC_PERIPH_A   (0x1 << 0)
+#defineATMEL_PIO4_CFGR_FUNC_PERIPH_B   (0x2 << 0)
+#defineATMEL_PIO4_CFGR_FUNC_PERIPH_C   (0x3 << 0)
+#defineATMEL_PIO4_CFGR_FUNC_PERIPH_D   (0x4 << 0)
+#defineATMEL_PIO4_CFGR_FUNC_PERIPH_E   (0x5 << 0)
+#defineATMEL_PIO4_CFGR_FUNC_PERIPH_F   (0x6 << 0)
+#define

[U-Boot] [PATCH] arm: at91: Change the Chip ID registers' addresses

[Wenyou Yang]

Provide the specific addresses for the Chip ID and Chip ID Extension
registers, instead of the offset, which make it use on other chips.

Signed-off-by: Wenyou Yang 
---

 arch/arm/mach-at91/armv7/cpu.c |7 ---
 arch/arm/mach-at91/include/mach/at91_dbu.h |4 
 arch/arm/mach-at91/include/mach/sama5d3.h  |3 +++
 arch/arm/mach-at91/include/mach/sama5d4.h  |3 +++
 4 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c
index 8d86f97..7843aed 100644
--- a/arch/arm/mach-at91/armv7/cpu.c
+++ b/arch/arm/mach-at91/armv7/cpu.c
@@ -12,7 +12,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -65,12 +64,14 @@ void enable_caches(void)
dcache_enable();
 }
 
+#define ATMEL_CHIPID_CIDR_VERSION  0x1f
+
 unsigned int get_chip_id(void)
 {
-   return readl(ATMEL_BASE_DBGU + AT91_DBU_CIDR) & ~AT91_DBU_CIDR_MASK;
+   return readl(ATMEL_CHIPID_CIDR) & ~ATMEL_CHIPID_CIDR_VERSION;
 }
 
 unsigned int get_extension_chip_id(void)
 {
-   return readl(ATMEL_BASE_DBGU + AT91_DBU_EXID);
+   return readl(ATMEL_CHIPID_EXID);
 }
diff --git a/arch/arm/mach-at91/include/mach/at91_dbu.h 
b/arch/arm/mach-at91/include/mach/at91_dbu.h
index 7346fc0..3181138 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbu.h
@@ -35,8 +35,4 @@ typedef struct at91_dbu {
 #define AT91_DBU_CID_ARCH_9xx  0x0190
 #define AT91_DBU_CID_ARCH_9XExx0x0290
 
-#define AT91_DBU_CIDR_MASK 0x1f
-#define AT91_DBU_CIDR  0x40
-#define AT91_DBU_EXID  0x44
-
 #endif
diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h 
b/arch/arm/mach-at91/include/mach/sama5d3.h
index b749cb3..33f6c97 100644
--- a/arch/arm/mach-at91/include/mach/sama5d3.h
+++ b/arch/arm/mach-at91/include/mach/sama5d3.h
@@ -158,6 +158,9 @@
 #define ATMEL_BASE_RTC 0xfeb0
 /* Reserved:   0xfee0 - 0x */
 
+#define ATMEL_CHIPID_CIDR  0xee40
+#define ATMEL_CHIPID_EXID  0xee44
+
 /*
  * Internal Memory.
  */
diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h 
b/arch/arm/mach-at91/include/mach/sama5d4.h
index 7773ace..3da8aff 100644
--- a/arch/arm/mach-at91/include/mach/sama5d4.h
+++ b/arch/arm/mach-at91/include/mach/sama5d4.h
@@ -144,6 +144,9 @@
 #define ATMEL_BASE_PIOE0xfc06d000
 #define ATMEL_BASE_AIC 0xfc06e000
 
+#define ATMEL_CHIPID_CIDR  0xfc069040
+#define ATMEL_CHIPID_EXID  0xfc069044
+
 /*
  * Internal Memory.
  */
-- 
1.7.9.5

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Re: [U-Boot] [PATCH 1/4] sf: params: Add IS25LP032 part support

[Jagan Teki]

Hi Siva,

On 4 September 2015 at 18:33, Jagan Teki  wrote:
> Added support for IS25LP032 flash part.
>
> Signed-off-by: Jagan Teki 
> Cc: Siva Durga Prasad Paladugu 
> Cc: Michal Simek 
> ---

Can you test this parts?

>  drivers/mtd/spi/sf_params.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
> index 4a4a3af..184ba9c 100644
> --- a/drivers/mtd/spi/sf_params.c
> +++ b/drivers/mtd/spi/sf_params.c
> @@ -34,6 +34,9 @@ const struct spi_flash_params spi_flash_params_table[] = {
> {"GD25Q64B",   0xc84017, 0x0,   64 * 1024,   128, RD_NORM,
>   SECT_4K},
> {"GD25LQ32",   0xc86016, 0x0,   64 * 1024,64, RD_NORM,
>   SECT_4K},
>  #endif
> +#ifdef CONFIG_SPI_FLASH_ISSI   /* ISSI */
> +   {"IS25LP032",  0x9d6016, 0x0,   64 * 1024,64, RD_NORM,
> 0},
> +#endif
>  #ifdef CONFIG_SPI_FLASH_MACRONIX   /* MACRONIX */
> {"MX25L2006E", 0xc22012, 0x0,   64 * 1024, 4, RD_NORM,
> 0},
> {"MX25L4005",  0xc22013, 0x0,   64 * 1024, 8, RD_NORM,
> 0},
> --
> 1.9.1
>

thanks!
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Re: [U-Boot] Zynq build failure

[Jagan Teki]

On 4 September 2015 at 14:22, Jagan Teki  wrote:
> Hi Michal/Siva,
>
> Any fix for this failure?
>
>   CC  spl/drivers/mtd/spi/spi_spl_load.o
> drivers/mtd/spi/spi_spl_load.c: In function 'spi_load_image_os':
> drivers/mtd/spi/spi_spl_load.c:26:24: error:
> 'CONFIG_SYS_SPI_KERNEL_OFFS' undeclared (first use in this function)
> drivers/mtd/spi/spi_spl_load.c:26:24: note: each undeclared identifier
> is reported only once for each function it appears in
> drivers/mtd/spi/spi_spl_load.c:38:24: error:
> 'CONFIG_SYS_SPI_ARGS_OFFS' undeclared (first use in this function)
> drivers/mtd/spi/spi_spl_load.c:39:10: error:
> 'CONFIG_SYS_SPI_ARGS_SIZE' undeclared (first use in this function)
> make[3]: *** [spl/drivers/mtd/spi/spi_spl_load.o] Error 1

Any help?

thanks!
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Re: [U-Boot] [PATCH v3 1/9] net: Revert "tftp: adjust settings to be suitable for 100Mbit ethernet"

[Heiko Schocher]

Hello Bin,

Am 28.08.2015 um 07:25 schrieb Bin Meng:

Commit 620776d "tftp: adjust settings to be suitable for 100Mbit ethernet"
causes the following error message when trying to load a file using 'tftp'
command via a tftp server.

 TFTP error: 'Unsupported option(s) requested' (8)

This is due to with commit 620776d changes, the tftp option 'timeout'
value is now set to zero which is an invalid value as per RFC2349 [1].
Valid values range between "1" and "255" seconds, inclusive. With some
tftp servers that strictly implement the RFC requirement, it reports
such an error message.

Revert commit 620776d for RFC compliance.

[1] https://www.ietf.org/rfc/rfc2349.txt

Signed-off-by: Bin Meng 
Acked-by: Joe Hershberger 


Just tried current mainline on the smartweb board, and had the
same issue. Your patch fixed it, thanks!

Tested-by: Heiko Schocher 

bye,
Heiko


---

Changes in v3:
- Drop e1000 build warning patch which is already applied

Changes in v2:
- Rewrite the commit message to mention RFC2349

  net/tftp.c | 10 +-
  1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/net/tftp.c b/net/tftp.c
index 18ce84c..89be32a 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -19,10 +19,10 @@
  /* Well known TFTP port # */
  #define WELL_KNOWN_PORT   69
  /* Millisecs to timeout for lost pkt */
-#define TIMEOUT100UL
+#define TIMEOUT5000UL
  #ifndef   CONFIG_NET_RETRY_COUNT
  /* # of timeouts before giving up */
-# define TIMEOUT_COUNT 1000
+# define TIMEOUT_COUNT 10
  #else
  # define TIMEOUT_COUNT  (CONFIG_NET_RETRY_COUNT * 2)
  #endif
@@ -711,10 +711,10 @@ void tftp_start(enum proto_t protocol)
if (ep != NULL)
timeout_ms = simple_strtol(ep, NULL, 10);

-   if (timeout_ms < 10) {
-   printf("TFTP timeout (%ld ms) too low, set min = 10 ms\n",
+   if (timeout_ms < 1000) {
+   printf("TFTP timeout (%ld ms) too low, set min = 1000 ms\n",
   timeout_ms);
-   timeout_ms = 10;
+   timeout_ms = 1000;
}

debug("TFTP blocksize = %i, timeout = %ld ms\n",



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Re: [U-Boot] [PATCH v3] spi: tegra20: Add support for mode selection

[Jagan Teki]

On 8 September 2015 at 14:00, Mirza Krak  wrote:
> From: Mirza Krak 
>
> Respect the mode passed in set_mode ops.
>
> Signed-off-by: Mirza Krak 

Reviewed-by: Jagan Teki 

thanks!
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Re: [U-Boot] [PATCH] fs: ext4: fix symlink read function

[Gary Bisson]

Hi Simon,

On Tue, Sep 8, 2015 at 5:56 AM, Simon Glass  wrote:
> Hi Gary,
>
> On 7 September 2015 at 03:20, Gary Bisson
>  wrote:
>> Since last API changes for files >2GB, the read of symlink is broken as
>> ext4fs_read_file now returns 0 instead of the length of the actual read.
>>
>> Signed-off-by: Gary Bisson 
>> ---
>> Hi all,
>>
>> Switching from an old v2014.07 to v2015.07 we've noticed that we couldn't
>> read symlinks any more. This is due to the API changes made to
>> ext4fs_read_file (commit 9f12cd0).
>>
>> This patch makes the read symlink check both for errors (status < 0) and
>> actual read length.
>>
>> Regards,
>> Gary
>
> Thanks for fixing this. Does the filesystem test (test/fs-test.sh)
> show this error? How could we enhance the test to detect this?

I wasn't aware of this testing script, a quick look at it makes me
think it doesn't check anything symlink-related. I guess it would
require to add SYMLINK_FILE that points to either SMALL_FILE or
BIG_FILE, read it and check the md5sum.

Regards,
Gary
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Re: [U-Boot] [PATCH 3/3] omap3: cm-t3517: change environment size

[Igor Grinberg]

Hi Dima,

On 09/08/15 09:50, Dmitry Lifshitz wrote:
> Mainline CM-T3517 U-Boot environment size differs from the that one
> shipped with CM-T3517 boards.

There is some strangeness in the above sentence...

> 
> Update environment size, to avoid backward compatability issues.

s/compatability/compatibility/

> 
> Signed-off-by: Dmitry Lifshitz 
> ---
>  include/configs/cm_t3517.h |4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
> index 2d16799..36488d7 100644
> --- a/include/configs/cm_t3517.h
> +++ b/include/configs/cm_t3517.h
> @@ -66,8 +66,8 @@
>  /*
>   * Size of malloc() pool
>   */
> -#define CONFIG_ENV_SIZE  (16 << 10)  /* 16 KiB */
> -#define CONFIG_SYS_MALLOC_LEN(CONFIG_ENV_SIZE + (128 << 10))
> +#define CONFIG_ENV_SIZE  (128 << 10) /* 128 KiB */
> +#define CONFIG_SYS_MALLOC_LEN(CONFIG_ENV_SIZE + (512 << 10))

Why do you change CONFIG_SYS_MALLOC_LEN?
Isn't it not enough?
If so, I would expect to see some explanation in the commit message.


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Igor.
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[U-Boot] [PATCH 1/2] ARM: tegra124: Clear IDDQ when enabling PLLC

[Thierry Reding]

From: Thierry Reding 

Enabling a PLL while IDDQ is high. The Linux kernel checks for this
condition and warns about it verbosely, so while this seems to work
fine, fix it up according to the programming guidelines provided in
the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup
Sequence").

Reported-by: Nicolas Chauvet 
Signed-off-by: Thierry Reding 
---
 arch/arm/include/asm/arch-tegra124/clock.h | 3 +++
 arch/arm/mach-tegra/tegra124/clock.c   | 5 +
 2 files changed, 8 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra124/clock.h 
b/arch/arm/include/asm/arch-tegra124/clock.h
index e202cc5a7f46..ff99b9dfafda 100644
--- a/arch/arm/include/asm/arch-tegra124/clock.h
+++ b/arch/arm/include/asm/arch-tegra124/clock.h
@@ -16,6 +16,9 @@
 #define OSC_FREQ_SHIFT  28
 #define OSC_FREQ_MASK   (0xF << OSC_FREQ_SHIFT)
 
+/* CLK_RST_CONTROLLER_PLLC_MISC_0 */
+#define PLLC_IDDQ  (1 << 26)
+
 /* CLK_RST_CONTROLLER_CLK_SOURCE_SOR0_0 */
 #define SOR0_CLK_SEL0  (1 << 14)
 #define SOR0_CLK_SEL1  (1 << 15)
diff --git a/arch/arm/mach-tegra/tegra124/clock.c 
b/arch/arm/mach-tegra/tegra124/clock.c
index aa046e8950f7..1e71146236e9 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -809,6 +809,11 @@ void clock_early_init(void)
 
tegra30_set_up_pllp();
 
+   /* clear IDDQ before accessing any other PLLC registers */
+   pllinfo = _pll_info_table[CLOCK_ID_CGENERAL];
+   clrbits_le32(>crc_pll[CLOCK_ID_CGENERAL].pll_misc, PLLC_IDDQ);
+   udelay(2);
+
/*
 * PLLC output frequency set to 600Mhz
 * PLLD output frequency set to 925Mhz
-- 
2.5.0

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[U-Boot] [PATCH 2/2] ARM: tegra114: Clear IDDQ when enabling PLLC

[Thierry Reding]

From: Thierry Reding 

Enabling a PLL while IDDQ is high. The Linux kernel checks for this
condition and warns about it verbosely, so while this seems to work
fine, fix it up according to the programming guidelines provided in
the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup
Sequence"). The Tegra114 TRM doesn't contain this information, but
the programming of PLLC is the same on Tegra114 and Tegra124.

Signed-off-by: Thierry Reding 
---
 arch/arm/include/asm/arch-tegra114/clock.h | 3 +++
 arch/arm/mach-tegra/tegra114/clock.c   | 5 +
 2 files changed, 8 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra114/clock.h 
b/arch/arm/include/asm/arch-tegra114/clock.h
index abbefcd0e456..9bee39778747 100644
--- a/arch/arm/include/asm/arch-tegra114/clock.h
+++ b/arch/arm/include/asm/arch-tegra114/clock.h
@@ -25,4 +25,7 @@
 #define OSC_FREQ_SHIFT  28
 #define OSC_FREQ_MASK   (0xF << OSC_FREQ_SHIFT)
 
+/* CLK_RST_CONTROLLER_PLLC_MISC_0 */
+#define PLLC_IDDQ  (1 << 26)
+
 #endif /* _TEGRA114_CLOCK_H_ */
diff --git a/arch/arm/mach-tegra/tegra114/clock.c 
b/arch/arm/mach-tegra/tegra114/clock.c
index cec843b27df7..e6ef873c8dc4 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -629,6 +629,11 @@ void clock_early_init(void)
 
tegra30_set_up_pllp();
 
+   /* clear IDDQ before accessing any other PLLC registers */
+   pllinfo = _pll_info_table[CLOCK_ID_CGENERAL];
+   clrbits_le32(>crc_pll[CLOCK_ID_CGENERAL].pll_misc, PLLC_IDDQ);
+   udelay(2);
+
/*
 * PLLC output frequency set to 600Mhz
 * PLLD output frequency set to 925Mhz
-- 
2.5.0

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Re: [U-Boot] [PATCH 1/3] omap3: cm-t3517: enable 'netretry' and setup timeout

[Igor Grinberg]

On 09/08/15 09:50, Dmitry Lifshitz wrote:
> SBC-T3517 evaluation board has two Eth interfaces.
> Enable network retry of another interface if the default if failed
> or disconnected.
> 
> Add 'netretry=yes' in the default env. Setup relevant
> timeout values in the board config file.
> 
> Signed-off-by: Dmitry Lifshitz 

Acked-by: Igor Grinberg 

> ---
>  include/configs/cm_t3517.h |3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)
> 
> diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
> index a8d0b97..2d16799 100644
> --- a/include/configs/cm_t3517.h
> +++ b/include/configs/cm_t3517.h
> @@ -170,6 +170,7 @@
>   "loadaddr=0x8200\0" \
>   "baudrate=115200\0" \
>   "console=ttyO2,115200n8\0" \
> + "netretry=yes\0" \
>   "mpurate=auto\0" \
>   "vram=12M\0" \
>   "dvimode=1024x768MR-16@60\0" \
> @@ -275,6 +276,8 @@
>  #define CONFIG_SMC911X
>  #define CONFIG_SMC911X_32_BIT
>  #define CONFIG_SMC911X_BASE  (0x2C00 + (16 << 20))
> +#define CONFIG_ARP_TIMEOUT   200UL
> +#define CONFIG_NET_RETRY_COUNT   5
>  #endif /* CONFIG_CMD_NET */
>  
>  /* additions for new relocation code, must be added to all boards */
> 

-- 
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Igor.
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Re: [U-Boot] [PATCH 2/3] omap3: cm-t3517: fix MMC1 pinmux

[Igor Grinberg]

On 09/08/15 09:50, Dmitry Lifshitz wrote:
> Fix MMC1 pinmux setup, thus enable SD/MMC card support with CM-T3517.
> 
> Signed-off-by: Dmitry Lifshitz 

Acked-by: Igor Grinberg 

> ---
>  board/compulab/cm_t3517/mux.c |   12 ++--
>  1 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/board/compulab/cm_t3517/mux.c b/board/compulab/cm_t3517/mux.c
> index 88ce2cc..f31f19e 100644
> --- a/board/compulab/cm_t3517/mux.c
> +++ b/board/compulab/cm_t3517/mux.c
> @@ -121,12 +121,12 @@ void set_muxconf_regs(void)
>   MUX_VAL(CP(UART2_RX),   (IEN  | PTD | EN  | M4)); /*GPIO_147*/
>  
>   /* MMC1 */
> - MUX_VAL(CP(MMC1_CLK),   (IDIS | PTU | EN  | M0));
> - MUX_VAL(CP(MMC1_CMD),   (IEN  | PTU | EN  | M0));
> - MUX_VAL(CP(MMC1_DAT0),  (IEN  | PTU | EN  | M0));
> - MUX_VAL(CP(MMC1_DAT1),  (IEN  | PTU | EN  | M0));
> - MUX_VAL(CP(MMC1_DAT2),  (IEN  | PTU | EN  | M0));
> - MUX_VAL(CP(MMC1_DAT3),  (IEN  | PTU | EN  | M0));
> + MUX_VAL(CP(MMC1_CLK),   (IEN  | PTU | EN  | M0));
> + MUX_VAL(CP(MMC1_CMD),   (IEN  | PTU | DIS  | M0));
> + MUX_VAL(CP(MMC1_DAT0),  (IEN  | PTU | DIS  | M0));
> + MUX_VAL(CP(MMC1_DAT1),  (IEN  | PTU | DIS  | M0));
> + MUX_VAL(CP(MMC1_DAT2),  (IEN  | PTU | DIS  | M0));
> + MUX_VAL(CP(MMC1_DAT3),  (IEN  | PTU | DIS  | M0));
>  
>   /* DSS */
>   MUX_VAL(CP(DSS_PCLK),   (IDIS | PTD | DIS | M0));
> 

-- 
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Igor.
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[U-Boot] [PATCH 3/3] omap3: cm-t3517: change environment size

[Dmitry Lifshitz]

Mainline CM-T3517 U-Boot environment size differs from the that one
shipped with CM-T3517 boards.

Update environment size, to avoid backward compatability issues.

Signed-off-by: Dmitry Lifshitz 
---
 include/configs/cm_t3517.h |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index 2d16799..36488d7 100644
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -66,8 +66,8 @@
 /*
  * Size of malloc() pool
  */
-#define CONFIG_ENV_SIZE(16 << 10)  /* 16 KiB */
-#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + (128 << 10))
+#define CONFIG_ENV_SIZE(128 << 10) /* 128 KiB */
+#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + (512 << 10))
 
 /*
  * Hardware drivers
-- 
1.7.5.4

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[U-Boot] [PATCH 2/3] omap3: cm-t3517: fix MMC1 pinmux

[Dmitry Lifshitz]

Fix MMC1 pinmux setup, thus enable SD/MMC card support with CM-T3517.

Signed-off-by: Dmitry Lifshitz 
---
 board/compulab/cm_t3517/mux.c |   12 ++--
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/board/compulab/cm_t3517/mux.c b/board/compulab/cm_t3517/mux.c
index 88ce2cc..f31f19e 100644
--- a/board/compulab/cm_t3517/mux.c
+++ b/board/compulab/cm_t3517/mux.c
@@ -121,12 +121,12 @@ void set_muxconf_regs(void)
MUX_VAL(CP(UART2_RX),   (IEN  | PTD | EN  | M4)); /*GPIO_147*/
 
/* MMC1 */
-   MUX_VAL(CP(MMC1_CLK),   (IDIS | PTU | EN  | M0));
-   MUX_VAL(CP(MMC1_CMD),   (IEN  | PTU | EN  | M0));
-   MUX_VAL(CP(MMC1_DAT0),  (IEN  | PTU | EN  | M0));
-   MUX_VAL(CP(MMC1_DAT1),  (IEN  | PTU | EN  | M0));
-   MUX_VAL(CP(MMC1_DAT2),  (IEN  | PTU | EN  | M0));
-   MUX_VAL(CP(MMC1_DAT3),  (IEN  | PTU | EN  | M0));
+   MUX_VAL(CP(MMC1_CLK),   (IEN  | PTU | EN  | M0));
+   MUX_VAL(CP(MMC1_CMD),   (IEN  | PTU | DIS  | M0));
+   MUX_VAL(CP(MMC1_DAT0),  (IEN  | PTU | DIS  | M0));
+   MUX_VAL(CP(MMC1_DAT1),  (IEN  | PTU | DIS  | M0));
+   MUX_VAL(CP(MMC1_DAT2),  (IEN  | PTU | DIS  | M0));
+   MUX_VAL(CP(MMC1_DAT3),  (IEN  | PTU | DIS  | M0));
 
/* DSS */
MUX_VAL(CP(DSS_PCLK),   (IDIS | PTD | DIS | M0));
-- 
1.7.5.4

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[U-Boot] [PATCH 1/3] omap3: cm-t3517: enable 'netretry' and setup timeout

[Dmitry Lifshitz]

SBC-T3517 evaluation board has two Eth interfaces.
Enable network retry of another interface if the default if failed
or disconnected.

Add 'netretry=yes' in the default env. Setup relevant
timeout values in the board config file.

Signed-off-by: Dmitry Lifshitz 
---
 include/configs/cm_t3517.h |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index a8d0b97..2d16799 100644
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -170,6 +170,7 @@
"loadaddr=0x8200\0" \
"baudrate=115200\0" \
"console=ttyO2,115200n8\0" \
+   "netretry=yes\0" \
"mpurate=auto\0" \
"vram=12M\0" \
"dvimode=1024x768MR-16@60\0" \
@@ -275,6 +276,8 @@
 #define CONFIG_SMC911X
 #define CONFIG_SMC911X_32_BIT
 #define CONFIG_SMC911X_BASE(0x2C00 + (16 << 20))
+#define CONFIG_ARP_TIMEOUT 200UL
+#define CONFIG_NET_RETRY_COUNT 5
 #endif /* CONFIG_CMD_NET */
 
 /* additions for new relocation code, must be added to all boards */
-- 
1.7.5.4

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[U-Boot] [PATCH 0/3] omap3: cm-t3517: series of non critical fixes

[Dmitry Lifshitz]

These patches fix non critical issues, required to sync CM-T3517
mainline U-Boot with the that, shipped with the boards.

Dmitry Lifshitz (3):
  omap3: cm-t3517: enable 'netretry' and setup timeout
  omap3: cm-t3517: fix MMC1 pinmux
  omap3: cm-t3517: change environment size

 board/compulab/cm_t3517/mux.c |   12 ++--
 include/configs/cm_t3517.h|7 +--
 2 files changed, 11 insertions(+), 8 deletions(-)

-- 
1.7.5.4

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Re: [U-Boot] [PATCH 2/4] spi: cadence_qspi: Fix fdt read of spi-max-frequency

[Marek Vasut]

On Tuesday, September 08, 2015 at 03:16:58 AM, Chin Liang See wrote:
> Hi,

Hi!

> On Thu, 2015-09-03 at 16:19 +0200, ma...@denx.de wrote:
> > On Thursday, September 03, 2015 at 03:42:00 PM, Chin Liang See wrote:
> > > Fix the fdt read for spi-max-frequency as it's contained
> > > in the child node. Current state of code is always
> > > returning default value.
> > > 
> > > Signed-off-by: Chin Liang See 
> > > Cc: Dinh Nguyen 
> > > Cc: Dinh Nguyen 
> > > Cc: Marek Vasut 
> > > Cc: Stefan Roese 
> > > Cc: Vikas Manocha 
> > > Cc: Jagannadh Teki 
> > > Cc: Pavel Machek 
> > > ---
> > > 
> > >  drivers/spi/cadence_qspi.c |8 
> > >  1 files changed, 4 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> > > index 300934e..a00af87 100644
> > > --- a/drivers/spi/cadence_qspi.c
> > > +++ b/drivers/spi/cadence_qspi.c
> > > @@ -291,10 +291,6 @@ static int cadence_spi_ofdata_to_platdata(struct
> > > udevice *bus) plat->regbase = (void *)data[0];
> > > 
> > >   plat->ahbbase = (void *)data[2];
> > > 
> > > - /* Use 500KHz as a suitable default */
> > > - plat->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
> > > -   50);
> > > -
> > > 
> > >   /* All other paramters are embedded in the child node */
> > >   subnode = fdt_first_subnode(blob, node);
> > >   if (subnode < 0) {
> > > 
> > > @@ -302,6 +298,10 @@ static int cadence_spi_ofdata_to_platdata(struct
> > > udevice *bus) return -ENODEV;
> > > 
> > >   }
> > > 
> > > + /* Use 500KHz as a suitable default */
> > > + plat->max_hz = fdtdec_get_int(blob, subnode, "spi-max-frequency",
> > > +   50);
> > 
> > Use fdtdec_get_u32() or such, since the value is unsigned int (have you
> > ever seen negative frequency ? ;-) ). Then check the fdtdec_get_u32()
> > return value.
> 
> I git grep and no unsigned version.
> But I can add unsigned casting to avoid that.

I think fdt_getprop_u32() is what you're looking for.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 7/8] nios2: show fdt blob address in board info command

[Marek Vasut]

On Tuesday, September 08, 2015 at 05:55:59 AM, Simon Glass wrote:
> Hi,
> 
> On 6 September 2015 at 08:27, Marek Vasut  wrote:
> > On Sunday, September 06, 2015 at 03:20:21 PM, Thomas Chou wrote:
> >> Hi Marek,
> >> 
> >> >>> I think this will not work on 64bit machines.
> >> 
> >> I tried 64bits with
> >> 
> >>   print_lnum("fdt_blob", (u64)gd->fdt_blob);
> >> 
> >> But got this warning,
> >> 
> >>CC  common/cmd_bdinfo.o
> >> 
> >> common/cmd_bdinfo.c: In function 'do_bdinfo':
> >> common/cmd_bdinfo.c:180:25: warning: cast from pointer to integer of
> >> different size [-Wpointer-to-int-cast]
> >> 
> >>print_lnum("fdt_blob", (u64)gd->fdt_blob);
> >>
> >>   ^
> >> 
> >> include/asm-generic/global_data.h
> >> 
> >>   const void *fdt_blob;   /* Our device tree, NULL if none */
> >> 
> >> Actually, the print is guarded with CONFIG_NIOS2, so it is safe to use
> >> 32bits.
> >> 
> >> Or shall we invent a "print pointer address"?
> > 
> > Simon, Tom, what's your take on this ?
> 
> From what I can tell this code is not generic, and is built for NIOS
> only. So IMO the patch is fine and we don't need to worry about
> 64-bit.

Oh my $DEITY, we have one bdinfo implementation per architecture, all in
one ugly file. In that case, you're right, but this is truly horrible.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v3 1/9] net: Revert "tftp: adjust settings to be suitable for 100Mbit ethernet"

[Stefan Roese]

Hi Hannes,

On 08.09.2015 12:13, Hannes Schmelzer wrote:

what about:
https://patchwork.ozlabs.org/patch/510476/


I think the current plan is to first revert this patch for this release. 
To not introduce a risk of a new setup as done in the patch you are 
referencing above. This patch will most likely then be picked up after 
the release. So that it has more time to get tested before a release.


BTW: I think that Simon has queued the revert in his repo (Simon, please 
correct me if I'm wrong). The revert should definitely hit mainline 
soon. I've been hit by this problem now multiple times already.


Thanks,
Stefan

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Re: [U-Boot] [PATCH 2/4] spi: cadence_qspi: Fix fdt read of spi-max-frequency

[Marek Vasut]

On Tuesday, September 08, 2015 at 03:18:24 AM, Chin Liang See wrote:
> Fix the fdt read for spi-max-frequency as it's contained
> in the child node. Current state of code is always
> returning default value.
> 
> Signed-off-by: Chin Liang See 
> Cc: Dinh Nguyen 
> Cc: Dinh Nguyen 
> Cc: Marek Vasut 
> Cc: Stefan Roese 
> Cc: Vikas Manocha 
> Cc: Jagannadh Teki 
> Cc: Pavel Machek 
> ---
> Changes for v2
> - Add unsigned casting for plat->max_hz
> ---
>  drivers/spi/cadence_qspi.c |8 
>  1 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index 23c88d5..8c0f7dd 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -296,10 +296,6 @@ static int cadence_spi_ofdata_to_platdata(struct
> udevice *bus) plat->regbase = (void *)data[0];
>   plat->ahbbase = (void *)data[2];
> 
> - /* Use 500KHz as a suitable default */
> - plat->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
> -   50);
> -
>   /* All other paramters are embedded in the child node */
>   subnode = fdt_first_subnode(blob, node);
>   if (subnode < 0) {
> @@ -307,6 +303,10 @@ static int cadence_spi_ofdata_to_platdata(struct
> udevice *bus) return -ENODEV;
>   }
> 
> + /* Use 500KHz as a suitable default */
> + plat->max_hz = (unsigned int)fdtdec_get_int(blob, subnode,
> + "spi-max-frequency", 50);
> +

fdt_getprop_u32() might be the right thing to do here :)

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 4/4] arm: dts: socfpga: Increase the spi-max-frequency for QSPI flash

[Marek Vasut]

On Tuesday, September 08, 2015 at 03:19:08 AM, Chin Liang See wrote:
> With a working QSPI calibration, the SCLK can now run up to 100MHz
> 
> Signed-off-by: Chin Liang See 
> Cc: Dinh Nguyen 
> Cc: Dinh Nguyen 
> Cc: Marek Vasut 
> Cc: Stefan Roese 
> Cc: Vikas Manocha 
> Cc: Jagannadh Teki 
> Cc: Pavel Machek 
> Reviewed-by: Marek Vasut 

Acked-by: Marek Vasut 

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 01/10] usb: gadget: don't leak configs when unbinding

[Lukasz Majewski]

Hi Stephen,

> From: Stephen Warren 
> 
> By the time g_dnl_unbind() is run, cdev->config has been set to NULL,
> so the free() there does nothing, and the config struct is leaked.
> Equally, struct usb_gadget contains a linked list of config structs,
> so the code should iterate over them all and free each one, rather
> than freeing one particular config struct.
> 
> composite_unbind() already iterates over the list of config structs,
> and unlinks each from the linked list. Fix this loop to free() each
> struct as it's unlinked and otherwise forgotten.
> 
> Signed-off-by: Stephen Warren 
> ---
>  drivers/usb/gadget/composite.c | 1 +
>  drivers/usb/gadget/g_dnl.c | 2 --
>  2 files changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/gadget/composite.c
> b/drivers/usb/gadget/composite.c index d96296cd73b1..a13b21d0a0f2
> 100644 --- a/drivers/usb/gadget/composite.c
> +++ b/drivers/usb/gadget/composite.c
> @@ -948,6 +948,7 @@ static void composite_unbind(struct usb_gadget
> *gadget) debug("unbind config '%s'/%p\n", c->label, c);
>   c->unbind(c);
>   }
> + free(c);
>   }
>   if (composite->unbind)
>   composite->unbind(cdev);
> diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c
> index ad89a0d2e670..2fa6da4091e1 100644
> --- a/drivers/usb/gadget/g_dnl.c
> +++ b/drivers/usb/gadget/g_dnl.c
> @@ -93,8 +93,6 @@ static int g_dnl_unbind(struct usb_composite_dev
> *cdev) {
>   struct usb_gadget *gadget = cdev->gadget;
>  
> - free(cdev->config);
> - cdev->config = NULL;
>   debug("%s: calling usb_gadget_disconnect for "
>   "controller '%s'\n", __func__, gadget->name);
>   usb_gadget_disconnect(gadget);

Acked-by: Lukasz Majewski 

Tested-by: Lukasz Majewski 
Test HW: Odroid XU3 - Exynos5433.

-- 
Best regards,

Lukasz Majewski

Samsung R Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 1/4] spi: cadence_qspi: Ensure spi_calibration is run when sclk change

[Jagan Teki]

On 8 September 2015 at 06:47, Chin Liang See  wrote:
> Ensuring spi_calibration is run when there is a change of sclk
> frequency. This will ensure the qspi flash access works for high
> sclk frequency
>
> Signed-off-by: Chin Liang See 
> Cc: Dinh Nguyen 
> Cc: Dinh Nguyen 
> Cc: Marek Vasut 
> Cc: Stefan Roese 
> Cc: Vikas Manocha 
> Cc: Jagannadh Teki 
> Cc: Pavel Machek 
> ---
> Changes for v2
> - remove frequency set before calibration
> - introducing previous_hz to store requested frequency
> - prevent calibration run when request same frequency
> ---

Reviewed-by: Jagan Teki 

thanks!
-- 
Jagan | openedev.
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Re: [U-Boot] [PATCH 05/10] dfu: don't keep freeing/reallocating

[Lukasz Majewski]

Hi Stephen,

> From: Stephen Warren 
> 
> DFU currently allocates buffer memory at the start of each data
> transfer operation and frees it at the end. Especially since
> memalign() is used to allocate the buffer, and various other
> allocations happen during the transfer, this can expose the code to
> heap fragmentation, which prevents the allocation from succeeding on
> subsequent transfers.
> 
> Fix the code to allocate the buffer once when DFU mode is initialized,
> and free the buffer once when DFU mode is exited, to reduce the
> exposure to heap fragmentation.
> 
> The failure mode is:
> 
> // Internally to memalign(), this allocates a lot more than s to
> guarantee // that alignment can occur, then returns chunks of memory
> at the start/ // end of the allocated buffer to the heap.
> p = memalign(a, s);
> // Various other malloc()s occur here, some of which allocate the RAM
> // immediately before/after "p".
> //
> // DFU transfer is complete, so buffer is released.
> free(p);
> // By chance, no other malloc()/free() here, in DFU at least.
> //
> // A new DFU transfer starts, so the buffer is allocated again.
> // In theory this should succeed since we just free()d a buffer of the
> // same size. However, this fails because memalign() internally
> attempts // to allocate much more than "s", yet free(p) above only
> free()d a // little more than "s".
> p = memalign(a, s);
> 
> Signed-off-by: Stephen Warren 
> ---
>  drivers/dfu/dfu.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
> index 675162d927d8..d85d3f507a7b 100644
> --- a/drivers/dfu/dfu.c
> +++ b/drivers/dfu/dfu.c
> @@ -164,7 +164,6 @@ static int dfu_write_buffer_drain(struct
> dfu_entity *dfu) void dfu_write_transaction_cleanup(struct dfu_entity
> *dfu) {
>   /* clear everything */
> - dfu_free_buf();
>   dfu->crc = 0;
>   dfu->offset = 0;
>   dfu->i_blk_seq_num = 0;
> @@ -385,7 +384,6 @@ int dfu_read(struct dfu_entity *dfu, void *buf,
> int size, int blk_seq_num) dfu_hash_algo->name, dfu->crc);
>   puts("\nUPLOAD ... done\nCtrl+C to exit ...\n");
>  
> - dfu_free_buf();
>   dfu->i_blk_seq_num = 0;
>   dfu->crc = 0;
>   dfu->offset = 0;
> @@ -433,6 +431,7 @@ static int dfu_fill_entity(struct dfu_entity
> *dfu, char *s, int alt, __func__,  interface);
>   return -1;
>   }
> + dfu_get_buf(dfu);
>  
>   return 0;
>  }
> @@ -441,6 +440,7 @@ void dfu_free_entities(void)
>  {
>   struct dfu_entity *dfu, *p, *t = NULL;
>  
> + dfu_free_buf();
>   list_for_each_entry_safe_reverse(dfu, p, _list, list) {
>   list_del(>list);
>   if (dfu->free_entity)

Acked-by: Lukasz Majewski 
Tested-by: Lukasz Majewski 

Test HW: Odroid XU3 - Exynos5433
[DFU tests]

-- 
Best regards,

Lukasz Majewski

Samsung R Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH v5 0/3] add dfu support for at91 sam9260 based boards

[Heiko Schocher]

add dfu supprt for at91 sam9260 based boards. The USB
gadget driver is ported from linux:
c94e289f195e: usb: gadget: remove incorrect __init/__exit annotations

it drops a lot of checkpatch warnings/errors:

checkpatch.pl found 12 error(s), 28 warning(s), 38 checks(s)

but for further updates I did not fix them.
The errors are all from this sort:

error: drivers/usb/gadget/at91_udc.c,87: space prohibited before open square 
bracket '['

a lot of "line over 80 characters" warnings ...

remove the patch, which introduced BIT() macro. Instead
fix this now in the linux driver.

I had an issue with tftp on the smartweb board with current
mainline (commit efde6a579fe: "Prepare v2015.10-rc3") tftp
doesn;t work anymore, it stopped with:

TFTP error: 'Unsupported option(s) requested' (8)

[U-Boot,v3,1/9] net: Revert "tftp: adjust settings to be suitable for 100Mbit 
ethernet"
https://patchwork.ozlabs.org/patch/511761/

solved this issue. So this patch is needed for the
smartweb board support.

Changes in v5:
- add comment from Andreas Biessmann:
  remove BIT() usage in driver, also removed patch
  which introduced it for U-Boot
- rebase with current mainline
  commit efde6a579fe: "Prepare v2015.10-rc3"

Changes in v4:
- rebase after taurus board changes

Changes in v3:
- add comments from Alexandre Belloni
  get rid of cpu_is_at91*, use newer linux version as
  base for the port to U-Boot.
- adapt changes for U-Boot, as newer linux version is
  used.

Changes in v2:
- add comments from Lukasz Majewski
  - seperate usb gadget driver port from linux into 2 commits
  - first patch original from linux (with complete commit message)
  - second adds U-Boot changes without "#ifdef __UBOOT__"
- new in version 2, contains U-Boot changes
- rebase to bd48c0617b5c7212e5bf22169e716da878842da4
- fix changes introduced through commit:
  01acd6abbdd5: usb: USB download gadget and functions config options coherent 
naming
- add comments from Lukasz Majewski 
- use SZ_X defines

Heiko Schocher (3):
  usb: gadget: at91_udc: port linux driver at91_udc
  usb: gadget: at91_udc: add at91_udc into U-Boot
  at91, taurus, smartweb: add dfu support

 board/siemens/smartweb/smartweb.c |   29 +
 board/siemens/taurus/taurus.c |   27 +
 drivers/usb/gadget/Makefile   |1 +
 drivers/usb/gadget/at91_udc.c | 1625 +
 drivers/usb/gadget/at91_udc.h |  171 
 include/configs/smartweb.h|   53 +-
 include/configs/taurus.h  |   30 +-
 include/linux/usb/at91_udc.h  |   20 +
 8 files changed, 1941 insertions(+), 15 deletions(-)
 create mode 100644 drivers/usb/gadget/at91_udc.c
 create mode 100644 drivers/usb/gadget/at91_udc.h
 create mode 100644 include/linux/usb/at91_udc.h

-- 
2.1.0

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Re: [U-Boot] [PATCH v3 1/9] net: Revert "tftp: adjust settings to be suitable for 100Mbit ethernet"

[Hannes Schmelzer]

Hi,

what about:
https://patchwork.ozlabs.org/patch/510476/

best regards,
Hannes


On 08.09.2015 11:23, Heiko Schocher wrote:

Hello Bin,

Am 28.08.2015 um 07:25 schrieb Bin Meng:
Commit 620776d "tftp: adjust settings to be suitable for 100Mbit 
ethernet"
causes the following error message when trying to load a file using 
'tftp'

command via a tftp server.

 TFTP error: 'Unsupported option(s) requested' (8)

This is due to with commit 620776d changes, the tftp option 'timeout'
value is now set to zero which is an invalid value as per RFC2349 [1].
Valid values range between "1" and "255" seconds, inclusive. With some
tftp servers that strictly implement the RFC requirement, it reports
such an error message.

Revert commit 620776d for RFC compliance.

[1] https://www.ietf.org/rfc/rfc2349.txt

Signed-off-by: Bin Meng 
Acked-by: Joe Hershberger 


Just tried current mainline on the smartweb board, and had the
same issue. Your patch fixed it, thanks!

Tested-by: Heiko Schocher 

bye,
Heiko


---

Changes in v3:
- Drop e1000 build warning patch which is already applied

Changes in v2:
- Rewrite the commit message to mention RFC2349

  net/tftp.c | 10 +-
  1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/net/tftp.c b/net/tftp.c
index 18ce84c..89be32a 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -19,10 +19,10 @@
  /* Well known TFTP port # */
  #define WELL_KNOWN_PORT69
  /* Millisecs to timeout for lost pkt */
-#define TIMEOUT100UL
+#define TIMEOUT5000UL
  #ifndefCONFIG_NET_RETRY_COUNT
  /* # of timeouts before giving up */
-# define TIMEOUT_COUNT1000
+# define TIMEOUT_COUNT10
  #else
  # define TIMEOUT_COUNT  (CONFIG_NET_RETRY_COUNT * 2)
  #endif
@@ -711,10 +711,10 @@ void tftp_start(enum proto_t protocol)
  if (ep != NULL)
  timeout_ms = simple_strtol(ep, NULL, 10);

-if (timeout_ms < 10) {
-printf("TFTP timeout (%ld ms) too low, set min = 10 ms\n",
+if (timeout_ms < 1000) {
+printf("TFTP timeout (%ld ms) too low, set min = 1000 ms\n",
 timeout_ms);
-timeout_ms = 10;
+timeout_ms = 1000;
  }

  debug("TFTP blocksize = %i, timeout = %ld ms\n",





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[U-Boot] [PATCH 3/8] x86: quark: Convert to use clrbits, setbits, clrsetbits macros

[Bin Meng]

Change existing codes to use clrbits, setbits, clrsetbits macros.

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/quark/quark.c | 72 ++
 1 file changed, 21 insertions(+), 51 deletions(-)

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 934250b..8d53fe3 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -73,8 +73,6 @@ static void quark_setup_bars(void)
 
 static void quark_pcie_early_init(void)
 {
-   u32 pcie_cfg;
-
/*
 * Step1: Assert PCIe signal PERST#
 *
@@ -84,23 +82,18 @@ static void quark_pcie_early_init(void)
board_assert_perst();
 
/* Step2: PHY common lane reset */
-   pcie_cfg = msg_port_alt_read(MSG_PORT_SOC_UNIT, PCIE_CFG);
-   pcie_cfg |= PCIE_PHY_LANE_RST;
-   msg_port_alt_write(MSG_PORT_SOC_UNIT, PCIE_CFG, pcie_cfg);
+   msg_port_alt_setbits(MSG_PORT_SOC_UNIT, PCIE_CFG, PCIE_PHY_LANE_RST);
/* wait 1 ms for PHY common lane reset */
mdelay(1);
 
/* Step3: PHY sideband interface reset and controller main reset */
-   pcie_cfg = msg_port_alt_read(MSG_PORT_SOC_UNIT, PCIE_CFG);
-   pcie_cfg |= (PCIE_PHY_SB_RST | PCIE_CTLR_MAIN_RST);
-   msg_port_alt_write(MSG_PORT_SOC_UNIT, PCIE_CFG, pcie_cfg);
+   msg_port_alt_setbits(MSG_PORT_SOC_UNIT, PCIE_CFG,
+PCIE_PHY_SB_RST | PCIE_CTLR_MAIN_RST);
/* wait 80ms for PLL to lock */
mdelay(80);
 
/* Step4: Controller sideband interface reset */
-   pcie_cfg = msg_port_alt_read(MSG_PORT_SOC_UNIT, PCIE_CFG);
-   pcie_cfg |= PCIE_CTLR_SB_RST;
-   msg_port_alt_write(MSG_PORT_SOC_UNIT, PCIE_CFG, pcie_cfg);
+   msg_port_alt_setbits(MSG_PORT_SOC_UNIT, PCIE_CFG, PCIE_CTLR_SB_RST);
/* wait 20ms for controller sideband interface reset */
mdelay(20);
 
@@ -108,66 +101,43 @@ static void quark_pcie_early_init(void)
board_deassert_perst();
 
/* Step6: Controller primary interface reset */
-   pcie_cfg = msg_port_alt_read(MSG_PORT_SOC_UNIT, PCIE_CFG);
-   pcie_cfg |= PCIE_CTLR_PRI_RST;
-   msg_port_alt_write(MSG_PORT_SOC_UNIT, PCIE_CFG, pcie_cfg);
+   msg_port_alt_setbits(MSG_PORT_SOC_UNIT, PCIE_CFG, PCIE_CTLR_PRI_RST);
 
/* Mixer Load Lane 0 */
-   pcie_cfg = msg_port_io_read(MSG_PORT_PCIE_AFE, PCIE_RXPICTRL0_L0);
-   pcie_cfg &= ~((1 << 6) | (1 << 7));
-   msg_port_io_write(MSG_PORT_PCIE_AFE, PCIE_RXPICTRL0_L0, pcie_cfg);
+   msg_port_io_clrbits(MSG_PORT_PCIE_AFE, PCIE_RXPICTRL0_L0,
+   (1 << 6) | (1 << 7));
 
/* Mixer Load Lane 1 */
-   pcie_cfg = msg_port_io_read(MSG_PORT_PCIE_AFE, PCIE_RXPICTRL0_L1);
-   pcie_cfg &= ~((1 << 6) | (1 << 7));
-   msg_port_io_write(MSG_PORT_PCIE_AFE, PCIE_RXPICTRL0_L1, pcie_cfg);
+   msg_port_io_clrbits(MSG_PORT_PCIE_AFE, PCIE_RXPICTRL0_L1,
+   (1 << 6) | (1 << 7));
 }
 
 static void quark_usb_early_init(void)
 {
-   u32 usb;
-
/* The sequence below comes from Quark firmware writer guide */
 
-   usb = msg_port_alt_read(MSG_PORT_USB_AFE, USB2_GLOBAL_PORT);
-   usb &= ~(1 << 1);
-   usb |= ((1 << 6) | (1 << 7));
-   msg_port_alt_write(MSG_PORT_USB_AFE, USB2_GLOBAL_PORT, usb);
+   msg_port_alt_clrsetbits(MSG_PORT_USB_AFE, USB2_GLOBAL_PORT,
+   1 << 1, (1 << 6) | (1 << 7));
 
-   usb = msg_port_alt_read(MSG_PORT_USB_AFE, USB2_COMPBG);
-   usb &= ~((1 << 8) | (1 << 9));
-   usb |= ((1 << 7) | (1 << 10));
-   msg_port_alt_write(MSG_PORT_USB_AFE, USB2_COMPBG, usb);
+   msg_port_alt_clrsetbits(MSG_PORT_USB_AFE, USB2_COMPBG,
+   (1 << 8) | (1 << 9), (1 << 7) | (1 << 10));
 
-   usb = msg_port_alt_read(MSG_PORT_USB_AFE, USB2_PLL2);
-   usb |= (1 << 29);
-   msg_port_alt_write(MSG_PORT_USB_AFE, USB2_PLL2, usb);
+   msg_port_alt_setbits(MSG_PORT_USB_AFE, USB2_PLL2, 1 << 29);
 
-   usb = msg_port_alt_read(MSG_PORT_USB_AFE, USB2_PLL1);
-   usb |= (1 << 1);
-   msg_port_alt_write(MSG_PORT_USB_AFE, USB2_PLL1, usb);
+   msg_port_alt_setbits(MSG_PORT_USB_AFE, USB2_PLL1, 1 << 1);
 
-   usb = msg_port_alt_read(MSG_PORT_USB_AFE, USB2_PLL1);
-   usb &= ~((1 << 3) | (1 << 4) | (1 << 5));
-   usb |= (1 << 6);
-   msg_port_alt_write(MSG_PORT_USB_AFE, USB2_PLL1, usb);
+   msg_port_alt_clrsetbits(MSG_PORT_USB_AFE, USB2_PLL1,
+   (1 << 3) | (1 << 4) | (1 << 5), 1 << 6);
 
-   usb = msg_port_alt_read(MSG_PORT_USB_AFE, USB2_PLL2);
-   usb &= ~(1 << 29);
-   msg_port_alt_write(MSG_PORT_USB_AFE, USB2_PLL2, usb);
+   msg_port_alt_clrbits(MSG_PORT_USB_AFE, USB2_PLL2, 1 << 29);
 
-   usb = msg_port_alt_read(MSG_PORT_USB_AFE, USB2_PLL2);
-   usb |= (1 << 24);
-   msg_port_alt_write(MSG_PORT_USB_AFE, USB2_PLL2, usb);
+   

[U-Boot] [PATCH 1/8] x86: galileo: Enable random mac address for Quark

[Bin Meng]

Not like other Intel Ethernet controllers (e.g.: E1000), Intel Quark
SoC integrated designware Ethernet controller does not have a chipset
defined way to store/restore mac address. Enable random mac address
so that we can use Ethernet even without 'ethaddr'.

Signed-off-by: Bin Meng 
---

 configs/galileo_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 9623986..d1808a5 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -11,6 +11,7 @@ CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
-- 
1.8.2.1

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[U-Boot] [PATCH 2/8] x86: quark: Add clrbits, setbits, clrsetbits macros for message port access

[Bin Meng]

On Intel Quark, lots of registers on the message port need be
programmed. Add handy clrbits, setbits, clrsetbits macros for
message port access.

Signed-off-by: Bin Meng 
---

 arch/x86/include/asm/arch-quark/msg_port.h | 39 ++
 1 file changed, 39 insertions(+)

diff --git a/arch/x86/include/asm/arch-quark/msg_port.h 
b/arch/x86/include/asm/arch-quark/msg_port.h
index 2e78a66..825ae90 100644
--- a/arch/x86/include/asm/arch-quark/msg_port.h
+++ b/arch/x86/include/asm/arch-quark/msg_port.h
@@ -101,6 +101,45 @@ u32 msg_port_io_read(u8 port, u32 reg);
  */
 void msg_port_io_write(u8 port, u32 reg, u32 value);
 
+/* clrbits, setbits, clrsetbits macros for message port access */
+
+#define msg_port_normal_read   msg_port_read
+#define msg_port_normal_write  msg_port_write
+
+#define msg_port_generic_clrbits(type, port, reg, clr) \
+   msg_port_##type##_write(port, reg,  \
+   msg_port_##type##_read(port, reg) & ~(clr))
+
+#define msg_port_generic_setbits(type, port, reg, set) \
+   msg_port_##type##_write(port, reg,  \
+   msg_port_##type##_read(port, reg) | (set))
+
+#define msg_port_generic_clrsetbits(type, port, reg, clr, set) \
+   msg_port_##type##_write(port, reg,  \
+   (msg_port_##type##_read(port, reg)  \
+   & ~(clr)) | (set))
+
+#define msg_port_clrbits(port, reg, clr)   \
+   msg_port_generic_clrbits(normal, port, reg, clr)
+#define msg_port_setbits(port, reg, set)   \
+   msg_port_generic_setbits(normal, port, reg, set)
+#define msg_port_clrsetbits(port, reg, clr, set)   \
+   msg_port_generic_clrsetbits(normal, port, reg, clr, set)
+
+#define msg_port_alt_clrbits(port, reg, clr)   \
+   msg_port_generic_clrbits(alt, port, reg, clr)
+#define msg_port_alt_setbits(port, reg, set)   \
+   msg_port_generic_setbits(alt, port, reg, set)
+#define msg_port_alt_clrsetbits(port, reg, clr, set)   \
+   msg_port_generic_clrsetbits(alt, port, reg, clr, set)
+
+#define msg_port_io_clrbits(port, reg, clr)\
+   msg_port_generic_clrbits(io, port, reg, clr)
+#define msg_port_io_setbits(port, reg, set)\
+   msg_port_generic_setbits(io, port, reg, set)
+#define msg_port_io_clrsetbits(port, reg, clr, set)\
+   msg_port_generic_clrsetbits(io, port, reg, clr, set)
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* _QUARK_MSG_PORT_H_ */
-- 
1.8.2.1

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Re: [U-Boot] [PATCH v3 1/9] net: Revert "tftp: adjust settings to be suitable for 100Mbit ethernet"

[Hannes Schmelzer]

Hi,

okay ... just wanted to get sure that the patch has been noticed.

best regards,
Hannes


On 08.09.2015 12:36, Stefan Roese wrote:

Hi Hannes,

On 08.09.2015 12:13, Hannes Schmelzer wrote:

what about:
https://patchwork.ozlabs.org/patch/510476/


I think the current plan is to first revert this patch for this 
release. To not introduce a risk of a new setup as done in the patch 
you are referencing above. This patch will most likely then be picked 
up after the release. So that it has more time to get tested before a 
release.


BTW: I think that Simon has queued the revert in his repo (Simon, 
please correct me if I'm wrong). The revert should definitely hit 
mainline soon. I've been hit by this problem now multiple times already.


Thanks,
Stefan




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Re: [U-Boot] [PATCH 4/4] arm: dts: socfpga: Increase the spi-max-frequency for QSPI flash

[Jagan Teki]

On 8 September 2015 at 16:50, Marek Vasut  wrote:
> On Tuesday, September 08, 2015 at 03:19:08 AM, Chin Liang See wrote:
>> With a working QSPI calibration, the SCLK can now run up to 100MHz
>>
>> Signed-off-by: Chin Liang See 
>> Cc: Dinh Nguyen 
>> Cc: Dinh Nguyen 
>> Cc: Marek Vasut 
>> Cc: Stefan Roese 
>> Cc: Vikas Manocha 
>> Cc: Jagannadh Teki 
>> Cc: Pavel Machek 
>> Reviewed-by: Marek Vasut 
>
> Acked-by: Marek Vasut 

Reviewed-by: Jagan Teki 

thanks!
-- 
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Re: [U-Boot] [PATCH 1/4] spi: cadence_qspi: Ensure spi_calibration is run when sclk change

[Marek Vasut]

On Tuesday, September 08, 2015 at 02:25:54 PM, Jagan Teki wrote:
> On 8 September 2015 at 16:38, Marek Vasut  wrote:
> > On Tuesday, September 08, 2015 at 03:17:49 AM, Chin Liang See wrote:
> >> Ensuring spi_calibration is run when there is a change of sclk
> >> frequency. This will ensure the qspi flash access works for high
> >> sclk frequency
> >> 
> >> Signed-off-by: Chin Liang See 
> >> Cc: Dinh Nguyen 
> >> Cc: Dinh Nguyen 
> >> Cc: Marek Vasut 
> >> Cc: Stefan Roese 
> >> Cc: Vikas Manocha 
> >> Cc: Jagannadh Teki 
> >> Cc: Pavel Machek 
> > 
> > Acked-by: Marek Vasut 
> > 
> > Jagan, please apply for -next or I'll pick it up. Which do you prefer ?
> 
> You can pick, no issues. once 2/4, 3/4 ready.

OK, will do.

Best regards,
Marek Vasut
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[U-Boot] [PATCH] malloc_simple: fix malloc_ptr calculation

[Philipp Rosenberger]

The gd->malloc_ptr and the gd->malloc_limit are offsets to gd->malloc_base.
But the addr variable contains the absolute address. The new_ptr must be:
addr + bytes - gd->malloc_base.

Signed-off-by: Philipp Rosenberger 
---
 common/malloc_simple.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/malloc_simple.c b/common/malloc_simple.c
index 134e059..c745863 100644
--- a/common/malloc_simple.c
+++ b/common/malloc_simple.c
@@ -32,7 +32,7 @@ void *memalign_simple(size_t align, size_t bytes)
void *ptr;
 
addr = ALIGN(gd->malloc_base + gd->malloc_ptr, align);
-   new_ptr = addr + bytes;
+   new_ptr = addr + bytes - gd->malloc_base;
if (new_ptr > gd->malloc_limit)
return NULL;
ptr = map_sysmem(addr, bytes);
-- 
2.1.4

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Re: [U-Boot] [PATCH 1/4] spi: cadence_qspi: Ensure spi_calibration is run when sclk change

[Marek Vasut]

On Tuesday, September 08, 2015 at 03:17:49 AM, Chin Liang See wrote:
> Ensuring spi_calibration is run when there is a change of sclk
> frequency. This will ensure the qspi flash access works for high
> sclk frequency
> 
> Signed-off-by: Chin Liang See 
> Cc: Dinh Nguyen 
> Cc: Dinh Nguyen 
> Cc: Marek Vasut 
> Cc: Stefan Roese 
> Cc: Vikas Manocha 
> Cc: Jagannadh Teki 
> Cc: Pavel Machek 

Acked-by: Marek Vasut 

Jagan, please apply for -next or I'll pick it up. Which do you prefer ?

[...]

> diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
> index 98e57aa..2912e36 100644
> --- a/drivers/spi/cadence_qspi.h
> +++ b/drivers/spi/cadence_qspi.h
> @@ -38,6 +38,7 @@ struct cadence_spi_priv {
>   int qspi_is_init;
>   unsigned intqspi_calibrated_hz;
>   unsigned intqspi_calibrated_cs;

Idea for future patch: we should get rid of these qspi_ prefixes, they are
really useless.

> + unsigned intprevious_hz;
>  };
> 
>  /* Functions call declaration */

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v5 5/9] arm: serial: Add ability to use pre-initialized UARTs

[Sergei Temerkhanov]

On Tue, Sep 8, 2015 at 6:56 AM, Simon Glass  wrote:
> Hi Sergey,
>
> On 7 September 2015 at 09:18, Sergey Temerkhanov
>  wrote:
>> On some systems, UART initialization is performed before running U-Boot.
>> This commit allows to skip UART re-initializaion on those systems
>>
>> Signed-off-by: Sergey Temerkhanov 
>> Signed-off-by: Radha Mohan Chintakuntla 
>>
>> ---
>>
>> Changes in v5:
>> - Added OF control support
>>
>> Changes in v4:
>> - Fixed build warnings
>> - Moved to DM_SERIAL
>>
>> Changes in v3:
>> - Added __used keyword
>>
>> Changes in v2: None
>>
>>  drivers/serial/serial_pl01x.c   | 13 +++--
>>  include/dm/platform_data/serial_pl01x.h |  6 ++
>>  2 files changed, 13 insertions(+), 6 deletions(-)
>
> Reviewed-by: Simon Glass 
>
> But please see one issue below. Also you might consider implementing
> the debug UART for this driver so you get early debugging,

I'll look into this and create a separate patch once it's ready.
>
>>
>> diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
>> index ecf3bc0..83151e0 100644
>> --- a/drivers/serial/serial_pl01x.c
>> +++ b/drivers/serial/serial_pl01x.c
>> @@ -125,7 +125,7 @@ static int pl011_set_line_control(struct pl01x_regs 
>> *regs)
>>  }
>>
>>  static int pl01x_generic_setbrg(struct pl01x_regs *regs, enum pl01x_type 
>> type,
>> -   int clock, int baudrate)
>> +  int clock, int baudrate)
>>  {
>> switch (type) {
>> case TYPE_PL010: {
>> @@ -295,7 +295,6 @@ __weak struct serial_device *default_serial_console(void)
>>  #endif /* nCONFIG_DM_SERIAL */
>>
>>  #ifdef CONFIG_DM_SERIAL
>> -
>>  struct pl01x_priv {
>> struct pl01x_regs *regs;
>> enum pl01x_type type;
>> @@ -306,9 +305,9 @@ static int pl01x_serial_setbrg(struct udevice *dev, int 
>> baudrate)
>> struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
>> struct pl01x_priv *priv = dev_get_priv(dev);
>>
>> -   pl01x_generic_setbrg(priv->regs, priv->type, plat->clock, baudrate);
>> -
>> -   return 0;
>> +   return (plat->flags & PL0X_PREINITIALIZED) ? 0 :
>> +   pl01x_generic_setbrg(priv->regs, priv->type,
>> +plat->clock, baudrate);
>>  }
>>
>>  static int pl01x_serial_probe(struct udevice *dev)
>> @@ -318,7 +317,8 @@ static int pl01x_serial_probe(struct udevice *dev)
>>
>> priv->regs = (struct pl01x_regs *)plat->base;
>> priv->type = plat->type;
>> -   return pl01x_generic_serial_init(priv->regs, priv->type);
>> +   return (plat->flags & PL0X_PREINITIALIZED) ? 0 :
>> +   pl01x_generic_serial_init(priv->regs, priv->type);
>>  }
>>
>>  static int pl01x_serial_getc(struct udevice *dev)
>> @@ -372,6 +372,7 @@ static int pl01x_serial_ofdata_to_platdata(struct 
>> udevice *dev)
>> plat->base = addr;
>> plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "clock", 
>> 1);
>> plat->type = dev_get_driver_data(dev);
>> +   plat->flags = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "flags", 
>> 0);
>
> Can I suggest a boolean option here, like u-boot,skip-init? You can
> use fdtdec_get_bool() to read it.

Agreed. This improves code readability and maintainability.

> Also please add it to
> doc/device-tree-bindings/serial/pl01x.txt.

OK.

>
>> return 0;
>>  }
>>  #endif
>> diff --git a/include/dm/platform_data/serial_pl01x.h 
>> b/include/dm/platform_data/serial_pl01x.h
>> index 5e068f3..73e1be0 100644
>> --- a/include/dm/platform_data/serial_pl01x.h
>> +++ b/include/dm/platform_data/serial_pl01x.h
>> @@ -11,17 +11,23 @@ enum pl01x_type {
>> TYPE_PL011,
>>  };
>>
>> +enum pl01x_flags {
>> +   PL0X_PREINITIALIZED = 1 << 0, /* Skip port initialization */
>> +};
>> +
>>  /*
>>   *Information about a serial port
>>   *
>>   * @base: Register base address
>>   * @type: Port type
>>   * @clock: Input clock rate, used for calculating the baud rate divisor
>> + * @flags: Port flags
>>   */
>>  struct pl01x_serial_platdata {
>> unsigned long base;
>> enum pl01x_type type;
>> unsigned int clock;
>> +   unsigned long flags;
>>  };
>>
>>  #endif
>> --
>> 2.2.0
>>
>
> Regards,
> Simon
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[U-Boot] [PATCH v5 2/3] usb: gadget: at91_udc: add at91_udc into U-Boot

[Heiko Schocher]

add U-Boot specific changes to the at91_udc linux driver,
so it works with U-Boot.

Signed-off-by: Heiko Schocher 
---

Changes in v5:
- add comment from Andreas Biessmann:
  remove BIT() usage in driver, also removed patch
  which introduced it for U-Boot

Changes in v4: None
Changes in v3:
- adapt changes for U-Boot, as newer linux version is
  used.

Changes in v2:
- new in version 2, contains U-Boot changes

 drivers/usb/gadget/Makefile   |   1 +
 drivers/usb/gadget/at91_udc.c | 603 +++---
 drivers/usb/gadget/at91_udc.h |  16 +-
 include/linux/usb/at91_udc.h  |  20 ++
 4 files changed, 123 insertions(+), 517 deletions(-)
 create mode 100644 include/linux/usb/at91_udc.h

diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 4c11a7e..6288ecf 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o
 
 # new USB gadget layer dependencies
 ifdef CONFIG_USB_GADGET
+obj-$(CONFIG_USB_GADGET_AT91) += at91_udc.o
 obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
 obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o
 obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index fc42264..4070803 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1,43 +1,34 @@
 /*
+ * from linux:
+ * c94e289f195e: usb: gadget: remove incorrect __init/__exit annotations
+ *
  * at91_udc -- driver for at91-series USB peripheral controller
  *
  * Copyright (C) 2004 by Thomas Rathbone
  * Copyright (C) 2005 by HP Labs
  * Copyright (C) 2005 by David Brownell
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * SPDX-License-Identifier:GPL-2.0+
  */
 
 #undef VERBOSE_DEBUG
 #undef PACKET_TRACE
 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
 #include 
-#include 
-#include 
-#include 
-#include 
 #include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
+#include 
+#include 
+#include 
 
 #include "at91_udc.h"
 
-
 /*
  * This controller is simple and PIO-only.  It's used in many AT91-series
  * full speed USB controllers, including the at91rm9200 (arm920T, with MMU),
@@ -69,187 +60,12 @@ static const char * const ep_names[] = {
 };
 #define ep0nameep_names[0]
 
-#define VBUS_POLL_TIMEOUT  msecs_to_jiffies(1000)
-
 #define at91_udp_read(udc, reg) \
__raw_readl((udc)->udp_baseaddr + (reg))
 #define at91_udp_write(udc, reg, val) \
__raw_writel((val), (udc)->udp_baseaddr + (reg))
 
-/*-*/
-
-#ifdef CONFIG_USB_GADGET_DEBUG_FILES
-
-#include 
-
-static const char debug_filename[] = "driver/udc";
-
-#define FOURBITS "%s%s%s%s"
-#define EIGHTBITS FOURBITS FOURBITS
-
-static void proc_ep_show(struct seq_file *s, struct at91_ep *ep)
-{
-   static char *types[] = {
-   "control", "out-iso", "out-bulk", "out-int",
-   "BOGUS",   "in-iso",  "in-bulk",  "in-int"};
-
-   u32 csr;
-   struct at91_request *req;
-   unsigned long   flags;
-   struct at91_udc *udc = ep->udc;
-
-   spin_lock_irqsave(>lock, flags);
-
-   csr = __raw_readl(ep->creg);
-
-   /* NOTE:  not collecting per-endpoint irq statistics... */
-
-   seq_printf(s, "\n");
-   seq_printf(s, "%s, maxpacket %d %s%s %s%s\n",
-   ep->ep.name, ep->ep.maxpacket,
-   ep->is_in ? "in" : "out",
-   ep->is_iso ? " iso" : "",
-   ep->is_pingpong
-   ? (ep->fifo_bank ? "pong" : "ping")
-   : "",
-   ep->stopped ? " stopped" : "");
-   seq_printf(s, "csr %08x rxbytes=%d %s %s %s" EIGHTBITS "\n",
-   csr,
-   (csr & 0x07ff) >> 16,
-   (csr & (1 << 15)) ? "enabled" : "disabled",
-   (csr & (1 << 11)) ? "DATA1" : "DATA0",
-   types[(csr & 0x700) >> 8],
-
-   /* iff type is control then print current direction */
-   (!(csr & 0x700))
-   ? ((csr & (1 << 7)) ? " IN" : " OUT")
-   : "",
-   (csr & (1 << 6)) ? " rxdatabk1" : "",
-   (csr & (1 << 5)) ? " forcestall" : "",
-   (csr & (1 << 4)) ? " txpktrdy" : "",
-
-   (csr & (1 << 3)) ? " stallsent" : "",
-   (csr & (1 << 2)) ? " rxsetup" : "",
-   (csr & (1 << 1)) ? " rxdatabk0" : 

[U-Boot] [PATCH v5 1/3] usb: gadget: at91_udc: port linux driver at91_udc

[Heiko Schocher]

port at91_udc driver from linux:

original commit Message:
commit c94e289f195e0e13cf34d27f9338d28221a85751
Author: Arnd Bergmann 
Date:   Sat Apr 11 00:14:21 2015 +0200

usb: gadget: remove incorrect __init/__exit annotations

A recent change introduced a link error for the composite
printer gadget driver:

`printer_unbind' referenced in section `.ref.data' of drivers/built-in.o: 
defined in discarded section `.exit.text' of drivers/built-in.o

Evidently the unbind function should not be marked __exit here,
because it is called through a callback pointer that is not necessarily
discarded, __composite_unbind() is indeed called from the error path of
composite_bind(), which can never work for a built-in driver.

Looking at the surrounding code, I found the same problem in all other
composite gadget drivers in both the bind and unbind functions, as
well as the udc platform driver 'remove' functions. Those will break
if anyone uses the 'unbind' sysfs attribute to detach a device from a
built-in driver.

This patch removes the incorrect annotations from all the gadget
drivers.

Signed-off-by: Heiko Schocher 
---
checkpatch detects a lot of errors, but as this code is copied
from linux, I tend to not fix them, so later updates with
linux code is easier.

Changes in v5: None
Changes in v4: None
Changes in v3:
- add comments from Alexandre Belloni
  get rid of cpu_is_at91*, use newer linux version as
  base for the port to U-Boot.

Changes in v2:
- add comments from Lukasz Majewski
  - seperate usb gadget driver port from linux into 2 commits
  - first patch original from linux (with complete commit message)
  - second adds U-Boot changes without "#ifdef __UBOOT__"

 drivers/usb/gadget/at91_udc.c | 2036 +
 drivers/usb/gadget/at91_udc.h |  175 
 2 files changed, 2211 insertions(+)
 create mode 100644 drivers/usb/gadget/at91_udc.c
 create mode 100644 drivers/usb/gadget/at91_udc.h

diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
new file mode 100644
index 000..fc42264
--- /dev/null
+++ b/drivers/usb/gadget/at91_udc.c
@@ -0,0 +1,2036 @@
+/*
+ * at91_udc -- driver for at91-series USB peripheral controller
+ *
+ * Copyright (C) 2004 by Thomas Rathbone
+ * Copyright (C) 2005 by HP Labs
+ * Copyright (C) 2005 by David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#undef VERBOSE_DEBUG
+#undef PACKET_TRACE
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "at91_udc.h"
+
+
+/*
+ * This controller is simple and PIO-only.  It's used in many AT91-series
+ * full speed USB controllers, including the at91rm9200 (arm920T, with MMU),
+ * at91sam926x (arm926ejs, with MMU), and several no-mmu versions.
+ *
+ * This driver expects the board has been wired with two GPIOs supporting
+ * a VBUS sensing IRQ, and a D+ pullup.  (They may be omitted, but the
+ * testing hasn't covered such cases.)
+ *
+ * The pullup is most important (so it's integrated on sam926x parts).  It
+ * provides software control over whether the host enumerates the device.
+ *
+ * The VBUS sensing helps during enumeration, and allows both USB clocks
+ * (and the transceiver) to stay gated off until they're necessary, saving
+ * power.  During USB suspend, the 48 MHz clock is gated off in hardware;
+ * it may also be gated off by software during some Linux sleep states.
+ */
+
+#defineDRIVER_VERSION  "3 May 2006"
+
+static const char driver_name [] = "at91_udc";
+static const char * const ep_names[] = {
+   "ep0",
+   "ep1",
+   "ep2",
+   "ep3-int",
+   "ep4",
+   "ep5",
+};
+#define ep0nameep_names[0]
+
+#define VBUS_POLL_TIMEOUT  msecs_to_jiffies(1000)
+
+#define at91_udp_read(udc, reg) \
+   __raw_readl((udc)->udp_baseaddr + (reg))
+#define at91_udp_write(udc, reg, val) \
+   __raw_writel((val), (udc)->udp_baseaddr + (reg))
+
+/*-*/
+
+#ifdef CONFIG_USB_GADGET_DEBUG_FILES
+
+#include 
+
+static const char debug_filename[] = "driver/udc";
+
+#define FOURBITS "%s%s%s%s"
+#define EIGHTBITS FOURBITS FOURBITS
+
+static void proc_ep_show(struct seq_file *s, struct at91_ep *ep)
+{
+   static char *types[] = {
+   "control", "out-iso", "out-bulk", "out-int",
+   "BOGUS",   "in-iso",  "in-bulk",  "in-int"};
+
+   u32 csr;
+   struct at91_request *req;
+   unsigned long   flags;
+   struct 

Re: [U-Boot] [PATCH 2/4] spi: cadence_qspi: Fix fdt read of spi-max-frequency

[Jagan Teki]

On 8 September 2015 at 06:48, Chin Liang See  wrote:
> Fix the fdt read for spi-max-frequency as it's contained
> in the child node. Current state of code is always
> returning default value.
>
> Signed-off-by: Chin Liang See 
> Cc: Dinh Nguyen 
> Cc: Dinh Nguyen 
> Cc: Marek Vasut 
> Cc: Stefan Roese 
> Cc: Vikas Manocha 
> Cc: Jagannadh Teki 
> Cc: Pavel Machek 
> ---
> Changes for v2
> - Add unsigned casting for plat->max_hz
> ---
>  drivers/spi/cadence_qspi.c |8 
>  1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index 23c88d5..8c0f7dd 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -296,10 +296,6 @@ static int cadence_spi_ofdata_to_platdata(struct udevice 
> *bus)
> plat->regbase = (void *)data[0];
> plat->ahbbase = (void *)data[2];
>
> -   /* Use 500KHz as a suitable default */
> -   plat->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
> - 50);
> -
> /* All other paramters are embedded in the child node */
> subnode = fdt_first_subnode(blob, node);
> if (subnode < 0) {
> @@ -307,6 +303,10 @@ static int cadence_spi_ofdata_to_platdata(struct udevice 
> *bus)
> return -ENODEV;
> }
>
> +   /* Use 500KHz as a suitable default */
> +   plat->max_hz = (unsigned int)fdtdec_get_int(blob, subnode,
> +   "spi-max-frequency", 50);
> +

fdtdec_get_int will return default_val (say 50 here) or property
value from dts which is usually "unsigned", unless wrongly set as -ve
value ie reason there is no typecasting used in rest of the code.

But, if still worried, better to add unsigned fdtdec_get_* instead of
type casting.

> /* Read other parameters from DT */
> plat->page_size = fdtdec_get_int(blob, subnode, "page-size", 256);
> plat->block_size = fdtdec_get_int(blob, subnode, "block-size", 16);
> --
> 1.7.7.4
>

thanks!
-- 
Jagan | openedev.
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Re: [U-Boot] [PATCH v3 1/9] net: Revert "tftp: adjust settings to be suitable for 100Mbit ethernet"

[Bin Meng]

Hi Hannes,

On Tue, Sep 8, 2015 at 6:13 PM, Hannes Schmelzer  wrote:
> Hi,
>
> what about:
> https://patchwork.ozlabs.org/patch/510476/
>
> best regards,
> Hannes
>
>

The patch you mentioned does not completely revert the changes. It was
a mix of partial revert plus previous tftp timeout changes. I believe
Pavel will need to work out a proper patch to resolve the tftp timeout
issue he sees in his network environment. But that is for the next
release (v2016.01), not for this release.

>
> On 08.09.2015 11:23, Heiko Schocher wrote:
>>
>> Hello Bin,
>>
>> Am 28.08.2015 um 07:25 schrieb Bin Meng:
>>>
>>> Commit 620776d "tftp: adjust settings to be suitable for 100Mbit
>>> ethernet"
>>> causes the following error message when trying to load a file using
>>> 'tftp'
>>> command via a tftp server.
>>>
>>>  TFTP error: 'Unsupported option(s) requested' (8)
>>>
>>> This is due to with commit 620776d changes, the tftp option 'timeout'
>>> value is now set to zero which is an invalid value as per RFC2349 [1].
>>> Valid values range between "1" and "255" seconds, inclusive. With some
>>> tftp servers that strictly implement the RFC requirement, it reports
>>> such an error message.
>>>
>>> Revert commit 620776d for RFC compliance.
>>>
>>> [1] https://www.ietf.org/rfc/rfc2349.txt
>>>
>>> Signed-off-by: Bin Meng 
>>> Acked-by: Joe Hershberger 
>>
>>
>> Just tried current mainline on the smartweb board, and had the
>> same issue. Your patch fixed it, thanks!
>>
>> Tested-by: Heiko Schocher 
>>
>> bye,
>> Heiko
>>>
>>>
>>> ---
>>>
>>> Changes in v3:
>>> - Drop e1000 build warning patch which is already applied
>>>
>>> Changes in v2:
>>> - Rewrite the commit message to mention RFC2349
>>>
>>>   net/tftp.c | 10 +-
>>>   1 file changed, 5 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/net/tftp.c b/net/tftp.c
>>> index 18ce84c..89be32a 100644
>>> --- a/net/tftp.c
>>> +++ b/net/tftp.c
>>> @@ -19,10 +19,10 @@
>>>   /* Well known TFTP port # */
>>>   #define WELL_KNOWN_PORT69
>>>   /* Millisecs to timeout for lost pkt */
>>> -#define TIMEOUT100UL
>>> +#define TIMEOUT5000UL
>>>   #ifndefCONFIG_NET_RETRY_COUNT
>>>   /* # of timeouts before giving up */
>>> -# define TIMEOUT_COUNT1000
>>> +# define TIMEOUT_COUNT10
>>>   #else
>>>   # define TIMEOUT_COUNT  (CONFIG_NET_RETRY_COUNT * 2)
>>>   #endif
>>> @@ -711,10 +711,10 @@ void tftp_start(enum proto_t protocol)
>>>   if (ep != NULL)
>>>   timeout_ms = simple_strtol(ep, NULL, 10);
>>>
>>> -if (timeout_ms < 10) {
>>> -printf("TFTP timeout (%ld ms) too low, set min = 10 ms\n",
>>> +if (timeout_ms < 1000) {
>>> +printf("TFTP timeout (%ld ms) too low, set min = 1000 ms\n",
>>>  timeout_ms);
>>> -timeout_ms = 10;
>>> +timeout_ms = 1000;
>>>   }
>>>
>>>   debug("TFTP blocksize = %i, timeout = %ld ms\n",
>>>
>>
>

Regards,
Bin
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[U-Boot] [PATCH 4/8] x86: quark: Lock HMBOUND register before jumping to kernel

[Bin Meng]

When Linux kernel boots, it hangs at:

[0.829408] Intel Quark side-band driver registered

This happens when Quark kernel Isolated Memory Region (IMR) driver
tries to lock an IMR register to protect kernel's text and rodata
sections. However in order to have IMR function correctly, HMBOUND
register must be locked otherwise the system just hangs.

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/quark/quark.c  | 3 +++
 arch/x86/include/asm/arch-quark/quark.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 8d53fe3..3ddf079 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -288,5 +288,8 @@ void board_final_cleanup(void)
val &= ~0xff;
writel(val, >esd);
 
+   /* Lock HMBOUND for security */
+   msg_port_setbits(MSG_PORT_HOST_BRIDGE, HM_BOUND, HM_BOUND_LOCK);
+
return;
 }
diff --git a/arch/x86/include/asm/arch-quark/quark.h 
b/arch/x86/include/asm/arch-quark/quark.h
index eb3afbf..338c896 100644
--- a/arch/x86/include/asm/arch-quark/quark.h
+++ b/arch/x86/include/asm/arch-quark/quark.h
@@ -32,6 +32,7 @@
 
 /* Host Memory I/O Boundary */
 #define HM_BOUND   0x08
+#define HM_BOUND_LOCK  0x0001
 
 /* Extended Configuration Space */
 #define HEC_REG0x09
-- 
1.8.2.1

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[U-Boot] [PATCH 5/8] x86: quark: Initialize thermal sensor properly

[Bin Meng]

Thermal sensor on Quark SoC needs to be properly initialized per
Quark firmware writer guide, otherwise when booting Linux kernel,
it triggers system shutdown because of wrong temperature in the
thermal sensor is detected by the kernel driver (see below):

[5.119819] thermal_sys: Critical temperature reached(206 C),shutting down
[5.128997] Failed to start orderly shutdown: forcing the issue
[5.135495] Emergency Sync complete

Signed-off-by: Bin Meng 
---

 arch/x86/cpu/quark/quark.c  | 40 +
 arch/x86/include/asm/arch-quark/quark.h | 14 
 2 files changed, 54 insertions(+)

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 3ddf079..8b78a86 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -134,6 +134,43 @@ static void quark_usb_early_init(void)
msg_port_alt_setbits(MSG_PORT_USB_AFE, USB2_PLL2, 1 << 24);
 }
 
+static void quark_thermal_early_init(void)
+{
+   /* The sequence below comes from Quark firmware writer guide */
+
+   /* thermal sensor mode config */
+   msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG1,
+   (1 << 3) | (1 << 4) | (1 << 5), 1 << 5);
+   msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG1,
+   (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) |
+   (1 << 12), 1 << 9);
+   msg_port_alt_setbits(MSG_PORT_SOC_UNIT, TS_CFG1, 1 << 14);
+   msg_port_alt_clrbits(MSG_PORT_SOC_UNIT, TS_CFG1, 1 << 17);
+   msg_port_alt_clrbits(MSG_PORT_SOC_UNIT, TS_CFG1, 1 << 18);
+   msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG2, 0x, 0x011f);
+   msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG3, 0xff, 0x17);
+   msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG3,
+   (1 << 8) | (1 << 9), 1 << 8);
+   msg_port_alt_clrbits(MSG_PORT_SOC_UNIT, TS_CFG3, 0xff00);
+   msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG4,
+   0x7ff800, 0xc8 << 11);
+
+   /* thermal monitor catastrophic trip set point (105 celsius) */
+   msg_port_clrsetbits(MSG_PORT_RMU, TS_TRIP, 0xff, 155);
+
+   /* thermal monitor catastrophic trip clear point (0 celsius) */
+   msg_port_clrsetbits(MSG_PORT_RMU, TS_TRIP, 0xff, 50 << 16);
+
+   /* take thermal sensor out of reset */
+   msg_port_alt_clrbits(MSG_PORT_SOC_UNIT, TS_CFG4, 1 << 0);
+
+   /* enable thermal monitor */
+   msg_port_setbits(MSG_PORT_RMU, TS_MODE, 1 << 15);
+
+   /* lock all thermal configuration */
+   msg_port_setbits(MSG_PORT_RMU, RMU_CTRL, (1 << 5) | (1 << 6));
+}
+
 static void quark_enable_legacy_seg(void)
 {
msg_port_setbits(MSG_PORT_HOST_BRIDGE, HMISC2,
@@ -173,6 +210,9 @@ int arch_cpu_init(void)
/* Initialize USB2 PHY */
quark_usb_early_init();
 
+   /* Initialize thermal sensor */
+   quark_thermal_early_init();
+
/* Turn on legacy segments (A/B/E/F) decode to system RAM */
quark_enable_legacy_seg();
 
diff --git a/arch/x86/include/asm/arch-quark/quark.h 
b/arch/x86/include/asm/arch-quark/quark.h
index 338c896..f6009f6 100644
--- a/arch/x86/include/asm/arch-quark/quark.h
+++ b/arch/x86/include/asm/arch-quark/quark.h
@@ -42,9 +42,17 @@
 /* ACPI PBLK Base Address Register */
 #define PBLK_BA0x70
 
+/* Control Register */
+#define RMU_CTRL   0x71
+
 /* SPI DMA Base Address Register */
 #define SPI_DMA_BA 0x7a
 
+/* Thermal Sensor Register */
+#define TS_MODE0xb0
+#define TS_TEMP0xb1
+#define TS_TRIP0xb2
+
 /* Port 0x05: Memory Manager Message Port Registers */
 
 /* eSRAM Block Page Control */
@@ -65,6 +73,12 @@
 
 /* Port 0x31: SoC Unit Port Registers */
 
+/* Thermal Sensor Config */
+#define TS_CFG10x31
+#define TS_CFG20x32
+#define TS_CFG30x33
+#define TS_CFG40x34
+
 /* PCIe Controller Config */
 #define PCIE_CFG   0x36
 #define PCIE_CTLR_PRI_RST  0x0001
-- 
1.8.2.1

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Re: [U-Boot] [PATCH 1/2] arm: socfpga: mmc: Enable calibration for drvsel and smpsel

[Marek Vasut]

On Tuesday, September 08, 2015 at 03:32:33 AM, Chin Liang See wrote:
> Hi,

Hi,

> On Mon, 2015-09-07 at 03:33 +, Jaehoon Chung wrote:
> > Hi,
> > 
> > On 09/04/2015 07:41 PM, Pavel Machek wrote:
> > > Hi!
> > > 
> > >>> How is this SMPLSEL and DRVSEL implemented on Exynos ?
> > > 
> > > Exynos is using CLKSEL register in dw-mmc controller.
> > > It's exynos specific register in dwmmc controller. It's also
> > > represented 45 degree increment. SELCK_DRV is bit[18:16] or more.
> > > SELCLK_SAMPLE is bit[2:0] or more. There are other bits relevant to
> > > tuning clock. '_more_' means that it can be changed bandwidth.
> > > 
> > > Anyway, I think there is no right method about finding the best
> > > smplclk and drvsel. If this is generic method, i will pick this.
> > > But i don't think so, and there is no benefit for exynos.
> > > 
> > > smplclk and drvsel value need to process the tuning sequence.
> > > There is no tuning case at bootloader, since it's not implemented
> > > about HS200 or upper mode.
> > > 
> > > Clksel an drvsel value are passed by device tree.
> >  
> >  In that case, maybe SoCFPGA should also pick those values from DT ?
> >  It would keep the code simple and in case there is a problematic
> >  board, it could use u-boot application to perform the tuning.
> > >>> 
> > >>> I prefer not to do that as it narrows the supported use case for the
> > >>> driver.
> > >> 
> > >> How so? It keeps the driver code clean and this code you're adding
> > >> seems like a special-purpose stuff which needs to be done once for
> > >> particular board, no ?
> > > 
> > > Well... stuff that can be automatically detected is not supposed to be
> > > in the device tree.
> > > 
> > > clksel and drvsel can be calibrated, so I see some arguments why we
> > > should calibrate them, and not hardcode them in the device tree.
> > 
> > My opinions are
> > 
> > 1. This code is not generic dwmmc code. So i don't want to locate into
> > dwmmc core. If need to apply, i agree that it applies this in
> > socfpga-dw_mmc.c.
> 
> Yup, let move that to socfpga-dw_mmc.c as majority believe that is
> correct way to move forward. I shall send in v3 which integrate Pavel's
> comment in v2
> 
> > 2. In exynos, value of devcie-tree is the tested value.
> > After has tested with every values, it defined the best value into
> > device-tree. (Working fine with values.)
> > At every time, it doesn't need to detect the best value with same SoC.
> > (Especially, at bootloader)
> > 
> > 3. In my experiment, there should be side-effect during finding best
> > sample/drv value.
> > 
> > 4. If HS200 or upper mode is supported at bootloader, it needs the tuning
> > sequence. Then it needs to find the best sampl/drv values. but it
> > doesn't support HS200 or other at bootloader.
> 
> Yah, normally it will not need that.
> As we are catering for various customer board design, this calibration
> will help even they routed the SDMMC slot few inches away.
> 
> > 5. Affect at booting time??
> 
> We measured this before and it took around ~5.2ms for worst case.

Hm, what about supporting both the DT variant (where you specify drvsel and
smplsel in DT, the way we do it in Linux) and this calibration variant. The
calibration would only be executed if the smplsel and drvsel args were missing
from the DT.

What do you think ?
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[U-Boot] [PATCH 8/8] x86: doc: Add DMI to the TODO list

[Bin Meng]

Desktop Management Interface (DMI) is not supported by U-Boot now.
Add it to the TODO list.

Signed-off-by: Bin Meng 
---

 doc/README.x86 | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/doc/README.x86 b/doc/README.x86
index f76db7f..98ad7b2 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -761,6 +761,7 @@ TODO List
 - Audio
 - Chrome OS verified boot
 - SMI and ACPI support, to provide platform info and facilities to Linux
+- Desktop Management Interface (DMI) [15] support
 
 References
 --
@@ -778,3 +779,4 @@ References
 [12] 
http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf
 [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
 [14] doc/device-tree-bindings/misc/intel,irq-router.txt
+[15] http://en.wikipedia.org/wiki/Desktop_Management_Interface
-- 
1.8.2.1

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[U-Boot] [PATCH 7/8] x86: doc: Document some porting hints about Intel Quark

[Bin Meng]

Document porting considerations for Intel Quark based board,
including MRC parameters and PCIe initialization.

Signed-off-by: Bin Meng 

---

 doc/README.x86 | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/doc/README.x86 b/doc/README.x86
index 5f9c46f..f76db7f 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -733,6 +733,29 @@ Example output:
PCI_BDF(0, 3, 0) INTA PIRQA
 ...
 
+Porting Hints
+-
+
+Quark-specific considerations:
+
+To port U-Boot on other Intel Quark SoC based board, something needs to be 
taken
+care of. The first important part is the Memory Reference Code (MRC) 
parameters.
+Quark MRC supports memory-down configuration only. All these MRC parameters are
+supplied via board device tree. To get started, first copy the MRC section of
+arch/x86/dts/galileo.dts to your board's device tree, then change these values
+by consulting board manuals or your hardware vendor. Available MRC parameter
+values are listed in include/dt-bindings/mrc/quark.h. The other tricky part is
+with PCIe. Quark SoC integrates two PCIe root ports, but by default it is held
+in reset after power on. In U-Boot, PCIe initialization is properly handled as
+per Quark's firmware writer guide. In your board support codes, you need 
provide
+two routines to aid PCIe initialization, which are: board_assert_perst() and
+board_deassert_perst(). The two routines need implement board-specific 
mechanism
+to assert/deassert PCIe PERST# pin. Care must be taken that in those routines
+that any APIs that may trigger PCI enumeration process are strictly forbidden,
+as any access to PCIe root port's configuration registers will cause system 
hang
+while it is held in reset. For more details, check how it is implemented by the
+Intel Galileo board supported codes in board/intel/galileo/galileo.c.
+
 TODO List
 -
 - Audio
-- 
1.8.2.1

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[U-Boot] [PATCH 0/8] x86: Support booting Linux kernel on Intel Galileo

[Bin Meng]

Currently U-Boot works great on Intel Galileo board, but it still
has some issues when booting a Linux kernel. The issues are mainly
with Isolated Memory Region (IMR) and thermal sensor support in
the Linux kernel for Intel Quark SoC. For example, kernel just
hangs after kernel IMR driver is probed.

It turns out U-Boot still misses some key register programming.
Add those register initializtion so that Linux kernel can boot
succesfully.

Tested on Intel Galileo board, with an AHCI Mini-PCIe card with an
SSD attached (to test PCI IRQ behind the root port), as well as a
micro-SD card, a USB flash disk and ethernet under Linux.

Note the mainline Linux designware Ethernet driver uses an API
dmi_get_system_info() to determine the PHY address. Since U-Boot
currently does not support the DMI, to test the Ethernet under
Linux we need patch the kernel driver, but in the long term, we
should add DMI support in U-Boot. Add a TODO in README.x86 for now.


Bin Meng (8):
  x86: galileo: Enable random mac address for Quark
  x86: quark: Add clrbits, setbits, clrsetbits macros for message port
access
  x86: quark: Convert to use clrbits, setbits, clrsetbits macros
  x86: quark: Lock HMBOUND register before jumping to kernel
  x86: quark: Initialize thermal sensor properly
  x86: galileo: Add PCIe root port IRQ routing
  x86: doc: Document some porting hints about Intel Quark
  x86: doc: Add DMI to the TODO list

 arch/x86/cpu/quark/quark.c | 115 -
 arch/x86/dts/galileo.dts   |  12 +++
 arch/x86/include/asm/arch-quark/msg_port.h |  39 ++
 arch/x86/include/asm/arch-quark/quark.h|  15 
 configs/galileo_defconfig  |   1 +
 doc/README.x86 |  25 +++
 6 files changed, 156 insertions(+), 51 deletions(-)

-- 
1.8.2.1

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[U-Boot] [PATCH 6/8] x86: galileo: Add PCIe root port IRQ routing

[Bin Meng]

Now we have enabled PCIe root port on Quark SoC, add its PIRQ
routing information in the device tree as well.

Signed-off-by: Bin Meng 
---

 arch/x86/dts/galileo.dts | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index f119bf7..a4e1676 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -92,6 +92,18 @@
PCI_BDF(0, 21, 0) INTA PIRQE
PCI_BDF(0, 21, 1) INTB PIRQF
PCI_BDF(0, 21, 2) INTC PIRQG
+   PCI_BDF(0, 23, 0) INTA PIRQA
+   PCI_BDF(0, 23, 1) INTB PIRQB
+
+   /* PCIe root ports downstream interrupts */
+   PCI_BDF(1, 0, 0) INTA PIRQA
+   PCI_BDF(1, 0, 0) INTB PIRQB
+   PCI_BDF(1, 0, 0) INTC PIRQC
+   PCI_BDF(1, 0, 0) INTD PIRQD
+   PCI_BDF(2, 0, 0) INTA PIRQB
+   PCI_BDF(2, 0, 0) INTB PIRQC
+   PCI_BDF(2, 0, 0) INTC PIRQD
+   PCI_BDF(2, 0, 0) INTD PIRQA
>;
};
};
-- 
1.8.2.1

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Re: [U-Boot] [PATCH 3/4] spi: cadence_qspi: Ensure check for max frequency in place

[Jagan Teki]

On 8 September 2015 at 06:48, Chin Liang See  wrote:
> Ensure the intended SCLK frequency not exceeding the maximum
> frequency. If that happen, SCLK will set to maximum frequency.
>
> Signed-off-by: Chin Liang See 
> Cc: Dinh Nguyen 
> Cc: Dinh Nguyen 
> Cc: Marek Vasut 
> Cc: Stefan Roese 
> Cc: Vikas Manocha 
> Cc: Jagannadh Teki 
> Cc: Pavel Machek 
> ---
>  drivers/spi/cadence_qspi.c |5 +
>  1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index 8c0f7dd..f430b5d 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -127,6 +127,11 @@ static int cadence_spi_set_speed(struct udevice *bus, 
> uint hz)
> struct cadence_spi_priv *priv = dev_get_priv(bus);
> int err;
>
> +   if (hz > plat->max_hz) {
> +   hz = plat->max_hz;
> +   puts("SF: Default to maximum supported SCLK frequency\n");

This print mayn't require just assign plat->max_hz enough.

Reviewed-by: Jagan Teki 

> +   }
> +
> /* Disable QSPI */
> cadence_qspi_apb_controller_disable(priv->regbase);

thanks!
-- 
Jagan | openedev.
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Re: [U-Boot] [PATCH 1/4] spi: cadence_qspi: Ensure spi_calibration is run when sclk change

[Jagan Teki]

On 8 September 2015 at 16:38, Marek Vasut  wrote:
> On Tuesday, September 08, 2015 at 03:17:49 AM, Chin Liang See wrote:
>> Ensuring spi_calibration is run when there is a change of sclk
>> frequency. This will ensure the qspi flash access works for high
>> sclk frequency
>>
>> Signed-off-by: Chin Liang See 
>> Cc: Dinh Nguyen 
>> Cc: Dinh Nguyen 
>> Cc: Marek Vasut 
>> Cc: Stefan Roese 
>> Cc: Vikas Manocha 
>> Cc: Jagannadh Teki 
>> Cc: Pavel Machek 
>
> Acked-by: Marek Vasut 
>
> Jagan, please apply for -next or I'll pick it up. Which do you prefer ?

You can pick, no issues. once 2/4, 3/4 ready.

>
> [...]
>
>> diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
>> index 98e57aa..2912e36 100644
>> --- a/drivers/spi/cadence_qspi.h
>> +++ b/drivers/spi/cadence_qspi.h
>> @@ -38,6 +38,7 @@ struct cadence_spi_priv {
>>   int qspi_is_init;
>>   unsigned intqspi_calibrated_hz;
>>   unsigned intqspi_calibrated_cs;
>
> Idea for future patch: we should get rid of these qspi_ prefixes, they are
> really useless.
>
>> + unsigned intprevious_hz;
>>  };
>>
>>  /* Functions call declaration */
>

thanks!
-- 
Jagan | openedev.
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[U-Boot] [PATCH v5 3/3] at91, taurus, smartweb: add dfu support

[Heiko Schocher]

[root@pollux dfu-util]# ./src/dfu-util -l
dfu-util 0.8

Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
Copyright 2010-2014 Tormod Volden and Stefan Schmidt
This program is Free Software and has ABSOLUTELY NO WARRANTY
Please report bugs to dfu-u...@lists.gnumonks.org

Found DFU: [0908:02d2] ver=0212, devnum=119, cfg=1, intf=0, alt=0, 
name="Linux", serial="UNKNOWN"
[root@pollux dfu-util]#

Signed-off-by: Heiko Schocher 
---

Changes in v5:
- rebase with current mainline
  commit efde6a579fe: "Prepare v2015.10-rc3"

Changes in v4:
- rebase after taurus board changes

Changes in v3: None
Changes in v2:
- rebase to bd48c0617b5c7212e5bf22169e716da878842da4
- fix changes introduced through commit:
  01acd6abbdd5: usb: USB download gadget and functions config options coherent 
naming
- add comments from Lukasz Majewski 
- use SZ_X defines

 board/siemens/smartweb/smartweb.c | 29 +
 board/siemens/taurus/taurus.c | 27 
 include/configs/smartweb.h| 53 +--
 include/configs/taurus.h  | 30 --
 4 files changed, 124 insertions(+), 15 deletions(-)

diff --git a/board/siemens/smartweb/smartweb.c 
b/board/siemens/smartweb/smartweb.c
index cf8a7f5..2d42488 100644
--- a/board/siemens/smartweb/smartweb.c
+++ b/board/siemens/smartweb/smartweb.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #ifdef CONFIG_MACB
@@ -108,6 +109,29 @@ static void smartweb_macb_hw_init(void)
 }
 #endif /* CONFIG_MACB */
 
+#ifdef CONFIG_USB_GADGET_AT91
+#include 
+
+void at91_udp_hw_init(void)
+{
+   at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+
+   /* Enable PLLB */
+   writel(get_pllb_init(), >pllbr);
+   while ((readl(>sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+   ;
+
+   /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
+   at91_periph_clk_enable(ATMEL_ID_UDP);
+
+   writel(AT91SAM926x_PMC_UDP, >scer);
+}
+
+struct at91_udc_data board_udc_data  = {
+   .baseaddr = ATMEL_BASE_UDP0,
+};
+#endif
+
 int board_early_init_f(void)
 {
/* enable this here, as we have SPL without serial support */
@@ -134,6 +158,11 @@ int board_init(void)
at91_set_gpio_output(AT91_PIN_PC10, 0);
at91_set_gpio_output(AT91_PIN_PC11, 1);
 
+#ifdef CONFIG_USB_GADGET_AT91
+   at91_udp_hw_init();
+   at91_udc_probe(_udc_data);
+#endif
+
return 0;
 }
 
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index edeb15b..72c5e60 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -285,6 +285,29 @@ void spi_cs_deactivate(struct spi_slave *slave)
at91_set_gpio_value(TAURUS_SPI_CS_PIN, 1);
 }
 
+#ifdef CONFIG_USB_GADGET_AT91
+#include 
+
+void at91_udp_hw_init(void)
+{
+   at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+
+   /* Enable PLLB */
+   writel(get_pllb_init(), >pllbr);
+   while ((readl(>sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+   ;
+
+   /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
+   at91_periph_clk_enable(ATMEL_ID_UDP);
+
+   writel(AT91SAM926x_PMC_UDP, >scer);
+}
+
+struct at91_udc_data board_udc_data  = {
+   .baseaddr = ATMEL_BASE_UDP0,
+};
+#endif
+
 int board_init(void)
 {
/* adress of boot parameters */
@@ -297,6 +320,10 @@ int board_init(void)
taurus_macb_hw_init();
 #endif
at91_spi0_hw_init(TAURUS_SPI_MASK);
+#ifdef CONFIG_USB_GADGET_AT91
+   at91_udp_hw_init();
+   at91_udc_probe(_udc_data);
+#endif
 
return 0;
 }
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index d696d4b..d189c3f 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -28,6 +28,7 @@
  * In this case SoC is defined in boards.cfg.
  */
 #include 
+#include 
 
 /*
  * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
@@ -64,7 +65,7 @@
  */
 #define CONFIG_NR_DRAM_BANKS   1
 #define CONFIG_SYS_SDRAM_BASE  ATMEL_BASE_CS1
-#define CONFIG_SYS_SDRAM_SIZE  (64 << 20)
+#define CONFIG_SYS_SDRAM_SIZE  (64 * SZ_1M)
 
 /*
  * Perform a SDRAM Memtest from the start of SDRAM
@@ -75,7 +76,7 @@
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN \
-   ROUND(3 * CONFIG_ENV_SIZE + (128 << 10), 0x1000)
+   ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
 
 /* NAND flash settings */
 #define CONFIG_NAND_ATMEL
@@ -140,15 +141,42 @@
 
 #if !defined(CONFIG_SPL_BUILD)
 /* USB configuration */
+#define CONFIG_CMD_USB
 #define CONFIG_USB_ATMEL
 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 #define CONFIG_USB_OHCI_NEW
-#define CONFIG_USB_STORAGE
-#define CONFIG_DOS_PARTITION
 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 #define CONFIG_SYS_USB_OHCI_REGS_BASE  ATMEL_UHP_BASE
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME  "at91sam9260"
 #define 

[U-Boot] DM: uclass for timer

[Thomas Chou]

Hi Simon,

Shall we have a timer class in driver model?

I am trying to get the base address and clock rate of timer from device 
tree, and use them for timer_init() in common/board_f.c and lib/time.c .


As almost every board needs a timer, I wonder if it makes sense to use 
driver model? Or shall I use fdtdec to do the binding?


timer_init() sits after initf_dm() in common/board_f.c will this work?

Best regards,
Thomas Chou
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Re: [U-Boot] [PATCH 07/10] ARM: tegra: fix malloc region sizing

[Stephen Warren]

On 09/08/2015 09:53 AM, Tom Warren wrote:
> Stephen,
> 
> Stephen Warren wrote at Friday, September 04, 2015 9:04 PM:
>> From: Stephen Warren 
>>
>> Commit 52a7c98a1772 "tegra-common: increase malloc pool len by dfu mmc file
>> buffer size" updated the definition of CONFIG_SYS_MALLOC_LEN for Tegra to
>> take account of the DFU buffer size. However, this change had no effect, 
>> since
>> typical Tegra board config headers don't set the DFU- related defines until 
>> after
>> tegra-common.h is included. Fix this by moving the affected conditional code 
>> to
>> tegra-common-post.h, which is included last. Also move the definition of
>> SYS_NONCACHED_MEMORY since it's a related and adjacent definition.
>>
>> Fix the condition to test for the DFU feature, rather than specifically MMC 
>> DFU
>> support, so it applies in all cases.
>>
>> Signed-off-by: Stephen Warren 
>
> Do you want me to take these last four in to u-boot-tegra for the pending PR, 
> or do you expect them to go in another way?

I believe the 4 "ARM: tegra:" patches can go through the Tegra tree
since they're independent from the other patches in the series. Thanks.
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Re: [U-Boot] [PATCH 01/10] usb: gadget: don't leak configs when unbinding

[Stephen Warren]

On 09/08/2015 05:00 AM, Lukasz Majewski wrote:
> Hi Stephen,
> 
>> From: Stephen Warren 
>>
>> By the time g_dnl_unbind() is run, cdev->config has been set to NULL,
>> so the free() there does nothing, and the config struct is leaked.
>> Equally, struct usb_gadget contains a linked list of config structs,
>> so the code should iterate over them all and free each one, rather
>> than freeing one particular config struct.
>>
>> composite_unbind() already iterates over the list of config structs,
>> and unlinks each from the linked list. Fix this loop to free() each
>> struct as it's unlinked and otherwise forgotten.
...
> 
> Acked-by: Lukasz Majewski 
> 
> Tested-by: Lukasz Majewski 
> Test HW: Odroid XU3 - Exynos5433.

Thanks for all the tests/acks.

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Re: [U-Boot] [PATCH 07/10] ARM: tegra: fix malloc region sizing

[Tom Rini]

On Tue, Sep 08, 2015 at 02:52:06PM -0700, Stephen Warren wrote:
> On 09/08/2015 02:45 PM, Stephen Warren wrote:
> > On 09/08/2015 09:53 AM, Tom Warren wrote:
> >> Stephen,
> >>
> >> Stephen Warren wrote at Friday, September 04, 2015 9:04 PM:
> >>> From: Stephen Warren 
> >>>
> >>> Commit 52a7c98a1772 "tegra-common: increase malloc pool len by dfu mmc 
> >>> file
> >>> buffer size" updated the definition of CONFIG_SYS_MALLOC_LEN for Tegra to
> >>> take account of the DFU buffer size. However, this change had no effect, 
> >>> since
> >>> typical Tegra board config headers don't set the DFU- related defines 
> >>> until after
> >>> tegra-common.h is included. Fix this by moving the affected conditional 
> >>> code to
> >>> tegra-common-post.h, which is included last. Also move the definition of
> >>> SYS_NONCACHED_MEMORY since it's a related and adjacent definition.
> >>>
> >>> Fix the condition to test for the DFU feature, rather than specifically 
> >>> MMC DFU
> >>> support, so it applies in all cases.
> >>>
> >>> Signed-off-by: Stephen Warren 
> >>
> >> Do you want me to take these last four in to u-boot-tegra for the pending 
> >> PR, or do you expect them to go in another way?
> > 
> > I believe the 4 "ARM: tegra:" patches can go through the Tegra tree
> > since they're independent from the other patches in the series. Thanks.
> 
> I note that Lukasz has ack'd all the other patches, so perhaps you can
> just take the whole series through the Tegra tree? At least the DFU
> patches since he's maintainer there. Perhaps TomR can ack the ext4
> patches since they don't seem to have a maintainer.

I think I snagged them all in patchwork for myself.  Do the Tegra ones
depend on anything else?

-- 
Tom


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Re: [U-Boot] [PATCH 07/10] ARM: tegra: fix malloc region sizing

[Stephen Warren]

On 09/08/2015 02:45 PM, Stephen Warren wrote:
> On 09/08/2015 09:53 AM, Tom Warren wrote:
>> Stephen,
>>
>> Stephen Warren wrote at Friday, September 04, 2015 9:04 PM:
>>> From: Stephen Warren 
>>>
>>> Commit 52a7c98a1772 "tegra-common: increase malloc pool len by dfu mmc file
>>> buffer size" updated the definition of CONFIG_SYS_MALLOC_LEN for Tegra to
>>> take account of the DFU buffer size. However, this change had no effect, 
>>> since
>>> typical Tegra board config headers don't set the DFU- related defines until 
>>> after
>>> tegra-common.h is included. Fix this by moving the affected conditional 
>>> code to
>>> tegra-common-post.h, which is included last. Also move the definition of
>>> SYS_NONCACHED_MEMORY since it's a related and adjacent definition.
>>>
>>> Fix the condition to test for the DFU feature, rather than specifically MMC 
>>> DFU
>>> support, so it applies in all cases.
>>>
>>> Signed-off-by: Stephen Warren 
>>
>> Do you want me to take these last four in to u-boot-tegra for the pending 
>> PR, or do you expect them to go in another way?
> 
> I believe the 4 "ARM: tegra:" patches can go through the Tegra tree
> since they're independent from the other patches in the series. Thanks.

I note that Lukasz has ack'd all the other patches, so perhaps you can
just take the whole series through the Tegra tree? At least the DFU
patches since he's maintainer there. Perhaps TomR can ack the ext4
patches since they don't seem to have a maintainer.
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Re: [U-Boot] [PATCH 03/10] ext4: free allocations by parse_path()

[Lukasz Majewski]

Hi Stephen,

> From: Stephen Warren 
> 
> parse_path() malloc()s the entries in the array it's passed. Those
> allocations must be free()d by the caller,
> ext4fs_get_parent_inode_num(). Add code to do this.
> 
> For this to work, all the array entries must be dynamically allocated,
> rather than a mix of dynamic and static allocations. Fix parse_path()
> not to over-write arr[0] with a pointer to statically allocated data.
> 
> Signed-off-by: Stephen Warren 
> ---
>  fs/ext4/ext4_common.c | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
> index cab5465b9d4f..b09f23aa5b83 100644
> --- a/fs/ext4/ext4_common.c
> +++ b/fs/ext4/ext4_common.c
> @@ -614,8 +614,7 @@ static int parse_path(char **arr, char *dirname)
>   arr[i] = zalloc(strlen("/") + 1);
>   if (!arr[i])
>   return -ENOMEM;
> -
> - arr[i++] = "/";
> + memcpy(arr[i++], "/", strlen("/"));
>  
>   /* add each path entry after root */
>   while (token != NULL) {
> @@ -745,6 +744,11 @@ end:
>  fail:
>   free(depth_dirname);
>   free(parse_dirname);
> + for (i = 0; i < depth; i++) {
> + if (!ptr[i])
> + break;
> + free(ptr[i]);
> + }
>   free(ptr);
>   free(parent_inode);
>   free(first_inode);

Acked-by: Lukasz Majewski 
Tested-by: Lukasz Majewski 

Test HW: Odroid XU3 - Exynos5433
[DFU tests]

-- 
Best regards,

Lukasz Majewski

Samsung R Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH v2 09/11] net: designware: Add support to PCI designware devices

[Simon Glass]

Hi Joe,

On 4 September 2015 at 23:57, Bin Meng  wrote:
> Hi Joe,
>
> On Fri, Sep 4, 2015 at 11:29 PM, Joe Hershberger
>  wrote:
>> Hi Bin,
>>
>> On Wed, Sep 2, 2015 at 4:17 AM, Bin Meng  wrote:
>>> The Designware ethernet controller is also seen on PCI bus, e.g.
>>> on Intel Quark SoC. Add this support in the DM version driver.
>>>
>>> Signed-off-by: Bin Meng 
>>
>> Looks good. One question below.
>>
>>> ---
>>>
>>> Changes in v2:
>>> - Change to use device_is_on_pci_bus()
>>>
>>>  drivers/net/designware.c | 39 +++
>>>  1 file changed, 39 insertions(+)
>>>
>>> diff --git a/drivers/net/designware.c b/drivers/net/designware.c
>>> index ae78d21..39a9e6b 100644
>>> --- a/drivers/net/designware.c
>>> +++ b/drivers/net/designware.c
>>> @@ -14,6 +14,7 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>  #include 
>>> @@ -558,6 +559,20 @@ static int designware_eth_write_hwaddr(struct udevice 
>>> *dev)
>>> return _dw_write_hwaddr(priv, pdata->enetaddr);
>>>  }
>>>
>>> +static int designware_eth_bind(struct udevice *dev)
>>> +{
>>> +   static int num_cards;
>>> +   char name[20];
>>> +
>>> +   /* Create a unique device name for PCI type devices */
>>> +   if (device_is_on_pci_bus(dev)) {
>>> +   sprintf(name, "eth_designware#%u", num_cards++);
>>> +   device_set_name(dev, name);
>>> +   }
>>> +
>>> +   return 0;
>>> +}
>>> +
>>>  static int designware_eth_probe(struct udevice *dev)
>>>  {
>>> struct eth_pdata *pdata = dev_get_platdata(dev);
>>> @@ -565,6 +580,22 @@ static int designware_eth_probe(struct udevice *dev)
>>> u32 iobase = pdata->iobase;
>>> int ret;
>>>
>>> +   /*
>>> +* If we are on PCI bus, either directly attached to a PCI root 
>>> port,
>>> +* or via a PCI bridge, fill in platdata before we probe the 
>>> hardware.
>>> +*/
>>> +   if (device_is_on_pci_bus(dev)) {
>>> +   pci_dev_t bdf;
>>> +
>>> +   bdf = pci_get_bdf(dev);
>>> +   pci_read_config_dword(bdf, PCI_BASE_ADDRESS_0, );
>>> +   iobase &= PCI_BASE_ADDRESS_MEM_MASK;
>>> +   iobase = pci_mem_to_phys(bdf, iobase);
>>> +
>>> +   pdata->iobase = iobase;
>>> +   pdata->phy_interface = PHY_INTERFACE_MODE_RMII;
>>
>> Is this just assumed for all PCI devices? Seems like it could vary,
>> but I don't know the specifics of all the implementations this is
>> expected to support. Should it be part of a quirk based on PID or
>> something?
>
> I think it could vary, but given so far the driver only supports Intel
> Quark PCI variant, so I did not put a test logic against PCI
> vendor/device ID here. When in the future we support another PCI
> variant, we can add such logic.
>

Does this sound OK to you? I'd like to apply this series to u-boot-x86
but want to make sure you are happy with it.

>>
>>> +   }
>>> +
>>> debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
>>> priv->mac_regs_p = (struct eth_mac_regs *)iobase;
>>> priv->dma_regs_p = (struct eth_dma_regs *)(iobase + 
>>> DW_DMA_BASE_OFFSET);
>>> @@ -617,10 +648,18 @@ U_BOOT_DRIVER(eth_designware) = {
>>> .id = UCLASS_ETH,
>>> .of_match = designware_eth_ids,
>>> .ofdata_to_platdata = designware_eth_ofdata_to_platdata,
>>> +   .bind   = designware_eth_bind,
>>> .probe  = designware_eth_probe,
>>> .ops= _eth_ops,
>>> .priv_auto_alloc_size = sizeof(struct dw_eth_dev),
>>> .platdata_auto_alloc_size = sizeof(struct eth_pdata),
>>> .flags = DM_FLAG_ALLOC_PRIV_DMA,
>>>  };
>>> +
>>> +static struct pci_device_id supported[] = {
>>> +   { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_EMAC) },
>>> +   { }
>>> +};
>>> +
>>> +U_BOOT_PCI_DEVICE(eth_designware, supported);
>>>  #endif
>>> --
>
> Regards,
> Bin


Regards,
Simon
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Re: [U-Boot] [PATCH 10/13] sunxi: Make the fastboot buffer larger

[Rob Herring]

On Tue, Sep 1, 2015 at 2:14 AM, Maxime Ripard
 wrote:
> On Mon, Aug 31, 2015 at 02:17:50PM -0500, Rob Herring wrote:
>> On Mon, Aug 31, 2015 at 10:01 AM, Hans de Goede  wrote:
>> > Hi,
>> >
>> > On 31-08-15 16:46, Maxime Ripard wrote:
>> >>
>> >> When using fastboot and flashing a larger image such as the main partition
>> >> of a system, the current 32MB limit for the buffer is quite small.
>> >>
>> >> Increase it to something that looks decent for such a use case.
>> >>
>> >> Signed-off-by: Maxime Ripard 
>> >> ---
>> >>   include/configs/sunxi-common.h | 2 +-
>> >>   1 file changed, 1 insertion(+), 1 deletion(-)
>> >>
>> >> diff --git a/include/configs/sunxi-common.h
>> >> b/include/configs/sunxi-common.h
>> >> index 1abf73c31179..710521c617f5 100644
>> >> --- a/include/configs/sunxi-common.h
>> >> +++ b/include/configs/sunxi-common.h
>> >> @@ -363,7 +363,7 @@ extern int soft_i2c_gpio_scl;
>> >>   #ifdef CONFIG_USB_FUNCTION_FASTBOOT
>> >>   #define CONFIG_CMD_FASTBOOT
>> >>   #define CONFIG_FASTBOOT_BUF_ADDR  CONFIG_SYS_LOAD_ADDR
>> >> -#define CONFIG_FASTBOOT_BUF_SIZE   0x200
>> >> +#define CONFIG_FASTBOOT_BUF_SIZE   (256 << 20)
>> >
>> >
>> > Hmm, where / how does this get allocated? On some boards we only
>> > have 256M RAM, so this is not going to fit ... also if this comes
>> > out of the heap, the current heap is only 4M and the wip sunxi
>> > nand patches boost it to 64 (I still need to verify this works on
>> > a 256M board, this may need a tweak to bootm_size to make sure
>> > the bootm code does not try to put the kernel where it conflicts
>> > with the heap ...).
>>
>> I don't think this needs to be so big with current fastboot tool. It
>> will break up the files if needed. However, IIRC this only works for
>> sparse images, so I think this needs to be sized large enough for your
>> biggest bootimage.
>
> Hmm, interesting.
>
> Do you know how it works exactly ? Are we expected to just go on with
> writing data at the offset we previously stopped in such a case? I
> don't think we support that currently.

The hard work is on the client side. The client will retrieve the
maxdownloadsize variable and then split the sparse image into smaller
hunks if needed. So the u-boot side doesn't have to do anything
special if 2 chunks happen to be contiguous.

Rob
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Re: [U-Boot] [PATCH] driver: misc: correct Kconfig entry

[Simon Glass]

Hi Peng,

On 7 September 2015 at 17:56, Peng Fan  wrote:
> Hi,
>
> On Wed, Aug 26, 2015 at 06:19:38AM -0700, Simon Glass wrote:
>>On 26 August 2015 at 00:41, Peng Fan  wrote:
>>> Should use FSL_SEC_MON, not CONFIG_FSL_SEC_MON as Kconfig entry.
>>>
>>> Signed-off-by: Peng Fan 
>>> Cc: Simon Glass 
>>> Cc: Masahiro Yamada 
>>> Cc: Fabio Estevam 
>>> Cc: York Sun 
>>> Cc: Stefan Roese 
>>> Cc: Tom Rini 
>>> ---
>>>  drivers/misc/Kconfig | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>>Acked-by: Simon Glass 
>
> Will this patch be applied? It's about two weeks since this patch sent out 
> for review.

Which maintainer? I can bring it in via u-boot-dm if you like?

Regards,
Simon
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Re: [U-Boot] [PATCH 11/13] sunxi: Add support for android boot image

[Rob Herring]

On Tue, Sep 1, 2015 at 2:08 AM, Ian Campbell  wrote:
> On Mon, 2015-08-31 at 16:46 +0200, Maxime Ripard wrote:
>> When using the fastboot boot command, the image sent to U-Boot will be an
>> Android boot image. If the support is missing, that won't obviously work,
>> so we need it in our configuration.
>
> Dumb question: Is it possible to boot anything _other_ than an android
> boot image via fastboot?

Yes, fastboot just writes either raw block data or sparse images to
partitions. While the client tool can create the boot image for you,
that is purely a client side feature. What you can boot is determined
by your boot scripts. You can also boot an Android boot image with
bootm and without any fastboot support.

Rob
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Re: [U-Boot] [PATCH v5 3/3] at91, taurus, smartweb: add dfu support

[Lukasz Majewski]

Hi Heiko,

> [root@pollux dfu-util]# ./src/dfu-util -l
> dfu-util 0.8
> 
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2014 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to dfu-u...@lists.gnumonks.org
> 
> Found DFU: [0908:02d2] ver=0212, devnum=119, cfg=1, intf=0, alt=0,
> name="Linux", serial="UNKNOWN" [root@pollux dfu-util]#
> 
> Signed-off-by: Heiko Schocher 
> ---
> 
> Changes in v5:
> - rebase with current mainline
>   commit efde6a579fe: "Prepare v2015.10-rc3"
> 
> Changes in v4:
> - rebase after taurus board changes
> 
> Changes in v3: None
> Changes in v2:
> - rebase to bd48c0617b5c7212e5bf22169e716da878842da4
> - fix changes introduced through commit:
>   01acd6abbdd5: usb: USB download gadget and functions config options
> coherent naming
> - add comments from Lukasz Majewski 
> - use SZ_X defines
> 
>  board/siemens/smartweb/smartweb.c | 29 +
>  board/siemens/taurus/taurus.c | 27 
>  include/configs/smartweb.h| 53
> +--
> include/configs/taurus.h  | 30 -- 4 files
> changed, 124 insertions(+), 15 deletions(-)
> 
> diff --git a/board/siemens/smartweb/smartweb.c
> b/board/siemens/smartweb/smartweb.c index cf8a7f5..2d42488 100644
> --- a/board/siemens/smartweb/smartweb.c
> +++ b/board/siemens/smartweb/smartweb.c
> @@ -25,6 +25,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #ifdef CONFIG_MACB
> @@ -108,6 +109,29 @@ static void smartweb_macb_hw_init(void)
>  }
>  #endif /* CONFIG_MACB */
>  
> +#ifdef CONFIG_USB_GADGET_AT91
> +#include 
> +
> +void at91_udp_hw_init(void)
> +{
> + at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> +
> + /* Enable PLLB */
> + writel(get_pllb_init(), >pllbr);
> + while ((readl(>sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
> + ;
> +
> + /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
> + at91_periph_clk_enable(ATMEL_ID_UDP);
> +
> + writel(AT91SAM926x_PMC_UDP, >scer);
> +}
> +
> +struct at91_udc_data board_udc_data  = {
> + .baseaddr = ATMEL_BASE_UDP0,
> +};
> +#endif
> +
>  int board_early_init_f(void)
>  {
>   /* enable this here, as we have SPL without serial support */
> @@ -134,6 +158,11 @@ int board_init(void)
>   at91_set_gpio_output(AT91_PIN_PC10, 0);
>   at91_set_gpio_output(AT91_PIN_PC11, 1);
>  
> +#ifdef CONFIG_USB_GADGET_AT91
> + at91_udp_hw_init();
> + at91_udc_probe(_udc_data);
> +#endif
> +
>   return 0;
>  }
>  
> diff --git a/board/siemens/taurus/taurus.c
> b/board/siemens/taurus/taurus.c index edeb15b..72c5e60 100644
> --- a/board/siemens/taurus/taurus.c
> +++ b/board/siemens/taurus/taurus.c
> @@ -285,6 +285,29 @@ void spi_cs_deactivate(struct spi_slave *slave)
>   at91_set_gpio_value(TAURUS_SPI_CS_PIN, 1);
>  }
>  
> +#ifdef CONFIG_USB_GADGET_AT91
> +#include 
> +
> +void at91_udp_hw_init(void)
> +{
> + at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> +
> + /* Enable PLLB */
> + writel(get_pllb_init(), >pllbr);
> + while ((readl(>sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
> + ;
> +
> + /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
> + at91_periph_clk_enable(ATMEL_ID_UDP);
> +
> + writel(AT91SAM926x_PMC_UDP, >scer);
> +}
> +
> +struct at91_udc_data board_udc_data  = {
> + .baseaddr = ATMEL_BASE_UDP0,
> +};
> +#endif
> +
>  int board_init(void)
>  {
>   /* adress of boot parameters */
> @@ -297,6 +320,10 @@ int board_init(void)
>   taurus_macb_hw_init();
>  #endif
>   at91_spi0_hw_init(TAURUS_SPI_MASK);
> +#ifdef CONFIG_USB_GADGET_AT91
> + at91_udp_hw_init();
> + at91_udc_probe(_udc_data);
> +#endif
>  
>   return 0;
>  }
> diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
> index d696d4b..d189c3f 100644
> --- a/include/configs/smartweb.h
> +++ b/include/configs/smartweb.h
> @@ -28,6 +28,7 @@
>   * In this case SoC is defined in boards.cfg.
>   */
>  #include 
> +#include 
>  
>  /*
>   * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the
> initial boot @@ -64,7 +65,7 @@
>   */
>  #define CONFIG_NR_DRAM_BANKS 1
>  #define CONFIG_SYS_SDRAM_BASEATMEL_BASE_CS1
> -#define CONFIG_SYS_SDRAM_SIZE(64 << 20)
> +#define CONFIG_SYS_SDRAM_SIZE(64 * SZ_1M)
>  
>  /*
>   * Perform a SDRAM Memtest from the start of SDRAM
> @@ -75,7 +76,7 @@
>  
>  /* Size of malloc() pool */
>  #define CONFIG_SYS_MALLOC_LEN \
> - ROUND(3 * CONFIG_ENV_SIZE + (128 << 10), 0x1000)
> + ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
>  
>  /* NAND flash settings */
>  #define CONFIG_NAND_ATMEL
> @@ -140,15 +141,42 @@
>  
>  #if !defined(CONFIG_SPL_BUILD)
>  /* USB configuration */
> +#define CONFIG_CMD_USB
>  #define CONFIG_USB_ATMEL
>  

Re: [U-Boot] [PATCH v5 2/3] pinctrl: add pin control uclass support

[Linus Walleij]

On Thu, Aug 27, 2015 at 5:44 AM, Masahiro Yamada
 wrote:

> This creates a new framework for handling of pin control devices,
> i.e. devices that control different aspects of package pins.

Hey cool!

For things like this:

> +/**
> + * struct pinctrl_ops - pin control operations, to be implemented by
> + * pin controller drivers.
> + *
> + * The @set_state is the only mandatory operation.  You can implement your
> + * pinctrl driver with its own @set_state.  In this case, the other callbacks
> + * are not required.  Otherwise, generic pinctrl framework is also available;
> + * use pinctrl_generic_set_state for @set_state, and implement other 
> operations
> + * depending on your necessity.
> + *
> + * @get_pins_count: return number of selectable named pins available
> + * in this driver.  (necessary to parse "pins" property in DTS)
> + * @get_pin_name: return the pin name of the pin selector,
> + * called by the core to figure out which pin it shall do
> + * operations to.  (necessary to parse "pins" property in DTS)
> + * @get_groups_count: return number of selectable named groups available
> + * in this driver.  (necessary to parse "groups" property in DTS)
> + * @get_group_name: return the group name of the group selector,
> + * called by the core to figure out which pin group it shall do
> + * operations to.  (necessary to parse "groups" property in DTS)
> + * @get_functions_count: return number of selectable named functions 
> available
> + * in this driver.  (necessary for pin-muxing)
> + * @get_function_name: return the function name of the muxing selector,
> + * called by the core to figure out which mux setting it shall map a
> + * certain device to.  (necessary for pin-muxing)
> + * @pinmux_set: enable a certain muxing function with a certain pin.
> + * The @func_selector selects a certain function whereas @pin_selector
> + * selects a certain pin to be used. On simple controllers one of them
> + * may be ignored.  (necessary for pin-muxing against a single pin)
> + * @pinmux_group_set: enable a certain muxing function with a certain pin
> + * group.  The @func_selector selects a certain function whereas
> + * @group_selector selects a certain set of pins to be used. On simple
> + * controllers one of them may be ignored.
> + * (necessary for pin-muxing against a pin group)
> + * @pinconf_num_params: number of driver-specific parameters to be parsed
> + * from device trees  (necessary for pin-configuration)
> + * @pinconf_params: list of driver_specific parameters to be parsed from
> + * device trees  (necessary for pin-configuration)
> + * @pinconf_set: configure an individual pin with a given parameter.
> + * (necessary for pin-configuration against a single pin)
> + * @pinconf_group_set: configure all pins in a group with a given parameter.
> + * (necessary for pin-configuration against a pin group)
> + * @set_state: do pinctrl operations specified by @config, a pseudo device
> + * pointing a config node. (necessary for pinctrl_full)
> + * @set_state_simple: do needed pinctrl operations for a peripherl @periph.
> + * (necessary for pinctrl_simple)
> + */
> +struct pinctrl_ops {
> +   int (*get_pins_count)(struct udevice *dev);
> +   const char *(*get_pin_name)(struct udevice *dev, unsigned selector);
> +   int (*get_groups_count)(struct udevice *dev);
> +   const char *(*get_group_name)(struct udevice *dev, unsigned selector);
> +   int (*get_functions_count)(struct udevice *dev);
> +   const char *(*get_function_name)(struct udevice *dev,
> +unsigned selector);
> +   int (*pinmux_set)(struct udevice *dev, unsigned pin_selector,
> + unsigned func_selector);
> +   int (*pinmux_group_set)(struct udevice *dev, unsigned group_selector,
> +   unsigned func_selector);
> +   unsigned int pinconf_num_params;
> +   const struct pinconf_param *pinconf_params;
> +   int (*pinconf_set)(struct udevice *dev, unsigned pin_selector,
> +  unsigned param, unsigned argument);
> +   int (*pinconf_group_set)(struct udevice *dev, unsigned group_selector,
> +unsigned param, unsigned argument);
> +   int (*set_state)(struct udevice *dev, struct udevice *config);
> +   int (*set_state_simple)(struct udevice *dev, struct udevice *periph);
> +};
> +
> +#define pinctrl_get_ops(dev)   ((struct pinctrl_ops *)(dev)->driver->ops)
> +
> +/**
> + * Generic pin configuration paramters
> + *
> + * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
> + * transition from say pull-up to pull-down implies that you disable
> + * pull-up in the process, this setting disables all biasing.
> + * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
> + * mode, also know as 

Re: [U-Boot] [PATCH 02/10] ext4: avoid calling ext4fs_mount() twice, which leaks

[Lukasz Majewski]

Hi Stephen,

> From: Stephen Warren 
> 
> ext4_write_file() is only called from the "fs" layer, which calls both
> ext4fs_mount() and ext4fs_close() before/after calling
> ext4_write_file(). Fix ext4_write_file() not to call ext4fs_mount()
> again, since the mount operation malloc()s some RAM which is leaked
> when a second mount call over-writes the pointer to that data, if no
> intervening close call is made.
> 
> Signed-off-by: Stephen Warren 
> ---
>  fs/ext4/ext4_write.c | 9 -
>  1 file changed, 9 deletions(-)
> 
> diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
> index fbc4c4b1cc1a..fa67eb6a56b4 100644
> --- a/fs/ext4/ext4_write.c
> +++ b/fs/ext4/ext4_write.c
> @@ -986,26 +986,17 @@ int ext4_write_file(const char *filename, void
> *buf, loff_t offset, return -1;
>   }
>  
> - /* mount the filesystem */
> - if (!ext4fs_mount(0)) {
> - printf("** Error Bad ext4 partition **\n");
> - goto fail;
> - }
> -
>   ret = ext4fs_write(filename, buf, len);
> -
>   if (ret) {
>   printf("** Error ext4fs_write() **\n");
>   goto fail;
>   }
> - ext4fs_close();
>  
>   *actwrite = len;
>  
>   return 0;
>  
>  fail:
> - ext4fs_close();
>   *actwrite = 0;
>  
>   return -1;


Acked-by: Lukasz Majewski 
Tested-by: Lukasz Majewski 

Test HW: Odroid XU3 - Exynos5433
[DFU tests]


-- 
Best regards,

Lukasz Majewski

Samsung R Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH] smsc95xx: Use zero length packets when RX fifo is empty

[Joe Hershberger]

On Mon, Sep 7, 2015 at 10:12 PM, Stefan Brüns
 wrote:
> Using NAKs on empty RX fifo for bulk in transfers is the right choice
> for a interrupt driven model, but U-Boot uses polling and expects an
> immediate answer if there is no incoming packet. Using ZLP Bulk In Response
> (BIR) mode avoids unexpected timeouts in the host controller driver.
>
> As ZLP mode is reset default, there is no need to set it.
>
> Signed-off-by: Stefan Brüns 

LGTM.

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 1/3] tpm: Move tpm_tis_i2c to tpm_i2c_infineon

[Simon Glass]

Hi Christophe,

On 2 September 2015 at 11:54, Christophe Ricard
 wrote:
> Hi Simon,
>
> Apologies for the delay. I will try to rework this patch end of this week
> and send it back to you middle of next week.

OK thanks, sounds good.

[snip]

Regards,
Simon
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Re: [U-Boot] [PATCH 07/10] ARM: tegra: fix malloc region sizing

[Stephen Warren]

On 09/08/2015 02:56 PM, Tom Rini wrote:
> On Tue, Sep 08, 2015 at 02:52:06PM -0700, Stephen Warren wrote:
>> On 09/08/2015 02:45 PM, Stephen Warren wrote:
>>> On 09/08/2015 09:53 AM, Tom Warren wrote:
 Stephen,
 
 Stephen Warren wrote at Friday, September 04, 2015 9:04 PM:
> From: Stephen Warren 
> 
> Commit 52a7c98a1772 "tegra-common: increase malloc pool len
> by dfu mmc file buffer size" updated the definition of
> CONFIG_SYS_MALLOC_LEN for Tegra to take account of the DFU
> buffer size. However, this change had no effect, since 
> typical Tegra board config headers don't set the DFU-
> related defines until after tegra-common.h is included. Fix
> this by moving the affected conditional code to 
> tegra-common-post.h, which is included last. Also move the
> definition of SYS_NONCACHED_MEMORY since it's a related and
> adjacent definition.
> 
> Fix the condition to test for the DFU feature, rather than
> specifically MMC DFU support, so it applies in all cases.
> 
> Signed-off-by: Stephen Warren 
 
 Do you want me to take these last four in to u-boot-tegra for
 the pending PR, or do you expect them to go in another way?
>>> 
>>> I believe the 4 "ARM: tegra:" patches can go through the Tegra
>>> tree since they're independent from the other patches in the
>>> series. Thanks.
>> 
>> I note that Lukasz has ack'd all the other patches, so perhaps
>> you can just take the whole series through the Tegra tree? At
>> least the DFU patches since he's maintainer there. Perhaps TomR
>> can ack the ext4 patches since they don't seem to have a
>> maintainer.
> 
> I think I snagged them all in patchwork for myself.  Do the Tegra
> ones depend on anything else?

I don't believe the Tegra patches depend on anything to compile or
run; they're just all conceptually related to DFU support on Tegra.
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[U-Boot] [PATCH 08/10] debug_uart: Add an option to announce the debug UART

[Simon Glass]

It is useful to see a message from the debug UART early during boot so that
you know things are working. Add an option to enable this. The message will
be displayed as soon as debug_uart_init() is called.

Signed-off-by: Simon Glass 
---

 drivers/serial/Kconfig | 10 ++
 include/debug_uart.h   |  7 +++
 2 files changed, 17 insertions(+)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 4418a57..fa03d17 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -120,6 +120,16 @@ config DEBUG_UART_BOARD_INIT
  here that is needed to set up the UART ready for use, such as set
  pin multiplexing or enable clocks.
 
+config DEBUG_UART_ANNOUNCE
+   bool "Show a message when the debug UART starts up"
+   depends on DEBUG_UART
+   help
+ Enable this option to show a message when the debug UART is ready
+ for use. You will see a message like " " as soon as
+ U-Boot has the UART ready for use (i.e. your code calls
+ debug_uart_init()). This can be useful just as a check that
+ everything is working.
+
 config ROCKCHIP_SERIAL
bool "Rockchip on-chip UART support"
depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/include/debug_uart.h b/include/debug_uart.h
index a6b7ce8..5d5349b 100644
--- a/include/debug_uart.h
+++ b/include/debug_uart.h
@@ -105,6 +105,12 @@ void printhex4(uint value);
  */
 void printhex8(uint value);
 
+#ifdef CONFIG_DEBUG_UART_ANNOUNCE
+#define _DEBUG_UART_ANNOUNCE   printascii(" ");
+#else
+#define _DEBUG_UART_ANNOUNCE
+#endif
+
 /*
  * Now define some functions - this should be inserted into the serial driver
  */
@@ -151,6 +157,7 @@ void printhex8(uint value);
{ \
board_debug_uart_init(); \
_debug_uart_init(); \
+   _DEBUG_UART_ANNOUNCE \
} \
 
 #endif
-- 
2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH 03/10] dm: pci: Tidy up auto-config error handling

[Simon Glass]

When the auto-configuration process fails for a device (generally due to
lack of memory) we should return the error correctly so that we don't
continue to try memory allocations which will fail.

Adjust the code to check for errors and abort if something goes wrong.

Signed-off-by: Simon Glass 
---

 drivers/pci/pci-uclass.c | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index b25298f..437c81a 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -381,9 +381,13 @@ int pci_auto_config_devices(struct udevice *bus)
 !ret && dev;
 ret = device_find_next_child()) {
unsigned int max_bus;
+   int ret;
 
debug("%s: device %s\n", __func__, dev->name);
-   max_bus = pciauto_config_device(hose, pci_get_bdf(dev));
+   ret = pciauto_config_device(hose, pci_get_bdf(dev));
+   if (ret < 0)
+   return ret;
+   max_bus = ret;
sub_bus = max(sub_bus, max_bus);
}
debug("%s: done\n", __func__);
@@ -757,6 +761,8 @@ static int pci_uclass_post_probe(struct udevice *bus)
 
 #ifdef CONFIG_PCI_PNP
ret = pci_auto_config_devices(bus);
+   if (ret < 0)
+   return ret;
 #endif
 
 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
@@ -773,11 +779,14 @@ static int pci_uclass_post_probe(struct udevice *bus)
 * Note we only call this 1) after U-Boot is relocated, and 2)
 * root bus has finished probing.
 */
-   if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0))
+   if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0)) {
ret = fsp_init_phase_pci();
+   if (ret)
+   return ret;
+   }
 #endif
 
-   return ret < 0 ? ret : 0;
+   return 0;
 }
 
 static int pci_uclass_child_post_bind(struct udevice *dev)
-- 
2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH 10/10] x86: chromebook_link: Enable the debug UART

[Simon Glass]

Add support for the debug UART on link. This is useful for early debugging.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/ivybridge/cpu.c  |  7 +++
 configs/chromebook_link_defconfig | 10 +++---
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index cce5923..0e6512c 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -340,3 +340,10 @@ int print_cpuinfo(void)
 
return 0;
 }
+
+void board_debug_uart_init(void)
+{
+   /* This enables the debug UART */
+   pci_x86_write_config(NULL, PCH_LPC_DEV, LPC_EN, COMA_LPC_EN,
+PCI_SIZE_16);
+}
diff --git a/configs/chromebook_link_defconfig 
b/configs/chromebook_link_defconfig
index b3ae925..7408cb1 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -15,17 +15,21 @@ CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_TPM=y
 CONFIG_CMD_TPM_TEST=y
 CONFIG_OF_CONTROL=y
-CONFIG_DM_PCI=y
-CONFIG_SPI_FLASH=y
 CONFIG_CMD_CROS_EC=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_LPC=y
+CONFIG_SPI_FLASH=y
+CONFIG_DM_PCI=y
+CONFIG_DM_RTC=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0x3f8
+CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DM_TPM=y
 CONFIG_TPM_TIS_LPC=y
 CONFIG_VIDEO_VESA=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
-CONFIG_DM_RTC=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_SYS_VSNPRINTF=y
 CONFIG_TPM=y
-- 
2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH 06/10] debug_uart: Adjust the declaration of debug_uart_init()

[Simon Glass]

We want to be able to add other common code to this function. So change the
driver's version to have an underscore before it, just like
_debug_uart_putc(). Define debug_uart_init() to call this version.

Update all drivers to this new method.

Signed-off-by: Simon Glass 
---

 drivers/serial/ns16550.c| 2 +-
 drivers/serial/serial_efi.c | 2 +-
 drivers/serial/serial_s5p.c | 2 +-
 include/debug_uart.h| 9 +++--
 lib/efi/efi_stub.c  | 2 +-
 5 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 6275a11..6433844 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -257,7 +257,7 @@ int NS16550_tstc(NS16550_t com_port)
(1 << CONFIG_DEBUG_UART_SHIFT), \
CONFIG_DEBUG_UART_SHIFT)
 
-void debug_uart_init(void)
+static inline void _debug_uart_init(void)
 {
struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
int baud_divisor;
diff --git a/drivers/serial/serial_efi.c b/drivers/serial/serial_efi.c
index cf57d89..ee3029b 100644
--- a/drivers/serial/serial_efi.c
+++ b/drivers/serial/serial_efi.c
@@ -107,7 +107,7 @@ static int serial_efi_pending(struct udevice *dev, bool 
input)
  * There is nothing to init here since the EFI console is already running by
  * the time we enter U-Boot.
  */
-void debug_uart_init(void)
+void _debug_uart_init(void)
 {
 }
 
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 3f0b588..e7adf0d 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -207,7 +207,7 @@ U_BOOT_DRIVER(serial_s5p) = {
 
 #include 
 
-void debug_uart_init(void)
+void _debug_uart_init(void)
 {
struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
 
diff --git a/include/debug_uart.h b/include/debug_uart.h
index a75e377..257ba00 100644
--- a/include/debug_uart.h
+++ b/include/debug_uart.h
@@ -38,7 +38,7 @@
  * To enable the debug UART in your serial driver:
  *
  * - #include 
- * - Define debug_uart_init(), trying to avoid using the stack
+ * - Define _debug_uart_init(), trying to avoid using the stack
  * - Define _debug_uart_putc() as static inline (avoiding stack usage)
  * - Immediately afterwards, add DEBUG_UART_FUNCS to define the rest of the
  * functionality (printch(), etc.)
@@ -132,6 +132,11 @@ void printhex8(uint value);
void printhex8(uint value) \
{ \
printhex(value, 8); \
-   }
+   } \
+\
+   void debug_uart_init(void) \
+   { \
+   _debug_uart_init(); \
+   } \
 
 #endif
diff --git a/lib/efi/efi_stub.c b/lib/efi/efi_stub.c
index d4d3e49..e138709 100644
--- a/lib/efi/efi_stub.c
+++ b/lib/efi/efi_stub.c
@@ -59,7 +59,7 @@ struct __packed desctab_info {
  * considering if we start needing more U-Boot functionality. Note that we
  * could then move get_codeseg32() to arch/x86/cpu/cpu.c.
  */
-void debug_uart_init(void)
+void _debug_uart_init(void)
 {
 }
 
-- 
2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH 09/10] x86: Init the debug UART if enabled

[Simon Glass]

If the debug UART is enabled, get it ready for use at the earliest possible
opportunity. This is not actually very early, but until we have a stack it
is difficult to make it work.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/start.S | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index d072825..e6e9cb5 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -134,6 +134,9 @@ car_init_ret:
 * mov   $'a', %eax
 * call  printch
 */
+#ifdef CONFIG_DEBUG_UART
+   call  debug_uart_init
+#endif
 
/* Get address of global_data */
mov %fs:0, %edx
-- 
2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH 01/10] x86: chromebook_link: Expand early malloc() memory

[Simon Glass]

Now that PCI bridges are probed before relocation we need additional memory.
Each PCI bridge takes 240 bytes at present since it uses the same uclass as
the PCI controller. Probably we should split this out so that bridges have
their own uclass.

Expand the memory on link so that it works correctly.

Signed-off-by: Simon Glass 
---

 configs/chromebook_link_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/chromebook_link_defconfig 
b/configs/chromebook_link_defconfig
index 9855736..b3ae925 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -1,4 +1,5 @@
 CONFIG_X86=y
+CONFIG_SYS_MALLOC_F_LEN=0x1800
 CONFIG_VENDOR_GOOGLE=y
 CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
 CONFIG_TARGET_CHROMEBOOK_LINK=y
-- 
2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH 02/10] malloc_simple: Add debug() information

[Simon Glass]

It's useful to get a a trace of memory allocations in early init. Add a
debug() call to provide that. It can be enabled by adding '#define DEBUG'
to the top of the file.

Signed-off-by: Simon Glass 
---

 common/malloc_simple.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/common/malloc_simple.c b/common/malloc_simple.c
index 134e059..e357827 100644
--- a/common/malloc_simple.c
+++ b/common/malloc_simple.c
@@ -19,10 +19,13 @@ void *malloc_simple(size_t bytes)
void *ptr;
 
new_ptr = gd->malloc_ptr + bytes;
+   debug("%s: size=%zx, ptr=%lx, limit=%lx\n", __func__, bytes, new_ptr,
+ gd->malloc_limit);
if (new_ptr > gd->malloc_limit)
return NULL;
ptr = map_sysmem(gd->malloc_base + gd->malloc_ptr, bytes);
gd->malloc_ptr = ALIGN(new_ptr, sizeof(new_ptr));
+
return ptr;
 }
 
@@ -37,6 +40,7 @@ void *memalign_simple(size_t align, size_t bytes)
return NULL;
ptr = map_sysmem(addr, bytes);
gd->malloc_ptr = ALIGN(new_ptr, sizeof(new_ptr));
+
return ptr;
 }
 
-- 
2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH 07/10] debug_uart: Support board-specific UART initialisation

[Simon Glass]

Some boards need to set things up before the debug UART can be used. On
these boards a call to debug_uart_init() is insufficient. When this option
is enabled, the function board_debug_uart_init() will be called when
debug_uart_init() is called. You can put any code here that is needed to
set up the UART ready for use, such as set pin multiplexing or enable
clocks.

Signed-off-by: Simon Glass 
---

 drivers/serial/Kconfig | 11 +++
 include/debug_uart.h   | 14 ++
 2 files changed, 25 insertions(+)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ccb80d2..4418a57 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -109,6 +109,17 @@ config DEBUG_UART_SHIFT
  value. Use this value to specify the shift to use, where 0=byte
  registers, 2=32-bit word registers, etc.
 
+config DEBUG_UART_BOARD_INIT
+   bool "Enable board-specific debug UART init"
+   depends on DEBUG_UART
+   help
+ Some boards need to set things up before the debug UART can be used.
+ On these boards a call to debug_uart_init() is insufficient. When
+ this option is enabled, the function board_debug_uart_init() will
+ be called when debug_uart_init() is called. You can put any code
+ here that is needed to set up the UART ready for use, such as set
+ pin multiplexing or enable clocks.
+
 config ROCKCHIP_SERIAL
bool "Rockchip on-chip UART support"
depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/include/debug_uart.h b/include/debug_uart.h
index 257ba00..a6b7ce8 100644
--- a/include/debug_uart.h
+++ b/include/debug_uart.h
@@ -42,6 +42,11 @@
  * - Define _debug_uart_putc() as static inline (avoiding stack usage)
  * - Immediately afterwards, add DEBUG_UART_FUNCS to define the rest of the
  * functionality (printch(), etc.)
+ *
+ * If your board needs additional init for the UART to work, enable
+ * CONFIG_DEBUG_UART_BOARD_INIT and write a function called
+ * board_debug_uart_init() to perform that init. When debug_uart_init() is
+ * called, the init will happen automatically.
  */
 
 /**
@@ -57,6 +62,14 @@
  */
 void debug_uart_init(void);
 
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void);
+#else
+static inline void board_debug_uart_init(void)
+{
+}
+#endif
+
 /**
  * printch() - Output a character to the debug UART
  *
@@ -136,6 +149,7 @@ void printhex8(uint value);
 \
void debug_uart_init(void) \
{ \
+   board_debug_uart_init(); \
_debug_uart_init(); \
} \
 
-- 
2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH 05/10] dm: pci: Adjust pci_find_and_bind_driver() to return -EPERM

[Simon Glass]

The current code returns 0 even if it failed to find or bind a driver. The
caller then has to check the returned device to see if it is NULL. It is
better to return an error code in this case so that it is clear what
happened.

Adjust the code to return -EPERM, indicating that the device was not bound
because it is not needed for pre-relocation use. Add comments so that the
return value is clear.

Signed-off-by: Simon Glass 
---

 drivers/pci/pci-uclass.c | 31 +++
 1 file changed, 19 insertions(+), 12 deletions(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 7347160..54285ee 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -458,10 +458,17 @@ static bool pci_match_one_id(const struct pci_device_id 
*id,
  * pci_find_and_bind_driver() - Find and bind the right PCI driver
  *
  * This only looks at certain fields in the descriptor.
+ *
+ * @parent:Parent bus
+ * @find_id:   Specification of the driver to find
+ * @bdf:   Bus/device/function addreess - see PCI_BDF()
+ * @devp:  Returns a pointer to the device created
+ * @return 0 if OK, -EPERM if the device is not needed before relocation and
+ *therefore was not created, other -ve value on error
  */
 static int pci_find_and_bind_driver(struct udevice *parent,
-   struct pci_device_id *find_id, pci_dev_t 
bdf,
-   struct udevice **devp)
+   struct pci_device_id *find_id,
+   pci_dev_t bdf, struct udevice **devp)
 {
struct pci_driver_entry *start, *entry;
const char *drv;
@@ -497,7 +504,7 @@ static int pci_find_and_bind_driver(struct udevice *parent,
 */
if (!(gd->flags & GD_FLG_RELOC) &&
!(drv->flags & DM_FLAG_PRE_RELOC))
-   return 0;
+   return -EPERM;
 
/*
 * We could pass the descriptor to the driver as
@@ -525,7 +532,7 @@ static int pci_find_and_bind_driver(struct udevice *parent,
 * limited (ie: using Cache As RAM).
 */
if (!(gd->flags & GD_FLG_RELOC) && !bridge)
-   return 0;
+   return -EPERM;
 
/* Bind a generic driver so that the device can be used */
sprintf(name, "pci_%x:%x.%x", parent->seq, PCI_DEV(bdf),
@@ -613,17 +620,17 @@ int pci_bind_bus_devices(struct udevice *bus)
ret = pci_find_and_bind_driver(bus, _id, bdf,
   );
}
-   if (ret)
+   if (ret == -EPERM)
+   continue;
+   else if (ret)
return ret;
 
/* Update the platform data */
-   if (dev) {
-   pplat = dev_get_parent_platdata(dev);
-   pplat->devfn = PCI_MASK_BUS(bdf);
-   pplat->vendor = vendor;
-   pplat->device = device;
-   pplat->class = class;
-   }
+   pplat = dev_get_parent_platdata(dev);
+   pplat->devfn = PCI_MASK_BUS(bdf);
+   pplat->vendor = vendor;
+   pplat->device = device;
+   pplat->class = class;
}
 
return 0;
-- 
2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH 00/10] x86: Early debug enhancements

[Simon Glass]

This series adds a few more features to the debug UART, making it possible
to use it even when the board needs to perform additional init for the UART
to work. The debug UART is anabled on link.

Some minor PCI tidy-ups are also included.

Link currently does not boot due to lack of early malloc() memory. For now
just increase the size.


Simon Glass (10):
  x86: chromebook_link: Expand early malloc() memory
  malloc_simple: Add debug() information
  dm: pci: Tidy up auto-config error handling
  dm: pci: Correct a few debug() statements
  dm: pci: Adjust pci_find_and_bind_driver() to return -EPERM
  debug_uart: Adjust the declaration of debug_uart_init()
  debug_uart: Support board-specific UART initialisation
  debug_uart: Add an option to announce the debug UART
  x86: Init the debug UART if enabled
  x86: chromebook_link: Enable the debug UART

 arch/x86/cpu/ivybridge/cpu.c  |  7 ++
 arch/x86/cpu/start.S  |  3 +++
 common/malloc_simple.c|  4 
 configs/chromebook_link_defconfig | 11 ++---
 drivers/pci/pci-uclass.c  | 50 ++-
 drivers/serial/Kconfig| 21 
 drivers/serial/ns16550.c  |  2 +-
 drivers/serial/serial_efi.c   |  2 +-
 drivers/serial/serial_s5p.c   |  2 +-
 include/debug_uart.h  | 30 +--
 lib/efi/efi_stub.c|  2 +-
 11 files changed, 108 insertions(+), 26 deletions(-)

-- 
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[U-Boot] [PATCH 04/10] dm: pci: Correct a few debug() statements

[Simon Glass]

One debug() statement is missing a newline. The other has a repeated word.
Fix these.

Signed-off-by: Simon Glass 
---

 drivers/pci/pci-uclass.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 437c81a..7347160 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -418,7 +418,7 @@ int dm_pci_hose_probe_bus(struct pci_controller *hose, 
pci_dev_t bdf)
 
ret = device_probe(bus);
if (ret) {
-   debug("%s: Cannot probe bus bus %s: %d\n", __func__, bus->name,
+   debug("%s: Cannot probe bus %s: %d\n", __func__, bus->name,
  ret);
return ret;
}
@@ -537,7 +537,7 @@ static int pci_find_and_bind_driver(struct udevice *parent,
 
ret = device_bind_driver(parent, drv, str, devp);
if (ret) {
-   debug("%s: Failed to bind generic driver: %d", __func__, ret);
+   debug("%s: Failed to bind generic driver: %d\n", __func__, ret);
return ret;
}
debug("%s: No match found: bound generic driver instead\n", __func__);
-- 
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Re: [U-Boot] [PATCH v5 3/3] at91, taurus, smartweb: add dfu support

[Lukasz Majewski]

Hi Heiko,

> Hello Lukasz,
> 
> Am 08.09.2015 um 15:45 schrieb Lukasz Majewski:
> > Hi Heiko,
> >
> >> [root@pollux dfu-util]# ./src/dfu-util -l
> >> dfu-util 0.8
> >>
> >> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> >> Copyright 2010-2014 Tormod Volden and Stefan Schmidt
> >> This program is Free Software and has ABSOLUTELY NO WARRANTY
> >> Please report bugs to dfu-u...@lists.gnumonks.org
> >>
> >> Found DFU: [0908:02d2] ver=0212, devnum=119, cfg=1, intf=0, alt=0,
> >> name="Linux", serial="UNKNOWN" [root@pollux dfu-util]#
> >>
> >> Signed-off-by: Heiko Schocher 
> >> ---
> >>
> >> Changes in v5:
> >> - rebase with current mainline
> >>commit efde6a579fe: "Prepare v2015.10-rc3"
> >>
> >> Changes in v4:
> >> - rebase after taurus board changes
> >>
> >> Changes in v3: None
> >> Changes in v2:
> >> - rebase to bd48c0617b5c7212e5bf22169e716da878842da4
> >> - fix changes introduced through commit:
> >>01acd6abbdd5: usb: USB download gadget and functions config
> >> options coherent naming
> >> - add comments from Lukasz Majewski 
> >> - use SZ_X defines
> >>
> >>   board/siemens/smartweb/smartweb.c | 29 +
> >>   board/siemens/taurus/taurus.c | 27 
> >>   include/configs/smartweb.h| 53
> >> +--
> >> include/configs/taurus.h  | 30 -- 4
> >> files changed, 124 insertions(+), 15 deletions(-)
> >>
> [...]
> >> -#define CONFIG_SYS_NAND_U_BOOT_SIZE   0x8
> >> +#define CONFIG_SYS_NAND_U_BOOT_SIZE   SZ_512K
> >>   #define  CONFIG_SYS_NAND_U_BOOT_START
> >> CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST
> >> CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_5_ADDR_CYCLE
> >
> > Heiko, I cannot apply this patch clearly on following branch:
> >
> > u-boot-denx/master
> > SHA1: efde6a579fe3c172d214fb3047b02c827779738a (v2015.10-rc3)
> >
> > Could you look into this problem?
> >
> 
> Ah, yes, there are some small at91 patches from me pending:
> 
>   Patchwork [U-Boot,v3] taurus: board updates
> http://patchwork.ozlabs.org/patch/509605/
> 
>   Patchwork [U-Boot,v3,1/2] at91: corvus: board updates
> http://patchwork.ozlabs.org/patch/509435/
> 
>   Patchwork [U-Boot,v3,2/2] corvus, dfu: add dfu support
> http://patchwork.ozlabs.org/patch/509436/
> 
>   Patchwork [U-Boot,v3] arm, at91: add axm extensions
> http://patchwork.ozlabs.org/patch/509604/
> 
> I forgot this to mention ... sorry.
> 
> Maybe it is the cleaner way, if you ack this patches, and Andreas
> Biessmann can pick them up ?
> 

I was about to ack them :-)

If you feel that it would be better for you if Andreas took those
patches - I don't mind.

Hence,

Acked-by: Lukasz Majewski 


> bye,
> Heiko



-- 
Best regards,

Lukasz Majewski

Samsung R Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 10/13] sunxi: Make the fastboot buffer larger

[Maxime Ripard]

On Tue, Sep 08, 2015 at 08:00:50AM -0500, Rob Herring wrote:
> On Tue, Sep 1, 2015 at 2:14 AM, Maxime Ripard
>  wrote:
> > On Mon, Aug 31, 2015 at 02:17:50PM -0500, Rob Herring wrote:
> >> On Mon, Aug 31, 2015 at 10:01 AM, Hans de Goede  
> >> wrote:
> >> > Hi,
> >> >
> >> > On 31-08-15 16:46, Maxime Ripard wrote:
> >> >>
> >> >> When using fastboot and flashing a larger image such as the main 
> >> >> partition
> >> >> of a system, the current 32MB limit for the buffer is quite small.
> >> >>
> >> >> Increase it to something that looks decent for such a use case.
> >> >>
> >> >> Signed-off-by: Maxime Ripard 
> >> >> ---
> >> >>   include/configs/sunxi-common.h | 2 +-
> >> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >> >>
> >> >> diff --git a/include/configs/sunxi-common.h
> >> >> b/include/configs/sunxi-common.h
> >> >> index 1abf73c31179..710521c617f5 100644
> >> >> --- a/include/configs/sunxi-common.h
> >> >> +++ b/include/configs/sunxi-common.h
> >> >> @@ -363,7 +363,7 @@ extern int soft_i2c_gpio_scl;
> >> >>   #ifdef CONFIG_USB_FUNCTION_FASTBOOT
> >> >>   #define CONFIG_CMD_FASTBOOT
> >> >>   #define CONFIG_FASTBOOT_BUF_ADDR  CONFIG_SYS_LOAD_ADDR
> >> >> -#define CONFIG_FASTBOOT_BUF_SIZE   0x200
> >> >> +#define CONFIG_FASTBOOT_BUF_SIZE   (256 << 20)
> >> >
> >> >
> >> > Hmm, where / how does this get allocated? On some boards we only
> >> > have 256M RAM, so this is not going to fit ... also if this comes
> >> > out of the heap, the current heap is only 4M and the wip sunxi
> >> > nand patches boost it to 64 (I still need to verify this works on
> >> > a 256M board, this may need a tweak to bootm_size to make sure
> >> > the bootm code does not try to put the kernel where it conflicts
> >> > with the heap ...).
> >>
> >> I don't think this needs to be so big with current fastboot tool. It
> >> will break up the files if needed. However, IIRC this only works for
> >> sparse images, so I think this needs to be sized large enough for your
> >> biggest bootimage.
> >
> > Hmm, interesting.
> >
> > Do you know how it works exactly ? Are we expected to just go on with
> > writing data at the offset we previously stopped in such a case? I
> > don't think we support that currently.
> 
> The hard work is on the client side. The client will retrieve the
> maxdownloadsize variable and then split the sparse image into smaller
> hunks if needed. So the u-boot side doesn't have to do anything
> special if 2 chunks happen to be contiguous.

Well, it still has to make sure it keeps the offset of the current
session instead of restarting from the partition base offset, and I'm
not sure I've seen anything like it for now.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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Re: [U-Boot] [PATCH] net: eth: Do sanity test on eth dev before eth_get_ops(dev)->start

[Bin Meng]

Hi Joe,

On Tue, Sep 8, 2015 at 11:32 PM, Joe Hershberger
 wrote:
> Hi Bin,
>
> On Sat, Sep 5, 2015 at 9:38 PM, Bin Meng  wrote:
>> In eth_init(), eth_get_dev() can return NULL. We should do sanity
>> test on eth dev before calling its start function.
>>
>> Signed-off-by: Bin Meng 
>> ---
>>
>>  net/eth.c | 4 
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/net/eth.c b/net/eth.c
>> index 26520d3..6ec3a86 100644
>> --- a/net/eth.c
>> +++ b/net/eth.c
>> @@ -370,6 +370,10 @@ int eth_init(void)
>> eth_try_another(0);
>> /* This will ensure the new "current" attempted to probe */
>> current = eth_get_dev();
>> +   if (!current) {
>> +   printf("No ethernet found.\n");
>> +   break;
>> +   }
>
> I'm not sure I get the point of this. We already have a check above...
>
> current = eth_get_dev();
> if (!current) {
> printf("No ethernet found.\n");
> return -ENODEV;
> }
>

But this does not help. Each time eth_get_dev() is called, current can
be NULL as driver's probe can fail.

>> } while (old_current != current);
>>
>> return ret;
>> --

Regards,
Bin
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Re: [U-Boot] [PATCH 2/2] ARM: tegra114: Clear IDDQ when enabling PLLC

[Tom Warren]

Thierry,

> -Original Message-
> From: Thierry Reding [mailto:thierry.red...@gmail.com]
> Sent: Tuesday, September 08, 2015 2:38 AM
> To: Tom Warren
> Cc: Nicolas Chauvet; u-boot@lists.denx.de
> Subject: [PATCH 2/2] ARM: tegra114: Clear IDDQ when enabling PLLC
> 
> From: Thierry Reding 
> 
> Enabling a PLL while IDDQ is high. The Linux kernel checks for this condition 
> and
> warns about it verbosely, so while this seems to work fine, fix it up 
> according to
> the programming guidelines provided in the Tegra K1 TRM (v02p), Section
> 5.3.8.1 ("PLLC and PLLC4 Startup Sequence"). The Tegra114 TRM doesn't
> contain this information, but the programming of PLLC is the same on Tegra114
> and Tegra124.
Do we need this for T210, too? A quick glance at the TRM shows IDDQ for PLLA, 
M, C, U, P, D.

I'll get these two in for the next PR.

Tom
--
nvpublic
> 
> Signed-off-by: Thierry Reding 
> ---
>  arch/arm/include/asm/arch-tegra114/clock.h | 3 +++
>  arch/arm/mach-tegra/tegra114/clock.c   | 5 +
>  2 files changed, 8 insertions(+)
> 
> diff --git a/arch/arm/include/asm/arch-tegra114/clock.h
> b/arch/arm/include/asm/arch-tegra114/clock.h
> index abbefcd0e456..9bee39778747 100644
> --- a/arch/arm/include/asm/arch-tegra114/clock.h
> +++ b/arch/arm/include/asm/arch-tegra114/clock.h
> @@ -25,4 +25,7 @@
>  #define OSC_FREQ_SHIFT  28
>  #define OSC_FREQ_MASK   (0xF << OSC_FREQ_SHIFT)
> 
> +/* CLK_RST_CONTROLLER_PLLC_MISC_0 */
> +#define PLLC_IDDQ(1 << 26)
> +
>  #endif   /* _TEGRA114_CLOCK_H_ */
> diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-
> tegra/tegra114/clock.c
> index cec843b27df7..e6ef873c8dc4 100644
> --- a/arch/arm/mach-tegra/tegra114/clock.c
> +++ b/arch/arm/mach-tegra/tegra114/clock.c
> @@ -629,6 +629,11 @@ void clock_early_init(void)
> 
>   tegra30_set_up_pllp();
> 
> + /* clear IDDQ before accessing any other PLLC registers */
> + pllinfo = _pll_info_table[CLOCK_ID_CGENERAL];
> + clrbits_le32(>crc_pll[CLOCK_ID_CGENERAL].pll_misc,
> PLLC_IDDQ);
> + udelay(2);
> +
>   /*
>* PLLC output frequency set to 600Mhz
>* PLLD output frequency set to 925Mhz
> --
> 2.5.0

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Re: [U-Boot] [PATCH] net: eth: Do sanity test on eth dev before eth_get_ops(dev)->start

[Joe Hershberger]

Hi Bin,

On Tue, Sep 8, 2015 at 10:44 AM, Bin Meng  wrote:
> Hi Joe,
>
> On Tue, Sep 8, 2015 at 11:32 PM, Joe Hershberger
>  wrote:
>> Hi Bin,
>>
>> On Sat, Sep 5, 2015 at 9:38 PM, Bin Meng  wrote:
>>> In eth_init(), eth_get_dev() can return NULL. We should do sanity
>>> test on eth dev before calling its start function.
>>>
>>> Signed-off-by: Bin Meng 
>>> ---
>>>
>>>  net/eth.c | 4 
>>>  1 file changed, 4 insertions(+)
>>>
>>> diff --git a/net/eth.c b/net/eth.c
>>> index 26520d3..6ec3a86 100644
>>> --- a/net/eth.c
>>> +++ b/net/eth.c
>>> @@ -370,6 +370,10 @@ int eth_init(void)
>>> eth_try_another(0);
>>> /* This will ensure the new "current" attempted to probe */
>>> current = eth_get_dev();
>>> +   if (!current) {
>>> +   printf("No ethernet found.\n");
>>> +   break;
>>> +   }
>>
>> I'm not sure I get the point of this. We already have a check above...
>>
>> current = eth_get_dev();
>> if (!current) {
>> printf("No ethernet found.\n");
>> return -ENODEV;
>> }
>>
>
> But this does not help. Each time eth_get_dev() is called, current can
> be NULL as driver's probe can fail.

If that's the issue you are hitting it seems like you should attempt
to skip the device instead of printing the message. It doesn't make
sense to me to move to the next device and then print that there is no
Ethernet.

Also, this is fundamental to the eth subsystem. You should add a unit
test that fails in your case.

>>> } while (old_current != current);
>>>
>>> return ret;
>>> --
>
> Regards,
> Bin

Thanks,
-Joe
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Re: [U-Boot] [PATCH v5] bitops: introduce BIT() definition

[Tom Warren]

> -Original Message-
> From: Andreas Bießmann [mailto:andreas.de...@googlemail.com]
> Sent: Monday, September 07, 2015 4:44 AM
> To: U-Boot ML
> Cc: Tom Rini; Simon Glass; Tom Warren; Stephen Warren; Lukasz Majewski;
> Scott Wood; Jagan Teki; Michal Simek; Prafulla Wadaskar; Anatolij Gustschin;
> Albert Aribaud; Heiko Schocher; Andreas Bießmann; Stuart Yoder; Andrea
> Scian; Marek Vasut; Hao Zhang; Steve Kipisz; Michal Simek; Lijun Pan; Lokesh
> Vutla; Vitaly Andrianov; Ivan"; James Doublesin; Anton Schubert; Peter 
> Griffin;
> Stefan Roese; J. German Rivera; York Sun; Masahiro Yamada; Bhupesh Sharma;
> Kishon Vijay Abraham I; Muralidharan"; Prabhakar Kushwaha
> Subject: [PATCH v5] bitops: introduce BIT() definition
> 
> From: Heiko Schocher 
> 
> introduce BIT() definition, used in at91_udc gadget driver.
> 
> Signed-off-by: Heiko Schocher  [remove all other occurrences
> of BIT(x) definition]
> Signed-off-by: Andreas Bießmann 
> ---
> Full buildman is running
> 
> Would be nice to get some Acked-by/Reviewed-by since this is a fixup of one
> patch in a series that should go into 2015.10.
> 
Acked-by Tom Warren   for the Tegra bits.
I'll apply this and start converting to BIT() in code I'm currently cleaning 
up. Thanks!
--
nvpublic
> Andreas
> 
> Changes in v5:
>  - remove other definitions of BIT()
> 
> Changes in v3:
>  - new in this version
> 
>  arch/arm/include/asm/arch-am33xx/cpu.h   | 1 -
>  arch/arm/include/asm/arch-hi6220/gpio.h  | 2 --
>  arch/arm/include/asm/arch-omap5/cpu.h| 2 --
>  arch/arm/include/asm/arch-tegra/dc.h | 2 --
>  arch/arm/mach-davinci/cpu.c  | 2 --
>  arch/arm/mach-keystone/include/mach/clock_defs.h | 2 --
>  arch/arm/mach-keystone/include/mach/hardware.h   | 2 --
>  arch/arm/mach-mvebu/include/mach/soc.h   | 2 --
>  arch/arm/mach-zynq/include/mach/gpio.h   | 2 --
>  drivers/ddr/marvell/a38x/ddr3_init.h | 2 --
>  drivers/mtd/nand/jz4740_nand.c   | 1 -
>  drivers/spi/davinci_spi.c| 2 --
>  drivers/spi/ep93xx_spi.c | 2 --
>  drivers/video/anx9804.c  | 2 --
>  include/fsl-mc/fsl_mc.h  | 1 -
>  include/linux/bitops.h   | 2 ++
>  16 files changed, 2 insertions(+), 27 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h
> b/arch/arm/include/asm/arch-am33xx/cpu.h
> index 13a9cad..112ac5e 100644
> --- a/arch/arm/include/asm/arch-am33xx/cpu.h
> +++ b/arch/arm/include/asm/arch-am33xx/cpu.h
> @@ -17,7 +17,6 @@
> 
>  #include 
> 
> -#define BIT(x)   (1 << x)
>  #define CL_BIT(x)(0 << x)
> 
>  /* Timer register bits */
> diff --git a/arch/arm/include/asm/arch-hi6220/gpio.h
> b/arch/arm/include/asm/arch-hi6220/gpio.h
> index 98122a2..4fafaef 100644
> --- a/arch/arm/include/asm/arch-hi6220/gpio.h
> +++ b/arch/arm/include/asm/arch-hi6220/gpio.h
> @@ -11,8 +11,6 @@
>  #define HI6220_GPIO_BASE(bank)   (((bank < 4) ? 0xf8011000 : \
>   0xf702 - 0x4000) + (0x1000 * bank))
> 
> -#define BIT(x)   (1 << (x))
> -
>  #define HI6220_GPIO_PER_BANK 8
>  #define HI6220_GPIO_DIR  0x400
> 
> diff --git a/arch/arm/include/asm/arch-omap5/cpu.h
> b/arch/arm/include/asm/arch-omap5/cpu.h
> index 6109b92..b1513e9 100644
> --- a/arch/arm/include/asm/arch-omap5/cpu.h
> +++ b/arch/arm/include/asm/arch-omap5/cpu.h
> @@ -56,8 +56,6 @@ struct watchdog {
>  #endif /* __ASSEMBLY__ */
>  #endif /* __KERNEL_STRICT_NAMES */
> 
> -#define BIT(x)   (1 << (x))
> -
>  #define WD_UNLOCK1   0x
>  #define WD_UNLOCK2   0x
> 
> diff --git a/arch/arm/include/asm/arch-tegra/dc.h
> b/arch/arm/include/asm/arch-tegra/dc.h
> index 6ffb468..3a87f0b 100644
> --- a/arch/arm/include/asm/arch-tegra/dc.h
> +++ b/arch/arm/include/asm/arch-tegra/dc.h
> @@ -364,8 +364,6 @@ struct dc_ctlr {
>   struct dc_winbuf_reg winbuf;/* WINBUF A/B/C 0x800 ~ 0x80d */
>  };
> 
> -#define BIT(pos) (1U << pos)
> -
>  /* DC_CMD_DISPLAY_COMMAND 0x032 */
>  #define CTRL_MODE_SHIFT  5
>  #define CTRL_MODE_MASK   (0x3 << CTRL_MODE_SHIFT)
> diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c index
> ff61147..74c3d5d 100644
> --- a/arch/arm/mach-davinci/cpu.c
> +++ b/arch/arm/mach-davinci/cpu.c
> @@ -28,8 +28,6 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define PLLC_PLLDIV8 0x170
>  #define PLLC_PLLDIV9 0x174
> 
> -#define BIT(x)   (1 << (x))
> -
>  /* SOC-specific pll info */
>  #ifdef CONFIG_SOC_DM355
>  #define ARM_PLLDIV   PLLC_PLLDIV1
> diff --git a/arch/arm/mach-keystone/include/mach/clock_defs.h
> b/arch/arm/mach-keystone/include/mach/clock_defs.h
> index 8ad371f..f8d61d6 100644
> --- 

Re: [U-Boot] Zynq build failure

[Michal Simek]

On 09/08/2015 11:48 AM, Jagan Teki wrote:
> On 4 September 2015 at 14:22, Jagan Teki  wrote:
>> Hi Michal/Siva,
>>
>> Any fix for this failure?
>>
>>   CC  spl/drivers/mtd/spi/spi_spl_load.o
>> drivers/mtd/spi/spi_spl_load.c: In function 'spi_load_image_os':
>> drivers/mtd/spi/spi_spl_load.c:26:24: error:
>> 'CONFIG_SYS_SPI_KERNEL_OFFS' undeclared (first use in this function)
>> drivers/mtd/spi/spi_spl_load.c:26:24: note: each undeclared identifier
>> is reported only once for each function it appears in
>> drivers/mtd/spi/spi_spl_load.c:38:24: error:
>> 'CONFIG_SYS_SPI_ARGS_OFFS' undeclared (first use in this function)
>> drivers/mtd/spi/spi_spl_load.c:39:10: error:
>> 'CONFIG_SYS_SPI_ARGS_SIZE' undeclared (first use in this function)
>> make[3]: *** [spl/drivers/mtd/spi/spi_spl_load.o] Error 1
> 
> Any help?
> 

It is just MTD map. It means it can be whatever. :-)

Let's say - bitstream first - max 0x110 for 7z100
Then DTB - 0.5MB max
and the rest kernel

#define CONFIG_SYS_SPI_ARGS_OFFS 0x110
#define CONFIG_SYS_SPI_ARGS_SIZE 0x8
#define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS +
CONFIG_SYS_SPI_ARGS_SIZE)

Adding this to zynq-common and we are done.
Do you want me to send the patch for it?

Thanks,
Michal

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Re: [U-Boot] [PATCH 1/5] net: mdio: Add mdio_free() and mdio_unregister() API

[Bin Meng]

Hi Joe,

On Fri, Sep 4, 2015 at 10:53 PM, Bin Meng  wrote:
> Currently there is no API to uninitialize mdio. Add two APIs for this.
>
> Signed-off-by: Bin Meng 
> ---
>
>  common/miiphyutil.c | 19 +++
>  include/miiphy.h|  2 ++
>  2 files changed, 21 insertions(+)
>
> diff --git a/common/miiphyutil.c b/common/miiphyutil.c
> index c88c28a..e499b58 100644
> --- a/common/miiphyutil.c
> +++ b/common/miiphyutil.c
> @@ -152,6 +152,11 @@ struct mii_dev *mdio_alloc(void)
> return bus;
>  }
>
> +void mdio_free(struct mii_dev *bus)
> +{
> +   free(bus);
> +}
> +
>  int mdio_register(struct mii_dev *bus)
>  {
> if (!bus || !bus->name || !bus->read || !bus->write)
> @@ -173,6 +178,20 @@ int mdio_register(struct mii_dev *bus)
> return 0;
>  }
>
> +int mdio_unregister(struct mii_dev *bus)
> +{
> +   if (!bus)
> +   return 0;
> +
> +   /* delete it from the list */
> +   list_del(>link);
> +
> +   if (current_mii == bus)
> +   current_mii = NULL;
> +
> +   return 0;
> +}
> +
>  void mdio_list_devices(void)
>  {
> struct list_head *entry;
> diff --git a/include/miiphy.h b/include/miiphy.h
> index 088797e..af12274 100644
> --- a/include/miiphy.h
> +++ b/include/miiphy.h
> @@ -59,7 +59,9 @@ struct phy_device *mdio_phydev_for_ethname(const char 
> *devname);
>  void miiphy_listdev(void);
>
>  struct mii_dev *mdio_alloc(void);
> +void mdio_free(struct mii_dev *bus);
>  int mdio_register(struct mii_dev *bus);
> +int mdio_unregister(struct mii_dev *bus);
>  void mdio_list_devices(void);
>
>  #ifdef CONFIG_BITBANGMII
> --

Ping?

Regards,
Bin
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Re: [U-Boot] [PATCH] usb: gadget: ci_udc: implement usb_ep_ops dequeue callback

[Stephen Warren]

On 09/03/2015 03:11 PM, Marek Vasut wrote:
> On Tuesday, September 01, 2015 at 09:45:12 PM, Stephen Warren wrote:
>> On 08/30/2015 12:26 AM, Peng Fan wrote:
>>> Hi Stephen,
> 
> Hi,
> 
> sorry for the delayed reply, I had to dig into the code myself.
> 
>>> On Fri, Aug 28, 2015 at 08:05:36AM +0800, Peng Fan wrote:
 Hi Stephen,

 On Thu, Aug 27, 2015 at 10:06:14AM -0600, Stephen Warren wrote:
> On 08/27/2015 05:08 AM, Marek Vasut wrote:
>> On Thursday, August 27, 2015 at 01:00:50 PM, Peng Fan wrote:
>>> Implement endpoint dequeue callback function.
>>>
>>> Without this function, uboot will hang when executing fastboot
>>> comamnd. See following flow:
>>> "fastboot_tx_write_str->fastboot_tx_write->usb_ep_dequeue->ep->ops->d
>>> equeue " without implement ci_udc dequeue function, ep->ops->dequeue
>>> is NULL, then uboot will hang.
>>>
>>> Tested on mx6qsabresd board with fastboot enabled.
>>>
>>> diff --git a/drivers/usb/gadget/ci_udc.c
>>> b/drivers/usb/gadget/ci_udc.c
>>>
>>> +static int ci_ep_dequeue(struct usb_ep *_ep, struct usb_request
>>> *_req)
>>>
>>> +   if (ci_req->req.status == -EINPROGRESS) {
>>> +   ci_req->req.status = -ECONNRESET;
>>> +   if (ci_req->req.complete)
>>> +   ci_req->req.complete(_ep, _req);
>>> +   }
>
> Is there no need to reprogram the HW to abort the transfer?

 I checked linux udc driver drivers/usb/gadget/udc/fsl_qe_udc.c
 qe_ep_dequeue->done->usb_gadget_giveback_request->"req->complete(ep,
 req)" I did not see code to reprogram the HW to abort the transfer.
>>>
>>> Do you have further comments?
>>> I checked other gadget drivers in drivers/usb/gadget/, I did not see
>>> drivers that reprogram the HW to abort the transfer. For now, I do not
>>> think out a scenario to reprogram the HW to abort the transfer
>>
>> Marek, what are the semantics of this function? Is it supposed to simply
>> update SW state to make U-Boot not care about the transaction
> 
> Yes, that's correct.
> 
>> or is it supposed to actually stop the HW performing the transaction on
>> the USB bus?
> 
> No, it's not supposed to kill the transaction in hardware.

OK, the patch seems fine then.

>> If it's the former, then the patch is likely fine. If it's the latter,
>> then I think the function does need actually need to do something to
>> make the HW stop, or we can't implement this particular function.
> 
> Do we need this for the current release or is this for -next ?

I assume that's a question for Peng?

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Re: [U-Boot] [PATCH] Don't wrap to negative after 2G sectors

[Stefan Monnier]

Any chance this can make it into 2015.10?


Stefan


> "Stefan" == Stefan Monnier  writes:

> Signed-off-by: Stefan Monnier 
> ---
>  disk/part_dos.c | 29 +
>  include/ide.h   |  8 
>  2 files changed, 21 insertions(+), 16 deletions(-)

> diff --git a/disk/part_dos.c b/disk/part_dos.c
> index cf1a36e..adde68a 100644
> --- a/disk/part_dos.c
> +++ b/disk/part_dos.c
> @@ -25,7 +25,7 @@
 
>  /* Convert char[4] in little endian format to the host format integer
>   */
> -static inline int le32_to_int(unsigned char *le32)
> +static inline unsigned int le32_to_int(unsigned char *le32)
>  {
>  return ((le32[3] << 24) +
>   (le32[2] << 16) +
> @@ -46,13 +46,14 @@ static inline int is_bootable(dos_partition_t *p)
>   return p->boot_ind == 0x80;
>  }
 
> -static void print_one_part(dos_partition_t *p, int ext_part_sector,
> +static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector,
>  int part_num, unsigned int disksig)
>  {
> - int lba_start = ext_part_sector + le32_to_int (p->start4);
> - int lba_size  = le32_to_int (p->size4);
> + lbaint_t lba_start = ext_part_sector + le32_to_int (p->start4);
> + lbaint_t lba_size  = le32_to_int (p->size4);
 
> - printf("%3d\t%-10d\t%-10d\t%08x-%02x\t%02x%s%s\n",
> + printf("%3d\t%-10" LBAFlength "u\t%-10" LBAFlength
> + "u\t%08x-%02x\t%02x%s%s\n",
>   part_num, lba_start, lba_size, disksig, part_num, p->sys_ind,
>   (is_extended(p->sys_ind) ? " Extd" : ""),
>   (is_bootable(p) ? " Boot" : ""));
> @@ -101,7 +102,8 @@ int test_part_dos (block_dev_desc_t *dev_desc)
>  /*  Print a partition that is relative to its Extended partition table
>   */
>  static void print_partition_extended(block_dev_desc_t *dev_desc,
> -  int ext_part_sector, int relative,
> +  lbaint_t ext_part_sector,
> +  lbaint_t relative,
>int part_num, unsigned int disksig)
>  {
>   ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
> @@ -109,7 +111,7 @@ static void print_partition_extended(block_dev_desc_t 
> *dev_desc,
>   int i;
 
>   if (dev_desc->block_read(dev_desc->dev, ext_part_sector, 1, (ulong *) 
> buffer) != 1) {
> - printf ("** Can't read partition table on %d:%d **\n",
> + printf ("** Can't read partition table on %d:" LBAFU " **\n",
dev_desc-> dev, ext_part_sector);
>   return;
>   }
> @@ -148,7 +150,8 @@ static void print_partition_extended(block_dev_desc_t 
> *dev_desc,
>   pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET);
>   for (i = 0; i < 4; i++, pt++) {
>   if (is_extended (pt->sys_ind)) {
> - int lba_start = le32_to_int (pt->start4) + relative;
> + lbaint_t lba_start
> + = le32_to_int (pt->start4) + relative;
 
>   print_partition_extended(dev_desc, lba_start,
>   ext_part_sector == 0  ? lba_start : relative,
> @@ -162,8 +165,9 @@ static void print_partition_extended(block_dev_desc_t 
> *dev_desc,
 
>  /*  Print a partition that is relative to its Extended partition table
>   */
> -static int get_partition_info_extended (block_dev_desc_t *dev_desc, int 
> ext_part_sector,
> -  int relative, int part_num,
> +static int get_partition_info_extended (block_dev_desc_t *dev_desc,
> +  lbaint_t ext_part_sector,
> +  lbaint_t relative, int part_num,
>int which_part, disk_partition_t *info,
>unsigned int disksig)
>  {
> @@ -173,7 +177,7 @@ static int get_partition_info_extended (block_dev_desc_t 
> *dev_desc, int ext_part
>   int dos_type;
 
>   if (dev_desc->block_read (dev_desc->dev, ext_part_sector, 1, (ulong *) 
> buffer) != 1) {
> - printf ("** Can't read partition table on %d:%d **\n",
> + printf ("** Can't read partition table on %d:" LBAFU " **\n",
dev_desc-> dev, ext_part_sector);
>   return -1;
>   }
> @@ -249,7 +253,8 @@ static int get_partition_info_extended (block_dev_desc_t 
> *dev_desc, int ext_part
>   pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET);
>   for (i = 0; i < 4; i++, pt++) {
>   if (is_extended (pt->sys_ind)) {
> - int lba_start = le32_to_int (pt->start4) + relative;
> + lbaint_t lba_start
> + = le32_to_int (pt->start4) + relative;
 
>   return get_partition_info_extended (dev_desc, lba_start,
>ext_part_sector == 0 ? lba_start : relative,
> diff --git a/include/ide.h 

Re: [U-Boot] [PATCH 1/3] net: phy: Don't create phy device when there is no phy

[Bin Meng]

Hi Joe,

On Fri, Sep 4, 2015 at 7:56 PM, Bin Meng  wrote:
> In get_phy_device_by_mask(), when no phy is found, we should not
> create any phy device.
>
> Signed-off-by: Bin Meng 
> ---
>
>  drivers/net/phy/phy.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
> index 65c731a..0d66e75 100644
> --- a/drivers/net/phy/phy.c
> +++ b/drivers/net/phy/phy.c
> @@ -672,7 +672,8 @@ static struct phy_device *get_phy_device_by_mask(struct 
> mii_dev *bus,
> return phydev;
> }
> printf("Phy %d not found\n", ffs(phy_mask) - 1);
> -   return phy_device_create(bus, ffs(phy_mask) - 1, 0x, 
> interface);
> +
> +   return NULL;
>  }
>
>  /**
> --

Ping?

Regards,
Bin
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Re: [U-Boot] [PATCH 1/2] mx6: remove SYS_SOC from board Kconfig

[Troy Kisky]

On 9/6/2015 11:59 PM, Peng Fan wrote:
> Remove duplicated SYS_SOC Kconfig entry from board Kconfig,
> because we have this entry in arch/arm/cpu/armv7/mx6/Kconfig.
> 
> Signed-off-by: Peng Fan 
> Cc: Stefano Babic 
> Cc: Heiko Schocher 
> Cc: Christian Gmeiner 
> Cc: Stefan Roese 
> Cc: Troy Kisky 
> Cc: Nikita Kiryanov 
> Cc: "Eric Bénard" 
> Cc: Fabio Estevam 
> Cc: Tim Harvey 
> Cc: Marek Vasut 
> Cc: Markus Niebel 
> Cc: Otavio Salvador 
> ---
>  board/aristainetos/Kconfig  | 9 -
>  board/bachmann/ot1200/Kconfig   | 3 ---
>  board/barco/platinum/Kconfig| 6 --
>  board/barco/titanium/Kconfig| 3 ---
>  board/boundary/nitrogen6x/Kconfig   | 3 ---


For nitrogen6x

Acked-by: Troy Kisky 
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[U-Boot] [PATCH] arm: mmu: Add missing volatile for reading SCTLR register

[Alison Wang]

When building u-boot with the latest Linaro toolchain, such as
gcc-linaro-4.9, u-boot will hang at PCIE init on LS1021A platform.
The issue is reported on
http://comments.gmane.org/gmane.linux.linaro.toolchain/5163.

As volatile is missing when reading SCTLR register and SCTLR is set
according to the value read from SCTLR, it causes CR_M bit is not set.
Then MMU is not enabled, the access to VA for PCIE fails.

This patch will add the missing volatile for reading SCTLR register.

Signed-off-by: Alison Wang 
---
 arch/arm/include/asm/system.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 89f2294..f5096dc 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -155,7 +155,7 @@ void flush_l3_cache(void);
 static inline unsigned int get_cr(void)
 {
unsigned int val;
-   asm("mrc p15, 0, %0, c1, c0, 0  @ get CR" : "=r" (val) : : "cc");
+   asm volatile("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : 
"cc");
return val;
 }
 
-- 
2.1.0.27.g96db324

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[U-Boot] [PATCH] arm: at91: clock: Add the generated clock support

[Wenyou Yang]

Some peripherals may need a second clock source that may be different
from the system clock. This second clock is the generated clock (GCK)
and is managed by the PMC via PMC_PCR.

For simplicity, the source of the GCK is fixed to PLLA_CLK.

Signed-off-by: Wenyou Yang 
---

 arch/arm/mach-at91/armv7/clock.c   |   57 
 arch/arm/mach-at91/include/mach/at91_pmc.h |   13 +++
 arch/arm/mach-at91/include/mach/clk.h  |3 ++
 3 files changed, 73 insertions(+)

diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c
index 0bf453e..84418a3 100644
--- a/arch/arm/mach-at91/armv7/clock.c
+++ b/arch/arm/mach-at91/armv7/clock.c
@@ -5,6 +5,7 @@
  * Copyright (C) 2005 Ivan Kokshaysky
  * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD 
  * Copyright (C) 2013 Bo Shen 
+ * Copyright (C) 2015 Wenyou Yang 
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
@@ -173,3 +174,59 @@ void at91_periph_clk_disable(int id)
 
writel(regval, >pcr);
 }
+
+void at91_enable_periph_generated_clk(u32 id)
+{
+   struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+   u32 regval;
+
+   if (id > AT91_PMC_PCR_PID_MASK)
+   return;
+
+   writel(id, >pcr);
+   regval = readl(>pcr);
+   regval &= ~AT91_PMC_PCR_GCKCSS;
+   regval &= ~AT91_PMC_PCR_GCKDIV;
+   regval |= AT91_PMC_PCR_GCKCSS_PLLA_CLK |
+ AT91_PMC_PCR_CMD_WRITE |
+ AT91_PMC_PCR_GCKDIV_(1) |
+ AT91_PMC_PCR_GCKEN;
+
+   writel(regval, >pcr);
+
+   while (!(readl(>sr) & AT91_PMC_GCKRDY))
+   ;
+}
+
+u32 at91_get_periph_generated_clk(u32 id)
+{
+   struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+   u32 regval, clk_source, div;
+   u32 freq = 0;
+
+   if (id > AT91_PMC_PCR_PID_MASK)
+   return 0;
+
+   writel(id, >pcr);
+   regval = readl(>pcr);
+
+   clk_source = regval & AT91_PMC_PCR_GCKCSS;
+   switch (clk_source) {
+   case AT91_PMC_PCR_GCKCSS_SLOW_CLK:
+   freq = CONFIG_SYS_AT91_SLOW_CLOCK;
+   break;
+   case AT91_PMC_PCR_GCKCSS_MAIN_CLK:
+   freq = gd->arch.main_clk_rate_hz;
+   break;
+   case AT91_PMC_PCR_GCKCSS_PLLA_CLK:
+   freq = gd->arch.plla_rate_hz;
+   break;
+   default:
+   break;
+   }
+
+   div = ((regval & AT91_PMC_PCR_GCKDIV) >> AT91_PMC_PCR_GCKDIV_OFFSET);
+   div += 1;
+
+   return freq / div;
+}
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h 
b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 8a3fb94..dcd6e36 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -153,8 +153,20 @@ typedef struct at91_pmc {
 #define AT91_PMC_IXR_MOSCSELS  0x0001
 
 #define AT91_PMC_PCR_PID_MASK  (0x3f)
+#define AT91_PMC_PCR_GCKCSS(0x7 << 8)
+#defineAT91_PMC_PCR_GCKCSS_SLOW_CLK(0x0 << 8)
+#defineAT91_PMC_PCR_GCKCSS_MAIN_CLK(0x1 << 8)
+#defineAT91_PMC_PCR_GCKCSS_PLLA_CLK(0x2 << 8)
+#defineAT91_PMC_PCR_GCKCSS_UPLL_CLK(0x3 << 8)
+#defineAT91_PMC_PCR_GCKCSS_MCK_CLK (0x4 << 8)
+#defineAT91_PMC_PCR_GCKCSS_AUDIO_CLK   (0x5 << 8)
 #define AT91_PMC_PCR_CMD_WRITE (0x1 << 12)
+#define AT91_PMC_PCR_DIV   (0x3 << 16)
+#define AT91_PMC_PCR_GCKDIV(0xff << 20)
+#defineAT91_PMC_PCR_GCKDIV_(x) ((x) << 20)
+#defineAT91_PMC_PCR_GCKDIV_OFFSET  20
 #define AT91_PMC_PCR_EN(0x1 << 28)
+#define AT91_PMC_PCR_GCKEN (0x1 << 29)
 
 #defineAT91_PMC_PCK(1 <<  0)   /* 
Processor Clock */
 #defineAT91RM9200_PMC_UDP  (1 <<  1)   /* USB 
Devcice Port Clock [AT91RM9200 only] */
@@ -236,6 +248,7 @@ typedef struct at91_pmc {
 #defineAT91_PMC_PCK1RDY(1 <<  9)   /* 
Programmable Clock 1 */
 #defineAT91_PMC_PCK2RDY(1 << 10)   /* 
Programmable Clock 2 */
 #defineAT91_PMC_PCK3RDY(1 << 11)   /* 
Programmable Clock 3 */
+#defineAT91_PMC_GCKRDY (1 << 24)
 
 #defineAT91_PMC_PROTKEY0x504d4301  /* Activation 
Code */
 #endif
diff --git a/arch/arm/mach-at91/include/mach/clk.h 
b/arch/arm/mach-at91/include/mach/clk.h
index 1d45e2d..dd1ed96 100644
--- a/arch/arm/mach-at91/include/mach/clk.h
+++ b/arch/arm/mach-at91/include/mach/clk.h
@@ -119,4 +119,7 @@ static inline unsigned long get_pit_clk_rate(void)
 int at91_clock_init(unsigned long main_clock);
 void at91_periph_clk_enable(int id);
 void at91_periph_clk_disable(int id);
+void 

Re: [U-Boot] [PATCH] net: eth: Do sanity test on eth dev before eth_get_ops(dev)->start

[Bin Meng]

Hi Joe,

On Wed, Sep 9, 2015 at 1:23 AM, Joe Hershberger
 wrote:
> Hi Bin,
>
> On Tue, Sep 8, 2015 at 11:24 AM, Bin Meng  wrote:
>> Hi Joe,
>>
>> On Wed, Sep 9, 2015 at 12:01 AM, Joe Hershberger
>>  wrote:
>>> Hi Bin,
>>>
>>> On Tue, Sep 8, 2015 at 10:44 AM, Bin Meng  wrote:
 Hi Joe,

 On Tue, Sep 8, 2015 at 11:32 PM, Joe Hershberger
  wrote:
> Hi Bin,
>
> On Sat, Sep 5, 2015 at 9:38 PM, Bin Meng  wrote:
>> In eth_init(), eth_get_dev() can return NULL. We should do sanity
>> test on eth dev before calling its start function.
>>
>> Signed-off-by: Bin Meng 
>> ---
>>
>>  net/eth.c | 4 
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/net/eth.c b/net/eth.c
>> index 26520d3..6ec3a86 100644
>> --- a/net/eth.c
>> +++ b/net/eth.c
>> @@ -370,6 +370,10 @@ int eth_init(void)
>> eth_try_another(0);
>> /* This will ensure the new "current" attempted to probe 
>> */
>> current = eth_get_dev();
>> +   if (!current) {
>> +   printf("No ethernet found.\n");
>> +   break;
>> +   }
>
> I'm not sure I get the point of this. We already have a check above...
>
> current = eth_get_dev();
> if (!current) {
> printf("No ethernet found.\n");
> return -ENODEV;
> }
>

 But this does not help. Each time eth_get_dev() is called, current can
 be NULL as driver's probe can fail.
>>>
>>> If that's the issue you are hitting it seems like you should attempt
>>> to skip the device instead of printing the message. It doesn't make
>>> sense to me to move to the next device and then print that there is no
>>> Ethernet.
>>
>> Do you mean we should not printf("No ethernet found.\n") and just break here?
>
> I think you shouldn't break, but rather should have an if check around
> the top half of the loop. I.e.:
>
> diff --git a/net/eth.c b/net/eth.c
> index d3ec8d6..78ffb5f 100644
> --- a/net/eth.c
> +++ b/net/eth.c
> @@ -343,23 +343,27 @@ int eth_init(void)
>
> old_current = current;
> do {
> -   debug("Trying %s\n", current->name);
> -
> -   if (device_active(current)) {
> -   ret = eth_get_ops(current)->start(current);
> -   if (ret >= 0) {
> -   struct eth_device_priv *priv =
> -   current->uclass_priv;
> -
> -   priv->state = ETH_STATE_ACTIVE;
> -   return 0;
> +   if (current) {
> +   debug("Trying %s\n", current->name);
> +
> +   if (device_active(current)) {
> +   ret = eth_get_ops(current)->start(current);
> +   if (ret >= 0) {
> +   struct eth_device_priv *priv =
> +   current->uclass_priv;
> +
> +   priv->state = ETH_STATE_ACTIVE;
> +   return 0;
> +   }
> +   } else {
> +   ret = eth_errno;
> }
> +
> +   debug("FAIL\n");
> } else {
> -   ret = eth_errno;
> +   debug("PROBE FAIL\n");
> }
>
> -   debug("FAIL\n");
> -
> /*
>  * If ethrotate is enabled, this will change "current",
>  * otherwise we will drop out of this while loop immediately
> ---
>
> Note that I have not tested this, it's just what I'm thinking is more
> appropriate.
>
>> If it fails, U-Boot just crashes as there is a NULL pointer. I am not
>> sure if test case is able to handle this?
>
> I think it's good to have the a test that hits your scenario. The bug
> fix will prevent the crash, so it's not like we expect it to crash,
> but it will lock down the desired behavior for this condition.
>

I am afraid creating a test case to cover this scenario is not that
easy. Checking function return value does not bring any harm. It makes
our codes safer. In fact, during further debug today, I found another
two places which does not check device_probe() return value. And it is
indeed these two places which causes the subsequent failure here.

>>> Also, this is fundamental to the eth subsystem. You should add a unit
>>> test that fails in your case.
>>>
>> } while (old_current != current);
>>
>> return ret;
>> --

>>

Regards,
Bin

Re: [U-Boot] [PATCH] net: eth: Do sanity test on eth dev before eth_get_ops(dev)->start

[Bin Meng]

Hi Joe,

On Wed, Sep 9, 2015 at 12:01 AM, Joe Hershberger
 wrote:
> Hi Bin,
>
> On Tue, Sep 8, 2015 at 10:44 AM, Bin Meng  wrote:
>> Hi Joe,
>>
>> On Tue, Sep 8, 2015 at 11:32 PM, Joe Hershberger
>>  wrote:
>>> Hi Bin,
>>>
>>> On Sat, Sep 5, 2015 at 9:38 PM, Bin Meng  wrote:
 In eth_init(), eth_get_dev() can return NULL. We should do sanity
 test on eth dev before calling its start function.

 Signed-off-by: Bin Meng 
 ---

  net/eth.c | 4 
  1 file changed, 4 insertions(+)

 diff --git a/net/eth.c b/net/eth.c
 index 26520d3..6ec3a86 100644
 --- a/net/eth.c
 +++ b/net/eth.c
 @@ -370,6 +370,10 @@ int eth_init(void)
 eth_try_another(0);
 /* This will ensure the new "current" attempted to probe */
 current = eth_get_dev();
 +   if (!current) {
 +   printf("No ethernet found.\n");
 +   break;
 +   }
>>>
>>> I'm not sure I get the point of this. We already have a check above...
>>>
>>> current = eth_get_dev();
>>> if (!current) {
>>> printf("No ethernet found.\n");
>>> return -ENODEV;
>>> }
>>>
>>
>> But this does not help. Each time eth_get_dev() is called, current can
>> be NULL as driver's probe can fail.
>
> If that's the issue you are hitting it seems like you should attempt
> to skip the device instead of printing the message. It doesn't make
> sense to me to move to the next device and then print that there is no
> Ethernet.

Do you mean we should not printf("No ethernet found.\n") and just break here?

If it fails, U-Boot just crashes as there is a NULL pointer. I am not
sure if test case is able to handle this?

>
> Also, this is fundamental to the eth subsystem. You should add a unit
> test that fails in your case.
>
 } while (old_current != current);

 return ret;
 --
>>

Regards,
Bin
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[U-Boot] [PATCH] sunxi: Fix wrong serial console setup in Forfun Q88DB tablet

[Siarhei Siamashka]

The Forfun Q88DB tablet was unbootable since commit
b6006baf9c2553543e3384983d23d95efbf24fa6 ("sunxi: Move all
boards to the driver-model"). Appears that this is caused
by the wrong serial console setup in the SPL. The serial
console should use PG3/PG4 pins according to the FEX file.

Signed-off-by: Siarhei Siamashka 
---
 configs/forfun_q88db_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

While this should be a correct fix, the reason why the tablet failed
to boot is a bit unclear. Without the correct CONS_INDEX setup, we
should just get the serial console routed to the nonexisting pins
B19/B20, and this is expected to be harmless. Maybe the DM code
in the main U-Boot binary can't initialize serial console properly
if we have a mismatch between the settings in the dts file and the
CONS_INDEX settings in the SPL?

diff --git a/configs/forfun_q88db_defconfig b/configs/forfun_q88db_defconfig
index 30cead7..30e0937 100644
--- a/configs/forfun_q88db_defconfig
+++ b/configs/forfun_q88db_defconfig
@@ -13,7 +13,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2"
 CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-forfun-q88db"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER"
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER"
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
-- 
2.4.6

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Re: [U-Boot] [PATCH v5 3/3] at91, taurus, smartweb: add dfu support

[Heiko Schocher]

Hello Lukasz,

Am 08.09.2015 um 15:45 schrieb Lukasz Majewski:

Hi Heiko,


[root@pollux dfu-util]# ./src/dfu-util -l
dfu-util 0.8

Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
Copyright 2010-2014 Tormod Volden and Stefan Schmidt
This program is Free Software and has ABSOLUTELY NO WARRANTY
Please report bugs to dfu-u...@lists.gnumonks.org

Found DFU: [0908:02d2] ver=0212, devnum=119, cfg=1, intf=0, alt=0,
name="Linux", serial="UNKNOWN" [root@pollux dfu-util]#

Signed-off-by: Heiko Schocher 
---

Changes in v5:
- rebase with current mainline
   commit efde6a579fe: "Prepare v2015.10-rc3"

Changes in v4:
- rebase after taurus board changes

Changes in v3: None
Changes in v2:
- rebase to bd48c0617b5c7212e5bf22169e716da878842da4
- fix changes introduced through commit:
   01acd6abbdd5: usb: USB download gadget and functions config options
coherent naming
- add comments from Lukasz Majewski 
- use SZ_X defines

  board/siemens/smartweb/smartweb.c | 29 +
  board/siemens/taurus/taurus.c | 27 
  include/configs/smartweb.h| 53
+--
include/configs/taurus.h  | 30 -- 4 files
changed, 124 insertions(+), 15 deletions(-)


[...]

-#define CONFIG_SYS_NAND_U_BOOT_SIZE0x8
+#define CONFIG_SYS_NAND_U_BOOT_SIZESZ_512K
  #define   CONFIG_SYS_NAND_U_BOOT_START
CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST
CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_5_ADDR_CYCLE


Heiko, I cannot apply this patch clearly on following branch:

u-boot-denx/master
SHA1: efde6a579fe3c172d214fb3047b02c827779738a (v2015.10-rc3)

Could you look into this problem?



Ah, yes, there are some small at91 patches from me pending:

 Patchwork [U-Boot,v3] taurus: board updates
http://patchwork.ozlabs.org/patch/509605/

 Patchwork [U-Boot,v3,1/2] at91: corvus: board updates
http://patchwork.ozlabs.org/patch/509435/

 Patchwork [U-Boot,v3,2/2] corvus, dfu: add dfu support
http://patchwork.ozlabs.org/patch/509436/

 Patchwork [U-Boot,v3] arm, at91: add axm extensions
http://patchwork.ozlabs.org/patch/509604/

I forgot this to mention ... sorry.

Maybe it is the cleaner way, if you ack this patches, and Andreas
Biessmann can pick them up ?

bye,
Heiko
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Re: [U-Boot] [PATCH v2 09/11] net: designware: Add support to PCI designware devices

[Joe Hershberger]

Hi Simon,

On Tue, Sep 8, 2015 at 9:22 AM, Simon Glass  wrote:
> Hi Joe,
>
> On 4 September 2015 at 23:57, Bin Meng  wrote:
>> Hi Joe,
>>
>> On Fri, Sep 4, 2015 at 11:29 PM, Joe Hershberger
>>  wrote:
>>> Hi Bin,
>>>
>>> On Wed, Sep 2, 2015 at 4:17 AM, Bin Meng  wrote:
 The Designware ethernet controller is also seen on PCI bus, e.g.
 on Intel Quark SoC. Add this support in the DM version driver.

 Signed-off-by: Bin Meng 
>>>
>>> Looks good. One question below.
>>>
 ---

 Changes in v2:
 - Change to use device_is_on_pci_bus()

  drivers/net/designware.c | 39 +++
  1 file changed, 39 insertions(+)

 diff --git a/drivers/net/designware.c b/drivers/net/designware.c
 index ae78d21..39a9e6b 100644
 --- a/drivers/net/designware.c
 +++ b/drivers/net/designware.c
 @@ -14,6 +14,7 @@
  #include 
  #include 
  #include 
 +#include 
  #include 
  #include 
  #include 
 @@ -558,6 +559,20 @@ static int designware_eth_write_hwaddr(struct udevice 
 *dev)
 return _dw_write_hwaddr(priv, pdata->enetaddr);
  }

 +static int designware_eth_bind(struct udevice *dev)
 +{
 +   static int num_cards;
 +   char name[20];
 +
 +   /* Create a unique device name for PCI type devices */
 +   if (device_is_on_pci_bus(dev)) {
 +   sprintf(name, "eth_designware#%u", num_cards++);
 +   device_set_name(dev, name);
 +   }
 +
 +   return 0;
 +}
 +
  static int designware_eth_probe(struct udevice *dev)
  {
 struct eth_pdata *pdata = dev_get_platdata(dev);
 @@ -565,6 +580,22 @@ static int designware_eth_probe(struct udevice *dev)
 u32 iobase = pdata->iobase;
 int ret;

 +   /*
 +* If we are on PCI bus, either directly attached to a PCI root 
 port,
 +* or via a PCI bridge, fill in platdata before we probe the 
 hardware.
 +*/
 +   if (device_is_on_pci_bus(dev)) {
 +   pci_dev_t bdf;
 +
 +   bdf = pci_get_bdf(dev);
 +   pci_read_config_dword(bdf, PCI_BASE_ADDRESS_0, );
 +   iobase &= PCI_BASE_ADDRESS_MEM_MASK;
 +   iobase = pci_mem_to_phys(bdf, iobase);
 +
 +   pdata->iobase = iobase;
 +   pdata->phy_interface = PHY_INTERFACE_MODE_RMII;
>>>
>>> Is this just assumed for all PCI devices? Seems like it could vary,
>>> but I don't know the specifics of all the implementations this is
>>> expected to support. Should it be part of a quirk based on PID or
>>> something?
>>
>> I think it could vary, but given so far the driver only supports Intel
>> Quark PCI variant, so I did not put a test logic against PCI
>> vendor/device ID here. When in the future we support another PCI
>> variant, we can add such logic.
>>
>
> Does this sound OK to you? I'd like to apply this series to u-boot-x86
> but want to make sure you are happy with it.

This is fine. It will be up to the next developer to design the way to
select this attribute. I'm guessing this is the first driver of its
kind (PCI - different PHY connections) so there isn't anything to
model after yet.

>>>
 +   }
 +
 debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
 priv->mac_regs_p = (struct eth_mac_regs *)iobase;
 priv->dma_regs_p = (struct eth_dma_regs *)(iobase + 
 DW_DMA_BASE_OFFSET);
 @@ -617,10 +648,18 @@ U_BOOT_DRIVER(eth_designware) = {
 .id = UCLASS_ETH,
 .of_match = designware_eth_ids,
 .ofdata_to_platdata = designware_eth_ofdata_to_platdata,
 +   .bind   = designware_eth_bind,
 .probe  = designware_eth_probe,
 .ops= _eth_ops,
 .priv_auto_alloc_size = sizeof(struct dw_eth_dev),
 .platdata_auto_alloc_size = sizeof(struct eth_pdata),
 .flags = DM_FLAG_ALLOC_PRIV_DMA,
  };
 +
 +static struct pci_device_id supported[] = {
 +   { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_EMAC) },
 +   { }
 +};
 +
 +U_BOOT_PCI_DEVICE(eth_designware, supported);
  #endif
 --
>>
>> Regards,
>> Bin
>
>
> Regards,
> Simon
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Re: [U-Boot] [PATCH] sunxi: Fix wrong serial console setup in Forfun Q88DB tablet

[Siarhei Siamashka]

On Tue,  8 Sep 2015 17:49:08 +0300
Siarhei Siamashka  wrote:

> The Forfun Q88DB tablet was unbootable since commit
> b6006baf9c2553543e3384983d23d95efbf24fa6 ("sunxi: Move all
> boards to the driver-model"). Appears that this is caused
> by the wrong serial console setup in the SPL. The serial
> console should use PG3/PG4 pins according to the FEX file.
> 
> Signed-off-by: Siarhei Siamashka 
> ---
>  configs/forfun_q88db_defconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> While this should be a correct fix, the reason why the tablet failed
> to boot is a bit unclear. Without the correct CONS_INDEX setup, we
> should just get the serial console routed to the nonexisting pins
> B19/B20, and this is expected to be harmless. Maybe the DM code
> in the main U-Boot binary can't initialize serial console properly
> if we have a mismatch between the settings in the dts file and the
> CONS_INDEX settings in the SPL?

Yes, as an experiment, pretending that the tablet has an A10S SoC (the
same die as A13, but with more pins routed to the outside, including
B19/B20) also "fixes" the boot issue:

index 24de86c..9254a42 100644
--- a/arch/arm/dts/sun5i-a13-forfun-q88db.dts
+++ b/arch/arm/dts/sun5i-a13-forfun-q88db.dts
@@ -7,14 +7,14 @@
  */
 
 /dts-v1/;
-#include "sun5i-a13.dtsi"
+#include "sun5i-a10s.dtsi"
 
 / {
model = "Forfun Q88db";
compatible = "forfun,q88db", "allwinner,sun5i-a13";
 
aliases {
-   serial0 = 
+   serial0 = 
};
 
chosen {
@@ -22,8 +22,8 @@
};
 };
 
- {
+ {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_b>;
+   pinctrl-0 = <_pins_a>;
status = "okay";
 };

Is something broken in the sunxi DM serial code, so that it
partially relies on the SPL configuring the UART pins properly?

-- 
Best regards,
Siarhei Siamashka
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Re: [U-Boot] [PATCH] net: eth: Do sanity test on eth dev before eth_get_ops(dev)->start

[Joe Hershberger]

Hi Bin,

On Sat, Sep 5, 2015 at 9:38 PM, Bin Meng  wrote:
> In eth_init(), eth_get_dev() can return NULL. We should do sanity
> test on eth dev before calling its start function.
>
> Signed-off-by: Bin Meng 
> ---
>
>  net/eth.c | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/net/eth.c b/net/eth.c
> index 26520d3..6ec3a86 100644
> --- a/net/eth.c
> +++ b/net/eth.c
> @@ -370,6 +370,10 @@ int eth_init(void)
> eth_try_another(0);
> /* This will ensure the new "current" attempted to probe */
> current = eth_get_dev();
> +   if (!current) {
> +   printf("No ethernet found.\n");
> +   break;
> +   }

I'm not sure I get the point of this. We already have a check above...

current = eth_get_dev();
if (!current) {
printf("No ethernet found.\n");
return -ENODEV;
}

> } while (old_current != current);
>
> return ret;
> --
> 1.8.2.1
>
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Re: [U-Boot] [PATCH 06/10] dfu: mmc: buffer file reads too

[Lukasz Majewski]

Hi Stephen,

> From: Stephen Warren 
> 
> When writing to files in a filesystem on MMC, dfu_mmc.c buffers up the
> entire file content until the end of the transaction, at which point
> the file is written in one go. This allows writing files larger than
> the USB transfer size (CONFIG_SYS_DFU_DATA_BUF_SIZE); the maximum
> written file size is CONFIG_SYS_DFU_MAX_FILE_SIZE (the size of the
> temporary buffer).
> 
> The current file reading code does not do any buffering, and so limits
> the maximum read file size to the USB transfer size. Enhance the code
> to do the same kind of buffering as the write path, so the same file
> size limits apply.
> 
> Remove the size checking code from dfu_read() since all read paths now
> support larger files than the USB transfer buffer.
> 
> Signed-off-by: Stephen Warren 
> ---
>  drivers/dfu/dfu.c | 11 ---
>  drivers/dfu/dfu_mmc.c | 27 ++-
>  2 files changed, 26 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
> index d85d3f507a7b..d1e465aa7695 100644
> --- a/drivers/dfu/dfu.c
> +++ b/drivers/dfu/dfu.c
> @@ -338,17 +338,6 @@ int dfu_read(struct dfu_entity *dfu, void *buf,
> int size, int blk_seq_num) dfu->r_left = dfu->get_medium_size(dfu);
>   if (dfu->r_left < 0)
>   return dfu->r_left;
> - switch (dfu->layout) {
> - case DFU_RAW_ADDR:
> - case DFU_RAM_ADDR:
> - break;
> - default:
> - if (dfu->r_left > dfu_buf_size) {
> - printf("%s: File too big for
> buffer\n",
> -__func__);
> - return -EOVERFLOW;
> - }
> - }
>  
>   debug("%s: %s %ld [B]\n", __func__, dfu->name,
> dfu->r_left); 
> diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
> index 2a780f7b5d31..5a9fb4a6e247 100644
> --- a/drivers/dfu/dfu_mmc.c
> +++ b/drivers/dfu/dfu_mmc.c
> @@ -18,6 +18,7 @@
>  
>  static unsigned char *dfu_file_buf;
>  static long dfu_file_buf_len;
> +static long dfu_file_buf_filled;
>  
>  static int mmc_access_part(struct dfu_entity *dfu, struct mmc *mmc,
> int part) {
> @@ -230,9 +231,12 @@ long dfu_get_medium_size_mmc(struct dfu_entity
> *dfu) return dfu->data.mmc.lba_size * dfu->data.mmc.lba_blk_size;
>   case DFU_FS_FAT:
>   case DFU_FS_EXT4:
> + dfu_file_buf_filled = -1;
>   ret = mmc_file_op(DFU_OP_SIZE, dfu, NULL, );
>   if (ret < 0)
>   return ret;
> + if (len > CONFIG_SYS_DFU_MAX_FILE_SIZE)
> + return -1;
>   return len;
>   default:
>   printf("%s: Layout (%s) not (yet) supported!\n",
> __func__, @@ -241,6 +245,27 @@ long dfu_get_medium_size_mmc(struct
> dfu_entity *dfu) }
>  }
>  
> +static int mmc_file_unbuffer(struct dfu_entity *dfu, u64 offset,
> void *buf,
> +  long *len)
> +{
> + int ret;
> + long file_len;
> +
> + if (dfu_file_buf_filled == -1) {
> + ret = mmc_file_op(DFU_OP_READ, dfu, dfu_file_buf,
> _len);
> + if (ret < 0)
> + return ret;
> + dfu_file_buf_filled = file_len;
> + }
> + if (offset + *len > dfu_file_buf_filled)
> + return -EINVAL;
> +
> + /* Add to the current buffer. */
> + memcpy(buf, dfu_file_buf + offset, *len);
> +
> + return 0;
> +}
> +
>  int dfu_read_medium_mmc(struct dfu_entity *dfu, u64 offset, void
> *buf, long *len)
>  {
> @@ -252,7 +277,7 @@ int dfu_read_medium_mmc(struct dfu_entity *dfu,
> u64 offset, void *buf, break;
>   case DFU_FS_FAT:
>   case DFU_FS_EXT4:
> - ret = mmc_file_op(DFU_OP_READ, dfu, buf, len);
> + ret = mmc_file_unbuffer(dfu, offset, buf, len);
>   break;
>   default:
>   printf("%s: Layout (%s) not (yet) supported!\n",
> __func__,

Acked-by: Lukasz Majewski 

Tested-by: Lukasz Majewski 
Test HW: Odroid XU3 - Exynos5433
[DFU Tests]

-- 
Best regards,

Lukasz Majewski

Samsung R Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 04/10] ext4: fix leak in check_filename()

[Lukasz Majewski]

Hi Stephen,

> From: Stephen Warren 
> 
> root_first_block_buffer should be free()d in all cases, not just when
> an error occurs. Fix the success exit path of the function to do this.
> 
> Signed-off-by: Stephen Warren 
> ---
>  fs/ext4/ext4_common.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
> index b09f23aa5b83..7d7609a91fa8 100644
> --- a/fs/ext4/ext4_common.c
> +++ b/fs/ext4/ext4_common.c
> @@ -769,6 +769,7 @@ static int check_filename(char *filename,
> unsigned int blknr) struct ext2_dirent *previous_dir = NULL;
>   char *ptr = NULL;
>   struct ext_filesystem *fs = get_fs();
> + int ret = -1;
>  
>   /* get the first block of root */
>   first_block_no_of_root = blknr;
> @@ -822,12 +823,12 @@ static int check_filename(char *filename,
> unsigned int blknr) if (ext4fs_put_metadata(root_first_block_addr,
>   first_block_no_of_root))
>   goto fail;
> - return inodeno;
> + ret = inodeno;
>   }
>  fail:
>   free(root_first_block_buffer);
>  
> - return -1;
> + return ret;
>  }
>  
>  int ext4fs_filename_check(char *filename)

Acked-by: Lukasz Majewski 
Tested-by: Lukasz Majewski 

Test HW: Odroid XU3 - Exynos5433
[DFU tests]

-- 
Best regards,

Lukasz Majewski

Samsung R Institute Poland (SRPOL) | Linux Platform Group
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