[U-Boot] [v2, 4/4] mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter Card

[Yangbo Lu]

When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card), enable EVDD
automatic control via SDHC_VS. This could support SD card IO voltage switching
for UHS-1 speed mode.

Signed-off-by: Yangbo Lu 
---
 board/freescale/common/qixis.h | 3 +++
 drivers/mmc/fsl_esdhc.c| 3 +++
 2 files changed, 6 insertions(+)

diff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h
index 450cd0d..0aa56a0 100644
--- a/board/freescale/common/qixis.h
+++ b/board/freescale/common/qixis.h
@@ -125,10 +125,13 @@ void qixis_write_i2c(unsigned int reg, u8 value);
 #define QIXIS_ESDHC_ADAPTER_TYPE_MMC0x5/* MMC Card */
 #define QIXIS_ESDHC_ADAPTER_TYPE_SD 0x6/* SD Card Rev2.0 3.0 */
 #define QIXIS_ESDHC_NO_ADAPTER  0x7/* No Card is Present*/
+
 #define QIXIS_SDCLKIN  0x08
 #define QIXIS_SDCLKOUT 0x02
 #define QIXIS_DAT5_6_7 0X02
 #define QIXIS_DAT4 0X01
+
+#define QIXIS_EVDD_BY_SDHC_VS  0x0c
 #endif
 
 #endif
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 639ec02..f400dc9 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -752,6 +752,9 @@ void mmc_adapter_card_type_ident(void)
QIXIS_WRITE(brdcfg[5], value);
break;
case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
+   value = QIXIS_READ(pwr_ctl[1]);
+   value |= QIXIS_EVDD_BY_SDHC_VS;
+   QIXIS_WRITE(pwr_ctl[1], value);
break;
case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);
-- 
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[U-Boot] [v2, 2/4] powerpc/t1040qds: enable adapter card type identification support

[Yangbo Lu]

Signed-off-by: Yangbo Lu 
---
 include/configs/T1040QDS.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index a0390a8..8353b8f 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -599,6 +599,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CMD_EXT2
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
+#define CONFIG_FSL_ESDHC_ADAPTER_IDENT
 #endif
 
 /* Qman/Bman */
-- 
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[U-Boot] [v2, 1/4] mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter Card

[Yangbo Lu]

If adapter card type identification is supported for platform, we would
enable dat[4:7] for eMMC4.5 Adapter Card.

Signed-off-by: Yangbo Lu 
---
Changes for v2:
- Modified the commit message
- Added a patch enabling EVDD automatic control
---
 board/freescale/common/qixis.h | 2 ++
 drivers/mmc/fsl_esdhc.c| 3 +++
 2 files changed, 5 insertions(+)

diff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h
index 51ce9c3..450cd0d 100644
--- a/board/freescale/common/qixis.h
+++ b/board/freescale/common/qixis.h
@@ -127,6 +127,8 @@ void qixis_write_i2c(unsigned int reg, u8 value);
 #define QIXIS_ESDHC_NO_ADAPTER  0x7/* No Card is Present*/
 #define QIXIS_SDCLKIN  0x08
 #define QIXIS_SDCLKOUT 0x02
+#define QIXIS_DAT5_6_7 0X02
+#define QIXIS_DAT4 0X01
 #endif
 
 #endif
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 0b37002..639ec02 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -747,6 +747,9 @@ void mmc_adapter_card_type_ident(void)
 
switch (card_id) {
case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
+   value = QIXIS_READ(brdcfg[5]);
+   value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
+   QIXIS_WRITE(brdcfg[5], value);
break;
case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
break;
-- 
2.1.0.27.g96db324

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[U-Boot] [v2, 3/4] powerpc/t1040qds: enable peripheral clock for eSDHC

[Yangbo Lu]

Signed-off-by: Yangbo Lu 
---
 include/configs/T1040QDS.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 8353b8f..92bc295 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -593,6 +593,7 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
 #define CONFIG_SYS_FSL_ESDHC_ADDR   CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_CMD_MMC
 #define CONFIG_GENERIC_MMC
-- 
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[U-Boot] [Patch v2 02/16] common/board_f.c: modify the macro to use get_clocks() more common

[Gong Qianyu]

get_clocks() should not be limited by ESDHC.

Signed-off-by: Gong Qianyu 
---
 common/board_f.c  | 2 +-
 include/configs/BSC9132QDS.h  | 1 +
 include/configs/MPC8308RDB.h  | 1 +
 include/configs/MPC837XEMDS.h | 1 +
 include/configs/MPC837XERDB.h | 1 +
 include/configs/MPC8536DS.h   | 1 +
 include/configs/MPC8569MDS.h  | 1 +
 include/configs/P1010RDB.h| 1 +
 include/configs/P1022DS.h | 1 +
 include/configs/P2041RDB.h| 1 +
 include/configs/T102xQDS.h| 1 +
 include/configs/T102xRDB.h| 1 +
 include/configs/T1040QDS.h| 1 +
 include/configs/T104xRDB.h| 1 +
 include/configs/T208xQDS.h| 1 +
 include/configs/T208xRDB.h| 1 +
 include/configs/T4240QDS.h| 1 +
 include/configs/T4240RDB.h| 1 +
 include/configs/UCP1020.h | 1 +
 include/configs/colibri_vf.h  | 1 +
 include/configs/controlcenterd.h  | 1 +
 include/configs/corenet_ds.h  | 1 +
 include/configs/hrcon.h   | 1 +
 include/configs/ima3-mx53.h   | 1 +
 include/configs/ls1021aqds.h  | 1 +
 include/configs/ls1021atwr.h  | 1 +
 include/configs/ls2085aqds.h  | 1 +
 include/configs/ls2085ardb.h  | 1 +
 include/configs/m53evk.h  | 1 +
 include/configs/mx25pdk.h | 1 +
 include/configs/mx35pdk.h | 1 +
 include/configs/mx51_efikamx.h| 1 +
 include/configs/mx51evk.h | 1 +
 include/configs/mx53ard.h | 1 +
 include/configs/mx53evk.h | 1 +
 include/configs/mx53loco.h| 1 +
 include/configs/mx53smd.h | 1 +
 include/configs/mx6_common.h  | 1 +
 include/configs/p1_p2_rdb_pc.h| 1 +
 include/configs/p1_twr.h  | 1 +
 include/configs/usbarmory.h   | 1 +
 include/configs/vf610twr.h| 1 +
 include/configs/vision2.h | 1 +
 include/configs/woodburn_common.h | 1 +
 44 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/common/board_f.c b/common/board_f.c
index 613332e..1bb84b3 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -806,7 +806,7 @@ static init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_BOARD_POSTCLK_INIT)
board_postclk_init,
 #endif
-#ifdef CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_CLK
get_clocks,
 #endif
 #ifdef CONFIG_M68K
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 804493e..1e42019 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -18,6 +18,7 @@
 #define CONFIG_BSC9132
 #endif
 
+#define CONFIG_FSL_CLK
 #define CONFIG_MISC_INIT_R
 
 #ifdef CONFIG_SDCARD
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 4150d5a..f4040cd 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -11,6 +11,7 @@
 
 #define CONFIG_SYS_GENERIC_BOARD
 #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_FSL_CLK
 
 /*
  * High Level Configuration Options
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index cebd175..46ecada 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -10,6 +10,7 @@
 
 #define CONFIG_SYS_GENERIC_BOARD
 #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_FSL_CLK
 
 /*
  * High Level Configuration Options
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 5c6ad19..3216002 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -17,6 +17,7 @@
 #define CONFIG_MPC837XERDB 1
 #define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_FSL_CLK
 
 #defineCONFIG_SYS_TEXT_BASE0xFE00
 
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 1312438..fe2f398 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -13,6 +13,7 @@
 
 #define CONFIG_SYS_GENERIC_BOARD
 #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_FSL_CLK
 #include "../board/freescale/common/ics307_clk.h"
 
 #ifdef CONFIG_36BIT
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 9e38724..fd8aa68 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -13,6 +13,7 @@
 #define CONFIG_SYS_GENERIC_BOARD
 #define CONFIG_DISPLAY_BOARDINFO
 
+#define CONFIG_FSL_CLK
 /* High Level Configuration Options */
 #define CONFIG_BOOKE   1   /* BOOKE */
 #define CONFIG_E5001   /* BOOKE e500 family */
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 8ac7000..bd2cd7f 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -16,6 +16,7 @@
 #endif
 #defineCONFIG_SYS_GENERIC_BOARD
 #defineCONFIG_DISPLAY_BOARDINFO
+#define CONFIG_FSL_CLK
 
 #define CONFIG_P1010
 #define CONFIG_E500/* BOOKE e500 family */
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 06b293f..5c8652c 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h

[U-Boot] [Patch v2 16/16] armv8/ls1043ardb: Add cpld command to boot from sd

[Gong Qianyu]

Signed-off-by: Gong Qianyu 
---
 board/freescale/ls1043ardb/cpld.c | 17 +
 board/freescale/ls1043ardb/cpld.h |  1 +
 2 files changed, 18 insertions(+)

diff --git a/board/freescale/ls1043ardb/cpld.c 
b/board/freescale/ls1043ardb/cpld.c
index 5acb97d..faa0de8 100644
--- a/board/freescale/ls1043ardb/cpld.c
+++ b/board/freescale/ls1043ardb/cpld.c
@@ -60,6 +60,20 @@ void cpld_set_nand(void)
CPLD_WRITE(system_rst, 1);
 }
 
+void cpld_set_sd(void)
+{
+   u16 reg = CPLD_CFG_RCW_SRC_SD;
+   u8 reg5 = (u8)(reg >> 1);
+   u8 reg6 = (u8)(reg & 1);
+   cpld_rev_bit();
+
+   CPLD_WRITE(soft_mux_on, 1);
+
+   CPLD_WRITE(cfg_rcw_src1, reg5);
+   CPLD_WRITE(cfg_rcw_src2, reg6);
+
+   CPLD_WRITE(system_rst, 1);
+}
 #ifdef DEBUG
 static void cpld_dump_regs(void)
 {
@@ -108,6 +122,8 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
cpld_set_altbank();
else if (strcmp(argv[2], "nand") == 0)
cpld_set_nand();
+   else if (strcmp(argv[2], "sd") == 0)
+   cpld_set_sd();
else
cpld_set_defbank();
 #ifdef DEBUG
@@ -127,6 +143,7 @@ U_BOOT_CMD(
"reset: reset to default bank\n"
"cpld reset altbank: reset to alternate bank\n"
"cpld reset nand: reset to boot from NAND flash\n"
+   "cpld reset sd: reset to boot from SD card\n"
 #ifdef DEBUG
"cpld dump - display the CPLD registers\n"
 #endif
diff --git a/board/freescale/ls1043ardb/cpld.h 
b/board/freescale/ls1043ardb/cpld.h
index 5f43a8a..bd59c0e 100644
--- a/board/freescale/ls1043ardb/cpld.h
+++ b/board/freescale/ls1043ardb/cpld.h
@@ -41,4 +41,5 @@ void cpld_rev_bit(unsigned char *value);
 #define CPLD_BANK_SEL_MASK 0x07
 #define CPLD_BANK_SEL_ALTBANK  0x04
 #define CPLD_CFG_RCW_SRC_NAND  0x106
+#define CPLD_CFG_RCW_SRC_SD0x040
 #endif
-- 
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[U-Boot] [Patch v2 11/16] armv8/ls1043ardb: Add nand boot support

[Gong Qianyu]

Signed-off-by: Gong Qianyu 
Signed-off-by: Hou Zhiqiang 
Signed-off-by: Shaohui Xie 
Signed-off-by: Mingkai Hu 
---
 V2:
 -Removed unecessary NAND_PAGE_SIZE in ls1043a_common.h.
 -Fixed "select SUPPORT_SPL" in arch/arm/Kconfig.
 -Used CONFIG_FSL_IFC instead of SPL_NAND_SUPPORT for init_early_memctl_regs() 
in spl.c
 -Replaced ns_access.h with fsl_csu.h.

 arch/arm/Kconfig   |  1 +
 arch/arm/cpu/armv8/fsl-lsch2/Makefile  |  1 +
 arch/arm/cpu/armv8/fsl-lsch2/spl.c | 79 ++
 arch/arm/include/asm/arch-fsl-lsch2/spl.h  |  2 +-
 board/freescale/ls1043ardb/ls1043ardb_pbi.cfg  | 14 
 board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg |  7 ++
 configs/ls1043ardb_nand_defconfig  |  4 ++
 include/configs/ls1043a_common.h   | 30 
 include/configs/ls1043ardb.h   | 40 +++
 9 files changed, 177 insertions(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index bc478f7..f935f19 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -665,6 +665,7 @@ config TARGET_LS1021ATWR
 config TARGET_LS1043ARDB
bool "Support ls1043ardb"
select ARM64
+   select SUPPORT_SPL
help
  Support for Freescale LS1043ARDB platform.
 
diff --git a/arch/arm/cpu/armv8/fsl-lsch2/Makefile 
b/arch/arm/cpu/armv8/fsl-lsch2/Makefile
index 2280ebf..937e3af 100644
--- a/arch/arm/cpu/armv8/fsl-lsch2/Makefile
+++ b/arch/arm/cpu/armv8/fsl-lsch2/Makefile
@@ -10,3 +10,4 @@ obj-y += lowlevel.o
 obj-y += speed.o
 obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o ls1043a_serdes.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
+obj-$(CONFIG_SPL) += spl.o
diff --git a/arch/arm/cpu/armv8/fsl-lsch2/spl.c 
b/arch/arm/cpu/armv8/fsl-lsch2/spl.c
new file mode 100644
index 000..cd667e5
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-lsch2/spl.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 spl_boot_device(void)
+{
+#ifdef CONFIG_SPL_SPI_SUPPORT
+   return BOOT_DEVICE_SPI;
+#endif
+#ifdef CONFIG_SPL_MMC_SUPPORT
+   return BOOT_DEVICE_MMC1;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+   return BOOT_DEVICE_NAND;
+#endif
+   return 0;
+}
+
+u32 spl_boot_mode(void)
+{
+   switch (spl_boot_device()) {
+   case BOOT_DEVICE_MMC1:
+#ifdef CONFIG_SPL_FAT_SUPPORT
+   return MMCSD_MODE_FAT;
+#else
+   return MMCSD_MODE_RAW;
+#endif
+   break;
+   case BOOT_DEVICE_NAND:
+   case BOOT_DEVICE_SPI:
+   return 0;
+   break;
+   default:
+   puts("spl: error: unsupported device\n");
+   hang();
+   }
+}
+
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong dummy)
+{
+#ifdef CONFIG_FSL_IFC
+   init_early_memctl_regs();
+#endif
+   /* Set global data pointer */
+   gd = 
+
+   timer_init();
+
+   get_clocks();
+
+   preloader_console_init();
+
+#ifdef CONFIG_SPL_I2C_SUPPORT
+   i2c_init_all();
+#endif
+   dram_init();
+
+   /* Clear the BSS */
+   memset(__bss_start, 0, __bss_end - __bss_start);
+
+#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
+   enable_layerscape_ns_access();
+#endif
+   board_init_r(NULL, 0);
+}
+#endif
diff --git a/arch/arm/include/asm/arch-fsl-lsch2/spl.h 
b/arch/arm/include/asm/arch-fsl-lsch2/spl.h
index 356a338..11daf9c 100644
--- a/arch/arm/include/asm/arch-fsl-lsch2/spl.h
+++ b/arch/arm/include/asm/arch-fsl-lsch2/spl.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2015 Freescale Semiconductor, Inc.
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
diff --git a/board/freescale/ls1043ardb/ls1043ardb_pbi.cfg 
b/board/freescale/ls1043ardb/ls1043ardb_pbi.cfg
new file mode 100644
index 000..f072274
--- /dev/null
+++ b/board/freescale/ls1043ardb/ls1043ardb_pbi.cfg
@@ -0,0 +1,14 @@
+#Configure Scratch register
+09570600 
+09570604 1000
+#Alt base register
+09570158 1000
+#Disable CCI barrier tranaction
+09570178 e010
+0918 0008
+#USB PHY frequency sel
+09570418 009e
+0957041c 009e
+09570420 009e
+#flush PBI data
+096100c0 000f
diff --git a/board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg 
b/board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg
new file mode 100644
index 000..935ffc0
--- /dev/null
+++ b/board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg
@@ -0,0 +1,7 @@
+#PBL preamble and RCW header
+aa55aa55 01ee0100
+# serdes protocol
+081f 0c00  
+14550002 80004012 e0106000 61002000
+   00038800
+ 1100 0096 0001
diff --git a/configs/ls1043ardb_nand_defconfig 

[U-Boot] [Patch v2 13/16] armv8/ls1043a: Add Fman support

[Gong Qianyu]

From: Shaohui Xie 

Signed-off-by: Hou Zhiqiang 
Signed-off-by: Shaohui Xie 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 
---
 arch/arm/cpu/armv8/fsl-lsch2/cpu.c  |  19 +
 arch/arm/cpu/armv8/fsl-lsch2/fdt.c  |   7 ++
 arch/arm/cpu/armv8/fsl-lsch2/speed.c|  23 ++
 board/freescale/common/fman.c   |   6 +-
 board/freescale/ls1043ardb/Makefile |   1 +
 board/freescale/ls1043ardb/eth.c|  77 +
 board/freescale/ls1043ardb/ls1043ardb.c |   4 ++
 drivers/net/fm/Makefile |   1 +
 drivers/net/fm/init.c   |  10 ++-
 drivers/net/fm/ls1043.c | 119 
 include/configs/ls1043a_common.h|  12 
 include/configs/ls1043ardb.h|  25 +++
 12 files changed, 301 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-lsch2/cpu.c 
b/arch/arm/cpu/armv8/fsl-lsch2/cpu.c
index 1155723..18886ea 100644
--- a/arch/arm/cpu/armv8/fsl-lsch2/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-lsch2/cpu.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "speed.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -358,6 +359,9 @@ int print_cpuinfo(void)
printf("\n   Bus:  %-4s MHz  ",
   strmhz(buf, sysinfo.freq_systembus));
printf("DDR:  %-4s MT/s", strmhz(buf, sysinfo.freq_ddrbus));
+#ifdef CONFIG_SYS_DPAA_FMAN
+   printf("  FMAN: %-4s MHz", strmhz(buf, sysinfo.freq_fman[0]));
+#endif
puts("\n");
 
/*
@@ -378,11 +382,26 @@ int print_cpuinfo(void)
 }
 #endif
 
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_FMAN_ENET
+   fm_standard_init(bis);
+#endif
+   return 0;
+}
+
 int arch_early_init_r(void)
 {
 #ifdef CONFIG_SYS_HAS_SERDES
fsl_serdes_init();
 #endif
+#ifdef CONFIG_FMAN_ENET
+   fman_enet_init();
+#endif
return 0;
 }
 
diff --git a/arch/arm/cpu/armv8/fsl-lsch2/fdt.c 
b/arch/arm/cpu/armv8/fsl-lsch2/fdt.c
index 015ad76..a646faa 100644
--- a/arch/arm/cpu/armv8/fsl-lsch2/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-lsch2/fdt.c
@@ -7,6 +7,13 @@
 #include 
 #include 
 #include 
+#include 
+
+int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
+{
+   return fdt_setprop_string(blob, offset, "phy-connection-type",
+phy_string_for_interface(phyc));
+}
 
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
diff --git a/arch/arm/cpu/armv8/fsl-lsch2/speed.c 
b/arch/arm/cpu/armv8/fsl-lsch2/speed.c
index 197cc0e..9ef630a 100644
--- a/arch/arm/cpu/armv8/fsl-lsch2/speed.c
+++ b/arch/arm/cpu/armv8/fsl-lsch2/speed.c
@@ -25,6 +25,9 @@ void get_sys_info(struct sys_info *sys_info)
struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
u32 ccr;
 #endif
+#ifdef CONFIG_SYS_DPAA_FMAN
+   u32 rcw_tmp;
+#endif
struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_CLK_ADDR);
unsigned int cpu;
const u8 core_cplx_pll[8] = {
@@ -79,6 +82,26 @@ void get_sys_info(struct sys_info *sys_info)
 
 #define HWA_CGA_M1_CLK_SEL 0xe000
 #define HWA_CGA_M1_CLK_SHIFT   29
+#ifdef CONFIG_SYS_DPAA_FMAN
+   rcw_tmp = in_be32(>rcwsr[7]);
+   switch ((rcw_tmp & HWA_CGA_M1_CLK_SEL) >> HWA_CGA_M1_CLK_SHIFT) {
+   case 2:
+   sys_info->freq_fman[0] = freq_c_pll[0] / 2;
+   break;
+   case 3:
+   sys_info->freq_fman[0] = freq_c_pll[0] / 3;
+   break;
+   case 6:
+   sys_info->freq_fman[0] = freq_c_pll[1] / 2;
+   break;
+   case 7:
+   sys_info->freq_fman[0] = freq_c_pll[1] / 3;
+   break;
+   default:
+   printf("Error: Unknown FMan1 clock select!\n");
+   break;
+   }
+#endif
 
 #define HWA_CGA_M2_CLK_SEL 0x0007
 #define HWA_CGA_M2_CLK_SHIFT   0
diff --git a/board/freescale/common/fman.c b/board/freescale/common/fman.c
index 9dc5402..e491064 100644
--- a/board/freescale/common/fman.c
+++ b/board/freescale/common/fman.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011-2015 Freescale Semiconductor, Inc.
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
@@ -10,7 +10,11 @@
 #include 
 
 #include 
+#ifdef CONFIG_FSL_LSCH2
+#include 
+#else
 #include 
+#endif
 
 /*
  * Given the following ...
diff --git a/board/freescale/ls1043ardb/Makefile 
b/board/freescale/ls1043ardb/Makefile
index dd17e2e..5fe1cc9 100644
--- a/board/freescale/ls1043ardb/Makefile
+++ b/board/freescale/ls1043ardb/Makefile
@@ -7,3 +7,4 @@
 obj-y += cpld.o
 obj-y += ddr.o
 obj-y += ls1043ardb.o
+obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o
diff --git a/board/freescale/ls1043ardb/eth.c b/board/freescale/ls1043ardb/eth.c
new file mode 100644
index 

[U-Boot] [Patch v2 12/16] armv8/ls1043ardb: Add cpld command to boot from nand

[Gong Qianyu]

Signed-off-by: Gong Qianyu 
---
 board/freescale/ls1043ardb/cpld.c | 18 ++
 board/freescale/ls1043ardb/cpld.h |  1 +
 2 files changed, 19 insertions(+)

diff --git a/board/freescale/ls1043ardb/cpld.c 
b/board/freescale/ls1043ardb/cpld.c
index 3f1101e..5acb97d 100644
--- a/board/freescale/ls1043ardb/cpld.c
+++ b/board/freescale/ls1043ardb/cpld.c
@@ -45,6 +45,21 @@ void cpld_set_defbank(void)
CPLD_WRITE(global_rst, 1);
 }
 
+void cpld_set_nand(void)
+{
+   u16 reg = CPLD_CFG_RCW_SRC_NAND;
+   u8 reg5 = (u8)(reg >> 1);
+   u8 reg6 = (u8)(reg & 1);
+   cpld_rev_bit();
+
+   CPLD_WRITE(soft_mux_on, 1);
+
+   CPLD_WRITE(cfg_rcw_src1, reg5);
+   CPLD_WRITE(cfg_rcw_src2, reg6);
+
+   CPLD_WRITE(system_rst, 1);
+}
+
 #ifdef DEBUG
 static void cpld_dump_regs(void)
 {
@@ -91,6 +106,8 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
if (strcmp(argv[1], "reset") == 0) {
if (strcmp(argv[2], "altbank") == 0)
cpld_set_altbank();
+   else if (strcmp(argv[2], "nand") == 0)
+   cpld_set_nand();
else
cpld_set_defbank();
 #ifdef DEBUG
@@ -109,6 +126,7 @@ U_BOOT_CMD(
"Reset the board or alternate bank",
"reset: reset to default bank\n"
"cpld reset altbank: reset to alternate bank\n"
+   "cpld reset nand: reset to boot from NAND flash\n"
 #ifdef DEBUG
"cpld dump - display the CPLD registers\n"
 #endif
diff --git a/board/freescale/ls1043ardb/cpld.h 
b/board/freescale/ls1043ardb/cpld.h
index ea4efd8..5f43a8a 100644
--- a/board/freescale/ls1043ardb/cpld.h
+++ b/board/freescale/ls1043ardb/cpld.h
@@ -40,4 +40,5 @@ void cpld_rev_bit(unsigned char *value);
 #define CPLD_SW_MUX_BANK_SEL   0x40
 #define CPLD_BANK_SEL_MASK 0x07
 #define CPLD_BANK_SEL_ALTBANK  0x04
+#define CPLD_CFG_RCW_SRC_NAND  0x106
 #endif
-- 
2.1.0.27.g96db324

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[U-Boot] [Patch v2 14/16] armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardb

[Gong Qianyu]

From: Yangbo Lu 

This patch adds esdhc support for ls1043ardb.

Signed-off-by: Yangbo Lu 
Signed-off-by: Gong Qianyu 
---
 arch/arm/cpu/armv8/fsl-lsch2/cpu.c   | 10 ++
 arch/arm/cpu/armv8/fsl-lsch2/fdt.c   |  6 ++
 arch/arm/cpu/armv8/fsl-lsch2/speed.c | 18 +-
 drivers/mmc/fsl_esdhc.c  | 13 +++--
 include/configs/ls1043a_common.h | 11 +++
 include/fsl_esdhc.h  |  2 +-
 6 files changed, 52 insertions(+), 8 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-lsch2/cpu.c 
b/arch/arm/cpu/armv8/fsl-lsch2/cpu.c
index 18886ea..e799c8b 100644
--- a/arch/arm/cpu/armv8/fsl-lsch2/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-lsch2/cpu.c
@@ -12,6 +12,9 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_FSL_ESDHC
+#include 
+#endif
 #include "speed.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -382,6 +385,13 @@ int print_cpuinfo(void)
 }
 #endif
 
+#ifdef CONFIG_FSL_ESDHC
+int cpu_mmc_init(bd_t *bis)
+{
+   return fsl_esdhc_mmc_init(bis);
+}
+#endif
+
 /*
  * Initializes on-chip ethernet controllers.
  * to override, implement board_eth_init()
diff --git a/arch/arm/cpu/armv8/fsl-lsch2/fdt.c 
b/arch/arm/cpu/armv8/fsl-lsch2/fdt.c
index a646faa..f1ae1f1 100644
--- a/arch/arm/cpu/armv8/fsl-lsch2/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-lsch2/fdt.c
@@ -8,6 +8,9 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_FSL_ESDHC
+#include 
+#endif
 
 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
 {
@@ -17,4 +20,7 @@ int fdt_fixup_phy_connection(void *blob, int offset, 
phy_interface_t phyc)
 
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
+#if defined(CONFIG_FSL_ESDHC)
+   fdt_fixup_esdhc(blob, bd);
+#endif
 }
diff --git a/arch/arm/cpu/armv8/fsl-lsch2/speed.c 
b/arch/arm/cpu/armv8/fsl-lsch2/speed.c
index 9ef630a..1c33284 100644
--- a/arch/arm/cpu/armv8/fsl-lsch2/speed.c
+++ b/arch/arm/cpu/armv8/fsl-lsch2/speed.c
@@ -25,7 +25,7 @@ void get_sys_info(struct sys_info *sys_info)
struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
u32 ccr;
 #endif
-#ifdef CONFIG_SYS_DPAA_FMAN
+#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_SYS_DPAA_FMAN)
u32 rcw_tmp;
 #endif
struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_CLK_ADDR);
@@ -105,6 +105,11 @@ void get_sys_info(struct sys_info *sys_info)
 
 #define HWA_CGA_M2_CLK_SEL 0x0007
 #define HWA_CGA_M2_CLK_SHIFT   0
+#if defined(CONFIG_FSL_ESDHC)
+   rcw_tmp = in_be32(>rcwsr[15]);
+   rcw_tmp = (rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT;
+   sys_info->freq_sdhc = freq_c_pll[1] / rcw_tmp;
+#endif
 
 #if defined(CONFIG_FSL_IFC)
ccr = in_le32(_regs.gregs->ifc_ccr);
@@ -123,6 +128,10 @@ int get_clocks(void)
gd->bus_clk = sys_info.freq_systembus;
gd->mem_clk = sys_info.freq_ddrbus;
 
+#if defined(CONFIG_FSL_ESDHC)
+   gd->arch.sdhc_clk = sys_info.freq_sdhc;
+#endif
+
if (gd->cpu_clk != 0)
return 0;
else
@@ -139,6 +148,11 @@ ulong get_ddr_freq(ulong dummy)
return gd->mem_clk;
 }
 
+int get_sdhc_freq(ulong dummy)
+{
+   return gd->arch.sdhc_clk;
+}
+
 int get_serial_clock(void)
 {
return gd->bus_clk;
@@ -149,6 +163,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_I2C_CLK:
return get_bus_freq(0);
+   case MXC_ESDHC_CLK:
+   return get_sdhc_freq(0);
case MXC_DSPI_CLK:
return get_bus_freq(0);
case MXC_UART_CLK:
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 0b37002..0a22874 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -106,7 +106,8 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct 
mmc_data *data)
xfertyp |= XFERTYP_RSPTYP_48;
 
 #if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) || \
-   defined(CONFIG_LS102XA) || defined(CONFIG_LS2085A)
+   defined(CONFIG_LS102XA) || defined(CONFIG_LS2085A) || \
+   defined(CONFIG_LS1043A)
if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
xfertyp |= XFERTYP_CMDTYP_ABORT;
 #endif
@@ -184,7 +185,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct 
mmc_data *data)
int timeout;
struct fsl_esdhc_cfg *cfg = mmc->priv;
struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
-#ifdef CONFIG_LS2085A
+#if defined(CONFIG_LS2085A) || defined(CONFIG_LS1043A)
dma_addr_t addr;
 #endif
uint wml_value;
@@ -197,7 +198,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct 
mmc_data *data)
 
esdhc_clrsetbits32(>wml, WML_RD_WML_MASK, wml_value);
 #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
-#ifdef CONFIG_LS2085A
+#if defined(CONFIG_LS2085A) || defined(CONFIG_LS1043A)
addr = virt_to_phys((void *)(data->dest));
if (upper_32_bits(addr))
printf("Error found for 

Re: [U-Boot] U-boot UBI breaks build with -O0

[Heiko Schocher]

Hello Kevin,

Am 16.09.2015 um 22:58 schrieb Kevin Smith:

Some of the debug functions for UBI are preprocessed out for U-boot
(ifndef __UBOOT__), but their calls are optimized out at higher
optimization levels, so this does not cause a problem.  When building
with -O0, the linker gives an error:

fs/ubifs/io.c:162: undefined reference to `dbg_leb_unmap'

This function is in a #ifndef __UBOOT__ section.


Good catch. Could you provide a patch?

Thanks!

bye,
Heiko
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[U-Boot] [Patch v2 01/16] ARMv7/ls1021a: move ns_access to common file

[Gong Qianyu]

From: Mingkai Hu 

Config Security Level Register is different between different SoCs,
so put the CSL register definition into the arch speicific directory.

Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 
---
V2:
Create include/fsl_csu.h instead of board/freescale/common/ns_access.h

arch/arm/include/asm/arch-ls102xa/ns_access.h | 103 --
 board/freescale/common/Makefile   |   2 +-
 board/freescale/common/ns_access.c|   8 +-
 board/freescale/ls1021aqds/ls1021aqds.c   | 101 ++---
 board/freescale/ls1021atwr/ls1021atwr.c   |  92 +--
 include/configs/ls1021aqds.h  |   2 +-
 include/configs/ls1021atwr.h  |   2 +-
 include/fsl_csu.h |  34 +
 8 files changed, 136 insertions(+), 208 deletions(-)

diff --git a/arch/arm/include/asm/arch-ls102xa/ns_access.h 
b/arch/arm/include/asm/arch-ls102xa/ns_access.h
index b53f699..a921fb6 100644
--- a/arch/arm/include/asm/arch-ls102xa/ns_access.h
+++ b/arch/arm/include/asm/arch-ls102xa/ns_access.h
@@ -7,22 +7,6 @@
 #ifndef __FSL_NS_ACCESS_H_
 #define __FSL_NS_ACCESS_H_
 
-enum csu_cslx_access {
-   CSU_NS_SUP_R = 0x08,
-   CSU_NS_SUP_W = 0x80,
-   CSU_NS_SUP_RW = 0x88,
-   CSU_NS_USER_R = 0x04,
-   CSU_NS_USER_W = 0x40,
-   CSU_NS_USER_RW = 0x44,
-   CSU_S_SUP_R = 0x02,
-   CSU_S_SUP_W = 0x20,
-   CSU_S_SUP_RW = 0x22,
-   CSU_S_USER_R = 0x01,
-   CSU_S_USER_W = 0x10,
-   CSU_S_USER_RW = 0x11,
-   CSU_ALL_RW = 0xff,
-};
-
 enum csu_cslx_ind {
CSU_CSLX_PCIE2_IO = 0,
CSU_CSLX_PCIE1_IO,
@@ -108,11 +92,88 @@ enum csu_cslx_ind {
CSU_CSLX_MAX,
 };
 
-struct csu_ns_dev {
-   unsigned long ind;
-   uint32_t val;
+static struct csu_ns_dev ns_dev[] = {
+   { CSU_CSLX_PCIE2_IO, CSU_ALL_RW },
+   { CSU_CSLX_PCIE1_IO, CSU_ALL_RW },
+   { CSU_CSLX_MG2TPR_IP, CSU_ALL_RW },
+   { CSU_CSLX_IFC_MEM, CSU_ALL_RW },
+   { CSU_CSLX_OCRAM, CSU_ALL_RW },
+   { CSU_CSLX_GIC, CSU_ALL_RW },
+   { CSU_CSLX_PCIE1, CSU_ALL_RW },
+   { CSU_CSLX_OCRAM2, CSU_ALL_RW },
+   { CSU_CSLX_QSPI_MEM, CSU_ALL_RW },
+   { CSU_CSLX_PCIE2, CSU_ALL_RW },
+   { CSU_CSLX_SATA, CSU_ALL_RW },
+   { CSU_CSLX_USB3, CSU_ALL_RW },
+   { CSU_CSLX_SERDES, CSU_ALL_RW },
+   { CSU_CSLX_QDMA, CSU_ALL_RW },
+   { CSU_CSLX_LPUART2, CSU_ALL_RW },
+   { CSU_CSLX_LPUART1, CSU_ALL_RW },
+   { CSU_CSLX_LPUART4, CSU_ALL_RW },
+   { CSU_CSLX_LPUART3, CSU_ALL_RW },
+   { CSU_CSLX_LPUART6, CSU_ALL_RW },
+   { CSU_CSLX_LPUART5, CSU_ALL_RW },
+   { CSU_CSLX_DSPI2, CSU_ALL_RW },
+   { CSU_CSLX_DSPI1, CSU_ALL_RW },
+   { CSU_CSLX_QSPI, CSU_ALL_RW },
+   { CSU_CSLX_ESDHC, CSU_ALL_RW },
+   { CSU_CSLX_2D_ACE, CSU_ALL_RW },
+   { CSU_CSLX_IFC, CSU_ALL_RW },
+   { CSU_CSLX_I2C1, CSU_ALL_RW },
+   { CSU_CSLX_USB2, CSU_ALL_RW },
+   { CSU_CSLX_I2C3, CSU_ALL_RW },
+   { CSU_CSLX_I2C2, CSU_ALL_RW },
+   { CSU_CSLX_DUART2, CSU_ALL_RW },
+   { CSU_CSLX_DUART1, CSU_ALL_RW },
+   { CSU_CSLX_WDT2, CSU_ALL_RW },
+   { CSU_CSLX_WDT1, CSU_ALL_RW },
+   { CSU_CSLX_EDMA, CSU_ALL_RW },
+   { CSU_CSLX_SYS_CNT, CSU_ALL_RW },
+   { CSU_CSLX_DMA_MUX2, CSU_ALL_RW },
+   { CSU_CSLX_DMA_MUX1, CSU_ALL_RW },
+   { CSU_CSLX_DDR, CSU_ALL_RW },
+   { CSU_CSLX_QUICC, CSU_ALL_RW },
+   { CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW },
+   { CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW },
+   { CSU_CSLX_SFP, CSU_ALL_RW },
+   { CSU_CSLX_TMU, CSU_ALL_RW },
+   { CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW },
+   { CSU_CSLX_RESERVED0, CSU_ALL_RW },
+   { CSU_CSLX_ETSEC1, CSU_ALL_RW },
+   { CSU_CSLX_SEC5_5, CSU_ALL_RW },
+   { CSU_CSLX_ETSEC3, CSU_ALL_RW },
+   { CSU_CSLX_ETSEC2, CSU_ALL_RW },
+   { CSU_CSLX_GPIO2, CSU_ALL_RW },
+   { CSU_CSLX_GPIO1, CSU_ALL_RW },
+   { CSU_CSLX_GPIO4, CSU_ALL_RW },
+   { CSU_CSLX_GPIO3, CSU_ALL_RW },
+   { CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW },
+   { CSU_CSLX_CSU, CSU_ALL_RW },
+   { CSU_CSLX_ASRC, CSU_ALL_RW },
+   { CSU_CSLX_SPDIF, CSU_ALL_RW },
+   { CSU_CSLX_FLEXCAN2, CSU_ALL_RW },
+   { CSU_CSLX_FLEXCAN1, CSU_ALL_RW },
+   { CSU_CSLX_FLEXCAN4, CSU_ALL_RW },
+   { CSU_CSLX_FLEXCAN3, CSU_ALL_RW },
+   { CSU_CSLX_SAI2, CSU_ALL_RW },
+   { CSU_CSLX_SAI1, CSU_ALL_RW },
+   { CSU_CSLX_SAI4, CSU_ALL_RW },
+   { CSU_CSLX_SAI3, CSU_ALL_RW },
+   { CSU_CSLX_FTM2, CSU_ALL_RW },
+   { CSU_CSLX_FTM1, CSU_ALL_RW },
+   { CSU_CSLX_FTM4, CSU_ALL_RW },
+   { CSU_CSLX_FTM3, CSU_ALL_RW },
+   { CSU_CSLX_FTM6, CSU_ALL_RW },
+   { CSU_CSLX_FTM5, CSU_ALL_RW },
+   { CSU_CSLX_FTM8, CSU_ALL_RW },
+   { CSU_CSLX_FTM7, CSU_ALL_RW },
+   { CSU_CSLX_COP_DCSR, CSU_ALL_RW },
+ 

[U-Boot] [Patch v2 06/16] net/fm: Add QSGMII PCS init

[Gong Qianyu]

From: Shaohui Xie 

QSGMII PCS needed to be programmed same as SGMII PCS, and there are
four ports in QSGMII PCS, port 0, 1, 2, 3, all the four ports shared
port 0's MDIO controller, so when programming port 0, we continue to
program other three ports.

Signed-off-by: Shaohui Xie 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 
---
 drivers/net/fm/eth.c | 22 +-
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index a768a90..12eb9b8 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -41,28 +41,39 @@ static void dtsec_configure_serdes(struct fm_eth *priv)
bus.priv = priv->mac->phyregs;
bool sgmii_2500 = (priv->enet_if ==
PHY_INTERFACE_MODE_SGMII_2500) ? true : false;
+   int i = 0;
+
+qsgmii_loop:
+   if ((priv->enet_if == PHY_INTERFACE_MODE_QSGMII) &&
+   ((priv->phyaddr % 4) != 0))
+   return;
 
/* SGMII IF mode + AN enable only for 1G SGMII, not for 2.5G */
value = PHY_SGMII_IF_MODE_SGMII;
if (!sgmii_2500)
value |= PHY_SGMII_IF_MODE_AN;
 
-   memac_mdio_write(, 0, MDIO_DEVAD_NONE, 0x14, value);
+   memac_mdio_write(, i, MDIO_DEVAD_NONE, 0x14, value);
 
/* Dev ability according to SGMII specification */
value = PHY_SGMII_DEV_ABILITY_SGMII;
-   memac_mdio_write(, 0, MDIO_DEVAD_NONE, 0x4, value);
+   memac_mdio_write(, i, MDIO_DEVAD_NONE, 0x4, value);
 
/* Adjust link timer for SGMII  -
1.6 ms in units of 8 ns = 2 * 10^5 = 0x30d40 */
-   memac_mdio_write(, 0, MDIO_DEVAD_NONE, 0x13, 0x3);
-   memac_mdio_write(, 0, MDIO_DEVAD_NONE, 0x12, 0xd40);
+   memac_mdio_write(, i, MDIO_DEVAD_NONE, 0x13, 0x3);
+   memac_mdio_write(, i, MDIO_DEVAD_NONE, 0x12, 0xd40);
 
/* Restart AN */
value = PHY_SGMII_CR_DEF_VAL;
if (!sgmii_2500)
value |= PHY_SGMII_CR_RESET_AN;
-   memac_mdio_write(, 0, MDIO_DEVAD_NONE, 0, value);
+   memac_mdio_write(, i, MDIO_DEVAD_NONE, 0, value);
+
+   if ((priv->enet_if == PHY_INTERFACE_MODE_QSGMII) && (i < 3)) {
+   i++;
+   goto qsgmii_loop;
+   }
 #else
struct dtsec *regs = priv->mac->base;
struct tsec_mii_mng *phyregs = priv->mac->phyregs;
@@ -91,6 +102,7 @@ static void dtsec_init_phy(struct eth_device *dev)
 #endif
 
if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII ||
+   fm_eth->enet_if == PHY_INTERFACE_MODE_QSGMII ||
fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500)
dtsec_configure_serdes(fm_eth);
 }
-- 
2.1.0.27.g96db324

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[U-Boot] [Patch v2 04/16] net/fm: bug fix when CONFIG_PHYLIB not defined

[Gong Qianyu]

From: Shaohui Xie 

phy_shutdown should be wrapped by CONFIG_PHYLIB.

Signed-off-by: Shaohui Xie 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 
---
 drivers/net/fm/eth.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index cd05dbc..67c96a2 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -453,8 +453,10 @@ static void fm_eth_halt(struct eth_device *dev)
/* disable bmi Rx port */
bmi_rx_port_disable(fm_eth->rx_port);
 
+#ifdef CONFIG_PHYLIB
if (fm_eth->phydev)
phy_shutdown(fm_eth->phydev);
+#endif
 }
 
 static int fm_eth_send(struct eth_device *dev, void *buf, int len)
-- 
2.1.0.27.g96db324

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[U-Boot] [Patch v2 03/16] net/fm: Fix the endian issue of ucode uploading to IRAM

[Gong Qianyu]

From: Shaohui Xie 

Remove the redundant byte swap of the ucode before uploading to IRAM.

Signed-off-by: Hou Zhiqiang 
Signed-off-by: Shaohui Xie 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 
---
 drivers/net/fm/eth.c | 69 +++-
 drivers/net/fm/fm.c  | 11 +
 2 files changed, 42 insertions(+), 38 deletions(-)

diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 6702f5a..cd05dbc 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -109,7 +109,7 @@ static int tgec_is_fibre(struct eth_device *dev)
 static u16 muram_readw(u16 *addr)
 {
u32 base = (u32)addr & ~0x3;
-   u32 val32 = *(u32 *)base;
+   u32 val32 = in_be32((u32 *)base);
int byte_pos;
u16 ret;
 
@@ -125,7 +125,7 @@ static u16 muram_readw(u16 *addr)
 static void muram_writew(u16 *addr, u16 val)
 {
u32 base = (u32)addr & ~0x3;
-   u32 org32 = *(u32 *)base;
+   u32 org32 = in_be32((u32 *)base);
u32 val32;
int byte_pos;
 
@@ -135,7 +135,7 @@ static void muram_writew(u16 *addr, u16 val)
else
val32 = (org32 & 0x) | ((u32)val << 16);
 
-   *(u32 *)base = val32;
+   out_be32((u32 *)base, val32);
 }
 
 static void bmi_rx_port_disable(struct fm_bmi_rx_port *rx_port)
@@ -213,10 +213,10 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth 
*fm_eth)
pram_page_offset = (u32)pram - fm_muram_base(fm_eth->fm_index);
 
/* enable global mode- snooping data buffers and BDs */
-   pram->mode = PRAM_MODE_GLOBAL;
+   out_be32(>mode, PRAM_MODE_GLOBAL);
 
/* init the Rx queue descriptor pionter */
-   pram->rxqd_ptr = pram_page_offset + 0x20;
+   out_be32(>rxqd_ptr, pram_page_offset + 0x20);
 
/* set the max receive buffer length, power of 2 */
muram_writew(>mrblr, MAX_RXBUF_LOG2);
@@ -243,10 +243,10 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth 
*fm_eth)
/* init Rx BDs ring */
rxbd = (struct fm_port_bd *)rx_bd_ring_base;
for (i = 0; i < RX_BD_RING_SIZE; i++) {
-   rxbd->status = RxBD_EMPTY;
-   rxbd->len = 0;
-   rxbd->buf_ptr_hi = 0;
-   rxbd->buf_ptr_lo = (u32)rx_buf_pool + i * MAX_RXBUF_LEN;
+   muram_writew(>status, RxBD_EMPTY);
+   muram_writew(>len, 0);
+   muram_writew(>buf_ptr_hi, 0);
+   out_be32(>buf_ptr_lo, (u32)rx_buf_pool + i * 
MAX_RXBUF_LEN);
rxbd++;
}
 
@@ -254,7 +254,7 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth 
*fm_eth)
rxqd = >rxqd;
muram_writew(>gen, 0);
muram_writew(>bd_ring_base_hi, 0);
-   rxqd->bd_ring_base_lo = (u32)rx_bd_ring_base;
+   out_be32(>bd_ring_base_lo, (u32)rx_bd_ring_base);
muram_writew(>bd_ring_size, sizeof(struct fm_port_bd)
* RX_BD_RING_SIZE);
muram_writew(>offset_in, 0);
@@ -285,10 +285,10 @@ static int fm_eth_tx_port_parameter_init(struct fm_eth 
*fm_eth)
pram_page_offset = (u32)pram - fm_muram_base(fm_eth->fm_index);
 
/* enable global mode- snooping data buffers and BDs */
-   pram->mode = PRAM_MODE_GLOBAL;
+   out_be32(>mode, PRAM_MODE_GLOBAL);
 
/* init the Tx queue descriptor pionter */
-   pram->txqd_ptr = pram_page_offset + 0x40;
+   out_be32(>txqd_ptr, pram_page_offset + 0x40);
 
/* alloc Tx buffer descriptors from main memory */
tx_bd_ring_base = malloc(sizeof(struct fm_port_bd)
@@ -304,16 +304,17 @@ static int fm_eth_tx_port_parameter_init(struct fm_eth 
*fm_eth)
/* init Tx BDs ring */
txbd = (struct fm_port_bd *)tx_bd_ring_base;
for (i = 0; i < TX_BD_RING_SIZE; i++) {
-   txbd->status = TxBD_LAST;
-   txbd->len = 0;
-   txbd->buf_ptr_hi = 0;
-   txbd->buf_ptr_lo = 0;
+   muram_writew(>status, TxBD_LAST);
+   muram_writew(>len, 0);
+   muram_writew(>buf_ptr_hi, 0);
+   out_be32(>buf_ptr_lo, 0);
+   txbd++;
}
 
/* set the Tx queue decriptor */
txqd = >txqd;
muram_writew(>bd_ring_base_hi, 0);
-   txqd->bd_ring_base_lo = (u32)tx_bd_ring_base;
+   out_be32(>bd_ring_base_lo, (u32)tx_bd_ring_base);
muram_writew(>bd_ring_size, sizeof(struct fm_port_bd)
* TX_BD_RING_SIZE);
muram_writew(>offset_in, 0);
@@ -368,7 +369,7 @@ static void fmc_tx_port_graceful_stop_enable(struct fm_eth 
*fm_eth)
 
pram = fm_eth->tx_pram;
/* graceful stop transmission of frames */
-   pram->mode |= PRAM_MODE_GRACEFUL_STOP;
+   setbits_be32(>mode, PRAM_MODE_GRACEFUL_STOP);
sync();
 }
 
@@ -378,7 +379,7 @@ static void 

[U-Boot] [Patch v2 08/16] net/fm: fix compile warnings for 64-bit platform

[Gong Qianyu]

This patch fixes such compile warnings:

drivers/net/fm/eth.c: In function 'fm_eth_recv':
drivers/net/fm/eth.c:549:11: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
data = (u8 *)in_be32(>buf_ptr_lo);
drivers/net/fm/fm.c: In function 'fm_muram_alloc':
drivers/net/fm/fm.c:52:9: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
memset((void *)ret, 0, size);
drivers/net/fm/fm.c: In function 'fm_init_muram':
drivers/net/fm/fm.c:59:13: warning: cast from pointer to integer of
different size [-Wpointer-to-int-cast]
u32 base = (u32)reg;

Just make the cast explicit for them.

Signed-off-by: Gong Qianyu 
---
 drivers/net/fm/eth.c | 31 ---
 drivers/net/fm/fm.c  |  4 ++--
 2 files changed, 18 insertions(+), 17 deletions(-)

diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 12eb9b8..6ef0afb 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -120,12 +120,12 @@ static int tgec_is_fibre(struct eth_device *dev)
 
 static u16 muram_readw(u16 *addr)
 {
-   u32 base = (u32)addr & ~0x3;
+   ulong base = (ulong)addr & ~0x3;
u32 val32 = in_be32((u32 *)base);
int byte_pos;
u16 ret;
 
-   byte_pos = (u32)addr & 0x3;
+   byte_pos = (ulong)addr & 0x3;
if (byte_pos)
ret = (u16)(val32 & 0x);
else
@@ -136,12 +136,12 @@ static u16 muram_readw(u16 *addr)
 
 static void muram_writew(u16 *addr, u16 val)
 {
-   u32 base = (u32)addr & ~0x3;
+   ulong base = (ulong)addr & ~0x3;
u32 org32 = in_be32((u32 *)base);
u32 val32;
int byte_pos;
 
-   byte_pos = (u32)addr & 0x3;
+   byte_pos = (ulong)addr & 0x3;
if (byte_pos)
val32 = (org32 & 0x) | val;
else
@@ -217,12 +217,12 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth 
*fm_eth)
int i;
 
/* alloc global parameter ram at MURAM */
-   pram = (struct fm_port_global_pram *)fm_muram_alloc(fm_eth->fm_index,
-   FM_PRAM_SIZE, FM_PRAM_ALIGN);
+   pram = (struct fm_port_global_pram *)(ulong)fm_muram_alloc(
+   fm_eth->fm_index, FM_PRAM_SIZE, FM_PRAM_ALIGN);
fm_eth->rx_pram = pram;
 
/* parameter page offset to MURAM */
-   pram_page_offset = (u32)pram - fm_muram_base(fm_eth->fm_index);
+   pram_page_offset = (u32)(ulong)pram - fm_muram_base(fm_eth->fm_index);
 
/* enable global mode- snooping data buffers and BDs */
out_be32(>mode, PRAM_MODE_GLOBAL);
@@ -258,7 +258,8 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth 
*fm_eth)
muram_writew(>status, RxBD_EMPTY);
muram_writew(>len, 0);
muram_writew(>buf_ptr_hi, 0);
-   out_be32(>buf_ptr_lo, (u32)rx_buf_pool + i * 
MAX_RXBUF_LEN);
+   out_be32(>buf_ptr_lo, (u32)(ulong)rx_buf_pool +
+   i * MAX_RXBUF_LEN);
rxbd++;
}
 
@@ -266,7 +267,7 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth 
*fm_eth)
rxqd = >rxqd;
muram_writew(>gen, 0);
muram_writew(>bd_ring_base_hi, 0);
-   out_be32(>bd_ring_base_lo, (u32)rx_bd_ring_base);
+   out_be32(>bd_ring_base_lo, (u32)(ulong)rx_bd_ring_base);
muram_writew(>bd_ring_size, sizeof(struct fm_port_bd)
* RX_BD_RING_SIZE);
muram_writew(>offset_in, 0);
@@ -289,12 +290,12 @@ static int fm_eth_tx_port_parameter_init(struct fm_eth 
*fm_eth)
int i;
 
/* alloc global parameter ram at MURAM */
-   pram = (struct fm_port_global_pram *)fm_muram_alloc(fm_eth->fm_index,
-   FM_PRAM_SIZE, FM_PRAM_ALIGN);
+   pram = (struct fm_port_global_pram *)(ulong)fm_muram_alloc(
+   fm_eth->fm_index, FM_PRAM_SIZE, FM_PRAM_ALIGN);
fm_eth->tx_pram = pram;
 
/* parameter page offset to MURAM */
-   pram_page_offset = (u32)pram - fm_muram_base(fm_eth->fm_index);
+   pram_page_offset = (u32)(ulong)pram - fm_muram_base(fm_eth->fm_index);
 
/* enable global mode- snooping data buffers and BDs */
out_be32(>mode, PRAM_MODE_GLOBAL);
@@ -326,7 +327,7 @@ static int fm_eth_tx_port_parameter_init(struct fm_eth 
*fm_eth)
/* set the Tx queue decriptor */
txqd = >txqd;
muram_writew(>bd_ring_base_hi, 0);
-   out_be32(>bd_ring_base_lo, (u32)tx_bd_ring_base);
+   out_be32(>bd_ring_base_lo, (u32)(ulong)tx_bd_ring_base);
muram_writew(>bd_ring_size, sizeof(struct fm_port_bd)
* TX_BD_RING_SIZE);
muram_writew(>offset_in, 0);
@@ -494,7 +495,7 @@ static int fm_eth_send(struct eth_device *dev, void *buf, 
int len)
}
/* setup TxBD */
muram_writew(>buf_ptr_hi, 0);
-   out_be32(>buf_ptr_lo, (u32)buf);
+   out_be32(>buf_ptr_lo, 

[U-Boot] [Patch v2 07/16] net/fm: fix MDIO controller base on FMAN2

[Gong Qianyu]

From: Shaohui Xie 

MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two
FMANs, so we should only define MDIO controller base on FMAN2 when there
is FMAN2.

Signed-off-by: Shaohui Xie 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 
---
 include/fm_eth.h | 17 +
 1 file changed, 17 insertions(+)

diff --git a/include/fm_eth.h b/include/fm_eth.h
index 3e1b9f4..d43f801 100644
--- a/include/fm_eth.h
+++ b/include/fm_eth.h
@@ -45,8 +45,10 @@ enum fm_eth_type {
 #ifdef CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfc000)
 #define CONFIG_SYS_FM1_TGEC_MDIO_ADDR  (CONFIG_SYS_FSL_FM1_ADDR + 0xfd000)
+#if (CONFIG_SYS_NUM_FMAN == 2)
 #define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfc000)
 #define CONFIG_SYS_FM2_TGEC_MDIO_ADDR  (CONFIG_SYS_FSL_FM2_ADDR + 0xfd000)
+#endif
 #else
 #define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR(CONFIG_SYS_FSL_FM1_ADDR + 
0xe1120)
 #define CONFIG_SYS_FM1_TGEC_MDIO_ADDR  (CONFIG_SYS_FSL_FM1_ADDR + 0xf1000)
@@ -89,6 +91,7 @@ enum fm_eth_type {
 offsetof(struct ccsr_fman, memac[n-1]),\
 }
 #else
+#if (CONFIG_SYS_NUM_FMAN == 2)
 #define FM_TGEC_INFO_INITIALIZER(idx, n) \
 {  \
FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM2_TGEC_MDIO_ADDR) \
@@ -101,6 +104,20 @@ enum fm_eth_type {
.compat_offset  = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
offsetof(struct ccsr_fman, memac[n-1+8]),\
 }
+#else
+#define FM_TGEC_INFO_INITIALIZER(idx, n) \
+{  \
+   FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \
+   .index  = idx,  \
+   .num= n - 1,\
+   .type   = FM_ETH_10G_E, \
+   .port   = FM##idx##_10GEC##n,   \
+   .rx_port_id = RX_PORT_10G_BASE + n - 1, \
+   .tx_port_id = TX_PORT_10G_BASE + n - 1, \
+   .compat_offset  = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
+   offsetof(struct ccsr_fman, memac[n-1+8]),\
+}
+#endif
 #endif
 
 #if (CONFIG_SYS_NUM_FM1_10GEC >= 3)
-- 
2.1.0.27.g96db324

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[U-Boot] [Patch v2 15/16] armv8/ls1043ardb: Add sd boot support

[Gong Qianyu]

Signed-off-by: Gong Qianyu 
---
 board/freescale/ls1043ardb/ls1043ardb.c  |  8 +++
 board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg |  7 ++
 configs/ls1043ardb_sdcard_defconfig  |  4 
 include/configs/ls1043a_common.h | 30 
 include/configs/ls1043ardb.h | 13 --
 5 files changed, 60 insertions(+), 2 deletions(-)

diff --git a/board/freescale/ls1043ardb/ls1043ardb.c 
b/board/freescale/ls1043ardb/ls1043ardb.c
index fcefb17..edc6bc9 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -12,12 +12,14 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include "cpld.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -25,12 +27,17 @@ DECLARE_GLOBAL_DATA_PTR;
 int checkboard(void)
 {
static const char *freq[3] = {"100.00MHZ", "156.25MHZ"};
+#ifndef CONFIG_SD_BOOT
u8 cfg_rcw_src1, cfg_rcw_src2;
u32 cfg_rcw_src;
+#endif
u32 sd1refclk_sel;
 
printf("Board: LS1043ARDB, boot from ");
 
+#ifdef CONFIG_SD_BOOT
+   puts("SD\n");
+#else
cfg_rcw_src1 = CPLD_READ(cfg_rcw_src1);
cfg_rcw_src2 = CPLD_READ(cfg_rcw_src2);
cpld_rev_bit(_rcw_src1);
@@ -43,6 +50,7 @@ int checkboard(void)
puts("NAND\n");
else
printf("Invalid setting of SW4\n");
+#endif
 
printf("CPLD:  V%x.%x\nPCBA:  V%x.0\n", CPLD_READ(cpld_ver),
   CPLD_READ(cpld_ver_sub), CPLD_READ(pcba_ver));
diff --git a/board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg 
b/board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg
new file mode 100644
index 000..28cd958
--- /dev/null
+++ b/board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg
@@ -0,0 +1,7 @@
+#PBL preamble and RCW header
+aa55aa55 01ee0100
+# RCW
+081f 0c00  
+14550002 80004012 6004 61002000
+   00038800
+ 1100 0096 0001
diff --git a/configs/ls1043ardb_sdcard_defconfig 
b/configs/ls1043ardb_sdcard_defconfig
new file mode 100644
index 000..5fe0470
--- /dev/null
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SYS_FSL_DDR4"
+CONFIG_ARM=y
+CONFIG_TARGET_LS1043ARDB=y
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index c62d8fa..3485bed 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -60,6 +60,36 @@
 #define CONFIG_BAUDRATE115200
 #define CONFIG_SYS_BAUDRATE_TABLE  { 9600, 19200, 38400, 57600, 115200 }
 
+/* SD boot SPL */
+#ifdef CONFIG_SD_BOOT
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LDSCRIPT"arch/arm/cpu/armv8/u-boot-spl.lds"
+#define CONFIG_SPL_TARGET  "u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR0xf0
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x500
+
+#define CONFIG_SPL_TEXT_BASE   0x1000
+#define CONFIG_SPL_MAX_SIZE0x1d000
+#define CONFIG_SPL_STACK   0x1001e000
+#define CONFIG_SPL_PAD_TO  0x1d000
+
+#define CONFIG_SYS_SPL_MALLOC_START(CONFIG_SYS_TEXT_BASE + \
+   CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10
+#define CONFIG_SPL_BSS_START_ADDR  0x8010
+#define CONFIG_SPL_BSS_MAX_SIZE0x8
+#define CONFIG_SYS_MONITOR_LEN 0xa
+#endif
+
 /* NAND SPL */
 #ifdef CONFIG_NAND_BOOT
 #define CONFIG_SPL_PBL_PAD
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index e612cee..4565500 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -12,7 +12,7 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#if defined(CONFIG_NAND_BOOT)
+#if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT)
 #define CONFIG_SYS_TEXT_BASE   0x8200
 #else
 #define CONFIG_SYS_TEXT_BASE   0x6010
@@ -45,6 +45,10 @@
 #define CONFIG_SYS_FSL_PBL_RCW 
board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg
 #endif
 
+#ifdef CONFIG_SD_BOOT
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg
+#endif
+
 /*
  * NOR Flash Definitions
  */
@@ -217,7 +221,12 @@
  */
 #define CONFIG_ENV_OVERWRITE
 
-#if defined(CONFIG_NAND_BOOT)
+#if defined(CONFIG_SD_BOOT)
+#define CONFIG_ENV_OFFSET  (1024 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define 

[U-Boot] [Patch v2 05/16] net: Move some header files to include/

[Gong Qianyu]

From: Shaohui Xie 

The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM
and PPC, move it out of ppc to include/, and change the path in
drivers accordingly.

Signed-off-by: Shaohui Xie 
Signed-off-by: Gong Qianyu 
---
 arch/powerpc/include/asm/fsl_dtsec.h| 231 --
 arch/powerpc/include/asm/fsl_fman.h | 463 
 arch/powerpc/include/asm/fsl_tgec.h | 202 
 arch/powerpc/include/asm/immap_85xx.h   |   2 +-
 board/freescale/b4860qds/eth_b4860qds.c |   2 +-
 board/freescale/corenet_ds/eth_hydra.c  |   2 +-
 board/freescale/corenet_ds/eth_p4080.c  |   2 +-
 board/freescale/corenet_ds/eth_superhydra.c |   2 +-
 board/freescale/p1023rdb/p1023rdb.c |   2 +-
 board/freescale/p2041rdb/eth.c  |   2 +-
 board/freescale/t102xqds/eth_t102xqds.c |   2 +-
 board/freescale/t102xrdb/eth_t102xrdb.c |   2 +-
 board/freescale/t1040qds/eth.c  |   2 +-
 board/freescale/t104xrdb/eth.c  |   2 +-
 board/freescale/t208xqds/eth_t208xqds.c |   2 +-
 board/freescale/t208xrdb/eth_t208xrdb.c |   2 +-
 board/freescale/t4qds/eth.c |   2 +-
 board/freescale/t4rdb/eth.c |   2 +-
 drivers/net/fm/dtsec.c  |   2 +-
 drivers/net/fm/eth.c|  18 +-
 drivers/net/fm/fm.h |   2 +-
 drivers/net/fm/tgec.c   |   2 +-
 drivers/net/fm/tgec_phy.c   |   2 +-
 include/fsl_dtsec.h | 231 ++
 include/fsl_fman.h  | 463 
 include/fsl_tgec.h  | 202 
 26 files changed, 924 insertions(+), 924 deletions(-)

diff --git a/arch/powerpc/include/asm/fsl_dtsec.h 
b/arch/powerpc/include/asm/fsl_dtsec.h
deleted file mode 100644
index 41b8398..000
--- a/arch/powerpc/include/asm/fsl_dtsec.h
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * Copyright 2009-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef __DTSEC_H__
-#define __DTSEC_H__
-
-#include 
-
-struct dtsec {
-   u32 tsec_id;/* controller ID and version */
-   u32 tsec_id2;   /* controller ID and configuration */
-   u32 ievent; /* interrupt event */
-   u32 imask;  /* interrupt mask */
-   u32 res0;
-   u32 ecntrl; /* ethernet control and configuration */
-   u32 ptv;/* pause time value */
-   u32 tbipa;  /* TBI PHY address */
-   u32 res1[8];
-   u32 tctrl;  /* Transmit control register */
-   u32 res2[3];
-   u32 rctrl;  /* Receive control register */
-   u32 res3[11];
-   u32 igaddr[8];  /* Individual group address */
-   u32 gaddr[8];   /* group address */
-   u32 res4[16];
-   u32 maccfg1;/* MAC configuration register 1 */
-   u32 maccfg2;/* MAC configuration register 2 */
-   u32 ipgifg; /* inter-packet/inter-frame gap */
-   u32 hafdup; /* half-duplex control */
-   u32 maxfrm; /* Maximum frame size */
-   u32 res5[3];
-   u32 miimcfg;/* MII management configuration */
-   u32 miimcom;/* MII management command */
-   u32 miimadd;/* MII management address */
-   u32 miimcon;/* MII management control */
-   u32 miimstat;   /* MII management status */
-   u32 miimind;/* MII management indicator */
-   u32 res6;
-   u32 ifstat; /* Interface status */
-   u32 macstnaddr1;/* MAC station address 1 */
-   u32 macstnaddr2;/* MAC station address 2 */
-   u32 res7[46];
-   /* transmit and receive counter */
-   u32 tr64;   /* Tx and Rx 64 bytes frame */
-   u32 tr127;  /* Tx and Rx 65 to 127 bytes frame */
-   u32 tr255;  /* Tx and Rx 128 to 255 bytes frame */
-   u32 tr511;  /* Tx and Rx 256 to 511 bytes frame */
-   u32 tr1k;   /* Tx and Rx 512 to 1023 bytes frame */
-   u32 trmax;  /* Tx and Rx 1024 to 1518 bytes frame */
-   u32 trmgv;  /* Tx and Rx 1519 to 1522 good VLAN frame */
-   /* receive counters */
-   u32 rbyt;   /* Receive byte counter */
-   u32 rpkt;   /* Receive packet counter */
-   u32 rfcs;   /* Receive FCS error */
-   u32 rmca;   /* Receive multicast packet */
-   u32 rbca;   /* Receive broadcast packet */
-   u32 rxcf;   /* Receive control frame */
-   u32 rxpf;   /* Receive pause frame */
-   u32

[U-Boot] [Patch v2 09/16] ARMv8/FSL_LSCH2: Add FSL_LSCH2 SoC

[Gong Qianyu]

From: Mingkai Hu 

Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.

Signed-off-by: Li Yang 
Signed-off-by: Hou Zhiqiang 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 
---
V2:
remove FSL_LS102xA_DEVDISR3_PCIE from immap_lsch2.h

 arch/arm/cpu/armv8/Makefile   |   1 +
 arch/arm/cpu/armv8/fsl-lsch2/Makefile |  12 +
 arch/arm/cpu/armv8/fsl-lsch2/README   |  10 +
 arch/arm/cpu/armv8/fsl-lsch2/cpu.c| 414 ++
 arch/arm/cpu/armv8/fsl-lsch2/fdt.c|  13 +
 arch/arm/cpu/armv8/fsl-lsch2/fsl_lsch2_serdes.c   | 116 +
 arch/arm/cpu/armv8/fsl-lsch2/lowlevel.S   | 122 ++
 arch/arm/cpu/armv8/fsl-lsch2/ls1043a_serdes.c |  86 
 arch/arm/cpu/armv8/fsl-lsch2/soc.c|  36 ++
 arch/arm/cpu/armv8/fsl-lsch2/speed.c  | 137 ++
 arch/arm/cpu/armv8/fsl-lsch2/speed.h  |   7 +
 arch/arm/include/asm/arch-fsl-lsch2/clock.h   |  24 ++
 arch/arm/include/asm/arch-fsl-lsch2/config.h  | 150 +++
 arch/arm/include/asm/arch-fsl-lsch2/fsl_serdes.h  | 105 +
 arch/arm/include/asm/arch-fsl-lsch2/gpio.h|   9 +
 arch/arm/include/asm/arch-fsl-lsch2/immap_lsch2.h | 496 ++
 arch/arm/include/asm/arch-fsl-lsch2/imx-regs.h|  52 +++
 arch/arm/include/asm/arch-fsl-lsch2/mmu.h |  10 +
 arch/arm/include/asm/arch-fsl-lsch2/ns_access.h   | 158 +++
 arch/arm/include/asm/arch-fsl-lsch2/soc.h |   7 +
 arch/arm/include/asm/arch-fsl-lsch2/spl.h |  20 +
 arch/arm/include/asm/armv8/mmu.h  |   1 +
 arch/arm/include/asm/config.h |   3 +
 include/common.h  |   3 +
 24 files changed, 1992 insertions(+)

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index adb11b3..eee8344 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -15,6 +15,7 @@ obj-y += cache.o
 obj-y  += tlb.o
 obj-y  += transition.o
 
+obj-$(CONFIG_FSL_LSCH2) += fsl-lsch2/
 obj-$(CONFIG_FSL_LSCH3) += fsl-lsch3/
 obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/
 obj-$(CONFIG_TARGET_HIKEY) += hisilicon/
diff --git a/arch/arm/cpu/armv8/fsl-lsch2/Makefile 
b/arch/arm/cpu/armv8/fsl-lsch2/Makefile
new file mode 100644
index 000..2280ebf
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-lsch2/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2015, Freescale Semiconductor
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += cpu.o
+obj-y += soc.o
+obj-y += lowlevel.o
+obj-y += speed.o
+obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o ls1043a_serdes.o
+obj-$(CONFIG_OF_LIBFDT) += fdt.o
diff --git a/arch/arm/cpu/armv8/fsl-lsch2/README 
b/arch/arm/cpu/armv8/fsl-lsch2/README
new file mode 100644
index 000..a6ef830
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-lsch2/README
@@ -0,0 +1,10 @@
+#
+# Copyright 2015 Freescale Semiconductor
+#
+# SPDX-License-Identifier:  GPL-2.0+
+#
+
+Freescale LayerScape with Chassis Generation 2
+
+This architecture supports Freescale ARMv8 SoCs with Chassis generation 2,
+for example LS1043A.
diff --git a/arch/arm/cpu/armv8/fsl-lsch2/cpu.c 
b/arch/arm/cpu/armv8/fsl-lsch2/cpu.c
new file mode 100644
index 000..1155723
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-lsch2/cpu.c
@@ -0,0 +1,414 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "speed.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+/*
+ * To start MMU before DDR is available, we create MMU table in SRAM.
+ * The base address of SRAM is CONFIG_SYS_FSL_OCRAM_BASE. We use three
+ * levels of translation tables here to cover 40-bit address space.
+ * We use 4KB granule size, with 40 bits physical address, T0SZ=24
+ * Level 0 IA[39], table address @0
+ * Level 1 IA[31:30], table address @01000, 0x2000
+ * Level 2 IA[29:21], table address @0x3000
+ */
+
+#define SECTION_SHIFT_L0   39UL
+#define SECTION_SHIFT_L1   30UL
+#define SECTION_SHIFT_L2   21UL
+#define BLOCK_SIZE_L0  0x80UL
+#define BLOCK_SIZE_L1  (1 << SECTION_SHIFT_L1)
+#define BLOCK_SIZE_L2  (1 << SECTION_SHIFT_L2)
+#define CONFIG_SYS_IFC_BASE0x6000UL
+#define CONFIG_SYS_IFC_SIZE0x2000UL
+#define CONFIG_SYS_IFC_BASE2   0x62000UL
+#define CONFIG_SYS_IFC_SIZE2   0x0e000UL
+#define TCR_EL2_PS_40BIT   (2 << 16)
+#define LSCH2_VA_BITS  (40)
+#define LSCH2_TCR  (TCR_TG0_4K | \
+   TCR_EL2_PS_40BIT| \
+   TCR_SHARED_NON  | \
+   TCR_ORGN_NC | \
+   TCR_IRGN_NC | \
+   TCR_T0SZ(LSCH2_VA_BITS))

[U-Boot] [Patch v2 10/16] ARMv8/ls1043ardb: Add LS1043ARDB board support

[Gong Qianyu]

From: Mingkai Hu 

LS1043ARDB Specification:
-
Memory subsystem:
 * 2GByte DDR4 SDRAM (32bit but)
 * 128 Mbyte NOR flash single-chip memory
 * 512 Mbyte NAND flash
 * 16 Mbyte high-speed SPI memory
 * SD connector to interface with the SD memory card

Ethernet:
 * XFI 10G port
 * QSGMII with 4x 1G ports
 * Two RGMII ports

PCIe:
 * PCIe2 (Lanes C) to mini-PCIe slot
 * PCIe3 (Lanes D) to PCIe slot

USB 3.0: two super speed USB 3.0 type A ports

UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Hou Zhiqiang 
Signed-off-by: Li Yang 
Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 
---
 V2:
 Replaced ns_access.h with fsl_csu.h.
 
 arch/arm/Kconfig|   7 ++
 board/freescale/ls1043ardb/Kconfig  |  16 +++
 board/freescale/ls1043ardb/MAINTAINERS  |   7 ++
 board/freescale/ls1043ardb/Makefile |   9 ++
 board/freescale/ls1043ardb/README   |  87 +++
 board/freescale/ls1043ardb/cpld.c   | 115 +++
 board/freescale/ls1043ardb/cpld.h   |  43 +++
 board/freescale/ls1043ardb/ddr.c| 190 +++
 board/freescale/ls1043ardb/ddr.h|  45 
 board/freescale/ls1043ardb/ls1043ardb.c | 134 ++
 configs/ls1043ardb_defconfig|   3 +
 drivers/i2c/mxc_i2c.c   |   2 +-
 include/configs/ls1043a_common.h| 131 ++
 include/configs/ls1043ardb.h| 191 
 14 files changed, 979 insertions(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8085a24..bc478f7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -662,6 +662,12 @@ config TARGET_LS1021ATWR
select CPU_V7
select SUPPORT_SPL
 
+config TARGET_LS1043ARDB
+   bool "Support ls1043ardb"
+   select ARM64
+   help
+ Support for Freescale LS1043ARDB platform.
+
 config TARGET_BALLOON3
bool "Support balloon3"
select CPU_PXA
@@ -827,6 +833,7 @@ source "board/freescale/ls2085aqds/Kconfig"
 source "board/freescale/ls2085ardb/Kconfig"
 source "board/freescale/ls1021aqds/Kconfig"
 source "board/freescale/ls1021atwr/Kconfig"
+source "board/freescale/ls1043ardb/Kconfig"
 source "board/freescale/mx23evk/Kconfig"
 source "board/freescale/mx25pdk/Kconfig"
 source "board/freescale/mx28evk/Kconfig"
diff --git a/board/freescale/ls1043ardb/Kconfig 
b/board/freescale/ls1043ardb/Kconfig
new file mode 100644
index 000..eb6a12a
--- /dev/null
+++ b/board/freescale/ls1043ardb/Kconfig
@@ -0,0 +1,16 @@
+
+if TARGET_LS1043ARDB
+
+config SYS_BOARD
+   default "ls1043ardb"
+
+config SYS_VENDOR
+   default "freescale"
+
+config SYS_SOC
+   default "fsl-lsch2"
+
+config SYS_CONFIG_NAME
+   default "ls1043ardb"
+
+endif
diff --git a/board/freescale/ls1043ardb/MAINTAINERS 
b/board/freescale/ls1043ardb/MAINTAINERS
new file mode 100644
index 000..b8f6be2
--- /dev/null
+++ b/board/freescale/ls1043ardb/MAINTAINERS
@@ -0,0 +1,7 @@
+LS1043A BOARD
+M: Mingkai Hu 
+S: Maintained
+F: board/freescale/ls1043ardb/
+F: board/freescale/ls1043ardb/ls1043ardb.c
+F: include/configs/ls1043ardb.h
+F: configs/ls1043ardb_defconfig
diff --git a/board/freescale/ls1043ardb/Makefile 
b/board/freescale/ls1043ardb/Makefile
new file mode 100644
index 000..dd17e2e
--- /dev/null
+++ b/board/freescale/ls1043ardb/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright 2015 Freescale Semiconductor
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += cpld.o
+obj-y += ddr.o
+obj-y += ls1043ardb.o
diff --git a/board/freescale/ls1043ardb/README 
b/board/freescale/ls1043ardb/README
new file mode 100644
index 000..0556e73
--- /dev/null
+++ b/board/freescale/ls1043ardb/README
@@ -0,0 +1,87 @@
+Overview
+
+The LS1043A Reference Design Board (RDB) is a high-performance computing,
+evaluation, and development platform that supports the QorIQ LS1043A
+LayerScape Architecture processor. The LS1043ARDB provides SW development
+platform for the Freescale LS1043A processor series, with a complete
+debugging environment. The LS1043A RDB is lead-free and RoHS-compliant.
+
+LS1043A SoC Overview
+
+The LS1043A integrated multicore processor combines four ARM Cortex-A53
+processor cores with datapath acceleration optimized for L2/3 packet
+processing, single pass security offload and robust traffic management
+and quality of service.
+
+The LS1043A SoC includes the following function and features:
+ - Four 64-bit ARM Cortex-A53 CPUs
+ - 1 MB unified L2 Cache
+ - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
+   support
+ - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
+   the following functions:
+   - Packet parsing, classification, and 

[U-Boot] [PATCH] imx6, aristaintetos2: add me as maintainer

[Heiko Schocher]

Add me as Maintainer for the aristainetos2b board.

Signed-off-by: Heiko Schocher 
---

 board/aristainetos/MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/aristainetos/MAINTAINERS b/board/aristainetos/MAINTAINERS
index 78c9b69..b463f7b 100644
--- a/board/aristainetos/MAINTAINERS
+++ b/board/aristainetos/MAINTAINERS
@@ -6,3 +6,4 @@ F:  include/configs/aristainetos.h
 F: configs/aristainetos_defconfig
 F: include/configs/aristainetos2.h
 F: configs/aristainetos2_defconfig
+F: configs/aristainetos2b_defconfig
-- 
2.1.0

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Re: [U-Boot] [PATCH] arm: socfpga: Fix cache configuration

[Marek Vasut]

On Thursday, September 17, 2015 at 05:30:29 PM, Stefan Roese wrote:
> By not defining CONFIG_SYS_ARM_CACHE_WRITEALLOC, the WRITEBACK cache
> policy is selected. This leads to much better performance on the SoCFPGA.
> A quick network test shows this:
> 
> Without this patch:
> => tftp 10 big-40mb
> Speed: 1000, full duplex
> Using dwmac.ff702000 device
> TFTP from server 192.168.1.54; our IP address is 192.168.1.252
> Filename 'big-40mb'.
> Load address: 0x10
> Loading: #
>  #
>  #
>  #
>  ##
>  2.5 MiB/s
> 
> With this patch:
> => tftp 10 big-40mb
> Speed: 1000, full duplex
> Using dwmac.ff702000 device
> TFTP from server 192.168.1.54; our IP address is 192.168.1.252
> Filename 'big-40mb'.
> Load address: 0x10
> Loading: #
>  #
>  #
>  #
>  ##
>  7.6 MiB/s
> 
> A performance improvement of factor ~3.
> 
> Signed-off-by: Stefan Roese 
> Cc: Dinh Nguyen 
> Cc: Chin Liang See 
> Cc: Pavel Machek 
> Cc: Marek Vasut 

OUCH! This actually came from the original Altera sources, darn :-(

Acked-by: Marek Vasut 

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] FIX: fat: Provide correct return code from disk_{read|write} to upper layers

[Lukasz Majewski]

Hi Tom,,

> Hi,
> 
> > It is very common that FAT code is using following pattern:
> > if (disk_{read|write}() < 0)
> > return -1;
> > 
> > Up till now the above code was dead, since disk_{read|write) could
> > only return value >= 0.
> > As a result some errors from medium layer (i.e. eMMC/SD) were not
> > caught.
> > 
> > The above behavior was caused by block_{read|write|erase} declared
> > at struct block_dev_desc (@part.h). It returns unsigned long, where
> > 0 indicates error and > 0 indicates that medium operation was
> > correct.
> > 
> > This patch as error regards 0 returned from block_{read|write|erase}
> > when nr_blocks is grater than zero. Read/Write operation with
> > nr_blocks=0 should return 0 and hence is not considered as an error.
> > 
> > Signed-off-by: Lukasz Majewski 
> 
> Are there any more questions regarding this patch? I'd be more than
> happy if it would be added to v2015.10 :-).

Gentle ping :-)

> 
> > 
> > Test HW: Odroid XU3 - Exynos 5433
> > ---
> >  fs/fat/fat.c   | 11 +--
> >  fs/fat/fat_write.c | 11 +--
> >  2 files changed, 18 insertions(+), 4 deletions(-)
> > 
> > diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> > index bccc3e3..d743014 100644
> > --- a/fs/fat/fat.c
> > +++ b/fs/fat/fat.c
> > @@ -45,11 +45,18 @@ static disk_partition_t cur_part_info;
> >  
> >  static int disk_read(__u32 block, __u32 nr_blocks, void *buf)
> >  {
> > +   ulong ret;
> > +
> > if (!cur_dev || !cur_dev->block_read)
> > return -1;
> >  
> > -   return cur_dev->block_read(cur_dev->dev,
> > -   cur_part_info.start + block, nr_blocks,
> > buf);
> > +   ret = cur_dev->block_read(cur_dev->dev,
> > + cur_part_info.start + block,
> > nr_blocks, buf); +
> > +   if (nr_blocks && ret == 0)
> > +   return -1;
> > +
> > +   return ret;
> >  }
> >  
> >  int fat_set_blk_dev(block_dev_desc_t *dev_desc, disk_partition_t
> > *info) diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
> > index 98b88ad..adb6940 100644
> > --- a/fs/fat/fat_write.c
> > +++ b/fs/fat/fat_write.c
> > @@ -30,6 +30,8 @@ static void uppercase(char *str, int len)
> >  static int total_sector;
> >  static int disk_write(__u32 block, __u32 nr_blocks, void *buf)
> >  {
> > +   ulong ret;
> > +
> > if (!cur_dev || !cur_dev->block_write)
> > return -1;
> >  
> > @@ -39,8 +41,13 @@ static int disk_write(__u32 block, __u32
> > nr_blocks, void *buf) return -1;
> > }
> >  
> > -   return cur_dev->block_write(cur_dev->dev,
> > -   cur_part_info.start + block,
> > nr_blocks,  buf);
> > +   ret = cur_dev->block_write(cur_dev->dev,
> > +  cur_part_info.start + block,
> > +  nr_blocks, buf);
> > +   if (nr_blocks && ret == 0)
> > +   return -1;
> > +
> > +   return ret;
> >  }
> >  
> >  /*
> 
> 
> 



-- 
Best regards,

Lukasz Majewski

Samsung R Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH] arm: socfpga: Fix cache configuration

[Stefan Roese]

By not defining CONFIG_SYS_ARM_CACHE_WRITEALLOC, the WRITEBACK cache
policy is selected. This leads to much better performance on the SoCFPGA.
A quick network test shows this:

Without this patch:
=> tftp 10 big-40mb
Speed: 1000, full duplex
Using dwmac.ff702000 device
TFTP from server 192.168.1.54; our IP address is 192.168.1.252
Filename 'big-40mb'.
Load address: 0x10
Loading: #
 #
 #
 #
 ##
 2.5 MiB/s

With this patch:
=> tftp 10 big-40mb
Speed: 1000, full duplex
Using dwmac.ff702000 device
TFTP from server 192.168.1.54; our IP address is 192.168.1.252
Filename 'big-40mb'.
Load address: 0x10
Loading: #
 #
 #
 #
 ##
 7.6 MiB/s

A performance improvement of factor ~3.

Signed-off-by: Stefan Roese 
Cc: Dinh Nguyen 
Cc: Chin Liang See 
Cc: Pavel Machek 
Cc: Marek Vasut 
---
 include/configs/socfpga_common.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 38ae763..a2811ba 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -73,7 +73,6 @@
 /*
  * Cache
  */
-#define CONFIG_SYS_ARM_CACHE_WRITEALLOC
 #define CONFIG_SYS_CACHELINE_SIZE 32
 #define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE  SOCFPGA_MPUL2_ADDRESS
-- 
2.5.2

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Re: [U-Boot] [PATCH 1/2] mmc: dw_mmc: Increase timeout to 20 seconds

[Lukasz Majewski]

Hi Tom,

> On Monday, September 14, 2015 at 01:22:20 PM, Lukasz Majewski wrote:
> > Hi Alexey,
> > 
> > > Hi Marek, Lukasz,
> > > 
> > > On Sun, 2015-09-13 at 16:00 +0200, Marek Vasut wrote:
> > > > On Sunday, September 13, 2015 at 12:03:18 PM, Lukasz Majewski
> > > > wrote:
> > > > > Hi Marek,
> > > > 
> > > > Hi,
> > > > 
> > > > [...]
> > > > 
> > > > > > > > Still we need to fix regression first with virtually
> > > > > > > > infinite timeout :) I would even thing that simple
> > > > > > > > revert of Marek's patch may make sense for now.
> > > > > > > 
> > > > > > > +1 - unfortunately there were some other patches applied
> > > > > > > to this particular patch. Simple revert might be a bit
> > > > > > > tricky here.
> > > > > > 
> > > > > > -1 - In case the card gets removed during the DMA transfer
> > > > > > and the board doesn't have a watchdog, it will get stuck
> > > > > > indefinitelly.
> > > > > 
> > > > > I'm just wondering here - why the indefinite loop was working
> > > > > previously? Was anybody complaining (on the ML) about the
> > > > > problem of removing the SD card when some operation is
> > > > > ongoing?
> > > > 
> > > > It worked for me for all the workloads I used. Noone was
> > > > complaining.
> > > 
> > > The same story here - previous code with infinite loop was
> > > working for my boards. And now I do see a problem with pretty
> > > simple scenario that we do use in our products.
> > > 
> > > > > The problem with potential removal of SD card (after booting
> > > > > the board) is with us for quite long time. Even with
> > > > > indefinite loop (without your patch) we also could "hang" the
> > > > > board if the SD card was removed during a transfer.
> > > > 
> > > > Which is why we should weed out the unbounded loops.
> > > > 
> > > > > > We
> > > > > > absolutelly don't want this sort of behavior in U-Boot. I
> > > > > > understand that this is the easiest way for everyone to
> > > > > > achieve some sort of "working" solution, but it is
> > > > > > definitelly not the correct one. While I do agree to
> > > > > > increasing the timeout, I do not agree to unbounded loops,
> > > > > > sorry.
> > > > > 
> > > > > We have agreed to not agree :-)
> > > > 
> > > > Yes :-)
> > > 
> > > The first thing I care is working U-Boot v2015.10 out of the box
> > > on my boards. And so I may agree on any temporary solution. I see
> > > it as timeout value either being infinite or obviously very high
> > > like 60 seconds.
> > > 
> > > 60 seconds might sound stupid but my thought behind this is to
> > > make sure even long transfers succeed. Imagine 100 Mb rootfs or
> > > update file downloaded from slow SD-card.
> > 
> > Transfer of rootfs to SD-card (downloaded to memory via tftp) is
> > definitely valid scenario.
> > 
> > > > > > > > From both points of view for keeping history
> > > > > > > > clean (compared to stacked fixes/workarounds) and from
> > > > > > > > removal of regression root cause.
> > > > > > > 
> > > > > > > As I said before - +1 from me.
> > > > > > 
> > > > > > As I said before, -1 from me. Btw. did anything regress in
> > > > > > here? To me, this seems like a newly discovered bug ...
> > > > > 
> > > > > Yes, this is a bug. We had similar problem with Samsung's
> > > > > SDHCI, before we switched to dw_mmc. This issue is new at
> > > > > dw_mmc.
> > > > > 
> > > > > > > > It's not that I like to have infinite loops but given
> > > > > > > > previous implementation worked fine for people in the
> > > > > > > > previous U-Boot release.
> > > > > > > 
> > > > > > > Good justification
> > > > > > 
> > > > > > It is never a justified to return to a potentially
> > > > > > problematic version
> > > > > 
> > > > > IMHO revering the change (before the release) is from the
> > > > > software development point of view better solution than
> > > > > adding some heuristic delta to timeout.
> > > > > 
> > > > > > for the sake of getting some sort of crappy hardware
> > > > > > operational.
> > > > > 
> > > > > Unfortunately this "crappy hardware" is pervasive and we
> > > > > cannot do anything about it.
> > > > > 
> > > > > To sum up (my point of view):
> > > > > 1. The best would be to revert the patch - but if simple "git
> > > > > revert" is not working then,
> > > 
> > > Well even if clean revert won't work we may do manual tweaks so
> > > that functionally it is "revert". If of any interest I may come
> > > up with that sort of patch.
> > > 
> > > > > 2. We should increase the timeout (with my patch) for v2015.10
> > > > > release
> > > 
> > > If everybody is OK with that let's go do it. Because release is
> > > around the corner and I don't want to explain each and every user
> > > how to fix their new problem.
> > 
> > v2015.10 correctness is crucial here.
> > 
> > > > Let's do this for the sake of crappy cards.
> > > > 
> > > > > 3. After release we can devise some kind of solution
> > > > > 4. It is a good topic for U-boot's minisummit discussion at
> > > > > Dublin
> > 

Re: [U-Boot] [U-Boot, v5, 2/9] armv8: New MMU setup code allowing to use 48+ bits PA/VA

[Sergei Temerkhanov]

On Tue, Sep 15, 2015 at 10:04 PM, Tom Rini  wrote:
> On Mon, Sep 07, 2015 at 06:18:15PM +0300, Sergey Temerkhanov wrote:
>
>> This patch adds code which sets up 2-level page tables on ARM64 thus
>> extending available VA space. CPUs implementing 64k translation
>> granule are able to use direct PA-VA mapping of the whole 48 bit
>> address space.
>> It also adds the ability to reset the SCTRL register at the very beginning
>> of execution to avoid interference from stale mappings set up by early
>> firmware/loaders/etc.
> [snip]
>> diff --git a/arch/arm/include/asm/global_data.h 
>> b/arch/arm/include/asm/global_data.h
>> index 4e3ea55..723539c 100644
>> --- a/arch/arm/include/asm/global_data.h
>> +++ b/arch/arm/include/asm/global_data.h
>> @@ -38,6 +38,7 @@ struct arch_global_data {
>>   unsigned long long timer_reset_value;
>>  #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
>>   unsigned long tlb_addr;
>> + unsigned long pmd_addr[CONFIG_SYS_PTL1_ENTRIES];
>>   unsigned long tlb_size;
>>  #endif
>
> This hunk causes massive build breakage on non-armv8:
>arm:  +   sama5d3_xplained_mmc
> +(sama5d3_xplained_mmc) In file included from ../include/common.h:149:0,
> +(sama5d3_xplained_mmc)  from ../lib/asm-offsets.c:15:
> +(sama5d3_xplained_mmc) ../arch/arm/include/asm/global_data.h:41:25: error: 
> 'CONFIG_SYS_PTL1_ENTRIES' undeclared here (not in a function)
> +(sama5d3_xplained_mmc)   unsigned long pmd_addr[CONFIG_SYS_PTL1_ENTRIES];
> +(sama5d3_xplained_mmc)  ^
> +(sama5d3_xplained_mmc) make[2]: *** [lib/asm-offsets.s] Error 1
> +(sama5d3_xplained_mmc) make[1]: *** [prepare0] Error 2
> +(sama5d3_xplained_mmc) make: *** [sub-make] Error 2
>
> --
> Tom

Needs a protective conditional, thanks for feedback

Regards,
Sergey
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Re: [U-Boot] [PATCH v2 2/3] sunxi: retrieve FEL-provided values to environment variables

[Bernhard Nortmann]

Hi!

Am 16.09.2015 um 03:00 schrieb Siarhei Siamashka:

On Mon, 14 Sep 2015 15:15:29 +0200
Bernhard Nortmann  wrote:


This patch extends the misc_init_r() function on sunxi boards
to test for the presence of a suitable "sunxi" SPL header. If
found, and the loader ("fel" utility) provided a non-zero value
for the boot.scr address, then the corresponding environment
variable fel_scriptaddr gets set.

misc_init_r() also sets (or clears) the "fel_booted" variable depending
on the active boot device, using the same logic as spl_boot_device().

The goal is to provide sufficient information (within the U-Boot
environment) to make intelligent decisions on how to continue the boot
process, allowing specific customizations for the "FEL boot" case.

Signed-off-by: Bernhard Nortmann 
---

Changes in v2:
- renamed fel_data_addr to fel_script_addr, discarded fel_data_size
- make sure that FEL-related environment vars are always cleared first
- support minimum and maximum SPL (header) version, more verbose error messages

  board/sunxi/board.c | 56 +
  1 file changed, 56 insertions(+)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 9c855f6..aa26e57 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -516,6 +516,52 @@ void get_board_serial(struct tag_serialnr *serialnr)
  }
  #endif
  
+#if !defined(CONFIG_SPL_BUILD)

+static int check_signature(unsigned long io_addr, const char *signature,
+  int length)
+{
+   do {
+   if (readb(io_addr) != *signature)
+   return 0;
+   io_addr++;
+   signature++;
+   } while (--length > 0);

It is probably better to just use memcmp() instead of this loop.

Admittedly, I'm responsible for abusing readl() in the old code,
because it allowed to fit the FEL mode check into just a single line
(the pointer casts would make it exceed the 80 characters limit):

  if (readl(4) != 0x4E4F4765 || readl(8) != 0x3054422E) { /* eGON.BT0 */

However now this readb() usage seems to do exactly the opposite and only
inflates the code unnecessarily.


That answers my questions from the introductory message. I'm glad we can
do away with that function, as it really was just introduced to 'squeeze
in' that readb() logic there. I think a nice way of dealing with the
signature checks (and their line length) is to introduce appropriate
macro wrappers in a reworked asm/arch/spl.h - e.g. have_boot0_magic()
and have_sunxi_spl().




+   return 1;
+}

+#define SPL_SIGNATURE  "SPL" /* marks "sunxi" header */
+#define SPL_MIN_VERSION1
+#define SPL_MAX_VERSION1

Can we have a way to share these defines between "board/sunxi/board.c"
and "tools/mksunxiboot.c"?


Yes, a sane(r) way of dealing with these definitions and the
boot_file_head structure shared by that code is to place them in a common
spl.h include file. As that is sunxi platform-specific I've targetted
asm/arch/spl.h - that file's content seems superseded / currently unused
anyway.




+/*
+ * Check the SPL header for the "sunxi" variant. If found: parse values
+ * that might have been passed by the loader ("fel" utility), and update
+ * the environment accordingly.
+ */
+static void parse_spl_header(void)
+{
+   uint8_t spl_header_version;
+   uint32_t fel_script_addr;
+
+   if (check_signature(0x14, SPL_SIGNATURE, 3)) {
+   spl_header_version = readb(0x17);
+   if (spl_header_version < SPL_MIN_VERSION) {
+   printf("sunxi SPL version mismatch: found 0x%02X < required 
minimum 0x%02X\n",
+  spl_header_version, SPL_MIN_VERSION);
+   return;
+   }
+   if (spl_header_version > SPL_MAX_VERSION) {
+   printf("sunxi SPL version mismatch: found 0x%02X > maximum 
supported 0x%02X\n",
+  spl_header_version, SPL_MAX_VERSION);
+   return;
+   }

Yes, having this signature check before extracting the information from
the SPL header is a good idea. Because we can have Allwinner's boot0
used together with the main U-Boot binary (for the SoC variants, which
do not have SPL support yet).

But here it is probably better to just expect the exact SPL header
version match? The SPL and the main U-Boot binary are usually both
built together from the same sources and combined into a single
u-boot-sunxi-with-spl.bin file.


Agreed. I was following the fel.c logic from sunxi-tools, but here it's
quite reasonable to expect an exact SPL_HEADER_VERSION originating from
the same U-Boot version / build.




+   fel_script_addr = readl(0x18);
+   if (fel_script_addr)
+   setenv_hex("fel_scriptaddr", fel_script_addr);
+   }
+}
+#endif /* 

Re: [U-Boot] Trying to load old kernel with new u-boot

[DaveKucharczyk]

Fabio Estevam-2 wrote
> I meant "different parents for the uart clock"

Fabio, that would make sense why it doesn't work when setting 2014 u-boot
CSCDR1 to the value in 2009 u-boot. I can check all the combinations of
clock division I want and it's never going to work since the parent is
different. 

The patch for u-boot 2009.08 states...
--
Subject: [PATCH] ENGR00133727: uart outputs messy code when kernel starts on
mx51

uart outputs messy code when kernel starts on mx51.
Change uart clock to use pll2 as source clock.
--

Looks like we never implemented that patch in our 2009 u-boot. 
Looks like that patch made it to 2014 u-boot.

So I tried setting the uart clock parent to default in u-boot 2014 in
arch/arm/cpu/armv7/mx5/lowlevel_init.S, but still the same thing happens. 

Any suggestions?

Basically I want kernel 2.6.35 to boot cleanly on the console using u-boot
2014 on an mx51 board. 



--
View this message in context: 
http://u-boot.10912.n7.nabble.com/Trying-to-load-old-kernel-with-new-u-boot-tp228429p228518.html
Sent from the U-Boot mailing list archive at Nabble.com.
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[U-Boot] [PATCH 2/3][v3] Data types defined for 64 bit physical address

[Aneesh Bansal]

Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal 
---
Changes in v3:
Corrected the definition of virt_to_phys() and definition of phys_addr_t.

 arch/arm/include/asm/io.h|  4 ++--
 arch/arm/include/asm/types.h | 10 +++---
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index bfbe0a0..75773bd 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -46,7 +46,7 @@ static inline void sync(void)
 static inline void *
 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
 {
-   return (void *)paddr;
+   return (void *)((unsigned long)paddr);
 }
 
 /*
@@ -59,7 +59,7 @@ static inline void unmap_physmem(void *vaddr, unsigned long 
flags)
 
 static inline phys_addr_t virt_to_phys(void * vaddr)
 {
-   return (phys_addr_t)(vaddr);
+   return (phys_addr_t)((unsigned long)vaddr);
 }
 
 /*
diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h
index ee77c41..388058e 100644
--- a/arch/arm/include/asm/types.h
+++ b/arch/arm/include/asm/types.h
@@ -45,12 +45,16 @@ typedef unsigned long long u64;
 #define BITS_PER_LONG 32
 #endif /* CONFIG_ARM64 */
 
-/* Dma addresses are 32-bits wide.  */
-
+#ifdef CONFIG_PHYS_64BIT
+typedef unsigned long long dma_addr_t;
+typedef unsigned long long phys_addr_t;
+typedef unsigned long long phys_size_t;
+#else
+/* DMA addresses are 32-bits wide */
 typedef u32 dma_addr_t;
-
 typedef unsigned long phys_addr_t;
 typedef unsigned long phys_size_t;
+#endif
 
 #endif /* __KERNEL__ */
 
-- 
1.8.1.4

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[U-Boot] [PATCH 1/3][v3] Pointers in ESBC header made 32 bit

[Aneesh Bansal]

For the Chain of Trust, the esbc_validate command supports
32 bit fields for location of the image. In the header structure
definition, these were declared as pointers which made them
64 bit on a 64 bit core.

Signed-off-by: Aneesh Bansal 
---
Changes in v3:
Patch Rebased and removed compile time warnings

 board/freescale/common/fsl_validate.c | 20 ++--
 include/fsl_validate.h| 14 +++---
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/board/freescale/common/fsl_validate.c 
b/board/freescale/common/fsl_validate.c
index 5283648..465676f 100644
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -63,12 +63,12 @@ static u32 check_ie(struct fsl_secboot_img_priv *img)
  * address
  */
 #if defined(CONFIG_MPC85xx)
-int get_csf_base_addr(ulong *csf_addr, ulong *flash_base_addr)
+int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr)
 {
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u32 csf_hdr_addr = in_be32(>scratchrw[0]);
u32 csf_flash_offset = csf_hdr_addr & ~(CONFIG_SYS_PBI_FLASH_BASE);
-   ulong flash_addr, addr;
+   u32 flash_addr, addr;
int found = 0;
int i = 0;
 
@@ -76,7 +76,7 @@ int get_csf_base_addr(ulong *csf_addr, ulong *flash_base_addr)
flash_addr = flash_info[i].start[0];
addr = flash_info[i].start[0] + csf_flash_offset;
if (memcmp((u8 *)addr, barker_code, ESBC_BARKER_LEN) == 0) {
-   debug("Barker found on addr %lx\n", addr);
+   debug("Barker found on addr %x\n", addr);
found = 1;
break;
}
@@ -94,7 +94,7 @@ int get_csf_base_addr(ulong *csf_addr, ulong *flash_base_addr)
 /* For platforms like LS1020, correct flash address is present in
  * the header. So the function reqturns flash base address as 0
  */
-int get_csf_base_addr(ulong *csf_addr, ulong *flash_base_addr)
+int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr)
 {
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
u32 csf_hdr_addr = in_be32(>scratchrw[0]);
@@ -108,11 +108,11 @@ int get_csf_base_addr(ulong *csf_addr, ulong 
*flash_base_addr)
 }
 #endif
 
-static int get_ie_info_addr(ulong *ie_addr)
+static int get_ie_info_addr(u32 *ie_addr)
 {
struct fsl_secboot_img_hdr *hdr;
struct fsl_secboot_sg_table *sg_tbl;
-   ulong flash_base_addr, csf_addr;
+   u32 flash_base_addr, csf_addr;
 
if (get_csf_base_addr(_addr, _base_addr))
return -1;
@@ -127,11 +127,11 @@ static int get_ie_info_addr(ulong *ie_addr)
 */
 #if defined(CONFIG_FSL_TRUST_ARCH_v1) && defined(CONFIG_FSL_CORENET)
sg_tbl = (struct fsl_secboot_sg_table *)
-(((ulong)hdr->psgtable & ~(CONFIG_SYS_PBI_FLASH_BASE)) +
+(((u32)hdr->psgtable & ~(CONFIG_SYS_PBI_FLASH_BASE)) +
  flash_base_addr);
 #else
sg_tbl = (struct fsl_secboot_sg_table *)(csf_addr +
-(ulong)hdr->psgtable);
+(u32)hdr->psgtable);
 #endif
 
/* IE Key Table is the first entry in the SG Table */
@@ -142,7 +142,7 @@ static int get_ie_info_addr(ulong *ie_addr)
*ie_addr = sg_tbl->src_addr;
 #endif
 
-   debug("IE Table address is %lx\n", *ie_addr);
+   debug("IE Table address is %x\n", *ie_addr);
return 0;
 }
 
@@ -549,7 +549,7 @@ static int read_validate_esbc_client_header(struct 
fsl_secboot_img_priv *img)
if (memcmp(hdr->barker, barker_code, ESBC_BARKER_LEN))
return ERROR_ESBC_CLIENT_HEADER_BARKER;
 
-   sprintf(buf, "%p", hdr->pimg);
+   sprintf(buf, "%x", hdr->pimg);
setenv("img_addr", buf);
 
if (!hdr->img_size)
diff --git a/include/fsl_validate.h b/include/fsl_validate.h
index c460534..92dd98b 100644
--- a/include/fsl_validate.h
+++ b/include/fsl_validate.h
@@ -82,14 +82,14 @@ struct fsl_secboot_img_hdr {
u32 psign;  /* signature offset */
u32 sign_len;   /* length of the signature in bytes */
union {
-   struct fsl_secboot_sg_table *psgtable;  /* ptr to SG table */
-   u8 *pimg;   /* ptr to ESBC client image */
+   u32 psgtable;   /* ptr to SG table */
+   u32 pimg;   /* ptr to ESBC client image */
};
union {
u32 sg_entries; /* no of entries in SG table */
u32 img_size;   /* ESBC client image size in bytes */
};
-   ulong img_start;/* ESBC client entry point */
+   u32 img_start;  /* ESBC client entry point */
u32 sg_flag;/* Scatter gather flag */
u32 uid_flag;
u32 fsl_uid_0;
@@ -133,7 +133,7 @@ struct srk_table {
  */
 

Re: [U-Boot] [PATCH] arm: mvebu: timer.c: Explicitly move "init_done" var to data section

[Simon Guinot]

On Thu, Sep 03, 2015 at 12:47:07PM +0200, Stefan Roese wrote:
> As reported by Simon Guinot, commit ade741b3
> "arm: mvebu: Call timer_init early before PHY and DDR init" breaks
> Kirkwood platforms. As the static variable "init_done" is not
> available at that early boot time. This patch moves it to explicitly
> to the data section, making it available at that time.
> 
> Signed-off-by: Stefan Roese 
> Reported-by: Simon Guinot 
> Cc: Luka Perkov 

Tested-by: Simon Guinot 

Thanks,

Simon

> ---
>  arch/arm/mach-mvebu/timer.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-mvebu/timer.c b/arch/arm/mach-mvebu/timer.c
> index c516c41..5449a89 100644
> --- a/arch/arm/mach-mvebu/timer.c
> +++ b/arch/arm/mach-mvebu/timer.c
> @@ -41,7 +41,7 @@
>  #define timestampgd->arch.tbl
>  #define lastdec  gd->arch.lastinc
>  
> -static int init_done;
> +static int init_done __attribute__((section(".data"))) = 0;
>  
>  /* Timer reload and current value registers */
>  struct kwtmr_val {
> -- 
> 2.5.1
> 
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[U-Boot] [PATCH 3/3][v3] crypto/fsl: SEC driver cleanup for 64 bit and endianness

[Aneesh Bansal]

The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the Core.
Changes:
1. Descriptor created on Core is modified as per SEC block
   endianness before the job is submitted.
2. The read/write of physical addresses to Job Rings will
   be depend on endianness of SEC block as 32 bit low and
   high part of the 64 bit address will vary.
3. The 32 bit low and high part of the 64 bit address in
   descriptor will vary depending on endianness of SEC.

Signed-off-by: Aneesh Bansal 
---
Changes in v3:sec_out_phys and sec_in_phys 
The rwad/write for 64 bit address is done using 32 bit
aadr_lo and addr_hi. There is no need to define wrapper
functions sec_out_phys and sec_in_phys.

 drivers/crypto/fsl/desc_constr.h | 26 +
 drivers/crypto/fsl/fsl_hash.c|  8 ++--
 drivers/crypto/fsl/jr.c  | 83 ++--
 drivers/crypto/fsl/jr.h  |  7 ++--
 include/fsl_sec.h|  6 +--
 5 files changed, 106 insertions(+), 24 deletions(-)

diff --git a/drivers/crypto/fsl/desc_constr.h b/drivers/crypto/fsl/desc_constr.h
index f9cae91..2559ccd 100644
--- a/drivers/crypto/fsl/desc_constr.h
+++ b/drivers/crypto/fsl/desc_constr.h
@@ -36,6 +36,23 @@
   LDST_SRCDST_WORD_DECOCTRL | \
   (LDOFF_ENABLE_AUTO_NFIFO << LDST_OFFSET_SHIFT))
 
+#ifdef CONFIG_PHYS_64BIT
+union ptr_addr_t {
+   u64 m_whole;
+   struct {
+#ifdef CONFIG_SYS_FSL_SEC_LE
+   u32 low;
+   u32 high;
+#elif defined(CONFIG_SYS_FSL_SEC_BE)
+   u32 high;
+   u32 low;
+#else
+#error Neither CONFIG_SYS_FSL_SEC_LE nor CONFIG_SYS_FSL_SEC_BE is defined
+#endif
+   } m_halfs;
+};
+#endif
+
 static inline int desc_len(u32 *desc)
 {
return *desc & HDR_DESCLEN_MASK;
@@ -65,7 +82,16 @@ static inline void append_ptr(u32 *desc, dma_addr_t ptr)
 {
dma_addr_t *offset = (dma_addr_t *)desc_end(desc);
 
+#ifdef CONFIG_PHYS_64BIT
+   /* The Position of low and high part of 64 bit address
+* will depend on the endianness of CAAM Block */
+   union ptr_addr_t ptr_addr;
+   ptr_addr.m_halfs.high = (u32)(ptr >> 32);
+   ptr_addr.m_halfs.low = (u32)ptr;
+   *offset = ptr_addr.m_whole;
+#else
*offset = ptr;
+#endif
 
(*desc) += CAAM_PTR_SZ / CAAM_CMD_SZ;
 }
diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index c298404..887e88c 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -84,7 +84,7 @@ static int caam_hash_update(void *hash_ctx, const void *buf,
enum caam_hash_algos caam_algo)
 {
uint32_t final = 0;
-   dma_addr_t addr = virt_to_phys((void *)buf);
+   phys_addr_t addr = virt_to_phys((void *)buf);
struct sha_ctx *ctx = hash_ctx;
 
if (ctx->sg_num >= MAX_SG_32) {
@@ -93,11 +93,11 @@ static int caam_hash_update(void *hash_ctx, const void *buf,
}
 
 #ifdef CONFIG_PHYS_64BIT
-   ctx->sg_tbl[ctx->sg_num].addr_hi = addr >> 32;
+   sec_out32(>sg_tbl[ctx->sg_num].addr_hi, (uint32_t)(addr >> 32));
 #else
-   ctx->sg_tbl[ctx->sg_num].addr_hi = 0x0;
+   sec_out32(>sg_tbl[ctx->sg_num].addr_hi, 0x0);
 #endif
-   ctx->sg_tbl[ctx->sg_num].addr_lo = addr;
+   sec_out32(>sg_tbl[ctx->sg_num].addr_lo, (uint32_t)addr);
 
sec_out32(>sg_tbl[ctx->sg_num].len_flag,
  (size & SG_ENTRY_LENGTH_MASK));
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index 17392c9..c88c727 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -11,6 +11,7 @@
 #include "fsl_sec.h"
 #include "jr.h"
 #include "jobdesc.h"
+#include "desc_constr.h"
 
 #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - 1))
 #define CIRC_SPACE(head, tail, size)   CIRC_CNT((tail), (head) + 1, (size))
@@ -154,19 +155,35 @@ static int jr_hw_reset(void)
 
 /* -1 --- error, can't enqueue -- no space available */
 static int jr_enqueue(uint32_t *desc_addr,
-  void (*callback)(uint32_t desc, uint32_t status, void *arg),
+  void (*callback)(uint32_t status, void *arg),
   void *arg)
 {
struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
int head = jr.head;
-   dma_addr_t desc_phys_addr = virt_to_phys(desc_addr);
+   uint32_t desc_word;
+   int length = desc_len(desc_addr);
+   int i;
+#ifdef CONFIG_PHYS_64BIT
+   uint32_t *addr_hi, *addr_lo;
+#endif
+
+   /* The descriptor must be submitted to SEC block as per endianness
+* of the SEC Block.
+* So, if the endianness of Core and SEC block is different, each word
+* of the descriptor will be byte-swapped.
+*/
+   for (i = 0; i < length; i++) {
+   desc_word = desc_addr[i];
+   sec_out32((uint32_t 

[U-Boot] [PATCH v3 3/4] sunxi: retrieve FEL-provided values to environment variables

[Bernhard Nortmann]

This patch extends the misc_init_r() function on sunxi boards
to test for the presence of a suitable "sunxi" SPL header. If
found, and the loader ("fel" utility) provided a non-zero value
for the boot.scr address, then the corresponding environment
variable fel_scriptaddr gets set.

misc_init_r() also sets (or clears) the "fel_booted" variable depending
on the active boot device, using the same logic as spl_boot_device().

The goal is to provide sufficient information (within the U-Boot
environment) to make intelligent decisions on how to continue the boot
process, allowing specific customizations for the "FEL boot" case.

Signed-off-by: Bernhard Nortmann 
---

Changes in v3:
- make use of asm/arch/spl.h to share definitions / helper macro
- revert SPL version check to expect exact SPL_HEADER_VERSION

Changes in v2:
- renamed fel_data_addr to fel_script_addr, discarded fel_data_size
- make sure that FEL-related environment vars are always cleared first
- support minimum and maximum SPL (header) version, more verbose error messages

 arch/arm/cpu/armv7/sunxi/board.c  |  2 +-
 arch/arm/include/asm/arch-sunxi/spl.h |  5 +
 arch/arm/include/asm/spl.h|  5 +
 board/sunxi/board.c   | 35 +++
 4 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index b40198b..0d68d20 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -152,7 +152,7 @@ u32 spl_boot_device(void)
 * binary over USB. If it is found, it determines where SPL was
 * read from.
 */
-   if (readl(4) != 0x4E4F4765 || readl(8) != 0x3054422E) /* eGON.BT0 */
+   if (!is_boot0_magic(SPL_ADDR + 4)) /* eGON.BT0 */
return BOOT_DEVICE_BOARD;
 
/* The BROM will try to boot from mmc0 first, so try that first. */
diff --git a/arch/arm/include/asm/arch-sunxi/spl.h 
b/arch/arm/include/asm/arch-sunxi/spl.h
index 08fe32d..8abf79a 100644
--- a/arch/arm/include/asm/arch-sunxi/spl.h
+++ b/arch/arm/include/asm/arch-sunxi/spl.h
@@ -13,6 +13,9 @@
 #define SPL_SIGNATURE  "SPL" /* marks "sunxi" SPL header */
 #define SPL_HEADER_VERSION 1
 
+/* Note: A80 will require special handling here: SPL_ADDR 0x1 */
+#define SPL_ADDR   0x0
+
 /* boot head definition from sun4i boot code */
 struct boot_file_head {
uint32_t b_instruction; /* one intruction jumping to real code */
@@ -43,4 +46,6 @@ struct boot_file_head {
uint32_t reserved;  /* padding, align to 32 bytes */
 };
 
+#define is_boot0_magic(addr)   (memcmp((void *)addr, BOOT0_MAGIC, 8) == 0)
+
 #endif
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index 6db405d..6587732 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -7,6 +7,11 @@
 #ifndef_ASM_SPL_H_
 #define_ASM_SPL_H_
 
+#if defined(CONFIG_SUNXI)
+/* sunxi platform-specific additions */
+#include 
+#endif
+
 #if defined(CONFIG_OMAP) \
|| defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \
|| defined(CONFIG_EXYNOS4210)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 9c855f6..096d127 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -516,6 +516,31 @@ void get_board_serial(struct tag_serialnr *serialnr)
 }
 #endif
 
+#if !defined(CONFIG_SPL_BUILD)
+#include 
+
+/*
+ * Check the SPL header for the "sunxi" variant. If found: parse values
+ * that might have been passed by the loader ("fel" utility), and update
+ * the environment accordingly.
+ */
+static void parse_spl_header(const uint32_t spl_addr)
+{
+   struct boot_file_head *spl = (void *)spl_addr;
+   if (memcmp(spl->spl_signature, SPL_SIGNATURE, 3) == 0) {
+   uint8_t spl_header_version = spl->spl_signature[3];
+   if (spl_header_version == SPL_HEADER_VERSION) {
+   if (spl->fel_script_address)
+   setenv_hex("fel_scriptaddr",
+  spl->fel_script_address);
+   return;
+   }
+   printf("sunxi SPL version mismatch: expected %u, got %u\n",
+  SPL_HEADER_VERSION, spl_header_version);
+   }
+}
+#endif
+
 #ifdef CONFIG_MISC_INIT_R
 int misc_init_r(void)
 {
@@ -524,6 +549,16 @@ int misc_init_r(void)
uint8_t mac_addr[6];
int ret;
 
+#if !defined(CONFIG_SPL_BUILD)
+   setenv("fel_booted", NULL);
+   setenv("fel_scriptaddr", NULL);
+   /* determine if we are running in FEL mode */
+   if (!is_boot0_magic(SPL_ADDR + 4)) { /* eGON.BT0 */
+   setenv("fel_booted", "1");
+   parse_spl_header(SPL_ADDR);
+   }
+#endif
+
ret = sunxi_get_sid(sid);
if (ret == 0 && sid[0] != 0 && sid[3] != 0) {
if (!getenv("ethaddr")) {
-- 
2.4.6

[U-Boot] [PATCH v3 1/4] sunxi: move SPL-related definitions to platform-specific include

[Bernhard Nortmann]

The sunxi platform currently doesn't seem to make any use of the
asm/arch-sunxi/spl.h file. This patch moves some declarations from
tools/mksunxiboot.c into it.

This enables us to reuse those definitions when extending the
sunxi board code (boards/sunxi/boards.c).

Signed-off-by: Bernhard Nortmann 

---

Changes in v3:
- (new with v3)

Changes in v2: None

 arch/arm/include/asm/arch-sunxi/spl.h | 25 +
 tools/mksunxiboot.c   | 17 +
 2 files changed, 18 insertions(+), 24 deletions(-)

diff --git a/arch/arm/include/asm/arch-sunxi/spl.h 
b/arch/arm/include/asm/arch-sunxi/spl.h
index acbec46..751de75 100644
--- a/arch/arm/include/asm/arch-sunxi/spl.h
+++ b/arch/arm/include/asm/arch-sunxi/spl.h
@@ -9,12 +9,21 @@
 #ifndef_ASM_ARCH_SPL_H_
 #define_ASM_ARCH_SPL_H_
 
-#define BOOT_DEVICE_NONE   0
-#define BOOT_DEVICE_XIP1
-#define BOOT_DEVICE_NAND   2
-#define BOOT_DEVICE_ONE_NAND   3
-#define BOOT_DEVICE_MMC2   5 /*emmc*/
-#define BOOT_DEVICE_MMC1   6
-#define BOOT_DEVICE_XIPWAIT7
-#define BOOT_DEVICE_MMC2_2  0xff
+#define BOOT0_MAGIC"eGON.BT0"
+
+/* boot head definition from sun4i boot code */
+struct boot_file_head {
+   uint32_t b_instruction; /* one intruction jumping to real code */
+   uint8_t magic[8];   /* ="eGON.BT0" or "eGON.BT1", not C-style str */
+   uint32_t check_sum; /* generated by PC */
+   uint32_t length;/* generated by PC */
+   /*
+* We use a simplified header, only filling in what is needed
+* by the boot ROM. To be compatible with Allwinner tools we
+* would need to implement the proper fields here instead of
+* padding.
+*/
+   uint8_t pad[12];/* align to 32 bytes */
+};
+
 #endif
diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c
index 676d392..54f4d05 100644
--- a/tools/mksunxiboot.c
+++ b/tools/mksunxiboot.c
@@ -15,23 +15,8 @@
 #include 
 #include 
 #include 
+#include "asm/arch/spl.h"
 
-/* boot head definition from sun4i boot code */
-struct boot_file_head {
-   uint32_t b_instruction; /* one intruction jumping to real code */
-   uint8_t magic[8];   /* ="eGON.BT0" or "eGON.BT1", not C-style str */
-   uint32_t check_sum; /* generated by PC */
-   uint32_t length;/* generated by PC */
-   /*
-* We use a simplified header, only filling in what is needed
-* by the boot ROM. To be compatible with Allwinner tools we
-* would need to implement the proper fields here instead of
-* padding.
-*/
-   uint8_t pad[12];/* align to 32 bytes */
-};
-
-#define BOOT0_MAGIC "eGON.BT0"
 #define STAMP_VALUE 0x5F0A6C39
 
 /* check sum functon from sun4i boot code */
-- 
2.4.6

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[U-Boot] [PATCH v3 0/4] sunxi: support FEL-provided environment vars and "fel" boot target

[Bernhard Nortmann]

This patch series builds upon
http://lists.denx.de/pipermail/u-boot/2015-September/226515.html
http://lists.denx.de/pipermail/u-boot/2015-September/226688.html

v2 combines the previous submissions, and adds some suggested
fixes/changes.

v3 introduces another patch at the start of the series to allow
using shared definitions from a common asm/arch-sunxi/spl.h
include. It's also aimed at addressing some of Siarhei's comments.

Siarhei: As I've shuffled things around a bit for that, I'm
not including your ACK on patch v3 2/4. The 4/4 one (bootcmd_fel)
is unchanged, and now includes your ACK.

The sunxi-tool side of things is discussed here:
https://www.mail-archive.com/linux-sunxi@googlegroups.com/msg13071.html

* Hans de Goede already pointed out that it might be preferable to
make use of the spl_boot_device() function even from the main
(non-SPL) U-Boot binary (e.g. for the "NAND" case). Currently this
function is only available with CONFIG_SPL_BUILD set, and
implemented in arch/arm/cpu/armv7/sunxi/board.c
Would it be safe to enable it for non-SPL builds and use something
like "(spl_boot_device == BOOT_DEVICE_BOARD)" for misc_init_r()?

* Side note: the sunxi spl_boot_device() will probably require
some future refinement anyway, to account for the 'oddball' A80.
That SoC requires the SPL at a different address (0x1 instead
of 0x0).
I've tried to address this (at least in part) by introducing a
SPL_ADDR definition in the platform-specific spl.h.

Regards, B. Nortmann

Changes in v3:
- (new with v3)
- adapted to use asm/arch/spl.h
- make use of asm/arch/spl.h to share definitions / helper macro
- revert SPL version check to expect exact SPL_HEADER_VERSION

Changes in v2:
- Rename field to fel_script_address, discard fel_data_size
- Clearing header fields is no longer needed, as mksunxiboot.c zeroes entire 
image first
- renamed fel_data_addr to fel_script_addr, discarded fel_data_size
- make sure that FEL-related environment vars are always cleared first
- support minimum and maximum SPL (header) version, more verbose error messages
- renamed fel_data_addr to fel_scriptaddr
- combined both tests into one as suggested by Hans de Goede

Bernhard Nortmann (4):
  sunxi: move SPL-related definitions to platform-specific include
  sunxi: (mksunxiboot) signature to indicate "sunxi" SPL variant
  sunxi: retrieve FEL-provided values to environment variables
  sunxi: add "fel" boot target

 arch/arm/cpu/armv7/sunxi/board.c  |  2 +-
 arch/arm/include/asm/arch-sunxi/spl.h | 47 +--
 arch/arm/include/asm/spl.h|  5 
 board/sunxi/board.c   | 35 ++
 include/configs/sunxi-common.h| 11 
 tools/mksunxiboot.c   | 21 
 6 files changed, 96 insertions(+), 25 deletions(-)

-- 
2.4.6

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[U-Boot] [PATCH v3 2/4] sunxi: (mksunxiboot) signature to indicate "sunxi" SPL variant

[Bernhard Nortmann]

This patch follows up on a discussion of ways to improve support
for the sunxi FEL ("USB boot") mechanism, especially with regard
to boot scripts, see:
https://groups.google.com/d/msg/linux-sunxi/wBEGUoLNRro/rHGq6nSYCQAJ

The idea is to convert the (currently unused) "pad" bytes in the
SPL header into an area where data can be passed to U-Boot. To
do this safely, we have to make sure that we're actually using
our "sunxi" flavor of the SPL, and not the Allwinner boot0.

The modified mksunxiboot introduces a special signature to the
SPL header in place of the "pub_head_size" field. This can be
used to reliably distinguish between compatible versions of sunxi
SPL and anything else (older variants or Allwinner's boot0).

Signed-off-by: Bernhard Nortmann 
---

Changes in v3:
- adapted to use asm/arch/spl.h

Changes in v2:
- Rename field to fel_script_address, discard fel_data_size
- Clearing header fields is no longer needed, as mksunxiboot.c zeroes entire 
image first

 arch/arm/include/asm/arch-sunxi/spl.h | 19 ++-
 tools/mksunxiboot.c   |  4 
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-sunxi/spl.h 
b/arch/arm/include/asm/arch-sunxi/spl.h
index 751de75..08fe32d 100644
--- a/arch/arm/include/asm/arch-sunxi/spl.h
+++ b/arch/arm/include/asm/arch-sunxi/spl.h
@@ -10,6 +10,8 @@
 #define_ASM_ARCH_SPL_H_
 
 #define BOOT0_MAGIC"eGON.BT0"
+#define SPL_SIGNATURE  "SPL" /* marks "sunxi" SPL header */
+#define SPL_HEADER_VERSION 1
 
 /* boot head definition from sun4i boot code */
 struct boot_file_head {
@@ -22,8 +24,23 @@ struct boot_file_head {
 * by the boot ROM. To be compatible with Allwinner tools we
 * would need to implement the proper fields here instead of
 * padding.
+*
+* Actually we want the ability to recognize our "sunxi" variant
+* of the SPL. To do so, let's place a special signature into the
+* "pub_head_size" field. We can reasonably expect Allwinner's
+* boot0 to always have the upper 16 bits of this set to 0 (after
+* all the value shouldn't be larger than the limit imposed by
+* SRAM size).
+* If the signature is present (at 0x14), then we know it's safe
+* to use the remaining 8 bytes (at 0x18) for our own purposes.
+* (E.g. sunxi-tools "fel" utility can pass information there.)
 */
-   uint8_t pad[12];/* align to 32 bytes */
+   union {
+   uint32_t pub_head_size;
+   uint8_t spl_signature[4];
+   };
+   uint32_t fel_script_address;
+   uint32_t reserved;  /* padding, align to 32 bytes */
 };
 
 #endif
diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c
index 54f4d05..9c1c5b7 100644
--- a/tools/mksunxiboot.c
+++ b/tools/mksunxiboot.c
@@ -118,6 +118,10 @@ int main(int argc, char *argv[])
ALIGN(file_size + sizeof(struct boot_file_head), BLOCK_SIZE);
img.header.b_instruction = cpu_to_le32(img.header.b_instruction);
img.header.length = cpu_to_le32(img.header.length);
+
+   memcpy(img.header.spl_signature, SPL_SIGNATURE, 3); /* "sunxi" marker */
+   img.header.spl_signature[3] = SPL_HEADER_VERSION;
+
gen_check_sum();
 
count = write(fd_out, , le32_to_cpu(img.header.length));
-- 
2.4.6

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Re: [U-Boot] [Patch v2 05/16] net: Move some header files to include/

[Scott Wood]

On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> From: Shaohui Xie 
> 
> The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM
> and PPC, move it out of ppc to include/, and change the path in
> drivers accordingly.
> 
> Signed-off-by: Shaohui Xie 
> Signed-off-by: Gong Qianyu 

Pass -M -C to git format-patch.

-Scott


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Re: [U-Boot] [PATCH v2 6/8] x86: galileo: Add PCIe root port IRQ routing

[Simon Glass]

On 10 September 2015 at 00:20, Bin Meng  wrote:
> Now we have enabled PCIe root port on Quark SoC, add its PIRQ
> routing information in the device tree as well.
>
> Signed-off-by: Bin Meng 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  arch/x86/dts/galileo.dts | 12 
>  1 file changed, 12 insertions(+)

Applied to u-boot-x86, thanks!
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[U-Boot] Please pull u-boot-x86

[Simon Glass]

Hi Tom,

Here are the rest of the quark networkng support, plus fixes for Linux
booting, etc.


The following changes since commit fa43ce842c3026c2abf19d4234d02cd4c62eeec0:

  Merge git://git.denx.de/u-boot-fdt (2015-09-16 09:53:37 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-x86.git

for you to fetch changes up to c6d4705f41d4e45e8cecc6e08b0b89df1ffe57ef:

  x86: quark: Configure MTRR to enable cache (2015-09-16 19:53:53 -0600)


Bin Meng (13):
  dm: pci: Add an inline API to test if a device is on a PCI bus
  net: designware: Add support to PCI designware devices
  x86: Convert to use driver model eth on quark/galileo
  x86: quark: Add PCIe/USB static register programming after memory init
  x86: galileo: Enable random mac address for Quark
  x86: quark: Add clrbits, setbits, clrsetbits macros for message
port access
  x86: quark: Convert to use clrbits, setbits, clrsetbits macros
  x86: quark: Lock HMBOUND register before jumping to kernel
  x86: quark: Initialize thermal sensor properly
  x86: galileo: Add PCIe root port IRQ routing
  x86: doc: Document some porting hints about Intel Quark
  x86: doc: Add DMI to the TODO list
  x86: quark: Configure MTRR to enable cache

 arch/x86/cpu/quark/dram.c  |  10 ++
 arch/x86/cpu/quark/quark.c | 249
--
 arch/x86/dts/galileo.dts   |  12 +++
 arch/x86/include/asm/arch-quark/msg_port.h |  31 
 arch/x86/include/asm/arch-quark/quark.h|  81
+
 configs/galileo_defconfig  |   3 +-
 doc/README.x86 |  26 ++
 drivers/net/designware.c   |  42 ++
 drivers/pci/pci-uclass.c   |   4 +--
 include/configs/galileo.h  |   1 +
 include/dm/device.h|  11 ++
 11 files changed, 400 insertions(+), 70 deletions(-)

Regards,
Simon
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Re: [U-Boot] [PATCH v5 1/4] dm: pci: Add an inline API to test if a device is on a PCI bus

[Simon Glass]

On 15 September 2015 at 07:51, Simon Glass  wrote:
> On 11 September 2015 at 04:24, Bin Meng  wrote:
>> Introduce device_is_on_pci_bus() which can be utilized by driver
>> to test if a device is on a PCI bus.
>>
>> Signed-off-by: Bin Meng 
>>
>> ---
>>
>> Changes in v5:
>> - Move the inline API from include/pci.h to include/dm/device.h to
>>   resolve the cyclic dependency
>>
>> Changes in v3: None
>> Changes in v2:
>> - New patch to add an inline API to test if a device is on a PCI bus
>>
>>  drivers/pci/pci-uclass.c |  4 ++--
>>  include/dm/device.h  | 11 +++
>>  2 files changed, 13 insertions(+), 2 deletions(-)
>
> Acked-by: Simon Glass 

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Re: [U-Boot] [PATCH v5 2/4] net: designware: Add support to PCI designware devices

[Simon Glass]

On 15 September 2015 at 08:20, Bin Meng  wrote:
> Hi Simon,
>
> On Tue, Sep 15, 2015 at 9:51 PM, Simon Glass  wrote:
>> On 11 September 2015 at 04:24, Bin Meng  wrote:
>>> The Designware ethernet controller is also seen on PCI bus, e.g.
>>> on Intel Quark SoC. Add this support in the DM version driver.
>>>
>>> Signed-off-by: Bin Meng 
>>>
>>> ---
>>>
>>> Changes in v5:
>>> - Wrap PCI device support with CONFIG_DM_PCI
>>>
>>> Changes in v3:
>>> - Change to use dm_pci_read_config32()
>>>
>>> Changes in v2:
>>> - Change to use device_is_on_pci_bus()
>>>
>>>  drivers/net/designware.c | 42 ++
>>>  1 file changed, 42 insertions(+)
>>
>> Acked-by: Simon Glass 
>>
>> Please see below.
>>
>>>
>>> diff --git a/drivers/net/designware.c b/drivers/net/designware.c
>>> index ae78d21..6433896 100644
>>> --- a/drivers/net/designware.c
>>> +++ b/drivers/net/designware.c
>>> @@ -14,6 +14,7 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>  #include 
>>> @@ -558,6 +559,22 @@ static int designware_eth_write_hwaddr(struct udevice 
>>> *dev)
>>> return _dw_write_hwaddr(priv, pdata->enetaddr);
>>>  }
>>>
>>> +static int designware_eth_bind(struct udevice *dev)
>>> +{
>>> +#ifdef CONFIG_DM_PCI
>>> +   static int num_cards;
>>> +   char name[20];
>>> +
>>> +   /* Create a unique device name for PCI type devices */
>>> +   if (device_is_on_pci_bus(dev)) {
>>> +   sprintf(name, "eth_designware#%u", num_cards++);
>>> +   device_set_name(dev, name);
>>> +   }
>>> +#endif
>>> +
>>> +   return 0;
>>> +}
>>> +
>>>  static int designware_eth_probe(struct udevice *dev)
>>>  {
>>> struct eth_pdata *pdata = dev_get_platdata(dev);
>>> @@ -565,6 +582,23 @@ static int designware_eth_probe(struct udevice *dev)
>>> u32 iobase = pdata->iobase;
>>> int ret;
>>>
>>> +#ifdef CONFIG_DM_PCI
>>> +   /*
>>> +* If we are on PCI bus, either directly attached to a PCI root 
>>> port,
>>> +* or via a PCI bridge, fill in platdata before we probe the 
>>> hardware.
>>> +*/
>>> +   if (device_is_on_pci_bus(dev)) {
>>> +   pci_dev_t bdf = pci_get_bdf(dev);
>>> +
>>> +   dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, );
>>> +   iobase &= PCI_BASE_ADDRESS_MEM_MASK;
>>> +   iobase = pci_mem_to_phys(bdf, iobase);
>>> +
>>> +   pdata->iobase = iobase;
>>> +   pdata->phy_interface = PHY_INTERFACE_MODE_RMII;
>>> +   }
>>> +#endif
>>> +
>>> debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
>>> priv->mac_regs_p = (struct eth_mac_regs *)iobase;
>>> priv->dma_regs_p = (struct eth_dma_regs *)(iobase + 
>>> DW_DMA_BASE_OFFSET);
>>> @@ -617,10 +651,18 @@ U_BOOT_DRIVER(eth_designware) = {
>>> .id = UCLASS_ETH,
>>> .of_match = designware_eth_ids,
>>> .ofdata_to_platdata = designware_eth_ofdata_to_platdata,
>>> +   .bind   = designware_eth_bind,
>>> .probe  = designware_eth_probe,
>>> .ops= _eth_ops,
>>> .priv_auto_alloc_size = sizeof(struct dw_eth_dev),
>>> .platdata_auto_alloc_size = sizeof(struct eth_pdata),
>>> .flags = DM_FLAG_ALLOC_PRIV_DMA,
>>>  };
>>> +
>>> +static struct pci_device_id supported[] = {
>>> +   { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_EMAC) },
>>> +   { }
>>
>> Rather than ending up with a table of these device IDs, should this go
>> in the device tree?
>
> I am OK for either way. In fact compared to the widely available PCI
> NS16550 devices from many chipset vendors, there are just two or three
> PCI variants of designware ethernet devices so far (seen from linux
> driver). I guess putting a device ID table here is not that bad.

OK let's revisit it if needed.

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Re: [U-Boot] [PATCH v5 3/4] x86: Convert to use driver model eth on quark/galileo

[Simon Glass]

On 11 September 2015 at 04:24, Bin Meng  wrote:
> Convert to use DM version of Designware ethernet driver on Intel
> quark/galileo.
>
> Signed-off-by: Bin Meng 
> Acked-by: Simon Glass 
>
> ---
>
> Changes in v5: None
> Changes in v3: None
> Changes in v2: None
>
>  arch/x86/cpu/quark/quark.c | 19 ---
>  configs/galileo_defconfig  |  2 +-
>  2 files changed, 1 insertion(+), 20 deletions(-)

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Re: [U-Boot] [PATCH v5 4/4] x86: quark: Add PCIe/USB static register programming after memory init

[Simon Glass]

On 11 September 2015 at 04:24, Bin Meng  wrote:
> This adds static register programming for PCIe and USB after memory
> init as required by Quark firmware writer guide. Although not doing
> this did not cause any malfunction, just do it for safety.
>
> Signed-off-by: Bin Meng 
> Acked-by: Simon Glass 
>
> ---
>
> Changes in v5: None
> Changes in v3: None
> Changes in v2:
> - New patch to add PCIe/USB static register programming after memory init
>
>  arch/x86/cpu/quark/quark.c  | 64 
> +
>  arch/x86/include/asm/arch-quark/quark.h | 22 
>  include/configs/galileo.h   |  1 +
>  3 files changed, 87 insertions(+)

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Re: [U-Boot] [Patch v2 07/16] net/fm: fix MDIO controller base on FMAN2

[Scott Wood]

On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> From: Shaohui Xie 
> 
> MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
> plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two
> FMANs, so we should only define MDIO controller base on FMAN2 when there
> is FMAN2.
> 
> Signed-off-by: Shaohui Xie 
> Signed-off-by: Mingkai Hu 
> Signed-off-by: Gong Qianyu 
> ---
>  include/fm_eth.h | 17 +
>  1 file changed, 17 insertions(+)
> 
> diff --git a/include/fm_eth.h b/include/fm_eth.h
> index 3e1b9f4..d43f801 100644
> --- a/include/fm_eth.h
> +++ b/include/fm_eth.h
> @@ -45,8 +45,10 @@ enum fm_eth_type {
>  #ifdef CONFIG_SYS_FMAN_V3
>  #define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR   (CONFIG_SYS_FSL_FM1_ADDR + 
> 0xfc000)
>  #define CONFIG_SYS_FM1_TGEC_MDIO_ADDR(CONFIG_SYS_FSL_FM1_ADDR + 
> 0xfd000)
> +#if (CONFIG_SYS_NUM_FMAN == 2)
>  #define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR   (CONFIG_SYS_FSL_FM2_ADDR + 
> 0xfc000)
>  #define CONFIG_SYS_FM2_TGEC_MDIO_ADDR(CONFIG_SYS_FSL_FM2_ADDR + 
> 0xfd000)
> +#endif
>  #else
>  #define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR  (CONFIG_SYS_FSL_FM1_ADDR + 
> 0xe1120)
>  #define CONFIG_SYS_FM1_TGEC_MDIO_ADDR(CONFIG_SYS_FSL_FM1_ADDR + 
> 0xf1000)
> @@ -89,6 +91,7 @@ enum fm_eth_type {
>offsetof(struct ccsr_fman, memac[n-1]),\
>  }
>  #else
> +#if (CONFIG_SYS_NUM_FMAN == 2)
> #define FM_TGEC_INFO_INITIALIZER(idx, n) \
>  {\
>   FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM2_TGEC_MDIO_ADDR) \
> @@ -101,6 +104,20 @@ enum fm_eth_type {
>   .compat_offset  = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
>   offsetof(struct ccsr_fman, memac[n-1+8]),\
>  }
> +#else
> +#define FM_TGEC_INFO_INITIALIZER(idx, n) \
> +{\
> + FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \
> + .index  = idx,  \
> + .num= n - 1,\
> + .type   = FM_ETH_10G_E, \
> + .port   = FM##idx##_10GEC##n,   \
> + .rx_port_id = RX_PORT_10G_BASE + n - 1, \
> + .tx_port_id = TX_PORT_10G_BASE + n - 1, \
> + .compat_offset  = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
> + offsetof(struct ccsr_fman, memac[n-1+8]),\
> +}
> +#endif
>  #endif

doc/README.fsl-dpaa says that CONFIG_FSL_FM_10GEC_REGULAR_NOTATION is for 
newer SoCs.  Presumably this patch is for ls1043a -- is that not considered a 
newer SoC?  Or does the README need to be fixed?

-Scott

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[U-Boot] [PATCH 3/3] cgtqmx6eval: Add USB Mass Storage support

[Otavio Salvador]

=> ums 0 mmc 0 (Mounts the micro SD)

=> ums 0 mmc 1 (Mounts the eMMC)

=> ums 0 mmc 2 (Mounts the big SD)

Signed-off-by: Otavio Salvador 
---
 include/configs/cgtqmx6eval.h | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index c86e1aa..613a4fb 100644
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@@ -75,6 +75,20 @@
 #define CONFIG_USB_KEYBOARD
 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
 
+#define CONFIG_CI_UDC
+#define CONFIG_USBD_HS
+#define CONFIG_USB_GADGET_DUALSPEED
+
+#define CONFIG_USB_GADGET
+#define CONFIG_CMD_USB_MASS_STORAGE
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_USB_GADGET_VBUS_DRAW2
+
+#define CONFIG_G_DNL_VENDOR_NUM0x0525
+#define CONFIG_G_DNL_PRODUCT_NUM   0xa4a5
+#define CONFIG_G_DNL_MANUFACTURER  "Congatec"
+
 /* Framebuffer */
 #define CONFIG_VIDEO
 #define CONFIG_VIDEO_IPUV3
-- 
2.5.2

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[U-Boot] [PATCH v3 4/4] sunxi: add "fel" boot target

[Bernhard Nortmann]

This patch makes use of the previous changes to add a new "fel" boot
target for sunxi boards.

When booting via FEL, it's often desirable to work around the absence
of other (usable) boot devices - or to be able to override them,
deviating from the standard boot sequence. To achieve this, the "fel"
boot target gets the highest priority, but won't actually do anything
unless certain criteria are met.

The "bootcmd_fel" implementation proposed here first tests if an actual
FEL boot takes place (using the "fel_booted" env var), and secondly
checks that "fel_scriptaddr" was set (originating from the 'loader',
i.e. the sunxi-tools fel utility). If both checks pass, then it will
try to execute the boot script (boot.scr) at the given address. In case
of an error (e.g. an invalid image), the source command might return
"false", causing "distro_bootcmd" to proceed with the next boot target.

Signed-off-by: Bernhard Nortmann 
Acked-by: Siarhei Siamashka 

---

Changes in v3: None
Changes in v2:
- renamed fel_data_addr to fel_scriptaddr
- combined both tests into one as suggested by Hans de Goede

 include/configs/sunxi-common.h | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 8e47d11..0161631 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -431,7 +431,18 @@ extern int soft_i2c_gpio_scl;
 #define BOOT_TARGET_DEVICES_USB(func)
 #endif
 
+/* FEL boot support, auto-execute boot.scr if a script address was provided */
+#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
+   "bootcmd_fel=" \
+   "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
+   "echo '(FEL boot)'; " \
+   "source ${fel_scriptaddr}; " \
+   "fi\0"
+#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
+   "fel "
+
 #define BOOT_TARGET_DEVICES(func) \
+   func(FEL, fel, na) \
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_SCSI(func) \
BOOT_TARGET_DEVICES_USB(func) \
-- 
2.4.6

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[U-Boot] Please pull u-boot-dm

[Simon Glass]

Hi Tom,

The following changes since commit fa43ce842c3026c2abf19d4234d02cd4c62eeec0:

  Merge git://git.denx.de/u-boot-fdt (2015-09-16 09:53:37 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-dm.git

for you to fetch changes up to 6aa8179f818f04a16e15bc589004de68a6d99a23:

  dts: do not cut down pinctrl-0 and pinctrl-names for SPL
full-pinctrl (2015-09-16 19:45:12 -0600)


Masahiro Yamada (1):
  dts: do not cut down pinctrl-0 and pinctrl-names for SPL full-pinctrl

 dts/Kconfig | 1 +
 1 file changed, 1 insertion(+)


Regards,
Simon
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Re: [U-Boot] [PATCH v2 8/8] x86: doc: Add DMI to the TODO list

[Simon Glass]

On 10 September 2015 at 00:20, Bin Meng  wrote:
> Desktop Management Interface (DMI) is not supported by U-Boot now.
> Add it to the TODO list.
>
> Signed-off-by: Bin Meng 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  doc/README.x86 | 2 ++
>  1 file changed, 2 insertions(+)

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Re: [U-Boot] [PATCH v2 5/8] x86: quark: Initialize thermal sensor properly

[Simon Glass]

On 10 September 2015 at 00:20, Bin Meng  wrote:
> Thermal sensor on Quark SoC needs to be properly initialized per
> Quark firmware writer guide, otherwise when booting Linux kernel,
> it triggers system shutdown because of wrong temperature in the
> thermal sensor is detected by the kernel driver (see below):
>
> [5.119819] thermal_sys: Critical temperature reached(206 C),shutting down
> [5.128997] Failed to start orderly shutdown: forcing the issue
> [5.135495] Emergency Sync complete
>
> Signed-off-by: Bin Meng 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  arch/x86/cpu/quark/quark.c  | 40 
> +
>  arch/x86/include/asm/arch-quark/quark.h | 14 
>  2 files changed, 54 insertions(+)

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Re: [U-Boot] [PATCH v2 1/8] x86: galileo: Enable random mac address for Quark

[Simon Glass]

On 10 September 2015 at 00:20, Bin Meng  wrote:
> Not like other Intel Ethernet controllers (e.g.: E1000), Intel Quark
> SoC integrated designware Ethernet controller does not have a chipset
> defined way to store/restore mac address. Enable random mac address
> so that we can use Ethernet even without 'ethaddr'.
>
> Signed-off-by: Bin Meng 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  configs/galileo_defconfig | 1 +
>  1 file changed, 1 insertion(+)

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Re: [U-Boot] [PATCH v2 7/8] x86: doc: Document some porting hints about Intel Quark

[Simon Glass]

On 10 September 2015 at 00:20, Bin Meng  wrote:
> Document porting considerations for Intel Quark based board,
> including MRC parameters and PCIe initialization.
>
> Signed-off-by: Bin Meng 
> Acked-by: Simon Glass 
>
> ---
>
> Changes in v2:
> - Update per review comments from Simon
>
>  doc/README.x86 | 24 
>  1 file changed, 24 insertions(+)

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Re: [U-Boot] [PATCH] x86: quark: Configure MTRR to enable cache

[Simon Glass]

On 14 September 2015 at 19:54, Simon Glass  wrote:
> On 14 September 2015 at 01:07, Bin Meng  wrote:
>> Quark SoC does not support MSR MTRRs. Fixed and variable range MTRRs
>> are accessed indirectly via the message port and not the traditional
>> MSR mechanism. Only UC, WT and WB cache types are supported.
>>
>> We configure all the fixed range MTRRs with common values (VGA RAM
>> as UC, others as WB) and 3 variable range MTRRs for ROM/eSRAM/RAM as
>> WB, which significantly improves the boot time performance.
>>
>> With this commit, it takes only 2 seconds for U-Boot to boot to shell
>> on Intel Galileo board. Previously it took about 6 seconds.
>>
>> Signed-off-by: Bin Meng 
>> ---
>>
>>  arch/x86/cpu/quark/dram.c   | 10 ++
>>  arch/x86/cpu/quark/quark.c  | 57 
>> +
>>  arch/x86/include/asm/arch-quark/quark.h | 44 +
>>  3 files changed, 111 insertions(+)
>
> Gosh what a strange an incompatible architecture we have here :-)
>
> Acked-by: Simon Glass 
> Tested-by: Simon Glass 

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Re: [U-Boot] [PATCH v2 4/8] x86: quark: Lock HMBOUND register before jumping to kernel

[Simon Glass]

On 10 September 2015 at 00:20, Bin Meng  wrote:
> When Linux kernel boots, it hangs at:
>
> [0.829408] Intel Quark side-band driver registered
>
> This happens when Quark kernel Isolated Memory Region (IMR) driver
> tries to lock an IMR register to protect kernel's text and rodata
> sections. However in order to have IMR function correctly, HMBOUND
> register must be locked otherwise the system just hangs.
>
> Signed-off-by: Bin Meng 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  arch/x86/cpu/quark/quark.c  | 3 +++
>  arch/x86/include/asm/arch-quark/quark.h | 1 +
>  2 files changed, 4 insertions(+)

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Re: [U-Boot] [PATCH v2 2/8] x86: quark: Add clrbits, setbits, clrsetbits macros for message port access

[Simon Glass]

On 10 September 2015 at 00:20, Bin Meng  wrote:
> On Intel Quark, lots of registers on the message port need be
> programmed. Add handy clrbits, setbits, clrsetbits macros for
> message port access.
>
> Signed-off-by: Bin Meng 
> Reviewed-by: Simon Glass 
>
> ---
>
> Changes in v2:
> - Change all macros to use a single msg_port_generic_clrsetbits
>
>  arch/x86/include/asm/arch-quark/msg_port.h | 31 
> ++
>  1 file changed, 31 insertions(+)

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Re: [U-Boot] [PATCH v2 3/8] x86: quark: Convert to use clrbits, setbits, clrsetbits macros

[Simon Glass]

On 10 September 2015 at 00:20, Bin Meng  wrote:
> Change existing codes to use clrbits, setbits, clrsetbits macros.
>
> Signed-off-by: Bin Meng 
> Acked-by: Simon Glass 
> ---
>
> Changes in v2: None
>
>  arch/x86/cpu/quark/quark.c | 72 
> ++
>  1 file changed, 21 insertions(+), 51 deletions(-)

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[U-Boot] [PATCH 1/3] cgtqmx6eval: Fit into a single line

[Otavio Salvador]

The printf can be put in a single line of code, so make it
simpler

Signed-off-by: Otavio Salvador 
---
 board/congatec/cgtqmx6eval/cgtqmx6eval.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c 
b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
index 9aff08d..770bc50 100644
--- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
+++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
@@ -225,8 +225,7 @@ int power_init_board(void)
 
for (i = 0; i < ARRAY_SIZE(mipi_levels); i++) {
if (!strcmp(mipi_levels[i].name, lv_mipi)) {
-   printf("set MIPI level %s\n",
-  mipi_levels[i].name);
+   printf("set MIPI level %s\n", mipi_levels[i].name);
ret = pmic_reg_write(p, PFUZE100_VGEN4VOL,
 mipi_levels[i].value);
if (ret)
-- 
2.5.2

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Re: [U-Boot] [Patch v2 08/16] net/fm: fix compile warnings for 64-bit platform

[Scott Wood]

On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> This patch fixes such compile warnings:
> 
> drivers/net/fm/eth.c: In function 'fm_eth_recv':
> drivers/net/fm/eth.c:549:11: warning: cast to pointer from integer of
> different size [-Wint-to-pointer-cast]
>   data = (u8 *)in_be32(>buf_ptr_lo);
> drivers/net/fm/fm.c: In function 'fm_muram_alloc':
> drivers/net/fm/fm.c:52:9: warning: cast to pointer from integer of
> different size [-Wint-to-pointer-cast]
>   memset((void *)ret, 0, size);
> drivers/net/fm/fm.c: In function 'fm_init_muram':
> drivers/net/fm/fm.c:59:13: warning: cast from pointer to integer of
> different size [-Wpointer-to-int-cast]
>   u32 base = (u32)reg;
> 
> Just make the cast explicit for them.
> 
> Signed-off-by: Gong Qianyu 
> ---
>  drivers/net/fm/eth.c | 31 ---
>  drivers/net/fm/fm.c  |  4 ++--
>  2 files changed, 18 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
> index 12eb9b8..6ef0afb 100644
> --- a/drivers/net/fm/eth.c
> +++ b/drivers/net/fm/eth.c
> @@ -120,12 +120,12 @@ static int tgec_is_fibre(struct eth_device *dev)
>  
>  static u16 muram_readw(u16 *addr)
>  {
> - u32 base = (u32)addr & ~0x3;
> + ulong base = (ulong)addr & ~0x3;

This will still truncate the address at 32 bits.  It needs to be ~0x3UL.


>   u32 val32 = in_be32((u32 *)base);
>   int byte_pos;
>   u16 ret;
>  
> - byte_pos = (u32)addr & 0x3;
> + byte_pos = (ulong)addr & 0x3;
>   if (byte_pos)
>   ret = (u16)(val32 & 0x);
>   else
> @@ -136,12 +136,12 @@ static u16 muram_readw(u16 *addr)
>  
>  static void muram_writew(u16 *addr, u16 val)
>  {
> - u32 base = (u32)addr & ~0x3;
> + ulong base = (ulong)addr & ~0x3;
>   u32 org32 = in_be32((u32 *)base);
>   u32 val32;
>   int byte_pos;
>  
> - byte_pos = (u32)addr & 0x3;
> + byte_pos = (ulong)addr & 0x3;
>   if (byte_pos)
>   val32 = (org32 & 0x) | val;
>   else
> @@ -217,12 +217,12 @@ static int fm_eth_rx_port_parameter_init(struct 
> fm_eth *fm_eth)
>   int i;
>  
>   /* alloc global parameter ram at MURAM */
> - pram = (struct fm_port_global_pram *)fm_muram_alloc(fm_eth->fm_index,
> - FM_PRAM_SIZE, FM_PRAM_ALIGN);
> + pram = (struct fm_port_global_pram *)(ulong)fm_muram_alloc(
> + fm_eth->fm_index, FM_PRAM_SIZE, FM_PRAM_ALIGN);

Make fm_muram_alloc() return a pointer instead.  If muram were >= 4 GiB the 
above would fail.

>   fm_eth->rx_pram = pram;
>  
>   /* parameter page offset to MURAM */
> - pram_page_offset = (u32)pram - fm_muram_base(fm_eth->fm_index);
> + pram_page_offset = (u32)(ulong)pram - fm_muram_base(fm_eth->fm_index);

Get rid of the u32 cast -- again, if the muram base were above >= 4 GiB this 
would fail because you're dropping the high bits before the subtraction 
rather than after.

>  
>   /* enable global mode- snooping data buffers and BDs */
>   out_be32(>mode, PRAM_MODE_GLOBAL);
> @@ -258,7 +258,8 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth 
> *fm_eth)
>   muram_writew(>status, RxBD_EMPTY);
>   muram_writew(>len, 0);
>   muram_writew(>buf_ptr_hi, 0);
> - out_be32(>buf_ptr_lo, (u32)rx_buf_pool + i * 
> MAX_RXBUF_LEN);
> + out_be32(>buf_ptr_lo, (u32)(ulong)rx_buf_pool +
> + i * MAX_RXBUF_LEN);
>   rxbd++;

Use virt_to_phys() and lower_32_bits().  Is there a "hi" register to handle 
the upper 32 bits?

Likewise elsewhere.  Don't just apply the minimum bandage to get rid of the 
warning.  Make the code actually be 64-bit clean.

-Scott

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[U-Boot] [PATCH 2/3] cgtqmx6eval: Add a maintainer entry

[Otavio Salvador]

Add me as the board maintainer and move the status to 'Maintained'.

Signed-off-by: Otavio Salvador 
---
 board/congatec/cgtqmx6eval/MAINTAINERS | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/congatec/cgtqmx6eval/MAINTAINERS 
b/board/congatec/cgtqmx6eval/MAINTAINERS
index 35f4a2a..c41ebf5 100644
--- a/board/congatec/cgtqmx6eval/MAINTAINERS
+++ b/board/congatec/cgtqmx6eval/MAINTAINERS
@@ -1,6 +1,6 @@
 CGTQMX6EVAL BOARD
-#M:Leo Sartre 
-S: Orphan (since 2014-06)
+M: Otavio Salvador 
+S: Maintained
 F: board/congatec/cgtqmx6eval/
 F: include/configs/cgtqmx6eval.h
 F: configs/cgtqmx6qeval_defconfig
-- 
2.5.2

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Re: [U-Boot] [PATCH 09/14] armv8/ls1043ardb: Add nand boot support

[Scott Wood]

On Wed, 2015-09-16 at 04:25 -0500, Gong Qianyu-B52263 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, September 16, 2015 6:33 AM
> > To: Gong Qianyu-B52263
> > Cc: u-boot@lists.denx.de; Xie Shaohui-B21989; Hou Zhiqiang-B48286; Hu
> > Mingkai-B21284; Song Wenbin-B53747; Sun York-R58495
> > Subject: Re: [U-Boot] [PATCH 09/14] armv8/ls1043ardb: Add nand boot
> > support
> > 
> > [Added York Sun -- please CC him on future patches]
> > 
> > On Tue, 2015-09-15 at 06:47 -0500, Gong Qianyu-B52263 wrote:
> > > > -Original Message-
> > > > From: Wood Scott-B07421
> > > > Sent: Tuesday, September 15, 2015 7:08 AM
> > > > To: Gong Qianyu-B52263
> > > > Cc: u-boot@lists.denx.de; Xie Shaohui-B21989; Hou Zhiqiang-B48286;
> > > > Hu Mingkai-B21284; Song Wenbin-B53747
> > > > Subject: Re: [U-Boot] [PATCH 09/14] armv8/ls1043ardb: Add nand boot
> > > > support
> > > > 
> > > > On Fri, 2015-09-11 at 19:07 +0800, Gong Qianyu wrote:
> > > > > Signed-off-by: Gong Qianyu 
> > > > > Signed-off-by: Hou Zhiqiang 
> > > > > Signed-off-by: Shaohui Xie 
> > > > > Signed-off-by: Mingkai Hu 
> > > > > ---
> > > > >  arch/arm/Kconfig   |  1 +
> > > > >  arch/arm/cpu/armv8/fsl-lsch2/Makefile  |  1 +
> > > > >  arch/arm/cpu/armv8/fsl-lsch2/spl.c | 91
> > > > > ++
> > > > >  arch/arm/include/asm/arch-fsl-lsch2/config.h   |  2 +
> > > > >  board/freescale/ls1043ardb/ls1043ardb_pbi.cfg  | 14 
> > > > >  board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg |  7 ++
> > > > >  configs/ls1043ardb_nand_defconfig  |  4 +
> > > > >  include/configs/ls1043a_common.h   | 31 
> > > > >  include/configs/ls1043ardb.h   | 40 ++
> > > > >  9 files changed, 191 insertions(+)
> > > > > 
> > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> > > > > f935f19..197c72d 100644
> > > > > --- a/arch/arm/Kconfig
> > > > > +++ b/arch/arm/Kconfig
> > > > > @@ -612,6 +612,7 @@ config TARGET_VEXPRESS64_BASE_FVP  config
> > > > > TARGET_VEXPRESS64_JUNO
> > > > >   bool "Support Versatile Express Juno Development Platform"
> > > > >   select ARM64
> > > > > + select SUPPORT_SPL
> > > > 
> > > > The subject line says you're adding nand boot support to ls1043ardb,
> > > > not Juno.
> > > > 
> > > > Also, the previous patch adds SUPPORT_SPL to ls1043ardb -- was it
> > > > supported in that patch (for non-NAND boot) or is that an error?
> > > > 
> > > 
> > > Sorry, this is really a patching mistake.:(
> > > 
> > > > > 
> > > > >  config TARGET_LS2085A_EMU
> > > > >   bool "Support ls2085a_emu"
> > > > > diff --git a/arch/arm/cpu/armv8/fsl-lsch2/Makefile
> > > > > b/arch/arm/cpu/armv8/fsl- lsch2/Makefile index 23c5bf9..0573659
> > > > > 100644
> > > > > --- a/arch/arm/cpu/armv8/fsl-lsch2/Makefile
> > > > > +++ b/arch/arm/cpu/armv8/fsl-lsch2/Makefile
> > > > > @@ -10,3 +10,4 @@ obj-y += lowlevel.o  obj-y += speed.o
> > > > >  obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o
> > > > > ls1043a_serdes.o
> > > > >  obj-$(CONFIG_OF_LIBFDT) += fdt.o
> > > > > +obj-$(CONFIG_SPL) += spl.o
> > > > > diff --git a/arch/arm/cpu/armv8/fsl-lsch2/spl.c
> > > > > b/arch/arm/cpu/armv8/fsl- lsch2/spl.c new file mode 100644 index
> > > > > 000..980901a
> > > > > --- /dev/null
> > > > > +++ b/arch/arm/cpu/armv8/fsl-lsch2/spl.c
> > > > > @@ -0,0 +1,91 @@
> > > > > +/*
> > > > > + * Copyright 2014 Freescale Semiconductor, Inc.
> > > > > + *
> > > > > + * SPDX-License-Identifier:  GPL-2.0+  */
> > > > > +
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include "../../../../../board/freescale/common/ns_access.h"
> > > > 
> > > > Why is this header in board/freescale/common if code outside that
> > > > directory needs it?
> > > > 
> > > > Where did you note the dependency on "ARMv7/ls1021a: move ns_access
> > > > to common file" which is not in this patchset?
> > > > 
> > > > 
> > > 
> > > The ns_access.h is common and shared by not only LS1043A but also
> > > LS1021A boards.
> > > 
> > > The "ARMv7/ls1021a” patch had been sent out much earlier while the
> > > ls1043a patches were not ready.
> > > Some details are still overlooked, though.
> > 
> > That doesn't answer my question.  If the header needs to be accessed from
> > outside board/freescale/common it should not go in board/freescale/common.
> > How about include/fsl-ns-access.h?  What does "ns" stand for here?
> > 
> 
> OK. Our team discussed and now decide to create a include/fsl_csu.h to 
> include the csu common parts.
> 
> > > 
> > > > 
> > > > > +
> > > > > + get_clocks();
> > > > > +
> > > > > + preloader_console_init();
> > > > > +
> > > > > +#ifdef CONFIG_SPL_I2C_SUPPORT
> > > > > + i2c_init_all();
> > 

[U-Boot] [PATCH 1/3] ti_omap4_common.h: Switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIAL

[Tom Rini]

Tested on Pandaboard
Signed-off-by: Tom Rini 
---
 include/configs/ti_omap4_common.h |6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/configs/ti_omap4_common.h 
b/include/configs/ti_omap4_common.h
index 1cd7dae..741f71f 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -58,11 +58,15 @@
  * Hardware drivers
  */
 #define CONFIG_SYS_NS16550
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE(-4)
 #define CONFIG_SYS_NS16550_CLK 4800
-#define CONFIG_CONS_INDEX  3
 #define CONFIG_SYS_NS16550_COM3UART3_BASE
+#else
+#define CONFIG_OMAP_SERIAL
+#endif
+#define CONFIG_CONS_INDEX  3
 
 /* TWL6030 */
 #ifndef CONFIG_SPL_BUILD
-- 
1.7.9.5

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[U-Boot] [PATCH V3 4/4] test: Add basic tests for remoteproc

[Nishanth Menon]

Use the sandbox environment for the basic tests.

Reviewed-by: Simon Glass 
Tested-by: Simon Glass 
Signed-off-by: Nishanth Menon 
---

Changes since V1:
- Comment cleanup (dropped '..')
- Picked up Simon's Tested and Reviewed tags from V2

V2: https://patchwork.ozlabs.org/patch/511749/
V1: did not exist

 test/dm/Makefile |  1 +
 test/dm/remoteproc.c | 67 
 2 files changed, 68 insertions(+)
 create mode 100644 test/dm/remoteproc.c

diff --git a/test/dm/Makefile b/test/dm/Makefile
index eda964318593..7b3626cb3294 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_DM_MMC) += mmc.o
 obj-$(CONFIG_DM_PCI) += pci.o
 obj-$(CONFIG_RAM) += ram.o
 obj-y += regmap.o
+obj-$(CONFIG_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_RESET) += reset.o
 obj-$(CONFIG_DM_RTC) += rtc.o
 obj-$(CONFIG_DM_SPI_FLASH) += sf.o
diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c
new file mode 100644
index ..0e5f3305a252
--- /dev/null
+++ b/test/dm/remoteproc.c
@@ -0,0 +1,67 @@
+/*
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated - http://www.ti.com/
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+/**
+ * dm_test_remoteproc_base() - test the operations after initializations
+ * @uts:   unit test state
+ *
+ * Return: 0 if test passed, else error
+ */
+static int dm_test_remoteproc_base(struct unit_test_state *uts)
+{
+   if (!rproc_is_initialized())
+   ut_assertok(rproc_init());
+
+   /* Ensure we are initialized */
+   ut_asserteq(true, rproc_is_initialized());
+
+
+   /* platform data device 1 */
+   ut_assertok(rproc_stop(0));
+   ut_assertok(rproc_reset(0));
+   /* -> invalid attempt tests */
+   ut_asserteq(-EINVAL, rproc_start(0));
+   ut_asserteq(-EINVAL, rproc_ping(0));
+   /* Valid tests */
+   ut_assertok(rproc_load(0, 1, 0));
+   ut_assertok(rproc_start(0));
+   ut_assertok(rproc_is_running(0));
+   ut_assertok(rproc_ping(0));
+   ut_assertok(rproc_reset(0));
+   ut_assertok(rproc_stop(0));
+
+   /* dt device device 1 */
+   ut_assertok(rproc_stop(1));
+   ut_assertok(rproc_reset(1));
+   ut_assertok(rproc_load(1, 1, 0));
+   ut_assertok(rproc_start(1));
+   ut_assertok(rproc_is_running(1));
+   ut_assertok(rproc_ping(1));
+   ut_assertok(rproc_reset(1));
+   ut_assertok(rproc_stop(1));
+
+   /* dt device device 2 */
+   ut_assertok(rproc_stop(0));
+   ut_assertok(rproc_reset(0));
+   /* -> invalid attempt tests */
+   ut_asserteq(-EINVAL, rproc_start(0));
+   ut_asserteq(-EINVAL, rproc_ping(0));
+   /* Valid tests */
+   ut_assertok(rproc_load(2, 1, 0));
+   ut_assertok(rproc_start(2));
+   ut_assertok(rproc_is_running(2));
+   ut_assertok(rproc_ping(2));
+   ut_assertok(rproc_reset(2));
+   ut_assertok(rproc_stop(2));
+
+   return 0;
+}
+DM_TEST(dm_test_remoteproc_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
-- 
2.1.4

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[U-Boot] [PATCH 2/3] ti_omap5_common.h: Switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIAL

[Tom Rini]

Tested on J6Eco EVM
Signed-off-by: Tom Rini 
---
 include/configs/ti_omap5_common.h |4 
 1 file changed, 4 insertions(+)

diff --git a/include/configs/ti_omap5_common.h 
b/include/configs/ti_omap5_common.h
index 189ea7e..9fc33aa 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -51,9 +51,13 @@
  * Hardware drivers
  */
 #define CONFIG_SYS_NS16550
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE(-4)
 #define CONFIG_SYS_NS16550_CLK 4800
+#else
+#define CONFIG_OMAP_SERIAL
+#endif
 
 /*
  * Environment setup
-- 
1.7.9.5

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Re: [U-Boot] [Patch v2 11/16] armv8/ls1043ardb: Add nand boot support

[Scott Wood]

On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> 

>  
> +/* NAND SPL */
> +#ifdef CONFIG_NAND_BOOT
> +#define CONFIG_SPL_PBL_PAD
> +#define CONFIG_SPL_FRAMEWORK
> +#define CONFIG_SPL_LDSCRIPT  "arch/arm/cpu/armv8/u-boot-spl.lds"
> +#define CONFIG_SPL_TARGET"u-boot-with-spl.bin"
> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define CONFIG_SPL_ENV_SUPPORT
> +#define CONFIG_SPL_WATCHDOG_SUPPORT
> +#define CONFIG_SPL_I2C_SUPPORT
> +#define CONFIG_SPL_SERIAL_SUPPORT
> +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
> +#define CONFIG_SPL_NAND_SUPPORT
> +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
> +#define CONFIG_SPL_TEXT_BASE 0x1000
> +#define CONFIG_SPL_MAX_SIZE  0x1a000
> +#define CONFIG_SPL_STACK 0x1001d000
> +#define CONFIG_SPL_PAD_TO0x1c000
> +#define CONFIG_SYS_NAND_U_BOOT_OFFS  CONFIG_SPL_PAD_TO
> +#define CONFIG_SYS_NAND_U_BOOT_SIZE  (640 << 10)

You made the U-Boot size be block aligned (assuming 128k block size, which 
the SoC common file should not do), but its offset is not.

-Scott

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[U-Boot] [PATCH 3/3] dra72_evm: Switch to DM_SERIAL

[Tom Rini]

Tested on J6Eco EVM.
Signed-off-by: Tom Rini 
---
 configs/dra72_evm_defconfig |2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/dra72_evm_defconfig b/configs/dra72_evm_defconfig
index 3205e72..dbf65d0 100644
--- a/configs/dra72_evm_defconfig
+++ b/configs/dra72_evm_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_OMAP54XX=y
 CONFIG_TARGET_DRA7XX_EVM=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_DEFAULT_DEVICE_TREE="dra72-evm"
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
@@ -14,4 +15,5 @@ CONFIG_SPL_DISABLE_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
-- 
1.7.9.5

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[U-Boot] [PATCH V3 1/4] drivers: Introduce a simplified remoteproc framework

[Nishanth Menon]

Many System on Chip(SoC) solutions are complex with multiple processors
on the same die dedicated to either general purpose of specialized
functions. Many examples do exist in today's SoCs from various vendors.
Typical examples are micro controllers such as an ARM M3/M0 doing a
offload of specific function such as event integration or power
management or controlling camera etc.

Traditionally, the responsibility of loading up such a processor with a
firmware and communication has been with a High Level Operating
System(HLOS) such as Linux. However, there exists classes of products
where Linux would need to expect services from such a processor or the
delay of Linux and operating system being able to load up such a
firmware is unacceptable.

To address these needs, we need some minimal capability to load such a
system and ensure it is started prior to an Operating System(Linux or
any other) is started up.

NOTE: This is NOT meant to be a solve-all solution, instead, it tries to
address certain class of SoCs and products that need such a solution.

A very simple model is introduced here as part of the initial support
that supports microcontrollers with internal memory (no MMU, no
execution from external memory, or specific image format needs). This
basic framework can then (hopefully) be extensible to other complex SoC
processor support as need be.

Reviewed-by: Simon Glass 
Signed-off-by: Nishanth Menon 
---

Changes since V2:(review comment updates)
- Changes to warning for "non-dt" users - lowercase, remove XXX
- Move function documentation to header for exported functions
- Picked up Simon's reviewed tag from V2

V2: https://patchwork.ozlabs.org/patch/511748/
V1: https://patchwork.ozlabs.org/patch/510198/

 common/Kconfig |   5 +
 common/Makefile|   1 +
 common/cmd_remoteproc.c| 281 ++
 doc/device-tree-bindings/remoteproc/remoteproc.txt |  14 +
 doc/driver-model/remoteproc-framework.txt  | 168 +
 drivers/Kconfig|   2 +
 drivers/Makefile   |   1 +
 drivers/remoteproc/Kconfig |  15 +
 drivers/remoteproc/Makefile|   7 +
 drivers/remoteproc/rproc-uclass.c  | 417 +
 include/dm/uclass-id.h |   1 +
 include/remoteproc.h   | 162 
 12 files changed, 1074 insertions(+)
 create mode 100644 common/cmd_remoteproc.c
 create mode 100644 doc/device-tree-bindings/remoteproc/remoteproc.txt
 create mode 100644 doc/driver-model/remoteproc-framework.txt
 create mode 100644 drivers/remoteproc/Kconfig
 create mode 100644 drivers/remoteproc/Makefile
 create mode 100644 drivers/remoteproc/rproc-uclass.c
 create mode 100644 include/remoteproc.h

diff --git a/common/Kconfig b/common/Kconfig
index 2c42b8e4d034..da68f494b626 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -344,6 +344,11 @@ config CMD_FPGA
help
  FPGA support.
 
+config CMD_REMOTEPROC
+   bool "remoteproc"
+   depends on REMOTEPROC
+   help
+ Support for Remote Processor control
 endmenu
 
 
diff --git a/common/Makefile b/common/Makefile
index 556fb0759292..6a5d33a90bd0 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -154,6 +154,7 @@ obj-$(CONFIG_CMD_PXE) += cmd_pxe.o
 obj-$(CONFIG_CMD_READ) += cmd_read.o
 obj-$(CONFIG_CMD_REGINFO) += cmd_reginfo.o
 obj-$(CONFIG_CMD_REISER) += cmd_reiser.o
+obj-$(CONFIG_CMD_REMOTEPROC) += cmd_remoteproc.o
 obj-$(CONFIG_SANDBOX) += cmd_host.o
 obj-$(CONFIG_CMD_SATA) += cmd_sata.o
 obj-$(CONFIG_CMD_SF) += cmd_sf.o
diff --git a/common/cmd_remoteproc.c b/common/cmd_remoteproc.c
new file mode 100644
index ..794a406b7828
--- /dev/null
+++ b/common/cmd_remoteproc.c
@@ -0,0 +1,281 @@
+/*
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated - http://www.ti.com/
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * print_remoteproc_list() - print all the remote processor devices
+ *
+ * Return: 0 if no error, else returns appropriate error value.
+ */
+static int print_remoteproc_list(void)
+{
+   struct udevice *dev;
+   struct uclass *uc;
+   int ret;
+   char *type;
+
+   ret = uclass_get(UCLASS_REMOTEPROC, );
+   if (ret) {
+   printf("Cannot find Remote processor class\n");
+   return ret;
+   }
+
+   uclass_foreach_dev(dev, uc) {
+   struct dm_rproc_uclass_pdata *uc_pdata;
+   const struct dm_rproc_ops *ops = rproc_get_ops(dev);
+
+   uc_pdata = dev_get_uclass_platdata(dev);
+
+   switch (uc_pdata->mem_type) {
+   case RPROC_INTERNAL_MEMORY_MAPPED:
+   type = "internal memory 

[U-Boot] [PATCH V3 2/4] remoteproc: Introduce a sandbox dummy driver

[Nishanth Menon]

Introduce a dummy driver for sandbox that allows us to verify basic
functionality. This is not meant to do anything functional - but is
more or less meant as a framework plumbing debug helper.

The sandbox remoteproc driver maintains absolutey no states and is a
simple driver which just is filled with empty hooks. Idea being to give
an approximate idea to implement own remoteproc driver using this as a
template.

Reviewed-by: Simon Glass 
Signed-off-by: Nishanth Menon 
---

Changes Since V2:
- Fixed TODO message for removal of non-DT pdata entry
- Picked up Simon's reviewed-by from V2

V2: https://patchwork.ozlabs.org/patch/511747/
V1: https://patchwork.ozlabs.org/patch/510197/

 drivers/remoteproc/Kconfig|   9 +
 drivers/remoteproc/Makefile   |   3 +
 drivers/remoteproc/sandbox_testproc.c | 336 ++
 3 files changed, 348 insertions(+)
 create mode 100644 drivers/remoteproc/sandbox_testproc.c

diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index 444682624ace..437224b5491f 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -12,4 +12,13 @@ config REMOTEPROC
bool
depends on DM
 
+# Please keep the configuration alphabetically sorted.
+config REMOTEPROC_SANDBOX
+   bool "Support for Test processor for Sandbox"
+   select REMOTEPROC
+   depends on DM
+   depends on SANDBOX
+   help
+ Say 'y' here to add support for test processor which does dummy
+ operations for sandbox platform.
 endmenu
diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
index 14c27929b63e..720aa6e64701 100644
--- a/drivers/remoteproc/Makefile
+++ b/drivers/remoteproc/Makefile
@@ -5,3 +5,6 @@
 #
 
 obj-$(CONFIG_REMOTEPROC) += rproc-uclass.o
+
+# Remote proc drivers - Please keep this list alphabetically sorted.
+obj-$(CONFIG_REMOTEPROC_SANDBOX) += sandbox_testproc.o
diff --git a/drivers/remoteproc/sandbox_testproc.c 
b/drivers/remoteproc/sandbox_testproc.c
new file mode 100644
index ..004c7792d186
--- /dev/null
+++ b/drivers/remoteproc/sandbox_testproc.c
@@ -0,0 +1,336 @@
+/*
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated - http://www.ti.com/
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#define pr_fmt(fmt) "%s: " fmt, __func__
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * enum sandbox_state - different device states
+ * @sb_booted: Entry condition, just booted
+ * @sb_init:   Initialized (basic environment is ready)
+ * @sb_reset:  Held in reset (accessible, but not running)
+ * @sb_loaded: Loaded with image (but not running)
+ * @sb_running:Processor is running
+ */
+enum sandbox_state {
+   sb_booted,
+   sb_init,
+   sb_reset,
+   sb_loaded,
+   sb_running
+};
+
+/**
+ * struct sandbox_test_devdata - private data per device
+ * @current_state: device current state
+ */
+struct sandbox_test_devdata {
+   enum sandbox_state current_state;
+};
+
+/**
+ * sandbox_dev_move_to_state() - statemachine for our dummy device
+ * @dev:   device to switch state
+ * @next_state:next proposed state
+ *
+ * This tries to follow the following statemachine:
+ *   Entry
+ *|
+ *v
+ * +---+
+ * +---+ init  |
+ * |   |   | <-+
+ * |   +---+   |
+ * |   |
+ * |   |
+ * |   ++  |
+ * Load|   |  reset |  |
+ * |   || <--+ |
+ * |   ++| |
+ * ||Load| |
+ * ||| |
+ * |   +v+   reset   | |
+ * +-> | |(opt)  | |
+ * |  Loaded +---+ |
+ * | | |
+ * +++ |
+ *  | Start|
+ *  +---v-+(opt)   |
+ *   +->| Running |Stop|
+ * Ping  +- | ++
+ * (opt)+-+
+ *
+ * (is_running does not change state)
+ *
+ * Return: 0 when valid state transition is seen, else returns -EINVAL
+ */
+static int sandbox_dev_move_to_state(struct udevice *dev,
+enum sandbox_state next_state)
+{
+   struct sandbox_test_devdata *ddata = dev_get_priv(dev);
+
+   /* No state transition is OK */
+   if (ddata->current_state == next_state)
+   return 0;
+
+   debug("current_state=%d, next_state=%d\n", ddata->current_state,
+ next_state);
+   switch (ddata->current_state) {
+   case sb_booted:
+   if (next_state == sb_init)
+   goto ok_state;
+   break;
+
+   case sb_init:
+ 

[U-Boot] [PATCH V3 3/4] sandbox: Introduce dummy remoteproc nodes

[Nishanth Menon]

Introduce dummy devices for sandbox remoteproc device and enable it by
default

Reviewed-by: Simon Glass 
Signed-off-by: Nishanth Menon 
---

Changes since V2:
- Picked up Simon's reviewed-by from V2.

V2: https://patchwork.ozlabs.org/patch/511750/
V1: https://patchwork.ozlabs.org/patch/510196/

 arch/sandbox/dts/test.dts | 13 +
 configs/sandbox_defconfig |  2 ++
 2 files changed, 15 insertions(+)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index f5217fb87778..730de8a57ffc 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -13,6 +13,8 @@
eth5 = _5;
i2c0 = "/i2c@0";
pci0 = 
+   remoteproc1 = _1;
+   remoteproc2 = _2;
rtc0 = _0;
rtc1 = _1;
spi0 = "/spi@0";
@@ -233,6 +235,17 @@
compatible = "sandbox,reset";
};
 
+   rproc_1: rproc@1 {
+   compatible = "sandbox,test-processor";
+   remoteproc-name = "remoteproc-test-dev1";
+   };
+
+   rproc_2: rproc@2 {
+   compatible = "sandbox,test-processor";
+   internal-memory-mapped;
+   remoteproc-name = "remoteproc-test-dev2";
+   };
+
spi@0 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index e9e1597f9acf..b9ba04acebe5 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -61,3 +61,5 @@ CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_UT_ENV=y
+CONFIG_REMOTEPROC_SANDBOX=y
+CONFIG_CMD_REMOTEPROC=y
-- 
2.1.4

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[U-Boot] [PATCH V3 0/4] drivers/sandbox: Introduce a simplified remoteproc framework

[Nishanth Menon]

Many System on Chip(SoC) solutions are complex with multiple
processors on the same die dedicated to either general purpose of
specialized functions. Many examples do exist in today's SoCs from
various vendors. Typical examples are micro controllers such as an ARM
M3/M0 doing a offload of specific function such as event integration
or power management or controlling camera etc.

Traditionally, the responsibility of loading up such a processor with
a firmware and communication has been with a High Level Operating
System(HLOS) such as Linux. However, there exists classes of products
where Linux would need to expect services from such a processor or
the delay of Linux and operating system being able to load up such a
firmware is unacceptable.

The intent here is to introduce a simplified remoteproc framework
which can then be used to provide basic services to these remote
processors.

Special thanks to Simon in helping cleaning up the series to a much
more better implementation.

The series is based on:
master fa43ce842c30 Merge git://git.denx.de/u-boot-fdt

Changes since V2:
- Minor comment updates from V2
- Review and tested tag picked up from V2

V2: http://marc.info/?l=u-boot=144073487701030=2
V1: http://lists.denx.de/pipermail/u-boot/2015-August/225085.html

Test Log: http://pastebin.ubuntu.com/12432507/

Nishanth Menon (4):
  drivers: Introduce a simplified remoteproc framework
  remoteproc: Introduce a sandbox dummy driver
  sandbox: Introduce dummy remoteproc nodes
  test: Add basic tests for remoteproc

 arch/sandbox/dts/test.dts  |  13 +
 common/Kconfig |   5 +
 common/Makefile|   1 +
 common/cmd_remoteproc.c| 281 ++
 configs/sandbox_defconfig  |   2 +
 doc/device-tree-bindings/remoteproc/remoteproc.txt |  14 +
 doc/driver-model/remoteproc-framework.txt  | 168 +
 drivers/Kconfig|   2 +
 drivers/Makefile   |   1 +
 drivers/remoteproc/Kconfig |  24 ++
 drivers/remoteproc/Makefile|  10 +
 drivers/remoteproc/rproc-uclass.c  | 417 +
 drivers/remoteproc/sandbox_testproc.c  | 336 +
 include/dm/uclass-id.h |   1 +
 include/remoteproc.h   | 162 
 test/dm/Makefile   |   1 +
 test/dm/remoteproc.c   |  67 
 17 files changed, 1505 insertions(+)
 create mode 100644 common/cmd_remoteproc.c
 create mode 100644 doc/device-tree-bindings/remoteproc/remoteproc.txt
 create mode 100644 doc/driver-model/remoteproc-framework.txt
 create mode 100644 drivers/remoteproc/Kconfig
 create mode 100644 drivers/remoteproc/Makefile
 create mode 100644 drivers/remoteproc/rproc-uclass.c
 create mode 100644 drivers/remoteproc/sandbox_testproc.c
 create mode 100644 include/remoteproc.h
 create mode 100644 test/dm/remoteproc.c

-- 
2.1.4

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Re: [U-Boot] Please pull u-boot-x86

[Tom Rini]

On Thu, Sep 17, 2015 at 12:56:04PM -0600, Simon Glass wrote:

> Hi Tom,
> 
> Here are the rest of the quark networkng support, plus fixes for Linux
> booting, etc.
> 
> 
> The following changes since commit fa43ce842c3026c2abf19d4234d02cd4c62eeec0:
> 
>   Merge git://git.denx.de/u-boot-fdt (2015-09-16 09:53:37 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-x86.git
> 
> for you to fetch changes up to c6d4705f41d4e45e8cecc6e08b0b89df1ffe57ef:
> 
>   x86: quark: Configure MTRR to enable cache (2015-09-16 19:53:53 -0600)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v3 3/4] sunxi: retrieve FEL-provided values to environment variables

[Hans de Goede]

Hi,

On 09/17/2015 12:52 PM, Bernhard Nortmann wrote:

This patch extends the misc_init_r() function on sunxi boards
to test for the presence of a suitable "sunxi" SPL header. If
found, and the loader ("fel" utility) provided a non-zero value
for the boot.scr address, then the corresponding environment
variable fel_scriptaddr gets set.

misc_init_r() also sets (or clears) the "fel_booted" variable depending
on the active boot device, using the same logic as spl_boot_device().

The goal is to provide sufficient information (within the U-Boot
environment) to make intelligent decisions on how to continue the boot
process, allowing specific customizations for the "FEL boot" case.

Signed-off-by: Bernhard Nortmann 
---

Changes in v3:
- make use of asm/arch/spl.h to share definitions / helper macro
- revert SPL version check to expect exact SPL_HEADER_VERSION

Changes in v2:
- renamed fel_data_addr to fel_script_addr, discarded fel_data_size
- make sure that FEL-related environment vars are always cleared first
- support minimum and maximum SPL (header) version, more verbose error messages

  arch/arm/cpu/armv7/sunxi/board.c  |  2 +-
  arch/arm/include/asm/arch-sunxi/spl.h |  5 +
  arch/arm/include/asm/spl.h|  5 +
  board/sunxi/board.c   | 35 +++
  4 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index b40198b..0d68d20 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -152,7 +152,7 @@ u32 spl_boot_device(void)
 * binary over USB. If it is found, it determines where SPL was
 * read from.
 */
-   if (readl(4) != 0x4E4F4765 || readl(8) != 0x3054422E) /* eGON.BT0 */
+   if (!is_boot0_magic(SPL_ADDR + 4)) /* eGON.BT0 */
return BOOT_DEVICE_BOARD;

/* The BROM will try to boot from mmc0 first, so try that first. */
diff --git a/arch/arm/include/asm/arch-sunxi/spl.h 
b/arch/arm/include/asm/arch-sunxi/spl.h
index 08fe32d..8abf79a 100644
--- a/arch/arm/include/asm/arch-sunxi/spl.h
+++ b/arch/arm/include/asm/arch-sunxi/spl.h
@@ -13,6 +13,9 @@
  #define SPL_SIGNATURE "SPL" /* marks "sunxi" SPL header */
  #define SPL_HEADER_VERSION1

+/* Note: A80 will require special handling here: SPL_ADDR 0x1 */
+#define SPL_ADDR   0x0
+
  /* boot head definition from sun4i boot code */
  struct boot_file_head {
uint32_t b_instruction; /* one intruction jumping to real code */
@@ -43,4 +46,6 @@ struct boot_file_head {
uint32_t reserved;  /* padding, align to 32 bytes */
  };

+#define is_boot0_magic(addr)   (memcmp((void *)addr, BOOT0_MAGIC, 8) == 0)
+
  #endif
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index 6db405d..6587732 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -7,6 +7,11 @@
  #ifndef   _ASM_SPL_H_
  #define   _ASM_SPL_H_

+#if defined(CONFIG_SUNXI)
+/* sunxi platform-specific additions */
+#include 
+#endif
+
  #if defined(CONFIG_OMAP) \
|| defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \
|| defined(CONFIG_EXYNOS4210)


There is no need to pollute a non sunxi header this way, we can simply
do "#include " where needed.

No need to resend I've fixed this up in my tree.

Regards,

Hans



diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 9c855f6..096d127 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -516,6 +516,31 @@ void get_board_serial(struct tag_serialnr *serialnr)
  }
  #endif

+#if !defined(CONFIG_SPL_BUILD)
+#include 
+
+/*
+ * Check the SPL header for the "sunxi" variant. If found: parse values
+ * that might have been passed by the loader ("fel" utility), and update
+ * the environment accordingly.
+ */
+static void parse_spl_header(const uint32_t spl_addr)
+{
+   struct boot_file_head *spl = (void *)spl_addr;
+   if (memcmp(spl->spl_signature, SPL_SIGNATURE, 3) == 0) {
+   uint8_t spl_header_version = spl->spl_signature[3];
+   if (spl_header_version == SPL_HEADER_VERSION) {
+   if (spl->fel_script_address)
+   setenv_hex("fel_scriptaddr",
+  spl->fel_script_address);
+   return;
+   }
+   printf("sunxi SPL version mismatch: expected %u, got %u\n",
+  SPL_HEADER_VERSION, spl_header_version);
+   }
+}
+#endif
+
  #ifdef CONFIG_MISC_INIT_R
  int misc_init_r(void)
  {
@@ -524,6 +549,16 @@ int misc_init_r(void)
uint8_t mac_addr[6];
int ret;

+#if !defined(CONFIG_SPL_BUILD)
+   setenv("fel_booted", NULL);
+   setenv("fel_scriptaddr", NULL);
+   /* determine if we are running in FEL mode */
+   if (!is_boot0_magic(SPL_ADDR + 4)) { /* eGON.BT0 */
+   

Re: [U-Boot] [PATCH v3 0/4] sunxi: support FEL-provided environment vars and "fel" boot target

[Hans de Goede]

Hi,

On 09/17/2015 12:52 PM, Bernhard Nortmann wrote:

This patch series builds upon
http://lists.denx.de/pipermail/u-boot/2015-September/226515.html
http://lists.denx.de/pipermail/u-boot/2015-September/226688.html

v2 combines the previous submissions, and adds some suggested
fixes/changes.

v3 introduces another patch at the start of the series to allow
using shared definitions from a common asm/arch-sunxi/spl.h
include. It's also aimed at addressing some of Siarhei's comments.

Siarhei: As I've shuffled things around a bit for that, I'm
not including your ACK on patch v3 2/4. The 4/4 one (bootcmd_fel)
is unchanged, and now includes your ACK.

The sunxi-tool side of things is discussed here:
https://www.mail-archive.com/linux-sunxi@googlegroups.com/msg13071.html

* Hans de Goede already pointed out that it might be preferable to
make use of the spl_boot_device() function even from the main
(non-SPL) U-Boot binary (e.g. for the "NAND" case). Currently this
function is only available with CONFIG_SPL_BUILD set, and
implemented in arch/arm/cpu/armv7/sunxi/board.c
Would it be safe to enable it for non-SPL builds and use something
like "(spl_boot_device == BOOT_DEVICE_BOARD)" for misc_init_r()?

* Side note: the sunxi spl_boot_device() will probably require
some future refinement anyway, to account for the 'oddball' A80.
That SoC requires the SPL at a different address (0x1 instead
of 0x0).
I've tried to address this (at least in part) by introducing a
SPL_ADDR definition in the platform-specific spl.h.





Regards, B. Nortmann

Changes in v3:
- (new with v3)
- adapted to use asm/arch/spl.h
- make use of asm/arch/spl.h to share definitions / helper macro
- revert SPL version check to expect exact SPL_HEADER_VERSION

Changes in v2:
- Rename field to fel_script_address, discard fel_data_size
- Clearing header fields is no longer needed, as mksunxiboot.c zeroes entire 
image first
- renamed fel_data_addr to fel_script_addr, discarded fel_data_size
- make sure that FEL-related environment vars are always cleared first
- support minimum and maximum SPL (header) version, more verbose error messages
- renamed fel_data_addr to fel_scriptaddr
- combined both tests into one as suggested by Hans de Goede

Bernhard Nortmann (4):
   sunxi: move SPL-related definitions to platform-specific include
   sunxi: (mksunxiboot) signature to indicate "sunxi" SPL variant
   sunxi: retrieve FEL-provided values to environment variables
   sunxi: add "fel" boot target

  arch/arm/cpu/armv7/sunxi/board.c  |  2 +-
  arch/arm/include/asm/arch-sunxi/spl.h | 47 +--
  arch/arm/include/asm/spl.h|  5 
  board/sunxi/board.c   | 35 ++
  include/configs/sunxi-common.h| 11 
  tools/mksunxiboot.c   | 21 
  6 files changed, 96 insertions(+), 25 deletions(-)


Thanks, I've added these to my personal tree and will include
it in a future pull-req.

Regards,

Hans

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Re: [U-Boot] Please pull u-boot-dm

[Tom Rini]

On Thu, Sep 17, 2015 at 12:53:35PM -0600, Simon Glass wrote:

> Hi Tom,
> 
> The following changes since commit fa43ce842c3026c2abf19d4234d02cd4c62eeec0:
> 
>   Merge git://git.denx.de/u-boot-fdt (2015-09-16 09:53:37 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-dm.git
> 
> for you to fetch changes up to 6aa8179f818f04a16e15bc589004de68a6d99a23:
> 
>   dts: do not cut down pinctrl-0 and pinctrl-names for SPL
> full-pinctrl (2015-09-16 19:45:12 -0600)
> 

Applied to u-boot/master, thanks!

-- 
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[U-Boot] [PATCH v2 4/5] ubifs: Add generic fs support

[Hans de Goede]

Add generic fs support, so that commands like ls, load and test -e can be
used on ubifs.

Signed-off-by: Hans de Goede 
Reviewed-by: Heiko Schocher 
---
Changes in v2:
-Do not allow building in both hostfs and ubifs support as both use NULL
 as magic blkdev
---
 disk/part.c  | 27 +++
 fs/fs.c  | 16 
 include/fs.h |  1 +
 3 files changed, 44 insertions(+)

diff --git a/disk/part.c b/disk/part.c
index 8c65cdb..e57a252 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #undef PART_DEBUG
 
@@ -511,6 +512,10 @@ int get_device_and_partition(const char *ifname, const 
char *dev_part_str,
int part;
disk_partition_t tmpinfo;
 
+#if defined CONFIG_SANDBOX && defined CONFIG_CMD_UBIFS
+#error Only one of CONFIG_SANDBOX and CONFIG_CMD_UBIFS may be selected
+#endif
+
 #ifdef CONFIG_SANDBOX
/*
 * Special-case a pseudo block device "hostfs", to allow access to the
@@ -532,6 +537,28 @@ int get_device_and_partition(const char *ifname, const 
char *dev_part_str,
}
 #endif
 
+#ifdef CONFIG_CMD_UBIFS
+   /*
+* Special-case ubi, ubi goes through a mtd, rathen then through
+* a regular block device.
+*/
+   if (0 == strcmp(ifname, "ubi")) {
+   if (!ubifs_is_mounted()) {
+   printf("UBIFS not mounted, use ubifsmount to mount 
volume first!\n");
+   return -1;
+   }
+
+   *dev_desc = NULL;
+   memset(info, 0, sizeof(*info));
+   strcpy((char *)info->type, BOOT_PART_TYPE);
+   strcpy((char *)info->name, "UBI");
+#ifdef CONFIG_PARTITION_UUIDS
+   info->uuid[0] = 0;
+#endif
+   return 0;
+   }
+#endif
+
/* If no dev_part_str, use bootdevice environment variable */
if (!dev_part_str || !strlen(dev_part_str) ||
!strcmp(dev_part_str, "-"))
diff --git a/fs/fs.c b/fs/fs.c
index 827b143..b2d6a53 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -157,6 +158,21 @@ static struct fstype_info fstypes[] = {
.uuid = fs_uuid_unsupported,
},
 #endif
+#ifdef CONFIG_CMD_UBIFS
+   {
+   .fstype = FS_TYPE_UBIFS,
+   .name = "ubifs",
+   .null_dev_desc_ok = true,
+   .probe = ubifs_set_blk_dev,
+   .close = ubifs_close,
+   .ls = ubifs_ls,
+   .exists = ubifs_exists,
+   .size = ubifs_size,
+   .read = ubifs_read,
+   .write = fs_write_unsupported,
+   .uuid = fs_uuid_unsupported,
+   },
+#endif
{
.fstype = FS_TYPE_ANY,
.name = "unsupported",
diff --git a/include/fs.h b/include/fs.h
index fd1e4ab..059a395 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -22,6 +22,7 @@
 #define FS_TYPE_FAT1
 #define FS_TYPE_EXT2
 #define FS_TYPE_SANDBOX3
+#define FS_TYPE_UBIFS  4
 
 /*
  * Tell the fs layer which block device an partition to use for future
-- 
2.4.3

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[U-Boot] [PATCH v2 3/5] ubifs: Add functions for generic fs use

[Hans de Goede]

Implement the necessary functions for implementing generic fs support
for ubifs.

Signed-off-by: Hans de Goede 
Reviewed-by: Heiko Schocher 
---
Changes in v2:
-Use debug rather then printf in ubifs_set_blk_dev() to avoid false
 positive error messages when using generic fs commands
---
 fs/ubifs/ubifs.c  | 65 +++
 include/ubifs_uboot.h |  4 
 2 files changed, 69 insertions(+)

diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
index 0a7a7bf..d7f307b 100644
--- a/fs/ubifs/ubifs.c
+++ b/fs/ubifs/ubifs.c
@@ -570,6 +570,25 @@ static unsigned long ubifs_findfile(struct super_block 
*sb, char *filename)
return 0;
 }
 
+int ubifs_set_blk_dev(block_dev_desc_t *rbdd, disk_partition_t *info)
+{
+   if (rbdd) {
+   debug("UBIFS cannot be used with normal block devices\n");
+   return -1;
+   }
+
+   /*
+* Should never happen since get_device_and_partition() already checks
+* this, but better safe then sorry.
+*/
+   if (!ubifs_is_mounted()) {
+   debug("UBIFS not mounted, use ubifsmount to mount volume 
first!\n");
+   return -1;
+   }
+
+   return 0;
+}
+
 int ubifs_ls(const char *filename)
 {
struct ubifs_info *c = ubifs_sb->s_fs_info;
@@ -618,6 +637,48 @@ out:
return ret;
 }
 
+int ubifs_exists(const char *filename)
+{
+   struct ubifs_info *c = ubifs_sb->s_fs_info;
+   unsigned long inum;
+
+   c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY);
+   inum = ubifs_findfile(ubifs_sb, (char *)filename);
+   ubi_close_volume(c->ubi);
+
+   return inum != 0;
+}
+
+int ubifs_size(const char *filename, loff_t *size)
+{
+   struct ubifs_info *c = ubifs_sb->s_fs_info;
+   unsigned long inum;
+   struct inode *inode;
+   int err = 0;
+
+   c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY);
+
+   inum = ubifs_findfile(ubifs_sb, (char *)filename);
+   if (!inum) {
+   err = -1;
+   goto out;
+   }
+
+   inode = ubifs_iget(ubifs_sb, inum);
+   if (IS_ERR(inode)) {
+   printf("%s: Error reading inode %ld!\n", __func__, inum);
+   err = PTR_ERR(inode);
+   goto out;
+   }
+
+   *size = inode->i_size;
+
+   ubifs_iput(inode);
+out:
+   ubi_close_volume(c->ubi);
+   return err;
+}
+
 /*
  * ubifsload...
  */
@@ -875,6 +936,10 @@ out:
return err;
 }
 
+void ubifs_close(void)
+{
+}
+
 /* Compat wrappers for common/cmd_ubifs.c */
 int ubifs_load(char *filename, u32 addr, u32 size)
 {
diff --git a/include/ubifs_uboot.h b/include/ubifs_uboot.h
index 3e0cd72..dab433a 100644
--- a/include/ubifs_uboot.h
+++ b/include/ubifs_uboot.h
@@ -21,8 +21,12 @@ void uboot_ubifs_umount(void);
 int ubifs_is_mounted(void);
 int ubifs_load(char *filename, u32 addr, u32 size);
 
+int ubifs_set_blk_dev(block_dev_desc_t *rbdd, disk_partition_t *info);
 int ubifs_ls(const char *dir_name);
+int ubifs_exists(const char *filename);
+int ubifs_size(const char *filename, loff_t *size);
 int ubifs_read(const char *filename, void *buf, loff_t offset,
   loff_t size, loff_t *actread);
+void ubifs_close(void);
 
 #endif /* __UBIFS_UBOOT_H__ */
-- 
2.4.3

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[U-Boot] [PATCH v2 2/5] ubifs: Modify ubifs u-boot wrapper function prototypes for generic fs use

[Hans de Goede]

Modify the ubifs u-boot wrapper function prototypes for generic fs use,
and give them their own header file.

This is a preparation patch for adding ubifs support to the generic fs
code from fs/fs.c.

Signed-off-by: Hans de Goede 
Reviewed-by: Heiko Schocher 
---
Changes in v2:
-No changes in v2
---
 common/cmd_ubifs.c| 12 ++---
 fs/ubifs/ubifs.c  | 70 ---
 fs/ubifs/ubifs.h  |  6 +
 include/ubifs_uboot.h | 28 +
 4 files changed, 87 insertions(+), 29 deletions(-)
 create mode 100644 include/ubifs_uboot.h

diff --git a/common/cmd_ubifs.c b/common/cmd_ubifs.c
index 8e9a4e5..5e9d357 100644
--- a/common/cmd_ubifs.c
+++ b/common/cmd_ubifs.c
@@ -15,8 +15,7 @@
 #include 
 #include 
 #include 
-
-#include "../fs/ubifs/ubifs.h"
+#include 
 
 static int ubifs_initialized;
 static int ubifs_mounted;
@@ -54,14 +53,7 @@ int ubifs_is_mounted(void)
 
 void cmd_ubifs_umount(void)
 {
-
-   if (ubifs_sb) {
-   printf("Unmounting UBIFS volume %s!\n",
-  ((struct ubifs_info *)(ubifs_sb->s_fs_info))->vi.name);
-   ubifs_umount(ubifs_sb->s_fs_info);
-   }
-
-   ubifs_sb = NULL;
+   uboot_ubifs_umount();
ubifs_mounted = 0;
ubifs_initialized = 0;
 }
diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
index f7a0847..0a7a7bf 100644
--- a/fs/ubifs/ubifs.c
+++ b/fs/ubifs/ubifs.c
@@ -570,7 +570,7 @@ static unsigned long ubifs_findfile(struct super_block *sb, 
char *filename)
return 0;
 }
 
-int ubifs_ls(char *filename)
+int ubifs_ls(const char *filename)
 {
struct ubifs_info *c = ubifs_sb->s_fs_info;
struct file *file;
@@ -581,7 +581,7 @@ int ubifs_ls(char *filename)
int ret = 0;
 
c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY);
-   inum = ubifs_findfile(ubifs_sb, filename);
+   inum = ubifs_findfile(ubifs_sb, (char *)filename);
if (!inum) {
ret = -1;
goto out;
@@ -787,7 +787,8 @@ error:
return err;
 }
 
-int ubifs_load(char *filename, u32 addr, u32 size)
+int ubifs_read(const char *filename, void *buf, loff_t offset,
+  loff_t size, loff_t *actread)
 {
struct ubifs_info *c = ubifs_sb->s_fs_info;
unsigned long inum;
@@ -798,10 +799,18 @@ int ubifs_load(char *filename, u32 addr, u32 size)
int count;
int last_block_size = 0;
 
+   *actread = 0;
+
+   if (offset & (PAGE_SIZE - 1)) {
+   printf("ubifs: Error offset must be a multple of %d\n",
+  PAGE_SIZE);
+   return -1;
+   }
+
c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY);
/* ubifs_findfile will resolve symlinks, so we know that we get
 * the real file here */
-   inum = ubifs_findfile(ubifs_sb, filename);
+   inum = ubifs_findfile(ubifs_sb, (char *)filename);
if (!inum) {
err = -1;
goto out;
@@ -817,19 +826,24 @@ int ubifs_load(char *filename, u32 addr, u32 size)
goto out;
}
 
+   if (offset > inode->i_size) {
+   printf("ubifs: Error offset (%lld) > file-size (%lld)\n",
+  offset, size);
+   err = -1;
+   goto put_inode;
+   }
+
/*
 * If no size was specified or if size bigger than filesize
 * set size to filesize
 */
-   if ((size == 0) || (size > inode->i_size))
-   size = inode->i_size;
+   if ((size == 0) || (size > (inode->i_size - offset)))
+   size = inode->i_size - offset;
 
count = (size + UBIFS_BLOCK_SIZE - 1) >> UBIFS_BLOCK_SHIFT;
-   printf("Loading file '%s' to addr 0x%08x with size %d (0x%08x)...\n",
-  filename, addr, size, size);
 
-   page.addr = (void *)addr;
-   page.index = 0;
+   page.addr = buf;
+   page.index = offset / PAGE_SIZE;
page.inode = inode;
for (i = 0; i < count; i++) {
/*
@@ -846,16 +860,44 @@ int ubifs_load(char *filename, u32 addr, u32 size)
page.index++;
}
 
-   if (err)
+   if (err) {
printf("Error reading file '%s'\n", filename);
-   else {
-   setenv_hex("filesize", size);
-   printf("Done\n");
+   *actread = i * PAGE_SIZE;
+   } else {
+   *actread = size;
}
 
+put_inode:
ubifs_iput(inode);
 
 out:
ubi_close_volume(c->ubi);
return err;
 }
+
+/* Compat wrappers for common/cmd_ubifs.c */
+int ubifs_load(char *filename, u32 addr, u32 size)
+{
+   loff_t actread;
+   int err;
+
+   printf("Loading file '%s' to addr 0x%08x...\n", filename, addr);
+
+   err = ubifs_read(filename, (void *)addr, 0, size, );
+   if (err == 0) {
+   setenv_hex("filesize", actread);
+  

[U-Boot] [PATCH v2 1/5] disk/part: Only build hostfs special handling when CONFIG_SANDBOX is set

[Hans de Goede]

This is not necessary / useful when not building with CONFIG_SANDBOX and
with the addition of ubifs support to the generic fs commands it actually
gets in the way, since both operate on a fake / NULL blkdev.

Signed-off-by: Hans de Goede 
---
Changes in v2:
-New patch in v2 of the patch-set
---
 disk/part.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/disk/part.c b/disk/part.c
index 43485c9..8c65cdb 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -511,6 +511,7 @@ int get_device_and_partition(const char *ifname, const char 
*dev_part_str,
int part;
disk_partition_t tmpinfo;
 
+#ifdef CONFIG_SANDBOX
/*
 * Special-case a pseudo block device "hostfs", to allow access to the
 * host's own filesystem.
@@ -529,6 +530,7 @@ int get_device_and_partition(const char *ifname, const char 
*dev_part_str,
 
return 0;
}
+#endif
 
/* If no dev_part_str, use bootdevice environment variable */
if (!dev_part_str || !strlen(dev_part_str) ||
-- 
2.4.3

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[U-Boot] [PATCH v2 5/5] distro_bootcmd: Add support for booting from ubifs

[Hans de Goede]

From: Roy Spliet 

Under the assumptions of having a UBI volume called boot, containing
a ubifs filesystem.

Signed-off-by: Roy Spliet 
Signed-off-by: Hans de Goede 
Acked-by: Stephen Warren 
---
Changes in v2:
-Added Stephen's ack
---
 include/config_distro_bootcmd.h | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 3a360ca4..2b36d80 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -72,6 +72,24 @@
BOOT_TARGET_DEVICES_references_MMC_without_CONFIG_CMD_MMC
 #endif
 
+#ifdef CONFIG_CMD_UBIFS
+#define BOOTENV_SHARED_UBIFS \
+   "ubifs_boot=" \
+   "if ubi part UBI && ubifsmount ubi${devnum}:boot; then "  \
+   "setenv devtype ubi; "\
+   "setenv bootpart 0; " \
+   "run scan_dev_for_boot; " \
+   "fi\0"
+#define BOOTENV_DEV_UBIFS  BOOTENV_DEV_BLKDEV
+#define BOOTENV_DEV_NAME_UBIFS BOOTENV_DEV_NAME_BLKDEV
+#else
+#define BOOTENV_SHARED_UBIFS
+#define BOOTENV_DEV_UBIFS \
+   BOOT_TARGET_DEVICES_references_UBIFS_without_CONFIG_CMD_UBIFS
+#define BOOTENV_DEV_NAME_UBIFS \
+   BOOT_TARGET_DEVICES_references_UBIFS_without_CONFIG_CMD_UBIFS
+#endif
+
 #ifdef CONFIG_CMD_SATA
 #define BOOTENV_SHARED_SATABOOTENV_SHARED_BLKDEV(sata)
 #define BOOTENV_DEV_SATA   BOOTENV_DEV_BLKDEV
@@ -185,6 +203,7 @@
BOOTENV_SHARED_SATA \
BOOTENV_SHARED_SCSI \
BOOTENV_SHARED_IDE \
+   BOOTENV_SHARED_UBIFS \
"boot_prefixes=/ /boot/\0" \
"boot_scripts=boot.scr.uimg boot.scr\0" \
"boot_script_dhcp=boot.scr.uimg\0" \
-- 
2.4.3

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Re: [U-Boot] [PATCH 1/2] mmc: dw_mmc: Increase timeout to 20 seconds

[Tom Rini]

On Thu, Sep 17, 2015 at 04:43:33PM +0200, Lukasz Majewski wrote:

> Hi Tom,
> 
> > On Monday, September 14, 2015 at 01:22:20 PM, Lukasz Majewski wrote:
> > > Hi Alexey,
> > > 
> > > > Hi Marek, Lukasz,
> > > > 
> > > > On Sun, 2015-09-13 at 16:00 +0200, Marek Vasut wrote:
> > > > > On Sunday, September 13, 2015 at 12:03:18 PM, Lukasz Majewski
> > > > > wrote:
> > > > > > Hi Marek,
> > > > > 
> > > > > Hi,
> > > > > 
> > > > > [...]
> > > > > 
> > > > > > > > > Still we need to fix regression first with virtually
> > > > > > > > > infinite timeout :) I would even thing that simple
> > > > > > > > > revert of Marek's patch may make sense for now.
> > > > > > > > 
> > > > > > > > +1 - unfortunately there were some other patches applied
> > > > > > > > to this particular patch. Simple revert might be a bit
> > > > > > > > tricky here.
> > > > > > > 
> > > > > > > -1 - In case the card gets removed during the DMA transfer
> > > > > > > and the board doesn't have a watchdog, it will get stuck
> > > > > > > indefinitelly.
> > > > > > 
> > > > > > I'm just wondering here - why the indefinite loop was working
> > > > > > previously? Was anybody complaining (on the ML) about the
> > > > > > problem of removing the SD card when some operation is
> > > > > > ongoing?
> > > > > 
> > > > > It worked for me for all the workloads I used. Noone was
> > > > > complaining.
> > > > 
> > > > The same story here - previous code with infinite loop was
> > > > working for my boards. And now I do see a problem with pretty
> > > > simple scenario that we do use in our products.
> > > > 
> > > > > > The problem with potential removal of SD card (after booting
> > > > > > the board) is with us for quite long time. Even with
> > > > > > indefinite loop (without your patch) we also could "hang" the
> > > > > > board if the SD card was removed during a transfer.
> > > > > 
> > > > > Which is why we should weed out the unbounded loops.
> > > > > 
> > > > > > > We
> > > > > > > absolutelly don't want this sort of behavior in U-Boot. I
> > > > > > > understand that this is the easiest way for everyone to
> > > > > > > achieve some sort of "working" solution, but it is
> > > > > > > definitelly not the correct one. While I do agree to
> > > > > > > increasing the timeout, I do not agree to unbounded loops,
> > > > > > > sorry.
> > > > > > 
> > > > > > We have agreed to not agree :-)
> > > > > 
> > > > > Yes :-)
> > > > 
> > > > The first thing I care is working U-Boot v2015.10 out of the box
> > > > on my boards. And so I may agree on any temporary solution. I see
> > > > it as timeout value either being infinite or obviously very high
> > > > like 60 seconds.
> > > > 
> > > > 60 seconds might sound stupid but my thought behind this is to
> > > > make sure even long transfers succeed. Imagine 100 Mb rootfs or
> > > > update file downloaded from slow SD-card.
> > > 
> > > Transfer of rootfs to SD-card (downloaded to memory via tftp) is
> > > definitely valid scenario.
> > > 
> > > > > > > > > From both points of view for keeping history
> > > > > > > > > clean (compared to stacked fixes/workarounds) and from
> > > > > > > > > removal of regression root cause.
> > > > > > > > 
> > > > > > > > As I said before - +1 from me.
> > > > > > > 
> > > > > > > As I said before, -1 from me. Btw. did anything regress in
> > > > > > > here? To me, this seems like a newly discovered bug ...
> > > > > > 
> > > > > > Yes, this is a bug. We had similar problem with Samsung's
> > > > > > SDHCI, before we switched to dw_mmc. This issue is new at
> > > > > > dw_mmc.
> > > > > > 
> > > > > > > > > It's not that I like to have infinite loops but given
> > > > > > > > > previous implementation worked fine for people in the
> > > > > > > > > previous U-Boot release.
> > > > > > > > 
> > > > > > > > Good justification
> > > > > > > 
> > > > > > > It is never a justified to return to a potentially
> > > > > > > problematic version
> > > > > > 
> > > > > > IMHO revering the change (before the release) is from the
> > > > > > software development point of view better solution than
> > > > > > adding some heuristic delta to timeout.
> > > > > > 
> > > > > > > for the sake of getting some sort of crappy hardware
> > > > > > > operational.
> > > > > > 
> > > > > > Unfortunately this "crappy hardware" is pervasive and we
> > > > > > cannot do anything about it.
> > > > > > 
> > > > > > To sum up (my point of view):
> > > > > > 1. The best would be to revert the patch - but if simple "git
> > > > > > revert" is not working then,
> > > > 
> > > > Well even if clean revert won't work we may do manual tweaks so
> > > > that functionally it is "revert". If of any interest I may come
> > > > up with that sort of patch.
> > > > 
> > > > > > 2. We should increase the timeout (with my patch) for v2015.10
> > > > > > release
> > > > 
> > > > If everybody is OK with that let's go do it. Because release is
> > > > around the corner and I don't want to explain each and every user
> > 

[U-Boot] [PATCH] nios2: convert altera_uart to driver model

[Thomas Chou]

Convert altera_uart to driver model.

Signed-off-by: Thomas Chou 
---
 arch/nios2/dts/3c120_devboard.dts |   1 +
 drivers/serial/Kconfig|   6 ++
 drivers/serial/altera_uart.c  | 153 ++
 include/configs/nios2-generic.h   |   9 +--
 4 files changed, 79 insertions(+), 90 deletions(-)

diff --git a/arch/nios2/dts/3c120_devboard.dts 
b/arch/nios2/dts/3c120_devboard.dts
index 7f76328..2159cfc 100644
--- a/arch/nios2/dts/3c120_devboard.dts
+++ b/arch/nios2/dts/3c120_devboard.dts
@@ -130,6 +130,7 @@
interrupts = <10>;
current-speed = <115200>;
clock-frequency = <6250>;
+   u-boot,dm-pre-reloc;
};
};
 
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 5a8cb3a..34195e1 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -122,6 +122,12 @@ config ALTERA_JTAG_UART_BYPASS
  Bypass console output and keep going even if there is no
  JTAG terminal connection with the host.
 
+config ALTERA_UART
+   bool "Altera UART support"
+   depends on NIOS2 && DM_SERIAL
+   help
+ Select this to enable an UART for Altera devices.
+
 config ROCKCHIP_SERIAL
bool "Rockchip on-chip UART support"
depends on ARCH_UNIPHIER && DM_SERIAL
diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
index d6b1484..8393d39 100644
--- a/drivers/serial/altera_uart.c
+++ b/drivers/serial/altera_uart.c
@@ -5,50 +5,31 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 
-
 #include 
-#include 
+#include 
+#include 
 #include 
 #include 
 #include 
 
-typedef volatile struct {
+struct altera_uart_regs {
unsignedrxdata; /* Rx data reg */
unsignedtxdata; /* Tx data reg */
unsignedstatus; /* Status reg */
unsignedcontrol;/* Control reg */
unsigneddivisor;/* Baud rate divisor reg */
unsignedendofpacket;/* End-of-packet reg */
-} nios_uart_t;
+};
+
+struct altera_uart_platdata {
+   struct altera_uart_regs *reg;
+   unsigned int uartclk;
+};
 
 /* status register */
-#define NIOS_UART_PE   (1 << 0)/* parity error */
-#define NIOS_UART_FE   (1 << 1)/* frame error */
-#define NIOS_UART_BRK  (1 << 2)/* break detect */
-#define NIOS_UART_ROE  (1 << 3)/* rx overrun */
-#define NIOS_UART_TOE  (1 << 4)/* tx overrun */
 #define NIOS_UART_TMT  (1 << 5)/* tx empty */
 #define NIOS_UART_TRDY (1 << 6)/* tx ready */
 #define NIOS_UART_RRDY (1 << 7)/* rx ready */
-#define NIOS_UART_E(1 << 8)/* exception */
-#define NIOS_UART_DCTS (1 << 10)   /* cts change */
-#define NIOS_UART_CTS  (1 << 11)   /* cts */
-#define NIOS_UART_EOP  (1 << 12)   /* eop detected */
-
-/* control register */
-#define NIOS_UART_IPE  (1 << 0)/* parity error int ena*/
-#define NIOS_UART_IFE  (1 << 1)/* frame error int ena */
-#define NIOS_UART_IBRK (1 << 2)/* break detect int ena */
-#define NIOS_UART_IROE (1 << 3)/* rx overrun int ena */
-#define NIOS_UART_ITOE (1 << 4)/* tx overrun int ena */
-#define NIOS_UART_ITMT (1 << 5)/* tx empty int ena */
-#define NIOS_UART_ITRDY(1 << 6)/* tx ready int ena */
-#define NIOS_UART_IRRDY(1 << 7)/* rx ready int ena */
-#define NIOS_UART_IE   (1 << 8)/* exception int ena */
-#define NIOS_UART_TBRK (1 << 9)/* transmit break */
-#define NIOS_UART_IDCTS(1 << 10)   /* cts change int ena */
-#define NIOS_UART_RTS  (1 << 11)   /* rts */
-#define NIOS_UART_IEOP (1 << 12)   /* eop detected int ena */
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -56,82 +37,90 @@ DECLARE_GLOBAL_DATA_PTR;
  * UART the serial port
  *-*/
 
-static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE;
+static int altera_uart_setbrg(struct udevice *dev, int baudrate)
+{
+   struct altera_uart_platdata *plat = dev->platdata;
+   struct altera_uart_regs *const regs = plat->reg;
+   unsigned div;
 
-#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
+   div = (plat->uartclk / baudrate) - 1;
+   writel(div, >divisor);
 
-/*
- * Everything's already setup for fixed-baud PTF
- * assignment
- */
-static void altera_serial_setbrg(void)
-{
+   return 0;
 }
 
-static int altera_serial_init(void)
+static int altera_uart_putc(struct udevice *dev, const char c)
 {
-   return 0;
-}
+   struct altera_uart_platdata *plat = dev->platdata;
+   struct 

Re: [U-Boot] [PATCH 1/8] ARM: hikey: Update README with various corrections

[Simon Glass]

Hi Peter,

On 9 September 2015 at 15:13, Peter Griffin  wrote:
> The README had a few mistakes, and one of the URL's
> had changed. Also update the boot log with the latest
> boot trace from ATF, which now includes the mcuimage.bin.
>
> Signed-off-by: Peter Griffin 
> ---
>  board/hisilicon/hikey/README | 197 
> ---
>  1 file changed, 147 insertions(+), 50 deletions(-)
>
> diff --git a/board/hisilicon/hikey/README b/board/hisilicon/hikey/README
> index 25c8143..36adbdb 100644
> --- a/board/hisilicon/hikey/README
> +++ b/board/hisilicon/hikey/README
> @@ -25,8 +25,12 @@ Currently the u-boot port supports: -
>  Compile u-boot
>  ==
>
> -make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
> -make CROSS_COMPILE=aarch64-linux-gnu-
> +  > mkdir -p ./aarch64/bin
> +  > cd ./aarch64

Do you really want the above? It seems odd that the 'cp' below expects
another level of subdir.

> +  > git clone http://git.denx.de/u-boot.git
> +  > make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
> +  > make CROSS_COMPILE=aarch64-linux-gnu-
> +  > cp u-boot.bin ./aarch64/bin/u-boot-hikey.bin
>
>  ARM Trusted Firmware (ATF) & l-loader
>  =
> @@ -34,27 +38,34 @@ ARM Trusted Firmware (ATF) & l-loader
>  This u-boot port has been tested with l-loader, booting ATF, which then boots
>  u-boot as the bl33.bin executable.
>
> +Get the BL30 mcu binary.
> +  > wget -P aarch64/bin 
> https://builds.96boards.org/releases/hikey/linaro/binaries/15.05/mcuimage.bin
> +
>  1. Get ATF source code
> -git clone https://github.com/96boards/arm-trusted-firmware.git
> +  > cd ./aarch64
> +  > git clone https://github.com/96boards/arm-trusted-firmware.git
> +  > cd ./arm-trusted-firmware
>
> -2. Compile ATF I use the makefile here
> -http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-tf.mak
> +2. Compile ATF, I use the build-tf.mak in the directory with this README, 
> and copy it to ATF directory
> +  > cp ../u-boot/board/hisilicon/hikey/build-tf.mak .
> +  > make -f  build-tf.mak build
>
>  3. Get l-loader
> -git clone https://github.com/96boards/l-loader.git
> -
> -4. Make sym links to ATF bip / fip binaries
> -ln -s /home/griffinp/aarch64/bl1-hikey.bin bl1.bin
> -ln -s /home/griffinp/aarch64/fip-hikey.bin fip.bin
> +  > cd ../
> +  > git clone https://github.com/96boards/l-loader.git
> +  > cd ./l-loader
>
> -arm-linux-gnueabihf-gcc -c -o start.o start.S
> -arm-linux-gnueabihf-gcc -c -o debug.o debug.S
> -arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o 
> debug.o -o loader
> -arm-linux-gnueabihf-objcopy -O binary loader temp
> +4. Make sym links to ATF bl1 / fip binaries
> +  > ln -s ../bin/bl1-hikey.bin bl1.bin
> +  > ln -s ../bin/fip-hikey.bin fip.bin
>
> -python gen_loader.py -o l-loader.bin --img_loader=temp --img_bl1=bl1.bin
> -sudo bash -x generate_ptable.sh
> -python gen_loader.py -o ptable.img --img_prm_ptable=prm_ptable.img 
> --img_sec_ptable=sec_ptable.img
> +  > arm-linux-gnueabihf-gcc -c -o start.o start.S
> +  > arm-linux-gnueabihf-gcc -c -o debug.o debug.S
> +  > arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o 
> debug.o -o loader
> +  > arm-linux-gnueabihf-objcopy -O binary loader temp
> +  > python gen_loader.py -o ../bin/l-loader.bin --img_loader=temp 
> --img_bl1=bl1.bin
> +  > sudo bash -x generate_ptable.sh
> +  > python gen_loader.py -o ../bin/ptable.img 
> --img_prm_ptable=./prm_ptable.img --img_sec_ptable=./sec_ptable.img
>
>  These instructions are adapted from
>  https://github.com/96boards/documentation/wiki/HiKeyUEFI
> @@ -62,37 +73,49 @@ https://github.com/96boards/documentation/wiki/HiKeyUEFI
>  FLASHING
>  
>
> -1. Connect jumper J2 to go into recovery mode and flash l-loader.bin with
> -   fastboot using the hisi-idt.py utility
> +1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and 
> flash l-loader.bin with
> +fastboot using the hisi-idt.py utility.
> +
> +  > cd ../
> +  > git clone https://github.com/96boards/burn-boot.git
>
> -> git clone https://github.com/96boards/burn-boot.git
> -> sudo python /home/griffinp/Software/hikey/burn-boot/hisi-idt.py -d 
> /dev/ttyUSB0 --img1=/tmp/l-loader.bin
> +The command below assumes HiKey enumerated as the first USB serial port
> +  > sudo ./burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=./bin/l-loader.bin
>
> -2. Once LED 0 comes on solid, it should be detected as a fastboot device
> -   (on some boards I've found this to be unreliable)
> +2. Once LED 0 comes on solid, it should be detected as a fastboot device by 
> plugging a USB A to mini B
> +   cable from your PC to the USB OTG port of HiKey (on some boards I've 
> found this to be unreliable).
>
> -sudo fastboot devices
> +  > sudo fastboot devices
> +
> +0123456789ABCDEF   fastboot
>
>  3. Flash the images
> -wget https://builds.96boards.org/releases/hikey/nvme.img
> -sudo 

Re: [U-Boot] [PATCH v2 6/8] ARM: hikey: Select DM, DM_GPIO from Kconfig

[Simon Glass]

On 10 September 2015 at 14:55, Peter Griffin  wrote:
> Most platforms enable these options from Kconfig rather
> than the configs header file.
>
> Signed-off-by: Peter Griffin 
> ---
>  arch/arm/Kconfig| 2 ++
>  include/configs/hikey.h | 2 --
>  2 files changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 3/8] ARM: hikey: Use linux/sizes.h for malloc size

[Simon Glass]

On 10 September 2015 at 14:55, Peter Griffin  wrote:
> Use the #defines in linux/sizes for malloc size as it is
> more readable.

Debatable, but it's your board :-)

Reviewed-by: Simon Glass 

>
> Signed-off-by: Peter Griffin 
> ---
>  include/configs/hikey.h | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
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Re: [U-Boot] [PATCH] nios2: convert altera_uart to driver model

[Marek Vasut]

On Friday, September 18, 2015 at 05:24:18 AM, Thomas Chou wrote:
> Convert altera_uart to driver model.
> 
> Signed-off-by: Thomas Chou 
> ---

Hi!

minor nitpicks below :)

> -typedef volatile struct {
> +struct altera_uart_regs {
>   unsignedrxdata; /* Rx data reg */
>   unsignedtxdata; /* Tx data reg */
>   unsignedstatus; /* Status reg */
>   unsignedcontrol;/* Control reg */
>   unsigneddivisor;/* Baud rate divisor reg */
>   unsignedendofpacket;/* End-of-packet reg */

Probably make this u32 instead of unsigned, so we're in the safe.

> -} nios_uart_t;
> +};

[...]

> -static int altera_serial_init(void)
> +static int altera_uart_putc(struct udevice *dev, const char c)
>  {
> - return 0;
> -}
> + struct altera_uart_platdata *plat = dev->platdata;
> + struct altera_uart_regs *const regs = plat->reg;
> 
> -#else
> + if (!(readl(>status) & NIOS_UART_TRDY))
> + return -EAGAIN;
> 
> -static void altera_serial_setbrg(void)
> -{
> - unsigned div;
> + writel((unsigned char)c, >txdata);

Is this type-cast needed ?

> - div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
> - writel (div, >divisor);
> + return 0;
>  }
> 
> -static int altera_serial_init(void)
> +static int altera_uart_pending(struct udevice *dev, bool input)
>  {
> - serial_setbrg();
> - return 0;
> + struct altera_uart_platdata *plat = dev->platdata;
> + struct altera_uart_regs *const regs = plat->reg;
> + unsigned st = readl(>status);
> +
> + if (input)
> + return (st & NIOS_UART_RRDY) ? 1 : 0;
> + else
> + return (st & NIOS_UART_TMT) ? 0 : 1;

Drop the ternary please, just use return st & flag or return !(st & flag),
it's not necessary to return 0 or 1, you can safely return 0 or non-zero.

>  }
> 
> -#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
> -
> -/*---
> - * UART CONSOLE
> - *-*/
> -static void altera_serial_putc(char c)
> +static int altera_uart_getc(struct udevice *dev)
>  {
> - if (c == '\n')
> - serial_putc ('\r');
> - while ((readl (>status) & NIOS_UART_TRDY) == 0)
> - WATCHDOG_RESET ();
> - writel ((unsigned char)c, >txdata);
> + struct altera_uart_platdata *plat = dev->platdata;
> + struct altera_uart_regs *const regs = plat->reg;
> +
> + if (readl(>status) & NIOS_UART_RRDY)
> + return (readl(>rxdata) & 0xff);

Parenthesis not needed around the readl(...) & 0xff expression.

> + else
> + return -EAGAIN;
>  }

[...]

Thanks!
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Re: [U-Boot] [Patch v2 11/16] armv8/ls1043ardb: Add nand boot support

[Gong Q . Y .]

> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, September 18, 2015 4:16 AM
> To: Gong Qianyu-B52263
> Cc: u-boot@lists.denx.de; Hu Mingkai-B21284; Sun York-R58495; Hou
> Zhiqiang-B48286; Song Wenbin-B53747; Xie Shaohui-B21989; Wood Scott-
> B07421
> Subject: Re: [Patch v2 11/16] armv8/ls1043ardb: Add nand boot support
> 
> On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> >
> 
> >
> > +/* NAND SPL */
> > +#ifdef CONFIG_NAND_BOOT
> > +#define CONFIG_SPL_PBL_PAD
> > +#define CONFIG_SPL_FRAMEWORK
> > +#define CONFIG_SPL_LDSCRIPT  "arch/arm/cpu/armv8/u-boot-
> spl.lds"
> > +#define CONFIG_SPL_TARGET"u-boot-with-spl.bin"
> > +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> > +#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_ENV_SUPPORT
> > +#define CONFIG_SPL_WATCHDOG_SUPPORT #define CONFIG_SPL_I2C_SUPPORT
> > +#define CONFIG_SPL_SERIAL_SUPPORT #define
> > +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
> > +#define CONFIG_SPL_NAND_SUPPORT
> > +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
> > +#define CONFIG_SPL_TEXT_BASE 0x1000
> > +#define CONFIG_SPL_MAX_SIZE  0x1a000
> > +#define CONFIG_SPL_STACK 0x1001d000
> > +#define CONFIG_SPL_PAD_TO0x1c000
> > +#define CONFIG_SYS_NAND_U_BOOT_OFFS  CONFIG_SPL_PAD_TO #define
> > +CONFIG_SYS_NAND_U_BOOT_SIZE  (640 << 10)
> 
> You made the U-Boot size be block aligned (assuming 128k block size,
> which the SoC common file should not do), but its offset is not.
> 
> -Scott

Eh, yes. The CONFIG_SPL_PAD_TO should be block aligned and put to board 
specific file assuming different NAND chips.
That reminds me. SPL and U-Boot size should be block aligned, so it is with the 
env size. Right?

Regards,
Qianyu



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Re: [U-Boot] [PATCH v2 8/8] ARM: hikey: Adjust SDRAM_1_SIZE to 0x3EFFFFFF

[Simon Glass]

On 10 September 2015 at 14:55, Peter Griffin  wrote:
> DRAM region 0x3f00 - 0x3fff is reserved for OP-TEE. Touching
> 0x3f00 memory location from unsecure world causes the board
> to hang.
>
> Signed-off-by: Peter Griffin 
> ---
>  include/configs/hikey.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 7/8] ARM: hikey: hi6220: Migrate over to DM_SERIAL and use UART3 by default.

[Simon Glass]

Hi Peter,

On 10 September 2015 at 14:55, Peter Griffin  wrote:
> Use DM for the pl01x serial driver on hikey. Also allow UART0 or
> UART3 to be chosen via Kconfig.
>
> By default we now output to UART3 as the latest version of ATF outputs
> to this UART. Also UART3 comes out on the LS connector, as opposed to
> UART0 which goes to a unpopulated header.
>
> As part of this change we also enable CONFIG_BOARD_EARLY_INIT_F and
> call the pinmux configuration code for the UART. Before we were
> relying on ATF having already configured the pin configuration.
>
> NB: Upstream Linux kernel doesn't yet support UART3, so serial console
> will still be output on UART0 when booting a upstream kernel.
>
> Signed-off-by: Peter Griffin 
> ---
>  arch/arm/Kconfig  |  2 +-
>  board/hisilicon/hikey/Kconfig |  7 +++
>  board/hisilicon/hikey/hikey.c | 43 
> +++
>  configs/hikey_defconfig   |  1 +
>  include/configs/hikey.h   | 11 ---
>  5 files changed, 56 insertions(+), 8 deletions(-)

Reviewed-by: Simon Glass 

>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 9c2b3ab..5bb568d 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -650,6 +650,7 @@ config TARGET_HIKEY
> select ARM64
> select DM
> select DM_GPIO
> +   select DM_SERIAL
>   help
>   Support for HiKey 96boards platform. It features a HI6220
>   SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
> @@ -658,7 +659,6 @@ config TARGET_LS1021AQDS
> bool "Support ls1021aqds"
> select CPU_V7
> select SUPPORT_SPL
> -
>  config TARGET_LS1021ATWR
> bool "Support ls1021atwr"
> select CPU_V7
> diff --git a/board/hisilicon/hikey/Kconfig b/board/hisilicon/hikey/Kconfig
> index f7f1055..9171502 100644
> --- a/board/hisilicon/hikey/Kconfig
> +++ b/board/hisilicon/hikey/Kconfig
> @@ -12,4 +12,11 @@ config SYS_SOC
>  config SYS_CONFIG_NAME
> default "hikey"
>
> +config CONS_INDEX
> +   int "UART used for console"
> +   range 1 4
> +   default 4
> +   help
> + The hi6220 SoC has 5 UARTs. For example to use UART0 enter 1 here.
> +

I was hoping to kill off this option but since you are not using
device tree yet I think it makes sense.

>  endif
> diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
> index 9948747..c4ae40b 100644
> --- a/board/hisilicon/hikey/hikey.c
> +++ b/board/hisilicon/hikey/hikey.c
> @@ -6,6 +6,7 @@
>   */
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -69,6 +70,48 @@ U_BOOT_DEVICES(hi6220_gpios) = {
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> +static const struct pl01x_serial_platdata serial_platdata = {
> +#if CONFIG_CONS_INDEX == 1
> +   .base = HI6220_UART0_BASE,
> +#elif CONFIG_CONS_INDEX == 4
> +   .base = HI6220_UART3_BASE,
> +#else
> +#error "Unsuported console index value."
> +#endif
> +   .type = TYPE_PL011,
> +   .clock = 1920
> +};
> +
> +U_BOOT_DEVICE(hikey_seriala) = {
> +   .name = "serial_pl01x",
> +   .platdata = _platdata,
> +};
> +
> +#ifdef CONFIG_BOARD_EARLY_INIT_F
> +int board_uart_init(void)
> +{
> +   switch (CONFIG_CONS_INDEX) {
> +   case 1:
> +   hi6220_pinmux_config(PERIPH_ID_UART0);
> +   break;
> +   case 4:
> +   hi6220_pinmux_config(PERIPH_ID_UART3);
> +   break;
> +   default:
> +   debug("%s: Unsupported UART selected\n", __func__);
> +   return -1;
> +   }
> +
> +   return 0;
> +}
> +
> +int board_early_init_f(void)
> +{
> +   board_uart_init();
> +   return 0;
> +}
> +#endif
> +
>  struct peri_sc_periph_regs *peri_sc =
> (struct peri_sc_periph_regs *)HI6220_PERI_BASE;
>
> diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig
> index aa4fb0d..ee67c29 100644
> --- a/configs/hikey_defconfig
> +++ b/configs/hikey_defconfig
> @@ -2,4 +2,5 @@
>  CONFIG_ARM=y
>  CONFIG_TARGET_HIKEY=y
>  CONFIG_NET=y
> +CONFIG_SYS_MALLOC_F_LEN=0x2000
>  # CONFIG_CMD_IMLS is not set
> diff --git a/include/configs/hikey.h b/include/configs/hikey.h
> index ae8187a..b7c22e8 100644
> --- a/include/configs/hikey.h
> +++ b/include/configs/hikey.h
> @@ -31,6 +31,8 @@
>  /* Flat Device Tree Definitions */
>  #define CONFIG_OF_LIBFDT
>
> +#define CONFIG_BOARD_EARLY_INIT_F
> +
>  /* Physical Memory Map */
>
>  /* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */
> @@ -59,13 +61,8 @@
>  /* Size of malloc() pool */
>  #define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + SZ_8M)
>
> -/* PL011 Serial Configuration */
> -#define CONFIG_PL011_SERIAL
> -
> -#define CONFIG_PL011_CLOCK 1920
> -#define CONFIG_PL01x_PORTS {(void *)0xF8015000}
> -#define CONFIG_CONS_INDEX  0
> -
> +/* Serial port PL010/PL011 through the device model */
> 

Re: [U-Boot] [PATCH] nios2: convert altera_uart to driver model

[Simon Glass]

Hi,

On 17 September 2015 at 21:29, Marek Vasut  wrote:
>
> On Friday, September 18, 2015 at 05:24:18 AM, Thomas Chou wrote:
> > Convert altera_uart to driver model.
> >
> > Signed-off-by: Thomas Chou 
> > ---
>
> Hi!
>
> minor nitpicks below :)

Looks good to me also.

Reviewed-by: Simon Glass 

You might want to implement CONFIG_DEBUG_UART. It allows UART output
before driver model is ready.

[snip]

Regards,
Simon
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Re: [U-Boot] [PATCH v2 4/8] ARM: hi6220: Add UART0 and UART3 base addresses

[Simon Glass]

On 10 September 2015 at 14:55, Peter Griffin  wrote:
> Signed-off-by: Peter Griffin 
> ---
>  arch/arm/include/asm/arch-hi6220/hi6220.h | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-hi6220/hi6220.h 
> b/arch/arm/include/asm/arch-hi6220/hi6220.h
> index 4b987c2..3a12c75 100644
> --- a/arch/arm/include/asm/arch-hi6220/hi6220.h
> +++ b/arch/arm/include/asm/arch-hi6220/hi6220.h
> @@ -13,6 +13,9 @@
>  #define HI6220_MMC0_BASE   0xF723D000
>  #define HI6220_MMC1_BASE   0xF723E000
>
> +#define HI6220_UART0_BASE  0xF8015000
> +#define HI6220_UART3_BASE  0xF7113000
> +
>  #define HI6220_PMUSSI_BASE 0xF800
>
>  #define HI6220_PERI_BASE   0xF703
> --
> 1.9.1
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 5/8] ARM: hikey: Remove resetting gd->flags in board_init()

[Simon Glass]

On 10 September 2015 at 14:55, Peter Griffin  wrote:
> This causes exceptions and other strange behaviour
> when enabling CONFIG_SYS_MALLOC_F_LEN which is required to
> migrate the serial driver over to DM_SERIAL.
>
> As GD_FLG_FULL_MALLOC_INIT flag gets reset, after relocation
> we don't end up using the full malloc which ultimately ends up
> causing a synchronus abort.
>
> Signed-off-by: Peter Griffin 
> ---
>  board/hisilicon/hikey/hikey.c | 2 --
>  1 file changed, 2 deletions(-)

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Re: [U-Boot] [PATCH 2/8] ARM: hikey: Add ATF makefile referenced by README

[Simon Glass]

Hi Peter,

On 9 September 2015 at 15:13, Peter Griffin  wrote:
> Rather than relying on an external URL in the README
> include the Makefile in the hikey directory.
>
> Signed-off-by: Peter Griffin 
> ---
>  board/hisilicon/hikey/build-tf.mak | 42 
> ++
>  1 file changed, 42 insertions(+)
>  create mode 100644 board/hisilicon/hikey/build-tf.mak
>
> diff --git a/board/hisilicon/hikey/build-tf.mak 
> b/board/hisilicon/hikey/build-tf.mak

A nit: in U-Boot I think Makefile.tf might be better. What is tf?

> new file mode 100644
> index 000..cebb34b
> --- /dev/null
> +++ b/board/hisilicon/hikey/build-tf.mak
> @@ -0,0 +1,42 @@
> +CROSS_COMPILE  := aarch64-linux-gnu-
> +output_dir := $(PWD)/../bin
> +makejobs   := $(shell grep '^processor' /proc/cpuinfo | sort -u | wc -l)
> +makethreads:= $(shell dc -e "$(makejobs) 1 + p")
> +make_options   := GCC49_AARCH64_PREFIX=$CROSS_COMPILE \
> +   -j$(makethreads) -l$(makejobs)
> +
> +BL30_HIKEY := $(output_dir)/mcuimage.bin
> +BL33_HIKEY := $(output_dir)/u-boot-hikey.bin
> +
> +.PHONY: help
> +help:
> +   @echo "  Common Makefile  "
> +   @echo "example:"
> +   @echo "make -f build-tf.mak build"
> +
> +.PHONY: have-crosscompiler
> +have-crosscompiler:
> +   @echo -n "Check that $(CROSS_COMPILE)gcc is available..."
> +   @which $(CROSS_COMPILE)gcc > /dev/null ; \
> +   if [ ! $$? -eq 0 ] ; then \
> +  echo "ERROR: cross-compiler $(CROSS_COMPILE)gcc not in 
> PATH=$$PATH!" ; \
> +  echo "ABORTING." ; \
> +  exit 1 ; \
> +   else \
> +  echo "OK" ;\
> +   fi
> +
> +build: have-crosscompiler FORCE
> +   @echo "Build TF for Hikey..."
> +   rm -rf build/
> +   CROSS_COMPILE=$(CROSS_COMPILE) \
> +   make all fip \
> +   BL30=$(BL30_HIKEY) \
> +   BL33=$(BL33_HIKEY) \
> +   DEBUG=1 \
> +   PLAT=hikey
> +   @echo "Copy resulting binaries..."
> +   cp build/hikey/debug/bl1.bin $(output_dir)/bl1-hikey.bin
> +   cp build/hikey/debug/fip.bin $(output_dir)/fip-hikey.bin
> +
> +FORCE:
> --
> 1.9.1
>

Regards,
Simon
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Re: [U-Boot] [Patch v2 07/16] net/fm: fix MDIO controller base on FMAN2

[Scott Wood]

On Thu, 2015-09-17 at 22:49 -0500, Xie Shaohui-B21989 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, September 18, 2015 2:05 AM
> > To: Gong Qianyu-B52263
> > Cc: u-boot@lists.denx.de; Hu Mingkai-B21284; Sun York-R58495; Hou
> > Zhiqiang-B48286; Song Wenbin-B53747; Xie Shaohui-B21989; Wood Scott-
> > B07421
> > Subject: Re: [Patch v2 07/16] net/fm: fix MDIO controller base on FMAN2
> > 
> > On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> > > From: Shaohui Xie 
> > > 
> > > MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
> > > plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are
> > > two FMANs, so we should only define MDIO controller base on FMAN2 when
> > > there is FMAN2.
> > > 
> > > Signed-off-by: Shaohui Xie 
> > > Signed-off-by: Mingkai Hu 
> > > Signed-off-by: Gong Qianyu 
> > > ---
> > >  include/fm_eth.h | 17 +
> > >  1 file changed, 17 insertions(+)
> > > 
> > > diff --git a/include/fm_eth.h b/include/fm_eth.h index
> > > 3e1b9f4..d43f801 100644
> > > --- a/include/fm_eth.h
> > > +++ b/include/fm_eth.h
> > > @@ -45,8 +45,10 @@ enum fm_eth_type {
> > >  #ifdef CONFIG_SYS_FMAN_V3
> > >  #define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR   (CONFIG_SYS_FSL_FM1_ADDR
> > + 0xfc000)
> > >  #define CONFIG_SYS_FM1_TGEC_MDIO_ADDR(CONFIG_SYS_FSL_FM1_ADDR
> > + 0xfd000)
> > > +#if (CONFIG_SYS_NUM_FMAN == 2)
> > >  #define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR   (CONFIG_SYS_FSL_FM2_ADDR
> > + 0xfc000)
> > >  #define CONFIG_SYS_FM2_TGEC_MDIO_ADDR(CONFIG_SYS_FSL_FM2_ADDR
> > + 0xfd000)
> > > +#endif
> > >  #else
> > >  #define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR  (CONFIG_SYS_FSL_FM1_ADDR
> > + 0xe1120)
> > >  #define CONFIG_SYS_FM1_TGEC_MDIO_ADDR(CONFIG_SYS_FSL_FM1_ADDR
> > + 0xf1000)
> > > @@ -89,6 +91,7 @@ enum fm_eth_type {
> > >offsetof(struct ccsr_fman,
> > > memac[n-1]),\  }  #else
> > > +#if (CONFIG_SYS_NUM_FMAN == 2)
> > > #define FM_TGEC_INFO_INITIALIZER(idx, n) \
> > >  {\
> > >   FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM2_TGEC_MDIO_ADDR) \
> > > @@ -101,6 +104,20 @@ enum fm_eth_type {
> > >   .compat_offset  = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
> > >   offsetof(struct ccsr_fman,
> > > memac[n-1+8]),\  }
> > > +#else
> > > +#define FM_TGEC_INFO_INITIALIZER(idx, n) \
> > > +{\
> > > + FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \
> > > + .index  = idx,  \
> > > + .num= n - 1,\
> > > + .type   = FM_ETH_10G_E, \
> > > + .port   = FM##idx##_10GEC##n,   \
> > > + .rx_port_id = RX_PORT_10G_BASE + n - 1, \
> > > + .tx_port_id = TX_PORT_10G_BASE + n - 1, \
> > > + .compat_offset  = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
> > > + offsetof(struct ccsr_fman,
> > > +memac[n-1+8]),\ } #endif
> > >  #endif
> > 
> > doc/README.fsl-dpaa says that CONFIG_FSL_FM_10GEC_REGULAR_NOTATION is for
> > newer SoCs.  Presumably this patch is for ls1043a -- is that not
> > considered a newer SoC?  Or does the README need to be fixed?
> [S.H] Yes, this is for LS1043A. LS1043A has one FMAN same as T2080. 
> A new SoC but has an old DPAA.

So maybe the README should be changed to more accurately talk about FMan 
versions?

-Scott


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Re: [U-Boot] [Patch v2 11/16] armv8/ls1043ardb: Add nand boot support

[Scott Wood]

On Thu, 2015-09-17 at 22:36 -0500, Gong Qianyu-B52263 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, September 18, 2015 4:16 AM
> > To: Gong Qianyu-B52263
> > Cc: u-boot@lists.denx.de; Hu Mingkai-B21284; Sun York-R58495; Hou
> > Zhiqiang-B48286; Song Wenbin-B53747; Xie Shaohui-B21989; Wood Scott-
> > B07421
> > Subject: Re: [Patch v2 11/16] armv8/ls1043ardb: Add nand boot support
> > 
> > On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> > > 
> > 
> > > 
> > > +/* NAND SPL */
> > > +#ifdef CONFIG_NAND_BOOT
> > > +#define CONFIG_SPL_PBL_PAD
> > > +#define CONFIG_SPL_FRAMEWORK
> > > +#define CONFIG_SPL_LDSCRIPT  "arch/arm/cpu/armv8/u-boot-
> > spl.lds"
> > > +#define CONFIG_SPL_TARGET"u-boot-with-spl.bin"
> > > +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> > > +#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_ENV_SUPPORT
> > > +#define CONFIG_SPL_WATCHDOG_SUPPORT #define CONFIG_SPL_I2C_SUPPORT
> > > +#define CONFIG_SPL_SERIAL_SUPPORT #define
> > > +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
> > > +#define CONFIG_SPL_NAND_SUPPORT
> > > +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
> > > +#define CONFIG_SPL_TEXT_BASE 0x1000
> > > +#define CONFIG_SPL_MAX_SIZE  0x1a000
> > > +#define CONFIG_SPL_STACK 0x1001d000
> > > +#define CONFIG_SPL_PAD_TO0x1c000
> > > +#define CONFIG_SYS_NAND_U_BOOT_OFFS  CONFIG_SPL_PAD_TO #define
> > > +CONFIG_SYS_NAND_U_BOOT_SIZE  (640 << 10)
> > 
> > You made the U-Boot size be block aligned (assuming 128k block size,
> > which the SoC common file should not do), but its offset is not.
> > 
> > -Scott
> 
> Eh, yes. The CONFIG_SPL_PAD_TO should be block aligned and put to board 
> specific file assuming different NAND chips.

Yes.

> That reminds me. SPL and U-Boot size should be block aligned, so it is with 
> the env size. Right?

The environment should have a full block reserved to it, but the actual 
environment size does not need to take up the full block.  Typically U-Boot 
environments are smaller than a flash block, probably to reduce the amount of 
CRC that needs to be calculated.

-Scott


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