Re: [U-Boot] [PATCH] drivers: net: cpsw: always flush cache with cache line aligned

[Lokesh Vutla]

On Monday 08 August 2016 10:16 PM, Joe Hershberger wrote:
> Hi Lokesh,
> 
> On Mon, Aug 8, 2016 at 1:22 AM, Lokesh Vutla  wrote:
>> cpsw tries to flush dcache which is not in the range of cache line size.
>> Because of this the following warning comes while flushing:
>>
>> CACHE: Misaligned operation at range [dffecec0, dffed016]
>>
>> Fix it by flushing cache range which is cache line size aligned.
> 
> This is the send case... the transmit packet buffer from the network
> subsystem is already aligned. You only need to align the size of the
> packet. Also, please use PKTALIGN.

You are right. Just posted a patch addressing your comments.

Thanks and regards,
Lokesh

> 
> Thanks,
> -Joe
> 
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[U-Boot] [PATCH v2] drivers: net: cpsw: always flush cache of size PKTSIZE_ALIGN

[Lokesh Vutla]

cpsw tries to flush dcache which is not in the range of PKTSIZE.
Because of this the following warning comes while flushing:

CACHE: Misaligned operation at range [dffecec0, dffed016]

Fix it by flushing cache of size PKTSIZE_ALIGN as similar to what is
being done in _cpsw_recv.

Signed-off-by: Lokesh Vutla 
---
Changes since v1:
- Use PKTALIGN instead of cache line size
- Need not align start of packet buffer from the network subsystem.

 drivers/net/cpsw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index 2ce4ec6..8ce5716 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -907,7 +907,7 @@ static int _cpsw_send(struct cpsw_priv *priv, void *packet, 
int length)
int timeout = CPDMA_TIMEOUT;
 
flush_dcache_range((unsigned long)packet,
-  (unsigned long)packet + length);
+  (unsigned long)packet + PKTSIZE_ALIGN);
 
/* first reap completed packets */
while (timeout-- &&
-- 
2.9.2

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[U-Boot] [PATCH v2] i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

[Stefan Roese]

This patch adds support for the SMBus block read/write functionality.
Other protocols like the SMBus quick command need to get added
if this is needed.

This patch also removed the SMBus related defines from the Ivybridge
pch.h header. As they are integrated in this driver and should be
used from here. This change is added in this patch to avoid compile
breakage to keep the source git bisectable.

Tested on a congatec BayTrail board to configure the SMSC2513 USB
hub.

Signed-off-by: Stefan Roese 
Cc: Bin Meng 
Cc: Simon Glass 
Cc: Heiko Schocher 
Cc: George McCollister 
---
v2:
- Avoid using BSS. Patch from Simon intergrated to fix problem before
  relocation.
- Remove IvyBridge code and add PCI device for IvyBridge (Panther Point
  PCH).
- Add overrun check to smbus_block_read() as suggested by George

 arch/x86/include/asm/arch-ivybridge/pch.h |  26 ---
 drivers/i2c/intel_i2c.c   | 290 +++---
 2 files changed, 269 insertions(+), 47 deletions(-)

diff --git a/arch/x86/include/asm/arch-ivybridge/pch.h 
b/arch/x86/include/asm/arch-ivybridge/pch.h
index 4725250..9c51f63 100644
--- a/arch/x86/include/asm/arch-ivybridge/pch.h
+++ b/arch/x86/include/asm/arch-ivybridge/pch.h
@@ -134,32 +134,6 @@
 #define SATA_IOBP_SP0G3IR  0xea000151
 #define SATA_IOBP_SP1G3IR  0xea51
 
-/* PCI Configuration Space (D31:F3): SMBus */
-#define PCH_SMBUS_DEV  PCI_BDF(0, 0x1f, 3)
-#define SMB_BASE   0x20
-#define HOSTC  0x40
-#define SMB_RCV_SLVA   0x09
-
-/* HOSTC bits */
-#define I2C_EN (1 << 2)
-#define SMB_SMI_EN (1 << 1)
-#define HST_EN (1 << 0)
-
-/* SMBus I/O bits. */
-#define SMBHSTSTAT 0x0
-#define SMBHSTCTL  0x2
-#define SMBHSTCMD  0x3
-#define SMBXMITADD 0x4
-#define SMBHSTDAT0 0x5
-#define SMBHSTDAT1 0x6
-#define SMBBLKDAT  0x7
-#define SMBTRNSADD 0x9
-#define SMBSLVDATA 0xa
-#define SMLINK_PIN_CTL 0xe
-#define SMBUS_PIN_CTL  0xf
-
-#define SMBUS_TIMEOUT  (10 * 1000 * 100)
-
 #define VCH0x  /* 32bit */
 #define VCAP1  0x0004  /* 32bit */
 #define VCAP2  0x0008  /* 32bit */
diff --git a/drivers/i2c/intel_i2c.c b/drivers/i2c/intel_i2c.c
index 3d777ff..1ef6024 100644
--- a/drivers/i2c/intel_i2c.c
+++ b/drivers/i2c/intel_i2c.c
@@ -2,54 +2,290 @@
  * Copyright (c) 2015 Google, Inc
  * Written by Simon Glass 
  *
+ * SMBus block read/write support added by Stefan Roese:
+ * Copyright (C) 2016 Stefan Roese 
+ *
  * SPDX-License-Identifier: GPL-2.0+
  */
 
 #include 
 #include 
 #include 
+#include 
 #include 
-#include 
 
-int intel_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
+/* PCI Configuration Space (D31:F3): SMBus */
+#define SMB_BASE   0x20
+#define HOSTC  0x40
+#define  HST_EN(1 << 0)
+#define SMB_RCV_SLVA   0x09
+
+/* SMBus I/O bits. */
+#define SMBHSTSTAT 0x0
+#define SMBHSTCTL  0x2
+#define SMBHSTCMD  0x3
+#define SMBXMITADD 0x4
+#define SMBHSTDAT0 0x5
+#define SMBHSTDAT1 0x6
+#define SMBBLKDAT  0x7
+#define SMBTRNSADD 0x9
+#define SMBSLVDATA 0xa
+#define SMBAUXCTL  0xd
+#define SMLINK_PIN_CTL 0xe
+#define SMBUS_PIN_CTL  0xf
+
+/* I801 Hosts Status register bits */
+#define SMBHSTSTS_BYTE_DONE0x80
+#define SMBHSTSTS_INUSE_STS0x40
+#define SMBHSTSTS_SMBALERT_STS 0x20
+#define SMBHSTSTS_FAILED   0x10
+#define SMBHSTSTS_BUS_ERR  0x08
+#define SMBHSTSTS_DEV_ERR  0x04
+#define SMBHSTSTS_INTR 0x02
+#define SMBHSTSTS_HOST_BUSY0x01
+
+/* I801 Host Control register bits */
+#define SMBHSTCNT_INTREN   0x01
+#define SMBHSTCNT_KILL 0x02
+#define SMBHSTCNT_LAST_BYTE0x20
+#define SMBHSTCNT_START0x40
+#define SMBHSTCNT_PEC_EN   0x80/* ICH3 and later */
+
+/* Auxiliary control register bits, ICH4+ only */
+#define SMBAUXCTL_CRC  1
+#define SMBAUXCTL_E32B 2
+
+#define SMBUS_TIMEOUT  100 /* 100 ms */
+
+struct intel_i2c {
+   u32 base;
+   int running;
+};
+
+static int smbus_wait_until_ready(u32 base)
 {
-   return -ENOSYS;
+   unsigned long ts;
+   u8 byte;
+
+   ts = get_timer(0);
+   do {
+   byte = inb(base + SMBHSTSTAT);
+   if (!(byte & 1))
+   return 0;
+   } while (get_timer(ts) < SMBUS_TIMEOUT);
+
+   return -ETIMEDOUT;
 }
 
-int intel_i2c_probe_chip(struct udevice *bus, uint chip_addr, uint chip_flags)
+static int smbus_wait_until_done(u32 base)
 {
-   return -ENOSYS;
+   unsigned long ts;
+   u8 byte;
+

Re: [U-Boot] [PATCH 2/2] x86: i2c: Avoid using BSS before it is available

[Stefan Roese]

Hi Simon,

On 08.08.2016 23:44, Simon Glass wrote:

On 8 August 2016 at 08:45, Heiko Schocher  wrote:

Hello Simon,


Am 07.08.2016 um 08:54 schrieb Bin Meng:


On Sat, Aug 6, 2016 at 11:35 AM, Simon Glass  wrote:


If intel_i2c_bind() is called before relocation there is no BSS section
available. Use the data section instead, which is always available.

A better fix might be to use global_data, perhaps a new member in
x86's struct arch_global_data. Comments welcome.

Signed-off-by: Simon Glass 
---

  drivers/i2c/intel_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)



Reviewed-by: Bin Meng 



Hmm... I see no i2c_bind() in mainline U-Boot drivers/i2c/intel_i2c.c
driver ?

Is this patch and also patch:
http://patchwork.ozlabs.org/patch/656335/

dependend on another patch(or patchserie) ?


Yes it depends on Stefan's x86 i2c driver. He asked me to take a look.
It can be squashed in - will leave this to Stefan.


I have squashed it in v2 of the SMBus I2C driver patch which will
hit the list very soon.

Thanks,
Stefan
Avoid
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Re: [U-Boot] [PATCH] i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

[Stefan Roese]

Hi George,

On 05.08.2016 18:09, George McCollister wrote:

On Tue, Jun 28, 2016 at 8:44 AM, Stefan Roese  wrote:

This patch adds support for the SMBus block read/write functionality.
Other protocols like the SMBus quick command need to get added
if this is needed.

This patch also removed the SMBus related defines from the Ivybridge
pch.h header. As they are integrated in this driver and should be
used from here. This change is added in this patch to avoid compile
breakage to keep the source git bisectable.

Tested on a congatec BayTrail board to configure the SMSC2513 USB
hub.

Signed-off-by: Stefan Roese 
Cc: Bin Meng 
Cc: Simon Glass 
Cc: Heiko Schocher 
---
Simon, I'm not sure if this change breaks your Ivybridge targets
using the probe part of this driver. Could you please let me
know if this works? Or let me know what needs changes here?

Thanks,
Stefan

 arch/x86/include/asm/arch-ivybridge/pch.h |  26 ---
 drivers/i2c/intel_i2c.c   | 290 --
 2 files changed, 278 insertions(+), 38 deletions(-)

diff --git a/arch/x86/include/asm/arch-ivybridge/pch.h 
b/arch/x86/include/asm/arch-ivybridge/pch.h
index 4725250..9c51f63 100644
--- a/arch/x86/include/asm/arch-ivybridge/pch.h
+++ b/arch/x86/include/asm/arch-ivybridge/pch.h
@@ -134,32 +134,6 @@
 #define SATA_IOBP_SP0G3IR  0xea000151
 #define SATA_IOBP_SP1G3IR  0xea51

-/* PCI Configuration Space (D31:F3): SMBus */
-#define PCH_SMBUS_DEV  PCI_BDF(0, 0x1f, 3)
-#define SMB_BASE   0x20
-#define HOSTC  0x40
-#define SMB_RCV_SLVA   0x09
-
-/* HOSTC bits */
-#define I2C_EN (1 << 2)
-#define SMB_SMI_EN (1 << 1)
-#define HST_EN (1 << 0)
-
-/* SMBus I/O bits. */
-#define SMBHSTSTAT 0x0
-#define SMBHSTCTL  0x2
-#define SMBHSTCMD  0x3
-#define SMBXMITADD 0x4
-#define SMBHSTDAT0 0x5
-#define SMBHSTDAT1 0x6
-#define SMBBLKDAT  0x7
-#define SMBTRNSADD 0x9
-#define SMBSLVDATA 0xa
-#define SMLINK_PIN_CTL 0xe
-#define SMBUS_PIN_CTL  0xf
-
-#define SMBUS_TIMEOUT  (10 * 1000 * 100)
-
 #define VCH0x  /* 32bit */
 #define VCAP1  0x0004  /* 32bit */
 #define VCAP2  0x0008  /* 32bit */
diff --git a/drivers/i2c/intel_i2c.c b/drivers/i2c/intel_i2c.c
index 3d777ff..8b63916 100644
--- a/drivers/i2c/intel_i2c.c
+++ b/drivers/i2c/intel_i2c.c
@@ -2,45 +2,263 @@
  * Copyright (c) 2015 Google, Inc
  * Written by Simon Glass 
  *
+ * SMBus block read/write support added by Stefan Roese:
+ * Copyright (C) 2016 Stefan Roese 
+ *
  * SPDX-License-Identifier: GPL-2.0+
  */

 #include 
 #include 
 #include 
+#include 
 #include 
+#ifdef CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE
 #include 
+#endif
+
+/* PCI Configuration Space (D31:F3): SMBus */
+#define SMB_BASE   0x20
+#define HOSTC  0x40
+#define  HST_EN(1 << 0)
+#define SMB_RCV_SLVA   0x09
+
+/* SMBus I/O bits. */
+#define SMBHSTSTAT 0x0
+#define SMBHSTCTL  0x2
+#define SMBHSTCMD  0x3
+#define SMBXMITADD 0x4
+#define SMBHSTDAT0 0x5
+#define SMBHSTDAT1 0x6
+#define SMBBLKDAT  0x7
+#define SMBTRNSADD 0x9
+#define SMBSLVDATA 0xa
+#define SMBAUXCTL  0xd
+#define SMLINK_PIN_CTL 0xe
+#define SMBUS_PIN_CTL  0xf
+
+/* I801 Hosts Status register bits */
+#define SMBHSTSTS_BYTE_DONE0x80
+#define SMBHSTSTS_INUSE_STS0x40
+#define SMBHSTSTS_SMBALERT_STS 0x20
+#define SMBHSTSTS_FAILED   0x10
+#define SMBHSTSTS_BUS_ERR  0x08
+#define SMBHSTSTS_DEV_ERR  0x04
+#define SMBHSTSTS_INTR 0x02
+#define SMBHSTSTS_HOST_BUSY0x01
+
+/* I801 Host Control register bits */
+#define SMBHSTCNT_INTREN   0x01
+#define SMBHSTCNT_KILL 0x02
+#define SMBHSTCNT_LAST_BYTE0x20
+#define SMBHSTCNT_START0x40
+#define SMBHSTCNT_PEC_EN   0x80/* ICH3 and later */
+
+/* Auxiliary control register bits, ICH4+ only */
+#define SMBAUXCTL_CRC  1
+#define SMBAUXCTL_E32B 2
+
+#define SMBUS_TIMEOUT  100 /* 100 ms */
+
+struct intel_i2c {
+   u32 base;
+   int running;
+};
+
+static int smbus_wait_until_ready(u32 base)
+{
+   unsigned long ts;
+   u8 byte;
+
+   ts = get_timer(0);
+   do {
+   byte = inb(base + SMBHSTSTAT);
+   if (!(byte & 1))
+   return 0;
+   } while (get_timer(ts) < SMBUS_TIMEOUT);
+
+   return -ETIMEDOUT;
+}
+
+static int smbus_wait_until_done(u32 base)
+{
+   unsigned long ts;
+   u8 byte;
+
+   ts = get_timer(0);
+   do {
+   byte = inb(base + SMBHSTSTAT);
+   if 

Re: [U-Boot] [PATCH v2] serial: bcm283x_mu: Detect disabled serial device

[Stephen Warren]

On 08/04/2016 05:15 PM, Alexander Graf wrote:



On 04 Aug 2016, at 20:11, Stephen Warren  wrote:

On 08/04/2016 01:11 AM, Alexander Graf wrote:

On the raspberry pi, you can disable the serial port to gain dynamic frequency
scaling which can get handy at times.

However, in such a configuration the serial controller gets its rx queue filled
up with zero bytes which then happily get transmitted on to whoever calls
getc() today.

This patch adds detection logic for that case by checking whether the RX pin is
mapped to GPIO15 and disables the mini uart if it is not mapped properly.

That way we can leave the driver enabled in the tree and can determine during
runtime whether serial is usable or not, having a single binary that allows for
uart and non-uart operation.



diff --git a/drivers/serial/serial_bcm283x_mu.c 
b/drivers/serial/serial_bcm283x_mu.c



@@ -72,9 +87,18 @@ static int bcm283x_mu_serial_probe(struct udevice *dev)
{
struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+   struct bcm283x_gpio_regs *gpio = (struct bcm283x_gpio_regs *)plat->gpio;

priv->regs = (struct bcm283x_mu_regs *)plat->base;

+   /*
+* The RPi3 disables the mini uart by default. The easiest way to find
+* out whether it is available is to check if the pin is muxed.
+*/
+   if (((readl(>gpfsel1) >> BCM283X_GPIO_GPFSEL1_F15_SHIFT) &
+   BCM283X_GPIO_ALTFUNC_MASK) != BCM283X_GPIO_ALTFUNC_5)
+   priv->disabled = true;
+
return 0;


Comment on the current implementation: Can't probe() return an error if the device 
should be disabled? That would avoid the need to check priv->disabled in all 
the other functions.


I guess I should’ve put that in a comment somewhere. Unfortunately we can’t. If 
I just return an error on probe, U-Boot will panic because we tell it in a 
CONFIG define that we require a serial port (grep for 
CONFIG_REQUIRE_SERIAL_CONSOLE).

We could maybe try to unset that define instead?


Yes, assuming that U-Boot runs just fine with HDMI console only, I think 
it's fine to unset CONFIG_REQUIRE_SERIAL_CONSOLE.



Overall comment: I'd rather not put this logic into the UART driver itself; it 
is system-specific rather than device-specific. I'd also rather not have the 
UART driver touching GPIO registers; that's not very modular, and could cause 
problems if the Pi is converted to use DT to instantiate devices.

Instead, can we put the logic into board/raspberrypi/rpi/rpi.c? I.e. have some 
early function come along and enable/disable the bcm2837_serials device object 
as appropriate? That way it isolates the code to the Pi specifically, and not 
any other bcm283x board. We'd want to wrap that code in #ifdef 
CONFIG_PL01X_SERIAL.


We can do that if we can fail at probe time. If we absolutely must have a 
serial driver to work in the first place, that doesn’t work. I can try to poke 
at it, but it’ll be a few days I think :).


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Re: [U-Boot] [PATCH 0/7] efi_loader: Expose SMBIOS table

[Bin Meng]

Hi Simon,

On Tue, Aug 9, 2016 at 5:44 AM, Simon Glass  wrote:
> Hi Alexander,
>
> On 8 August 2016 at 08:06, Alexander Graf  wrote:
>> We generate a few tables on x86 today that really can be used on ARM just
>> the same. One such example is the SMBIOS table, which people use with tools
>> like "dmidecode" to identify which hardware they are running on.
>>
>> We're slowly growing needs to collect serial numbers from various devices
>> on ARM and SMBIOS seems the natural choice. So this patch set moves the
>> current SMBIOS generation into generic code and adds serial number exposure
>> to it.
>
> Shouldn't we use device tree? Why would an ARM device use SMBIOS?
>

I believe the reason of using SMBIOS on ARM is with U-Boot's bootefi support.
https://wiki.linaro.org/ARM/UEFI/SMBIOS

Regards,
Bin
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Re: [U-Boot] [PATCH v2] cbfs: Fix incorrect CBFS file header size being used

[Bin Meng]

On Tue, Aug 9, 2016 at 11:32 AM, Bin Meng  wrote:
> From: Yaroslav K 
>
> This fixes incorrect filenames in cbfsls output.
>
> Signed-off-by: Yaroslav K. 
> Reviewed-by: Simon Glass 
> [clean up checkpatch errors and warnings]
> Signed-off-by: Bin Meng 
>
> ---
>
> Changes in v2:
> - Clean up checkpatch errors and warnings
>
>  fs/cbfs/cbfs.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>

applied to u-boot-x86, thanks!
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[U-Boot] [PATCH v2] cbfs: Fix incorrect CBFS file header size being used

[Bin Meng]

From: Yaroslav K 

This fixes incorrect filenames in cbfsls output.

Signed-off-by: Yaroslav K. 
Reviewed-by: Simon Glass 
[clean up checkpatch errors and warnings]
Signed-off-by: Bin Meng 

---

Changes in v2:
- Clean up checkpatch errors and warnings

 fs/cbfs/cbfs.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 95a48a4..6e1107d 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -97,8 +97,8 @@ static int file_cbfs_next_file(u8 *start, u32 size, u32 align,
}
 
swap_file_header(, fileHeader);
-   if (header.offset < sizeof(const struct cbfs_cachenode *) ||
-   header.offset > header.len) {
+   if (header.offset < sizeof(struct cbfs_fileheader) ||
+   header.offset > header.len) {
file_cbfs_result = CBFS_BAD_FILE;
return -1;
}
@@ -106,9 +106,9 @@ static int file_cbfs_next_file(u8 *start, u32 size, u32 
align,
newNode->type = header.type;
newNode->data = start + header.offset;
newNode->data_length = header.len;
-   name_len = header.offset - sizeof(struct cbfs_cachenode *);
+   name_len = header.offset - sizeof(struct cbfs_fileheader);
newNode->name = (char *)fileHeader +
-   sizeof(struct cbfs_cachenode *);
+   sizeof(struct cbfs_fileheader);
newNode->name_length = name_len;
newNode->checksum = header.checksum;
 
-- 
2.9.2

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Re: [U-Boot] [PATCH] Bug in cbfs

[Bin Meng]

Hi Yaroslav,

On Mon, Aug 8, 2016 at 4:31 PM, Yaroslav K.  wrote:
> Hi Bin.
>
> Could you please create proper patch yourself? The changes are trivial
> anyway, so it doesn't matter who author is.
>
> --
> Yaroslav

OK, will keep your SoB and clean up this patch.

Regards,
Bin
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Re: [U-Boot] [PATCH 1/2] bdinfo: Don't print out empty DRAM banks

[Bin Meng]

On Sun, Aug 7, 2016 at 2:41 PM, Bin Meng  wrote:
> On Sat, Aug 6, 2016 at 11:57 AM, Simon Glass  wrote:
>> There is no sense in printing out DRAM banks of size 0 since this means they
>> are empty. Skip them.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>
>>  cmd/bdinfo.c | 8 +---
>>  1 file changed, 5 insertions(+), 3 deletions(-)
>>
>
> Reviewed-by: Bin Meng 

applied to u-boot-x86, thanks!
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Re: [U-Boot] [PATCH 2/2] x86: bdinfo: Drop meaningless values

[Bin Meng]

On Sun, Aug 7, 2016 at 2:46 PM, Bin Meng  wrote:
> On Sat, Aug 6, 2016 at 11:57 AM, Simon Glass  wrote:
>> These are not useful on x86 so do not print them.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>
>>  cmd/bdinfo.c | 10 --
>>  1 file changed, 10 deletions(-)
>>
>
> Reviewed-by: Bin Meng 

applied to u-boot-x86, thanks!
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Re: [U-Boot] [PATCH v2 3/3] CONFIG_EFI_LOADER breaks rock2 kernel loading

[Sandy Patterson]

I also found that once the barrier stuff was in, the EFI_LOADER change was
unnecessary.

On Mon, Aug 8, 2016 at 8:50 PM, Ziyuan Xu  wrote:

> Hi Simon,
>
> I think you can drop this patch due to it fixes by a78cd86 - ARM: Rework
> and correct barrier which Tom had merge it into u-boot/master.
>
>
> On 2016年08月09日 05:43, Simon Glass wrote:
>
>> Hi Sandy,
>>
>> On 22 July 2016 at 08:40, Sandy Patterson 
>> wrote:
>>
>>> The problem seems to be invalidate_icache_all() inside the runtime.
>>> This patch just disables EFI_LOADER for rock2 board.
>>>
>>> Signed-off-by: Sandy Patterson 
>>> ---
>>>
>>>   configs/rock2_defconfig | 1 +
>>>   1 file changed, 1 insertion(+)
>>>
>> Can you please give me an update on these patches? Did you discover
>> the root cause? What patches do you think need to be applied for this
>> release. I'd like to get a few more test reports too if possible.
>>
>> Regards,
>> Simon
>>
>>
>>
>>
>
>
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Re: [U-Boot] [PATCH v2 3/3] CONFIG_EFI_LOADER breaks rock2 kernel loading

[Ziyuan Xu]

Hi Simon,

I think you can drop this patch due to it fixes by a78cd86 - ARM: Rework 
and correct barrier which Tom had merge it into u-boot/master.


On 2016年08月09日 05:43, Simon Glass wrote:

Hi Sandy,

On 22 July 2016 at 08:40, Sandy Patterson  wrote:

The problem seems to be invalidate_icache_all() inside the runtime.
This patch just disables EFI_LOADER for rock2 board.

Signed-off-by: Sandy Patterson 
---

  configs/rock2_defconfig | 1 +
  1 file changed, 1 insertion(+)

Can you please give me an update on these patches? Did you discover
the root cause? What patches do you think need to be applied for this
release. I'd like to get a few more test reports too if possible.

Regards,
Simon






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Re: [U-Boot] [v2] mmc: send CMD0 before CMD1 for some MMC cards

[Jaehoon Chung]

Hi Yangbo,

On 08/02/2016 04:33 PM, Yangbo Lu wrote:
> When the MMC framework was added in u-boot, the mmc_go_idle was
> added before mmc_send_op_cond_iter in function mmc_send_op_cond
> annotating that some cards seemed to need this. Actually, we still
> need to do this in function mmc_complete_op_cond for those cards.
> This has been verified on Micron MTFC4GACAECN eMMC chip.

This patch is not bad.. but i need to verify more about entire sequence.
Could you wait a bit?

Best Regards,
Jaehoon Chung

> 
> Signed-off-by: Yangbo Lu 
> ---
>  drivers/mmc/mmc.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index f8e5f7a..d4e96bc 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -422,6 +422,9 @@ static int mmc_complete_op_cond(struct mmc *mmc)
>  
>   mmc->op_cond_pending = 0;
>   if (!(mmc->ocr & OCR_BUSY)) {
> + /* Some cards seem to need this */
> + mmc_go_idle(mmc);
> +
>   start = get_timer(0);
>   while (1) {
>   err = mmc_send_op_cond_iter(mmc, 1);
> 

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[U-Boot] Help Falcon Mode on Wanboard

[Diego Dorta]

Hi Stefano,

I downloaded the patch about Falcon Mode from:

https://www.amazon.com/clouddrive/share/hVlzRXoJv1Jq4DJdgDcVnfmOWjARqR06eCfheWjRcSh/folder/KZakgsCMThWy3I43j2-afQ

Then, as the README file says I did a checkout on commit 
587c3f8ebe356b558f1876414885c1b4a31294ab and applied the patch.

$ git am 0001-wandboard-changes-for-EW-2016-demo.patch

I compiled without errors and then I've tried to upload to the SD card, by 
doing:

$ sudo dd if=SPL of=/dev/sdb bs=1k seek=1; sync

$ sudo dd if=u-boot.img of=/dev/sdb bs=1k seek=69; sync

But, everytime I try to turn on the board I got this error:

U-Boot 2016.01-rc4-26067-g0ff7f76 (Aug 08 2016 - 09:41:44 -0300)

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
initcall sequence 178290cc failed at call 178038bd (err=394279101)
### ERROR ### Please RESET the board ###

I'm using wanboard quad rev: B1.

Does anybody know how to solve this?

Regards,
Diego Dorta
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Re: [U-Boot] [PATCH] efi_loader: disk: Fix CONFIG_BLK breakage

[Simon Glass]

Hi Alexander,

On 5 August 2016 at 06:49, Alexander Graf  wrote:
> When using CONFIG_BLK, there were 2 issues:
>
>   1) The name we generate the device with has to match the
>  name we set in efi_set_bootdev()
>
>   2) The device we pass into our block functions was wrong,
>  we should not rediscover it but just use the already known
>  pointer.
>
> This patch fixes both issues.
>
> Signed-off-by: Alexander Graf 
> ---
>  cmd/bootefi.c | 23 ++-
>  lib/efi_loader/efi_disk.c | 18 +++---
>  2 files changed, 29 insertions(+), 12 deletions(-)
>
> diff --git a/cmd/bootefi.c b/cmd/bootefi.c
> index b8ecf4c..53a6ee3 100644
> --- a/cmd/bootefi.c
> +++ b/cmd/bootefi.c
> @@ -8,6 +8,7 @@
>
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -269,18 +270,30 @@ void efi_set_bootdev(const char *dev, const char 
> *devnr, const char *path)
> char devname[32] = { 0 }; /* dp->str is u16[32] long */
> char *colon;
>
> -   /* Assemble the condensed device name we use in efi_disk.c */
> -   snprintf(devname, sizeof(devname), "%s%s", dev, devnr);
> +#if defined(CONFIG_BLK) || defined(CONFIG_ISO_PARTITION)
> +   desc = blk_get_dev(dev, simple_strtol(devnr, NULL, 10));
> +#endif
> +
> +#ifdef CONFIG_BLK
> +   if (desc) {
> +   snprintf(devname, sizeof(devname), "%s", desc->bdev->name);
> +   } else
> +#endif
> +
> +   {
> +   /* Assemble the condensed device name we use in efi_disk.c */
> +   snprintf(devname, sizeof(devname), "%s%s", dev, devnr);
> +   }
> +
> colon = strchr(devname, ':');
>
>  #ifdef CONFIG_ISO_PARTITION
> /* For ISOs we create partition block devices */
> -   desc = blk_get_dev(dev, simple_strtol(devnr, NULL, 10));
> if (desc && (desc->type != DEV_TYPE_UNKNOWN) &&
> (desc->part_type == PART_TYPE_ISO)) {
> if (!colon)
> -   snprintf(devname, sizeof(devname), "%s%s:1", dev,
> -devnr);
> +   snprintf(devname, sizeof(devname), "%s:1", devname);
> +
> colon = NULL;
> }
>  #endif
> diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> index c434c92..e00a747 100644
> --- a/lib/efi_loader/efi_disk.c
> +++ b/lib/efi_loader/efi_disk.c
> @@ -31,6 +31,8 @@ struct efi_disk_obj {
> struct efi_device_path_file_path *dp;
> /* Offset into disk for simple partitions */
> lbaint_t offset;
> +   /* Internal block device */
> +   const struct blk_desc *desc;

Rather than storing this, can you store the udevice?

>  };
>
>  static efi_status_t efi_disk_open_block(void *handle, efi_guid_t *protocol,
> @@ -78,8 +80,7 @@ static efi_status_t EFIAPI efi_disk_rw_blocks(struct 
> efi_block_io *this,
> unsigned long n;
>
> diskobj = container_of(this, struct efi_disk_obj, ops);
> -   if (!(desc = blk_get_dev(diskobj->ifname, diskobj->dev_index)))
> -   return EFI_EXIT(EFI_DEVICE_ERROR);
> +   desc = (struct blk_desc *) diskobj->desc;
> blksz = desc->blksz;
> blocks = buffer_size / blksz;
> lba += diskobj->offset;
> @@ -213,6 +214,7 @@ static void efi_disk_add_dev(const char *name,
> diskobj->ifname = if_typename;
> diskobj->dev_index = dev_index;
> diskobj->offset = offset;
> +   diskobj->desc = desc;
>
> /* Fill in EFI IO Media info (for read/write callbacks) */
> diskobj->media.removable_media = desc->removable;
> @@ -240,7 +242,8 @@ static void efi_disk_add_dev(const char *name,
>
>  static int efi_disk_create_eltorito(struct blk_desc *desc,
> const char *if_typename,
> -   int diskid)
> +   int diskid,
> +   const char *pdevname)
>  {
> int disks = 0;
>  #ifdef CONFIG_ISO_PARTITION
> @@ -252,8 +255,8 @@ static int efi_disk_create_eltorito(struct blk_desc *desc,
> return 0;
>
> while (!part_get_info(desc, part, )) {
> -   snprintf(devname, sizeof(devname), "%s%d:%d", if_typename,
> -diskid, part);
> +   snprintf(devname, sizeof(devname), "%s:%d", pdevname,
> +part);
> efi_disk_add_dev(devname, if_typename, desc, diskid,
>  info.start);
> part++;
> @@ -296,7 +299,7 @@ int efi_disk_register(void)
> * so let's create them here
> */
> disks += efi_disk_create_eltorito(desc, if_typename,
> - desc->devnum);
> + desc->devnum, dev->name);
> }
>  #else
> int i, if_type;
> @@ -331,7 +334,8 @@ int 

Re: [U-Boot] [PATCH 2/2] x86: i2c: Avoid using BSS before it is available

[Simon Glass]

Hi Heiko,

On 8 August 2016 at 08:45, Heiko Schocher  wrote:
> Hello Simon,
>
>
> Am 07.08.2016 um 08:54 schrieb Bin Meng:
>>
>> On Sat, Aug 6, 2016 at 11:35 AM, Simon Glass  wrote:
>>>
>>> If intel_i2c_bind() is called before relocation there is no BSS section
>>> available. Use the data section instead, which is always available.
>>>
>>> A better fix might be to use global_data, perhaps a new member in
>>> x86's struct arch_global_data. Comments welcome.
>>>
>>> Signed-off-by: Simon Glass 
>>> ---
>>>
>>>   drivers/i2c/intel_i2c.c | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>
>> Reviewed-by: Bin Meng 
>
>
> Hmm... I see no i2c_bind() in mainline U-Boot drivers/i2c/intel_i2c.c
> driver ?
>
> Is this patch and also patch:
> http://patchwork.ozlabs.org/patch/656335/
>
> dependend on another patch(or patchserie) ?

Yes it depends on Stefan's x86 i2c driver. He asked me to take a look.
It can be squashed in - will leave this to Stefan.

Regards,
Simon
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Re: [U-Boot] [PATCH] ARM: tegra: fix trimslice environment location

[Simon Glass]

On 8 August 2016 at 13:56, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Trimslice currently stores its environment at 512KiB into the SPI flash
> chip. The U-Boot binary has grown such that the size of the boot image
> (which includes the Tegra BCT, padding, and the U-Boot binary) is slightly
> larger than 512K now. Consequently, writing the boot image to flash
> corrupts the saved environment, and equally, writing to or erasing the
> environment will corrupt the bootloader, which in turn will cause the
> Tegra boot ROM to enter recovery mode during boot, making it look as if
> the system is non-operational. Note that tegra-uboot-flasher writes to
> the environment during the flashing process.
>
> Solve this by moving the environment as high as possible in flash. This
> will allow the U-Boot binary to roughly double in size before this problem
> is hit again, at which point there's nothing we can do anyway since the
> binary won't fit into flash.
>
> 99% of other Tegra boards store the environment in eMMC and use a negative
> value for CONFIG_ENV_OFFSET, which already automatically places the
> environment as near the end of boot flash as possible. The 1 remaining
> board hard-codes CONFIG_ENV_OFFSET to 2MiB, which allows for plenty more
> bloat.
>
> Reported-by: Stephen L Arnold 
> Signed-off-by: Stephen Warren 
> ---
>  include/configs/trimslice.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v6 01/12] clk: Use dummy clk_get_by_* functions when CONFIG_CLK is disabled

[Simon Glass]

On 5 August 2016 at 02:30, Paul Burton  wrote:
>
>
> On 05/08/16 02:36, Simon Glass wrote:
>>
>> Hi Paul,
>>
>> On 4 August 2016 at 04:29, Paul Burton  wrote:
>>>
>>> The implementations of clk_get_by_index & clk_get_by_name are only
>>> available when CONFIG_CLK is enabled. Provide the dummies when this is
>>> not the case in order to avoid build failures.
>>
>>
>> Where are the dummies?
>
>
> Hi Simon,
>
> I mean the static inline versions which just return -ENOSYS, which already
> exist in clk.h but weren't provided before unless CONFIG_OF_CONTROL wasn't
> set.
>
> Thanks,
> Paul

Reviewed-by: Simon Glass 

[...]
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Re: [U-Boot] [PATCH 0/2] efi_loader: Implement reset on RPi

[Simon Glass]

Hi,

On 7 August 2016 at 10:59, Andreas Färber  wrote:
> Am 14.07.2016 um 08:18 schrieb Alexander Graf:
>>> Am 14.07.2016 um 06:48 schrieb Andreas Färber :
>>>
>>> Hi Alex,
>>>
 Am 05.06.2016 um 23:17 schrieb Alexander Graf:
 If Linux finds an EFI implementation it always uses the EFI reset handler 
 to
 reboot or power down the system.
>>>
>>> Hm, I thought my powerdown issues on the Jetson TK1 were for lack of
>>> CONFIG_AS3277_RESET - sounds like it could be due to EFI instead?
>>
>> It depends. IIRC the TK1 is 32bit, where you're probably using grub2 which 
>> is not efi Linux aware, but instead boots over the zImage protocol. In that 
>> case Linux doesn't know about efi runtime services.
>
> We've confirmed in the meantime that the Jetson TK1 issues were
> unrelated to EFI and could be worked around by enabling some as3722
> kernel option.
>
 Unfortunately we haven't implemented that one yet. In fact, while we 
 prepared
 for RTS handling, we never actually implemented a single user.

 This is going to change today. This simple patch set enables RTS reset 
 support
 for the RPi systems, allowing you to reboot and shut down the rpi if booted
 via EFI.

 It also lays the groundwork to show how to implement that functionality at 
 all,
 so I expect more boards to follow.

 Alexander Graf (2):
  efi_loader: Allow boards to implement get_time and reset_system
  ARM: bcm283x: Implement EFI RTS reset_system

 arch/arm/mach-bcm283x/include/mach/wdog.h |   2 +-
 arch/arm/mach-bcm283x/reset.c |  59 +++--
 cmd/bootefi.c |   4 ++
 include/efi_loader.h  |  18 ++
 lib/efi_loader/efi_runtime.c  | 101 
 ++
 5 files changed, 166 insertions(+), 18 deletions(-)
>>>
>>> This all looks very non-generic and would mean that every board will
>>> need to be patched individually, which is unrealistic to be tested by
>>> just the two of us.
>>>
>>> Can't you patch the reset_cpu() declaration (common.h/sysreset.h)
>>> instead of all its implementations? We might still need to patch
>>> individual implementations but I don't see why any reset_cpu()
>>> implementation should be in a different section than others.
>>
>> Hmm. There are 2 minor problems:
>>
>>   1) Efi also supports power off on top of reset
>>   2) We would have to convert all boards at once, rather than one by one, as 
>> we couldn't distinguish between efi aware and unaware ones
>
> I don't see why we would need to convert everything at once either way.
>
>>
>> And one major issue:
>>
>> All device memory pointers used by the reset functions need to be marked as 
>> such in the efi memory map and live relocated when entering runtime mode. So 
>> we need to manually touch every function either way.

I'm worried about this. It means that any code used from this run-time
needs to be so marked. This could be large tracts of U-Boot. In
particular, as I have mentioned a few times, I think the UEFI tables
should be 'live' and not just created before booting, which means that
much of driver/core needs to be in the UEFI section.

Should we just adjust it so that the whole of U-Boot is in there? How
big is the UEFI run-time normally?

>>
>> That mesns we could either make a generic, broken version. Or we just 
>> convert one by one for systems that we can verify it on :). I hope that I 
>> designed the APIs easily enough that people who are not us enable RTS 
>> support on other platforms too :)
>
>
> Ping! Anyone any comments on the two open questions of uppercase vs.
> lowercase and placement of attribute?

I prefer lower case :-)

>
> 1/2 should not be affected by those discussion points and already
> featured in a second series (LS2080ARDB).

Regards,
Simon
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Re: [U-Boot] [PATCH v5 0/4] add support for rk3399 soc and evb

[Simon Glass]

Hi Andreas,

On 7 August 2016 at 12:26, Andreas Färber  wrote:
> Am 19.07.2016 um 15:16 schrieb Kever Yang:
>>
>> Hi Simon,
>>
>> Sorry for didn't apply all the changes for comments from
>> Andreas in V4, I rebase this patchset on u-boot-rockchip.git
>> master branch and reset to below commit:
>>  f278234 rockchip: update fastboot usage
>>
>> Please help to rebase my patches, you should be able to
>> apply these patches directly.
>>
>> This patchset add support for rk3399 with ATF based on
>> Rockchip miniloader as secondary bootloader instead of
>> U-Boot SPL.
>>
>> Rockchip miniloader init the DRAM and load the ATF and
>> U-Boot to runing address, and then jump to ATF, the ATF
>> do some init and switch to EL2/EL1 mode before jump to
>> next loader which is U-Boot here.
>>
>> Pls reference board/rockchip/evb_rk3399/README to setup
>> the board.
>>
>> Will migrate to SPL once its ready for ATF.
>>
>> This patch set is based on below patch:
>> "board: move all the rockchip board in one folder"
>>
>> This patch set has been test on rk3399 evb board.
>>
>> In this version, I split the mmc driver in seperate thread,
>> because when I enable the full-model for mmc driver,
>> Seems bug happen in blk layer, will descript detail in
>> mmc patch.
>>
>>
>> Changes in v5:
>> - add file source and detail changes for U-Boot
>> - Rebase to u-boot-rockchip.git;
>> - fixes base on comments from Andreas;
>> - fix for comments from Simon, correct some typo;
>>
>> Changes in v4:
>> - remove extra blank line in evb_rk3399.h,
>> - remove unnecessary including file in rk3399_common.h,
>> - fixes base on comments from Andreas,
>> - Rebase on U-Boot ToT.
>> - move config CONFIG_SYS_NS16550 from chip common to defconfig
>>
>> Changes in v3:
>> - Rebase on patch from Andreas:
>> - [PATCH] rockchip: Exclude rk_timer for ARM64
>> - [PATCH] rockchip: Clean up CPU selection
>>
>> Changes in v2:
>> - fix description error on board Kconfig
>> - fix a binary path error
>>
>> Kever Yang (4):
>>   dts: add support for Rockchip rk3399 soc
>>   ARM64: rockchip: add support for rk3399 SoC based evb
>>   config: add config file for evb-rk3399
>>   ARM64: evb-rk3399: add a README for this board setup
>>
>>  arch/arm/Kconfig   |6 +-
>>  arch/arm/dts/Makefile  |3 +-
>>  arch/arm/dts/rk3399-evb.dts|  104 
>>  arch/arm/dts/rk3399.dtsi   | 1028 
>> 
>>  arch/arm/mach-rockchip/Kconfig |   16 +
>>  arch/arm/mach-rockchip/Makefile|1 +
>>  arch/arm/mach-rockchip/rk3399/Kconfig  |   23 +
>>  arch/arm/mach-rockchip/rk3399/Makefile |7 +
>>  arch/arm/mach-rockchip/rk3399/rk3399.c |   28 +
>>  board/rockchip/evb_rk3399/Kconfig  |   15 +
>>  board/rockchip/evb_rk3399/MAINTAINERS  |0
>
> Was this intentionally merged with an empty MAINTAINERS file?

Well they are nice to have.

Kever can you please add a MAINTAINERS file?

We seem to be heading in the wrong direction here though:

$ ./tools/genboardscfg.py
/tmp/tmpP5gJ26:33: warning: overriding the value of USB. Old value:
"y", new value: "y".
/tmp/tmpP5gJ26:34: warning: overriding the value of USB_GADGET. Old
value: "y", new value: "y".
WARNING: no status info for 'ds414'
WARNING: no maintainers for 'ds414'
WARNING: no status info for 'conga-qeval20-qa3-e3845-internal-uart'
WARNING: no maintainers for 'conga-qeval20-qa3-e3845-internal-uart'
WARNING: no status info for 'am57xx_hs_evm'
WARNING: no maintainers for 'am57xx_hs_evm'
WARNING: no status info for 'p2771--a02'
WARNING: no maintainers for 'p2771--a02'
WARNING: no status info for 'malta64'
WARNING: no maintainers for 'malta64'
WARNING: no status info for 'strider_con_dp'
WARNING: no maintainers for 'strider_con_dp'
WARNING: no status info for 'evb-rk3399'
WARNING: no maintainers for 'evb-rk3399'
WARNING: no status info for 'p2771--b00'
WARNING: no maintainers for 'p2771--b00'
WARNING: no status info for 'espresso7420'
WARNING: no maintainers for 'espresso7420'
WARNING: no status info for 'strider_cpu_dp'
WARNING: no maintainers for 'strider_cpu_dp'
WARNING: no status info for 'malta64el'
WARNING: no maintainers for 'malta64el'


>
> Andreas
>
>>  board/rockchip/evb_rk3399/Makefile |7 +
>>  board/rockchip/evb_rk3399/README   |   73 +++
>>  board/rockchip/evb_rk3399/evb-rk3399.c |   26 +
>>  configs/evb-rk3399_defconfig   |   33 +
>>  include/configs/evb_rk3399.h   |   26 +
>>  include/configs/rk3399_common.h|   73 +++
>>  include/dt-bindings/clock/rk3399-cru.h |  746 +++
>>  18 files changed, 2210 insertions(+), 5 deletions(-)
>>  create mode 100644 arch/arm/dts/rk3399-evb.dts
>>  create mode 100644 arch/arm/dts/rk3399.dtsi
>>  create mode 100644 arch/arm/mach-rockchip/rk3399/Kconfig
>>  create mode 100644 arch/arm/mach-rockchip/rk3399/Makefile
>>  create mode 100644 arch/arm/mach-rockchip/rk3399/rk3399.c
>>  create mode 100644 

Re: [U-Boot] [PATCH 0/2] rockchip: Initial RK3368 and GeekBox support

[Simon Glass]

Hi Tom, Andreas,

On 7 August 2016 at 14:07, Tom Rini  wrote:
> On Sun, Aug 07, 2016 at 06:46:37PM +0200, Andreas Färber wrote:
>> Am 07.08.2016 um 15:31 schrieb Tom Rini:
>> > On Sat, Aug 06, 2016 at 06:05:29PM +0200, Andreas Färber wrote:
>> >> Hi Simon,
>> >>
>> >> Am 06.08.2016 um 06:30 schrieb Simon Glass:
>> >>> Hi Andreas,
>> >>>
>> >>> On 17 July 2016 at 19:06, Andreas Färber  wrote:
>>  Hi,
>> 
>>  This series adds initial support for RK3368 SoC and GeekBox.
>>  For more details see the commit message.
>> 
>>  Will need to be rebased onto Heiko's cleanups and Kever's RK3399 series.
>> 
>>  Regards,
>>  Andreas
>> 
>>  Cc: Simon Glass 
>>  Cc: Kever Yang 
>>  Cc: Heiko Stübner 
>> 
>>  Andreas Färber (2):
>>    dts: Import rk3368-geekbox.dts
>>    ARM64: rockchip: Add initial support for RK3368 based GeekBox
>> 
>> >>>
>> >>> Are you planning to respin these patches?
>> >>
>> >> Eventually...?
>> >>
>> >>> I'd like to get them applied soon.
>> >>
>> >> And I'd like to get my work recognized! However, despite our previous
>> >> IRC chat, I had to find out _while_ replying to the rk3399 mails that
>> >> you had once again not just applied all patches (twenty minutes after
>> >> ack'ing them on a Saturday) but already sent a pull on Tuesday my
>> >> nighttime that I was not CC'ed on and that Tom has merged the night
>> >> after. So it feels like I'm wasting my time here and consequently I
>> >> stopped my review and rebase.
>> >
>> > In the U-Boot community, we are not in the habit of cc'ing everyone with
>> > a change in a given pull request.  Is there a tool the kernel folks use
>> > here that makes this easy?
>>
>> Not that I'm aware of.
>>
>> But that is besides the point, as my very complaint is that I'm not
>> credited in the patches that got merged, so no tool could've extracted
>> my name for CC'ing.
>
> Alright.
>
>> It's about Simon having mismerged those patches and having overlooked
>> unresolved review comments of mine for those patches before and me
>> specifically having complained to him about not waiting for my
>> Reviewed-by before applying them. So him seeing that I did not reply to
>> his Saturday mails, I feel it would've been fair in this particular case
>> a) to ping me again after the weekend and b) to let me know that he is
>> no longer waiting for my review comments or that I really need to hurry
>> up with an objection until X. He did not say so in a reply that reached
>> my inbox, and I was not CC'ed on the pull request itself, thus a pull
>> request behind my back.
>>
>> I'm not too deep into U-Boot, so maybe there was a reason for this
>> hush-hush workflow, but then at least the communication was fairly bad.
>>
>> Had I known that the pull is already on the list, I wouldn't have
>> replied with a Reviewed-by for 1/4 that same day (which surely Simon was
>> CC'ed on) or I could've asked Tom to hold off merging it until I'm done
>> reviewing the next day.
>>
>> > And the rule of thumb that I use, and I try and get everyone else to use
>> > as well is that a patch should be out for a week before it gets picked
>> > up and merged as that should give everyone time to review, comment and
>> > test.  Did that not happen with the patches Simon picked up?
>>
>> Slightly less than a week. For some other projects it's ~two weeks.
>> Also again note that this is not about some random patch but one where
>> Simon specifically said he would be away, that he would exchange the
>> patches on his branch where necessary and where he asked me to "sing".
>> It leaves a bad taste that Simon was absent himself the week the patches
>> were posted but apparently expects me to be available whenever he is. I
>> don't work on U-Boot as a job, and for rebasing rk3368 patches - which
>> many of my review comments resulted from - I need access to the hardware
>> for testing.
>>
>> Note that I was similarly surprised how quickly two patches of mine went
>> into his tree, with just one day in between and despite conflicts
>> between my rk3368 and Kever's rk3399 preparations. I can see that having
>> patches in a tree facilitates testing, but it also prevents serious peer
>> review when not just staging but also merging them.
>
> I want to treat all of the above at once.  First, sorry.  We don't have
> an intentionally "hush-hush" workflow, but every custodian does decide
> how many emails to send when moving a patch forward.  And unless I'm
> testing multiple PRs (or they come in while I'm already testing one) the
> time between getting a PR and applying it is usually the same (US, east
> coast) day if it passes my testing.  But we are trying to include more
> crediting, not less, so it is not intentional to have left things
> out[1].  So this was a mistake in our part, sorry.  Sometimes review
> comments are missed.  But this too 

Re: [U-Boot] [PATCH] ARM: tegra: move ft_system_setup()

[Simon Glass]

On 8 August 2016 at 10:38, Stephen Warren  wrote:
> From: Stephen Warren 
>
> Currently, ft_system_setup() is implemented by board*.c, which are a bit
> of a dumping ground for a bunch of unrelated functionality, and separate
> versions exist for pre-Tegra186 and Tegra186. Move the implementation into
> a separate file to separate functionality, and allow sharing.
>
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/mach-tegra/Makefile   |  1 +
>  arch/arm/mach-tegra/board186.c |  5 -
>  arch/arm/mach-tegra/board2.c   | 26 --
>  arch/arm/mach-tegra/dt-setup.c | 34 ++
>  4 files changed, 35 insertions(+), 31 deletions(-)
>  create mode 100644 arch/arm/mach-tegra/dt-setup.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 0/7] efi_loader: Expose SMBIOS table

[Simon Glass]

Hi Alexander,

On 8 August 2016 at 08:06, Alexander Graf  wrote:
> We generate a few tables on x86 today that really can be used on ARM just
> the same. One such example is the SMBIOS table, which people use with tools
> like "dmidecode" to identify which hardware they are running on.
>
> We're slowly growing needs to collect serial numbers from various devices
> on ARM and SMBIOS seems the natural choice. So this patch set moves the
> current SMBIOS generation into generic code and adds serial number exposure
> to it.

Shouldn't we use device tree? Why would an ARM device use SMBIOS?

>
> I have verified that I get a correct serial number printed in dmidecode on
> the RPi3.
>
> Alexander Graf (7):
>   x86: Move table csum into separate header
>   x86: Move smbios generation into arch independent directory
>   efi_loader: Expose efi_install_configuration_table
>   smbios: Allow compilation on 64bit systems
>   smbios: Expose in efi_loader as table
>   efi_loader: Fix efi_install_configuration_table
>   smbios: Provide serial number
>
>  arch/x86/Kconfig   | 27 --
>  arch/x86/include/asm/tables.h  |  2 +
>  arch/x86/lib/Makefile  |  1 -
>  arch/x86/lib/tables.c  | 21 ---
>  cmd/bootefi.c  |  3 ++
>  include/efi_api.h  |  4 ++
>  include/efi_loader.h   |  4 ++
>  {arch/x86/include/asm => include}/smbios.h |  5 ++-
>  include/tables_csum.h  | 22 +++
>  lib/Kconfig| 33 +
>  lib/Makefile   |  1 +
>  lib/efi_loader/efi_boottime.c  | 24 +++-
>  {arch/x86/lib => lib}/smbios.c | 59 
> +-
>  13 files changed, 142 insertions(+), 64 deletions(-)
>  rename {arch/x86/include/asm => include}/smbios.h (96%)
>  create mode 100644 include/tables_csum.h
>  rename {arch/x86/lib => lib}/smbios.c (82%)
>
> --
> 2.6.6
>


Regards,
Simon
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Re: [U-Boot] [PATCH 2/2] power: pmic: act8846: add missing newline to debug statements

[Simon Glass]

On 7 August 2016 at 05:55, John Keeping  wrote:
> Signed-off-by: John Keeping 
> ---
>
>  drivers/power/pmic/act8846.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH 1/2] power: regulator: act8846: fix reading values

[Simon Glass]

On 7 August 2016 at 05:55, John Keeping  wrote:
> The voltage and control registers need to be looked up from the value in
> driver_data.  Adjust the get_value and get_enable functions to match the
> corresponding set_* functions.
>
> Signed-off-by: John Keeping 
> ---
>
>  drivers/power/regulator/act8846.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH] common: sh: add necessary define bits to board_f

[Simon Glass]

On 6 August 2016 at 12:08, Vladimir Zapolskiy  wrote:
> Since a platform conversion to generic board support has not been
> accomplished some architecture specific bits are missing from board_f
> init sequence, the change adds a number of basic expected callbacks
> into early init sequence.
>
> Signed-off-by: Vladimir Zapolskiy 
> ---
>  common/board_f.c | 15 +--
>  1 file changed, 9 insertions(+), 6 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2] drivers/sysreset: group sysreset drivers

[Simon Glass]

On 6 August 2016 at 23:53, Max Filippov  wrote:
> Create drivers/sysreset and move sysreset-uclass and all sysreset
> drivers there.
>
> Signed-off-by: Max Filippov 
> ---
> Changes v1->v2:
> - move RK3399 sysreset driver as well;
> - format patch with -M to make renames explicit.
> ---
>  arch/arm/mach-rockchip/rk3036/Makefile   |  1 -
>  arch/arm/mach-rockchip/rk3288/Makefile   |  1 -
>  arch/arm/mach-rockchip/rk3399/Makefile   |  1 -
>  arch/arm/mach-snapdragon/Makefile|  1 -
>  drivers/Kconfig  |  2 ++
>  drivers/Makefile |  3 ++-
>  drivers/misc/Kconfig |  9 -
>  drivers/misc/Makefile|  2 --
>  drivers/sysreset/Kconfig | 16 
> 
>  drivers/sysreset/Makefile| 15 +++
>  drivers/{misc => sysreset}/sysreset-uclass.c |  0
>  .../reset_rk3036.c => drivers/sysreset/sysreset_rk3036.c |  0
>  .../reset_rk3288.c => drivers/sysreset/sysreset_rk3288.c |  0
>  .../reset_rk3399.c => drivers/sysreset/sysreset_rk3399.c |  0
>  drivers/{misc => sysreset}/sysreset_sandbox.c|  0
>  .../reset.c => drivers/sysreset/sysreset_snapdragon.c|  0
>  16 files changed, 35 insertions(+), 16 deletions(-)
>  create mode 100644 drivers/sysreset/Kconfig
>  create mode 100644 drivers/sysreset/Makefile
>  rename drivers/{misc => sysreset}/sysreset-uclass.c (100%)
>  rename arch/arm/mach-rockchip/rk3036/reset_rk3036.c => 
> drivers/sysreset/sysreset_rk3036.c (100%)
>  rename arch/arm/mach-rockchip/rk3288/reset_rk3288.c => 
> drivers/sysreset/sysreset_rk3288.c (100%)
>  rename arch/arm/mach-rockchip/rk3399/reset_rk3399.c => 
> drivers/sysreset/sysreset_rk3399.c (100%)
>  rename drivers/{misc => sysreset}/sysreset_sandbox.c (100%)
>  rename arch/arm/mach-snapdragon/reset.c => 
> drivers/sysreset/sysreset_snapdragon.c (100%)

Acked-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 3/3] CONFIG_EFI_LOADER breaks rock2 kernel loading

[Simon Glass]

Hi Sandy,

On 22 July 2016 at 08:40, Sandy Patterson  wrote:
> The problem seems to be invalidate_icache_all() inside the runtime.
> This patch just disables EFI_LOADER for rock2 board.
>
> Signed-off-by: Sandy Patterson 
> ---
>
>  configs/rock2_defconfig | 1 +
>  1 file changed, 1 insertion(+)

Can you please give me an update on these patches? Did you discover
the root cause? What patches do you think need to be applied for this
release. I'd like to get a few more test reports too if possible.

Regards,
Simon
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Re: [U-Boot] [PATCH 1/2 V4] misc: add "call" uclass op

[Tom Warren]

Simon,

> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Monday, August 08, 2016 12:54 PM
> To: Simon Glass 
> Cc: U-Boot Mailing List ; Tom Warren
> ; Stephen Warren ; Tom Rini
> 
> Subject: Re: [PATCH 1/2 V4] misc: add "call" uclass op
> 
> On 08/08/2016 01:47 PM, Simon Glass wrote:
> > +Tom
> >
> > Hi Stephen,
> >
> > On 8 August 2016 at 10:41, Stephen Warren 
> wrote:
> >> On 08/08/2016 10:38 AM, Simon Glass wrote:
> >>>
> >>> Hi Stephen,
> >>>
> >>> On 8 August 2016 at 09:41, Stephen Warren 
> wrote:
> 
> 
>  From: Stephen Warren 
> 
>  The call op requests that the callee pass a message to the
>  underlying HW or device, wait for a response, and then pass back
>  the response error code and message to the callee. It is useful for
>  drivers that represent some kind of messaging or IPC channel to a
>  remote device.
> 
>  Signed-off-by: Stephen Warren 
>  Acked-by: Simon Glass 
>  ---
>  v4: Adjust misc_call() to return the response msg size on success.
>  v3: New patch.
>  ---
>   drivers/misc/misc-uclass.c | 11 +++
>   include/misc.h | 35 +++
>   2 files changed, 46 insertions(+)
> >>>
> >>>
> >>> Are you planning for the Tegra186 stuff to go into the upcoming release?
> >>
> >>
> >> I'd like it to if at all possible; it's all pretty much
> >> Tegra-specific drivers so shouldn't cause any fallout for other
> >> platforms. The only exception is the fdt_translate_address() changes,
> >> which are a dependency, which will be built into other platforms, but
> >> there's a simple Boolean parameter that controls the new behaviour, so it
> should be pretty safe.
> >
> > OK, sounds reasonable to me. I'll pick these up later in the week and
> > send a pull request. Can you bring any other dependencies in via
> > Tegra?
> 
> Yes, I was assuming that TomW would take everything else; it's all Tegra
> drivers.
Stephen and I are working together to get it all packaged up and in to 
u-boot-tegra ASAP.

Tom
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[U-Boot] [PATCH] ARM: tegra: fix trimslice environment location

[Stephen Warren]

From: Stephen Warren 

Trimslice currently stores its environment at 512KiB into the SPI flash
chip. The U-Boot binary has grown such that the size of the boot image
(which includes the Tegra BCT, padding, and the U-Boot binary) is slightly
larger than 512K now. Consequently, writing the boot image to flash
corrupts the saved environment, and equally, writing to or erasing the
environment will corrupt the bootloader, which in turn will cause the
Tegra boot ROM to enter recovery mode during boot, making it look as if
the system is non-operational. Note that tegra-uboot-flasher writes to
the environment during the flashing process.

Solve this by moving the environment as high as possible in flash. This
will allow the U-Boot binary to roughly double in size before this problem
is hit again, at which point there's nothing we can do anyway since the
binary won't fit into flash.

99% of other Tegra boards store the environment in eMMC and use a negative
value for CONFIG_ENV_OFFSET, which already automatically places the
environment as near the end of boot flash as possible. The 1 remaining
board hard-codes CONFIG_ENV_OFFSET to 2MiB, which allows for plenty more
bloat.

Reported-by: Stephen L Arnold 
Signed-off-by: Stephen Warren 
---
 include/configs/trimslice.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h
index b761640b8fb8..9d49f6380352 100644
--- a/include/configs/trimslice.h
+++ b/include/configs/trimslice.h
@@ -37,7 +37,8 @@
 #define CONFIG_ENV_SPI_MAX_HZ  4800
 #define CONFIG_ENV_SPI_MODESPI_MODE_0
 #define CONFIG_ENV_SECT_SIZE   CONFIG_ENV_SIZE
-#define CONFIG_ENV_OFFSET  (512 * 1024)
+/* 1MiB flash, environment located as high as possible */
+#define CONFIG_ENV_OFFSET  (SZ_1M - CONFIG_ENV_SIZE)
 
 /* USB Host support */
 #define CONFIG_USB_EHCI
-- 
2.9.2

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Re: [U-Boot] [PATCH 1/2 V4] misc: add "call" uclass op

[Stephen Warren]

On 08/08/2016 01:47 PM, Simon Glass wrote:

+Tom

Hi Stephen,

On 8 August 2016 at 10:41, Stephen Warren  wrote:

On 08/08/2016 10:38 AM, Simon Glass wrote:


Hi Stephen,

On 8 August 2016 at 09:41, Stephen Warren  wrote:



From: Stephen Warren 

The call op requests that the callee pass a message to the underlying HW
or device, wait for a response, and then pass back the response error
code
and message to the callee. It is useful for drivers that represent some
kind of messaging or IPC channel to a remote device.

Signed-off-by: Stephen Warren 
Acked-by: Simon Glass 
---
v4: Adjust misc_call() to return the response msg size on success.
v3: New patch.
---
 drivers/misc/misc-uclass.c | 11 +++
 include/misc.h | 35 +++
 2 files changed, 46 insertions(+)



Are you planning for the Tegra186 stuff to go into the upcoming release?



I'd like it to if at all possible; it's all pretty much Tegra-specific
drivers so shouldn't cause any fallout for other platforms. The only
exception is the fdt_translate_address() changes, which are a dependency,
which will be built into other platforms, but there's a simple Boolean
parameter that controls the new behaviour, so it should be pretty safe.


OK, sounds reasonable to me. I'll pick these up later in the week and
send a pull request. Can you bring any other dependencies in via
Tegra?


Yes, I was assuming that TomW would take everything else; it's all Tegra 
drivers.

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Re: [U-Boot] [PATCH 1/2 V4] misc: add "call" uclass op

[Simon Glass]

+Tom

Hi Stephen,

On 8 August 2016 at 10:41, Stephen Warren  wrote:
> On 08/08/2016 10:38 AM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 8 August 2016 at 09:41, Stephen Warren  wrote:
>>>
>>>
>>> From: Stephen Warren 
>>>
>>> The call op requests that the callee pass a message to the underlying HW
>>> or device, wait for a response, and then pass back the response error
>>> code
>>> and message to the callee. It is useful for drivers that represent some
>>> kind of messaging or IPC channel to a remote device.
>>>
>>> Signed-off-by: Stephen Warren 
>>> Acked-by: Simon Glass 
>>> ---
>>> v4: Adjust misc_call() to return the response msg size on success.
>>> v3: New patch.
>>> ---
>>>  drivers/misc/misc-uclass.c | 11 +++
>>>  include/misc.h | 35 +++
>>>  2 files changed, 46 insertions(+)
>>
>>
>> Are you planning for the Tegra186 stuff to go into the upcoming release?
>
>
> I'd like it to if at all possible; it's all pretty much Tegra-specific
> drivers so shouldn't cause any fallout for other platforms. The only
> exception is the fdt_translate_address() changes, which are a dependency,
> which will be built into other platforms, but there's a simple Boolean
> parameter that controls the new behaviour, so it should be pretty safe.

OK, sounds reasonable to me. I'll pick these up later in the week and
send a pull request. Can you bring any other dependencies in via
Tegra?

Regards,
Simon
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[U-Boot] [PATCH] tools: kwboot: patch destaddr only for SoCs with header version 1

[Simon Baatz]

Commit f4db6c976cf ("arm: mvebu: Add runtime detection of UART (xmodem)
boot-mode") added a change to hdr->destaddr when dynamically patching an
image for UART boot mode.  With this change, kwboot ceases to work on
Kirkwood.

Thus, let's change hdr->destaddr only when we are patching an image with
header version 1 (Orion and Kirkwood use header version 0).

Signed-off-by: Simon Baatz 
Fixes: f4db6c976cf ("arm: mvebu: Add runtime detection of UART (xmodem) 
boot-mode")
Cc: Stefan Roese 
Cc: Luka Perkov 
Cc: Kevin Smith 
---

Hi,

this patch makes kwboot work again on Kirkwood for me.  However, I could not
verify whether Armada XP / 38x still works, since I don't have such
hardware.

- Simon

 tools/kwboot.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/tools/kwboot.c b/tools/kwboot.c
index e00958a..4160e5b 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -655,14 +655,6 @@ kwboot_img_patch_hdr(void *img, size_t size)
 
hdr->blockid = IBR_HDR_UART_ID;
 
-   /*
-* Subtract mkimage header size from destination address
-* as this header is not expected by the Marvell BootROM.
-* This way, the execution address is identical to the
-* one the image is compiled for (TEXT_BASE).
-*/
-   hdr->destaddr = hdr->destaddr - sizeof(struct image_header);
-
if (image_ver == 0) {
struct main_hdr_v0 *hdr_v0 = img;
 
@@ -672,6 +664,14 @@ kwboot_img_patch_hdr(void *img, size_t size)
hdr_v0->srcaddr = hdr_v0->ext
? sizeof(struct kwb_header)
: sizeof(*hdr_v0);
+   } else {
+ /*
+  * Subtract mkimage header size from destination address
+  * as this header is not expected by the Marvell BootROM.
+  * This way, the execution address is identical to the
+  * one the image is compiled for (TEXT_BASE).
+  */
+ hdr->destaddr = hdr->destaddr - sizeof(struct image_header);
}
 
hdr->checksum = kwboot_img_csum8(hdr, hdrsz) - csum;
-- 
2.7.4

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[U-Boot] [PATCH 0/6] sh4: fix and simplify cache manipulation

[Vladimir Zapolskiy]

In my tests I experience that sometimes SH4 does not properly
fetch instructions after immediate jump to a code loaded by
means of rtl8139, the problem is gone if "icache off" is
executed after load or if cache invalidation and write-back
is used on data load instead of just cache invalidation,
which is apparently an improper backbone of flush_dcache_range()
function.

The changeset contains a couple of bugfixes and a general
simplification of the code related to cache manipulation. Note
that while caches are found on SH2 and SH3 for long time
they were inactive in U-Boot, because I don't have SH2/SH3
hardware for testing I don't spread SH4 cache fixes to those
cpus, however generally it should be the same, in that case
arch/sh/cpu/sh4/cache.c file can be moved to arch/sh/lib
folder

For 3/6 patch there is a minor patch application dependency on
one change https://patchwork.ozlabs.org/patch/656383/ , so
formally it might be easier to apply the series after the
series, which switches SH architectures to generic board.

Vladimir Zapolskiy (6):
  sh4: cache: correct dcache flush to invalidate with write-back
  sh4: cache: correct flush_cache() to writeback and invalidate
  sh3: remove unused cache.c file from being built
  sh: cache use jump_to_P2() and back_to_P1() from asm/system.h
  sh: cache: don't modify CCR from P1 area
  sh4: cache: move exported cache manipulation functions into cache.c

 arch/sh/cpu/sh3/Makefile|  2 +-
 arch/sh/cpu/sh3/cache.c | 96 -
 arch/sh/cpu/sh4/cache.c | 88 -
 arch/sh/cpu/sh4/cpu.c   | 34 
 arch/sh/include/asm/cache.h |  2 -
 5 files changed, 43 insertions(+), 179 deletions(-)
 delete mode 100644 arch/sh/cpu/sh3/cache.c

-- 
2.8.1

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[U-Boot] [PATCH 1/6] sh4: cache: correct dcache flush to invalidate with write-back

[Vladimir Zapolskiy]

In common usecases flush_cache() assumes both cache invalidation and
write-back to memory, thus in flush_dcache_range() implementation
change SH4 cache write-back only instruction 'ocbwb' with cache purge
instruction 'ocbp', according to the User's Manual there should be no
performance penalty for that.

Note that under circumstances only cache invalidation is expected from
flush_cache() call, in these occasional cases the current version of
flush_cache() works, which is a wrapper over invalidate_dcache_range()
at the moment, this will be fixed in the following change.

Signed-off-by: Vladimir Zapolskiy 
---
 arch/sh/cpu/sh4/cache.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
index e1ee970..b3e5fd5 100644
--- a/arch/sh/cpu/sh4/cache.c
+++ b/arch/sh/cpu/sh4/cache.c
@@ -97,7 +97,7 @@ void flush_dcache_range(unsigned long start, unsigned long 
end)
 
start &= ~(L1_CACHE_BYTES - 1);
for (v = start; v < end; v += L1_CACHE_BYTES) {
-   asm volatile ("ocbwb %0" :  /* no output */
+   asm volatile ("ocbp %0" :   /* no output */
  : "m" (__m(v)));
}
 }
-- 
2.8.1

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[U-Boot] [PATCH 4/6] sh: cache use jump_to_P2() and back_to_P1() from asm/system.h

[Vladimir Zapolskiy]

Both jump_to_P2() and back_to_P1() functions are found in asm/system.h
header file and functionally they are the same, don't redefine them.

Signed-off-by: Vladimir Zapolskiy 
---
 arch/sh/cpu/sh4/cache.c | 39 ++-
 1 file changed, 2 insertions(+), 37 deletions(-)

diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
index b3e5fd5..50695b6 100644
--- a/arch/sh/cpu/sh4/cache.c
+++ b/arch/sh/cpu/sh4/cache.c
@@ -7,44 +7,9 @@
 
 #include 
 #include 
-#include 
 #include 
-
-/*
- * Jump to P2 area.
- * When handling TLB or caches, we need to do it from P2 area.
- */
-#define jump_to_P2()   \
-  do { \
-unsigned long __dummy; \
-__asm__ __volatile__(  \
-   "mov.l  1f, %0\n\t" \
-   "or %1, %0\n\t" \
-   "jmp@%0\n\t"\
-   " nop\n\t"  \
-   ".balign 4\n"   \
-   "1: .long 2f\n" \
-   "2:"\
-   : "=" (__dummy)   \
-   : "r" (0x2000));\
-  } while (0)
-
-/*
- * Back to P1 area.
- */
-#define back_to_P1()   \
-  do { \
-unsigned long __dummy; \
-__asm__ __volatile__(  \
-   "nop;nop;nop;nop;nop;nop;nop\n\t"   \
-   "mov.l  1f, %0\n\t" \
-   "jmp@%0\n\t"\
-   " nop\n\t"  \
-   ".balign 4\n"   \
-   "1: .long 2f\n" \
-   "2:"\
-   : "=" (__dummy)); \
-  } while (0)
+#include 
+#include 
 
 #define CACHE_VALID   1
 #define CACHE_UPDATED 2
-- 
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[U-Boot] [PATCH 5/6] sh: cache: don't modify CCR from P1 area

[Vladimir Zapolskiy]

cache_wback_all() is a local function and it is called from
cache_control() only, which is in turn jumps to P2 area.

The change fixes an issue when cache_wback_all() returns from P2 to
P1, however cache_control() continues to manipulate with CCR
register, according to the User's Manual this is restricted.

Signed-off-by: Vladimir Zapolskiy 
---
 arch/sh/cpu/sh4/cache.c | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
index 50695b6..7750f0f 100644
--- a/arch/sh/cpu/sh4/cache.c
+++ b/arch/sh/cpu/sh4/cache.c
@@ -18,10 +18,10 @@ static inline void cache_wback_all(void)
 {
unsigned long addr, data, i, j;
 
-   jump_to_P2();
-   for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++){
+   for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) {
for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
-   addr = CACHE_OC_ADDRESS_ARRAY | (j << 
CACHE_OC_WAY_SHIFT)
+   addr = CACHE_OC_ADDRESS_ARRAY
+   | (j << CACHE_OC_WAY_SHIFT)
| (i << CACHE_OC_ENTRY_SHIFT);
data = inl(addr);
if (data & CACHE_UPDATED) {
@@ -30,10 +30,8 @@ static inline void cache_wback_all(void)
}
}
}
-   back_to_P1();
 }
 
-
 #define CACHE_ENABLE  0
 #define CACHE_DISABLE 1
 
-- 
2.8.1

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[U-Boot] [PATCH 3/6] sh3: remove unused cache.c file from being built

[Vladimir Zapolskiy]

The change is similar to commit 994b56616bae ("sh: delete an unused
source file") for SH2, however here the removed cache.c file was
built and included into an image as a dead code.

If it is needed in future the contents can be reused from a similar
arch/sh/cpu/sh4/cache.c file, which is in turn will be moved to
a shared among all core flavours location at arch/sh/lib/cache.c.

Signed-off-by: Vladimir Zapolskiy 
---
 arch/sh/cpu/sh3/Makefile |  2 +-
 arch/sh/cpu/sh3/cache.c  | 96 
 2 files changed, 1 insertion(+), 97 deletions(-)
 delete mode 100644 arch/sh/cpu/sh3/cache.c

diff --git a/arch/sh/cpu/sh3/Makefile b/arch/sh/cpu/sh3/Makefile
index 959f551..cddc15b 100644
--- a/arch/sh/cpu/sh3/Makefile
+++ b/arch/sh/cpu/sh3/Makefile
@@ -11,4 +11,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y  = cpu.o interrupts.o watchdog.o cache.o
+obj-y  = cpu.o interrupts.o watchdog.o
diff --git a/arch/sh/cpu/sh3/cache.c b/arch/sh/cpu/sh3/cache.c
deleted file mode 100644
index 34cbbff..000
--- a/arch/sh/cpu/sh3/cache.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * (C) Copyright 2007
- * Yoshihiro Shimoda 
- *
- * (C) Copyright 2007
- * Nobobuhiro Iwamatsu 
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include 
-#include 
-#include 
-#include 
-
-/*
- * Jump to P2 area.
- * When handling TLB or caches, we need to do it from P2 area.
- */
-#define jump_to_P2()\
-  do {\
-unsigned long __dummy; \
-__asm__ __volatile__(  \
-   "mov.l  1f, %0\n\t" \
-   "or %1, %0\n\t" \
-   "jmp@%0\n\t"\
-   " nop\n\t"  \
-   ".balign 4\n"   \
-   "1: .long 2f\n" \
-   "2:"\
-   : "=" (__dummy)   \
-   : "r" (0x2000));\
-  } while (0)
-
-/*
- * Back to P1 area.
- */
-#define back_to_P1()\
-  do {\
-unsigned long __dummy;  \
-__asm__ __volatile__(   \
-   "nop;nop;nop;nop;nop;nop;nop\n\t"   \
-   "mov.l  1f, %0\n\t" \
-   "jmp@%0\n\t"\
-   " nop\n\t"  \
-   ".balign 4\n"   \
-   "1: .long 2f\n" \
-   "2:"\
-   : "=" (__dummy)); \
-  } while (0)
-
-#define CACHE_VALID   1
-#define CACHE_UPDATED 2
-
-static inline void cache_wback_all(void)
-{
-   unsigned long addr, data, i, j;
-
-   jump_to_P2();
-   for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) {
-   for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
-   addr = CACHE_OC_ADDRESS_ARRAY
-   | (j << CACHE_OC_WAY_SHIFT)
-   | (i << CACHE_OC_ENTRY_SHIFT);
-   data = inl(addr);
-   if (data & CACHE_UPDATED) {
-   data &= ~CACHE_UPDATED;
-   outl(data, addr);
-   }
-   }
-   }
-   back_to_P1();
-}
-
-
-#define CACHE_ENABLE  0
-#define CACHE_DISABLE 1
-
-int cache_control(unsigned int cmd)
-{
-   unsigned long ccr;
-
-   jump_to_P2();
-   ccr = inl(CCR);
-
-   if (ccr & CCR_CACHE_ENABLE)
-   cache_wback_all();
-
-   if (cmd == CACHE_DISABLE)
-   outl(CCR_CACHE_STOP, CCR);
-   else
-   outl(CCR_CACHE_INIT, CCR);
-   back_to_P1();
-
-   return 0;
-}
-- 
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[U-Boot] [PATCH 6/6] sh4: cache: move exported cache manipulation functions into cache.c

[Vladimir Zapolskiy]

No functional change, moving cache manipulation functions into cache.c
allows to collect all of them in a single location and as a pleasant
side effect cache_control() function can be unexported now.

Signed-off-by: Vladimir Zapolskiy 
---
 arch/sh/cpu/sh4/cache.c | 39 ---
 arch/sh/cpu/sh4/cpu.c   | 34 --
 arch/sh/include/asm/cache.h |  2 --
 3 files changed, 36 insertions(+), 39 deletions(-)

diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
index 7750f0f..6175c67 100644
--- a/arch/sh/cpu/sh4/cache.c
+++ b/arch/sh/cpu/sh4/cache.c
@@ -1,6 +1,6 @@
 /*
- * (C) Copyright 2007
- * Nobuhiro Iwamatsu 
+ * (C) Copyright 2016 Vladimir Zapolskiy 
+ * (C) Copyright 2007 Nobuhiro Iwamatsu 
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
@@ -35,7 +35,7 @@ static inline void cache_wback_all(void)
 #define CACHE_ENABLE  0
 #define CACHE_DISABLE 1
 
-int cache_control(unsigned int cmd)
+static int cache_control(unsigned int cmd)
 {
unsigned long ccr;
 
@@ -75,3 +75,36 @@ void invalidate_dcache_range(unsigned long start, unsigned 
long end)
  : "m" (__m(v)));
}
 }
+
+void flush_cache(unsigned long addr, unsigned long size)
+{
+   flush_dcache_range(addr , addr + size);
+}
+
+void icache_enable(void)
+{
+   cache_control(CACHE_ENABLE);
+}
+
+void icache_disable(void)
+{
+   cache_control(CACHE_DISABLE);
+}
+
+int icache_status(void)
+{
+   return 0;
+}
+
+void dcache_enable(void)
+{
+}
+
+void dcache_disable(void)
+{
+}
+
+int dcache_status(void)
+{
+   return 0;
+}
diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c
index e6b5c86..aa8d4df 100644
--- a/arch/sh/cpu/sh4/cpu.c
+++ b/arch/sh/cpu/sh4/cpu.c
@@ -9,7 +9,6 @@
 #include 
 #include 
 #include 
-#include 
 
 int checkcpu(void)
 {
@@ -35,39 +34,6 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
return 0;
 }
 
-void flush_cache (unsigned long addr, unsigned long size)
-{
-   flush_dcache_range(addr , addr + size);
-}
-
-void icache_enable (void)
-{
-   cache_control(0);
-}
-
-void icache_disable (void)
-{
-   cache_control(1);
-}
-
-int icache_status (void)
-{
-   return 0;
-}
-
-void dcache_enable (void)
-{
-}
-
-void dcache_disable (void)
-{
-}
-
-int dcache_status (void)
-{
-   return 0;
-}
-
 int cpu_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_SH_ETHER
diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h
index abaf405..b548a35 100644
--- a/arch/sh/include/asm/cache.h
+++ b/arch/sh/include/asm/cache.h
@@ -3,8 +3,6 @@
 
 #if defined(CONFIG_CPU_SH4)
 
-int cache_control(unsigned int cmd);
-
 #define L1_CACHE_BYTES 32
 
 struct __large_struct { unsigned long buf[100]; };
-- 
2.8.1

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[U-Boot] [PATCH 2/6] sh4: cache: correct flush_cache() to writeback and invalidate

[Vladimir Zapolskiy]

In common usecases flush_cache() assumes both cache invalidation and
write-back to memory, instead of doing cache invalidation only with
the wrapped 'ocbi' instruction pin flush_cache() to cache invalidation
with memory write-back done by 'ocbp'.

Signed-off-by: Vladimir Zapolskiy 
---
 arch/sh/cpu/sh4/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c
index e8ee0a4..e6b5c86 100644
--- a/arch/sh/cpu/sh4/cpu.c
+++ b/arch/sh/cpu/sh4/cpu.c
@@ -37,7 +37,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
 void flush_cache (unsigned long addr, unsigned long size)
 {
-   invalidate_dcache_range(addr , addr + size);
+   flush_dcache_range(addr , addr + size);
 }
 
 void icache_enable (void)
-- 
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[U-Boot] [PATCH V4 4/4] i2c: add Tegra186 BPMP driver

[Stephen Warren]

From: Stephen Warren 

On Tegra186, some I2C controllers are directly controlled by the main CPU,
whereas others are controlled by the BPMP, and can only be accessed by the
main CPU via IPC requests to the BPMP. This driver covers the latter case.

Signed-off-by: Stephen Warren 
Reviewed-by: Simon Glass 
Reviewed-by: Heiko Schocher 
---
v4: Adapt to new misc_call() return code.
v3: Use misc class call op.
v2: This patch wasn't posted.
---
 drivers/i2c/Kconfig |  10 
 drivers/i2c/Makefile|   1 +
 drivers/i2c/tegra186_bpmp_i2c.c | 129 
 3 files changed, 140 insertions(+)
 create mode 100644 drivers/i2c/tegra186_bpmp_i2c.c

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index b3e84052ebbf..67ebec7c5733 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -161,6 +161,16 @@ config SYS_I2C_MVTWSI
  Support for Marvell I2C controllers as used on the orion5x and
  kirkwood SoC families.
 
+config TEGRA186_BPMP_I2C
+   bool "Enable Tegra186 BPMP-based I2C driver"
+   depends on TEGRA186_BPMP
+   help
+ Support for Tegra I2C controllers managed by the BPMP (Boot and
+ Power Management Processor). On Tegra186, some I2C controllers are
+ directly controlled by the main CPU, whereas others are controlled
+ by the BPMP, and can only be accessed by the main CPU via IPC
+ requests to the BPMP. This driver covers the latter case.
+
 source "drivers/i2c/muxes/Kconfig"
 
 endmenu
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 167424db9820..97b6bedde822 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -41,5 +41,6 @@ obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
 obj-$(CONFIG_SYS_I2C_UNIPHIER) += i2c-uniphier.o
 obj-$(CONFIG_SYS_I2C_UNIPHIER_F) += i2c-uniphier-f.o
 obj-$(CONFIG_SYS_I2C_ZYNQ) += zynq_i2c.o
+obj-$(CONFIG_TEGRA186_BPMP_I2C) += tegra186_bpmp_i2c.o
 
 obj-$(CONFIG_I2C_MUX) += muxes/
diff --git a/drivers/i2c/tegra186_bpmp_i2c.c b/drivers/i2c/tegra186_bpmp_i2c.c
new file mode 100644
index ..88e8413d9e07
--- /dev/null
+++ b/drivers/i2c/tegra186_bpmp_i2c.c
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct tegra186_bpmp_i2c {
+   uint32_t bpmp_bus_id;
+};
+
+static inline void serialize_u16(uint8_t **p, uint16_t val)
+{
+   (*p)[0] = val & 0xff;
+   (*p)[1] = val >> 8;
+   (*p) += 2;
+}
+
+/* These just happen to have the same values as I2C_M_* and SERIALI2C_* */
+#define SUPPORTED_FLAGS \
+   (I2C_M_TEN | \
+   I2C_M_RD | \
+   I2C_M_STOP | \
+   I2C_M_NOSTART | \
+   I2C_M_REV_DIR_ADDR | \
+   I2C_M_IGNORE_NAK | \
+   I2C_M_NO_RD_ACK | \
+   I2C_M_RECV_LEN)
+
+static int tegra186_bpmp_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,
+ int nmsgs)
+{
+   struct tegra186_bpmp_i2c *priv = dev_get_priv(dev);
+   struct mrq_i2c_request req;
+   struct mrq_i2c_response resp;
+   uint8_t *p;
+   int left, i, ret;
+
+   req.cmd = CMD_I2C_XFER;
+   req.xfer.bus_id = priv->bpmp_bus_id;
+   p = _buf[0];
+   left = ARRAY_SIZE(req.xfer.data_buf);
+   for (i = 0; i < nmsgs; i++) {
+   int len = 6;
+   if (!(msg[i].flags & I2C_M_RD))
+   len += msg[i].len;
+   if ((len >= BIT(16)) || (len > left))
+   return -ENOSPC;
+
+   if (msg[i].flags & ~SUPPORTED_FLAGS)
+   return -EINVAL;
+
+   serialize_u16(, msg[i].addr);
+   serialize_u16(, msg[i].flags);
+   serialize_u16(, msg[i].len);
+   if (!(msg[i].flags & I2C_M_RD)) {
+   memcpy(p, msg[i].buf, msg[i].len);
+   p += msg[i].len;
+   }
+   }
+   req.xfer.data_size = p - _buf[0];
+
+   ret = misc_call(dev->parent, MRQ_I2C, , sizeof(req), ,
+   sizeof(resp));
+   if (ret < 0)
+   return ret;
+
+   p = _buf[0];
+   left = resp.xfer.data_size;
+   if (left > ARRAY_SIZE(resp.xfer.data_buf))
+   return -EINVAL;
+   for (i = 0; i < nmsgs; i++) {
+   if (msg[i].flags & I2C_M_RD) {
+   memcpy(msg[i].buf, p, msg[i].len);
+   p += msg[i].len;
+   }
+   }
+
+   return 0;
+}
+
+static int tegra186_bpmp_i2c_probe(struct udevice *dev)
+{
+   struct tegra186_bpmp_i2c *priv = dev_get_priv(dev);
+   int ret;
+   struct fdtdec_phandle_args args;
+
+   ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev->of_offset,
+"nvidia,bpmp", NULL, 0, 0, );
+   if 

[U-Boot] [PATCH v2 2/5] net: mii: Use spatch to update miiphy_register

[Joe Hershberger]

Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base.

Signed-off-by: Joe Hershberger 
Reviewed-by: Bin Meng 
---

Changes in v2:
- Run against the current master which adds one more driver to convert 
(drivers/net/macb.c)
- Use an updated spatch that does not put closing paren on the next line

 arch/mips/mach-au1x00/au1x00_eth.c   | 25 +---
 arch/powerpc/cpu/mpc8260/ether_fcc.c | 13 --
 arch/powerpc/cpu/mpc85xx/ether_fcc.c | 13 --
 arch/powerpc/cpu/mpc8xx/fec.c| 34 --
 board/gdsys/405ep/io.c   | 13 --
 board/gdsys/405ep/iocon.c| 27 +
 board/gdsys/405ex/io64.c | 26 
 board/gdsys/mpc8308/hrcon.c  | 27 +
 board/gdsys/mpc8308/strider.c| 27 +
 drivers/net/4xx_enet.c   | 13 --
 drivers/net/armada100_fec.c  | 33 +-
 drivers/net/at91_emac.c  | 28 +++---
 drivers/net/bfin_mac.c   | 22 +
 drivers/net/davinci_emac.c   | 25 
 drivers/net/eepro100.c   | 34 --
 drivers/net/enc28j60.c   | 26 ++--
 drivers/net/ep93xx_eth.c | 41 +---
 drivers/net/fsl_mcdmafec.c   | 13 --
 drivers/net/ftmac110.c   | 35 ++-
 drivers/net/lpc32xx_eth.c| 29 ---
 drivers/net/macb.c   | 46 ++--
 drivers/net/mcffec.c | 13 --
 drivers/net/mpc512x_fec.c| 30 ---
 drivers/net/mpc5xxx_fec.c| 30 ---
 drivers/net/mvgbe.c  | 33 ++
 drivers/net/sh_eth.c | 12 +-
 drivers/net/smc911x.c| 31 ++--
 drivers/qe/uec.c | 32 -
 28 files changed, 543 insertions(+), 188 deletions(-)

diff --git a/arch/mips/mach-au1x00/au1x00_eth.c 
b/arch/mips/mach-au1x00/au1x00_eth.c
index 9216860..67f4953 100644
--- a/arch/mips/mach-au1x00/au1x00_eth.c
+++ b/arch/mips/mach-au1x00/au1x00_eth.c
@@ -73,9 +73,9 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS];
 #define MAX_WAIT 1000
 
 #if defined(CONFIG_CMD_MII)
-int  au1x00_miiphy_read(const char *devname, unsigned char addr,
-   unsigned char reg, unsigned short * value)
+int au1x00_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
 {
+   unsigned short value = 0;
volatile u32 *mii_control_reg = (volatile 
u32*)(ETH0_BASE+MAC_MII_CNTRL);
volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
u32 mii_control;
@@ -102,12 +102,12 @@ int  au1x00_miiphy_read(const char *devname, unsigned 
char addr,
return -1;
}
}
-   *value = *mii_data_reg;
-   return 0;
+   value = *mii_data_reg;
+   return value;
 }
 
-int  au1x00_miiphy_write(const char *devname, unsigned char addr,
-   unsigned char reg, unsigned short value)
+int au1x00_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+   u16 value)
 {
volatile u32 *mii_control_reg = (volatile 
u32*)(ETH0_BASE+MAC_MII_CNTRL);
volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
@@ -290,8 +290,17 @@ int au1x00_enet_initialize(bd_t *bis){
eth_register(dev);
 
 #if defined(CONFIG_CMD_MII)
-   miiphy_register(dev->name,
-   au1x00_miiphy_read, au1x00_miiphy_write);
+   int retval;
+   struct mii_dev *mdiodev = mdio_alloc();
+   if (!mdiodev)
+   return -ENOMEM;
+   strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+   mdiodev->read = au1x00_miiphy_read;
+   mdiodev->write = au1x00_miiphy_write;
+
+   retval = mdio_register(mdiodev);
+   if (retval < 0)
+   return retval;
 #endif
 
return 1;
diff --git a/arch/powerpc/cpu/mpc8260/ether_fcc.c 
b/arch/powerpc/cpu/mpc8260/ether_fcc.c
index a11ad1e..072eb76 100644
--- a/arch/powerpc/cpu/mpc8260/ether_fcc.c
+++ b/arch/powerpc/cpu/mpc8260/ether_fcc.c
@@ -379,8 +379,17 @@ int fec_initialize(bd_t *bis)
 
 #if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
&& defined(CONFIG_BITBANGMII)
-   miiphy_register(dev->name,
-   bb_miiphy_read, bb_miiphy_write);
+   int retval;
+   struct mii_dev *mdiodev = mdio_alloc();
+   if (!mdiodev)
+   return -ENOMEM;
+   strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+   mdiodev->read = bb_miiphy_read;
+   mdiodev->write = bb_miiphy_write;
+

[U-Boot] [PATCH V4 3/4] power domain: add Tegra186 driver

[Stephen Warren]

From: Stephen Warren 

In Tegra186, SoC power domains are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that.

Signed-off-by: Stephen Warren 
Reviewed-by: Simon Glass 
---
v4: Adapt to new misc_call() return code.
v3: Use misc class call op.
v2: This patch wasn't posted.
---
 drivers/power/domain/Kconfig |  7 +++
 drivers/power/domain/Makefile|  1 +
 drivers/power/domain/tegra186-power-domain.c | 92 
 3 files changed, 100 insertions(+)
 create mode 100644 drivers/power/domain/tegra186-power-domain.c

diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
index b90409743398..132e33250e8c 100644
--- a/drivers/power/domain/Kconfig
+++ b/drivers/power/domain/Kconfig
@@ -17,4 +17,11 @@ config SANDBOX_POWER_DOMAIN
  simply accepts requests to power on/off various HW modules without
  actually doing anything beyond a little error checking.
 
+config TEGRA186_POWER_DOMAIN
+   bool "Enable Tegra186 BPMP-based power domain driver"
+   depends on TEGRA186_BPMP
+   help
+ Enable support for manipulating Tegra's on-SoC power domains via IPC
+ requests to the BPMP (Boot and Power Management Processor).
+
 endmenu
diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
index c18292f0ec88..2c3d92638fbe 100644
--- a/drivers/power/domain/Makefile
+++ b/drivers/power/domain/Makefile
@@ -5,3 +5,4 @@
 obj-$(CONFIG_POWER_DOMAIN) += power-domain-uclass.o
 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o
 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o
+obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o
diff --git a/drivers/power/domain/tegra186-power-domain.c 
b/drivers/power/domain/tegra186-power-domain.c
new file mode 100644
index ..41d84de83e1a
--- /dev/null
+++ b/drivers/power/domain/tegra186-power-domain.c
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define UPDATE BIT(0)
+#define ON BIT(1)
+
+static int tegra186_power_domain_request(struct power_domain *power_domain)
+{
+   debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
+ power_domain, power_domain->dev, power_domain->id);
+
+   return 0;
+}
+
+static int tegra186_power_domain_free(struct power_domain *power_domain)
+{
+   debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
+ power_domain, power_domain->dev, power_domain->id);
+
+   return 0;
+}
+
+static int tegra186_power_domain_common(struct power_domain *power_domain,
+   bool on)
+{
+   struct mrq_pg_update_state_request req;
+   int on_state = on ? ON : 0;
+   int ret;
+
+   req.partition_id = power_domain->id;
+   req.logic_state = UPDATE | on_state;
+   req.sram_state = UPDATE | on_state;
+   /*
+* Drivers manage their own clocks so they don't get out of sync, and
+* since some power domains have many clocks, only a subset of which
+* are actually needed depending on use-case.
+*/
+   req.clock_state = UPDATE;
+
+   ret = misc_call(power_domain->dev->parent, MRQ_PG_UPDATE_STATE, ,
+   sizeof(req), NULL, 0);
+   if (ret < 0)
+   return ret;
+
+   return 0;
+}
+
+static int tegra186_power_domain_on(struct power_domain *power_domain)
+{
+   debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
+ power_domain, power_domain->dev, power_domain->id);
+
+   return tegra186_power_domain_common(power_domain, true);
+}
+
+static int tegra186_power_domain_off(struct power_domain *power_domain)
+{
+   debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
+ power_domain, power_domain->dev, power_domain->id);
+
+   return tegra186_power_domain_common(power_domain, false);
+}
+
+struct power_domain_ops tegra186_power_domain_ops = {
+   .request = tegra186_power_domain_request,
+   .free = tegra186_power_domain_free,
+   .on = tegra186_power_domain_on,
+   .off = tegra186_power_domain_off,
+};
+
+static int tegra186_power_domain_probe(struct udevice *dev)
+{
+   debug("%s(dev=%p)\n", __func__, dev);
+
+   return 0;
+}
+
+U_BOOT_DRIVER(tegra186_power_domain) = {
+   .name = "tegra186_power_domain",
+   .id = UCLASS_POWER_DOMAIN,
+   .probe = tegra186_power_domain_probe,
+   .ops = _power_domain_ops,
+};
-- 
2.9.2

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[U-Boot] [PATCH V4 1/4] clock: add Tegra186 clock driver

[Stephen Warren]

From: Stephen Warren 

In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A tegra/ sub-directory is created to follow the existing
pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually
any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren 
Reviewed-by: Simon Glass 
---
v4: Adapt to new misc_call() return code.
v3: Use misc class call op.
v2: This patch wasn't posted.
---
 arch/arm/mach-tegra/Kconfig  |   2 +
 drivers/clk/Kconfig  |   1 +
 drivers/clk/Makefile |   2 +
 drivers/clk/tegra/Kconfig|   6 +++
 drivers/clk/tegra/Makefile   |   5 ++
 drivers/clk/tegra/tegra186-clk.c | 104 +++
 6 files changed, 120 insertions(+)
 create mode 100644 drivers/clk/tegra/Kconfig
 create mode 100644 drivers/clk/tegra/Makefile
 create mode 100644 drivers/clk/tegra/tegra186-clk.c

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index ec2d8ac6a1a3..e8186d515856 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -64,9 +64,11 @@ config TEGRA210
 
 config TEGRA186
bool "Tegra186 family"
+   select CLK
select DM_MAILBOX
select MISC
select TEGRA186_BPMP
+   select TEGRA186_CLOCK
select TEGRA186_GPIO
select TEGRA_ARMV8_COMMON
select TEGRA_HSP
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 6eee8eb369bf..7dd56738b06a 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -20,6 +20,7 @@ config SPL_CLK
  setting up clocks within SPL, and allows the same drivers to be
  used as U-Boot proper.
 
+source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/uniphier/Kconfig"
 source "drivers/clk/exynos/Kconfig"
 
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 3cbdd54f4f3e..463b1d647dc6 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -10,5 +10,7 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
+
+obj-y += tegra/
 obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
diff --git a/drivers/clk/tegra/Kconfig b/drivers/clk/tegra/Kconfig
new file mode 100644
index ..659fe022c2af
--- /dev/null
+++ b/drivers/clk/tegra/Kconfig
@@ -0,0 +1,6 @@
+config TEGRA186_CLOCK
+   bool "Enable Tegra186 BPMP-based clock driver"
+   depends on TEGRA186_BPMP
+   help
+ Enable support for manipulating Tegra's on-SoC clocks via IPC
+ requests to the BPMP (Boot and Power Management Processor).
diff --git a/drivers/clk/tegra/Makefile b/drivers/clk/tegra/Makefile
new file mode 100644
index ..f32998ccc27d
--- /dev/null
+++ b/drivers/clk/tegra/Makefile
@@ -0,0 +1,5 @@
+# Copyright (c) 2016, NVIDIA CORPORATION.
+#
+# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_TEGRA186_CLOCK) += tegra186-clk.o
diff --git a/drivers/clk/tegra/tegra186-clk.c b/drivers/clk/tegra/tegra186-clk.c
new file mode 100644
index ..075cb464cf6f
--- /dev/null
+++ b/drivers/clk/tegra/tegra186-clk.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static ulong tegra186_clk_get_rate(struct clk *clk)
+{
+   struct mrq_clk_request req;
+   struct mrq_clk_response resp;
+   int ret;
+
+   debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
+ clk->id);
+
+   req.cmd_and_id = (CMD_CLK_GET_RATE << 24) | clk->id;
+
+   ret = misc_call(clk->dev->parent, MRQ_CLK, , sizeof(req), ,
+   sizeof(resp));
+   if (ret < 0)
+   return ret;
+
+   return resp.clk_get_rate.rate;
+}
+
+static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate)
+{
+   struct mrq_clk_request req;
+   struct mrq_clk_response resp;
+   int ret;
+
+   debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate,
+ clk->dev, clk->id);
+
+   req.cmd_and_id = (CMD_CLK_SET_RATE << 24) | clk->id;
+   req.clk_set_rate.rate = rate;
+
+   ret = misc_call(clk->dev->parent, MRQ_CLK, , sizeof(req), ,
+   sizeof(resp));
+   if (ret < 0)
+   return ret;
+
+   return resp.clk_set_rate.rate;
+}
+
+static int tegra186_clk_en_dis(struct clk *clk,
+  enum mrq_reset_commands cmd)
+{
+   struct mrq_clk_request req;
+   struct mrq_clk_response resp;
+   int ret;
+
+   req.cmd_and_id = (cmd << 24) | clk->id;
+
+   ret = misc_call(clk->dev->parent, MRQ_CLK, , sizeof(req), ,
+   sizeof(resp));
+   if (ret < 0)
+   

[U-Boot] [PATCH V4 2/4] reset: add Tegra186 reset driver

[Stephen Warren]

From: Stephen Warren 

In Tegra186, on-SoC reset signals are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that. It is unconditionally selected by CONFIG_TEGRA186
since virtually any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren 
Reviewed-by: Simon Glass 
---
v4: Adapt to new misc_call() return code.
v3: Use misc class call op.
v2: This patch wasn't posted.
---
 arch/arm/mach-tegra/Kconfig|  2 ++
 drivers/reset/Kconfig  |  7 
 drivers/reset/Makefile |  1 +
 drivers/reset/tegra186-reset.c | 81 ++
 4 files changed, 91 insertions(+)
 create mode 100644 drivers/reset/tegra186-reset.c

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index e8186d515856..1eaf40627254 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -66,10 +66,12 @@ config TEGRA186
bool "Tegra186 family"
select CLK
select DM_MAILBOX
+   select DM_RESET
select MISC
select TEGRA186_BPMP
select TEGRA186_CLOCK
select TEGRA186_GPIO
+   select TEGRA186_RESET
select TEGRA_ARMV8_COMMON
select TEGRA_HSP
select TEGRA_IVC
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 0fe8cc3827f1..5b84f2178b71 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -20,4 +20,11 @@ config SANDBOX_RESET
  simply accepts requests to reset various HW modules without actually
  doing anything beyond a little error checking.
 
+config TEGRA186_RESET
+   bool "Enable Tegra186 BPMP-based reset driver"
+   depends on TEGRA186_BPMP
+   help
+ Enable support for manipulating Tegra's on-SoC reset signals via IPC
+ requests to the BPMP (Boot and Power Management Processor).
+
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 71f3b219613e..ff0e0907758b 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -5,3 +5,4 @@
 obj-$(CONFIG_DM_RESET) += reset-uclass.o
 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
+obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
diff --git a/drivers/reset/tegra186-reset.c b/drivers/reset/tegra186-reset.c
new file mode 100644
index ..228adda0aa8b
--- /dev/null
+++ b/drivers/reset/tegra186-reset.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int tegra186_reset_request(struct reset_ctl *reset_ctl)
+{
+   debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
+
+   return 0;
+}
+
+static int tegra186_reset_free(struct reset_ctl *reset_ctl)
+{
+   debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
+
+   return 0;
+}
+
+static int tegra186_reset_common(struct reset_ctl *reset_ctl,
+enum mrq_reset_commands cmd)
+{
+   struct mrq_reset_request req;
+   int ret;
+
+   req.cmd = cmd;
+   req.reset_id = reset_ctl->id;
+
+   ret = misc_call(reset_ctl->dev->parent, MRQ_RESET, , sizeof(req),
+   NULL, 0);
+   if (ret < 0)
+   return ret;
+
+   return 0;
+}
+
+static int tegra186_reset_assert(struct reset_ctl *reset_ctl)
+{
+   debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
+
+   return tegra186_reset_common(reset_ctl, CMD_RESET_ASSERT);
+}
+
+static int tegra186_reset_deassert(struct reset_ctl *reset_ctl)
+{
+   debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+ reset_ctl->dev, reset_ctl->id);
+
+   return tegra186_reset_common(reset_ctl, CMD_RESET_DEASSERT);
+}
+
+struct reset_ops tegra186_reset_ops = {
+   .request = tegra186_reset_request,
+   .free = tegra186_reset_free,
+   .rst_assert = tegra186_reset_assert,
+   .rst_deassert = tegra186_reset_deassert,
+};
+
+static int tegra186_reset_probe(struct udevice *dev)
+{
+   debug("%s(dev=%p)\n", __func__, dev);
+
+   return 0;
+}
+
+U_BOOT_DRIVER(tegra186_reset) = {
+   .name   = "tegra186_reset",
+   .id = UCLASS_RESET,
+   .probe  = tegra186_reset_probe,
+   .ops = _reset_ops,
+};
-- 
2.9.2

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[U-Boot] [PATCH v2 4/5] net: mii: Fix changes made by spatch

[Joe Hershberger]

Some of the changes were a bit too complex.

Signed-off-by: Joe Hershberger 
Reviewed-by: Bin Meng 
---

Changes in v2: None

 arch/powerpc/cpu/mpc8xx/fec.c |  6 --
 board/gdsys/405ex/io64.c  |  3 +--
 drivers/net/bfin_mac.c| 21 +++--
 drivers/net/davinci_emac.c| 11 +--
 drivers/net/ep93xx_eth.c  |  1 -
 drivers/net/lpc32xx_eth.c | 23 ++-
 drivers/net/smc911x.c |  4 ++--
 drivers/qe/uec.c  |  2 +-
 8 files changed, 30 insertions(+), 41 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c
index 81bda06..0940906 100644
--- a/arch/powerpc/cpu/mpc8xx/fec.c
+++ b/arch/powerpc/cpu/mpc8xx/fec.c
@@ -6,10 +6,12 @@
  */
 
 #include 
-#include 
+#include 
 #include 
+#include 
 #include 
-#include 
+
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c
index 6a83788..848cdde 100644
--- a/board/gdsys/405ex/io64.c
+++ b/board/gdsys/405ex/io64.c
@@ -264,8 +264,7 @@ int last_stage_init(void)
putc(slash[k % 8]);
}
 
-   int retval;
-   struct mii_dev *mdiodev = mdio_alloc();
+   mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII1_BUSNAME, MDIO_NAME_LEN);
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c
index 6d40370..26a626b 100644
--- a/drivers/net/bfin_mac.c
+++ b/drivers/net/bfin_mac.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -126,6 +127,8 @@ int bfin_EMAC_initialize(bd_t *bis)
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
+
+   dev->priv = mdiodev;
 #endif
 
return 0;
@@ -234,8 +237,9 @@ static int bfin_EMAC_recv(struct eth_device *dev)
 static int bfin_miiphy_init(struct eth_device *dev, int *opmode)
 {
const unsigned short pins[] = CONFIG_BFIN_MAC_PINS;
-   u16 phydat;
+   int phydat;
size_t count;
+   struct mii_dev *mdiodev = dev->priv;
 
/* Enable PHY output */
bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
@@ -248,12 +252,15 @@ static int bfin_miiphy_init(struct eth_device *dev, int 
*opmode)
bfin_write_EMAC_SYSCTL(RXDWA | RXCKS | 
SET_MDCDIV(MDC_FREQ_TO_DIV(CONFIG_PHY_CLOCK_FREQ)));
 
/* turn on auto-negotiation and wait for link to come up */
-   bfin_miiphy_write(dev->name, CONFIG_PHY_ADDR, MII_BMCR, BMCR_ANENABLE);
+   bfin_miiphy_write(mdiodev, CONFIG_PHY_ADDR, MDIO_DEVAD_NONE, MII_BMCR,
+ BMCR_ANENABLE);
count = 0;
while (1) {
++count;
-   if (bfin_miiphy_read(dev->name, CONFIG_PHY_ADDR, MII_BMSR, 
))
-   return -1;
+   phydat = bfin_miiphy_read(mdiodev, CONFIG_PHY_ADDR,
+ MDIO_DEVAD_NONE, MII_BMSR);
+   if (phydat < 0)
+   return phydat;
if (phydat & BMSR_LSTATUS)
break;
if (count > 3) {
@@ -264,8 +271,10 @@ static int bfin_miiphy_init(struct eth_device *dev, int 
*opmode)
}
 
/* see what kind of link we have */
-   if (bfin_miiphy_read(dev->name, CONFIG_PHY_ADDR, MII_LPA, ))
-   return -1;
+   phydat = bfin_miiphy_read(mdiodev, CONFIG_PHY_ADDR, MDIO_DEVAD_NONE,
+ MII_LPA);
+   if (phydat < 0)
+   return phydat;
if (phydat & LPA_DUPLEX)
*opmode = FDMODE;
else
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 7eda93f..ca457b8 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -243,11 +243,10 @@ int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t 
reg_num, u_int16_t *data)
 
if (tmp & MDIO_USERACCESS0_ACK) {
*data = tmp & 0x;
-   return(1);
+   return 0;
}
 
-   *data = -1;
-   return(0);
+   return -EIO;
 }
 
 /* Write to a PHY register via MDIO inteface. Blocks until operation is 
complete. */
@@ -268,7 +267,7 @@ int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t 
reg_num, u_int16_t data)
while (readl(_mdio->USERACCESS0) & MDIO_USERACCESS0_GO)
;
 
-   return(1);
+   return 0;
 }
 
 /* PHY functions for a generic PHY */
@@ -394,7 +393,7 @@ static int davinci_mii_phy_read(struct mii_dev *bus, int 
addr, int devad,
int reg)
 {
unsigned short value = 0;
-   int retval = (davinci_eth_phy_read(addr, reg, ) ? 0 : 1);
+   int retval = davinci_eth_phy_read(addr, reg, );
if (retval < 0)
return retval;
return value;
@@ -403,7 +402,7 @@ static int davinci_mii_phy_read(struct mii_dev *bus, int 
addr, int devad,
 static 

[U-Boot] [PATCH v2 0/5] Remove calls from net drivers to legacy miiphy_register() entry-point

[Joe Hershberger]

This is an effort to migrate closer to the phylib approach so that a
new DM approach can be developed from a single starting point. The more
of this legacy code that can be removed, the easier it will be to move
forward.

Changes in v2:
- Added a blank line
- Run against the current master which adds one more driver to convert 
(drivers/net/macb.c)
- Use an updated spatch that does not put closing paren on the next line

Joe Hershberger (5):
  scripts: Add a cocci patch for miiphy_register
  net: mii: Use spatch to update miiphy_register
  net: mii: Changes not made by spatch
  net: mii: Fix changes made by spatch
  net: mii: Clean up legacy glue that is not used

 arch/m68k/include/asm/fec.h|   9 +-
 arch/mips/mach-au1x00/au1x00_eth.c |  25 +++--
 arch/powerpc/cpu/mpc8260/ether_fcc.c   |  13 ++-
 arch/powerpc/cpu/mpc85xx/ether_fcc.c   |  13 ++-
 arch/powerpc/cpu/mpc8xx/fec.c  |  40 +---
 arch/powerpc/cpu/ppc4xx/miiphy.c   |  11 +--
 board/gdsys/405ep/io.c |  13 ++-
 board/gdsys/405ep/iocon.c  |  27 +-
 board/gdsys/405ex/io64.c   |  25 -
 board/gdsys/mpc8308/hrcon.c|  27 +-
 board/gdsys/mpc8308/strider.c  |  27 +-
 common/miiphyutil.c|  73 ---
 drivers/net/4xx_enet.c |  20 ++--
 drivers/net/armada100_fec.c|  33 ---
 drivers/net/at91_emac.c|  28 --
 drivers/net/bcm-sf2-eth-gmac.c |  18 ++--
 drivers/net/bcm-sf2-eth.c  |  13 ++-
 drivers/net/bcm-sf2-eth.h  |   8 +-
 drivers/net/bfin_mac.c |  43 ++---
 drivers/net/davinci_emac.c |  34 +--
 drivers/net/eepro100.c |  34 ---
 drivers/net/enc28j60.c |  26 --
 drivers/net/ep93xx_eth.c   |  40 +---
 drivers/net/fsl_mcdmafec.c |  13 ++-
 drivers/net/ftmac110.c |  35 ---
 drivers/net/lpc32xx_eth.c  |  52 +--
 drivers/net/macb.c |  46 +++---
 drivers/net/mcffec.c   |  13 ++-
 drivers/net/mcfmii.c   |  19 ++--
 drivers/net/mpc512x_fec.c  |  30 --
 drivers/net/mpc5xxx_fec.c  |  30 --
 drivers/net/mvgbe.c|  33 +--
 drivers/net/phy/miiphybb.c |  25 ++---
 drivers/net/sh_eth.c   |  12 ++-
 drivers/net/smc911x.c  |  35 +--
 drivers/qe/uec.c   |  32 ---
 include/miiphy.h   |  20 +---
 scripts/coccinelle/net/mdio_register.cocci | 142 +
 38 files changed, 762 insertions(+), 375 deletions(-)
 create mode 100644 scripts/coccinelle/net/mdio_register.cocci

-- 
1.7.11.5

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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Sun, Aug 07, 2016 at 09:55:02PM +0200, Marek Vasut wrote:

> The following changes since commit 2863a9bfc29092be37f8beee230883367b057065:
> 
>   Merge git://git.denx.de/u-boot-rockchip (2016-08-06 11:38:14 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 5405817a6e7a6538c4bcb1c3076ddc83fe5d03f9:
> 
>   spi: cadence_qspi_apb: Ensure baudrate doesn't exceed max value
> (2016-08-07 21:54:21 +0200)
> 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] Help Falcon Mode on Wanboard

[Stefano Babic]

Hi Diego,

On 08/08/2016 18:12, Diego Dorta wrote:
> Hi Stefano,
> 
> I downloaded the patch about Falcon Mode from:
> 
> https://www.amazon.com/clouddrive/share/hVlzRXoJv1Jq4DJdgDcVnfmOWjARqR06eCfheWjRcSh/folder/KZakgsCMThWy3I43j2-afQ
> 
> Then, as the README file says I did a checkout on commit 
> 587c3f8ebe356b558f1876414885c1b4a31294ab and applied the patch.
> 
> $ git am 0001-wandboard-changes-for-EW-2016-demo.patch
> 
> I compiled without errors and then I've tried to upload to the SD card, by 
> doing:
> 
> $ sudo dd if=SPL of=/dev/sdb bs=1k seek=1; sync
> 
> $ sudo dd if=u-boot.img of=/dev/sdb bs=1k seek=69; sync
> 
> But, everytime I try to turn on the board I got this error:
> 
> U-Boot 2016.01-rc4-26067-g0ff7f76 (Aug 08 2016 - 09:41:44 -0300)
> 
> CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
> Reset cause: POR
> initcall sequence 178290cc failed at call 178038bd (err=394279101)
> ### ERROR ### Please RESET the board ###
> 
> I'm using wanboard quad rev: B1.
> 
> Does anybody know how to solve this?

It was quite a while ago, but the patch sets Falcon mode, and it tries
to boot the kernel. Kernel is not in filesystem, but stored at a fixed
address on the SD card (0x1000). The error you reported seems when
U-Boot is starting - by pressing 'c' or if no kernel is stored.

I have to find back the wandboard I used to try a run...

Best regards,
Stefano Babic

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[U-Boot] [PATCH v2 5/5] net: mii: Clean up legacy glue that is not used

[Joe Hershberger]

The cleanup of the legacy mii registration API that's no longer used now
that the drivers have been converted to use the (more) modern API.

Signed-off-by: Joe Hershberger 
Reviewed-by: Bin Meng 

---

Changes in v2: None

 common/miiphyutil.c | 73 -
 include/miiphy.h| 13 --
 2 files changed, 86 deletions(-)

diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index 7e41957..08aa854 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -65,79 +65,6 @@ void miiphy_init(void)
current_mii = NULL;
 }
 
-static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int 
reg)
-{
-   unsigned short val;
-   int ret;
-   struct legacy_mii_dev *ldev = bus->priv;
-
-   ret = ldev->read(bus->name, addr, reg, );
-
-   return ret ? -1 : (int)val;
-}
-
-static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
-   int reg, u16 val)
-{
-   struct legacy_mii_dev *ldev = bus->priv;
-
-   return ldev->write(bus->name, addr, reg, val);
-}
-
-/*
- *
- * Register read and write MII access routines for the device .
- * This API is now deprecated. Please use mdio_alloc and mdio_register, 
instead.
- */
-void miiphy_register(const char *name,
- int (*read)(const char *devname, unsigned char addr,
-  unsigned char reg, unsigned short *value),
- int (*write)(const char *devname, unsigned char addr,
-   unsigned char reg, unsigned short value))
-{
-   struct mii_dev *new_dev;
-   struct legacy_mii_dev *ldev;
-
-   BUG_ON(strlen(name) >= MDIO_NAME_LEN);
-
-   /* check if we have unique name */
-   new_dev = miiphy_get_dev_by_name(name);
-   if (new_dev) {
-   printf("miiphy_register: non unique device name '%s'\n", name);
-   return;
-   }
-
-   /* allocate memory */
-   new_dev = mdio_alloc();
-   ldev = malloc(sizeof(*ldev));
-
-   if (new_dev == NULL || ldev == NULL) {
-   printf("miiphy_register: cannot allocate memory for '%s'\n",
-   name);
-   free(ldev);
-   mdio_free(new_dev);
-   return;
-   }
-
-   /* initalize mii_dev struct fields */
-   new_dev->read = legacy_miiphy_read;
-   new_dev->write = legacy_miiphy_write;
-   strncpy(new_dev->name, name, MDIO_NAME_LEN);
-   new_dev->name[MDIO_NAME_LEN - 1] = 0;
-   ldev->read = read;
-   ldev->write = write;
-   new_dev->priv = ldev;
-
-   debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
-  new_dev->name, ldev->read, ldev->write);
-
-   /* add it to the list */
-   list_add_tail(_dev->link, _devs);
-
-   if (!current_mii)
-   current_mii = new_dev;
-}
-
 struct mii_dev *mdio_alloc(void)
 {
struct mii_dev *bus;
diff --git a/include/miiphy.h b/include/miiphy.h
index 8a55a13..83141b4 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -21,13 +21,6 @@
 #include 
 #include 
 
-struct legacy_mii_dev {
-   int (*read)(const char *devname, unsigned char addr,
-unsigned char reg, unsigned short *value);
-   int (*write)(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short value);
-};
-
 int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
 unsigned short *value);
 int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
@@ -44,12 +37,6 @@ int miiphy_link(const char *devname, unsigned char addr);
 
 void miiphy_init(void);
 
-void miiphy_register(const char *devname,
- int (*read)(const char *devname, unsigned char addr,
-  unsigned char reg, unsigned short *value),
- int (*write)(const char *devname, unsigned char addr,
-   unsigned char reg, unsigned short value));
-
 int miiphy_set_current_dev(const char *devname);
 const char *miiphy_get_current_dev(void);
 struct mii_dev *mdio_get_current_dev(void);
-- 
1.7.11.5

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[U-Boot] [PATCH v2 1/5] scripts: Add a cocci patch for miiphy_register

[Joe Hershberger]

Many Ethernet drivers still use the legacy miiphy API to register their
mdio interface for access to the mdio commands.

This semantic patch will convert the drivers from the legacy adapter API
to the more modern alloc/register API.

Signed-off-by: Joe Hershberger 
---

Changes in v2: None

 scripts/coccinelle/net/mdio_register.cocci | 142 +
 1 file changed, 142 insertions(+)
 create mode 100644 scripts/coccinelle/net/mdio_register.cocci

diff --git a/scripts/coccinelle/net/mdio_register.cocci 
b/scripts/coccinelle/net/mdio_register.cocci
new file mode 100644
index 000..100f102
--- /dev/null
+++ b/scripts/coccinelle/net/mdio_register.cocci
@@ -0,0 +1,142 @@
+/// Use mdio_alloc and mdio_register instead of miiphy_register
+///
+//# Stop using the oldest mii interface in drivers
+//
+// Confidence: High
+// Copyright: (C) 2016 Joe Hershberger.  GPLv2.
+// Comments:
+// Options: --include-headers --recursive-includes --local-includes -I include
+
+@ mii_reg @
+expression devname;
+identifier readfunc, writefunc;
+@@
+
++ int retval;
+- miiphy_register(devname, readfunc, writefunc);
++ struct mii_dev *mdiodev = mdio_alloc();
++ if (!mdiodev) return -ENOMEM;
++ strncpy(mdiodev->name, devname, MDIO_NAME_LEN);
++ mdiodev->read = readfunc;
++ mdiodev->write = writefunc;
++ 
++ retval = mdio_register(mdiodev);
++ if (retval < 0) return retval;
+
+@ update_read_sig @
+identifier mii_reg.readfunc;
+identifier name0, addr0, reg0, output;
+type addrT, outputT;
+@@
+
+- readfunc (
+-  const char *name0,
+-  addrT addr0,
+-  addrT reg0,
+-  outputT *output
+- )
++ readfunc (
++  struct mii_dev *bus,
++  int addr0,
++  int devad,
++  int reg0
++ )
+  {
+  ...
+  }
+
+@ update_read_impl @
+identifier mii_reg.readfunc;
+identifier update_read_sig.output;
+type update_read_sig.outputT;
+constant c;
+identifier retvar;
+expression E;
+@@
+
+  readfunc (...)
+  {
++ outputT output = 0;
+  ...
+(
+- return 0;
++ return *output;
+|
+  return c;
+|
+- return retvar;
++ if (retvar < 0)
++  return retvar;
++ return *output;
+|
+- return E;
++ int retval = E;
++ if (retval < 0)
++  return retval;
++ return *output;
+)
+  }
+
+@ update_read_impl2 @
+identifier mii_reg.readfunc;
+identifier update_read_sig.output;
+@@
+
+  readfunc (...)
+  {
+  <...
+(
+- *output
++ output
+|
+- output
++ 
+)
+  ...>
+  }
+
+@ update_read_name @
+identifier mii_reg.readfunc;
+identifier update_read_sig.name0;
+@@
+  readfunc (...) {
+  <...
+- name0
++ bus->name
+  ...>
+  }
+
+@ update_write_sig @
+identifier mii_reg.writefunc;
+identifier name0, addr0, reg0, value0;
+type addrT, valueT;
+typedef u16;
+@@
+
+- writefunc (
+-  const char *name0,
+-  addrT addr0,
+-  addrT reg0,
+-  valueT value0
+- )
++ writefunc (
++  struct mii_dev *bus,
++  int addr0,
++  int devad,
++  int reg0,
++  u16 value0
++ )
+  {
+  ...
+  }
+
+@ update_write_name @
+identifier mii_reg.writefunc;
+identifier update_write_sig.name0;
+@@
+  writefunc (...) {
+  <...
+- name0
++ bus->name
+  ...>
+  }
-- 
1.7.11.5

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[U-Boot] [PATCH v2 3/5] net: mii: Changes not made by spatch

[Joe Hershberger]

If the functions passed to the registration function are not in the same
C file (extern) then spatch will not handle the dependent changes.

Make those changes manually.

Signed-off-by: Joe Hershberger 

For the 4xx related files:
Acked-by: Stefan Roese 
Reviewed-by: Bin Meng 

---

Changes in v2:
- Added a blank line

 arch/m68k/include/asm/fec.h  |  9 +
 arch/powerpc/cpu/ppc4xx/miiphy.c | 11 ---
 drivers/net/4xx_enet.c   |  7 +++
 drivers/net/bcm-sf2-eth-gmac.c   | 18 +++---
 drivers/net/bcm-sf2-eth.c| 13 -
 drivers/net/bcm-sf2-eth.h|  8 
 drivers/net/mcfmii.c | 19 ++-
 drivers/net/phy/miiphybb.c   | 25 -
 include/miiphy.h |  7 +++
 9 files changed, 52 insertions(+), 65 deletions(-)

diff --git a/arch/m68k/include/asm/fec.h b/arch/m68k/include/asm/fec.h
index 6856aac..2799293 100644
--- a/arch/m68k/include/asm/fec.h
+++ b/arch/m68k/include/asm/fec.h
@@ -15,6 +15,8 @@
 #ifndeffec_h
 #definefec_h
 
+#include 
+
 /* Buffer descriptors used FEC.
 */
 typedef struct cpm_buf_desc {
@@ -341,10 +343,9 @@ int fecpin_setclear(struct eth_device *dev, int setclear);
 void __mii_init(void);
 uint mii_send(uint mii_cmd);
 int mii_discover_phy(struct eth_device *dev);
-int mcffec_miiphy_read(const char *devname, unsigned char addr,
-  unsigned char reg, unsigned short *value);
-int mcffec_miiphy_write(const char *devname, unsigned char addr,
-   unsigned char reg, unsigned short value);
+int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg);
+int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+   u16 value);
 #endif
 
 #endif /* fec_h */
diff --git a/arch/powerpc/cpu/ppc4xx/miiphy.c b/arch/powerpc/cpu/ppc4xx/miiphy.c
index 10147de..f0fc098 100644
--- a/arch/powerpc/cpu/ppc4xx/miiphy.c
+++ b/arch/powerpc/cpu/ppc4xx/miiphy.c
@@ -318,8 +318,7 @@ static int emac_miiphy_command(u8 addr, u8 reg, int cmd, 
u16 value)
return 0;
 }
 
-int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned 
char reg,
-unsigned short *value)
+int emac4xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
 {
unsigned long sta_reg;
unsigned long emac_reg;
@@ -330,17 +329,15 @@ int emac4xx_miiphy_read (const char *devname, unsigned 
char addr, unsigned char
return -1;
 
sta_reg = in_be32((void *)EMAC0_STACR + emac_reg);
-   *value = sta_reg >> 16;
-
-   return 0;
+   return sta_reg >> 16;
 }
 
 /***/
 /* write a phy reg and return the value with a rc  */
 /***/
 
-int emac4xx_miiphy_write (const char *devname, unsigned char addr, unsigned 
char reg,
- unsigned short value)
+int emac4xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+u16 value)
 {
return emac_miiphy_command(addr, reg, EMAC_STACR_WRITE, value);
 }
diff --git a/drivers/net/4xx_enet.c b/drivers/net/4xx_enet.c
index fda7bb3..b718481 100644
--- a/drivers/net/4xx_enet.c
+++ b/drivers/net/4xx_enet.c
@@ -283,10 +283,9 @@ static void mal_err (struct eth_device *dev, unsigned long 
isr,
 static void emac_err (struct eth_device *dev, unsigned long isr);
 
 extern int phy_setup_aneg (char *devname, unsigned char addr);
-extern int emac4xx_miiphy_read (const char *devname, unsigned char addr,
-   unsigned char reg, unsigned short *value);
-extern int emac4xx_miiphy_write (const char *devname, unsigned char addr,
-   unsigned char reg, unsigned short value);
+int emac4xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg);
+int emac4xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+u16 value);
 
 int board_emac_count(void);
 
diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-gmac.c
index 977feec..f2853cf 100644
--- a/drivers/net/bcm-sf2-eth-gmac.c
+++ b/drivers/net/bcm-sf2-eth-gmac.c
@@ -596,12 +596,10 @@ bool gmac_mii_busywait(unsigned int timeout)
return tmp & (1 << GMAC_MII_BUSY_SHIFT);
 }
 
-int gmac_miiphy_read(const char *devname, unsigned char phyaddr,
-   unsigned char reg, unsigned short *value)
+int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg)
 {
uint32_t tmp = 0;
-
-   (void)devname;
+   u16 value = 0;
 
/* Busy wait timeout is 1ms */
if (gmac_mii_busywait(1000)) {
@@ -621,18 +619,16 @@ int gmac_miiphy_read(const char *devname, unsigned char 
phyaddr,
return -1;
}
 
-   *value = readl(GMAC_MII_DATA_ADDR) & 0x;
-   

Re: [U-Boot] [PATCH] drivers: net: cpsw: always flush cache with cache line aligned

[Joe Hershberger]

Hi Lokesh,

On Mon, Aug 8, 2016 at 1:22 AM, Lokesh Vutla  wrote:
> cpsw tries to flush dcache which is not in the range of cache line size.
> Because of this the following warning comes while flushing:
>
> CACHE: Misaligned operation at range [dffecec0, dffed016]
>
> Fix it by flushing cache range which is cache line size aligned.

This is the send case... the transmit packet buffer from the network
subsystem is already aligned. You only need to align the size of the
packet. Also, please use PKTALIGN.

Thanks,
-Joe
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Re: [U-Boot] [PULL] u-boot-usb/master

[Marek Vasut]

On 08/08/2016 06:42 PM, Tom Rini wrote:
> On Sun, Aug 07, 2016 at 09:57:44PM +0200, Marek Vasut wrote:
> 
>> The following changes since commit 2863a9bfc29092be37f8beee230883367b057065:
>>
>>   Merge git://git.denx.de/u-boot-rockchip (2016-08-06 11:38:14 -0400)
>>
>> are available in the git repository at:
>>
>>   git://git.denx.de/u-boot-usb.git master
>>
>> for you to fetch changes up to 606120f99ec2baf3635b1c2545803348b6f550ab:
>>
>>   dm: atmel: Add driver model support for the ehci driver (2016-08-07
>> 21:56:56 +0200)
>>
> 
> NAK:

Dang, CCing the authors, I expect fixed patches. Both dropped for now.

> Adding in:
> commit eb769ac6556f230e30b196445556ba88890ccfd7
> Author: Alban Bedel 
> Date:   Wed Aug 3 08:14:42 2016 +0200
> 
> eth: asix88179: Prepare supporting the driver model
> 
> gives:
> +(snow) drivers/usb/eth/asix88179.c: In function 'ax88179_eth_get_info':
> +(snow) drivers/usb/eth/asix88179.c:725:6: error: too few arguments to 
> function 'asix_basic_reset'
> +(snow)   if (asix_basic_reset(ss))
> +(snow)   ^
> +(snow) drivers/usb/eth/asix88179.c:285:12: note: declared here
> +(snow)  static int asix_basic_reset(struct ueth_data *dev,
> +(snow) ^
> +(snow) make[2]: *** [drivers/usb/eth/asix88179.o] Error 1
> +(snow) make[1]: *** [drivers/usb/eth] Error 2
> +(snow) make: *** [sub-make] Error 2
> And adding in:
> commit 606120f99ec2baf3635b1c2545803348b6f550ab
> Author: Wenyou Yang 
> Date:   Fri Aug 5 08:57:35 2016 +0800
> 
> dm: atmel: Add driver model support for the ehci driver
> gives:
> +(sama5d2_xplained_mmc)  static int clk_get_by_name(struct udevice *dev, 
> const char *name,
> +(sama5d2_xplained_mmc) ^
> w+(sama5d2_xplained_mmc) In file included from 
> drivers/usb/host/ehci-atmel.c:10:0:
> w+(sama5d2_xplained_mmc) include/clk.h:107:12: warning: 'clk_get_by_name' 
> defined but not used [-Wunused-function]
> 


-- 
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[U-Boot] [PATCH] ARM: tegra: move ft_system_setup()

[Stephen Warren]

From: Stephen Warren 

Currently, ft_system_setup() is implemented by board*.c, which are a bit
of a dumping ground for a bunch of unrelated functionality, and separate
versions exist for pre-Tegra186 and Tegra186. Move the implementation into
a separate file to separate functionality, and allow sharing.

Signed-off-by: Stephen Warren 
---
 arch/arm/mach-tegra/Makefile   |  1 +
 arch/arm/mach-tegra/board186.c |  5 -
 arch/arm/mach-tegra/board2.c   | 26 --
 arch/arm/mach-tegra/dt-setup.c | 34 ++
 4 files changed, 35 insertions(+), 31 deletions(-)
 create mode 100644 arch/arm/mach-tegra/dt-setup.c

diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index d0bf5a6e75ef..b978fec0754a 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -25,6 +25,7 @@ obj-y += xusb-padctl-dummy.o
 endif
 
 obj-$(CONFIG_ARM64) += arm64-mmu.o
+obj-y += dt-setup.o
 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 obj-$(CONFIG_TEGRA_GPU) += gpu.o
 obj-$(CONFIG_TEGRA_IVC) += ivc.o
diff --git a/arch/arm/mach-tegra/board186.c b/arch/arm/mach-tegra/board186.c
index a7583d443833..1b9799fd80c2 100644
--- a/arch/arm/mach-tegra/board186.c
+++ b/arch/arm/mach-tegra/board186.c
@@ -41,8 +41,3 @@ int board_mmc_init(bd_t *bd)
 
return 0;
 }
-
-int ft_system_setup(void *blob, bd_t *bd)
-{
-   return 0;
-}
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 141d6e1cb555..9158ace44c42 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -397,29 +397,3 @@ ulong board_get_usable_ram_top(ulong total_size)
 {
return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g();
 }
-
-/*
- * This function is called right before the kernel is booted. "blob" is the
- * device tree that will be passed to the kernel.
- */
-int ft_system_setup(void *blob, bd_t *bd)
-{
-   const char *gpu_compats[] = {
-#if defined(CONFIG_TEGRA124)
-   "nvidia,gk20a",
-#endif
-#if defined(CONFIG_TEGRA210)
-   "nvidia,gm20b",
-#endif
-   };
-   int i, ret;
-
-   /* Enable GPU node if GPU setup has been performed */
-   for (i = 0; i < ARRAY_SIZE(gpu_compats); i++) {
-   ret = tegra_gpu_enable_node(blob, gpu_compats[i]);
-   if (ret)
-   return ret;
-   }
-
-   return 0;
-}
diff --git a/arch/arm/mach-tegra/dt-setup.c b/arch/arm/mach-tegra/dt-setup.c
new file mode 100644
index ..f44d9cb04d61
--- /dev/null
+++ b/arch/arm/mach-tegra/dt-setup.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2010-2016, NVIDIA CORPORATION.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+
+/*
+ * This function is called right before the kernel is booted. "blob" is the
+ * device tree that will be passed to the kernel.
+ */
+int ft_system_setup(void *blob, bd_t *bd)
+{
+   const char *gpu_compats[] = {
+#if defined(CONFIG_TEGRA124)
+   "nvidia,gk20a",
+#endif
+#if defined(CONFIG_TEGRA210)
+   "nvidia,gm20b",
+#endif
+   };
+   int i, ret;
+
+   /* Enable GPU node if GPU setup has been performed */
+   for (i = 0; i < ARRAY_SIZE(gpu_compats); i++) {
+   ret = tegra_gpu_enable_node(blob, gpu_compats[i]);
+   if (ret)
+   return ret;
+   }
+
+   return 0;
+}
-- 
2.9.2

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Re: [U-Boot] [PATCH 1/2 V4] misc: add "call" uclass op

[Simon Glass]

Hi Stephen,

On 8 August 2016 at 09:41, Stephen Warren  wrote:
>
> From: Stephen Warren 
>
> The call op requests that the callee pass a message to the underlying HW
> or device, wait for a response, and then pass back the response error code
> and message to the callee. It is useful for drivers that represent some
> kind of messaging or IPC channel to a remote device.
>
> Signed-off-by: Stephen Warren 
> Acked-by: Simon Glass 
> ---
> v4: Adjust misc_call() to return the response msg size on success.
> v3: New patch.
> ---
>  drivers/misc/misc-uclass.c | 11 +++
>  include/misc.h | 35 +++
>  2 files changed, 46 insertions(+)

Are you planning for the Tegra186 stuff to go into the upcoming release?

Regards,
Simon
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Re: [U-Boot] [PULL] u-boot-usb/master

[Tom Rini]

On Sun, Aug 07, 2016 at 09:57:44PM +0200, Marek Vasut wrote:

> The following changes since commit 2863a9bfc29092be37f8beee230883367b057065:
> 
>   Merge git://git.denx.de/u-boot-rockchip (2016-08-06 11:38:14 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-usb.git master
> 
> for you to fetch changes up to 606120f99ec2baf3635b1c2545803348b6f550ab:
> 
>   dm: atmel: Add driver model support for the ehci driver (2016-08-07
> 21:56:56 +0200)
> 

NAK:
Adding in:
commit eb769ac6556f230e30b196445556ba88890ccfd7
Author: Alban Bedel 
Date:   Wed Aug 3 08:14:42 2016 +0200

eth: asix88179: Prepare supporting the driver model

gives:
+(snow) drivers/usb/eth/asix88179.c: In function 'ax88179_eth_get_info':
+(snow) drivers/usb/eth/asix88179.c:725:6: error: too few arguments to function 
'asix_basic_reset'
+(snow)   if (asix_basic_reset(ss))
+(snow)   ^
+(snow) drivers/usb/eth/asix88179.c:285:12: note: declared here
+(snow)  static int asix_basic_reset(struct ueth_data *dev,
+(snow) ^
+(snow) make[2]: *** [drivers/usb/eth/asix88179.o] Error 1
+(snow) make[1]: *** [drivers/usb/eth] Error 2
+(snow) make: *** [sub-make] Error 2
And adding in:
commit 606120f99ec2baf3635b1c2545803348b6f550ab
Author: Wenyou Yang 
Date:   Fri Aug 5 08:57:35 2016 +0800

dm: atmel: Add driver model support for the ehci driver
gives:
+(sama5d2_xplained_mmc)  static int clk_get_by_name(struct udevice *dev, const 
char *name,
+(sama5d2_xplained_mmc) ^
w+(sama5d2_xplained_mmc) In file included from 
drivers/usb/host/ehci-atmel.c:10:0:
w+(sama5d2_xplained_mmc) include/clk.h:107:12: warning: 'clk_get_by_name' 
defined but not used [-Wunused-function]

-- 
Tom


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Re: [U-Boot] [PATCH 1/2 V4] misc: add "call" uclass op

[Stephen Warren]

On 08/08/2016 10:38 AM, Simon Glass wrote:

Hi Stephen,

On 8 August 2016 at 09:41, Stephen Warren  wrote:


From: Stephen Warren 

The call op requests that the callee pass a message to the underlying HW
or device, wait for a response, and then pass back the response error code
and message to the callee. It is useful for drivers that represent some
kind of messaging or IPC channel to a remote device.

Signed-off-by: Stephen Warren 
Acked-by: Simon Glass 
---
v4: Adjust misc_call() to return the response msg size on success.
v3: New patch.
---
 drivers/misc/misc-uclass.c | 11 +++
 include/misc.h | 35 +++
 2 files changed, 46 insertions(+)


Are you planning for the Tegra186 stuff to go into the upcoming release?


I'd like it to if at all possible; it's all pretty much Tegra-specific 
drivers so shouldn't cause any fallout for other platforms. The only 
exception is the fdt_translate_address() changes, which are a 
dependency, which will be built into other platforms, but there's a 
simple Boolean parameter that controls the new behaviour, so it should 
be pretty safe.

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Re: [U-Boot] [PATCH] mx6ul_14x14_evk: don't use array for SD2 card detect pad

[Fabio Estevam]

Hi Eric,

On Fri, Aug 5, 2016 at 8:51 PM, Eric Nelson  wrote:
> Only a single pad is changed to change sdhc2_dat3 from an
> SDIO pin to and from GPIO4:5, so remove the array and use
> the imx_iomux_v3_setup_pad() routine.
>
> Signed-off-by: Eric Nelson 

Thanks for the patch:

Reviewed-by: Fabio Estevam 
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[U-Boot] [PATCH 1/2 V4] misc: add "call" uclass op

[Stephen Warren]

From: Stephen Warren 

The call op requests that the callee pass a message to the underlying HW
or device, wait for a response, and then pass back the response error code
and message to the callee. It is useful for drivers that represent some
kind of messaging or IPC channel to a remote device.

Signed-off-by: Stephen Warren 
Acked-by: Simon Glass 
---
v4: Adjust misc_call() to return the response msg size on success.
v3: New patch.
---
 drivers/misc/misc-uclass.c | 11 +++
 include/misc.h | 35 +++
 2 files changed, 46 insertions(+)

diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c
index 13a6ea508b14..d9eea3dac5c0 100644
--- a/drivers/misc/misc-uclass.c
+++ b/drivers/misc/misc-uclass.c
@@ -45,6 +45,17 @@ int misc_ioctl(struct udevice *dev, unsigned long request, 
void *buf)
return ops->ioctl(dev, request, buf);
 }
 
+int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
+ void *rx_msg, int rx_size)
+{
+   const struct misc_ops *ops = device_get_ops(dev);
+
+   if (!ops->call)
+   return -ENOSYS;
+
+   return ops->call(dev, msgid, tx_msg, tx_size, rx_msg, rx_size);
+}
+
 UCLASS_DRIVER(misc) = {
.id = UCLASS_MISC,
.name   = "misc",
diff --git a/include/misc.h b/include/misc.h
index 2b788143b54c..03ef55cdc887 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -38,6 +38,27 @@ int misc_write(struct udevice *dev, int offset, void *buf, 
int size);
 int misc_ioctl(struct udevice *dev, unsigned long request, void *buf);
 
 /*
+ * Send a message to the device and wait for a response.
+ *
+ * The caller provides the message type/ID and payload to be sent.
+ * The callee constructs any message header required, transmits it to the
+ * target, waits for a response, checks any error code in the response,
+ * strips any message header from the response, and returns the error code
+ * (or a parsed version of it) and the response message payload.
+ *
+ * @dev: the device.
+ * @msgid: the message ID/number to send.
+ * tx_msg: the request/transmit message payload.
+ * tx_size: the size of the buffer pointed at by tx_msg.
+ * rx_msg: the buffer to receive the response message payload. May be NULL if
+ * the caller only cares about the error code.
+ * rx_size: the size of the buffer pointed at by rx_msg.
+ * @return the response message size if OK, -ve on error
+ */
+int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
+ void *rx_msg, int rx_size);
+
+/*
  * struct misc_ops - Driver model Misc operations
  *
  * The uclass interface is implemented by all miscellaneous devices which
@@ -74,6 +95,20 @@ struct misc_ops {
 * @return: 0 if OK, -ve on error
 */
int (*ioctl)(struct udevice *dev, unsigned long request, void *buf);
+   /*
+* Send a message to the device and wait for a response.
+*
+* @dev: the device
+* @msgid: the message ID/number to send
+* tx_msg: the request/transmit message payload
+* tx_size: the size of the buffer pointed at by tx_msg
+* rx_msg: the buffer to receive the response message payload. May be
+* NULL if the caller only cares about the error code.
+* rx_size: the size of the buffer pointed at by rx_msg
+* @return the response message size if OK, -ve on error
+*/
+   int (*call)(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
+   void *rx_msg, int rx_size);
 };
 
 #endif /* _MISC_H_ */
-- 
2.9.2

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[U-Boot] [PATCH 2/2 V4] misc: add Tegra BPMP driver

[Stephen Warren]

From: Stephen Warren 

The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.

Signed-off-by: Stephen Warren 
Reviewed-by: Simon Glass 
---
v4:
* Make tegra186_bpmp_call() return the response msg size on success.
v3:
* Implement misc uclass "call" op.
* Squash in patch that scans DT for child devices (for I2C support), v2 of
  which had changelog:
  * Use dm_scan_fdt_dev() to scan sub-nodes. This function was just added.
v2:
* Use an SPDX license header in bpmp_abi.h.
* Add a function-level comment for tegra186_bpmp_call().
* Use fdtdec_get_addr_size_auto_noparent() to retrieve shmem address.

This depends on the following patches, which are in u-boot/dm only so far:
fdt: allow fdtdec_get_addr_size_*() to translate addresses
fdt_support: fdt_translate_address() blob const correctness
---
 arch/arm/include/asm/arch-tegra/bpmp_abi.h | 1591 
 arch/arm/mach-tegra/Kconfig|2 +
 drivers/misc/Kconfig   |   12 +
 drivers/misc/Makefile  |1 +
 drivers/misc/tegra186_bpmp.c   |  257 +
 5 files changed, 1863 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-tegra/bpmp_abi.h
 create mode 100644 drivers/misc/tegra186_bpmp.c

diff --git a/arch/arm/include/asm/arch-tegra/bpmp_abi.h 
b/arch/arm/include/asm/arch-tegra/bpmp_abi.h
new file mode 100644
index ..7b6ad899cf6f
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra/bpmp_abi.h
@@ -0,0 +1,1591 @@
+/*
+ * Copyright (c) 2014-2016, NVIDIA CORPORATION.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _ABI_BPMP_ABI_H_
+#define _ABI_BPMP_ABI_H_
+
+#ifdef LK
+#include 
+#endif
+
+#ifndef __ABI_PACKED
+#define __ABI_PACKED __attribute__((packed))
+#endif
+
+#ifdef NO_GCC_EXTENSIONS
+#define EMPTY char empty;
+#define EMPTY_ARRAY 1
+#else
+#define EMPTY
+#define EMPTY_ARRAY 0
+#endif
+
+#ifndef __UNION_ANON
+#define __UNION_ANON
+#endif
+/**
+ * @file
+ */
+
+
+/**
+ * @defgroup MRQ MRQ Messages
+ * @brief Messages sent to/from BPMP via IPC
+ * @{
+ *   @defgroup MRQ_Format Message Format
+ *   @defgroup MRQ_Codes Message Request (MRQ) Codes
+ *   @defgroup MRQ_Payloads Message Payloads
+ *   @defgroup Error_Codes Error Codes
+ * @}
+ */
+
+/**
+ * @addtogroup MRQ_Format Message Format
+ * @{
+ * The CPU requests the BPMP to perform a particular service by
+ * sending it an IVC frame containing a single MRQ message. An MRQ
+ * message consists of a @ref mrq_request followed by a payload whose
+ * format depends on mrq_request::mrq.
+ *
+ * The BPMP processes the data and replies with an IVC frame (on the
+ * same IVC channel) containing and MRQ response. An MRQ response
+ * consists of a @ref mrq_response followed by a payload whose format
+ * depends on the associated mrq_request::mrq.
+ *
+ * A well-defined subset of the MRQ messages that the CPU sends to the
+ * BPMP can lead to BPMP eventually sending an MRQ message to the
+ * CPU. For example, when the CPU uses an #MRQ_THERMAL message to set
+ * a thermal trip point, the BPMP may eventually send a single
+ * #MRQ_THERMAL message of its own to the CPU indicating that the trip
+ * point has been crossed.
+ * @}
+ */
+
+/**
+ * @ingroup MRQ_Format
+ * @brief header for an MRQ message
+ *
+ * Provides the MRQ number for the MRQ message: #mrq. The remainder of
+ * the MRQ message is a payload (immediately following the
+ * mrq_request) whose format depends on mrq.
+ *
+ * @todo document the flags
+ */
+struct mrq_request {
+   /** @brief MRQ number of the request */
+   uint32_t mrq;
+   /** @brief flags for the request */
+   uint32_t flags;
+} __ABI_PACKED;
+
+/**
+ * @ingroup MRQ_Format
+ * @brief header for an MRQ response
+ *
+ *  Provides an error code for the associated MRQ message. The
+ *  remainder of the MRQ response is a payload (immediately following
+ *  the mrq_response) whose format depends on the associated
+ *  mrq_request::mrq
+ *
+ * @todo document the flags
+ */
+struct mrq_response {
+   /** @brief error code for the MRQ request itself */
+   int32_t err;
+   /** @brief flags for the response */
+   uint32_t flags;
+} __ABI_PACKED;
+
+/**
+ * @ingroup MRQ_Format
+ * Minimum needed size for an IPC message buffer
+ */
+#define MSG_MIN_SZ 128
+/**
+ * @ingroup MRQ_Format
+ *  Minimum size guaranteed for data in an IPC message buffer
+ */
+#define MSG_DATA_MIN_SZ120
+
+/**
+ * @ingroup MRQ_Codes
+ 

Re: [U-Boot] [PATCH 2/2] x86: i2c: Avoid using BSS before it is available

[Heiko Schocher]

Hello Simon,

Am 07.08.2016 um 08:54 schrieb Bin Meng:

On Sat, Aug 6, 2016 at 11:35 AM, Simon Glass  wrote:

If intel_i2c_bind() is called before relocation there is no BSS section
available. Use the data section instead, which is always available.

A better fix might be to use global_data, perhaps a new member in
x86's struct arch_global_data. Comments welcome.

Signed-off-by: Simon Glass 
---

  drivers/i2c/intel_i2c.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)



Reviewed-by: Bin Meng 


Hmm... I see no i2c_bind() in mainline U-Boot drivers/i2c/intel_i2c.c
driver ?

Is this patch and also patch:
http://patchwork.ozlabs.org/patch/656335/

dependend on another patch(or patchserie) ?

bye,
Heiko
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[U-Boot] [PATCH 6/7] efi_loader: Fix efi_install_configuration_table

[Alexander Graf]

So far we were only installing the FDT table and didn't have space
to store any other. Hence nobody realized that our efi table allocation
was broken in that it didn't set the indicator for the number of tables
plus one.

This patch fixes it, allowing code to allocate new efi tables.

Signed-off-by: Alexander Graf 
---
 lib/efi_loader/efi_boottime.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 3e7a48b..4d0e077 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -394,7 +394,7 @@ efi_status_t efi_install_configuration_table(efi_guid_t 
*guid, void *table)
/* Add a new entry */
memcpy(_conf_table[i].guid, guid, sizeof(*guid));
efi_conf_table[i].table = table;
-   systab.nr_tables = i;
+   systab.nr_tables = i + 1;
 
return EFI_SUCCESS;
 }
-- 
2.6.6

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[U-Boot] [PATCH 7/7] smbios: Provide serial number

[Alexander Graf]

If the system has a valid "serial#" environment variable set (which boards that
can find it out programatically set automatically), use that as input for the
serial number field in the SMBIOS tables.

Signed-off-by: Alexander Graf 
---
 lib/smbios.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/smbios.c b/lib/smbios.c
index b9aa741..e8befdf 100644
--- a/lib/smbios.c
+++ b/lib/smbios.c
@@ -111,11 +111,14 @@ static int smbios_write_type1(uintptr_t *current, int 
handle)
 {
struct smbios_type1 *t = (struct smbios_type1 *)*current;
int len = sizeof(struct smbios_type1);
+   char *serial_str = getenv("serial#");
 
memset(t, 0, sizeof(struct smbios_type1));
fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle);
t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER);
t->product_name = smbios_add_string(t->eos, CONFIG_SMBIOS_PRODUCT_NAME);
+   if (serial_str)
+   t->serial_number = smbios_add_string(t->eos, serial_str);
 
len = t->length + smbios_string_table_len(t->eos);
*current += len;
-- 
2.6.6

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[U-Boot] [PATCH 4/7] smbios: Allow compilation on 64bit systems

[Alexander Graf]

The SMBIOS generation code passes pointers as u32. That causes the compiler
to warn on casts to pointers. This patch moves all address pointers to
uintptr_t instead.

Technically u32 would be enough for the current SMBIOS2 style tables, but
we may want to extend the code to SMBIOS3 in the future which is 64bit
address capable.

Signed-off-by: Alexander Graf 
---
 arch/x86/lib/tables.c |  7 ++-
 include/smbios.h  |  4 ++--
 lib/smbios.c  | 16 
 3 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index e62705a..025b183 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -12,6 +12,11 @@
 #include 
 #include 
 
+static u32 write_smbios_table_wrapper(u32 addr)
+{
+   return write_smbios_table(addr);
+}
+
 /**
  * Function prototype to write a specific configuration table
  *
@@ -34,7 +39,7 @@ static table_write table_write_funcs[] = {
write_acpi_tables,
 #endif
 #ifdef CONFIG_GENERATE_SMBIOS_TABLE
-   write_smbios_table,
+   write_smbios_table_wrapper,
 #endif
 };
 
diff --git a/include/smbios.h b/include/smbios.h
index 623a703..5962d4c 100644
--- a/include/smbios.h
+++ b/include/smbios.h
@@ -221,7 +221,7 @@ static inline void fill_smbios_header(void *table, int type,
  * @handle:the structure's handle, a unique 16-bit number
  * @return:size of the structure
  */
-typedef int (*smbios_write_type)(u32 *addr, int handle);
+typedef int (*smbios_write_type)(uintptr_t *addr, int handle);
 
 /**
  * write_smbios_table() - Write SMBIOS table
@@ -231,6 +231,6 @@ typedef int (*smbios_write_type)(u32 *addr, int handle);
  * @addr:  start address to write SMBIOS table
  * @return:end address of SMBIOS table
  */
-u32 write_smbios_table(u32 addr);
+uintptr_t write_smbios_table(uintptr_t addr);
 
 #endif /* _SMBIOS_H_ */
diff --git a/lib/smbios.c b/lib/smbios.c
index 9808ee7..8dfd486 100644
--- a/lib/smbios.c
+++ b/lib/smbios.c
@@ -69,7 +69,7 @@ static int smbios_string_table_len(char *start)
return len + 1;
 }
 
-static int smbios_write_type0(u32 *current, int handle)
+static int smbios_write_type0(uintptr_t *current, int handle)
 {
struct smbios_type0 *t = (struct smbios_type0 *)*current;
int len = sizeof(struct smbios_type0);
@@ -98,7 +98,7 @@ static int smbios_write_type0(u32 *current, int handle)
return len;
 }
 
-static int smbios_write_type1(u32 *current, int handle)
+static int smbios_write_type1(uintptr_t *current, int handle)
 {
struct smbios_type1 *t = (struct smbios_type1 *)*current;
int len = sizeof(struct smbios_type1);
@@ -114,7 +114,7 @@ static int smbios_write_type1(u32 *current, int handle)
return len;
 }
 
-static int smbios_write_type2(u32 *current, int handle)
+static int smbios_write_type2(uintptr_t *current, int handle)
 {
struct smbios_type2 *t = (struct smbios_type2 *)*current;
int len = sizeof(struct smbios_type2);
@@ -132,7 +132,7 @@ static int smbios_write_type2(u32 *current, int handle)
return len;
 }
 
-static int smbios_write_type3(u32 *current, int handle)
+static int smbios_write_type3(uintptr_t *current, int handle)
 {
struct smbios_type3 *t = (struct smbios_type3 *)*current;
int len = sizeof(struct smbios_type3);
@@ -152,7 +152,7 @@ static int smbios_write_type3(u32 *current, int handle)
return len;
 }
 
-static int smbios_write_type4(u32 *current, int handle)
+static int smbios_write_type4(uintptr_t *current, int handle)
 {
struct smbios_type4 *t = (struct smbios_type4 *)*current;
int len = sizeof(struct smbios_type4);
@@ -185,7 +185,7 @@ static int smbios_write_type4(u32 *current, int handle)
return len;
 }
 
-static int smbios_write_type32(u32 *current, int handle)
+static int smbios_write_type32(uintptr_t *current, int handle)
 {
struct smbios_type32 *t = (struct smbios_type32 *)*current;
int len = sizeof(struct smbios_type32);
@@ -198,7 +198,7 @@ static int smbios_write_type32(u32 *current, int handle)
return len;
 }
 
-static int smbios_write_type127(u32 *current, int handle)
+static int smbios_write_type127(uintptr_t *current, int handle)
 {
struct smbios_type127 *t = (struct smbios_type127 *)*current;
int len = sizeof(struct smbios_type127);
@@ -221,7 +221,7 @@ static smbios_write_type smbios_write_funcs[] = {
smbios_write_type127
 };
 
-u32 write_smbios_table(u32 addr)
+uintptr_t write_smbios_table(uintptr_t addr)
 {
struct smbios_entry *se;
u32 tables;
-- 
2.6.6

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[U-Boot] [PATCH 2/7] x86: Move smbios generation into arch independent directory

[Alexander Graf]

We will need the SMBIOS generation function on ARM as well going forward,
so let's move it into a non arch specific location.

Signed-off-by: Alexander Graf 
---
 arch/x86/Kconfig   | 27 
 arch/x86/lib/Makefile  |  1 -
 arch/x86/lib/tables.c  |  2 +-
 {arch/x86/include/asm => include}/smbios.h |  0
 lib/Kconfig| 33 ++
 lib/Makefile   |  1 +
 {arch/x86/lib => lib}/smbios.c |  4 ++--
 7 files changed, 37 insertions(+), 31 deletions(-)
 rename {arch/x86/include/asm => include}/smbios.h (100%)
 rename {arch/x86/lib => lib}/smbios.c (99%)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 29d1120..682ebb8 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -457,33 +457,6 @@ config GENERATE_ACPI_TABLE
  by the operating system. It defines platform-independent interfaces
  for configuration and power management monitoring.
 
-config GENERATE_SMBIOS_TABLE
-   bool "Generate an SMBIOS (System Management BIOS) table"
-   default y
-   help
- The System Management BIOS (SMBIOS) specification addresses how
- motherboard and system vendors present management information about
- their products in a standard format by extending the BIOS interface
- on Intel architecture systems.
-
- Check http://www.dmtf.org/standards/smbios for details.
-
-config SMBIOS_MANUFACTURER
-   string "SMBIOS Manufacturer"
-   depends on GENERATE_SMBIOS_TABLE
-   default SYS_VENDOR
-   help
- The board manufacturer to store in SMBIOS structures.
- Change this to override the default one (CONFIG_SYS_VENDOR).
-
-config SMBIOS_PRODUCT_NAME
-   string "SMBIOS Product Name"
-   depends on GENERATE_SMBIOS_TABLE
-   default SYS_BOARD
-   help
- The product name to store in SMBIOS structures.
- Change this to override the default one (CONFIG_SYS_BOARD).
-
 endmenu
 
 config MAX_PIRQ_LINKS
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index e17f0bb..40ea6bf 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -29,7 +29,6 @@ obj-y += relocate.o
 obj-y += physmem.o
 obj-$(CONFIG_X86_RAMTEST) += ramtest.o
 obj-y += sfi.o
-obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
 obj-y  += string.o
 ifndef CONFIG_QEMU
 obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi_table.o
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 9ee6b5e..e62705a 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -5,9 +5,9 @@
  */
 
 #include 
+#include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/include/asm/smbios.h b/include/smbios.h
similarity index 100%
rename from arch/x86/include/asm/smbios.h
rename to include/smbios.h
diff --git a/lib/Kconfig b/lib/Kconfig
index 02ca405..5a14530 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -149,6 +149,39 @@ config SPL_OF_LIBFDT
  particular compatible nodes. The library operates on a flattened
  version of the device tree.
 
+menu "System tables"
+   depends on !EFI && !SYS_COREBOOT
+
+config GENERATE_SMBIOS_TABLE
+   bool "Generate an SMBIOS (System Management BIOS) table"
+   default y
+   depends on X86
+   help
+ The System Management BIOS (SMBIOS) specification addresses how
+ motherboard and system vendors present management information about
+ their products in a standard format by extending the BIOS interface
+ on Intel architecture systems.
+
+ Check http://www.dmtf.org/standards/smbios for details.
+
+config SMBIOS_MANUFACTURER
+   string "SMBIOS Manufacturer"
+   depends on GENERATE_SMBIOS_TABLE
+   default SYS_VENDOR
+   help
+ The board manufacturer to store in SMBIOS structures.
+ Change this to override the default one (CONFIG_SYS_VENDOR).
+
+config SMBIOS_PRODUCT_NAME
+   string "SMBIOS Product Name"
+   depends on GENERATE_SMBIOS_TABLE
+   default SYS_BOARD
+   help
+ The product name to store in SMBIOS structures.
+ Change this to override the default one (CONFIG_SYS_BOARD).
+
+endmenu
+
 source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
 
diff --git a/lib/Makefile b/lib/Makefile
index f6a8ba1..8801b8e 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_FIT) += fdtdec_common.o
 obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
 obj-$(CONFIG_GZIP) += gunzip.o
 obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
+obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
 obj-y += initcall.o
 obj-$(CONFIG_LMB) += lmb.o
 obj-y += ldiv.o
diff --git a/arch/x86/lib/smbios.c b/lib/smbios.c
similarity index 99%
rename from arch/x86/lib/smbios.c
rename to lib/smbios.c
index 9f30550..9808ee7 100644
--- a/arch/x86/lib/smbios.c
+++ b/lib/smbios.c
@@ -7,10 +7,10 @@
  */
 
 

[U-Boot] [PATCH 3/7] efi_loader: Expose efi_install_configuration_table

[Alexander Graf]

We want to be able to add configuration table entries from our own code as
well as from EFI payload code. Export the boot service function internally
too, so that we can reuse it.

Signed-off-by: Alexander Graf 
---
 include/efi_loader.h  |  2 ++
 lib/efi_loader/efi_boottime.c | 22 +-
 2 files changed, 15 insertions(+), 9 deletions(-)

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 91d6a84..ac8b77a 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -130,6 +130,8 @@ uint64_t efi_add_memory_map(uint64_t start, uint64_t pages, 
int memory_type,
bool overlap_only_ram);
 /* Called by board init to initialize the EFI memory map */
 int efi_memory_init(void);
+/* Adds new or overrides configuration table entry to the system table */
+efi_status_t efi_install_configuration_table(efi_guid_t *guid, void *table);
 
 #ifdef CONFIG_EFI_LOADER_BOUNCE_BUFFER
 extern void *efi_bounce_buffer;
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index be6f5e8..3e7a48b 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -37,7 +37,7 @@ static bool efi_is_direct_boot = true;
  * In most cases we want to pass an FDT to the payload, so reserve one slot of
  * config table space for it. The pointer gets populated by do_bootefi_exec().
  */
-static struct efi_configuration_table EFI_RUNTIME_DATA efi_conf_table[1];
+static struct efi_configuration_table EFI_RUNTIME_DATA efi_conf_table[2];
 
 /*
  * The "gd" pointer lives in a register on ARM and AArch64 that we declare
@@ -375,31 +375,35 @@ static efi_status_t EFIAPI 
efi_locate_device_path(efi_guid_t *protocol,
return EFI_EXIT(EFI_NOT_FOUND);
 }
 
-static efi_status_t EFIAPI efi_install_configuration_table(efi_guid_t *guid,
-  void *table)
+efi_status_t efi_install_configuration_table(efi_guid_t *guid, void *table)
 {
int i;
 
-   EFI_ENTRY("%p, %p", guid, table);
-
/* Check for guid override */
for (i = 0; i < systab.nr_tables; i++) {
if (!guidcmp(guid, _conf_table[i].guid)) {
efi_conf_table[i].table = table;
-   return EFI_EXIT(EFI_SUCCESS);
+   return EFI_SUCCESS;
}
}
 
/* No override, check for overflow */
if (i >= ARRAY_SIZE(efi_conf_table))
-   return EFI_EXIT(EFI_OUT_OF_RESOURCES);
+   return EFI_OUT_OF_RESOURCES;
 
/* Add a new entry */
memcpy(_conf_table[i].guid, guid, sizeof(*guid));
efi_conf_table[i].table = table;
systab.nr_tables = i;
 
-   return EFI_EXIT(EFI_SUCCESS);
+   return EFI_SUCCESS;
+}
+
+static efi_status_t EFIAPI efi_install_configuration_table_ext(efi_guid_t 
*guid,
+  void *table)
+{
+   EFI_ENTRY("%p, %p", guid, table);
+   return EFI_EXIT(efi_install_configuration_table(guid, table));
 }
 
 static efi_status_t EFIAPI efi_load_image(bool boot_policy,
@@ -750,7 +754,7 @@ static const struct efi_boot_services efi_boot_services = {
.register_protocol_notify = efi_register_protocol_notify,
.locate_handle = efi_locate_handle,
.locate_device_path = efi_locate_device_path,
-   .install_configuration_table = efi_install_configuration_table,
+   .install_configuration_table = efi_install_configuration_table_ext,
.load_image = efi_load_image,
.start_image = efi_start_image,
.exit = efi_exit,
-- 
2.6.6

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[U-Boot] [PATCH 1/7] x86: Move table csum into separate header

[Alexander Graf]

We need the checksum function without all the other table functionality
soon, so let's split it out into its own header file.

Signed-off-by: Alexander Graf 
---
 arch/x86/include/asm/tables.h |  2 ++
 arch/x86/lib/tables.c | 12 
 include/tables_csum.h | 22 ++
 3 files changed, 24 insertions(+), 12 deletions(-)
 create mode 100644 include/tables_csum.h

diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h
index ae9f0d0..81f98f2 100644
--- a/arch/x86/include/asm/tables.h
+++ b/arch/x86/include/asm/tables.h
@@ -7,6 +7,8 @@
 #ifndef _X86_TABLES_H_
 #define _X86_TABLES_H_
 
+#include 
+
 /*
  * All x86 tables happen to like the address range from 0xf to 0x10.
  * We use 0xf as the starting address to store those tables, including
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index f92111e..9ee6b5e 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -38,18 +38,6 @@ static table_write table_write_funcs[] = {
 #endif
 };
 
-u8 table_compute_checksum(void *v, int len)
-{
-   u8 *bytes = v;
-   u8 checksum = 0;
-   int i;
-
-   for (i = 0; i < len; i++)
-   checksum -= bytes[i];
-
-   return checksum;
-}
-
 void table_fill_string(char *dest, const char *src, size_t n, char pad)
 {
int start, len;
diff --git a/include/tables_csum.h b/include/tables_csum.h
new file mode 100644
index 000..27d147b
--- /dev/null
+++ b/include/tables_csum.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2015, Bin Meng 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _TABLES_CSUM_H_
+#define _TABLES_CSUM_H_
+
+static inline u8 table_compute_checksum(void *v, int len)
+{
+   u8 *bytes = v;
+   u8 checksum = 0;
+   int i;
+
+   for (i = 0; i < len; i++)
+   checksum -= bytes[i];
+
+   return checksum;
+}
+
+#endif
-- 
2.6.6

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[U-Boot] [PATCH 5/7] smbios: Expose in efi_loader as table

[Alexander Graf]

We can pass SMBIOS easily as EFI configuration table to an EFI payload. This
patch adds enablement for that case.

While at it, we also enable SMBIOS generation for ARM systems, since they 
support
EFI_LOADER.

Signed-off-by: Alexander Graf 
---
 cmd/bootefi.c|  3 +++
 include/efi_api.h|  4 
 include/efi_loader.h |  2 ++
 include/smbios.h |  1 +
 lib/Kconfig  |  4 ++--
 lib/smbios.c | 36 
 6 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 53a6ee3..e241b7d 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -205,6 +205,9 @@ static unsigned long do_bootefi_exec(void *efi, void *fdt)
if (!memcmp(bootefi_device_path[0].str, "N\0e\0t", 6))
loaded_image_info.device_handle = nethandle;
 #endif
+#ifdef CONFIG_GENERATE_SMBIOS_TABLE
+   efi_smbios_register();
+#endif
 
/* Initialize EFI runtime services */
efi_reset_system_init();
diff --git a/include/efi_api.h b/include/efi_api.h
index f572b88..bdb600e 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -201,6 +201,10 @@ struct efi_runtime_services {
EFI_GUID(0xb1b621d5, 0xf19c, 0x41a5, \
 0x83, 0x0b, 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0)
 
+#define SMBIOS_TABLE_GUID \
+   EFI_GUID(0xeb9d2d31, 0x2d88, 0x11d3,  \
+0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d)
+
 struct efi_configuration_table
 {
efi_guid_t guid;
diff --git a/include/efi_loader.h b/include/efi_loader.h
index ac8b77a..b0e8a7f 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -85,6 +85,8 @@ int efi_disk_register(void);
 int efi_gop_register(void);
 /* Called by bootefi to make the network interface available */
 int efi_net_register(void **handle);
+/* Called by bootefi to make SMBIOS tables available */
+void efi_smbios_register(void);
 
 /* Called by networking code to memorize the dhcp ack package */
 void efi_net_set_dhcp_ack(void *pkt, int len);
diff --git a/include/smbios.h b/include/smbios.h
index 5962d4c..fb6396a 100644
--- a/include/smbios.h
+++ b/include/smbios.h
@@ -55,6 +55,7 @@ struct __packed smbios_entry {
 #define BIOS_CHARACTERISTICS_SELECTABLE_BOOT   (1 << 16)
 
 #define BIOS_CHARACTERISTICS_EXT1_ACPI (1 << 0)
+#define BIOS_CHARACTERISTICS_EXT1_UEFI (1 << 3)
 #define BIOS_CHARACTERISTICS_EXT2_TARGET   (1 << 2)
 
 struct __packed smbios_type0 {
diff --git a/lib/Kconfig b/lib/Kconfig
index 5a14530..d7f75fe 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -150,12 +150,12 @@ config SPL_OF_LIBFDT
  version of the device tree.
 
 menu "System tables"
-   depends on !EFI && !SYS_COREBOOT
+   depends on (!EFI && !SYS_COREBOOT) || (ARM && EFI_LOADER)
 
 config GENERATE_SMBIOS_TABLE
bool "Generate an SMBIOS (System Management BIOS) table"
default y
-   depends on X86
+   depends on X86 || EFI_LOADER
help
  The System Management BIOS (SMBIOS) specification addresses how
  motherboard and system vendors present management information about
diff --git a/lib/smbios.c b/lib/smbios.c
index 8dfd486..b9aa741 100644
--- a/lib/smbios.c
+++ b/lib/smbios.c
@@ -7,10 +7,13 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
+#ifdef CONFIG_X86
 #include 
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -79,14 +82,20 @@ static int smbios_write_type0(uintptr_t *current, int 
handle)
t->vendor = smbios_add_string(t->eos, "U-Boot");
t->bios_ver = smbios_add_string(t->eos, PLAIN_VERSION);
t->bios_release_date = smbios_add_string(t->eos, U_BOOT_DMI_DATE);
+#ifdef CONFIG_ROM_SIZE
t->bios_rom_size = (CONFIG_ROM_SIZE / 65536) - 1;
+#endif
t->bios_characteristics = BIOS_CHARACTERISTICS_PCI_SUPPORTED |
  BIOS_CHARACTERISTICS_SELECTABLE_BOOT |
  BIOS_CHARACTERISTICS_UPGRADEABLE;
 #ifdef CONFIG_GENERATE_ACPI_TABLE
t->bios_characteristics_ext1 = BIOS_CHARACTERISTICS_EXT1_ACPI;
 #endif
+#ifdef CONFIG_EFI_LOADER
+   t->bios_characteristics_ext1 |= BIOS_CHARACTERISTICS_EXT1_UEFI;
+#endif
t->bios_characteristics_ext2 = BIOS_CHARACTERISTICS_EXT2_TARGET;
+
t->bios_major_release = 0xff;
t->bios_minor_release = 0xff;
t->ec_major_release = 0xff;
@@ -152,6 +161,7 @@ static int smbios_write_type3(uintptr_t *current, int 
handle)
return len;
 }
 
+#ifdef CONFIG_X86
 static int smbios_write_type4(uintptr_t *current, int handle)
 {
struct smbios_type4 *t = (struct smbios_type4 *)*current;
@@ -184,6 +194,7 @@ static int smbios_write_type4(uintptr_t *current, int 
handle)
 
return len;
 }
+#endif
 
 static int smbios_write_type32(uintptr_t *current, int handle)
 {
@@ -216,7 +227,9 @@ static smbios_write_type smbios_write_funcs[] = {
smbios_write_type1,
smbios_write_type2,
smbios_write_type3,
+#ifdef CONFIG_X86
 

[U-Boot] [PATCH 0/7] efi_loader: Expose SMBIOS table

[Alexander Graf]

We generate a few tables on x86 today that really can be used on ARM just
the same. One such example is the SMBIOS table, which people use with tools
like "dmidecode" to identify which hardware they are running on.

We're slowly growing needs to collect serial numbers from various devices
on ARM and SMBIOS seems the natural choice. So this patch set moves the
current SMBIOS generation into generic code and adds serial number exposure
to it.

I have verified that I get a correct serial number printed in dmidecode on
the RPi3.

Alexander Graf (7):
  x86: Move table csum into separate header
  x86: Move smbios generation into arch independent directory
  efi_loader: Expose efi_install_configuration_table
  smbios: Allow compilation on 64bit systems
  smbios: Expose in efi_loader as table
  efi_loader: Fix efi_install_configuration_table
  smbios: Provide serial number

 arch/x86/Kconfig   | 27 --
 arch/x86/include/asm/tables.h  |  2 +
 arch/x86/lib/Makefile  |  1 -
 arch/x86/lib/tables.c  | 21 ---
 cmd/bootefi.c  |  3 ++
 include/efi_api.h  |  4 ++
 include/efi_loader.h   |  4 ++
 {arch/x86/include/asm => include}/smbios.h |  5 ++-
 include/tables_csum.h  | 22 +++
 lib/Kconfig| 33 +
 lib/Makefile   |  1 +
 lib/efi_loader/efi_boottime.c  | 24 +++-
 {arch/x86/lib => lib}/smbios.c | 59 +-
 13 files changed, 142 insertions(+), 64 deletions(-)
 rename {arch/x86/include/asm => include}/smbios.h (96%)
 create mode 100644 include/tables_csum.h
 rename {arch/x86/lib => lib}/smbios.c (82%)

-- 
2.6.6

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Re: [U-Boot] [PATCH] tiny-printf: Adjust to avoid using data section

[Stefan Roese]

On 06.08.2016 18:59, Tom Rini wrote:

On Thu, Aug 04, 2016 at 09:58:14PM -0600, Simon Glass wrote:


We can pass all the variables down to the functions that need them, and
then everything is on the stack. This is safer than using the data section.

At least on firefly-rk3288, the code size is the same and the data size is
12 bytes smaller:

before:
  188652636  40   215415425 b/firefly-rk3288/spl/u-boot-spl
after:
  188652624  40   215295419 b/firefly-rk3288/spl/u-boot-spl

Signed-off-by: Simon Glass 


Reviewed-by: Tom Rini 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH v1 1/4] usb: host: ehci-vf: Migrate Vybrid USB to driver model

[maitysanchayan]

Hello,

On 16-08-08 18:56:21, maitysancha...@gmail.com wrote:
> Hello,
> 
> Adding Lukasz's second mail ID to cc
> 
> On 16-08-08 11:45:35, maitysancha...@gmail.com wrote:
> > Hello,
> > 
> > On 16-08-03 17:13:11, Marek Vasut wrote:
> > > On 08/03/2016 01:58 PM, Sanchayan Maity wrote:
> > > > Add driver model support for Vybrid USB driver.
> > > > 
> > > > Signed-off-by: Sanchayan Maity 
> > > 
> > > CCing Lukasz.
> > > 
> > > > ---
> > > > Hello,
> > > > 
> > > > I am trying to migrate the Vybrid USB driver to driver model.
> > > > Patches are based on top of uboot master branch. With this
> > > > implementation, host works perfectly fine on both USB ports
> > > > but I have problems using it in client mode.
> > > > 
> > > > I tried DFU to test client mode and I get the following
> > > > 
> > > > Colibri VFxx # version
> > > > 
> > > > U-Boot 2016.09-rc1-00235-g4e8c122 (Aug 03 2016 - 17:07:48 +0530)
> > > > arm-linux-gnueabihf-gcc (Linaro GCC 5.2-2015.11-2) 5.2.1 20151005
> > > > GNU ld (GNU Binutils) 2.25.0 Linaro 2015_10
> > > > Colibri VFxx # dfu 0 nand 4
> > > > using id 'nand0,0'
> > > > using id 'nand0,1'
> > > > using id 'nand0,3'
> > > > g_dnl_register: failed!, error: -19
> > > > data abort
> > > > pc : [<8ff80f18>]  lr : [<8ff612a9>]
> > > > reloc pc : [<3f431f18>]lr : [<3f4122a9>]
> > > > sp : 8fd15000  ip :  fp : 2710
> > > > r10: 8ffb50cc  r9 : 8fd16ee8 r8 : 8ffbc574
> > > > r7 :   r6 :  r5 :   r4 : 
> > > > r3 : f4b9  r2 : 8000 r1 : 0001  r0 : 
> > > > Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
> > > > Resetting CPU ...
> > > > 
> > > > resetting ...
> > 
> > FWIW here is output with DEBUG enabled in uclass.c
> > 
> > when testing with DFU:
> > 
> > uclass_find_device_by_seq: 1 0
> >- -1 -1
> >- -1 -1
> >- not found
> > g_dnl_register: failed!, error: -19
> > data abort
> > pc : [<8ff80fb0>]  lr : [<8ff612a9>]
> > reloc pc : [<3f431fb0>]lr : [<3f4122a9>]
> > sp : 8fd15000  ip :  fp : 2710
> > r10: 8ffb5274  r9 : 8fd16ee8 r8 : 8ffbc714
> > r7 :   r6 :  r5 :   r4 : 
> > r3 : f4b9  r2 : 8000 r1 : 0001  r0 : 
> > Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
> > Resetting CPU ...
> > 
> > resetting ...
> > 
> > When testing host mode with usb start
> > 
> > Colibri VFxx # usb start
> > starting USB...
> > USB0:   uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 -1
> >- -1 -1
> >- not found
> > USB EHCI 1.00
> > USB1:   uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 0
> >- found
> > uclass_find_device_by_seq: 0 1
> >- -1 0
> >- -1 1
> >- found
> > uclass_find_device_by_seq: 0 2
> >- -1 0
> >- -1 1
> >- -1 -1
> >- not found
> > uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 0
> >- found
> > uclass_find_device_by_seq: 0 1
> >- -1 0
> >- -1 -1
> >- not found
> > USB EHCI 1.00
> > scanning bus 0 for devices... uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 -1
> >- not found
> > uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 -1
> >- not found
> > 2 USB Device(s) found
> > scanning bus 1 for devices... uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 0
> >- found
> > uclass_find_device_by_seq: 0 1
> >- -1 0
> >- -1 -1
> >- not found
> > uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 0
> >- found
> > uclass_find_device_by_seq: 0 1
> >- -1 0
> >- -1 1
> >- found
> > uclass_find_device_by_seq: 0 2
> >- -1 0
> >- -1 1
> >- -1 -1
> >- not found
> > 2 USB Device(s) found
> > 
> > Regards,
> > Sanchayan.
> > 
> > > > 
> > > > It seems to return ENODEV from usb_setup_ehci_gadget after calling
> > > > uclass_find_device_by_seq. I am not sure what I am missing in the
> > > > current implementation. Can someone point me in the correct direction?
> > > > Since host works on both ports I would assume the device tree nodes
> > > > are correct.
> > > > 
> > > > Tried to look in documentation and usb-info.txt mentions that gadget
> > > > framework does not use driver model. Does this imply I cannot use
> > > > any usb gadget functionality if I am using USB DM? However the function
> > > > usb_gadget_register_driver in ci_udc.c does have a CONFIG_DM_USB and
> > > > calls into usb_setup_ehci_gadget which is in usb-uclass.c.
> 
> @Lukasz
> Can you comment?

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index be114fc..1bcd73f 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -355,7 +355,7 @@ int usb_setup_ehci_gadget(struct ehci_ctrl **ctlrp)
int ret;
 
/* Find the old device and remove it */
-   

[U-Boot] [PATCH 4/6] sf: Remove SECT_32K

[Jagan Teki]

SECT_32K never used anywhere in the code.

Cc: Simon Glass 
Cc: Bin Meng 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Cc: Vignesh R 
Cc: Mugunthan V N 
Signed-off-by: Jagan Teki 
---
 drivers/mtd/spi/sf_internal.h | 16 +++-
 drivers/mtd/spi/spi_flash.c   |  3 ---
 2 files changed, 7 insertions(+), 12 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 71ba1a6..9eb0b84 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -27,14 +27,13 @@ enum {
 #else
SECT_4K = BIT(0),
 #endif
-   SECT_32K= BIT(1),
-   E_FSR   = BIT(2),
-   SST_WR  = BIT(3),
-   WR_QPP  = BIT(4),
-   RD_QUAD = BIT(5),
-   RD_DUAL = BIT(6),
-   RD_QUADIO   = BIT(7),
-   RD_DUALIO   = BIT(8),
+   E_FSR   = BIT(1),
+   SST_WR  = BIT(2),
+   WR_QPP  = BIT(3),
+   RD_QUAD = BIT(4),
+   RD_DUAL = BIT(5),
+   RD_QUADIO   = BIT(6),
+   RD_DUALIO   = BIT(7),
 };
 #define RD_FULLRD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO
 
@@ -57,7 +56,6 @@ enum spi_nor_option_flags {
 
 /* Erase commands */
 #define CMD_ERASE_4K   0x20
-#define CMD_ERASE_32K  0x52
 #define CMD_ERASE_CHIP 0xc7
 #define CMD_ERASE_64K  0xd8
 
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 041b64f..2b2a409 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1159,9 +1159,6 @@ int spi_flash_scan(struct spi_flash *flash)
if (params->flags & SECT_4K) {
flash->erase_cmd = CMD_ERASE_4K;
flash->erase_size = 4096 << flash->shift;
-   } else if (params->flags & SECT_32K) {
-   flash->erase_cmd = CMD_ERASE_32K;
-   flash->erase_size = 32768 << flash->shift;
} else {
flash->erase_cmd = CMD_ERASE_64K;
flash->erase_size = flash->sector_size;
-- 
2.7.4

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[U-Boot] [PATCH 6/6] sf: Move flags macro's to spi_flash_params{} members

[Jagan Teki]

This patch moves flags macro's to respective member position on
spi_flash_params{}, for better readabilty and finding the
respective member macro's easily.

Signed-off-by: Jagan Teki 
---
 drivers/mtd/spi/sf_internal.h | 23 ++-
 1 file changed, 10 insertions(+), 13 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 1301e48..e5c38bf 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -20,19 +20,6 @@ enum spi_dual_flash {
SF_DUAL_PARALLEL_FLASH  = BIT(1),
 };
 
-/* sf param flags */
-enum {
-   SECT_4K = BIT(0),
-   E_FSR   = BIT(1),
-   SST_WR  = BIT(2),
-   WR_QPP  = BIT(3),
-   RD_QUAD = BIT(4),
-   RD_DUAL = BIT(5),
-   RD_QUADIO   = BIT(6),
-   RD_DUALIO   = BIT(7),
-};
-#define RD_FULLRD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO
-
 enum spi_nor_option_flags {
SNOR_F_SST_WR   = BIT(0),
SNOR_F_USE_FSR  = BIT(1),
@@ -133,7 +120,17 @@ struct spi_flash_params {
u16 ext_jedec;
u32 sector_size;
u32 nr_sectors;
+
u16 flags;
+#define SECT_4KBIT(0)
+#define E_FSR  BIT(1)
+#define SST_WR BIT(2)
+#define WR_QPP BIT(3)
+#define RD_QUADBIT(4)
+#define RD_DUALBIT(5)
+#define RD_QUADIO  BIT(6)
+#define RD_DUALIO  BIT(7)
+#define RD_FULL(RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
 };
 
 extern const struct spi_flash_params spi_flash_params_table[];
-- 
2.7.4

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[U-Boot] [PATCH 5/6] sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash

[Jagan Teki]

Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash code from header file.

Cc: Simon Glass 
Cc: Bin Meng 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Cc: Vignesh R 
Cc: Mugunthan V N 
Signed-off-by: Jagan Teki 
---
 drivers/mtd/spi/sf_internal.h | 4 
 drivers/mtd/spi/spi_flash.c   | 5 -
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 9eb0b84..1301e48 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -22,11 +22,7 @@ enum spi_dual_flash {
 
 /* sf param flags */
 enum {
-#ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS
-   SECT_4K = 0,
-#else
SECT_4K = BIT(0),
-#endif
E_FSR   = BIT(1),
SST_WR  = BIT(2),
WR_QPP  = BIT(3),
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 2b2a409..7f6e9ae 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1155,11 +1155,14 @@ int spi_flash_scan(struct spi_flash *flash)
flash->size <<= 1;
 #endif
 
+#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
/* Compute erase sector and command */
if (params->flags & SECT_4K) {
flash->erase_cmd = CMD_ERASE_4K;
flash->erase_size = 4096 << flash->shift;
-   } else {
+   } else
+#endif
+   {
flash->erase_cmd = CMD_ERASE_64K;
flash->erase_size = flash->sector_size;
}
-- 
2.7.4

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[U-Boot] [PATCH 3/6] spi: Use mode for rx mode flags

[Jagan Teki]

Make rx mode flags as generic to spi, earlier mode_rx is
maintained separately becuase of some flash specific code.

Cc: Simon Glass 
Cc: Bin Meng 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Cc: Vignesh R 
Cc: Mugunthan V N 
Signed-off-by: Jagan Teki 
---
 drivers/mtd/spi/spi_flash.c |  6 +++---
 drivers/spi/cadence_qspi.c  |  2 +-
 drivers/spi/ich.c   |  6 ++
 drivers/spi/spi-uclass.c| 11 ---
 drivers/spi/ti_qspi.c   |  6 +++---
 include/spi.h   | 14 --
 6 files changed, 17 insertions(+), 28 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 5fd408c..041b64f 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1172,11 +1172,11 @@ int spi_flash_scan(struct spi_flash *flash)
 
/* Look for read commands */
flash->read_cmd = CMD_READ_ARRAY_FAST;
-   if (spi->mode_rx & SPI_RX_SLOW)
+   if (spi->mode & SPI_RX_SLOW)
flash->read_cmd = CMD_READ_ARRAY_SLOW;
-   else if (spi->mode_rx & SPI_RX_QUAD && params->flags & RD_QUAD)
+   else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD)
flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
-   else if (spi->mode_rx & SPI_RX_DUAL && params->flags & RD_DUAL)
+   else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL)
flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
 
/* Look for write commands */
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index a5244ff..1d50f13 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -251,7 +251,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned 
int bitlen,
break;
case CQSPI_INDIRECT_READ:
err = cadence_qspi_apb_indirect_read_setup(plat,
-   priv->cmd_len, dm_plat->mode_rx, cmd_buf);
+   priv->cmd_len, dm_plat->mode, cmd_buf);
if (!err) {
err = cadence_qspi_apb_indirect_read_execute
(plat, data_bytes, din);
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 00b2fed..caf0103 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -649,10 +649,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev)
 * ICH 7 SPI controller only supports array read command
 * and byte program command for SST flash
 */
-   if (plat->ich_version == ICHV_7) {
-   slave->mode_rx = SPI_RX_SLOW;
-   slave->mode = SPI_TX_BYTE;
-   }
+   if (plat->ich_version == ICHV_7)
+   slave->mode = SPI_RX_SLOW | SPI_TX_BYTE;
 
return 0;
 }
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 247abfa..d9c49e4 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -164,7 +164,6 @@ static int spi_child_pre_probe(struct udevice *dev)
 
slave->max_hz = plat->max_hz;
slave->mode = plat->mode;
-   slave->mode_rx = plat->mode_rx;
slave->wordlen = SPI_DEFAULT_WORDLEN;
 
return 0;
@@ -381,7 +380,7 @@ void spi_free_slave(struct spi_slave *slave)
 int spi_slave_ofdata_to_platdata(const void *blob, int node,
 struct dm_spi_slave_platdata *plat)
 {
-   int mode = 0, mode_rx = 0;
+   int mode = 0;
int value;
 
plat->cs = fdtdec_get_int(blob, node, "reg", -1);
@@ -413,24 +412,22 @@ int spi_slave_ofdata_to_platdata(const void *blob, int 
node,
break;
}
 
-   plat->mode = mode;
-
value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1);
switch (value) {
case 1:
break;
case 2:
-   mode_rx |= SPI_RX_DUAL;
+   mode |= SPI_RX_DUAL;
break;
case 4:
-   mode_rx |= SPI_RX_QUAD;
+   mode |= SPI_RX_QUAD;
break;
default:
error("spi-rx-bus-width %d not supported\n", value);
break;
}
 
-   plat->mode_rx = mode_rx;
+   plat->mode = mode;
 
return 0;
 }
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index bb72cb0..37dc64f 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -336,7 +336,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv 
*priv)
QSPI_SETUP0_NUM_D_BYTES_8_BITS |
QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE |
QSPI_NUM_DUMMY_BITS);
-   slave->mode_rx = SPI_RX_QUAD;
+   slave->mode |= SPI_RX_QUAD;
 #else
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
QSPI_SETUP0_NUM_D_BYTES_NO_BITS |
@@ -422,7 +422,7 @@ 

[U-Boot] [PATCH 2/6] sf: Remove e_rd_cmd from param table

[Jagan Teki]

e_rd_cmd is maintained separately for fastest read command code,
since the read commands are computed normally this e_rd_cmd
is not required in spi_flash_params table.

Cc: Simon Glass 
Cc: Bin Meng 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Cc: Vignesh R 
Cc: Mugunthan V N 
Signed-off-by: Jagan Teki 
---
 drivers/mtd/spi/sf_internal.h |  18 +---
 drivers/mtd/spi/sf_params.c   | 200 +-
 2 files changed, 101 insertions(+), 117 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index c5cb791..71ba1a6 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -20,21 +20,6 @@ enum spi_dual_flash {
SF_DUAL_PARALLEL_FLASH  = BIT(1),
 };
 
-/* Enum list - Full read commands */
-enum spi_read_cmds {
-   ARRAY_SLOW  = BIT(0),
-   ARRAY_FAST  = BIT(1),
-   DUAL_OUTPUT_FAST= BIT(2),
-   QUAD_OUTPUT_FAST= BIT(3),
-   DUAL_IO_FAST= BIT(4),
-   QUAD_IO_FAST= BIT(5),
-};
-
-/* Normal - Extended - Full command set */
-#define RD_NORM(ARRAY_SLOW | ARRAY_FAST)
-#define RD_EXTN(RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
-#define RD_FULL(RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
-
 /* sf param flags */
 enum {
 #ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS
@@ -51,6 +36,7 @@ enum {
RD_QUADIO   = BIT(7),
RD_DUALIO   = BIT(8),
 };
+#define RD_FULLRD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO
 
 enum spi_nor_option_flags {
SNOR_F_SST_WR   = BIT(0),
@@ -145,7 +131,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, 
size_t len,
  * @sector_size:   Isn't necessarily a sector size from vendor,
  * the size listed here is what works with CMD_ERASE_64K
  * @nr_sectors:No.of sectors on this device
- * @e_rd_cmd:  Enum list for read commands
  * @flags: Important param, for flash specific behaviour
  */
 struct spi_flash_params {
@@ -154,7 +139,6 @@ struct spi_flash_params {
u16 ext_jedec;
u32 sector_size;
u32 nr_sectors;
-   u8 e_rd_cmd;
u16 flags;
 };
 
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 70ca236..5b50114 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -15,122 +15,122 @@
 /* SPI/QSPI flash device params structure */
 const struct spi_flash_params spi_flash_params_table[] = {
 #ifdef CONFIG_SPI_FLASH_ATMEL  /* ATMEL */
-   {"AT45DB011D", 0x1f2200, 0x0,   64 * 1024, 4, RD_NORM,  
SECT_4K},
-   {"AT45DB021D", 0x1f2300, 0x0,   64 * 1024, 8, RD_NORM,  
SECT_4K},
-   {"AT45DB041D", 0x1f2400, 0x0,   64 * 1024, 8, RD_NORM,  
SECT_4K},
-   {"AT45DB081D", 0x1f2500, 0x0,   64 * 1024,16, RD_NORM,  
SECT_4K},
-   {"AT45DB161D", 0x1f2600, 0x0,   64 * 1024,32, RD_NORM,  
SECT_4K},
-   {"AT45DB321D", 0x1f2700, 0x0,   64 * 1024,64, RD_NORM,  
SECT_4K},
-   {"AT45DB641D", 0x1f2800, 0x0,   64 * 1024,   128, RD_NORM,  
SECT_4K},
-   {"AT25DF321A", 0x1f4701, 0x0,   64 * 1024,64, RD_NORM,  
SECT_4K},
-   {"AT25DF321",  0x1f4700, 0x0,   64 * 1024,64, RD_NORM,  
SECT_4K},
-   {"AT26DF081A", 0x1f4501, 0x0,   64 * 1024,16, RD_NORM,  
SECT_4K},
+   {"AT45DB011D", 0x1f2200, 0x0,   64 * 1024, 4, SECT_4K},
+   {"AT45DB021D", 0x1f2300, 0x0,   64 * 1024, 8, SECT_4K},
+   {"AT45DB041D", 0x1f2400, 0x0,   64 * 1024, 8, SECT_4K},
+   {"AT45DB081D", 0x1f2500, 0x0,   64 * 1024,16, SECT_4K},
+   {"AT45DB161D", 0x1f2600, 0x0,   64 * 1024,32, SECT_4K},
+   {"AT45DB321D", 0x1f2700, 0x0,   64 * 1024,64, SECT_4K},
+   {"AT45DB641D", 0x1f2800, 0x0,   64 * 1024,   128, SECT_4K},
+   {"AT25DF321A", 0x1f4701, 0x0,   64 * 1024,64, SECT_4K},
+   {"AT25DF321",  0x1f4700, 0x0,   64 * 1024,64, SECT_4K},
+   {"AT26DF081A", 0x1f4501, 0x0,   64 * 1024,16, SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_EON/* EON */
-   {"EN25Q32B",   0x1c3016, 0x0,   64 * 1024,64, RD_NORM,  
  0},
-   {"EN25Q64",0x1c3017, 0x0,   64 * 1024,   128, RD_NORM,  
SECT_4K},
-   {"EN25Q128B",  0x1c3018, 0x0,   64 * 1024,   256, RD_NORM,  
  0},
-   {"EN25S64",0x1c3817, 0x0,   64 * 1024,   128, RD_NORM,  
  

[U-Boot] [PATCH 1/6] sf: Simplify fastest read cmd code

[Jagan Teki]

Fastest read command code look for fastest read command
taking inputs from spi->mode_rx and flags from param table
and controller mode_rx is always been a priority.

Since mode_rx is always set from controller side this optimized
code doesn't require much and this code required exctra overhead like
1) Maintain e_rx_cmd in param table
2) Maintain mode_rx in spi_slave {}

Hence removed this code, and look for read command from normal
spi->mode from spi_slave{} and params->flags

Cc: Simon Glass 
Cc: Bin Meng 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Cc: Vignesh R 
Cc: Mugunthan V N 
Signed-off-by: Jagan Teki 
---
 drivers/mtd/spi/sf_internal.h |  4 
 drivers/mtd/spi/spi_flash.c   | 28 ++--
 2 files changed, 14 insertions(+), 18 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index da2bb7b..c5cb791 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -46,6 +46,10 @@ enum {
E_FSR   = BIT(2),
SST_WR  = BIT(3),
WR_QPP  = BIT(4),
+   RD_QUAD = BIT(5),
+   RD_DUAL = BIT(6),
+   RD_QUADIO   = BIT(7),
+   RD_DUALIO   = BIT(8),
 };
 
 enum spi_nor_option_flags {
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 64d4e0f..5fd408c 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1013,15 +1013,8 @@ int spi_flash_scan(struct spi_flash *flash)
struct spi_slave *spi = flash->spi;
const struct spi_flash_params *params;
u16 jedec, ext_jedec;
-   u8 cmd, idcode[5];
+   u8 idcode[5];
int ret;
-   static u8 spi_read_cmds_array[] = {
-   CMD_READ_ARRAY_SLOW,
-   CMD_READ_ARRAY_FAST,
-   CMD_READ_DUAL_OUTPUT_FAST,
-   CMD_READ_QUAD_OUTPUT_FAST,
-   CMD_READ_DUAL_IO_FAST,
-   CMD_READ_QUAD_IO_FAST };
 
/* Read the ID codes */
ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
@@ -1177,17 +1170,16 @@ int spi_flash_scan(struct spi_flash *flash)
/* Now erase size becomes valid sector size */
flash->sector_size = flash->erase_size;
 
-   /* Look for the fastest read cmd */
-   cmd = fls(params->e_rd_cmd & spi->mode_rx);
-   if (cmd) {
-   cmd = spi_read_cmds_array[cmd - 1];
-   flash->read_cmd = cmd;
-   } else {
-   /* Go for default supported read cmd */
-   flash->read_cmd = CMD_READ_ARRAY_FAST;
-   }
+   /* Look for read commands */
+   flash->read_cmd = CMD_READ_ARRAY_FAST;
+   if (spi->mode_rx & SPI_RX_SLOW)
+   flash->read_cmd = CMD_READ_ARRAY_SLOW;
+   else if (spi->mode_rx & SPI_RX_QUAD && params->flags & RD_QUAD)
+   flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
+   else if (spi->mode_rx & SPI_RX_DUAL && params->flags & RD_DUAL)
+   flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
 
-   /* Not require to look for fastest only two write cmds yet */
+   /* Look for write commands */
if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
else
-- 
2.7.4

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[U-Boot] [PATCH 1/2] warp7: Modify fdt_file environment variable

[Breno Lima]

Use imx7s-warp.dts as fdt_file because this is the name that upstream
kernel will deploy.

Signed-off-by: Breno Lima 
---
 include/configs/warp7.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index e59b16c..91009a8 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -39,7 +39,7 @@
"console=ttymxc0\0" \
"fdt_high=0x\0" \
"initrd_high=0x\0" \
-   "fdt_file=imx7d-warp.dtb\0" \
+   "fdt_file=imx7s-warp.dtb\0" \
"fdt_addr=0x8300\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
-- 
2.7.4

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Re: [U-Boot] [PATCH v1 1/4] usb: host: ehci-vf: Migrate Vybrid USB to driver model

[maitysanchayan]

Hello,

Adding Lukasz's second mail ID to cc

On 16-08-08 11:45:35, maitysancha...@gmail.com wrote:
> Hello,
> 
> On 16-08-03 17:13:11, Marek Vasut wrote:
> > On 08/03/2016 01:58 PM, Sanchayan Maity wrote:
> > > Add driver model support for Vybrid USB driver.
> > > 
> > > Signed-off-by: Sanchayan Maity 
> > 
> > CCing Lukasz.
> > 
> > > ---
> > > Hello,
> > > 
> > > I am trying to migrate the Vybrid USB driver to driver model.
> > > Patches are based on top of uboot master branch. With this
> > > implementation, host works perfectly fine on both USB ports
> > > but I have problems using it in client mode.
> > > 
> > > I tried DFU to test client mode and I get the following
> > > 
> > > Colibri VFxx # version
> > > 
> > > U-Boot 2016.09-rc1-00235-g4e8c122 (Aug 03 2016 - 17:07:48 +0530)
> > > arm-linux-gnueabihf-gcc (Linaro GCC 5.2-2015.11-2) 5.2.1 20151005
> > > GNU ld (GNU Binutils) 2.25.0 Linaro 2015_10
> > > Colibri VFxx # dfu 0 nand 4
> > > using id 'nand0,0'
> > > using id 'nand0,1'
> > > using id 'nand0,3'
> > > g_dnl_register: failed!, error: -19
> > > data abort
> > > pc : [<8ff80f18>]  lr : [<8ff612a9>]
> > > reloc pc : [<3f431f18>]lr : [<3f4122a9>]
> > > sp : 8fd15000  ip :  fp : 2710
> > > r10: 8ffb50cc  r9 : 8fd16ee8 r8 : 8ffbc574
> > > r7 :   r6 :  r5 :   r4 : 
> > > r3 : f4b9  r2 : 8000 r1 : 0001  r0 : 
> > > Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
> > > Resetting CPU ...
> > > 
> > > resetting ...
> 
> FWIW here is output with DEBUG enabled in uclass.c
> 
> when testing with DFU:
> 
> uclass_find_device_by_seq: 1 0
>- -1 -1
>- -1 -1
>- not found
> g_dnl_register: failed!, error: -19
> data abort
> pc : [<8ff80fb0>]  lr : [<8ff612a9>]
> reloc pc : [<3f431fb0>]lr : [<3f4122a9>]
> sp : 8fd15000  ip :  fp : 2710
> r10: 8ffb5274  r9 : 8fd16ee8 r8 : 8ffbc714
> r7 :   r6 :  r5 :   r4 : 
> r3 : f4b9  r2 : 8000 r1 : 0001  r0 : 
> Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
> Resetting CPU ...
> 
> resetting ...
> 
> When testing host mode with usb start
> 
> Colibri VFxx # usb start
> starting USB...
> USB0:   uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 -1
>- -1 -1
>- not found
> USB EHCI 1.00
> USB1:   uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 0
>- found
> uclass_find_device_by_seq: 0 1
>- -1 0
>- -1 1
>- found
> uclass_find_device_by_seq: 0 2
>- -1 0
>- -1 1
>- -1 -1
>- not found
> uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 0
>- found
> uclass_find_device_by_seq: 0 1
>- -1 0
>- -1 -1
>- not found
> USB EHCI 1.00
> scanning bus 0 for devices... uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 -1
>- not found
> uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 -1
>- not found
> 2 USB Device(s) found
> scanning bus 1 for devices... uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 0
>- found
> uclass_find_device_by_seq: 0 1
>- -1 0
>- -1 -1
>- not found
> uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 0
>- found
> uclass_find_device_by_seq: 0 1
>- -1 0
>- -1 1
>- found
> uclass_find_device_by_seq: 0 2
>- -1 0
>- -1 1
>- -1 -1
>- not found
> 2 USB Device(s) found
> 
> Regards,
> Sanchayan.
> 
> > > 
> > > It seems to return ENODEV from usb_setup_ehci_gadget after calling
> > > uclass_find_device_by_seq. I am not sure what I am missing in the
> > > current implementation. Can someone point me in the correct direction?
> > > Since host works on both ports I would assume the device tree nodes
> > > are correct.
> > > 
> > > Tried to look in documentation and usb-info.txt mentions that gadget
> > > framework does not use driver model. Does this imply I cannot use
> > > any usb gadget functionality if I am using USB DM? However the function
> > > usb_gadget_register_driver in ci_udc.c does have a CONFIG_DM_USB and
> > > calls into usb_setup_ehci_gadget which is in usb-uclass.c.

@Lukasz
Can you comment?

Regards,
Sanchayan.

> > > 
> > > Regards,
> > > Sanchayan.
> > > ---
> > >  drivers/usb/host/ehci-vf.c | 123 
> > > ++---
> > >  1 file changed, 117 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
> > > index 61789dd..8c5c593 100644
> > > --- a/drivers/usb/host/ehci-vf.c
> > > +++ b/drivers/usb/host/ehci-vf.c
> > > @@ -8,6 +8,7 @@
> > >   */
> > >  
> > >  #include 
> > > +#include 
> > >  #include 
> > >  #include 
> > >  #include 
> > > @@ -131,6 +132,24 @@ int __weak board_ehci_hcd_init(int port)
> > >   return 0;
> > >  }
> > >  
> > > +int ehci_vf_common_init(struct 

Re: [U-Boot] [PATCH v2] warp7: Modify fdt_file environment variable

[Fabio Estevam]

On Mon, Aug 8, 2016 at 9:57 AM, Breno Lima  wrote:
> Use imx7s-warp.dts as fdt_file because this is the name that upstream
> kernel will deploy.
>
> Signed-off-by: Breno Lima 

Thanks for the fix:

Acked-by: Fabio Estevam 
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[U-Boot] [PATCH v2] warp7: Modify fdt_file environment variable

[Breno Lima]

Use imx7s-warp.dts as fdt_file because this is the name that upstream
kernel will deploy.

Signed-off-by: Breno Lima 
---
Changes since v1:
- Remove 1/2 from the Subject

 include/configs/warp7.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index e59b16c..91009a8 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -39,7 +39,7 @@
"console=ttymxc0\0" \
"fdt_high=0x\0" \
"initrd_high=0x\0" \
-   "fdt_file=imx7d-warp.dtb\0" \
+   "fdt_file=imx7s-warp.dtb\0" \
"fdt_addr=0x8300\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
-- 
2.7.4

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Re: [U-Boot] [PATCH] cmd: dfu: Add error handling for failed registration

[Lukasz Majewski]

Hi Sanchayan,

> Without this, if g_dnl_register() fails, DFU code continues on
> blindly and crashes. This fix makes it simply print an error
> message instead.
> 
> Signed-off-by: Sanchayan Maity 
> ---
>  cmd/dfu.c | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/cmd/dfu.c b/cmd/dfu.c
> index d8aae26..e19d69c 100644
> --- a/cmd/dfu.c
> +++ b/cmd/dfu.c
> @@ -54,7 +54,12 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int
> argc, char * const argv[]) int controller_index =
> simple_strtoul(usb_controller, NULL, 0);
> board_usb_init(controller_index, USB_INIT_DEVICE);
> g_dnl_clear_detach();
> - g_dnl_register("usb_dnl_dfu");
> + ret = g_dnl_register("usb_dnl_dfu");
> + if (ret) {
> + error("g_dnl_register failed");
> + return CMD_RET_FAILURE;
> + }
> +
>   while (1) {
>   if (g_dnl_detach()) {
>   /*

Thanks for spotting, indeed there wasn't return code checking.

Acked-by: Lukasz Majewski 

I will add this to u-boot-dfu tree.

-- 
Best regards,

Lukasz Majewski

Samsung R Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH] cmd: dfu: Add error handling for failed registration

[Sanchayan Maity]

Without this, if g_dnl_register() fails, DFU code continues on
blindly and crashes. This fix makes it simply print an error
message instead.

Signed-off-by: Sanchayan Maity 
---
 cmd/dfu.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/cmd/dfu.c b/cmd/dfu.c
index d8aae26..e19d69c 100644
--- a/cmd/dfu.c
+++ b/cmd/dfu.c
@@ -54,7 +54,12 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
int controller_index = simple_strtoul(usb_controller, NULL, 0);
board_usb_init(controller_index, USB_INIT_DEVICE);
g_dnl_clear_detach();
-   g_dnl_register("usb_dnl_dfu");
+   ret = g_dnl_register("usb_dnl_dfu");
+   if (ret) {
+   error("g_dnl_register failed");
+   return CMD_RET_FAILURE;
+   }
+
while (1) {
if (g_dnl_detach()) {
/*
-- 
2.9.2

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Re: [U-Boot] [PATCH] net: e1000: Allow to use e1000 SPI command with DM

[Yaroslav K.]

Hi Joe.

You should probably just take Alban's patch. I don't care
about my SOB.

-- 
Yaroslav
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Re: [U-Boot] [PATCH] Bug in cbfs

[Yaroslav K.]

Hi Bin.

Could you please create proper patch yourself? The changes are trivial
anyway, so it doesn't matter who author is.

-- 
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Re: [U-Boot] [PATCH v7] dm: at91: Add driver model support for the spi driver

[Wenyou.Yang]

Hi Jagan,

> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: 2016年8月6日 21:00
> To: Wenyou Yang 
> Cc: U-Boot Mailing List 
> Subject: Re: [U-Boot] [PATCH v7] dm: at91: Add driver model support for the 
> spi
> driver
> 
> On 31 July 2016 at 17:05, Jagan Teki  wrote:
> > On 29 July 2016 at 06:08, Wenyou Yang  wrote:
> >> Add driver model support while retaining the existing legacy code.
> >> This allows the driver to support boards that have converted to
> >> driver model as well as those that have not.
> 
> Need some info - how many boards still pending to use this driver to use it 
> in dm?

For now, only sama5d2_xplained has used this drive in dm, other boards with 
AT91 SoC has not used dm driver,
such as at91sam9g20ek, at91sam9x5ek, at91sam9m10g45ek, sama5d3xek. sama5d4ek, 



Best Regards,
Wenyou Yang
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[U-Boot] [PATCH 0/2] at91: video: add driver for Atmel HLCD controller

[Songjun Wu]

The i2c driver includes two parts.
1) Driver code to implement the HLCD function.
2) Device tree binding documentation, it describes how to add
   the HLCD in device tree.


Songjun Wu (2):
  at91: video: Support driver-model for the HLCD driver
  at91: video: DT binding for HLCDC driver

 doc/device-tree-bindings/video/atme-hlcdc.txt |  38 +++
 drivers/video/Kconfig |   7 +
 drivers/video/Makefile|   2 +-
 drivers/video/atmel_hlcdfb.c  | 330 +-
 4 files changed, 373 insertions(+), 4 deletions(-)
 create mode 100644 doc/device-tree-bindings/video/atme-hlcdc.txt

-- 
2.7.4

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[U-Boot] [PATCH 1/2] at91: video: Support driver-model for the HLCD driver

[Songjun Wu]

Add driver-model support to this driver.

Signed-off-by: Songjun Wu 
---

 drivers/video/Kconfig|   7 +
 drivers/video/Makefile   |   2 +-
 drivers/video/atmel_hlcdfb.c | 330 ++-
 3 files changed, 335 insertions(+), 4 deletions(-)

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 8361a71..c40b2cf 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -362,6 +362,13 @@ config DISPLAY
   The devices provide a simple interface to start up the display,
   read display information and enable it.
 
+config VIDEO_ATMEL_HLCD
+   bool "Enable ATMEL video support using HLCDC"
+   depends on DM_VIDEO
+   help
+  Only the LCD is supported in U-Boot. This option enables this support
+  which can be used on devices which have an LCD display connected.
+
 config VIDEO_BROADWELL_IGD
bool "Enable Intel Broadwell integrated graphics device"
depends on X86
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 3f045fe..3d54cf9 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -22,7 +22,6 @@ endif
 obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o
 
 obj-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
-obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
 obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
 obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
 obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
@@ -35,6 +34,7 @@ obj-$(CONFIG_S6E8AX0) += s6e8ax0.o
 obj-$(CONFIG_S6E63D6) += s6e63d6.o
 obj-$(CONFIG_LD9040) += ld9040.o
 obj-$(CONFIG_SED156X) += sed156x.o
+obj-$(CONFIG_VIDEO_ATMEL_HLCD) += atmel_hlcdfb.o
 obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
 obj-$(CONFIG_VIDEO_COREBOOT) += coreboot_fb.o
 obj-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c
index 960b474..1334330 100644
--- a/drivers/video/atmel_hlcdfb.c
+++ b/drivers/video/atmel_hlcdfb.c
@@ -10,13 +10,24 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 #include 
+#include 
 #include 
 
 #if defined(CONFIG_LCD_LOGO)
 #include 
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
+#define lcdc_readl(reg)__raw_readl((reg))
+#define lcdc_writel(reg, val)  __raw_writel((val), (reg))
+
+#ifndef CONFIG_DM_VIDEO
+
 /* configurable parameters */
 #define ATMEL_LCDC_CVAL_DEFAULT0xc8
 #define ATMEL_LCDC_DMA_BURST_LEN   8
@@ -26,9 +37,6 @@
 
 #define ATMEL_LCDC_FIFO_SIZE   512
 
-#define lcdc_readl(reg)__raw_readl((reg))
-#define lcdc_writel(reg, val)  __raw_writel((val), (reg))
-
 /*
  * the CLUT register map as following
  * RCLUT(24 ~ 16), GCLUT(15 ~ 8), BCLUT(7 ~ 0)
@@ -218,3 +226,319 @@ void lcd_ctrl_init(void *lcdbase)
/* Enable flushing if we enabled dcache */
lcd_set_flush_dcache(1);
 }
+
+#else
+
+enum {
+   LCD_MAX_WIDTH   = 1024,
+   LCD_MAX_HEIGHT  = 768,
+   LCD_MAX_LOG2_BPP= VIDEO_BPP16,
+};
+
+struct atmel_hlcdc_priv {
+   struct atmel_hlcd_regs *regs;
+   struct display_timing timing;
+   unsigned int vl_bpix;
+   unsigned int guard_time;
+   ulong clk_rate;
+};
+
+static int at91_hlcdc_enable_clk(struct udevice *dev)
+{
+   struct atmel_hlcdc_priv *priv = dev_get_priv(dev);
+   struct udevice *dev_clk;
+   struct clk clk;
+   ulong clk_rate;
+   int periph;
+   int ret;
+
+   ret = clk_get_by_index(dev, 0, );
+   if (ret)
+   return -EINVAL;
+
+   periph = fdtdec_get_uint(gd->fdt_blob, clk.dev->of_offset, "reg", -1);
+   if (periph < 0)
+   return -EINVAL;
+
+   dev_clk = dev_get_parent(clk.dev);
+   ret = clk_request(dev_clk, );
+   if (ret)
+   return ret;
+
+   clk.id = periph;
+   ret = clk_enable();
+   if (ret)
+   return ret;
+
+   ret = clk_get_by_index(dev_clk, 0, );
+   if (ret)
+   return ret;
+
+   clk_rate = clk_get_rate();
+   if (!clk_rate)
+   return -ENODEV;
+
+   priv->clk_rate = clk_rate;
+
+   clk_free();
+
+   return 0;
+}
+
+static void atmel_hlcdc_init(struct udevice *dev)
+{
+   struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
+   struct atmel_hlcdc_priv *priv = dev_get_priv(dev);
+   struct atmel_hlcd_regs *regs = priv->regs;
+   struct display_timing *timing = >timing;
+   struct lcd_dma_desc *desc;
+   unsigned long value, vl_clk_pol;
+
+   /* Disable DISP signal */
+   lcdc_writel(>lcdc_lcddis, LCDC_LCDDIS_DISPDIS);
+   while ((lcdc_readl(>lcdc_lcdsr) & LCDC_LCDSR_DISPSTS))
+   udelay(1);
+   /* Disable synchronization */
+   lcdc_writel(>lcdc_lcddis, LCDC_LCDDIS_SYNCDIS);
+   while ((lcdc_readl(>lcdc_lcdsr) & LCDC_LCDSR_LCDSTS))
+   udelay(1);
+   /* Disable pixel clock */
+   

[U-Boot] [PATCH 2/2] at91: video: DT binding for HLCDC driver

[Songjun Wu]

DT binding documentation for atmel HLCDC driver.

Signed-off-by: Songjun Wu 
---

 doc/device-tree-bindings/video/atme-hlcdc.txt | 38 +++
 1 file changed, 38 insertions(+)
 create mode 100644 doc/device-tree-bindings/video/atme-hlcdc.txt

diff --git a/doc/device-tree-bindings/video/atme-hlcdc.txt 
b/doc/device-tree-bindings/video/atme-hlcdc.txt
new file mode 100644
index 000..aac0b84
--- /dev/null
+++ b/doc/device-tree-bindings/video/atme-hlcdc.txt
@@ -0,0 +1,38 @@
+Atmel HLCDC Framebuffer
+-
+Required properties:
+- compatible :
+   "atmel,sama5d2-hlcdc".
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- clocks: phandles to input clocks.
+- atmel,vl-bpix: Bits per pixel.
+- atmel,guard-time: lcd guard time (Delay in frame periods).
+- display-timings: please refer the displaymode.txt.
+
+Example:
+hlcdc: hlcdc@f000 {
+   u-boot,dm-pre-reloc;
+   compatible = "atmel,sama5d2-hlcdc";
+   reg = <0xf000 0x2000>;
+   clocks = <_clk>;
+   atmel,vl-bpix = <4>;
+   atmel,guard-time = <1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_lcd_base _lcd_pwm _lcd_rgb666>;
+   status = "okay";
+
+   display-timings {
+   480x272 {
+   clock-frequency = <900>;
+   hactive = <480>;
+   vactive = <272>;
+   hsync-len = <41>;
+   hfront-porch = <2>;
+   hback-porch = <2>;
+   vfront-porch = <2>;
+   vback-porch = <2>;
+   vsync-len = <11>;
+   };
+   };
+};
\ No newline at end of file
-- 
2.7.4

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Re: [U-Boot] [PATCH] net: e1000: Allow to use e1000 SPI command with DM

[Alban Bedel]

On Thu, 4 Aug 2016 11:39:49 -0500
Joe Hershberger  wrote:

> On Tue, Aug 2, 2016 at 9:42 PM, Yaroslav K.  wrote:
> > Fix compile errors when enabling CONFIG_DM_ETH,
> > CONFIG_CMD_E1000 and CONFIG_E1000_SPI.
> >
> > Signed-off-by: Yaroslav K. 
> 
> Something about this patch email is malformed and not parsed by
> patchwork properly.
> 
> Another patch with the same intent was also sent just after this one:
> https://patchwork.ozlabs.org/patch/655311/
> 
> With permission of you and Alban Bedel I'll add both of your SOB to
> Alban's patch.

Please do.

Alban


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Re: [U-Boot] [PATCH v1 1/4] usb: host: ehci-vf: Migrate Vybrid USB to driver model

[maitysanchayan]

Hello Stefan,

On 16-08-08 00:25:16, Stefan Agner wrote:
> On 2016-08-07 23:15, maitysancha...@gmail.com wrote:
> > Hello,
> > 
> > On 16-08-03 17:13:11, Marek Vasut wrote:
> >> On 08/03/2016 01:58 PM, Sanchayan Maity wrote:
> >> > Add driver model support for Vybrid USB driver.
> >> >
> >> > Signed-off-by: Sanchayan Maity 
> >>
> >> CCing Lukasz.
> >>
> >> > ---
> >> > Hello,
> >> >
> >> > I am trying to migrate the Vybrid USB driver to driver model.
> >> > Patches are based on top of uboot master branch. With this
> >> > implementation, host works perfectly fine on both USB ports
> >> > but I have problems using it in client mode.
> >> >
> >> > I tried DFU to test client mode and I get the following
> >> >
> >> > Colibri VFxx # version
> >> >
> >> > U-Boot 2016.09-rc1-00235-g4e8c122 (Aug 03 2016 - 17:07:48 +0530)
> >> > arm-linux-gnueabihf-gcc (Linaro GCC 5.2-2015.11-2) 5.2.1 20151005
> >> > GNU ld (GNU Binutils) 2.25.0 Linaro 2015_10
> >> > Colibri VFxx # dfu 0 nand 4
> >> > using id 'nand0,0'
> >> > using id 'nand0,1'
> >> > using id 'nand0,3'
> >> > g_dnl_register: failed!, error: -19
> >> > data abort
> >> > pc : [<8ff80f18>]  lr : [<8ff612a9>]
> >> > reloc pc : [<3f431f18>]lr : [<3f4122a9>]
> >> > sp : 8fd15000  ip :  fp : 2710
> >> > r10: 8ffb50cc  r9 : 8fd16ee8 r8 : 8ffbc574
> >> > r7 :   r6 :  r5 :   r4 : 
> >> > r3 : f4b9  r2 : 8000 r1 : 0001  r0 : 
> >> > Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
> >> > Resetting CPU ...
> >> >
> >> > resetting ...
> > 
> > FWIW here is output with DEBUG enabled in uclass.c
> > 
> > when testing with DFU:
> > 
> > uclass_find_device_by_seq: 1 0
> >- -1 -1
> >- -1 -1
> >- not found
> > g_dnl_register: failed!, error: -19
> 
> Hm, I guess this comes from usb_setup_ehci_gadget called through
> usb_gadget_register_driver. The call in there seems rather hardcoded:

Yes it comes from that function.

> 
> ret = uclass_find_device_by_seq(UCLASS_USB, 0, true, );
> (seq = 0, and find_req_seq=true, maybe find_req_seq=false helps? Maybe
> it is because we use the second USB DR controller for OTG?)

I have already tried using that value along with what I see during
use as USB host.

While eventually the second USB controller is to be used as OTG for
us, the point of failure is even before the device_probe call in
usb_setup_ehci_gadget. Also before the device probe call the plat->
init_type is set to USB_DEVICE and I have not yet added the type
check in usb_probe function akin to the non DM case in ehci_hcd_init
which takes care of OTG handling.

Something related to sequence numbers and uclass device. I tried
DM_UC_FLAG_SEQ_ALIAS but that seems to be specified for UCLASS USB
anyways.

Regards,
Sanchayan,

> 
> 
> > data abort
> > pc : [<8ff80fb0>]  lr : [<8ff612a9>]
> > reloc pc : [<3f431fb0>]lr : [<3f4122a9>]
> > sp : 8fd15000  ip :  fp : 2710
> > r10: 8ffb5274  r9 : 8fd16ee8 r8 : 8ffbc714
> > r7 :   r6 :  r5 :   r4 : 
> > r3 : f4b9  r2 : 8000 r1 : 0001  r0 : 
> > Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
> > Resetting CPU ...
> 
> I guess that comes from cmd/dfu.c not handling the error code of
> g_dnl_register...
> 
> --
> Stefan
> 
> > 
> > resetting ...
> > 
> > When testing host mode with usb start
> > 
> > Colibri VFxx # usb start
> > starting USB...
> > USB0:   uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 -1
> >- -1 -1
> >- not found
> > USB EHCI 1.00
> > USB1:   uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 0
> >- found
> > uclass_find_device_by_seq: 0 1
> >- -1 0
> >- -1 1
> >- found
> > uclass_find_device_by_seq: 0 2
> >- -1 0
> >- -1 1
> >- -1 -1
> >- not found
> > uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 0
> >- found
> > uclass_find_device_by_seq: 0 1
> >- -1 0
> >- -1 -1
> >- not found
> > USB EHCI 1.00
> > scanning bus 0 for devices... uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 -1
> >- not found
> > uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 -1
> >- not found
> > 2 USB Device(s) found
> > scanning bus 1 for devices... uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 0
> >- found
> > uclass_find_device_by_seq: 0 1
> >- -1 0
> >- -1 -1
> >- not found
> > uclass_find_device_by_seq: 0 -1
> > uclass_find_device_by_seq: 0 0
> >- -1 0
> >- found
> > uclass_find_device_by_seq: 0 1
> >- -1 0
> >- -1 1
> >- found
> > uclass_find_device_by_seq: 0 2
> >- -1 0
> >- -1 1
> >- -1 -1
> >- not found
> > 2 USB Device(s) found
> > 
> > Regards,
> > Sanchayan.
> > 
> >> >
> >> > It seems to return ENODEV from usb_setup_ehci_gadget after 

[U-Boot] [PATCH 1/2] armv8: fsl-lsch2: adjust sata parameter

[yuantian.tang]

From: Tang Yuantian 

The default values for Port Phy2Cfg register and
Port Phy3Cfg register are better, no need to overwrite them.

Signed-off-by: Tang Yuantian 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c| 2 --
 arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 --
 2 files changed, 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index f62b78d..6333122 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -223,8 +223,6 @@ int sata_init(void)
struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
 
out_le32(_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
-   out_le32(_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
-   out_le32(_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
out_le32(_ahci->ptc, AHCI_PORT_TRANS_CFG);
 
ahci_init((void __iomem *)CONFIG_SYS_SATA);
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h 
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 8d4a7ad..d5fe0ce 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -60,8 +60,6 @@ struct cpu_type {
 
 /* ahci port register default value */
 #define AHCI_PORT_PHY_1_CFG0xa003fffe
-#define AHCI_PORT_PHY_2_CFG0x28184d1f
-#define AHCI_PORT_PHY_3_CFG0x0e081509
 #define AHCI_PORT_TRANS_CFG0x0829
 
 /* AHCI (sata) register map */
-- 
2.1.0.27.g96db324

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Re: [U-Boot] [PATCH v4] arm: cache: always flush cache line size for page table

[Stefan Agner]

On 2016-08-07 23:10, Lokesh Vutla wrote:
> Hi,
> 
> On Sunday 07 August 2016 11:13 PM, Stefan Agner wrote:
>> From: Stefan Agner 
>>
>> The page table is maintained by the CPU, hence it is safe to always
>> align cache flush to a whole cache line size. This allows to use
>> mmu_page_table_flush for a single page table, e.g. when configure
>> only small regions through mmu_set_region_dcache_behaviour.
>>
>> Signed-off-by: Stefan Agner 
>> Tested-by: Fabio Estevam 
>> Reviewed-by: Simon Glass 
>> ---
> 
> I get the following warning when CONFIG_PHYS_64BIT is enabled on arm
> platforms(dra7xx_evm_defconfig):

Hm, do I see things right, this is otherwise a 32-bit architecture? Does
that work without LPAE? What is the page table size in this case?

> 
> arch/arm/lib/cache-cp15.c: In function 'mmu_set_region_dcache_behaviour':
> arch/arm/lib/cache-cp15.c:80:12: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   startpt = (phys_addr_t)_table[start];
> ^

Hm, maybe we should keep using unsigned long then inside this function.
Added Thierry to CC since he introduced phys_addr_t to the function
signature.

--
Stefan

> arch/arm/lib/cache-cp15.c:82:11: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   stoppt = (phys_addr_t)_table[end];
>^
> arch/arm/lib/cache-cp15.c: In function 'mmu_set_region_dcache_behaviour':
> arch/arm/lib/cache-cp15.c:80:12: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   startpt = (phys_addr_t)_table[start];
> ^
> arch/arm/lib/cache-cp15.c:82:11: warning: cast from pointer to integer
> of different size [-Wpointer-to-int-cast]
>   stoppt = (phys_addr_t)_table[end];
> 
> Thanks and regards,
> Lokesh
> 
>>
>> Changes in v4:
>> - Fixed spelling misstake for real
>>
>> Changes in v3:
>> - Fixed spelling misstake
>>
>> Changes in v2:
>> - Move cache line alignment from mmu_page_table_flush to
>>   mmu_set_region_dcache_behaviour
>>
>>  arch/arm/lib/cache-cp15.c | 13 -
>>  1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
>> index 1121dc3..488094e 100644
>> --- a/arch/arm/lib/cache-cp15.c
>> +++ b/arch/arm/lib/cache-cp15.c
>> @@ -62,6 +62,7 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, 
>> size_t size,
>>   enum dcache_option option)
>>  {
>>  u32 *page_table = (u32 *)gd->arch.tlb_addr;
>> +phys_addr_t startpt, stoppt;
>>  unsigned long upto, end;
>>
>>  end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
>> @@ -70,7 +71,17 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, 
>> size_t size,
>>option);
>>  for (upto = start; upto < end; upto++)
>>  set_section_dcache(upto, option);
>> -mmu_page_table_flush((u32)_table[start], (u32)_table[end]);
>> +
>> +/*
>> + * Make sure range is cache line aligned
>> + * Only CPU maintains page tables, hence it is safe to always
>> + * flush complete cache lines...
>> + */
>> +startpt = (phys_addr_t)_table[start];
>> +startpt &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
>> +stoppt = (phys_addr_t)_table[end];
>> +stoppt = ALIGN(stoppt, CONFIG_SYS_CACHELINE_SIZE);
>> +mmu_page_table_flush(startpt, stoppt);
>>  }
>>
>>  __weak void dram_bank_mmu_setup(int bank)
>>
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[U-Boot] [PATCH 2/2] armv8: fsl-lsch2: enable snoopable sata read and write

[yuantian.tang]

From: Tang Yuantian 

By default the SATA IP on the ls1043a/ls1046a SoCs does not generating
coherent/snoopable transactions.  This patch enable it in the SCFG_SNPCNFGCR
register along with sata axicc register.
In addition, the dma-coherent property must be set on the SATA controller
nodes.

Signed-off-by: Tang Yuantian 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c| 5 -
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++
 arch/arm/include/asm/arch-fsl-layerscape/soc.h | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 6333122..fe13782 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -224,6 +224,7 @@ int sata_init(void)
 
out_le32(_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
out_le32(_ahci->ptc, AHCI_PORT_TRANS_CFG);
+   out_le32(_ahci->axicc, AHCI_PORT_AXICC_CFG);
 
ahci_init((void __iomem *)CONFIG_SYS_SATA);
scsi_scan(0);
@@ -310,7 +311,9 @@ void fsl_lsch2_early_init_f(void)
 #endif
/* Make SEC reads and writes snoopable */
setbits_be32(>snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
-SCFG_SNPCNFGCR_SECWRSNP);
+SCFG_SNPCNFGCR_SECWRSNP |
+SCFG_SNPCNFGCR_SATARDSNP |
+SCFG_SNPCNFGCR_SATAWRSNP);
 
/*
 * Enable snoop requests and DVM message requests for
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 95a4293..2d307cc 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -335,6 +335,8 @@ struct ccsr_gur {
 
 #define SCFG_SNPCNFGCR_SECRDSNP0x8000
 #define SCFG_SNPCNFGCR_SECWRSNP0x4000
+#define SCFG_SNPCNFGCR_SATARDSNP   0x0080
+#define SCFG_SNPCNFGCR_SATAWRSNP   0x0040
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h 
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index d5fe0ce..f29fd9f 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -61,6 +61,7 @@ struct cpu_type {
 /* ahci port register default value */
 #define AHCI_PORT_PHY_1_CFG0xa003fffe
 #define AHCI_PORT_TRANS_CFG0x0829
+#define AHCI_PORT_AXICC_CFG0x3fff
 
 /* AHCI (sata) register map */
 struct ccsr_ahci {
-- 
2.1.0.27.g96db324

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Re: [U-Boot] [PATCH v1 1/4] usb: host: ehci-vf: Migrate Vybrid USB to driver model

[Stefan Agner]

On 2016-08-07 23:15, maitysancha...@gmail.com wrote:
> Hello,
> 
> On 16-08-03 17:13:11, Marek Vasut wrote:
>> On 08/03/2016 01:58 PM, Sanchayan Maity wrote:
>> > Add driver model support for Vybrid USB driver.
>> >
>> > Signed-off-by: Sanchayan Maity 
>>
>> CCing Lukasz.
>>
>> > ---
>> > Hello,
>> >
>> > I am trying to migrate the Vybrid USB driver to driver model.
>> > Patches are based on top of uboot master branch. With this
>> > implementation, host works perfectly fine on both USB ports
>> > but I have problems using it in client mode.
>> >
>> > I tried DFU to test client mode and I get the following
>> >
>> > Colibri VFxx # version
>> >
>> > U-Boot 2016.09-rc1-00235-g4e8c122 (Aug 03 2016 - 17:07:48 +0530)
>> > arm-linux-gnueabihf-gcc (Linaro GCC 5.2-2015.11-2) 5.2.1 20151005
>> > GNU ld (GNU Binutils) 2.25.0 Linaro 2015_10
>> > Colibri VFxx # dfu 0 nand 4
>> > using id 'nand0,0'
>> > using id 'nand0,1'
>> > using id 'nand0,3'
>> > g_dnl_register: failed!, error: -19
>> > data abort
>> > pc : [<8ff80f18>]  lr : [<8ff612a9>]
>> > reloc pc : [<3f431f18>]lr : [<3f4122a9>]
>> > sp : 8fd15000  ip :  fp : 2710
>> > r10: 8ffb50cc  r9 : 8fd16ee8 r8 : 8ffbc574
>> > r7 :   r6 :  r5 :   r4 : 
>> > r3 : f4b9  r2 : 8000 r1 : 0001  r0 : 
>> > Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
>> > Resetting CPU ...
>> >
>> > resetting ...
> 
> FWIW here is output with DEBUG enabled in uclass.c
> 
> when testing with DFU:
> 
> uclass_find_device_by_seq: 1 0
>- -1 -1
>- -1 -1
>- not found
> g_dnl_register: failed!, error: -19

Hm, I guess this comes from usb_setup_ehci_gadget called through
usb_gadget_register_driver. The call in there seems rather hardcoded:

ret = uclass_find_device_by_seq(UCLASS_USB, 0, true, );
(seq = 0, and find_req_seq=true, maybe find_req_seq=false helps? Maybe
it is because we use the second USB DR controller for OTG?)


> data abort
> pc : [<8ff80fb0>]  lr : [<8ff612a9>]
> reloc pc : [<3f431fb0>]lr : [<3f4122a9>]
> sp : 8fd15000  ip :  fp : 2710
> r10: 8ffb5274  r9 : 8fd16ee8 r8 : 8ffbc714
> r7 :   r6 :  r5 :   r4 : 
> r3 : f4b9  r2 : 8000 r1 : 0001  r0 : 
> Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
> Resetting CPU ...

I guess that comes from cmd/dfu.c not handling the error code of
g_dnl_register...

--
Stefan

> 
> resetting ...
> 
> When testing host mode with usb start
> 
> Colibri VFxx # usb start
> starting USB...
> USB0:   uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 -1
>- -1 -1
>- not found
> USB EHCI 1.00
> USB1:   uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 0
>- found
> uclass_find_device_by_seq: 0 1
>- -1 0
>- -1 1
>- found
> uclass_find_device_by_seq: 0 2
>- -1 0
>- -1 1
>- -1 -1
>- not found
> uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 0
>- found
> uclass_find_device_by_seq: 0 1
>- -1 0
>- -1 -1
>- not found
> USB EHCI 1.00
> scanning bus 0 for devices... uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 -1
>- not found
> uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 -1
>- not found
> 2 USB Device(s) found
> scanning bus 1 for devices... uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 0
>- found
> uclass_find_device_by_seq: 0 1
>- -1 0
>- -1 -1
>- not found
> uclass_find_device_by_seq: 0 -1
> uclass_find_device_by_seq: 0 0
>- -1 0
>- found
> uclass_find_device_by_seq: 0 1
>- -1 0
>- -1 1
>- found
> uclass_find_device_by_seq: 0 2
>- -1 0
>- -1 1
>- -1 -1
>- not found
> 2 USB Device(s) found
> 
> Regards,
> Sanchayan.
> 
>> >
>> > It seems to return ENODEV from usb_setup_ehci_gadget after calling
>> > uclass_find_device_by_seq. I am not sure what I am missing in the
>> > current implementation. Can someone point me in the correct direction?
>> > Since host works on both ports I would assume the device tree nodes
>> > are correct.
>> >
>> > Tried to look in documentation and usb-info.txt mentions that gadget
>> > framework does not use driver model. Does this imply I cannot use
>> > any usb gadget functionality if I am using USB DM? However the function
>> > usb_gadget_register_driver in ci_udc.c does have a CONFIG_DM_USB and
>> > calls into usb_setup_ehci_gadget which is in usb-uclass.c.
>> >
>> > Regards,
>> > Sanchayan.
>> > ---
>> >  drivers/usb/host/ehci-vf.c | 123 
>> > ++---
>> >  1 file changed, 117 insertions(+), 6 deletions(-)
>> >
>> > diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
>> > index 61789dd..8c5c593 100644
>> > --- a/drivers/usb/host/ehci-vf.c
>> > +++ b/drivers/usb/host/ehci-vf.c
>> > @@ -8,6 +8,7 

Re: [U-Boot] [U-Boot, 1/3] mmc: fsl: reset to normal boot mode when eMMC fast boot

[Jaehoon Chung]

On 08/08/2016 01:31 PM, Peng Fan wrote:
> Hi Jaehoon,
> On Thu, Aug 04, 2016 at 02:32:16PM +0900, Jaehoon Chung wrote:
>> Hi Peng,
>>
>> On 04/26/2016 03:54 PM, Peng Fan wrote:
>>> When booting in eMMC fast boot, MMC host does not exit from
>>> boot mode after bootrom loading image. So the first command
>>> 'CMD0' sent in uboot will pull down the CMD line to low and
>>> cause errors.
>>>
>>> This patch cleans the MMC boot register in "mmc_init" to put the
>>> MMC host back to normal mode.
>>
>> Could you resend the patch-set [1/3 - 3/3] on latest u-boot?
>> After that, I will check..
> 
> This patch set already merged through York's tree.

Thanks for noticing!

Best Regards,
Jaehoon Chung

> 
> Thanks,
> Peng.
> 
>>
>> Best Regards,
>> Jaehoon Chung
>>
>>>
>>> Also clear DLL_CTRL delay line settings at USDHC initialization
>>> to eliminate the pre-settings from boot rom.
>>>
>>> Signed-off-by: Peng Fan 
>>> Cc: Pantelis Antoniou 
>>> Cc: York Sun 
>>> Cc: Stefano Babic 
>>> ---
>>>  drivers/mmc/fsl_esdhc.c | 38 +-
>>>  include/fsl_esdhc.h |  6 ++
>>>  2 files changed, 35 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>>> index 65ecff5..15cd419 100644
>>> --- a/drivers/mmc/fsl_esdhc.c
>>> +++ b/drivers/mmc/fsl_esdhc.c
>>> @@ -57,21 +57,27 @@ struct fsl_esdhc {
>>> uintfevt;   /* Force event register */
>>> uintadmaes; /* ADMA error status register */
>>> uintadsaddr;/* ADMA system address register */
>>> -   charreserved2[100]; /* reserved */
>>> -   uintvendorspec; /* Vendor Specific register */
>>> -   charreserved3[56];  /* reserved */
>>> +   charreserved2[4];
>>> +   uintdllctrl;
>>> +   uintdllstat;
>>> +   uintclktunectrlstatus;
>>> +   charreserved3[84];
>>> +   uintvendorspec;
>>> +   uintmmcboot;
>>> +   uintvendorspec2;
>>> +   charreserved4[48];
>>> uinthostver;/* Host controller version register */
>>> -   charreserved4[4];   /* reserved */
>>> -   uintdmaerraddr; /* DMA error address register */
>>> charreserved5[4];   /* reserved */
>>> -   uintdmaerrattr; /* DMA error attribute register */
>>> +   uintdmaerraddr; /* DMA error address register */
>>> charreserved6[4];   /* reserved */
>>> +   uintdmaerrattr; /* DMA error attribute register */
>>> +   charreserved7[4];   /* reserved */
>>> uinthostcapblt2;/* Host controller capabilities register 2 */
>>> -   charreserved7[8];   /* reserved */
>>> +   charreserved8[8];   /* reserved */
>>> uinttcr;/* Tuning control register */
>>> -   charreserved8[28];  /* reserved */
>>> +   charreserved9[28];  /* reserved */
>>> uintsddirctl;   /* SD direction control register */
>>> -   charreserved9[712]; /* reserved */
>>> +   charreserved10[712];/* reserved */
>>> uintscr;/* eSDHC control register */
>>>  };
>>>  
>>> @@ -618,6 +624,20 @@ static int esdhc_init(struct mmc *mmc)
>>> while ((esdhc_read32(>sysctl) & SYSCTL_RSTA) && --timeout)
>>> udelay(1000);
>>>  
>>> +#if defined(CONFIG_FSL_USDHC)
>>> +   /* RSTA doesn't reset MMC_BOOT register, so manually reset it */
>>> +   esdhc_write32(>mmcboot, 0x0);
>>> +   /* Reset MIX_CTRL and CLK_TUNE_CTRL_STATUS regs to 0 */
>>> +   esdhc_write32(>mixctrl, 0x0);
>>> +   esdhc_write32(>clktunectrlstatus, 0x0);
>>> +
>>> +   /* Put VEND_SPEC to default value */
>>> +   esdhc_write32(>vendorspec, VENDORSPEC_INIT);
>>> +
>>> +   /* Disable DLL_CTRL delay line */
>>> +   esdhc_write32(>dllctrl, 0x0);
>>> +#endif
>>> +
>>>  #ifndef ARCH_MXC
>>> /* Enable cache snooping */
>>> esdhc_write32(>scr, 0x0040);
>>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>>> index fa760a5..78c67c8 100644
>>> --- a/include/fsl_esdhc.h
>>> +++ b/include/fsl_esdhc.h
>>> @@ -35,6 +35,12 @@
>>>  #define SYSCTL_RSTC0x0200
>>>  #define SYSCTL_RSTD0x0400
>>>  
>>> +#define VENDORSPEC_CKEN0x4000
>>> +#define VENDORSPEC_PEREN   0x2000
>>> +#define VENDORSPEC_HCKEN   0x1000
>>> +#define VENDORSPEC_IPGEN   0x0800
>>> +#define VENDORSPEC_INIT0x20007809
>>> +
>>>  #define IRQSTAT0x0002e030
>>>  #define IRQSTAT_DMAE   (0x1000)
>>>  #define IRQSTAT_AC12E  (0x0100)
>>>
>>
> 
> 
> 

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Re: [U-Boot] Prospective contributer

[Jagan Teki]

On 8 August 2016 at 04:22, nilan chamara  wrote:
> Thanks Jegan, for the valuable information.
> I will read those first, and will submit to mailing list if there is any
> question.
>
> When you say driver-model, is it the same model where u-Boot device tree
> support?

No, driver-model is like a unified way of declaring or accessing
drivers in u-boot, not related to dt. In fact you can compare this
with Linux device/driver model but the u-boot one is homogeneous.

>> [2]
>> http://git.denx.de/?p=u-boot.git;a=tree;f=doc/driver-model;h=000983d1fe66a54d21c4b5cb766b52ed77c01ae5;hb=refs/heads/master

Just read this we can get more info.

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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