Re: [U-Boot] [PATCH v2 3/8] test/py: Import 'configparser' lower case to be python 3.x safe

[Michal Simek]

On 20.8.2018 23:19, Stephen Warren wrote:
> On 08/06/2018 04:42 AM, Michal Simek wrote:
>> On 14.9.2017 23:34, Paul Burton wrote:
>>> In python 3.x the configparser module is named with all lower case.
>>> Import it as such in order to avoid errors when running on python 3.x,
>>> and fall back to the CamelCase version in order to keep working with
>>> python 2.x.
> ...
>> I have bisect issue with test/py framework on my PC and I end up on this
>> patch.
>>
>> Below is the issue I am getting.
>>
>> And here are my python version.
>> [u-boot](test)$ python3 --version
>> Python 3.4.3
>> [u-boot](test)$ python --version
>> Python 2.7.6
>> [u-boot](test)$ which python
>> /usr/bin/python
>>
>>
>> Do you know what could be the issue?
> 
> I honestly can't think why the configuration parsing could cause the
> kind of issue that was shown in the test log. It seems like there's a
> bug in the test/py code w.r.t. receiving characters from the target
> outside the ASCII range, which should be applicable in all cases, but I
> can't see how that would only happen based on how configparser was
> imported.

hm. ok.

Thanks,
Michal
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Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Marek Vasut]

On 08/21/2018 06:56 AM, Bin Meng wrote:
[...]
> The proposal I made is:
>
> * Keep pci-uclass driver's post_bind() and child_post_bind() only for
> Sandbox configuration
> * Keep the call to pci_bus_find_devfn() in pci_bind_bus_devices() only
> for Sandbox configuration
> * Sandbox is special. We should limit the mechanism of matching PCI
> emulation device via "compatible" to sandbox only

 The above three points can be done separately and I don't care about
 this too much.

>>>
>>> That's my concern. Only doing this created confusing and incomplete
>>> design.
>>
>> Incomplete how ?
> 
> I explained several times. I have to repeat here once again:
> 
> Currently U-Boot supports two scenarios for PCI driver binding:
> 
> - Declare a PCI device in the device tree. That requires specifying a
> 'compatible' string as well as 'reg' property as defined by the 'PCI
> Bus Binding' spec. DM uses the 'compatible' string to bind the driver
> for the device.
> - Don't declare a PCI device in the device tree. Instead, using
> U_BOOT_PCI_DEVICE() to declare a device and driver mapping.
> 
> You are creating a 3rd scenario which is a mix up of both scenario#1
> and #2 in this patch, yet without any documentation, plus any
> additional changes to impacted drivers.

I am extending both, it's not a "third scenario".

I said in the previous discussion I am willing to update the
documentation to match the implementation, but that's about it.

> So far almost all PCI device drivers in U-Boot supports both
> scenarios, except PCI UART which currently only supports scenario#1.
> If you declare what you do in this patch is pureblood then you should
> revoke the other 2 at the same time. Leaving such in the mainstream
> only creates chaos in the future and we should avoid doing that, given
> we already had lots of discussion here.

No. The compatible is valid for some PCI subdevs, ie. bridges, so that
has to stay. You also need compatible for sandbox, you said that
yourself. And declaring a PCI device with BFD in DT is needed, ie. for
the r8a7794-style bindings.

So again, how is the state of PCI more incomplete with this patch than
without it ?

>>> Yes, you probably don't care about this. But I care about this
>>> as it impacts some other things like PCI uart driver which is used by
>>> some x86 boards.
>>
>> Sandbox changes impact PCI UART driver and x86 boards how ?
> 
> See above. It's not about sandbox!

So what is it about ? And how does this core change impact anything ?
Does it change behavior for some board or break some tests for you ?

> * Create DM PCI test case against the DT node assignment
> * Remove all compatible string in U-Boot's PCI device drivers: eg:
> ehci_pci_ids[], xhci_pci_ids[], etc. IOW, all PCI device drivers
> should only use U_BOOT_PCI_DEVICE(), aka the original U-Boot option 2
> * Fork a "pci-ns16550" driver to support U_BOOT_PCI_DEVICE(), as
> currently PCI ns16550 device driver uses "compatible" string to do the
> matching, and update crownbay.dts and galileo.dts (so far I only know
> two boards are using PCI ns16550 serial port)
> * Make sure all DM PCI test cases are not broken
> * Document all of the above changes in doc/driver-model/pci-info.txt

 I think you're just adding completely orthogonal stuff to this 5-liner
 patch into the list and overly complicate the situation. Sure, if you
 want to do all this, go ahead, but I don't see how this prevents this
 particular patch from being applied , except maybe for the documentation
 tweak.
>>>
>>> Please, think from the maintainer perspective. It's nothing related to
>>> number of LOCs. It's that we need create a clean design. You probably
>>> don't want someone just submits a single patch that changed current
>>> USB design without a full consideration on all possible impacts.
>>
>> OK, after reading all this, what I gather from the discussion is that
>> this patch somehow breaks the design or the other platforms, which is
>> why you fight against it so much. Does it, yes or no? And if so, you
>> still failed to explain how, so, how ?

You did not answer this question.

>> Improving sandbox and x86 PCI handling is orthogonal to this change, so
>> are ns16550 driver improvements and if you want to work on them, nothing
>> prevents you from doing so.
> 
> First of all, it's not x86 PCI handling. It's PCI device driver clean
> up to match the new design.

It is not a new design, just an extension of the current one.

Driver cleanups where you match on PCI IDs or classes instead of
compatible strings are completely orthogonal to this change, you don't
even need this patch to do such a cleanup. Same applies for the x86 DT
cleanup, you don't need this patch for those either.

So please stop lumping those together with this patch, they are unrelated.

> Second, doing such is necessary to make
> the design clean and complete.

No, doing so 

Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Bin Meng]

Hi Marek,

On Tue, Aug 21, 2018 at 12:30 PM, Marek Vasut  wrote:
> On 08/21/2018 06:15 AM, Bin Meng wrote:
> [...]
>
>>> From what I understand, Marek and Bin are discussing whether a
>>> compatible string is needed to bind a driver.
>>>
>>> Generally it is. But with PCI and USB we have a search mechanism which
>>> can be used instead.
>>>
>>> The patch Marek submitted does not seems at all desirable to me.
>>
>> Can you explain why ?
>
> We already have a compatible string as the standard way to attach
> drivers to devices.
>
> For PCI, we already have PCI_DEVICE() and friends for when we can
> attach a driver for a PCI device without using a compatible string.
>
> Both of these are defined in the DT specification.
>
> The patch seems to be a rework of PCI_DEVICE() and I cannot why it is 
> necessary.
>
>>
>>> I would like to see what Bin proposes.
>>
>> Me too, so far I only see "not Marek's patch" and no real alternative.
>
> Bin, do you have a patch you can share?

 No, I don't have any patch series for now, although I offered to work
 on a series to implement my proposal. I haven't started it as I wanted
 to hear your thoughts. The proposal I made is to satisfy the
 requirement that Marek insisted on. Basically Marek thought current DM
 PCI implementation is wrong to ask for a "compatible" string of a PCI
 device in the device tree, because he thought adding "compatible" to
 DT is invalid and Linux does not do that either. While I disagree we
 have to 100% follow Linux's implementation, I am still open for any
 possible design changes, if that's the preferable practice in U-Boot
 (but we have to make it clear and document this officially somewhere).

 The proposal I made is:

 * Keep pci-uclass driver's post_bind() and child_post_bind() only for
 Sandbox configuration
 * Keep the call to pci_bus_find_devfn() in pci_bind_bus_devices() only
 for Sandbox configuration
 * Sandbox is special. We should limit the mechanism of matching PCI
 emulation device via "compatible" to sandbox only
>>>
>>> The above three points can be done separately and I don't care about
>>> this too much.
>>>
>>
>> That's my concern. Only doing this created confusing and incomplete
>> design.
>
> Incomplete how ?

I explained several times. I have to repeat here once again:

Currently U-Boot supports two scenarios for PCI driver binding:

- Declare a PCI device in the device tree. That requires specifying a
'compatible' string as well as 'reg' property as defined by the 'PCI
Bus Binding' spec. DM uses the 'compatible' string to bind the driver
for the device.
- Don't declare a PCI device in the device tree. Instead, using
U_BOOT_PCI_DEVICE() to declare a device and driver mapping.

You are creating a 3rd scenario which is a mix up of both scenario#1
and #2 in this patch, yet without any documentation, plus any
additional changes to impacted drivers.

So far almost all PCI device drivers in U-Boot supports both
scenarios, except PCI UART which currently only supports scenario#1.
If you declare what you do in this patch is pureblood then you should
revoke the other 2 at the same time. Leaving such in the mainstream
only creates chaos in the future and we should avoid doing that, given
we already had lots of discussion here.

>
>> Yes, you probably don't care about this. But I care about this
>> as it impacts some other things like PCI uart driver which is used by
>> some x86 boards.
>
> Sandbox changes impact PCI UART driver and x86 boards how ?

See above. It's not about sandbox!

>
 * Assign the DT node to the bound device in pci_find_and_bind_driver()
 if there is a valid PCI "reg" encoding for a specific PCI device in
 the device tree
>>>
>>> This is what this patch does. And in fact, I have real hardware which
>>> needs this patch to be useful and on which I can test if this works.
>>>
>>
>> You can do this in your own fork. Nothing prevents you from doing that.
>
> I am at loss for words, really.
>
 * Create DM PCI test case against the DT node assignment
 * Remove all compatible string in U-Boot's PCI device drivers: eg:
 ehci_pci_ids[], xhci_pci_ids[], etc. IOW, all PCI device drivers
 should only use U_BOOT_PCI_DEVICE(), aka the original U-Boot option 2
 * Fork a "pci-ns16550" driver to support U_BOOT_PCI_DEVICE(), as
 currently PCI ns16550 device driver uses "compatible" string to do the
 matching, and update crownbay.dts and galileo.dts (so far I only know
 two boards are using PCI ns16550 serial port)
 * Make sure all DM PCI test cases are not broken
 * Document all of the above changes in doc/driver-model/pci-info.txt
>>>
>>> I think you're just adding completely orthogonal stuff to this 5-liner
>>> patch into the list and overly complicate the situation. Sure, if you
>>> want to do 

Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Marek Vasut]

On 08/21/2018 06:15 AM, Bin Meng wrote:
[...]

>> From what I understand, Marek and Bin are discussing whether a
>> compatible string is needed to bind a driver.
>>
>> Generally it is. But with PCI and USB we have a search mechanism which
>> can be used instead.
>>
>> The patch Marek submitted does not seems at all desirable to me.
>
> Can you explain why ?

 We already have a compatible string as the standard way to attach
 drivers to devices.

 For PCI, we already have PCI_DEVICE() and friends for when we can
 attach a driver for a PCI device without using a compatible string.

 Both of these are defined in the DT specification.

 The patch seems to be a rework of PCI_DEVICE() and I cannot why it is 
 necessary.

>
>> I would like to see what Bin proposes.
>
> Me too, so far I only see "not Marek's patch" and no real alternative.

 Bin, do you have a patch you can share?
>>>
>>> No, I don't have any patch series for now, although I offered to work
>>> on a series to implement my proposal. I haven't started it as I wanted
>>> to hear your thoughts. The proposal I made is to satisfy the
>>> requirement that Marek insisted on. Basically Marek thought current DM
>>> PCI implementation is wrong to ask for a "compatible" string of a PCI
>>> device in the device tree, because he thought adding "compatible" to
>>> DT is invalid and Linux does not do that either. While I disagree we
>>> have to 100% follow Linux's implementation, I am still open for any
>>> possible design changes, if that's the preferable practice in U-Boot
>>> (but we have to make it clear and document this officially somewhere).
>>>
>>> The proposal I made is:
>>>
>>> * Keep pci-uclass driver's post_bind() and child_post_bind() only for
>>> Sandbox configuration
>>> * Keep the call to pci_bus_find_devfn() in pci_bind_bus_devices() only
>>> for Sandbox configuration
>>> * Sandbox is special. We should limit the mechanism of matching PCI
>>> emulation device via "compatible" to sandbox only
>>
>> The above three points can be done separately and I don't care about
>> this too much.
>>
> 
> That's my concern. Only doing this created confusing and incomplete
> design.

Incomplete how ?

> Yes, you probably don't care about this. But I care about this
> as it impacts some other things like PCI uart driver which is used by
> some x86 boards.

Sandbox changes impact PCI UART driver and x86 boards how ?

>>> * Assign the DT node to the bound device in pci_find_and_bind_driver()
>>> if there is a valid PCI "reg" encoding for a specific PCI device in
>>> the device tree
>>
>> This is what this patch does. And in fact, I have real hardware which
>> needs this patch to be useful and on which I can test if this works.
>>
> 
> You can do this in your own fork. Nothing prevents you from doing that.

I am at loss for words, really.

>>> * Create DM PCI test case against the DT node assignment
>>> * Remove all compatible string in U-Boot's PCI device drivers: eg:
>>> ehci_pci_ids[], xhci_pci_ids[], etc. IOW, all PCI device drivers
>>> should only use U_BOOT_PCI_DEVICE(), aka the original U-Boot option 2
>>> * Fork a "pci-ns16550" driver to support U_BOOT_PCI_DEVICE(), as
>>> currently PCI ns16550 device driver uses "compatible" string to do the
>>> matching, and update crownbay.dts and galileo.dts (so far I only know
>>> two boards are using PCI ns16550 serial port)
>>> * Make sure all DM PCI test cases are not broken
>>> * Document all of the above changes in doc/driver-model/pci-info.txt
>>
>> I think you're just adding completely orthogonal stuff to this 5-liner
>> patch into the list and overly complicate the situation. Sure, if you
>> want to do all this, go ahead, but I don't see how this prevents this
>> particular patch from being applied , except maybe for the documentation
>> tweak.
> 
> Please, think from the maintainer perspective. It's nothing related to
> number of LOCs. It's that we need create a clean design. You probably
> don't want someone just submits a single patch that changed current
> USB design without a full consideration on all possible impacts.

OK, after reading all this, what I gather from the discussion is that
this patch somehow breaks the design or the other platforms, which is
why you fight against it so much. Does it, yes or no? And if so, you
still failed to explain how, so, how ?

Improving sandbox and x86 PCI handling is orthogonal to this change, so
are ns16550 driver improvements and if you want to work on them, nothing
prevents you from doing so.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Bin Meng]

Hi Marek,

On Tue, Aug 21, 2018 at 12:02 PM, Marek Vasut  wrote:
> On 08/21/2018 05:46 AM, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Aug 21, 2018 at 3:29 AM, Simon Glass  wrote:
>>> Hi Marek,
>>>
>>> On 20 August 2018 at 12:42, Marek Vasut  wrote:

 On 08/20/2018 06:57 PM, Simon Glass wrote:
> Hi Bin,
>
> On 16 August 2018 at 19:51, Bin Meng  wrote:
>> Hi Marek,
>>
>> On Thu, Aug 16, 2018 at 7:47 PM, Marek Vasut  
>> wrote:
>>> On 08/15/2018 01:25 PM, Tom Rini wrote:
 On Wed, Aug 15, 2018 at 06:19:25PM +0800, Bin Meng wrote:
> Hi Marek,
>
> On Wed, Aug 15, 2018 at 5:22 PM, Marek Vasut  
> wrote:
>> On 08/14/2018 11:40 AM, Bin Meng wrote:
>>> Hi Marek,
>>>
>>> On Tue, Aug 14, 2018 at 4:55 PM, Marek Vasut 
>>>  wrote:
 On 08/14/2018 03:46 AM, Bin Meng wrote:
> Hi Marek,
>
> On Mon, Aug 13, 2018 at 9:46 PM, Marek Vasut 
>  wrote:
>> On 08/13/2018 04:24 AM, Bin Meng wrote:
>>> Hi Marek,
>>>
>>> On Fri, Aug 10, 2018 at 8:38 PM, Marek Vasut 
>>>  wrote:
 On 08/10/2018 02:01 PM, Tom Rini wrote:
> On Wed, Aug 08, 2018 at 09:37:25PM +0200, Marek Vasut wrote:
>> On 08/08/2018 05:32 PM, Bin Meng wrote:
>>> Hi Marek,
>>>
>>> On Wed, Aug 8, 2018 at 10:33 PM, Marek Vasut 
>>>  wrote:
 On 08/08/2018 03:39 PM, Bin Meng wrote:
> Hi Marek,
>
> On Wed, Aug 8, 2018 at 9:24 PM, Marek Vasut 
>  wrote:
>> On 08/08/2018 03:14 PM, Bin Meng wrote:
>>> Hi Marek,
>>>
>>> On Wed, Aug 8, 2018 at 9:03 PM, Marek Vasut 
>>>  wrote:
 The PCI controller can have DT subnodes describing 
 extra properties
 of particular PCI devices, ie. a PHY attached to an 
 EHCI controller
 on a PCI bus. This patch parses those DT subnodes and 
 assigns a node
 to the PCI device instance, so that the driver can 
 extract details
 from that node and ie. configure the PHY using the PHY 
 subsystem.

 Signed-off-by: Marek Vasut 
 
 Cc: Simon Glass 
 ---
  drivers/pci/pci-uclass.c | 14 ++
  1 file changed, 14 insertions(+)

 diff --git a/drivers/pci/pci-uclass.c 
 b/drivers/pci/pci-uclass.c
 index 46e9c71bdf..306bea0dbf 100644
 --- a/drivers/pci/pci-uclass.c
 +++ b/drivers/pci/pci-uclass.c
 @@ -662,6 +662,8 @@ static int 
 pci_find_and_bind_driver(struct udevice *parent,
 for (id = entry->match;
  id->vendor || id->subvendor || 
 id->class_mask;
  id++) {
 +   ofnode node;
 +
 if (!pci_match_one_id(id, 
 find_id))
 continue;

 @@ -691,6 +693,18 @@ static int 
 pci_find_and_bind_driver(struct udevice *parent,
 goto error;
 debug("%s: Match found: %s\n", 
 __func__, drv->name);
 dev->driver_data = 
 find_id->driver_data;
 +
 +   dev_for_each_subnode(node, 
 parent) {
 +   phys_addr_t df, size;
 +   df = 
 ofnode_get_addr_size(node, "reg", );
 +
 +   if (PCI_FUNC(df) == 
 PCI_FUNC(bdf) &&
 +   PCI_DEV(df) == 
 PCI_DEV(bdf)) {
 +   dev->node = 

Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Marek Vasut]

On 08/21/2018 05:46 AM, Bin Meng wrote:
> Hi Simon,
> 
> On Tue, Aug 21, 2018 at 3:29 AM, Simon Glass  wrote:
>> Hi Marek,
>>
>> On 20 August 2018 at 12:42, Marek Vasut  wrote:
>>>
>>> On 08/20/2018 06:57 PM, Simon Glass wrote:
 Hi Bin,

 On 16 August 2018 at 19:51, Bin Meng  wrote:
> Hi Marek,
>
> On Thu, Aug 16, 2018 at 7:47 PM, Marek Vasut  
> wrote:
>> On 08/15/2018 01:25 PM, Tom Rini wrote:
>>> On Wed, Aug 15, 2018 at 06:19:25PM +0800, Bin Meng wrote:
 Hi Marek,

 On Wed, Aug 15, 2018 at 5:22 PM, Marek Vasut  
 wrote:
> On 08/14/2018 11:40 AM, Bin Meng wrote:
>> Hi Marek,
>>
>> On Tue, Aug 14, 2018 at 4:55 PM, Marek Vasut  
>> wrote:
>>> On 08/14/2018 03:46 AM, Bin Meng wrote:
 Hi Marek,

 On Mon, Aug 13, 2018 at 9:46 PM, Marek Vasut 
  wrote:
> On 08/13/2018 04:24 AM, Bin Meng wrote:
>> Hi Marek,
>>
>> On Fri, Aug 10, 2018 at 8:38 PM, Marek Vasut 
>>  wrote:
>>> On 08/10/2018 02:01 PM, Tom Rini wrote:
 On Wed, Aug 08, 2018 at 09:37:25PM +0200, Marek Vasut wrote:
> On 08/08/2018 05:32 PM, Bin Meng wrote:
>> Hi Marek,
>>
>> On Wed, Aug 8, 2018 at 10:33 PM, Marek Vasut 
>>  wrote:
>>> On 08/08/2018 03:39 PM, Bin Meng wrote:
 Hi Marek,

 On Wed, Aug 8, 2018 at 9:24 PM, Marek Vasut 
  wrote:
> On 08/08/2018 03:14 PM, Bin Meng wrote:
>> Hi Marek,
>>
>> On Wed, Aug 8, 2018 at 9:03 PM, Marek Vasut 
>>  wrote:
>>> The PCI controller can have DT subnodes describing 
>>> extra properties
>>> of particular PCI devices, ie. a PHY attached to an 
>>> EHCI controller
>>> on a PCI bus. This patch parses those DT subnodes and 
>>> assigns a node
>>> to the PCI device instance, so that the driver can 
>>> extract details
>>> from that node and ie. configure the PHY using the PHY 
>>> subsystem.
>>>
>>> Signed-off-by: Marek Vasut 
>>> 
>>> Cc: Simon Glass 
>>> ---
>>>  drivers/pci/pci-uclass.c | 14 ++
>>>  1 file changed, 14 insertions(+)
>>>
>>> diff --git a/drivers/pci/pci-uclass.c 
>>> b/drivers/pci/pci-uclass.c
>>> index 46e9c71bdf..306bea0dbf 100644
>>> --- a/drivers/pci/pci-uclass.c
>>> +++ b/drivers/pci/pci-uclass.c
>>> @@ -662,6 +662,8 @@ static int 
>>> pci_find_and_bind_driver(struct udevice *parent,
>>> for (id = entry->match;
>>>  id->vendor || id->subvendor || 
>>> id->class_mask;
>>>  id++) {
>>> +   ofnode node;
>>> +
>>> if (!pci_match_one_id(id, 
>>> find_id))
>>> continue;
>>>
>>> @@ -691,6 +693,18 @@ static int 
>>> pci_find_and_bind_driver(struct udevice *parent,
>>> goto error;
>>> debug("%s: Match found: %s\n", 
>>> __func__, drv->name);
>>> dev->driver_data = 
>>> find_id->driver_data;
>>> +
>>> +   dev_for_each_subnode(node, 
>>> parent) {
>>> +   phys_addr_t df, size;
>>> +   df = 
>>> ofnode_get_addr_size(node, "reg", );
>>> +
>>> +   if (PCI_FUNC(df) == 
>>> PCI_FUNC(bdf) &&
>>> +   PCI_DEV(df) == 
>>> PCI_DEV(bdf)) {
>>> +   dev->node = 
>>> node;
>>> +   break;
>>> +   }
>>

Re: [U-Boot] [PATCH 2/2] spl: socfpga: stratix10: add hex file output for spl image

[Marek Vasut]

On 08/20/2018 11:04 PM, Dalon L Westergreen wrote:
> On Mon, 2018-08-20 at 20:33 +0200, Marek Vasut wrote:
>> On 08/20/2018 03:54 PM, Dalon Westergreen wrote:
>> Stratix10 requires a hex image of the spl for boot.  The hex
>> image is added to the FPGA configuration image and loaded to
>> the processor memory by the configuration engine.
>>
>> Signed-off-by: Dalon Westergreen > >
>> ---
>>  scripts/Makefile.spl | 10 ++
>>  1 file changed, 10 insertions(+)
>>
>> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
>> index 76d08fd92b..c424f87e6e 100644
>> --- a/scripts/Makefile.spl
>> +++ b/scripts/Makefile.spl
>> @@ -190,6 +190,7 @@ endif
>>  ifdef CONFIG_ARCH_SOCFPGA
>>  ALL-$(CONFIG_TARGET_SOCFPGA_GEN5)   += $(obj)/$(SPL_BIN).sfp
>>  ALL-$(CONFIG_TARGET_SOCFPGA_ARRIA10)+= $(obj)/$(SPL_BIN).sfp
>> +ALL-$(CONFIG_TARGET_SOCFPGA_STRATIX10)  += $(obj)/$(SPL_BIN).hex
>>  endif
>>  
>>  ifdef CONFIG_ARCH_SUNXI
>> @@ -299,6 +300,15 @@ OBJCOPYFLAGS_u-boot-x86-16bit-spl.bin := -O binary -j 
>> .start16 -j .resetvec
>>  $(obj)/u-boot-x86-16bit-spl.bin: $(obj)/u-boot-spl FORCE
>>  $(call if_changed,objcopy)
>>  
>> +ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
>> +OBJCOPYFLAGS_$(SPL_BIN).hex = -I binary -O ihex --change-addresses 
>> 0xffe0
>>
>> Why is this --change-address needed ? This smells like a hack of some
>> sort ...
>>
> I believe the tool that uses this file expects this offset, that said i have 
> not
> 
> tried using a hex file without this change address applied.  I will try 
> without 
> 
> this, and see what happens.

You probably need to adjust the link address of the SPL or U-Boot too.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Bin Meng]

Hi Simon,

On Tue, Aug 21, 2018 at 3:29 AM, Simon Glass  wrote:
> Hi Marek,
>
> On 20 August 2018 at 12:42, Marek Vasut  wrote:
>>
>> On 08/20/2018 06:57 PM, Simon Glass wrote:
>> > Hi Bin,
>> >
>> > On 16 August 2018 at 19:51, Bin Meng  wrote:
>> >> Hi Marek,
>> >>
>> >> On Thu, Aug 16, 2018 at 7:47 PM, Marek Vasut  
>> >> wrote:
>> >>> On 08/15/2018 01:25 PM, Tom Rini wrote:
>>  On Wed, Aug 15, 2018 at 06:19:25PM +0800, Bin Meng wrote:
>> > Hi Marek,
>> >
>> > On Wed, Aug 15, 2018 at 5:22 PM, Marek Vasut  
>> > wrote:
>> >> On 08/14/2018 11:40 AM, Bin Meng wrote:
>> >>> Hi Marek,
>> >>>
>> >>> On Tue, Aug 14, 2018 at 4:55 PM, Marek Vasut  
>> >>> wrote:
>>  On 08/14/2018 03:46 AM, Bin Meng wrote:
>> > Hi Marek,
>> >
>> > On Mon, Aug 13, 2018 at 9:46 PM, Marek Vasut 
>> >  wrote:
>> >> On 08/13/2018 04:24 AM, Bin Meng wrote:
>> >>> Hi Marek,
>> >>>
>> >>> On Fri, Aug 10, 2018 at 8:38 PM, Marek Vasut 
>> >>>  wrote:
>>  On 08/10/2018 02:01 PM, Tom Rini wrote:
>> > On Wed, Aug 08, 2018 at 09:37:25PM +0200, Marek Vasut wrote:
>> >> On 08/08/2018 05:32 PM, Bin Meng wrote:
>> >>> Hi Marek,
>> >>>
>> >>> On Wed, Aug 8, 2018 at 10:33 PM, Marek Vasut 
>> >>>  wrote:
>>  On 08/08/2018 03:39 PM, Bin Meng wrote:
>> > Hi Marek,
>> >
>> > On Wed, Aug 8, 2018 at 9:24 PM, Marek Vasut 
>> >  wrote:
>> >> On 08/08/2018 03:14 PM, Bin Meng wrote:
>> >>> Hi Marek,
>> >>>
>> >>> On Wed, Aug 8, 2018 at 9:03 PM, Marek Vasut 
>> >>>  wrote:
>>  The PCI controller can have DT subnodes describing 
>>  extra properties
>>  of particular PCI devices, ie. a PHY attached to an 
>>  EHCI controller
>>  on a PCI bus. This patch parses those DT subnodes and 
>>  assigns a node
>>  to the PCI device instance, so that the driver can 
>>  extract details
>>  from that node and ie. configure the PHY using the PHY 
>>  subsystem.
>> 
>>  Signed-off-by: Marek Vasut 
>>  
>>  Cc: Simon Glass 
>>  ---
>>   drivers/pci/pci-uclass.c | 14 ++
>>   1 file changed, 14 insertions(+)
>> 
>>  diff --git a/drivers/pci/pci-uclass.c 
>>  b/drivers/pci/pci-uclass.c
>>  index 46e9c71bdf..306bea0dbf 100644
>>  --- a/drivers/pci/pci-uclass.c
>>  +++ b/drivers/pci/pci-uclass.c
>>  @@ -662,6 +662,8 @@ static int 
>>  pci_find_and_bind_driver(struct udevice *parent,
>>  for (id = entry->match;
>>   id->vendor || id->subvendor || 
>>  id->class_mask;
>>   id++) {
>>  +   ofnode node;
>>  +
>>  if (!pci_match_one_id(id, 
>>  find_id))
>>  continue;
>> 
>>  @@ -691,6 +693,18 @@ static int 
>>  pci_find_and_bind_driver(struct udevice *parent,
>>  goto error;
>>  debug("%s: Match found: %s\n", 
>>  __func__, drv->name);
>>  dev->driver_data = 
>>  find_id->driver_data;
>>  +
>>  +   dev_for_each_subnode(node, 
>>  parent) {
>>  +   phys_addr_t df, size;
>>  +   df = 
>>  ofnode_get_addr_size(node, "reg", );
>>  +
>>  +   if (PCI_FUNC(df) == 
>>  PCI_FUNC(bdf) &&
>>  +   PCI_DEV(df) == 
>>  PCI_DEV(bdf)) {
>>  +   dev->node = 
>>  node;
>>  +   break;
>>  +   }
>> >>>
>> >>> The function 

[U-Boot] [PATCH] DM: serial: ti_omap3_common: Don't define serial unless !DM_SERIAL

[Adam Ford]

The serial port was being manually configured during SPL build,
however in preparation to allow DM in SPL, this needs to change
to be based on whether or not DM_SERIAL is enabled because, soon
the assumption that SPL means no DM may not be accurate.

Signed-off-by: Adam Ford 

diff --git a/include/configs/ti_omap3_common.h 
b/include/configs/ti_omap3_common.h
index dcf76305db..c668284b3e 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -27,12 +27,10 @@
 /* NS16550 Configuration */
 #define V_NS16550_CLK  4800/* 48MHz (APLL96/2) */
 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-#if defined(CONFIG_SPL_BUILD)
-#define CONFIG_SYS_NS16550_SERIAL
 #if !defined(CONFIG_DM_SERIAL)
+#define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE(-4)
 #endif /* !CONFIG_DM_SERIAL */
-#endif /* CONFIG_SPL_BUILD */
 #define CONFIG_SYS_BAUDRATE_TABLE  {4800, 9600, 19200, 38400, 57600, \
115200}
 
-- 
2.17.1

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[U-Boot] [PATCH] ARM: mach-omap2: Don't initialize I2C if DM_I2C is enabled

[Adam Ford]

boot-common.c checks to see if I2C is enabled in SPL, but
it doens't check for DM_I2C before initializing it.  This
will now only initialize the I2C is the DM_I2C is not enabled
to avoid initializing it more than once.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/mach-omap2/boot-common.c 
b/arch/arm/mach-omap2/boot-common.c
index d4a1e2e42c..176d4f67cb 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -202,7 +202,7 @@ void spl_board_init(void)
 #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
gpmc_init();
 #endif
-#ifdef CONFIG_SPL_I2C_SUPPORT
+#if defined(CONFIG_SPL_I2C_SUPPORT) && !defined(CONFIG_DM_I2C)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
 #endif
 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
-- 
2.17.1

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[U-Boot] [PATCH] DM: omap_gpio: Reduce overhead when used with OF_PLATDATA

[Adam Ford]

Platforms with limited resources in SPL may enable OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford 

diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index 651f6994e4..fcf25fc5a4 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -337,6 +337,7 @@ static int omap_gpio_bind(struct udevice *dev)
 }
 #endif
 
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id omap_gpio_ids[] = {
{ .compatible = "ti,omap3-gpio" },
{ .compatible = "ti,omap4-gpio" },
@@ -344,7 +345,6 @@ static const struct udevice_id omap_gpio_ids[] = {
{ }
 };
 
-#if CONFIG_IS_ENABLED(OF_CONTROL)
 static int omap_gpio_ofdata_to_platdata(struct udevice *dev)
 {
struct omap_gpio_platdata *plat = dev_get_platdata(dev);
@@ -363,14 +363,15 @@ U_BOOT_DRIVER(gpio_omap) = {
.name   = "gpio_omap",
.id = UCLASS_GPIO,
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+   .of_match = omap_gpio_ids,
.ofdata_to_platdata = of_match_ptr(omap_gpio_ofdata_to_platdata),
-   .bind   = dm_scan_fdt_dev,
.platdata_auto_alloc_size = sizeof(struct omap_gpio_platdata),
+#endif
 #else
.bind   = omap_gpio_bind,
 #endif
.ops= _omap_ops,
-   .of_match = omap_gpio_ids,
.probe  = omap_gpio_probe,
.priv_auto_alloc_size = sizeof(struct gpio_bank),
.flags = DM_FLAG_PRE_RELOC,
-- 
2.17.1

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[U-Boot] [PATCH 1/2] DM: I2C: Reduce overhead when used with OF_PLATDATA

[Adam Ford]

Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford 

diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 5e58dd0916..c5a3c4e201 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -562,7 +562,7 @@ int i2c_deblock(struct udevice *bus)
return ops->deblock(bus);
 }
 
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip)
 {
int addr;
@@ -584,7 +584,7 @@ int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct 
dm_i2c_chip *chip)
 
 static int i2c_post_probe(struct udevice *dev)
 {
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
 
i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 10);
@@ -597,7 +597,7 @@ static int i2c_post_probe(struct udevice *dev)
 
 static int i2c_child_post_bind(struct udevice *dev)
 {
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
 
if (!dev_of_valid(dev))
@@ -612,7 +612,7 @@ UCLASS_DRIVER(i2c) = {
.id = UCLASS_I2C,
.name   = "i2c",
.flags  = DM_UC_FLAG_SEQ_ALIAS,
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.post_bind  = dm_scan_fdt_dev,
 #endif
.post_probe = i2c_post_probe,
-- 
2.17.1

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[U-Boot] [PATCH 2/2] DM: OMAP24XX_I2C: Reduce overhead when used with OF_PLATDATA

[Adam Ford]

Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford 

diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 0759585c9e..54bf35e552 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -890,6 +890,7 @@ static int omap_i2c_probe(struct udevice *bus)
return 0;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 static int omap_i2c_ofdata_to_platdata(struct udevice *bus)
 {
struct omap_i2c *priv = dev_get_priv(bus);
@@ -901,23 +902,26 @@ static int omap_i2c_ofdata_to_platdata(struct udevice 
*bus)
return 0;
 }
 
-static const struct dm_i2c_ops omap_i2c_ops = {
-   .xfer   = omap_i2c_xfer,
-   .probe_chip = omap_i2c_probe_chip,
-   .set_bus_speed  = omap_i2c_set_bus_speed,
-};
-
 static const struct udevice_id omap_i2c_ids[] = {
{ .compatible = "ti,omap3-i2c" },
{ .compatible = "ti,omap4-i2c" },
{ }
 };
+#endif
+
+static const struct dm_i2c_ops omap_i2c_ops = {
+   .xfer   = omap_i2c_xfer,
+   .probe_chip = omap_i2c_probe_chip,
+   .set_bus_speed  = omap_i2c_set_bus_speed,
+};
 
 U_BOOT_DRIVER(i2c_omap) = {
.name   = "i2c_omap",
.id = UCLASS_I2C,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.of_match = omap_i2c_ids,
.ofdata_to_platdata = omap_i2c_ofdata_to_platdata,
+#endif
.probe  = omap_i2c_probe,
.priv_auto_alloc_size = sizeof(struct omap_i2c),
.ops= _i2c_ops,
-- 
2.17.1

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Re: [U-Boot] [RESEND PATCH v9 01/18] Revert "efi_loader: Rename sections to allow for implicit data"

[Alexander Graf]

On 20.08.18 20:54, Simon Glass wrote:
> This partially reverts commit 7e21fbca26d18327cf7cabaad08df276a06a07d8.
> 
> That change broke sandbox EFI support for unknown reasons. It also changes

Wouldn't it be better to just figure out the reasons? So far all bugs
I've found were linker script related and quite obvious once you start
to dig into them.

> sandbox to use--gc-sections which we don't want.

Why don't we want gc-sections with sandbox?

> For now I am just reverting the sandbox portion as presumably this change
> is safe on other architectures.

Sandbox is your target, so you're free to do whatever you like :). But
I'm not sure this is the right path forward. I'd rather like to keep
things consistent.

So what do you expect happens with this patch? A resend of a patch 1/18
by itself doesn't really tell me what you're trying to say.


Alex
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Re: [U-Boot] Pull request: u-boot-sunxi/master

[Tom Rini]

On Mon, Aug 20, 2018 at 06:14:05PM +0530, Jagan Teki wrote:

> Hi Tom, 
> 
> Please pull this PR.
> 
> thanks,
> Jagan.
> 
> The following changes since commit f05ebbf47a9dc863ff4bb084649ecb34d728b5f2:
> 
>   bcm968380gerg: Add MAINTAINERS file (2018-08-09 11:48:39 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-sunxi.git master
> 
> for you to fetch changes up to d8024074e43c2a99ecf93d919544d82f69025521:
> 
>   board: sunxi: Remove unused local variables (2018-08-20 18:10:43 +0530)
> 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] Please pull u-boot-x86

[Tom Rini]

On Mon, Aug 20, 2018 at 01:59:12PM +0800, Bin Meng wrote:

> Hi Tom,
> 
> The following changes since commit 9f8cf76be256a83643ee05de6cffaeb452ed0931:
> 
>   Convert CONFIG_SYS_I2C_DAVINCI to Kconfig (2018-08-17 15:43:38 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-x86.git
> 
> for you to fetch changes up to 7bdf39cfafd29fc1192dd1aa997b5937f92a3c74:
> 
>   x86: efi: payload: Add default TSC frequency in the device tree
> (2018-08-20 13:52:49 +0800)
> 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot,v2,1/3] efi: Fix truncation of constant value

[Alexander Graf]

> Starting with commit 867a6ac86dd8 ("efi: Add start-up library code"),
> sparse constantly complains about truncated constant value in efi.h:
> 
> include/efi.h:176:35: warning: cast truncates bits from constant value 
> (8000 becomes 0)
> 
> This can get quite noisy, preventing real issues to be noticed:
> 
> $ make defconfig
> *** Default configuration is based on 'sandbox_defconfig'
> $ make C=2 -j12 2>&1 | grep truncates | wc -l
> 441
> 
> After the patch is applied:
> $ make C=2 -j12 2>&1 | grep truncates | wc -l
> 0
> $ sparse --version
> v0.5.2
> 
> Following the suggestion of Heinrich Schuchardt, instead of only
> fixing the root-cause, I replaced the whole enum of _SHIFT values
> by ULL defines. This matches both the UEFI 2.7 spec and the Linux
> kernel implementation.
> 
> Some ELF size comparison before and after the patch (gcc 7.3.0):
> 
> efi-x86_payload64_defconfig:
> textdatabss dec   hex   filename
> 407174  29432   278676  715282aea12 u-boot.old
> 407152  29464   278676  715292aea1c u-boot.new
> -22 +32 0   +10
> 
> efi-x86_payload32_defconfig:
> textdatabss dec   hex   filename
> 447075  30308   280076  757459b8ed3 u-boot.old
> 447053  30340   280076  757469b8edd u-boot.new
> -22 +32 0   +10
> 
> Fixes: 867a6ac86dd8 ("efi: Add start-up library code")
> Suggested-by: Heinrich Schuchardt 
> Signed-off-by: Eugeniu Rosca 
> Reviewed-by: Heinrich Schuchardt 
> Reviewed-by: Heinrich Schuchardt 

Thanks, applied to efi-2018.09

Alex

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Re: [U-Boot] [U-Boot, v2, 3/3] cmd: efi: Clarify calculation precedence for '&' and '?'

[Alexander Graf]

> Fix cppcheck complaint:
> [cmd/efi.c:173]: (style) Clarify calculation precedence for '&' and '?'.
> 
> Fixes: f1a0bafb5802 ("efi: Add a command to display the memory map")
> Signed-off-by: Eugeniu Rosca 
> Reviewed-by: Heinrich Schuchardt 

Thanks, applied to efi-2018.09

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Re: [U-Boot] [U-Boot, v2, 2/3] efi: Add EFI_MEMORY_{NV, MORE_RELIABLE, RO} attributes

[Alexander Graf]

> With this update, the memory attributes are in sync with Linux
> kernel v4.18-rc4. They also match page 190 of UEFI 2.7 spec [1].
> 
> [1] http://www.uefi.org/sites/default/files/resources/UEFI_Spec_2_7.pdf
> 
> Suggested-by: Heinrich Schuchardt 
> Signed-off-by: Eugeniu Rosca 
> Reviewed-by: Heinrich Schuchardt 

Thanks, applied to efi-2018.09

Alex

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Re: [U-Boot] [PATCH v4 7/7] cmd: Add bind/unbind commands to bind a device to a driver from the command line

[Stephen Warren]

On 08/09/2018 08:17 AM, Jean-Jacques Hiblot wrote:

In some cases it can be useful to be able to bind a device to a driver from
the command line.
The obvious example is for versatile devices such as USB gadget.
Another use case is when the devices are not yet ready at startup and
require some setup before the drivers are bound (ex: FPGA which bitsream is
fetched from a mass storage or ethernet)

usage example:

bind usb_dev_generic 0 usb_ether
unbind usb_dev_generic 0 usb_ether
or
unbind eth 1

bind /ocp/omap_dwc3@4838/usb@4839 usb_ether
unbind /ocp/omap_dwc3@4838/usb@4839



diff --git a/test/py/tests/test_bind.py b/test/py/tests/test_bind.py



+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.


That line looks wrong.


+def in_tree(response, name, uclass, drv, depth, last_child):
+   lines = [x.strip() for x in response.splitlines()]
+   leaf = ' ' * 4 * depth;
+   if not last_child:
+   leaf = leaf + '\|'
+   else:
+   leaf = leaf + '`'
+   leaf = leaf + '-- ' + name
+   line = ' *{:10.10}  [0-9]*  \[ [ +] \]   {:10.10}  {}$'.format(uclass, 
drv,leaf)


Does Python 2 support that interpolation format? test/py should support 
both Python 2 and 3.



+@pytest.mark.buildconfigspec('cmd_bind')
+def test_bind_unbind_with_node(u_boot_console):
+
+   #bind /bind-test. Device should come up as well as its children
+   response = u_boot_console.run_command("bind  /bind-test 
generic_simple_bus")


Nit: There are 2 spaces after "bind".


+   #Unbind child #2. No error expected and all devices should be there 
except for bind-test-child2

...

+   assert "bind-test-child2" not in tree
+
+
+   #Bind child #2. No error expected and all devices should be there


Nit: No need for 2 blank lines there.


+   #try binding invalid node with valid driver
+   response = u_boot_console.run_command("bind  /not-a-valid-node 
generic_simple_bus")
+   assert response != ''


Should this check for a specific (partial) error message or format of 
message?



+   #bind /bind-test. Device should come up as well as its children

...

+   response = u_boot_console.run_command("unbind  /bind-test")
+   assert response == ''


Shouldn't this validate the dm tree output right at the end too?


+def get_next_line(tree, name):
+   treelines = [x.strip() for x in tree.splitlines() if x.strip()]
+   child_line = ""
+   for idx, line in enumerate(treelines):
+   if ("-- " + name) in line:
+   try:
+   child_line = treelines[idx+1]
+   except:
+   pass


Squashing all exceptions seems a little drastic. What exceptions happen 
and why?



+
+@pytest.mark.buildconfigspec('cmd_bind')
+def test_bind_unbind_with_uclass(u_boot_console):

...

+   #check that the child is there and its uclass/index pair is right
+   tree = u_boot_console.run_command("dm tree")
+   treelines = [x.strip() for x in tree.splitlines() if x.strip()]


I don't /think/ treelines is used anywhere in this function?
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Re: [U-Boot] [PATCH v2 3/8] test/py: Import 'configparser' lower case to be python 3.x safe

[Stephen Warren]

On 08/06/2018 04:42 AM, Michal Simek wrote:

On 14.9.2017 23:34, Paul Burton wrote:

In python 3.x the configparser module is named with all lower case.
Import it as such in order to avoid errors when running on python 3.x,
and fall back to the CamelCase version in order to keep working with
python 2.x.

...

I have bisect issue with test/py framework on my PC and I end up on this
patch.

Below is the issue I am getting.

And here are my python version.
[u-boot](test)$ python3 --version
Python 3.4.3
[u-boot](test)$ python --version
Python 2.7.6
[u-boot](test)$ which python
/usr/bin/python


Do you know what could be the issue?


I honestly can't think why the configuration parsing could cause the 
kind of issue that was shown in the test log. It seems like there's a 
bug in the test/py code w.r.t. receiving characters from the target 
outside the ASCII range, which should be applicable in all cases, but I 
can't see how that would only happen based on how configparser was imported.




Thanks,
Michal


=
FAILURES
==
_
test_help
_

u_boot_console = 

 def test_help(u_boot_console):
 """Test that the "help" command can be executed."""


   u_boot_console.run_command('help')


test/py/tests/test_help.py:8:
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
test/py/u_boot_console_base.py:181: in run_command
 self.logstream.write(self.prompt, implicit=True)
test/py/multiplexed_log.py:65: in write
 self.logfile.write(self, data, implicit)
test/py/multiplexed_log.py:688: in write
 self.f.write(self._escape(data))
test/py/multiplexed_log.py:335: in _escape
 c for c in data)
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

.0 = 

 data = ''.join((c in self._nonprint) and ('%%%02x' % ord(c)) or

  c for c in data)

E   UnicodeDecodeError: 'ascii' codec can't decode byte 0x80 in position
32: ordinal not in range(128)

test/py/multiplexed_log.py:335: UnicodeDecodeError
===
130 tests deselected

=
1 failed, 130 deselected in 7.32 seconds
==


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Re: [U-Boot] Booting into winCE .nb0 without access to source files

[Troy Kisky]

On 8/20/2018 12:55 PM, Michael Newton wrote:
> Hi,
> 
> 
> I have an awkward situation, short of it is we have a custom i.MX53 board, 
> the nk.nb0 and eboot.nb0 files to boot into windows (with no source code), 
> and an Ubuntu VM with the source code and compiled files of uboot from august 
> 2009 (as well as some flavour of linux that I'm not 100% sure on). I need to 
> figure out a way to boot into either the nk.nb0 or eboot.nb0 so that we can 
> run our software.
> 
> 
> Longer versions is that before I got to this company, they were buying an 
> i.MX53 board from a 3rd party, and using that to assemble our product. When 
> that 3rd party went out of business, my company bought the design and rights 
> to it so that we could manufacture our own boards to sell and maintain our 
> product. For some reason, we've had a very high rate of failure on the boards 
> we've had manufactured, where 50%+ fail to do anything when powered on with 
> the windows files and not even a single line appears on the com terminal link 
> we use to debug (my theory is something on the board doesn't allow for enough 
> current/voltage during start up, so it just hangs if it's below a certain 
> threshold due to manufacturing variances). While going through some of the 
> files we got from the other company, I found an Ubuntu VM image that 
> contained uboot and a version of linux, which will boot the "dead" boards 
> perfectly fine.
> 
> 
> Based on my research so far, I am hopeful that I may be able to have uboot 
> start either eboot.nb0 or nk.nb0, and it won't crash the hardware in the 
> process (we don't have the resources to do more in depth troubleshooting of 
> the board design or re-write our software for the linux version).
> 
> 
> When I boot into winCE on the working boards, I get this:
> 
> 
> Copying NK image to RAM addresss 0xa020
> 
> and
> 
> Jumping to image at 0x0 (physical 0x7020)
> 
> (as well as a ton of other stuff I can post if needed)
> 
> 
> I've used fatload to put the nk.nb0 image to 0xa020, but when I try "go 
> 0xa02", all I get is "## Starting application at 0xa02)" and nothing.
> 

Try "dcache off", if the command exists.

> 
> I've also tried the same with eboot.nb0 in various memory addresses, and with 
> a random nk.nb0 I found online which had the appropriate start address just 
> to see if it was our files, and I got the same lack of output.
> 
> 
> I there any setting or feature I need to change in uboot to make this work? 
> I've found numerous examples of people online saying they've gotten this type 
> of thing to work, but can't seem to find any instructions on how to do it 
> other than use fatload and go.
> 
> 
> Thanks,
> 
> 
> -Michael
> 
> This message contains confidential information and is intended only for the 
> individual name.
> If you are not the addressee, you should delete this email, therefore do not 
> disseminate, distribute or copy this e-mail.
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[U-Boot] Booting into winCE .nb0 without access to source files

[Michael Newton]

Hi,


I have an awkward situation, short of it is we have a custom i.MX53 board, the 
nk.nb0 and eboot.nb0 files to boot into windows (with no source code), and an 
Ubuntu VM with the source code and compiled files of uboot from august 2009 (as 
well as some flavour of linux that I'm not 100% sure on). I need to figure out 
a way to boot into either the nk.nb0 or eboot.nb0 so that we can run our 
software.


Longer versions is that before I got to this company, they were buying an 
i.MX53 board from a 3rd party, and using that to assemble our product. When 
that 3rd party went out of business, my company bought the design and rights to 
it so that we could manufacture our own boards to sell and maintain our 
product. For some reason, we've had a very high rate of failure on the boards 
we've had manufactured, where 50%+ fail to do anything when powered on with the 
windows files and not even a single line appears on the com terminal link we 
use to debug (my theory is something on the board doesn't allow for enough 
current/voltage during start up, so it just hangs if it's below a certain 
threshold due to manufacturing variances). While going through some of the 
files we got from the other company, I found an Ubuntu VM image that contained 
uboot and a version of linux, which will boot the "dead" boards perfectly fine.


Based on my research so far, I am hopeful that I may be able to have uboot 
start either eboot.nb0 or nk.nb0, and it won't crash the hardware in the 
process (we don't have the resources to do more in depth troubleshooting of the 
board design or re-write our software for the linux version).


When I boot into winCE on the working boards, I get this:


Copying NK image to RAM addresss 0xa020

and

Jumping to image at 0x0 (physical 0x7020)

(as well as a ton of other stuff I can post if needed)


I've used fatload to put the nk.nb0 image to 0xa020, but when I try "go 
0xa02", all I get is "## Starting application at 0xa02)" and nothing.


I've also tried the same with eboot.nb0 in various memory addresses, and with a 
random nk.nb0 I found online which had the appropriate start address just to 
see if it was our files, and I got the same lack of output.


I there any setting or feature I need to change in uboot to make this work? 
I've found numerous examples of people online saying they've gotten this type 
of thing to work, but can't seem to find any instructions on how to do it other 
than use fatload and go.


Thanks,


-Michael

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individual name.
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disseminate, distribute or copy this e-mail.
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Re: [U-Boot] [PATCH 1/8] UBSAN: run-time undefined behavior sanity checker

[Eugeniu Rosca]

On Mon, Aug 20, 2018 at 03:00:31PM +, York Sun wrote:
> On 08/19/2018 05:04 PM, Eugeniu Rosca wrote:
> 
> > 
> > The size increase of sanbox U-Boot (gcc 8.1.0):
> > $ size u-boot.sandbox.*
> >textdata bss dec hex filename
> > 1234958   80048  291472 1606478  18834e u-boot.sandbox.default
> > 1422710  272240  291472 1986422  1e4f76 u-boot.sandbox.ubsan
> > +187752 +192192   0 +379944
> > 
> > The size increase of H3 Salvator-X U-Boot (aarch64-linux-gnu-gcc 7.2.1):
> > $ size u-boot.r8a7795-salvator-x.*
> >textdata bss dec hex filename
> >  589954   23504  263984  877442   d6382 
> > u-boot.r8a7795-salvator-x.default
> >  810968  103304  263984 1178256  11fa90 u-boot.r8a7795-salvator-x.ubsan
> > +221014  +79800   0 +300814
> >
> I wonder if SPL can take advantage of this. Size is sensitive for SPL.

To build SPL, below fix is required (will be squashed into v2):

diff --git a/lib/Makefile b/lib/Makefile
index 099a49032a02..0ae2c121cacf 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -18,9 +18,6 @@ obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
 obj-$(CONFIG_ARCH_AT91) += at91/
 obj-$(CONFIG_OPTEE) += optee/
 
-obj-$(CONFIG_UBSAN) += ubsan.o
-UBSAN_SANITIZE_ubsan.o := n
-
 obj-$(CONFIG_AES) += aes.o
 obj-y += charset.o
 obj-$(CONFIG_USB_TTY) += circbuf.o
@@ -54,6 +51,8 @@ endif
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
+obj-$(CONFIG_UBSAN) += ubsan.o
+UBSAN_SANITIZE_ubsan.o := n
 
 obj-$(CONFIG_$(SPL_)ZLIB) += zlib/
 obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o

With respect to the ELF/BIN size, I get below numbers using
sandbox_spl_defconfig:

$ size u-boot-spl.default u-boot-spl.ubsan
   textdata bss dec hex filename
  580975552 672   64321fb41 u-boot-spl.default
  74041   25456 672  100169   18749 u-boot-spl.ubsan

$ du -b u-boot-spl-nodtb.bin.default u-boot-spl-nodtb.bin.ubsan
2163064 u-boot-spl-nodtb.bin.default
2199352 u-boot-spl-nodtb.bin.ubsan

FWIW https://github.com/google/bloaty reports:

$ bloaty u-boot-spl.ubsan -- u-boot-spl.default
 VM SIZE  FILE SIZE
 ----
  [ = ]   0 .debug_info+41.8Ki  +6.7%
  +727% +19.4Ki .data  +19.4Ki  +727%
  [ = ]   0 .debug_loc +10.1Ki  +3.1%
   +32% +10.1Ki .text  +10.1Ki   +32%
  [ = ]   0 .debug_line+7.38Ki  +4.9%
   +46% +3.78Ki .rodata+3.78Ki   +46%
  [ = ]   0 .debug_abbrev  +2.25Ki  +2.6%
  [ = ]   0 .debug_str +1.63Ki  +3.1%
   +15% +1.56Ki .eh_frame  +1.56Ki   +15%
  [ = ]   0 .debug_ranges +880  +2.3%
  [ = ]   0 .symtab   +624  +4.2%
  [ = ]   0 .strtab   +548  +6.3%
  [ = ]   0 .debug_aranges+416  +2.4%
  [ = ]   0 [Unmapped]+416   +19%
  +6.7%+152 .eh_frame_hdr +152  +6.7%
   +37% +16 [LOAD [RX]]+16   +37%
   +55% +35.0Ki TOTAL   +101Ki  +7.3%

Except for some untreated UBs, I experienced no issues running
the sandbox SPL U-Boot.

> York

Best regards,
Eugeniu.
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Re: [U-Boot] [PATCH 2/2] spl: socfpga: stratix10: add hex file output for spl image

[Dalon L Westergreen]

On Mon, 2018-08-20 at 20:33 +0200, Marek Vasut wrote:
> On 08/20/2018 03:54 PM, Dalon Westergreen wrote:
> Stratix10 requires a hex image of the spl for boot.  The hex
> image is added to the FPGA configuration image and loaded to
> the processor memory by the configuration engine.
> 
> Signed-off-by: Dalon Westergreen 
> ---
>  scripts/Makefile.spl | 10 ++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
> index 76d08fd92b..c424f87e6e 100644
> --- a/scripts/Makefile.spl
> +++ b/scripts/Makefile.spl
> @@ -190,6 +190,7 @@ endif
>  ifdef CONFIG_ARCH_SOCFPGA
>  ALL-$(CONFIG_TARGET_SOCFPGA_GEN5)+= $(obj)/$(SPL_BIN).sfp
>  ALL-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += $(obj)/$(SPL_BIN).sfp
> +ALL-$(CONFIG_TARGET_SOCFPGA_STRATIX10)   += $(obj)/$(SPL_BIN).hex
>  endif
>  
>  ifdef CONFIG_ARCH_SUNXI
> @@ -299,6 +300,15 @@ OBJCOPYFLAGS_u-boot-x86-16bit-spl.bin := -O binary -j 
> .start16 -j .resetvec
>  $(obj)/u-boot-x86-16bit-spl.bin: $(obj)/u-boot-spl FORCE
>   $(call if_changed,objcopy)
>  
> +ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
> +OBJCOPYFLAGS_$(SPL_BIN).hex = -I binary -O ihex --change-addresses 0xffe0
> 
> Why is this --change-address needed ? This smells like a hack of some
> sort ...
> 
I believe the tool that uses this file expects this offset, that said i have not
tried using a hex file without this change address applied.  I will try without 
this, and see what happens.
> 
> +else
> +OBJCOPYFLAGS_$(SPL_BIN).hex = -I binary -O ihex
> +endif
> +
> +$(obj)/$(SPL_BIN).hex: $(obj)/$(SPL_BIN).bin FORCE
> + $(call if_changed,objcopy)
> +
>  LDFLAGS_$(SPL_BIN) += -T u-boot-spl.lds $(LDFLAGS_FINAL)
>  
>  # Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
> 
> 
> 
> 
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Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Marek Vasut]

On 08/20/2018 09:29 PM, Simon Glass wrote:
[...]

> So what is the conclusion here ? Patch the design document and apply
> this patch as is ?
>

 I think we should see Simon's comments before we move forward. The
 proposal I made before should come in a series, not just
 documentation.
>>>
>>> This thread is too long :-)
>>>
>>> From what I understand, Marek and Bin are discussing whether a
>>> compatible string is needed to bind a driver.
>>>
>>> Generally it is. But with PCI and USB we have a search mechanism which
>>> can be used instead.
>>>
>>> The patch Marek submitted does not seems at all desirable to me.
>>
>> Can you explain why ?
> 
> We already have a compatible string as the standard way to attach
> drivers to devices.
> 
> For PCI, we already have PCI_DEVICE() and friends for when we can
> attach a driver for a PCI device without using a compatible string.
> 
> Both of these are defined in the DT specification.
> 
> The patch seems to be a rework of PCI_DEVICE() and I cannot why it is 
> necessary.

This is explained in the patch description and the thread again. Please
read the thread before replying. Take a look at the r8a7794.dtsi and its
PCI bindings, there are PCI controller subnodes which add extra
information for PCI devices on the bus. These nodes do not have a
compatible string, only a BFD.

This is perfectly valid, since you can match a driver on the PCI IDs or
classes (PCI_DEVICE()), but the driver doesn't have a DT node associated
with it. If there is a DT node with a matching BFD, it is associated
with the driver instance by this patch.

This allows ie. the EHCI PCI driver to access that DT node and extract
information about PHYs from the DT (in case of the r8a7794).

[...]

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Simon Glass]

Hi Marek,

On 20 August 2018 at 12:42, Marek Vasut  wrote:
>
> On 08/20/2018 06:57 PM, Simon Glass wrote:
> > Hi Bin,
> >
> > On 16 August 2018 at 19:51, Bin Meng  wrote:
> >> Hi Marek,
> >>
> >> On Thu, Aug 16, 2018 at 7:47 PM, Marek Vasut  wrote:
> >>> On 08/15/2018 01:25 PM, Tom Rini wrote:
>  On Wed, Aug 15, 2018 at 06:19:25PM +0800, Bin Meng wrote:
> > Hi Marek,
> >
> > On Wed, Aug 15, 2018 at 5:22 PM, Marek Vasut  
> > wrote:
> >> On 08/14/2018 11:40 AM, Bin Meng wrote:
> >>> Hi Marek,
> >>>
> >>> On Tue, Aug 14, 2018 at 4:55 PM, Marek Vasut  
> >>> wrote:
>  On 08/14/2018 03:46 AM, Bin Meng wrote:
> > Hi Marek,
> >
> > On Mon, Aug 13, 2018 at 9:46 PM, Marek Vasut 
> >  wrote:
> >> On 08/13/2018 04:24 AM, Bin Meng wrote:
> >>> Hi Marek,
> >>>
> >>> On Fri, Aug 10, 2018 at 8:38 PM, Marek Vasut 
> >>>  wrote:
>  On 08/10/2018 02:01 PM, Tom Rini wrote:
> > On Wed, Aug 08, 2018 at 09:37:25PM +0200, Marek Vasut wrote:
> >> On 08/08/2018 05:32 PM, Bin Meng wrote:
> >>> Hi Marek,
> >>>
> >>> On Wed, Aug 8, 2018 at 10:33 PM, Marek Vasut 
> >>>  wrote:
>  On 08/08/2018 03:39 PM, Bin Meng wrote:
> > Hi Marek,
> >
> > On Wed, Aug 8, 2018 at 9:24 PM, Marek Vasut 
> >  wrote:
> >> On 08/08/2018 03:14 PM, Bin Meng wrote:
> >>> Hi Marek,
> >>>
> >>> On Wed, Aug 8, 2018 at 9:03 PM, Marek Vasut 
> >>>  wrote:
>  The PCI controller can have DT subnodes describing extra 
>  properties
>  of particular PCI devices, ie. a PHY attached to an EHCI 
>  controller
>  on a PCI bus. This patch parses those DT subnodes and 
>  assigns a node
>  to the PCI device instance, so that the driver can 
>  extract details
>  from that node and ie. configure the PHY using the PHY 
>  subsystem.
> 
>  Signed-off-by: Marek Vasut 
>  
>  Cc: Simon Glass 
>  ---
>   drivers/pci/pci-uclass.c | 14 ++
>   1 file changed, 14 insertions(+)
> 
>  diff --git a/drivers/pci/pci-uclass.c 
>  b/drivers/pci/pci-uclass.c
>  index 46e9c71bdf..306bea0dbf 100644
>  --- a/drivers/pci/pci-uclass.c
>  +++ b/drivers/pci/pci-uclass.c
>  @@ -662,6 +662,8 @@ static int 
>  pci_find_and_bind_driver(struct udevice *parent,
>  for (id = entry->match;
>   id->vendor || id->subvendor || 
>  id->class_mask;
>   id++) {
>  +   ofnode node;
>  +
>  if (!pci_match_one_id(id, 
>  find_id))
>  continue;
> 
>  @@ -691,6 +693,18 @@ static int 
>  pci_find_and_bind_driver(struct udevice *parent,
>  goto error;
>  debug("%s: Match found: %s\n", 
>  __func__, drv->name);
>  dev->driver_data = 
>  find_id->driver_data;
>  +
>  +   dev_for_each_subnode(node, 
>  parent) {
>  +   phys_addr_t df, size;
>  +   df = 
>  ofnode_get_addr_size(node, "reg", );
>  +
>  +   if (PCI_FUNC(df) == 
>  PCI_FUNC(bdf) &&
>  +   PCI_DEV(df) == 
>  PCI_DEV(bdf)) {
>  +   dev->node = node;
>  +   break;
>  +   }
> >>>
> >>> The function pci_find_and_bind_driver() is supposed to 
> >>> bind devices
> >>> that are NOT in the device tree. Adding device tree 
> >>> access in this
> >>> routine is quite 

[U-Boot] [RESEND PATCH v9 01/18] Revert "efi_loader: Rename sections to allow for implicit data"

[Simon Glass]

This partially reverts commit 7e21fbca26d18327cf7cabaad08df276a06a07d8.

That change broke sandbox EFI support for unknown reasons. It also changes
sandbox to use--gc-sections which we don't want.

For now I am just reverting the sandbox portion as presumably this change
is safe on other architectures.

Fixes: 7e21fbca26 (efi_loader: Rename sections to allow for implicit data)
Signed-off-by: Simon Glass 
---

Changes in v9:
- Add revert for "efi_loader: Rename sections to allow for implicit data"

Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/sandbox/config.mk  | 3 ---
 arch/sandbox/cpu/u-boot.lds | 9 -
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk
index 5e7077bfe75..2babcde8815 100644
--- a/arch/sandbox/config.mk
+++ b/arch/sandbox/config.mk
@@ -5,9 +5,6 @@ PLATFORM_CPPFLAGS += -D__SANDBOX__ -U_FORTIFY_SOURCE
 PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM
 PLATFORM_LIBS += -lrt
 
-LDFLAGS_FINAL += --gc-sections
-PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
-
 # Define this to avoid linking with SDL, which requires SDL libraries
 # This can solve 'sdl-config: Command not found' errors
 ifneq ($(NO_SDL),)
diff --git a/arch/sandbox/cpu/u-boot.lds b/arch/sandbox/cpu/u-boot.lds
index 727bcc35981..3a6cf55eb99 100644
--- a/arch/sandbox/cpu/u-boot.lds
+++ b/arch/sandbox/cpu/u-boot.lds
@@ -24,9 +24,8 @@ SECTIONS
}
 
.efi_runtime : {
-   *(.text.efi_runtime*)
-   *(.rodata.efi_runtime*)
-   *(.data.efi_runtime*)
+   *(efi_runtime_text)
+   *(efi_runtime_data)
}
 
.__efi_runtime_stop : {
@@ -39,8 +38,8 @@ SECTIONS
}
 
.efi_runtime_rel : {
-   *(.rel*.efi_runtime)
-   *(.rel*.efi_runtime.*)
+   *(.relefi_runtime_text)
+   *(.relefi_runtime_data)
}
 
.efi_runtime_rel_stop :
-- 
2.18.0.865.gffc8e1a3cd6-goog

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Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Marek Vasut]

On 08/20/2018 06:57 PM, Simon Glass wrote:
> Hi Bin,
> 
> On 16 August 2018 at 19:51, Bin Meng  wrote:
>> Hi Marek,
>>
>> On Thu, Aug 16, 2018 at 7:47 PM, Marek Vasut  wrote:
>>> On 08/15/2018 01:25 PM, Tom Rini wrote:
 On Wed, Aug 15, 2018 at 06:19:25PM +0800, Bin Meng wrote:
> Hi Marek,
>
> On Wed, Aug 15, 2018 at 5:22 PM, Marek Vasut  
> wrote:
>> On 08/14/2018 11:40 AM, Bin Meng wrote:
>>> Hi Marek,
>>>
>>> On Tue, Aug 14, 2018 at 4:55 PM, Marek Vasut  
>>> wrote:
 On 08/14/2018 03:46 AM, Bin Meng wrote:
> Hi Marek,
>
> On Mon, Aug 13, 2018 at 9:46 PM, Marek Vasut  
> wrote:
>> On 08/13/2018 04:24 AM, Bin Meng wrote:
>>> Hi Marek,
>>>
>>> On Fri, Aug 10, 2018 at 8:38 PM, Marek Vasut 
>>>  wrote:
 On 08/10/2018 02:01 PM, Tom Rini wrote:
> On Wed, Aug 08, 2018 at 09:37:25PM +0200, Marek Vasut wrote:
>> On 08/08/2018 05:32 PM, Bin Meng wrote:
>>> Hi Marek,
>>>
>>> On Wed, Aug 8, 2018 at 10:33 PM, Marek Vasut 
>>>  wrote:
 On 08/08/2018 03:39 PM, Bin Meng wrote:
> Hi Marek,
>
> On Wed, Aug 8, 2018 at 9:24 PM, Marek Vasut 
>  wrote:
>> On 08/08/2018 03:14 PM, Bin Meng wrote:
>>> Hi Marek,
>>>
>>> On Wed, Aug 8, 2018 at 9:03 PM, Marek Vasut 
>>>  wrote:
 The PCI controller can have DT subnodes describing extra 
 properties
 of particular PCI devices, ie. a PHY attached to an EHCI 
 controller
 on a PCI bus. This patch parses those DT subnodes and 
 assigns a node
 to the PCI device instance, so that the driver can extract 
 details
 from that node and ie. configure the PHY using the PHY 
 subsystem.

 Signed-off-by: Marek Vasut 
 Cc: Simon Glass 
 ---
  drivers/pci/pci-uclass.c | 14 ++
  1 file changed, 14 insertions(+)

 diff --git a/drivers/pci/pci-uclass.c 
 b/drivers/pci/pci-uclass.c
 index 46e9c71bdf..306bea0dbf 100644
 --- a/drivers/pci/pci-uclass.c
 +++ b/drivers/pci/pci-uclass.c
 @@ -662,6 +662,8 @@ static int 
 pci_find_and_bind_driver(struct udevice *parent,
 for (id = entry->match;
  id->vendor || id->subvendor || 
 id->class_mask;
  id++) {
 +   ofnode node;
 +
 if (!pci_match_one_id(id, find_id))
 continue;

 @@ -691,6 +693,18 @@ static int 
 pci_find_and_bind_driver(struct udevice *parent,
 goto error;
 debug("%s: Match found: %s\n", 
 __func__, drv->name);
 dev->driver_data = 
 find_id->driver_data;
 +
 +   dev_for_each_subnode(node, parent) 
 {
 +   phys_addr_t df, size;
 +   df = 
 ofnode_get_addr_size(node, "reg", );
 +
 +   if (PCI_FUNC(df) == 
 PCI_FUNC(bdf) &&
 +   PCI_DEV(df) == 
 PCI_DEV(bdf)) {
 +   dev->node = node;
 +   break;
 +   }
>>>
>>> The function pci_find_and_bind_driver() is supposed to bind 
>>> devices
>>> that are NOT in the device tree. Adding device tree access 
>>> in this
>>> routine is quite odd. You can add the EHCI controller that 
>>> need such
>>> PHY subnodes in the device tree and there is no need to 
>>> modify
>>> anything I believe. If you are looking for an example, 
>>> please check
>>> pciuart0 in 

Re: [U-Boot] [PATCH 2/2] spl: socfpga: stratix10: add hex file output for spl image

[Marek Vasut]

On 08/20/2018 03:54 PM, Dalon Westergreen wrote:
> Stratix10 requires a hex image of the spl for boot.  The hex
> image is added to the FPGA configuration image and loaded to
> the processor memory by the configuration engine.
> 
> Signed-off-by: Dalon Westergreen 
> ---
>  scripts/Makefile.spl | 10 ++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
> index 76d08fd92b..c424f87e6e 100644
> --- a/scripts/Makefile.spl
> +++ b/scripts/Makefile.spl
> @@ -190,6 +190,7 @@ endif
>  ifdef CONFIG_ARCH_SOCFPGA
>  ALL-$(CONFIG_TARGET_SOCFPGA_GEN5)+= $(obj)/$(SPL_BIN).sfp
>  ALL-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += $(obj)/$(SPL_BIN).sfp
> +ALL-$(CONFIG_TARGET_SOCFPGA_STRATIX10)   += $(obj)/$(SPL_BIN).hex
>  endif
>  
>  ifdef CONFIG_ARCH_SUNXI
> @@ -299,6 +300,15 @@ OBJCOPYFLAGS_u-boot-x86-16bit-spl.bin := -O binary -j 
> .start16 -j .resetvec
>  $(obj)/u-boot-x86-16bit-spl.bin: $(obj)/u-boot-spl FORCE
>   $(call if_changed,objcopy)
>  
> +ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
> +OBJCOPYFLAGS_$(SPL_BIN).hex = -I binary -O ihex --change-addresses 0xffe0

Why is this --change-address needed ? This smells like a hack of some
sort ...

> +else
> +OBJCOPYFLAGS_$(SPL_BIN).hex = -I binary -O ihex
> +endif
> +
> +$(obj)/$(SPL_BIN).hex: $(obj)/$(SPL_BIN).bin FORCE
> + $(call if_changed,objcopy)
> +
>  LDFLAGS_$(SPL_BIN) += -T u-boot-spl.lds $(LDFLAGS_FINAL)
>  
>  # Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
> 


-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH] u-boot: align cache flushes in load_elf_image_shdr to line boundaries

[Neil Stainton]

Prevent cache warning messages when using the 'bootelf' command on an Arm 
target. Round down each section start address and round up the respective 
section end to the nearest cache line.

---
Currently when using bootelf to load an image on Arm, several warnings such as 
the following appear in the console:
  CACHE: Misaligned operation at range [8780, 8783c5e0]
  CACHE: Misaligned operation at range [8783c5e0, 8784b3e0]

Signed-off-by: Neil Stainton 

---
 cmd/elf.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/cmd/elf.c b/cmd/elf.c
index eafea38..1199e5d 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -141,7 +141,9 @@ static unsigned long load_elf_image_shdr(unsigned long addr)
memcpy((void *)(uintptr_t)shdr->sh_addr,
   (const void *)image, shdr->sh_size);
}
-   flush_cache(shdr->sh_addr, shdr->sh_size);
+   flush_cache(rounddown(shdr->sh_addr, ARCH_DMA_MINALIGN),
+   roundup((shdr->sh_addr + shdr->sh_size), 
ARCH_DMA_MINALIGN) -
+   rounddown(shdr->sh_addr, ARCH_DMA_MINALIGN));
}
 
return ehdr->e_entry;
-- 
2.7.4

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Re: [U-Boot] [PATCH 1/8] UBSAN: run-time undefined behavior sanity checker

[Tom Rini]

On Mon, Aug 20, 2018 at 02:54:09PM +0200, Eugeniu Rosca wrote:
> Hi Tom,
> 
> On Sun, Aug 19, 2018 at 09:51:32PM -0400, Tom Rini wrote:
> > On Mon, Aug 20, 2018 at 02:00:25AM +0200, Eugeniu Rosca wrote:
> [..]
> > > To enable UBSAN, two prerequisites must be met from Kconfig perspective:
> > >  - ARCH has to select CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL
> > >  - defconfig has to enable CONFIG_UBSAN
> > > 
> > > This commit selects CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL for SANDBOX and
> > > ARM64 (r8a7795_salvator-x_defconfig is the only tested ARM64 platform).
> > > No defconfig changes are expected, since UBSAN is a development (not
> > > production) option. With CONFIG_UBSAN disabled, no functional change
> > > is expected from this commit.
> > > 
> > > The size increase of sanbox U-Boot (gcc 8.1.0):
> > > $ size u-boot.sandbox.*
> > >text  data bss dec hex filename
> > > 1234958 80048  291472 1606478  18834e u-boot.sandbox.default
> > > 1422710272240  291472 1986422  1e4f76 u-boot.sandbox.ubsan
> > > +187752 +192192   0 +379944
> > > 
> > > The size increase of H3 Salvator-X U-Boot (aarch64-linux-gnu-gcc 7.2.1):
> > > $ size u-boot.r8a7795-salvator-x.*
> > >text  data bss dec hex filename
> > >  589954 23504  263984  877442   d6382 
> > > u-boot.r8a7795-salvator-x.default
> > >  810968103304  263984 1178256  11fa90 u-boot.r8a7795-salvator-x.ubsan
> > > +221014  +79800   0 +300814
> > 
> > Can we re-work this so that there isn't a size increase unless UBSAN is
> > enabled?  I ask since I think for a v2 we should be able to say more
> > broadly that just about everyone can enable this, but only out of the
> > box sandbox should.
> 
> Sorry for the confusion. This commit alone does not contribute with any
> U-Boot binary size increase. The numbers provided above assume enabling
> and disabling CONFIG_UBSAN by hand via menuconfig/defconfig. I could
> relocate the numbers to a separate patch updating the sandbox_defconfig,
> if UBSAN is wanted there by default. That said, I think the contents of
> this commit already complies with your particular request stated above.

Ah, ok.  I think it should be a bit split up into introducing framework
and then enabling on sandbox, and that's where we show the size
increase.  But I do also think we should be able to enable the framework
on most targets.

-- 
Tom


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[U-Boot] U-Boot RPI bmp display isn't visible

[Christian Nienhaus]

Hello community,

thank you for providing such a good software. I hope this is the right way to 
get help.

I successfully run my RPI3b with u-boot and buildroot. I have attached the 
official 7“ touch display for the rpi. Which also works fine in linux.

When I want to display a bmp on the display in u-boot nothing is displayed and 
no error is shown.


The following is the output on the serial console and also on the display:

```
U-Boot 2018.07 (Aug 20 2018 - 17:00:45 +0200)

DRAM:  768 MiB
RPI 3 Model B (0xa02082)
MMC:   mmc@7e202000: 0, sdhci@7e30: 1
Loading Environment from FAT... OK
In:serial
Out:   vidconsole
Err:   vidconsole
Net:   No ethernet found.
starting USB...
USB0:   Core Release: 2.80a
scanning bus 0 for devices... 3 USB Device(s) found
   scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autobot:  0
U-Boot> lcdputs hello
U-Boot> load mmc 0:7 $kernel_addr_r /splash-l32.bmp
1152054 bytes read in 50 ms (22 MiB/s)
U-Boot> bmp display $kernel_addr_r || echo error
U-Boot>
```

The console output and also lcdputs works on the display, but bmp display does 
nothing and don’t print error.


This is my u-boot defconfig:

```
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x8000
CONFIG_TARGET_RPI_3_32B=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_LOGLEVEL=7
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_BMP=y
CONFIG_OF_EMBED=y
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DM_KEYBOARD=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_LAN78XX=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_PHYS_TO_BUS=y
CONFIG_OF_LIBFDT_OVERLAY=y
```

Thanks in advance

Christian Nienhaus


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Re: [U-Boot] arm: omap: configs: various: Remove references to OMAP34XX_UARTx

[Tom Rini]

On Mon, Aug 20, 2018 at 07:45:16AM -0500, Adam Ford wrote:
> On Mon, Aug 20, 2018 at 6:21 AM Tom Rini  wrote:
> >
> > On Tue, Aug 07, 2018 at 07:28:11AM -0500, Adam Ford wrote:
> >
> > > Two boards include a reference to ti_omap3_common.h which
> > > points the UART driver to OMAP34XX_UARTx so the extra define
> > > should be unnecessary.
> > >
> > > Signed-off-by: Adam Ford 
> > > ---
> > >  include/configs/omap3_evm.h | 1 -
> > >  include/configs/omap3_pandora.h | 1 -
> > >  2 files changed, 2 deletions(-)
> > >
> > > diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
> > > index 34418309cb..779087a949 100644
> > > --- a/include/configs/omap3_evm.h
> > > +++ b/include/configs/omap3_evm.h
> > > @@ -34,7 +34,6 @@
> > >  #define CONFIG_REVISION_TAG
> > >
> > >  /* Override OMAP3 serial console configuration */
> > > -#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
> > >
> > >  /* NAND */
> > >  #if defined(CONFIG_NAND)
> > > diff --git a/include/configs/omap3_pandora.h 
> > > b/include/configs/omap3_pandora.h
> > > index 68e1d6f82d..1fc40e05ff 100644
> > > --- a/include/configs/omap3_pandora.h
> > > +++ b/include/configs/omap3_pandora.h
> > > @@ -36,7 +36,6 @@
> > >  #define CONFIG_SYS_NS16550_SERIAL
> > >  #define CONFIG_SYS_NS16550_REG_SIZE  (-4)
> > >  #define CONFIG_SYS_NS16550_CLK   V_NS16550_CLK
> > > -#define CONFIG_SYS_NS16550_COM3  OMAP34XX_UART3
> > >
> > >  /* commands to include */
> >
> > This results in:
> > +(omap3_pandora) ../drivers/serial/serial_ns16550.c:31:2: error: #error 
> > "Console port 3 defined but not configured."
> > +(omap3_pandora)  #error "Console port 3 defined but not configured."
> > +(omap3_pandora)   ^
> > +(omap3_pandora) make[2]: *** [../scripts/Makefile.build:279: 
> > drivers/serial/serial_ns16550.o] Error 1
> > +(omap3_pandora) make[1]: *** [Makefile:1373: drivers/serial] Error 2
> 
> argh.  I made the assumption that people who include ti_omap3_common.h
> migrated to DM.
>  I could go back and modify ti_omap3_common.h to wrap
> the  CONFIG_SYS_NS16550_COMx entries under #if !defined(DM_SERIAL)
> instead of CONFIG_SPL_BUILD
> 
> Do you have an opinion?  I may not get back to this before I leave on
> my trip, but I can take a look again in 2 weeks when I return.
> 
> Wasn't there a requirement that we need to move all boards to support
> CONFIG_DM at one point?

Yes, things should get moved to DM.  So, adding the omap3_pandora listed
maintainer to the email.

-- 
Tom


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Re: [U-Boot] ARM: display5: config: Replace hardcoded size of kernel (0x2000) with variable (fitImg_fw_sz)

[Tom Rini]

On Sat, Aug 18, 2018 at 10:22:07PM +0200, Lukasz Majewski wrote:

> This cosmetic change allow easy adjustment of the to-load kernel size if
> needed.
> 
> Signed-off-by: Lukasz Majewski 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] ARM: da850evm: Enable SPL_SYS_MALLOC_SIMPLE

[Tom Rini]

On Fri, Aug 10, 2018 at 04:07:47PM -0500, Adam Ford wrote:

> The SPL space is limited.  In order to try to enable DM in SPL,
> we need more space. When combined wtih TINY_PRINTF, this reduces
> the size of SPL by 6.5k
> 
> Original:
> 
>text  data bss dec hex filename
>   20760  1216  80   220565628 spl/u-boot-spl
> 
> Tiny Printf
>text  data bss dec hex filename
>   17947  1216  80   192434b2b spl/u-boot-spl
> 
> Malloc Simple + Tiny Printf
>text  data bss dec hex filename
>   15187   176  28   153913c1f spl/u-boot-spl
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
> index 46d0644254..24e02a7004 100644

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [U-Boot, v4, 1/2] common: Add support for Android DT image

[Tom Rini]

On Thu, Aug 16, 2018 at 11:34:12PM +0300, Sam Protsenko wrote:

> Android documentation recommends new image format for storing DTB/DTBO
> files: [1]. To support that format, this patch adds helper functions for
> Android DTB/DTBO format. In image-android-dt.* files you can find helper
> functions to work with Android DT image format, such us routines for:
> - printing the dump of image structure
> - getting the address and size of desired dtb/dtbo file
> 
> This patch uses dt_table.h file, that was added in commit 643cefa4d848
> ("Import Android's dt_table.h for DT image format") by Alex Deymo.
> 
> [1] https://source.android.com/devices/architecture/dto/partitions
> 
> Signed-off-by: Sam Protsenko 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] doc: FIT image: fix typo

[Tom Rini]

On Sat, Aug 18, 2018 at 03:51:25PM +0200, Pierre-Jean Texier wrote:

> Fix typo in beaglebone verified boot documentation.
> 
> Signed-off-by: Pierre-Jean Texier 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] spl: fix debug print in spl_common_init()

[Tom Rini]

On Mon, Aug 13, 2018 at 11:24:05AM +0200, Simon Goldschmidt wrote:

> spl_common_init() debug-prints "spl_early_init()\n" but it is
> called both from spl_early_init() and spl_init().
> 
> Fix this by moving the debug() statement to the calling functions
> which now print their name.
> 
> Signed-off-by: Simon Goldschmidt 
> Reviewed-by: Philipp Tomsich 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [U-Boot,v4,2/2] cmd: Add dtimg command

[Tom Rini]

On Thu, Aug 16, 2018 at 11:34:13PM +0300, Sam Protsenko wrote:

> dtimg command allows user to work with Android DTB/DTBO image format.
> Such as, getting the address of desired DTB/DTBO file, printing the dump
> of the image in U-Boot shell, etc.
> 
> This command is needed to provide Android boot with new Android DT image
> format further.
> 
> Signed-off-by: Sam Protsenko 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] ARM: da850evm: Enable USE_TINY_PRINTF

[Tom Rini]

On Fri, Aug 10, 2018 at 03:53:41PM -0500, Adam Ford wrote:

> The SPL space is limited.  In order to try to enable DM in SPL,
> we need more space. This reduces the size of SPL by ~2.7K
> 
> before:
>text  data bss dec hex filename
>   20760  1216  80   220565628 spl/u-boot-spl
> after:
>text  data bss dec hex filename
>   17947  1216  80   192434b2b spl/u-boot-spl
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
> index 4242728e6a..46d0644254 100644

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] fs/fat: debug-print file read position during file_fat_read_at()

[Tom Rini]

On Mon, Aug 13, 2018 at 09:35:15PM -0500, Andreas Dannenberg wrote:

> In order to make the debug print in file_fat_read_at() a tad more useful,
> show the offset the file is being read at alongside the filename.
> 
> Suggested-by: Tero Kristo 
> Signed-off-by: Andreas Dannenberg 
> Reviewed-by: Heinrich Schuchardt 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] ARM: da8xxevm: README: Add NOR booting instructions

[Tom Rini]

On Sat, Aug 11, 2018 at 07:34:55AM -0500, Adam Ford wrote:

> The da850evm with its UI expander board can boot XIP boot from
> NOR flash.  This adds the instructions to the readme. file.
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/board/davinci/da8xxevm/README.da850 
> b/board/davinci/da8xxevm/README.da850
> index 519267e2f0..f24e8b5342 100644

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] configs: da850evm: Remove DM_I2C_COMPAT

[Tom Rini]

On Fri, Aug 10, 2018 at 05:24:12AM -0500, Adam Ford wrote:

> Since using DM_I2C_COMPAT throws a warning during compilation,
> and it isn't really needed any longer, so this patch removes
> this feature and shrinks the code a bit.
> 
> from:
>text  data bss dec hex filename
>  343326 13388  123448  480162   753a2 u-boot
> 
> to:
>text  data bss dec hex filename
>  342924 13380  123440  479744   75200 u-boot
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
> index ea56d01344..56d87334a7 100644

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [U-Boot, V2] drivers: regulator: fixed: add u-boot, off-on-delay-us

[Tom Rini]

On Thu, Jul 26, 2018 at 07:47:24PM +0800, Peng Fan wrote:

> Add u-boot,off-on-delay-us for fixed regulator.
> 
> Depends on board design, the gpio regulator sometimes
> connects with a big capacitance. When need to off, then
> on the regulator, if there is no enough delay,
> the voltage does not drop to 0, so introduce this
> property to handle such case.
> 
> Signed-off-by: Peng Fan 
> Reviewed-by: Simon Glass 
> Cc: Masahiro Yamada 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH] ARM: display5: config: Replace hardcoded size of kernel (0x2000) with variable (fitImg_fw_sz)

[Tom Rini]

On Mon, Aug 20, 2018 at 12:57:26PM -0300, Fabio Estevam wrote:

> Hi Lukasz,
> 
> On Sat, Aug 18, 2018 at 5:22 PM, Lukasz Majewski  wrote:
> > This cosmetic change allow easy adjustment of the to-load kernel size if
> > needed.
> >
> > Signed-off-by: Lukasz Majewski 
> 
> Looks good:
> 
> Reviewed-by: Fabio Estevam 
> 
> Only minor nit is that the Subject like looks excessively large.
> 
> It could be something more succinct like:
> 
> display5: Introduce fitImg_fw_sz variable

No need to v2 this 'tho, since it's small and from the listed maintainer
I grabbed it and am about to push (but I'll re-word to add the R-b tag).

-- 
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Re: [U-Boot] [PATCH v2 0/6] musb-new: Improve shutdown code

[Jagan Teki]

On Mon, Aug 13, 2018 at 4:33 PM, Chen-Yu Tsai  wrote:
> On Fri, Jul 20, 2018 at 3:13 PM, Jagan Teki  
> wrote:
>> This is v2 for previous series[1], by excluding sunxi phy changes.
>>
>> One patch mark it as 'RFC' about "including UCLASS_USB_DEV_GENERIC
>> into shutdown caller" so expecting some inputs on the same
>>
>> [1] https://patchwork.ozlabs.org/cover/941588/
>>
>> Jagan Teki (6):
>>   usb: musb-new: Fix improper musb host pointer
>>   usb: musb-new: sunxi: Allocate struct phy in private
>>   dm: usb: Add UCLASS_USB_DEV_GENERIC shutdown
>>   musb-new: sunxi: Access ahb_reset0_cfg via ccm offset
>>   usb: musb-new: sunxi: Add proper musb exit support
>>   usb: musb-new: Call musb_platform_exit from musb_stop
>>
>>  board/compulab/cm_t3517/cm_t3517.c |   4 +-
>>  drivers/usb/host/usb-uclass.c  |  43 
>>  drivers/usb/musb-new/musb_core.c   |   1 +
>>  drivers/usb/musb-new/musb_uboot.c  |  12 ++--
>>  drivers/usb/musb-new/pic32.c   |   6 +-
>>  drivers/usb/musb-new/sunxi.c   | 107 ++---
>>  include/linux/usb/musb.h   |   4 +-
>>  7 files changed, 123 insertions(+), 54 deletions(-)
>>
>> --
>> 2.17.1
>>
>
> Tested-by: Chen-Yu Tsai 
>
> on A33-OlinuXino. This fixes the abort when starting the boot sequence.

Does it fixes w/o 3/6? because it an RFC and still in discussion
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Re: [U-Boot] [PATCH] pci: Support parsing PCI controller DT subnodes

[Simon Glass]

Hi Bin,

On 16 August 2018 at 19:51, Bin Meng  wrote:
> Hi Marek,
>
> On Thu, Aug 16, 2018 at 7:47 PM, Marek Vasut  wrote:
>> On 08/15/2018 01:25 PM, Tom Rini wrote:
>>> On Wed, Aug 15, 2018 at 06:19:25PM +0800, Bin Meng wrote:
 Hi Marek,

 On Wed, Aug 15, 2018 at 5:22 PM, Marek Vasut  wrote:
> On 08/14/2018 11:40 AM, Bin Meng wrote:
>> Hi Marek,
>>
>> On Tue, Aug 14, 2018 at 4:55 PM, Marek Vasut  
>> wrote:
>>> On 08/14/2018 03:46 AM, Bin Meng wrote:
 Hi Marek,

 On Mon, Aug 13, 2018 at 9:46 PM, Marek Vasut  
 wrote:
> On 08/13/2018 04:24 AM, Bin Meng wrote:
>> Hi Marek,
>>
>> On Fri, Aug 10, 2018 at 8:38 PM, Marek Vasut  
>> wrote:
>>> On 08/10/2018 02:01 PM, Tom Rini wrote:
 On Wed, Aug 08, 2018 at 09:37:25PM +0200, Marek Vasut wrote:
> On 08/08/2018 05:32 PM, Bin Meng wrote:
>> Hi Marek,
>>
>> On Wed, Aug 8, 2018 at 10:33 PM, Marek Vasut 
>>  wrote:
>>> On 08/08/2018 03:39 PM, Bin Meng wrote:
 Hi Marek,

 On Wed, Aug 8, 2018 at 9:24 PM, Marek Vasut 
  wrote:
> On 08/08/2018 03:14 PM, Bin Meng wrote:
>> Hi Marek,
>>
>> On Wed, Aug 8, 2018 at 9:03 PM, Marek Vasut 
>>  wrote:
>>> The PCI controller can have DT subnodes describing extra 
>>> properties
>>> of particular PCI devices, ie. a PHY attached to an EHCI 
>>> controller
>>> on a PCI bus. This patch parses those DT subnodes and 
>>> assigns a node
>>> to the PCI device instance, so that the driver can extract 
>>> details
>>> from that node and ie. configure the PHY using the PHY 
>>> subsystem.
>>>
>>> Signed-off-by: Marek Vasut 
>>> Cc: Simon Glass 
>>> ---
>>>  drivers/pci/pci-uclass.c | 14 ++
>>>  1 file changed, 14 insertions(+)
>>>
>>> diff --git a/drivers/pci/pci-uclass.c 
>>> b/drivers/pci/pci-uclass.c
>>> index 46e9c71bdf..306bea0dbf 100644
>>> --- a/drivers/pci/pci-uclass.c
>>> +++ b/drivers/pci/pci-uclass.c
>>> @@ -662,6 +662,8 @@ static int 
>>> pci_find_and_bind_driver(struct udevice *parent,
>>> for (id = entry->match;
>>>  id->vendor || id->subvendor || 
>>> id->class_mask;
>>>  id++) {
>>> +   ofnode node;
>>> +
>>> if (!pci_match_one_id(id, find_id))
>>> continue;
>>>
>>> @@ -691,6 +693,18 @@ static int 
>>> pci_find_and_bind_driver(struct udevice *parent,
>>> goto error;
>>> debug("%s: Match found: %s\n", 
>>> __func__, drv->name);
>>> dev->driver_data = 
>>> find_id->driver_data;
>>> +
>>> +   dev_for_each_subnode(node, parent) {
>>> +   phys_addr_t df, size;
>>> +   df = 
>>> ofnode_get_addr_size(node, "reg", );
>>> +
>>> +   if (PCI_FUNC(df) == 
>>> PCI_FUNC(bdf) &&
>>> +   PCI_DEV(df) == 
>>> PCI_DEV(bdf)) {
>>> +   dev->node = node;
>>> +   break;
>>> +   }
>>
>> The function pci_find_and_bind_driver() is supposed to bind 
>> devices
>> that are NOT in the device tree. Adding device tree access 
>> in this
>> routine is quite odd. You can add the EHCI controller that 
>> need such
>> PHY subnodes in the device tree and there is no need to 
>> modify
>> anything I believe. If you are looking for an example, 
>> please check
>> pciuart0 in arch/x86/dts/crownbay.dts.
>
> Well this does not work for me, the EHCI PCI doesn't get a DT 
> node
> assigned, check 

[U-Boot] [PATCH v3.2 14/58] musb-new: sunxi: Use CLK and RESET support

[Jagan Teki]

Now clock and reset drivers are available for respective
SoC's so use clk and reset ops on musb driver.

Signed-off-by: Jagan Teki 
---
Changes for v3.2:
- add has_reset bool in existing driver data
Changes for v3.1:
- droped unused variables
- add flags for checking reset require or not
- handle clk and reset errors properly

 drivers/usb/musb-new/sunxi.c | 101 ---
 1 file changed, 69 insertions(+), 32 deletions(-)

diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 9f71b84fd1..6d92cf83b1 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -16,9 +16,11 @@
  * This file is part of the Inventra Controller Driver for Linux.
  */
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -72,22 +74,26 @@
 #define  USBC_BP_ISCR_ID_CHANGE_DETECT_EN  1
 #define  USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN0
 
+/* flags */
+#define SUNXI_MUSB_FL_HAS_RESET0
+
 /**
  * From usbc/usbc.c
  
**/
 
 struct sunxi_musb_config {
struct musb_hdrc_config *config;
-   u8 rst_bit;
-   u8 clkgate_bit;
+   bool has_reset;
 };
 
 struct sunxi_glue {
struct musb_host_data mdata;
-   struct sunxi_ccm_reg *ccm;
struct sunxi_musb_config *cfg;
struct device dev;
struct phy phy;
+   struct clk clk;
+   struct reset_ctl rst;
+   unsigned long flags;
 };
 #define to_sunxi_glue(d)   container_of(d, struct sunxi_glue, dev)
 
@@ -291,25 +297,28 @@ static int sunxi_musb_init(struct musb *musb)
 
pr_debug("%s():\n", __func__);
 
+   ret = clk_enable(>clk);
+   if (ret) {
+   dev_err(dev, "failed to enable clock\n");
+   return ret;
+   }
+
+   if (test_bit(SUNXI_MUSB_FL_HAS_RESET, >flags)) {
+   ret = reset_deassert(>rst);
+   if (ret) {
+   dev_err(dev, "failed to deassert reset\n");
+   goto err_clk;
+   }
+   }
+
ret = generic_phy_init(>phy);
if (ret) {
pr_err("failed to init USB PHY\n");
-   return ret;
+   goto err_rst;
}
 
musb->isr = sunxi_musb_interrupt;
 
-   setbits_le32(>ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
-   if (glue->cfg->clkgate_bit)
-   setbits_le32(>ccm->ahb_gate0,
-BIT(glue->cfg->clkgate_bit));
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-   setbits_le32(>ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));
-   if (glue->cfg->rst_bit)
-   setbits_le32(>ccm->ahb_reset0_cfg,
-BIT(glue->cfg->rst_bit));
-#endif
-
USBC_ConfigFIFO_Base();
USBC_EnableDpDmPullUp(musb->mregs);
USBC_EnableIdPullUp(musb->mregs);
@@ -324,6 +333,13 @@ static int sunxi_musb_init(struct musb *musb)
USBC_ForceVbusValidToHigh(musb->mregs);
 
return 0;
+
+err_rst:
+   if (test_bit(SUNXI_MUSB_FL_HAS_RESET, >flags))
+   reset_assert(>rst);
+err_clk:
+   clk_disable(>clk);
+   return ret;
 }
 
 static int sunxi_musb_exit(struct musb *musb)
@@ -339,16 +355,19 @@ static int sunxi_musb_exit(struct musb *musb)
}
}
 
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-   clrbits_le32(>ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));
-   if (glue->cfg->rst_bit)
-   clrbits_le32(>ccm->ahb_reset0_cfg,
-BIT(glue->cfg->rst_bit));
-#endif
-   clrbits_le32(>ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
-   if (glue->cfg->clkgate_bit)
-   clrbits_le32(>ccm->ahb_gate0,
-BIT(glue->cfg->clkgate_bit));
+   if (test_bit(SUNXI_MUSB_FL_HAS_RESET, >flags)) {
+   ret = reset_assert(>rst);
+   if (ret) {
+   dev_err(dev, "failed to deassert reset\n");
+   return ret;
+   }
+   }
+
+   ret = clk_disable(>clk);
+   if (ret) {
+   dev_err(dev, "failed to enable clock\n");
+   return ret;
+   }
 
return 0;
 }
@@ -442,9 +461,22 @@ static int musb_usb_probe(struct udevice *dev)
if (!glue->cfg)
return -EINVAL;
 
-   glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-   if (IS_ERR(glue->ccm))
-   return PTR_ERR(glue->ccm);
+   if (glue->cfg->has_reset)
+   test_and_set_bit(SUNXI_MUSB_FL_HAS_RESET, >flags);
+
+   ret = clk_get_by_index(dev, 0, >clk);
+   if (ret) {
+   dev_err(dev, "failed to get clock\n");
+   return ret;
+   }
+
+   if (test_bit(SUNXI_MUSB_FL_HAS_RESET, >flags)) {
+   ret = reset_get_by_index(dev, 0, >rst);
+   if 

Re: [U-Boot] [PATCH v6 29/31] cmd: mtd: add 'mtd' command

[Boris Brezillon]

On Mon, 20 Aug 2018 18:08:14 +0200
Miquel Raynal  wrote:

> Hi Boris,
> 
> Boris Brezillon  wrote on Thu, 16 Aug 2018
> 18:22:03 +0200:
> 
> > On Thu, 16 Aug 2018 17:30:27 +0200
> > Miquel Raynal  wrote:
> >   
> > > There should not be a 'nand' command, a 'sf' command and certainly not
> > > a new 'spi-nand' command. Write a 'mtd' command instead to manage all
> > > MTD devices/partitions at once. This should be the preferred way to
> > > access any MTD device.
> > > 
> > > Signed-off-by: Miquel Raynal 
> > > Acked-by: Jagan Teki 
> > 
> > [...]
> >   
> > >  
> > > +config CMD_MTD
> > > + bool "mtd"
> > > + depends on CMD_MTDPARTS
> > 
> > Shouldn't we select it instead?  
> 
> No need anymore, I will entirely re-write the functions that are needed
> to have stateless clean MTD functions taking the best out of the MTD
> stack.
> 
> All of them will be in mtd-uclass.c, declared in include/mtd.h.

Hm, I would have put those functions in mtdpart.c, but, as long as
mtd-uclass.c is compiled even if CONFIG_DM is not enabled I'm fine with
that.
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Re: [U-Boot] [PATCH v6 29/31] cmd: mtd: add 'mtd' command

[Miquel Raynal]

Hi Boris,

Boris Brezillon  wrote on Thu, 16 Aug 2018
18:22:03 +0200:

> On Thu, 16 Aug 2018 17:30:27 +0200
> Miquel Raynal  wrote:
> 
> > There should not be a 'nand' command, a 'sf' command and certainly not
> > a new 'spi-nand' command. Write a 'mtd' command instead to manage all
> > MTD devices/partitions at once. This should be the preferred way to
> > access any MTD device.
> > 
> > Signed-off-by: Miquel Raynal 
> > Acked-by: Jagan Teki   
> 
> [...]
> 
> >  
> > +config CMD_MTD
> > +   bool "mtd"
> > +   depends on CMD_MTDPARTS  
> 
> Shouldn't we select it instead?

No need anymore, I will entirely re-write the functions that are needed
to have stateless clean MTD functions taking the best out of the MTD
stack.

All of them will be in mtd-uclass.c, declared in include/mtd.h.

> 
> > +   select MTD_PARTITIONS
> > +   help
> > + MTD commands support.
> > +  
> 


Thanks,
Miquèl
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Re: [U-Boot] [PATCH] ARM: display5: config: Replace hardcoded size of kernel (0x2000) with variable (fitImg_fw_sz)

[Fabio Estevam]

Hi Lukasz,

On Sat, Aug 18, 2018 at 5:22 PM, Lukasz Majewski  wrote:
> This cosmetic change allow easy adjustment of the to-load kernel size if
> needed.
>
> Signed-off-by: Lukasz Majewski 

Looks good:

Reviewed-by: Fabio Estevam 

Only minor nit is that the Subject like looks excessively large.

It could be something more succinct like:

display5: Introduce fitImg_fw_sz variable
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[U-Boot] [PATCH v3.1 14/58] musb-new: sunxi: Use CLK and RESET support

[Jagan Teki]

Now clock and reset drivers are available for respective
SoC's so use clk and reset ops on musb driver.

Signed-off-by: Jagan Teki 
---
Changes for v3.1:
- droped unused variables
- add flags for checking reset require or not
- handle clk and reset errors properly

 drivers/usb/musb-new/sunxi.c | 89 
 1 file changed, 59 insertions(+), 30 deletions(-)

diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 9f71b84fd1..e92ba97c0e 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -16,9 +16,11 @@
  * This file is part of the Inventra Controller Driver for Linux.
  */
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -72,22 +74,25 @@
 #define  USBC_BP_ISCR_ID_CHANGE_DETECT_EN  1
 #define  USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN0
 
+/* flags */
+#define SUNXI_MUSB_FL_HAS_RESET0
+
 /**
  * From usbc/usbc.c
  
**/
 
 struct sunxi_musb_config {
struct musb_hdrc_config *config;
-   u8 rst_bit;
-   u8 clkgate_bit;
 };
 
 struct sunxi_glue {
struct musb_host_data mdata;
-   struct sunxi_ccm_reg *ccm;
struct sunxi_musb_config *cfg;
struct device dev;
struct phy phy;
+   struct clk clk;
+   struct reset_ctl rst;
+   unsigned long flags;
 };
 #define to_sunxi_glue(d)   container_of(d, struct sunxi_glue, dev)
 
@@ -291,25 +296,28 @@ static int sunxi_musb_init(struct musb *musb)
 
pr_debug("%s():\n", __func__);
 
+   ret = clk_enable(>clk);
+   if (ret) {
+   dev_err(dev, "failed to enable clock\n");
+   return ret;
+   }
+
+   if (test_bit(SUNXI_MUSB_FL_HAS_RESET, >flags)) {
+   ret = reset_deassert(>rst);
+   if (ret) {
+   dev_err(dev, "failed to deassert reset\n");
+   goto err_clk;
+   }
+   }
+
ret = generic_phy_init(>phy);
if (ret) {
pr_err("failed to init USB PHY\n");
-   return ret;
+   goto err_rst;
}
 
musb->isr = sunxi_musb_interrupt;
 
-   setbits_le32(>ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
-   if (glue->cfg->clkgate_bit)
-   setbits_le32(>ccm->ahb_gate0,
-BIT(glue->cfg->clkgate_bit));
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-   setbits_le32(>ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));
-   if (glue->cfg->rst_bit)
-   setbits_le32(>ccm->ahb_reset0_cfg,
-BIT(glue->cfg->rst_bit));
-#endif
-
USBC_ConfigFIFO_Base();
USBC_EnableDpDmPullUp(musb->mregs);
USBC_EnableIdPullUp(musb->mregs);
@@ -324,6 +332,13 @@ static int sunxi_musb_init(struct musb *musb)
USBC_ForceVbusValidToHigh(musb->mregs);
 
return 0;
+
+err_rst:
+   if (test_bit(SUNXI_MUSB_FL_HAS_RESET, >flags))
+   reset_assert(>rst);
+err_clk:
+   clk_disable(>clk);
+   return ret;
 }
 
 static int sunxi_musb_exit(struct musb *musb)
@@ -339,16 +354,19 @@ static int sunxi_musb_exit(struct musb *musb)
}
}
 
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-   clrbits_le32(>ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));
-   if (glue->cfg->rst_bit)
-   clrbits_le32(>ccm->ahb_reset0_cfg,
-BIT(glue->cfg->rst_bit));
-#endif
-   clrbits_le32(>ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
-   if (glue->cfg->clkgate_bit)
-   clrbits_le32(>ccm->ahb_gate0,
-BIT(glue->cfg->clkgate_bit));
+   if (test_bit(SUNXI_MUSB_FL_HAS_RESET, >flags)) {
+   ret = reset_assert(>rst);
+   if (ret) {
+   dev_err(dev, "failed to deassert reset\n");
+   return ret;
+   }
+   }
+
+   ret = clk_disable(>clk);
+   if (ret) {
+   dev_err(dev, "failed to enable clock\n");
+   return ret;
+   }
 
return 0;
 }
@@ -442,9 +460,22 @@ static int musb_usb_probe(struct udevice *dev)
if (!glue->cfg)
return -EINVAL;
 
-   glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-   if (IS_ERR(glue->ccm))
-   return PTR_ERR(glue->ccm);
+   if (!(device_is_compatible(dev, "allwinner,sun4i-a10-musb")))
+   test_and_set_bit(SUNXI_MUSB_FL_HAS_RESET, >flags);
+
+   ret = clk_get_by_index(dev, 0, >clk);
+   if (ret) {
+   dev_err(dev, "failed to get clock\n");
+   return ret;
+   }
+
+   if (test_bit(SUNXI_MUSB_FL_HAS_RESET, >flags)) {
+   ret = reset_get_by_index(dev, 0, >rst);
+   if (ret) {
+   dev_err(dev, 

Re: [U-Boot] [PATCH v3 45/58] spi: Add Allwinner A31 SPI driver

[Jagan Teki]

On Mon, Aug 20, 2018 at 7:49 PM, Maxime Ripard
 wrote:
> 1;5202;0c
> On Mon, Aug 20, 2018 at 05:12:20PM +0530, Jagan Teki wrote:
>> On Mon, Aug 20, 2018 at 4:48 PM, Maxime Ripard
>>  wrote:
>> > On Sun, Aug 19, 2018 at 07:27:02PM +0530, Jagan Teki wrote:
>> >> Add Allwinner sun6i SPI driver for A31, H3/H5 an A64.
>> >>
>> >> Tested-by: Fahad Sadah 
>> >> Signed-off-by: Jagan Teki 
>> >
>> > This has nothing to do in this serie.
>>
>> Driver require CLK, RESET changes, so added on top of it.
>
> I understand why it has a dependency on this serie, but it doesn't
> belong in it. It's far too big to review already to not have an
> unrelated patch in the middle of the serie.

OK, then I break the series with CLK and DM_MMC separately which I did
initially, that look easy for review.
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Re: [U-Boot] [PATCH 1/8] UBSAN: run-time undefined behavior sanity checker

[York Sun]

On 08/19/2018 05:04 PM, Eugeniu Rosca wrote:

> 
> The size increase of sanbox U-Boot (gcc 8.1.0):
> $ size u-boot.sandbox.*
>text  data bss dec hex filename
> 1234958 80048  291472 1606478  18834e u-boot.sandbox.default
> 1422710272240  291472 1986422  1e4f76 u-boot.sandbox.ubsan
> +187752 +192192   0 +379944
> 
> The size increase of H3 Salvator-X U-Boot (aarch64-linux-gnu-gcc 7.2.1):
> $ size u-boot.r8a7795-salvator-x.*
>text  data bss dec hex filename
>  589954 23504  263984  877442   d6382 
> u-boot.r8a7795-salvator-x.default
>  810968103304  263984 1178256  11fa90 u-boot.r8a7795-salvator-x.ubsan
> +221014  +79800   0 +300814
>
I wonder if SPL can take advantage of this. Size is sensitive for SPL.

York
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Re: [U-Boot] [PATCH 4/8] pinctrl: renesas: Fix "left shift in type int" undefined behavior

[Eugeniu Rosca]

Hi Marek,

On Mon, Aug 20, 2018 at 10:07:16AM +0200, Marek Vasut wrote:
> On 08/20/2018 02:00 AM, Eugeniu Rosca wrote:
> > Booting R-Car H3-Salvator-X (CONFIG_UBSAN=y) consistently results in:
> > 
> > =
> > UBSAN: Undefined behaviour in drivers/pinctrl/renesas/pfc.c:402:40
> > left shift of 1 by 31 places cannot be represented in type 'int'
> > =
> > =
> > UBSAN: Undefined behaviour in drivers/pinctrl/renesas/pfc.c:410:39
> > left shift of 1 by 31 places cannot be represented in type 'int'
> > =
> > 
> > While fixing these warnings, convert *all* SH_PFC_PIN_CFG_* definitions
> > to use the recommended BIT() macro.
> > 
> > Fixes: 910df4d07e37 ("pinctrl: rmobile: Add Renesas RCar pincontrol driver")
> > Signed-off-by: Eugeniu Rosca 
> > ---
> >  drivers/pinctrl/renesas/sh_pfc.h | 14 +++---
> >  1 file changed, 7 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/pinctrl/renesas/sh_pfc.h 
> > b/drivers/pinctrl/renesas/sh_pfc.h
> > index b98c2f185d26..b58e52bbfbb9 100644
> > --- a/drivers/pinctrl/renesas/sh_pfc.h
> > +++ b/drivers/pinctrl/renesas/sh_pfc.h
> > @@ -21,13 +21,13 @@ enum {
> > PINMUX_TYPE_INPUT,
> >  };
> >  
> > -#define SH_PFC_PIN_CFG_INPUT   (1 << 0)
> > -#define SH_PFC_PIN_CFG_OUTPUT  (1 << 1)
> > -#define SH_PFC_PIN_CFG_PULL_UP (1 << 2)
> > -#define SH_PFC_PIN_CFG_PULL_DOWN   (1 << 3)
> > -#define SH_PFC_PIN_CFG_IO_VOLTAGE  (1 << 4)
> > -#define SH_PFC_PIN_CFG_DRIVE_STRENGTH  (1 << 5)
> > -#define SH_PFC_PIN_CFG_NO_GPIO (1 << 31)
> > +#define SH_PFC_PIN_CFG_INPUT   BIT(0)
> > +#define SH_PFC_PIN_CFG_OUTPUT  BIT(1)
> > +#define SH_PFC_PIN_CFG_PULL_UP BIT(2)
> > +#define SH_PFC_PIN_CFG_PULL_DOWN   BIT(3)
> > +#define SH_PFC_PIN_CFG_IO_VOLTAGE  BIT(4)
> > +#define SH_PFC_PIN_CFG_DRIVE_STRENGTH  BIT(5)
> > +#define SH_PFC_PIN_CFG_NO_GPIO BIT(31)
> 
> Might make sense to apply the same fix for Linux ?

Oddly enough, UBSAN doesn't complain about those shifts in the kernel.
I can only guess for the moment why this difference.

> 
> Acked-by: Marek Vasut 
> 
> -- 
> Best regards,
> Marek Vasut

Best regards,
Eugeniu.
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[U-Boot] [PATCH v3 18/34] configs: sama5d4_xplained: add onewire and eeprom drivers

[Eugen Hristev]

SAMA5D4 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d4_xplained_mmc_defconfig   | 4 
 configs/sama5d4_xplained_nandflash_defconfig | 4 
 configs/sama5d4_xplained_spiflash_defconfig  | 4 
 3 files changed, 12 insertions(+)

diff --git a/configs/sama5d4_xplained_mmc_defconfig 
b/configs/sama5d4_xplained_mmc_defconfig
index 5e1234b..311743e 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -80,3 +80,7 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_DM_VIDEO=y
 CONFIG_ATMEL_HLCD=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig 
b/configs/sama5d4_xplained_nandflash_defconfig
index e017e03..234cf24 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -77,3 +77,7 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_DM_VIDEO=y
 CONFIG_ATMEL_HLCD=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig 
b/configs/sama5d4_xplained_spiflash_defconfig
index dc17f9b..b0fcd3b 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -80,3 +80,7 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_DM_VIDEO=y
 CONFIG_ATMEL_HLCD=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
-- 
2.7.4

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[U-Boot] [PATCH v3 15/34] configs: sama5d3_xplained: add onewire and eeprom drivers

[Eugen Hristev]

SAMA5D3 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d3_xplained_mmc_defconfig   | 4 
 configs/sama5d3_xplained_nandflash_defconfig | 4 
 2 files changed, 8 insertions(+)

diff --git a/configs/sama5d3_xplained_mmc_defconfig 
b/configs/sama5d3_xplained_mmc_defconfig
index 861a851..771264e 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -73,3 +73,7 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig 
b/configs/sama5d3_xplained_nandflash_defconfig
index b72462d..a35beff 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -70,4 +70,8 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
 CONFIG_FAT_WRITE=y
-- 
2.7.4

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[U-Boot] [PATCH v3 24/34] board: sama5d4_xplained: add pda detect call at init time

[Eugen Hristev]

Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev 
---
 board/atmel/sama5d4_xplained/sama5d4_xplained.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c 
b/board/atmel/sama5d4_xplained/sama5d4_xplained.c
index 526c6c7..4da6489 100644
--- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c
+++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c
@@ -17,6 +17,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+extern void at91_pda_detect(void);
+
 #ifdef CONFIG_NAND_ATMEL
 static void sama5d4_xplained_nand_hw_init(void)
 {
@@ -71,6 +73,7 @@ static void sama5d4_xplained_usb_hw_init(void)
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
+   at91_pda_detect();
 #ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
 #endif
-- 
2.7.4

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[U-Boot] [PATCH v3 12/34] sandbox: DTS: w1: add node for one wire interface on GPIO

[Eugen Hristev]

Add a node for the one wire uclass and one wire gpio driver
in sandbox.

Signed-off-by: Eugen Hristev 
---
 arch/sandbox/dts/sandbox.dts | 20 
 1 file changed, 20 insertions(+)

diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 0ea2452..2be836d 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -160,6 +160,7 @@
 
pinctrl {
compatible = "sandbox,pinctrl";
+   status = "okay";
 
pinctrl_i2c0: i2c0 {
groups = "i2c";
@@ -171,6 +172,12 @@
groups = "serial_a";
function = "serial";
};
+
+   pinctrl_onewire0: onewire0 {
+   groups = "w1";
+   function = "w1";
+   bias-pull-up;
+   };
};
 
reset@1 {
@@ -319,6 +326,19 @@
};
};
};
+
+   onewire0: onewire {
+   compatible = "w1-gpio";
+   gpios = <_a 8>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_onewire0>;
+   status = "okay";
+
+   sandbox_eeprom0: sandbox_eeprom@0 {
+   compatible = "sandbox,w1-eeprom";
+   status = "okay";
+   };
+   };
 };
 
 #include "cros-ec-keyboard.dtsi"
-- 
2.7.4

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[U-Boot] [PATCH v3 25/34] configs: sama5d2_xplained: add fdt overlay support

[Eugen Hristev]

Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d2_xplained_mmc_defconfig  | 1 +
 configs/sama5d2_xplained_spiflash_defconfig | 1 +
 2 files changed, 2 insertions(+)

diff --git a/configs/sama5d2_xplained_mmc_defconfig 
b/configs/sama5d2_xplained_mmc_defconfig
index 7e62d9f..4b2b5f0 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -90,3 +90,4 @@ CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig 
b/configs/sama5d2_xplained_spiflash_defconfig
index b5a95c5..d2c264d 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -87,3 +87,4 @@ CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
+CONFIG_OF_LIBFDT_OVERLAY=y
-- 
2.7.4

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[U-Boot] [PATCH v3 30/34] ARM: dts: at91: sama5d2_xplained: add onewire connector for LCD eeprom

[Eugen Hristev]

Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev 
---
 arch/arm/dts/at91-sama5d2_xplained.dts | 17 +
 arch/arm/dts/sama5d2.dtsi  |  5 +
 2 files changed, 22 insertions(+)

diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts 
b/arch/arm/dts/at91-sama5d2_xplained.dts
index 01326a1..33064b3 100644
--- a/arch/arm/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/dts/at91-sama5d2_xplained.dts
@@ -11,6 +11,18 @@
stdout-path = 
};
 
+   onewire_tm: onewire {
+   gpios = < PIN_PB0 0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_onewire_tm_default>;
+   status = "okay";
+
+   w1_eeprom: w1_eeprom@0 {
+   compatible = "maxim,ds24b33";
+   status = "okay";
+   };
+   };
+
ahb {
usb1: ohci@0040 {
num-ports = <3>;
@@ -270,6 +282,11 @@
pinmux = ;
bias-disable;
};
+
+   pinctrl_onewire_tm_default: 
onewire_tm_default {
+   pinmux = ;
+   bias-pull-up;
+   };
};
};
};
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 6645a55..830251a 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -769,4 +769,9 @@
};
};
};
+
+   onewire_tm: onewire {
+   compatible = "w1-gpio";
+   status = "disabled";
+   };
 };
-- 
2.7.4

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[U-Boot] [PATCH v3 21/34] board: sama5d3_xplained: add pda detect call at init time

[Eugen Hristev]

Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev 
---
 arch/arm/mach-at91/Kconfig  |  1 +
 board/atmel/sama5d3_xplained/sama5d3_xplained.c | 10 ++
 2 files changed, 11 insertions(+)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index ce6be38..6fe701a 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -175,6 +175,7 @@ config TARGET_SAMA5D3_XPLAINED
select SAMA5D3
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
+   select BOARD_LATE_INIT
 
 config TARGET_SAMA5D3XEK
bool "SAMA5D3X-EK board"
diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c 
b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
index c47f638..289f8d8 100644
--- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c
+++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
@@ -18,6 +18,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+extern void at91_pda_detect(void);
+
 #ifdef CONFIG_NAND_ATMEL
 void sama5d3_xplained_nand_hw_init(void)
 {
@@ -72,6 +74,14 @@ void board_debug_uart_init(void)
 }
 #endif
 
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+   at91_pda_detect();
+   return 0;
+}
+#endif
+
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
-- 
2.7.4

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[U-Boot] [PATCH v3 33/34] ARM: dts: at91: sama5d2_ptc: add onewire connector for LCD eeprom

[Eugen Hristev]

Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev 
---
 arch/arm/dts/at91-sama5d2_ptc_ek.dts | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/dts/at91-sama5d2_ptc_ek.dts 
b/arch/arm/dts/at91-sama5d2_ptc_ek.dts
index ab5ab21..068a117 100644
--- a/arch/arm/dts/at91-sama5d2_ptc_ek.dts
+++ b/arch/arm/dts/at91-sama5d2_ptc_ek.dts
@@ -56,6 +56,18 @@
stdout-path = 
};
 
+   onewire_tm: onewire {
+   gpios = < PIN_PB31 0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_onewire_tm_default>;
+   status = "okay";
+
+   w1_eeprom: w1_eeprom@0 {
+   compatible = "maxim,ds24b33";
+   status = "okay";
+   };
+   };
+
ahb {
usb0: gadget@0030 {
atmel,vbus-gpio = < PIN_PA27 GPIO_ACTIVE_HIGH>;
@@ -208,6 +220,11 @@
pinmux = ;
bias-disable;
};
+
+   pinctrl_onewire_tm_default: 
onewire_tm_default {
+   pinmux = ;
+   bias-pull-up;
+   };
};
};
};
-- 
2.7.4

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[U-Boot] [PATCH v3 34/34] ARM: dts: at91: sama5d4_xplained: add onewire connector for LCD eeprom

[Eugen Hristev]

Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev 
---
 arch/arm/dts/at91-sama5d4_xplained.dts | 16 
 arch/arm/dts/sama5d4.dtsi  |  5 +
 2 files changed, 21 insertions(+)

diff --git a/arch/arm/dts/at91-sama5d4_xplained.dts 
b/arch/arm/dts/at91-sama5d4_xplained.dts
index ea35dc2..58a0e60 100644
--- a/arch/arm/dts/at91-sama5d4_xplained.dts
+++ b/arch/arm/dts/at91-sama5d4_xplained.dts
@@ -58,6 +58,18 @@
stdout-path = 
};
 
+   onewire_tm: onewire {
+   gpios = < 15 GPIO_ACTIVE_LOW>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_onewire_tm_default>;
+   status = "okay";
+
+   w1_eeprom: w1_eeprom@0 {
+   compatible = "maxim,ds24b33";
+   status = "okay";
+   };
+   };
+
memory {
reg = <0x2000 0x2000>;
};
@@ -199,6 +211,10 @@
atmel,pins =
;
};
+   pinctrl_onewire_tm_default: 
onewire_tm_default {
+   atmel,pins =
+   ;
+   };
};
};
};
diff --git a/arch/arm/dts/sama5d4.dtsi b/arch/arm/dts/sama5d4.dtsi
index 8072b8a..8875d7b 100644
--- a/arch/arm/dts/sama5d4.dtsi
+++ b/arch/arm/dts/sama5d4.dtsi
@@ -1913,4 +1913,9 @@
};
};
};
+
+   onewire_tm: onewire {
+   compatible = "w1-gpio";
+   status = "disabled";
+   };
 };
-- 
2.7.4

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[U-Boot] [PATCH v3 31/34] ARM: dts: at91: sama5d3_xplained: add onewire connector for LCD eeprom

[Eugen Hristev]

Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev 
---
 arch/arm/dts/at91-sama5d3_xplained.dts | 17 +
 arch/arm/dts/sama5d3.dtsi  |  5 +
 2 files changed, 22 insertions(+)

diff --git a/arch/arm/dts/at91-sama5d3_xplained.dts 
b/arch/arm/dts/at91-sama5d3_xplained.dts
index 6959710..20fba5f 100644
--- a/arch/arm/dts/at91-sama5d3_xplained.dts
+++ b/arch/arm/dts/at91-sama5d3_xplained.dts
@@ -36,6 +36,18 @@
};
};
 
+   onewire_tm: onewire {
+   gpios = < 23 GPIO_ACTIVE_LOW>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_onewire_tm_default>;
+   status = "okay";
+
+   w1_eeprom: w1_eeprom@0 {
+   compatible = "maxim,ds24b33";
+   status = "okay";
+   };
+   };
+
ahb {
apb {
mmc0: mmc@f000 {
@@ -243,6 +255,11 @@
atmel,pins =
;   /* PE9, conflicts with A9 */
};
+
+   pinctrl_onewire_tm_default: 
onewire_tm_default {
+   atmel,pins =
+   ;
+   };
};
};
};
diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi
index ee0e14e..87ec17a 100644
--- a/arch/arm/dts/sama5d3.dtsi
+++ b/arch/arm/dts/sama5d3.dtsi
@@ -1538,4 +1538,9 @@
};
};
};
+
+   onewire_tm: onewire {
+   compatible = "w1-gpio";
+   status = "disabled";
+   };
 };
-- 
2.7.4

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[U-Boot] [PATCH v3 32/34] ARM: dts: at91: sama5d27_som1_ek: add onewire connector for LCD eeprom

[Eugen Hristev]

Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev 
---
 arch/arm/dts/at91-sama5d27_som1_ek.dts | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts 
b/arch/arm/dts/at91-sama5d27_som1_ek.dts
index 5e62d4a..4cd6db6 100644
--- a/arch/arm/dts/at91-sama5d27_som1_ek.dts
+++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts
@@ -54,6 +54,18 @@
stdout-path = 
};
 
+   onewire_tm: onewire {
+   gpios = < 17 0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_onewire_tm_default>;
+   status = "okay";
+
+   w1_eeprom: w1_eeprom@0 {
+   compatible = "maxim,ds24b33";
+   status = "okay";
+   };
+   };
+
ahb {
usb1: ohci@0040 {
num-ports = <3>;
@@ -208,6 +220,11 @@
pinmux = ;
bias-disable;
};
+
+   pinctrl_onewire_tm_default: 
onewire_tm_default {
+   pinmux = ;
+   bias-pull-up;
+   };
};
};
};
-- 
2.7.4

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[U-Boot] [PATCH v3 20/34] board: sama5d2_xplained: add pda detect call at init time

[Eugen Hristev]

Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev 
---
 board/atmel/sama5d2_xplained/sama5d2_xplained.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c 
b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 592b4d8..fccd80e 100644
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -15,6 +15,8 @@
 #include 
 #include 
 
+extern void at91_pda_detect(void);
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static void board_usb_hw_init(void)
@@ -28,6 +30,7 @@ int board_late_init(void)
 #ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
 #endif
+   at91_pda_detect();
return 0;
 }
 #endif
-- 
2.7.4

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[U-Boot] [PATCH v3 28/34] configs: sama5d27_som1_ek: add fdt overlay support

[Eugen Hristev]

Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d27_som1_ek_mmc_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/sama5d27_som1_ek_mmc_defconfig 
b/configs/sama5d27_som1_ek_mmc_defconfig
index 3df7e5c..f8250bc 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -90,3 +90,4 @@ CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
+CONFIG_OF_LIBFDT_OVERLAY=y
-- 
2.7.4

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[U-Boot] [PATCH v3 13/34] configs: sandbox: add onewire w1 and sandbox eeprom

[Eugen Hristev]

To be able to test Dallas onewire protocol and one wire eeproms driver
and subsystem, add in sandbox defconfig the drivers' config.

Signed-off-by: Eugen Hristev 
---
 configs/sandbox_defconfig | 4 
 1 file changed, 4 insertions(+)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 2fc84a1..2a86bf3 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -186,6 +186,10 @@ CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
 CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
 CONFIG_VIDEO_SANDBOX_SDL=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_SANDBOX=y
 CONFIG_WDT=y
 CONFIG_WDT_SANDBOX=y
 CONFIG_FS_CBFS=y
-- 
2.7.4

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[U-Boot] [PATCH v3 14/34] configs: sama5d2_xplained: add onewire and eeprom drivers

[Eugen Hristev]

SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d2_xplained_mmc_defconfig  | 4 
 configs/sama5d2_xplained_spiflash_defconfig | 4 
 2 files changed, 8 insertions(+)

diff --git a/configs/sama5d2_xplained_mmc_defconfig 
b/configs/sama5d2_xplained_mmc_defconfig
index 4182e84..7e62d9f 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -86,3 +86,7 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_DM_VIDEO=y
 CONFIG_ATMEL_HLCD=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig 
b/configs/sama5d2_xplained_spiflash_defconfig
index 18d1cb5..b5a95c5 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -83,3 +83,7 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_DM_VIDEO=y
 CONFIG_ATMEL_HLCD=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
-- 
2.7.4

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[U-Boot] [PATCH v3 29/34] configs: sama5d4_xplained: add fdt overlay support

[Eugen Hristev]

Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d4_xplained_mmc_defconfig   | 1 +
 configs/sama5d4_xplained_nandflash_defconfig | 1 +
 configs/sama5d4_xplained_spiflash_defconfig  | 1 +
 3 files changed, 3 insertions(+)

diff --git a/configs/sama5d4_xplained_mmc_defconfig 
b/configs/sama5d4_xplained_mmc_defconfig
index 311743e..2b38ad0 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -84,3 +84,4 @@ CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig 
b/configs/sama5d4_xplained_nandflash_defconfig
index 234cf24..d503606 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -81,3 +81,4 @@ CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig 
b/configs/sama5d4_xplained_spiflash_defconfig
index b0fcd3b..9a643d9 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -84,3 +84,4 @@ CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
+CONFIG_OF_LIBFDT_OVERLAY=y
-- 
2.7.4

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[U-Boot] [PATCH v3 05/34] w1: identify devices with w1-eeprom uclass

[Eugen Hristev]

When a new device is discovered, this may be a w1 eeprom device.
Attempt to find the proper node and driver from the w1-eeprom subsystem.

Signed-off-by: Eugen Hristev 
---
 drivers/w1/w1-uclass.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c
index 44759fe..aecf7fe 100644
--- a/drivers/w1/w1-uclass.c
+++ b/drivers/w1/w1-uclass.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -98,6 +99,9 @@ static int w1_enumerate(struct udevice *bus)
 
debug("%s: Detected new device 0x%llx (family 0x%x)\n",
  bus->name, rn, (u8)(rn & 0xff));
+
+   /* attempt to register as w1-eeprom device */
+   w1_eeprom_register_new_device(rn);
}
}
 
-- 
2.7.4

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[U-Boot] [PATCH v3 22/34] board: sama5d27_som1_ek: add pda detect call at init time

[Eugen Hristev]

Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev 
---
 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c 
b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
index d5ddf8d..8363434 100644
--- a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
+++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
@@ -15,6 +15,8 @@
 #include 
 #include 
 
+extern void at91_pda_detect(void);
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static void board_usb_hw_init(void)
@@ -28,6 +30,7 @@ int board_late_init(void)
 #ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
 #endif
+   at91_pda_detect();
return 0;
 }
 #endif
-- 
2.7.4

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[U-Boot] [PATCH v3 17/34] configs: sama5d2_ptc_ek: add onewire and eeprom drivers

[Eugen Hristev]

SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d2_ptc_ek_mmc_defconfig   | 4 
 configs/sama5d2_ptc_ek_nandflash_defconfig | 4 
 2 files changed, 8 insertions(+)

diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig 
b/configs/sama5d2_ptc_ek_mmc_defconfig
index 3fc18a1..c53ab09 100644
--- a/configs/sama5d2_ptc_ek_mmc_defconfig
+++ b/configs/sama5d2_ptc_ek_mmc_defconfig
@@ -59,3 +59,7 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig 
b/configs/sama5d2_ptc_ek_nandflash_defconfig
index 886f342..e56e19e 100644
--- a/configs/sama5d2_ptc_ek_nandflash_defconfig
+++ b/configs/sama5d2_ptc_ek_nandflash_defconfig
@@ -59,3 +59,7 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
-- 
2.7.4

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[U-Boot] [PATCH v3 27/34] configs: sama5d2_ptc_ek: add fdt overlay support

[Eugen Hristev]

Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d2_ptc_ek_mmc_defconfig   | 1 +
 configs/sama5d2_ptc_ek_nandflash_defconfig | 1 +
 2 files changed, 2 insertions(+)

diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig 
b/configs/sama5d2_ptc_ek_mmc_defconfig
index c53ab09..31af019 100644
--- a/configs/sama5d2_ptc_ek_mmc_defconfig
+++ b/configs/sama5d2_ptc_ek_mmc_defconfig
@@ -63,3 +63,4 @@ CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig 
b/configs/sama5d2_ptc_ek_nandflash_defconfig
index e56e19e..46345b4 100644
--- a/configs/sama5d2_ptc_ek_nandflash_defconfig
+++ b/configs/sama5d2_ptc_ek_nandflash_defconfig
@@ -63,3 +63,4 @@ CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
+CONFIG_OF_LIBFDT_OVERLAY=y
-- 
2.7.4

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[U-Boot] [PATCH v3 23/34] board: sama5d2_ptc_ek: add pda detect call at init time

[Eugen Hristev]

Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev 
---
 arch/arm/mach-at91/Kconfig  |  1 +
 board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c | 10 ++
 2 files changed, 11 insertions(+)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 6fe701a..983d9b9 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -149,6 +149,7 @@ config TARGET_SAMA5D2_PTC_EK
bool "SAMA5D2 PTC EK board"
select SAMA5D2
select BOARD_EARLY_INIT_F
+   select BOARD_LATE_INIT
 
 config TARGET_SAMA5D2_XPLAINED
bool "SAMA5D2 Xplained board"
diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c 
b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
index 789841e..17e08fa 100644
--- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
+++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
@@ -20,6 +20,8 @@
 #include 
 #include 
 
+extern void at91_pda_detect(void);
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_NAND_ATMEL
@@ -65,6 +67,14 @@ static void board_nand_hw_init(void)
 }
 #endif
 
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+   at91_pda_detect();
+   return 0;
+}
+#endif
+
 static void board_usb_hw_init(void)
 {
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 12, ATMEL_PIO_PUEN_MASK);
-- 
2.7.4

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[U-Boot] [PATCH v3 19/34] board: atmel: add support for pda detection

[Eugen Hristev]

This adds the support for PDA detection as common code for
Atmel boards.
Using the one wire interface over GPIO , an EEPROM memory is read
and compared to preprogrammed values for PDA screens TM4300, TM7000
and TM7000B.
Once the PDA is detected, an environment variable is set accordingly.

Signed-off-by: Eugen Hristev 
---
 board/atmel/common/board.c | 55 ++
 1 file changed, 55 insertions(+)

diff --git a/board/atmel/common/board.c b/board/atmel/common/board.c
index 650eb22..b9cf54c 100644
--- a/board/atmel/common/board.c
+++ b/board/atmel/common/board.c
@@ -5,7 +5,62 @@
  */
 
 #include 
+#include 
+#include 
+#include 
+
+#define AT91_PDA_EEPROM_ID_OFFSET  15
+#define AT91_PDA_EEPROM_ID_LENGTH  5
+#define AT91_PDA_EEPROM_DEFAULT_BUS0
 
 void dummy(void)
 {
 }
+
+#if defined CONFIG_W1
+void at91_pda_detect(void)
+{
+   struct udevice *bus, *dev;
+   u8 buf[AT91_PDA_EEPROM_ID_LENGTH + 1] = {0};
+   int ret;
+   int pda = 0;
+
+   ret = w1_get_bus(AT91_PDA_EEPROM_DEFAULT_BUS, );
+   if (ret)
+   return;
+
+   for (device_find_first_child(bus, );
+dev;
+device_find_next_child()) {
+   ret = device_probe(dev);
+   if (ret) {
+   continue;
+   } else {
+   w1_eeprom_read_buf(dev, AT91_PDA_EEPROM_ID_OFFSET,
+  (u8 *)buf, 
AT91_PDA_EEPROM_ID_LENGTH);
+   break;
+   }
+   }
+   pda = simple_strtoul((const char *)buf, NULL, 10);
+
+   switch (pda) {
+   case 7000:
+   if (buf[4] == 'B')
+   printf("PDA TM7000B detected\n");
+   else
+   printf("PDA TM7000 detected\n");
+   break;
+   case 4300:
+   printf("PDA TM4300 detected\n");
+   break;
+   case 5000:
+   printf("PDA TM5000 detected\n");
+   break;
+   }
+   env_set("pda", (const char *)buf);
+}
+#else
+void at91_pda_detect(void)
+{
+}
+#endif
-- 
2.7.4

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[U-Boot] [PATCH v3 26/34] configs: sama5d3_xplained: add fdt overlay support

[Eugen Hristev]

Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d3_xplained_mmc_defconfig   | 1 +
 configs/sama5d3_xplained_nandflash_defconfig | 1 +
 2 files changed, 2 insertions(+)

diff --git a/configs/sama5d3_xplained_mmc_defconfig 
b/configs/sama5d3_xplained_mmc_defconfig
index 771264e..c6dddbf 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -77,3 +77,4 @@ CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig 
b/configs/sama5d3_xplained_nandflash_defconfig
index a35beff..6fbbde0 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -75,3 +75,4 @@ CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
 CONFIG_W1_EEPROM_DS24XXX=y
 CONFIG_FAT_WRITE=y
+CONFIG_OF_LIBFDT_OVERLAY=y
-- 
2.7.4

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[U-Boot] [PATCH v3 10/34] w1: add command for onewire protocol

[Eugen Hristev]

Add basic command for bus information and read for onewire
bus using Dallas 1-Wire protocol.

Signed-off-by: Eugen Hristev 
---
 cmd/Kconfig  |   7 
 cmd/Makefile |   1 +
 cmd/w1.c | 126 +++
 3 files changed, 134 insertions(+)
 create mode 100644 cmd/w1.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index aec2090..1a68b1f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -816,6 +816,13 @@ config CMD_I2C
help
  I2C support.
 
+config CMD_W1
+   depends on W1
+   default y if W1
+   bool "w1 - Support for Dallas 1-Wire protocol"
+   help
+ Dallas 1-wire protocol support
+
 config CMD_LOADB
bool "loadb"
default y
diff --git a/cmd/Makefile b/cmd/Makefile
index 323f1fd..51ad1d8 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -143,6 +143,7 @@ obj-$(CONFIG_CMD_THOR_DOWNLOAD) += thordown.o
 obj-$(CONFIG_CMD_XIMG) += ximg.o
 obj-$(CONFIG_CMD_YAFFS2) += yaffs2.o
 obj-$(CONFIG_CMD_SPL) += spl.o
+obj-$(CONFIG_CMD_W1) += w1.o
 obj-$(CONFIG_CMD_ZIP) += zip.o
 obj-$(CONFIG_CMD_ZFS) += zfs.o
 
diff --git a/cmd/w1.c b/cmd/w1.c
new file mode 100644
index 000..9c95fcf
--- /dev/null
+++ b/cmd/w1.c
@@ -0,0 +1,126 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ *
+ * (C) Copyright 2018
+ * Microchip Technology, Inc.
+ * Eugen Hristev 
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int w1_bus(void)
+{
+   struct udevice *bus, *dev;
+   int ret;
+
+   ret = w1_get_bus(0, );
+   if (ret) {
+   printf("one wire interface not found\n");
+   return CMD_RET_FAILURE;
+   }
+   printf("Bus %d:\t%s", bus->seq, bus->name);
+   if (device_active(bus))
+   printf("  (active)");
+   printf("\n");
+
+   for (device_find_first_child(bus, );
+dev;
+device_find_next_child()) {
+   ret = device_probe(dev);
+
+   printf("\t%s (%d) uclass %s : ", dev->name, dev->seq,
+  dev->uclass->uc_drv->name);
+
+   if (ret)
+   printf("device error\n");
+   else
+   printf("family 0x%x\n", w1_get_device_family(dev));
+   }
+   return CMD_RET_SUCCESS;
+}
+
+static int w1_read(int argc, char *const argv[])
+{
+   int bus_n = 0, dev_n = 0, offset = 0, len = 512;
+   int i;
+   struct udevice *bus, *dev;
+   int ret;
+   u8 buf[512];
+
+   if (argc > 2)
+   bus_n = simple_strtoul(argv[2], NULL, 10);
+
+   if (argc > 3)
+   dev_n = simple_strtoul(argv[3], NULL, 10);
+
+   if (argc > 4)
+   offset = simple_strtoul(argv[4], NULL, 10);
+
+   if (argc > 5)
+   len = simple_strtoul(argv[5], NULL, 10);
+
+   if (len > 512) {
+   printf("len needs to be <= 512\n");
+   return CMD_RET_FAILURE;
+   }
+
+   ret = w1_get_bus(bus_n, );
+   if (ret) {
+   printf("one wire interface not found\n");
+   return CMD_RET_FAILURE;
+   }
+
+   for (device_find_first_child(bus, ), i = 0;
+  dev && i <= dev_n;
+  device_find_next_child(), i++) {
+   ret = device_probe(dev);
+   if (!ret && i == dev_n)
+   break;
+   }
+
+   if (i != dev_n || ret || !dev) {
+   printf("invalid dev\n");
+   return CMD_RET_FAILURE;
+   }
+
+   if (strcmp(dev->uclass->uc_drv->name, "w1_eeprom")) {
+   printf("the device present on the interface is of unknown 
device class\n");
+   return CMD_RET_FAILURE;
+   }
+
+   ret = w1_eeprom_read_buf(dev, offset, (u8 *)buf, len);
+   if (ret) {
+   printf("error reading device %s\n", dev->name);
+   return CMD_RET_FAILURE;
+   }
+
+   for (i = 0; i < len; i++)
+   printf("%x", buf[i]);
+   printf("\n");
+
+   return CMD_RET_SUCCESS;
+}
+
+int do_w1(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+   if (argc < 2)
+   return CMD_RET_USAGE;
+
+   if (!strcmp(argv[1], "bus"))
+   return w1_bus();
+
+   if (!strcmp(argv[1], "read"))
+   return w1_read(argc, argv);
+
+   return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(w1, 6, 0, do_w1,
+  "onewire interface utility commands",
+  "bus - show onewire bus info (all)\n"
+  "w1 read [ [ [offset [length"
+  "- read from onewire device 'dev' on onewire bus 'bus'"
+  " starting from offset 'offset' and length 'length'\n"
+  "  defaults: bus 0, dev 0, offset 0, length 512 bytes.");
-- 
2.7.4

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[U-Boot] [PATCH v3 07/34] dt-bindings: w1-eeprom: ds24xxx: create bindings

[Eugen Hristev]

Bindings for Maxim's ds24 onewire EEPROM families driver

Signed-off-by: Eugen Hristev 
---
 doc/device-tree-bindings/w1-eeprom/ds24xxx.txt | 37 ++
 1 file changed, 37 insertions(+)
 create mode 04 doc/device-tree-bindings/w1-eeprom
 create mode 100644 doc/device-tree-bindings/w1-eeprom/ds24xxx.txt

diff --git a/doc/device-tree-bindings/w1-eeprom/ds24xxx.txt 
b/doc/device-tree-bindings/w1-eeprom/ds24xxx.txt
new file mode 100644
index 000..2e91be9
--- /dev/null
+++ b/doc/device-tree-bindings/w1-eeprom/ds24xxx.txt
@@ -0,0 +1,37 @@
+Maxim DS24 families driver device binding - one wire protocol EEPROMS from 
Maxim
+===
+
+This memory needs to be connected to a onewire bus, as a child node.
+The bus will read the device serial number and match this node with a found
+device on the bus
+Also check doc/device-tree-bindings/w1 for onewire bus drivers
+
+Driver:
+- drivers/w1-eeprom/ds24xxx.c
+
+Software ds24xxx device-tree node properties:
+Required:
+* compatible = "maxim,ds24b33"
+or
+* compatible = "maxim,ds2431"
+Further memories can be added.
+
+Optional:
+* none
+
+Example:
+   eeprom1: eeprom@0 {
+   compatible = "maxim,ds24xxx";
+   }
+
+Example with parent bus:
+
+onewire_tm: onewire {
+   compatible = "w1-gpio";
+   gpios = < 32 0>;
+
+   eeprom1: eeprom@0 {
+   compatible = "maxim,ds24xxx";
+   }
+};
+
-- 
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[U-Boot] [PATCH v3 03/34] dt-bindings: W1: w1-gpio: added bindings for w1-gpio

[Eugen Hristev]

Added bindings specification for bitbanged gpio driver for Dallas
one wire protocol

Signed-off-by: Eugen Hristev 
---
 doc/device-tree-bindings/w1/w1-gpio.txt | 40 +
 1 file changed, 40 insertions(+)
 create mode 04 doc/device-tree-bindings/w1
 create mode 100644 doc/device-tree-bindings/w1/w1-gpio.txt

diff --git a/doc/device-tree-bindings/w1/w1-gpio.txt 
b/doc/device-tree-bindings/w1/w1-gpio.txt
new file mode 100644
index 000..5a58244
--- /dev/null
+++ b/doc/device-tree-bindings/w1/w1-gpio.txt
@@ -0,0 +1,40 @@
+W1 gpio device binding - one wire protocol over bitbanged gpio
+===
+
+
+Child nodes are required in device tree. The driver will detect
+the devices serial number and then search in the child nodes in the device tree
+for the proper node and try to match it with the device.
+
+Also check doc/device-tree-bindings/w1-eeprom for possible child nodes drivers
+
+Driver:
+- drivers/w1/w1-gpio.c
+
+Software w1 device-tree node properties:
+Required:
+* compatible = "w1-gpio";
+* gpios = <...>;
+   This is the gpio used for one wire protocol, using bitbanging
+
+Optional:
+* none
+
+Example:
+
+onewire_tm: onewire {
+   compatible = "w1-gpio";
+   gpios = < 32 0>;
+};
+
+Example with child:
+
+onewire_tm: onewire {
+   compatible = "w1-gpio";
+   gpios = < 32 0>;
+
+   eeprom1: eeprom@0 {
+   compatible = "maxim,ds24xxx";
+   }
+};
+
-- 
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[U-Boot] [PATCH v3 16/34] configs: sama5d27_som1_ek: add onewire and eeprom drivers

[Eugen Hristev]

SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.

Signed-off-by: Eugen Hristev 
---
 configs/sama5d27_som1_ek_mmc_defconfig | 4 
 1 file changed, 4 insertions(+)

diff --git a/configs/sama5d27_som1_ek_mmc_defconfig 
b/configs/sama5d27_som1_ek_mmc_defconfig
index 53d4b7c..3df7e5c 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -86,3 +86,7 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_DM_VIDEO=y
 CONFIG_ATMEL_HLCD=y
+CONFIG_W1=y
+CONFIG_W1_GPIO=y
+CONFIG_W1_EEPROM=y
+CONFIG_W1_EEPROM_DS24XXX=y
-- 
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[U-Boot] [PATCH v3 04/34] W1-EEPROM: Add an W1-EEPROM uclass for 1 wire EEPROMs

[Eugen Hristev]

From: Maxime Ripard 

We might want to access data stored onto one wire EEPROMs.
Create a framework to provide a consistent API.

Signed-off-by: Maxime Ripard 
[eugen.hris...@microchip.com: reworked patch]
Signed-off-by: Eugen Hristev 
---
 drivers/Kconfig  |   2 +
 drivers/Makefile |   1 +
 drivers/w1-eeprom/Kconfig|  17 +
 drivers/w1-eeprom/Makefile   |   2 +
 drivers/w1-eeprom/w1-eeprom-uclass.c | 116 +++
 include/dm/uclass-id.h   |   1 +
 include/w1-eeprom.h  |  33 ++
 7 files changed, 172 insertions(+)
 create mode 04 drivers/w1-eeprom
 create mode 100644 drivers/w1-eeprom/Kconfig
 create mode 100644 drivers/w1-eeprom/Makefile
 create mode 100644 drivers/w1-eeprom/w1-eeprom-uclass.c
 create mode 100644 include/w1-eeprom.h

diff --git a/drivers/Kconfig b/drivers/Kconfig
index 2cae829..386af75 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -104,6 +104,8 @@ source "drivers/video/Kconfig"
 
 source "drivers/w1/Kconfig"
 
+source "drivers/w1-eeprom/Kconfig"
+
 source "drivers/watchdog/Kconfig"
 
 config PHYS_TO_BUS
diff --git a/drivers/Makefile b/drivers/Makefile
index 728380b..de67a17 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -102,6 +102,7 @@ obj-y += soc/
 obj-$(CONFIG_REMOTEPROC) += remoteproc/
 obj-y += thermal/
 obj-$(CONFIG_W1) += w1/
+obj-$(CONFIG_W1_EEPROM) += w1-eeprom/
 
 obj-$(CONFIG_MACH_PIC32) += ddr/microchip/
 endif
diff --git a/drivers/w1-eeprom/Kconfig b/drivers/w1-eeprom/Kconfig
new file mode 100644
index 000..d5ddc80
--- /dev/null
+++ b/drivers/w1-eeprom/Kconfig
@@ -0,0 +1,17 @@
+#
+# EEPROM subsystem configuration
+#
+
+menu "1-wire EEPROM support"
+
+config W1_EEPROM
+   bool "Enable support for EEPROMs on 1wire interface"
+   depends on DM
+   help
+ Support for the EEPROMs connected on 1-wire Dallas protocol interface
+
+if W1_EEPROM
+
+endif
+
+endmenu
diff --git a/drivers/w1-eeprom/Makefile b/drivers/w1-eeprom/Makefile
new file mode 100644
index 000..b72950e
--- /dev/null
+++ b/drivers/w1-eeprom/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_W1_EEPROM) += w1-eeprom-uclass.o
+
diff --git a/drivers/w1-eeprom/w1-eeprom-uclass.c 
b/drivers/w1-eeprom/w1-eeprom-uclass.c
new file mode 100644
index 000..1e5c1b1
--- /dev/null
+++ b/drivers/w1-eeprom/w1-eeprom-uclass.c
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier:GPL-2.0+
+/*
+ *
+ * Copyright (c) 2015 Free Electrons
+ * Copyright (c) 2015 NextThing Co.
+ * Copyright (c) 2018 Microchip Technology, Inc.
+ *
+ * Maxime Ripard 
+ * Eugen Hristev 
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+int w1_eeprom_read_buf(struct udevice *dev, unsigned int offset,
+  u8 *buf, unsigned int count)
+{
+   const struct w1_eeprom_ops *ops = device_get_ops(dev);
+   u64 id = 0;
+   int ret;
+
+   if (!ops->read_buf)
+   return -ENOSYS;
+
+   ret = w1_eeprom_get_id(dev, );
+   if (ret)
+   return ret;
+   if (!id)
+   return -ENODEV;
+
+   return ops->read_buf(dev, offset, buf, count);
+}
+
+int w1_eeprom_register_new_device(u64 id)
+{
+   u8 family = id & 0xff;
+   int ret;
+   struct udevice *dev;
+
+   for (ret = uclass_first_device(UCLASS_W1_EEPROM, );
+!ret && dev;
+uclass_next_device()) {
+   if (ret || !dev) {
+   debug("cannot find w1 eeprom dev\n");
+   return ret;
+   }
+   if (dev_get_driver_data(dev) == family) {
+   struct w1_device *w1;
+
+   w1 = dev_get_parent_platdata(dev);
+   if (w1->id) /* device already in use */
+   continue;
+   w1->id = id;
+   debug("%s: Match found: %s:%s %llx\n", __func__,
+ dev->name, dev->driver->name, id);
+   return 0;
+   }
+   }
+
+   debug("%s: No matches found: error %d\n", __func__, ret);
+
+   return ret;
+}
+
+int w1_eeprom_get_id(struct udevice *dev, u64 *id)
+{
+   struct w1_device *w1 = dev_get_parent_platdata(dev);
+
+   if (!w1)
+   return -ENODEV;
+   *id = w1->id;
+
+   return 0;
+}
+
+UCLASS_DRIVER(w1_eeprom) = {
+   .name   = "w1_eeprom",
+   .id = UCLASS_W1_EEPROM,
+   .flags  = DM_UC_FLAG_SEQ_ALIAS,
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+   .post_bind  = dm_scan_fdt_dev,
+#endif
+};
+
+int w1_eeprom_dm_init(void)
+{
+   struct udevice *dev;
+   struct uclass *uc;
+   int ret;
+
+   ret = uclass_get(UCLASS_W1_EEPROM, );
+   if (ret) {
+   debug ("W1_EEPROM uclass not available\n");
+   return ret;
+   }
+
+   uclass_foreach_dev(dev, uc) {
+   ret = 

[U-Boot] [PATCH v3 09/34] dt-bindings: w1-eeprom: eep_sandbox: create bindings

[Eugen Hristev]

Bindings for sandbox onewire eeprom driver

Signed-off-by: Eugen Hristev 
---
 doc/device-tree-bindings/w1-eeprom/eep_sandbox.txt | 34 ++
 1 file changed, 34 insertions(+)
 create mode 100644 doc/device-tree-bindings/w1-eeprom/eep_sandbox.txt

diff --git a/doc/device-tree-bindings/w1-eeprom/eep_sandbox.txt 
b/doc/device-tree-bindings/w1-eeprom/eep_sandbox.txt
new file mode 100644
index 000..82bb589
--- /dev/null
+++ b/doc/device-tree-bindings/w1-eeprom/eep_sandbox.txt
@@ -0,0 +1,34 @@
+Onewire EEPROM sandbox driver device binding - one wire protocol sandbox EEPROM
+===
+
+This memory needs to be connected to a onewire bus, as a child node.
+The bus will read the device serial number and match this node with a found
+device on the bus
+Also check doc/device-tree-bindings/w1 for onewire bus drivers
+
+Driver:
+- drivers/w1-eeprom/eep_sandbox.c
+
+Software ds24xxx device-tree node properties:
+Required:
+* compatible = "sandbox,w1-eeprom"
+
+Optional:
+* none
+
+Example:
+   eeprom1: eeprom@0 {
+   compatible = "sandbox,w1-eeprom";
+   }
+
+Example with parent bus:
+
+onewire_tm: onewire {
+   compatible = "w1-gpio";
+   gpios = <_a 8>;
+
+   eeprom1: eeprom@0 {
+   compatible = "sandbox,w1-eeprom";
+   }
+};
+
-- 
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[U-Boot] [PATCH v3 08/34] W1-EEPROM: add sandbox driver

[Eugen Hristev]

Add a sandbox driver for a one wire EEPROM memory

Signed-off-by: Eugen Hristev 
---
 drivers/w1-eeprom/Kconfig   |  6 
 drivers/w1-eeprom/Makefile  |  1 +
 drivers/w1-eeprom/eep_sandbox.c | 61 +
 include/w1.h|  1 +
 4 files changed, 69 insertions(+)
 create mode 100644 drivers/w1-eeprom/eep_sandbox.c

diff --git a/drivers/w1-eeprom/Kconfig b/drivers/w1-eeprom/Kconfig
index 20ec549..4b7f3c4 100644
--- a/drivers/w1-eeprom/Kconfig
+++ b/drivers/w1-eeprom/Kconfig
@@ -18,6 +18,12 @@ config W1_EEPROM_DS24XXX
help
  Maxim DS24 EEPROMs 1-Wire EEPROM support
 
+config W1_EEPROM_SANDBOX
+   bool "Enable sandbox onewire EEPROM driver"
+   depends on W1
+   help
+ Sandbox driver for a onewire EEPROM memory
+
 endif
 
 endmenu
diff --git a/drivers/w1-eeprom/Makefile b/drivers/w1-eeprom/Makefile
index 3f4aa13..03cc4c8 100644
--- a/drivers/w1-eeprom/Makefile
+++ b/drivers/w1-eeprom/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_W1_EEPROM) += w1-eeprom-uclass.o
 
 obj-$(CONFIG_W1_EEPROM_DS24XXX) += ds24xxx.o
 
+obj-$(CONFIG_W1_EEPROM_SANDBOX) += eep_sandbox.o
diff --git a/drivers/w1-eeprom/eep_sandbox.c b/drivers/w1-eeprom/eep_sandbox.c
new file mode 100644
index 000..27c7f9f
--- /dev/null
+++ b/drivers/w1-eeprom/eep_sandbox.c
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier:GPL-2.0+
+ *
+ * Copyright (c) 2018 Microchip Technology, Inc.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define W1_F2D_READ_EEPROM  0xf0
+
+#define EEP_SANDBOX_SAMPLE_MEM "this is a sample EEPROM memory string."
+
+static int eep_sandbox_read_buf(struct udevice *dev, unsigned int offset,
+   u8 *buf, unsigned int count)
+{
+   /* do not allow to copy more than our maximum sample string */
+   if (offset + count < strlen(EEP_SANDBOX_SAMPLE_MEM)) {
+   offset = 0;
+   count = strlen(EEP_SANDBOX_SAMPLE_MEM);
+   }
+   strncpy((char *)buf, EEP_SANDBOX_SAMPLE_MEM, count);
+
+   /*
+* in case the w1 subsystem uses some different kind of sandbox testing,
+* like randomized gpio values , we take the buffer from there
+*/
+
+   w1_reset_select(dev);
+
+   w1_write_byte(dev, W1_F2D_READ_EEPROM);
+   w1_write_byte(dev, offset & 0xff);
+   w1_write_byte(dev, offset >> 8);
+
+   w1_read_buf(dev, buf, count);
+
+   /*
+* even if read buf from w1 fails, return success as we hardcoded
+* the buffer.
+*/
+   return 0;
+}
+
+static const struct w1_eeprom_ops eep_sandbox_ops = {
+   .read_buf   = eep_sandbox_read_buf,
+};
+
+static const struct udevice_id eep_sandbox_id[] = {
+   { .compatible = "sandbox,w1-eeprom", .data = W1_FAMILY_EEP_SANDBOX },
+   { },
+};
+
+U_BOOT_DRIVER(eep_sandbox) = {
+   .name   = "eep_sandbox",
+   .id = UCLASS_W1_EEPROM,
+   .of_match   = eep_sandbox_id,
+   .ops= _sandbox_ops,
+};
diff --git a/include/w1.h b/include/w1.h
index b36e0f8..399177a 100644
--- a/include/w1.h
+++ b/include/w1.h
@@ -12,6 +12,7 @@
 
 #define W1_FAMILY_DS24B33  0x23
 #define W1_FAMILY_DS2431   0x2d
+#define W1_FAMILY_EEP_SANDBOX  0xfe
 
 struct w1_device {
u64 id;
-- 
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[U-Boot] [PATCH v3 11/34] pinctrl: sandbox: add gpio onewire w1 group

[Eugen Hristev]

Add onewire "w1" groups and pin function for onewire GPIOs in sandbox.

Signed-off-by: Eugen Hristev 
---
 drivers/pinctrl/pinctrl-sandbox.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-sandbox.c 
b/drivers/pinctrl/pinctrl-sandbox.c
index 468fa2a..755ac08 100644
--- a/drivers/pinctrl/pinctrl-sandbox.c
+++ b/drivers/pinctrl/pinctrl-sandbox.c
@@ -14,6 +14,7 @@ static const char * const sandbox_pins[] = {
"SDA",
"TX",
"RX",
+   "W1"
 };
 
 static const char * const sandbox_groups[] = {
@@ -21,12 +22,14 @@ static const char * const sandbox_groups[] = {
"serial_a",
"serial_b",
"spi",
+   "w1",
 };
 
 static const char * const sandbox_functions[] = {
"i2c",
"serial",
"spi",
+   "w1",
 };
 
 static const struct pinconf_param sandbox_conf_params[] = {
-- 
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[U-Boot] [PATCH v3 06/34] W1-EEPROM: add support for Maxim DS24 eeprom families

[Eugen Hristev]

From: Maxime Ripard 

Add a driver that supports Maxim 1 wire EEPROMs families
DS24B33 and DS2431.
Can be extended for other families as well.

Signed-off-by: Maxime Ripard 
[eugen.hris...@microchip.com: reworked driver]
Signed-off-by: Eugen Hristev 
---
 drivers/w1-eeprom/Kconfig   |  6 +
 drivers/w1-eeprom/Makefile  |  2 ++
 drivers/w1-eeprom/ds24xxx.c | 55 +
 3 files changed, 63 insertions(+)
 create mode 100644 drivers/w1-eeprom/ds24xxx.c

diff --git a/drivers/w1-eeprom/Kconfig b/drivers/w1-eeprom/Kconfig
index d5ddc80..20ec549 100644
--- a/drivers/w1-eeprom/Kconfig
+++ b/drivers/w1-eeprom/Kconfig
@@ -12,6 +12,12 @@ config W1_EEPROM
 
 if W1_EEPROM
 
+config W1_EEPROM_DS24XXX
+   bool "Enable Maxim DS24 families EEPROM support"
+   depends on W1
+   help
+ Maxim DS24 EEPROMs 1-Wire EEPROM support
+
 endif
 
 endmenu
diff --git a/drivers/w1-eeprom/Makefile b/drivers/w1-eeprom/Makefile
index b72950e..3f4aa13 100644
--- a/drivers/w1-eeprom/Makefile
+++ b/drivers/w1-eeprom/Makefile
@@ -1,2 +1,4 @@
 obj-$(CONFIG_W1_EEPROM) += w1-eeprom-uclass.o
 
+obj-$(CONFIG_W1_EEPROM_DS24XXX) += ds24xxx.o
+
diff --git a/drivers/w1-eeprom/ds24xxx.c b/drivers/w1-eeprom/ds24xxx.c
new file mode 100644
index 000..56186e5
--- /dev/null
+++ b/drivers/w1-eeprom/ds24xxx.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier:GPL-2.0+
+/*
+ *
+ * Copyright (c) 2015 Free Electrons
+ * Copyright (c) 2015 NextThing Co
+ * Copyright (c) 2018 Microchip Technology, Inc.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define W1_F2D_READ_EEPROM 0xf0
+
+static int ds24xxx_read_buf(struct udevice *dev, unsigned int offset,
+   u8 *buf, unsigned int count)
+{
+   w1_reset_select(dev);
+
+   w1_write_byte(dev, W1_F2D_READ_EEPROM);
+   w1_write_byte(dev, offset & 0xff);
+   w1_write_byte(dev, offset >> 8);
+
+   return w1_read_buf(dev, buf, count);
+}
+
+static int ds24xxx_probe(struct udevice *dev)
+{
+   struct w1_device *w1;
+
+   w1 = dev_get_platdata(dev);
+   w1->id = 0;
+   return 0;
+}
+
+static const struct w1_eeprom_ops ds24xxx_ops = {
+   .read_buf   = ds24xxx_read_buf,
+};
+
+static const struct udevice_id ds24xxx_id[] = {
+   { .compatible = "maxim,ds24b33", .data = W1_FAMILY_DS24B33 },
+   { .compatible = "maxim,ds2431", .data = W1_FAMILY_DS2431 },
+   { },
+};
+
+U_BOOT_DRIVER(ds24xxx) = {
+   .name   = "ds24xxx",
+   .id = UCLASS_W1_EEPROM,
+   .of_match   = ds24xxx_id,
+   .ops= _ops,
+   .probe  = ds24xxx_probe,
+};
-- 
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[U-Boot] [PATCH v3 01/34] w1: Add 1-Wire uclass

[Eugen Hristev]

From: Maxime Ripard 

We might want to use 1-Wire devices connected on boards such as EEPROMs in
U-Boot.

Provide a framework to be able to do that.

Signed-off-by: Maxime Ripard 
[eugen.hris...@microchip.com: reworked]
Signed-off-by: Eugen Hristev 
---
 drivers/Kconfig|   2 +
 drivers/Makefile   |   1 +
 drivers/w1/Kconfig |  18 
 drivers/w1/Makefile|   1 +
 drivers/w1/w1-uclass.c | 236 +
 include/dm/uclass-id.h |   1 +
 include/w1.h   |  36 
 7 files changed, 295 insertions(+)
 create mode 04 drivers/w1
 create mode 100644 drivers/w1/Kconfig
 create mode 100644 drivers/w1/Makefile
 create mode 100644 drivers/w1/w1-uclass.c
 create mode 100644 include/w1.h

diff --git a/drivers/Kconfig b/drivers/Kconfig
index 9e21b28..2cae829 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -102,6 +102,8 @@ source "drivers/usb/Kconfig"
 
 source "drivers/video/Kconfig"
 
+source "drivers/w1/Kconfig"
+
 source "drivers/watchdog/Kconfig"
 
 config PHYS_TO_BUS
diff --git a/drivers/Makefile b/drivers/Makefile
index a213ea9..728380b 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -101,6 +101,7 @@ obj-y += input/
 obj-y += soc/
 obj-$(CONFIG_REMOTEPROC) += remoteproc/
 obj-y += thermal/
+obj-$(CONFIG_W1) += w1/
 
 obj-$(CONFIG_MACH_PIC32) += ddr/microchip/
 endif
diff --git a/drivers/w1/Kconfig b/drivers/w1/Kconfig
new file mode 100644
index 000..64b27c6
--- /dev/null
+++ b/drivers/w1/Kconfig
@@ -0,0 +1,18 @@
+#
+# W1 subsystem configuration
+#
+
+menu "1-Wire support"
+
+config W1
+   bool "Enable 1-wire controllers support"
+   default no
+   depends on DM
+   help
+ Support for the Dallas 1-Wire bus.
+
+if W1
+
+endif
+
+endmenu
diff --git a/drivers/w1/Makefile b/drivers/w1/Makefile
new file mode 100644
index 000..f81693b
--- /dev/null
+++ b/drivers/w1/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_W1) += w1-uclass.o
diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c
new file mode 100644
index 000..44759fe
--- /dev/null
+++ b/drivers/w1/w1-uclass.c
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier:GPL-2.0+
+/*
+ *
+ * Copyright (c) 2015 Free Electrons
+ * Copyright (c) 2015 NextThing Co.
+ * Copyright (c) 2018 Microchip Technology, Inc.
+ *
+ * Maxime Ripard 
+ * Eugen Hristev 
+ *
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#define W1_MATCH_ROM   0x55
+#define W1_SKIP_ROM0xcc
+#define W1_SEARCH  0xf0
+
+struct w1_bus {
+   u64 search_id;
+};
+
+static int w1_enumerate(struct udevice *bus)
+{
+   const struct w1_ops *ops = device_get_ops(bus);
+   struct w1_bus *w1 = dev_get_uclass_priv(bus);
+   u64 last_rn, rn = w1->search_id, tmp64;
+   bool last_device = false;
+   int search_bit, desc_bit = 64;
+   int last_zero = -1;
+   u8 triplet_ret = 0;
+   int i;
+
+   if (!ops->reset || !ops->write_byte || !ops->triplet)
+   return -ENOSYS;
+
+   while (!last_device) {
+   last_rn = rn;
+   rn = 0;
+
+   /*
+* Reset bus and all 1-wire device state machines
+* so they can respond to our requests.
+*
+* Return 0 - device(s) present, 1 - no devices present.
+*/
+   if (ops->reset(bus)) {
+   debug("%s: No devices present on the wire.\n",
+ __func__);
+   break;
+   }
+
+   /* Start the search */
+   ops->write_byte(bus, W1_SEARCH);
+   for (i = 0; i < 64; ++i) {
+   /* Determine the direction/search bit */
+   if (i == desc_bit)
+   /* took the 0 path last time, so take the 1 
path */
+   search_bit = 1;
+   else if (i > desc_bit)
+   /* take the 0 path on the next branch */
+   search_bit = 0;
+   else
+   search_bit = ((last_rn >> i) & 0x1);
+
+   /* Read two bits and write one bit */
+   triplet_ret = ops->triplet(bus, search_bit);
+
+   /* quit if no device responded */
+   if ((triplet_ret & 0x03) == 0x03)
+   break;
+
+   /* If both directions were valid, and we took the 0 
path... */
+   if (triplet_ret == 0)
+   last_zero = i;
+
+   /* extract the direction taken & update the device 
number */
+   tmp64 = (triplet_ret >> 2);
+   rn |= (tmp64 << i);
+   }
+
+   /* last device or error, aborting here */
+   if ((triplet_ret & 0x03) == 0x03)
+   last_device = true;
+
+ 

[U-Boot] [PATCH v3 02/34] w1: Add 1-Wire gpio driver

[Eugen Hristev]

From: Maxime Ripard 

Add a bus driver for bitbanging a 1-Wire bus over a GPIO.

Signed-off-by: Maxime Ripard 
[eugen.hris...@microchip.com: fixed some issues]
Signed-off-by: Eugen Hristev 
---
 drivers/w1/Kconfig   |   7 ++
 drivers/w1/Makefile  |   2 +
 drivers/w1/w1-gpio.c | 176 +++
 3 files changed, 185 insertions(+)
 create mode 100644 drivers/w1/w1-gpio.c

diff --git a/drivers/w1/Kconfig b/drivers/w1/Kconfig
index 64b27c6..d6e0457 100644
--- a/drivers/w1/Kconfig
+++ b/drivers/w1/Kconfig
@@ -13,6 +13,13 @@ config W1
 
 if W1
 
+config W1_GPIO
+   bool "Enable 1-wire GPIO bitbanging"
+   default no
+   depends on DM_GPIO
+   help
+ Emulate a 1-wire bus using a GPIO.
+
 endif
 
 endmenu
diff --git a/drivers/w1/Makefile b/drivers/w1/Makefile
index f81693b..7fd8697 100644
--- a/drivers/w1/Makefile
+++ b/drivers/w1/Makefile
@@ -1 +1,3 @@
 obj-$(CONFIG_W1) += w1-uclass.o
+
+obj-$(CONFIG_W1_GPIO) += w1-gpio.o
diff --git a/drivers/w1/w1-gpio.c b/drivers/w1/w1-gpio.c
new file mode 100644
index 000..5e5d6b3
--- /dev/null
+++ b/drivers/w1/w1-gpio.c
@@ -0,0 +1,176 @@
+/* SPDX-License-Identifier:GPL-2.0+
+ *
+ * Copyright (c) 2015 Free Electrons
+ * Copyright (c) 2015 NextThing Co
+ *
+ * Maxime Ripard 
+ *
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#define W1_TIMING_A6
+#define W1_TIMING_B64
+#define W1_TIMING_C60
+#define W1_TIMING_D10
+#define W1_TIMING_E9
+#define W1_TIMING_F55
+#define W1_TIMING_G0
+#define W1_TIMING_H480
+#define W1_TIMING_I70
+#define W1_TIMING_J410
+
+struct w1_gpio_pdata {
+   struct gpio_descgpio;
+   u64 search_id;
+};
+
+static bool w1_gpio_read_bit(struct udevice *dev)
+{
+   struct w1_gpio_pdata *pdata = dev_get_platdata(dev);
+   int val;
+
+   dm_gpio_set_dir_flags(>gpio, GPIOD_IS_OUT);
+   udelay(W1_TIMING_A);
+
+   dm_gpio_set_dir_flags(>gpio, GPIOD_IS_IN);
+   udelay(W1_TIMING_E);
+
+   val = dm_gpio_get_value(>gpio);
+   if (val < 0)
+   debug("error in retrieving GPIO value");
+   udelay(W1_TIMING_F);
+
+   return val;
+}
+
+static u8 w1_gpio_read_byte(struct udevice *dev)
+{
+   int i;
+   u8 ret = 0;
+
+   for (i = 0; i < 8; ++i)
+   ret |= (w1_gpio_read_bit(dev) ? 1 : 0) << i;
+
+   return ret;
+}
+
+static void w1_gpio_write_bit(struct udevice *dev, bool bit)
+{
+   struct w1_gpio_pdata *pdata = dev_get_platdata(dev);
+
+   dm_gpio_set_dir_flags(>gpio, GPIOD_IS_OUT);
+
+   bit ? udelay(W1_TIMING_A) : udelay(W1_TIMING_C);
+
+   dm_gpio_set_value(>gpio, 1);
+
+   bit ? udelay(W1_TIMING_B) : udelay(W1_TIMING_D);
+}
+
+static void w1_gpio_write_byte(struct udevice *dev, u8 byte)
+{
+   int i;
+
+   for (i = 0; i < 8; ++i)
+   w1_gpio_write_bit(dev, (byte >> i) & 0x1);
+}
+
+static bool w1_gpio_reset(struct udevice *dev)
+{
+   struct w1_gpio_pdata *pdata = dev_get_platdata(dev);
+   int val;
+
+   /* initiate the reset pulse. first we must pull the bus to low */
+   dm_gpio_set_dir_flags(>gpio, GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+   udelay(W1_TIMING_G);
+
+   dm_gpio_set_value(>gpio, 0);
+   /* wait for the specified time with the bus kept low */
+   udelay(W1_TIMING_H);
+
+   /* now we must read the presence pulse */
+   dm_gpio_set_dir_flags(>gpio, GPIOD_IS_IN);
+   udelay(W1_TIMING_I);
+
+   val = dm_gpio_get_value(>gpio);
+   if (val < 0)
+   debug("error in retrieving GPIO value");
+
+   /* if nobody pulled the bus down , it means nobody is on the bus */
+   if (val != 0)
+   return 1;
+   /* we have the bus pulled down, let's wait for the specified presence 
time */
+   udelay(W1_TIMING_J);
+
+   /* read again, the other end should leave the bus free */
+   val = dm_gpio_get_value(>gpio);
+   if (val < 0)
+   debug("error in retrieving GPIO value");
+
+   /* bus is not going up again, so we have an error */
+   if (val != 1)
+   return 1;
+
+   /* all good, presence detected */
+   return 0;
+}
+
+static u8 w1_gpio_triplet(struct udevice *dev, bool bdir)
+{
+   u8 id_bit   = w1_gpio_read_bit(dev);
+   u8 comp_bit = w1_gpio_read_bit(dev);
+   u8 retval;
+
+   if (id_bit && comp_bit)
+   return 0x03;  /* error */
+
+   if (!id_bit && !comp_bit) {
+   /* Both bits are valid, take the direction given */
+   retval = bdir ? 0x04 : 0;
+   } else {
+   /* Only one bit is valid, take that direction */
+   bdir = id_bit;
+   retval = id_bit ? 0x05 : 0x02;
+   }
+
+   w1_gpio_write_bit(dev, bdir);
+   return retval;
+}
+
+static const struct w1_ops w1_gpio_ops = {
+   .read_byte  = w1_gpio_read_byte,
+   .reset  = 

[U-Boot] [PATCH v3 00/34] Add support for 1wire protocol and 1wire eeproms

[Eugen Hristev]

This is a patch series originally written by Maxime Ripard,
https://lists.denx.de/pipermail/u-boot/2016-November/272138.html

titled:

[U-Boot] [PATCH RESEND 0/9] sunxi: chip: Enable the DIP auto-detection

and reworked to include support for the EEPROMs on the PDAs connected
to the sama xplained boards.

This is the version 3 of the rework, version 1 was titled:
[PATCH 00/20] Add support for 1wire protocol and 1wire eeproms
and version 2 was titled:
[PATCH v2 00/30] Add support for 1wire protocol and 1wire eeproms

It addresses feedback received in the first version and fixes a few bugs
found in the second version.

The patch series adds first a driver for onewire uclass, and onewire over
gpio bitbanging driver. Then it adds a uclass for onewire EEPROMS, and
specific driver for Maxim EEPROMs. I have added some sandbox support,
configuration and device tree for it and for boards sama5d2_xplained,
sama5d3_xplained, sama5d4_xplained, sama5d2_ptc_ek and sama5d27_som1_ek.
Also added common code for PDA detection, as the memory
on the PDAs is connected to the SoC on the onewire bus.

Thanks to everyone for the review and feedback.

Below is a short summary of the commits:

The series adds a w1-uclass driver for the onewire interface u-class.
This is done in patch:
[PATCH v3 01/34] w1: Add 1-Wire uclass

Also, we add a driver for the w1-uclass specific to the onewire over
bitbanged gpio, this is done in patch:
[PATCH v3 02/34] w1: Add 1-Wire gpio driver

Add the bindings documentation in:
[PATCH v3 03/34] dt-bindings: W1: w1-gpio: added bindings for w1-gpio

A uclass driver is added for one wire eeproms, in patch :
[PATCH v3 04/34] W1-EEPROM: Add an W1-EEPROM uclass for 1 wire EEPROMs

Connection between memories and the bus is done in the patch:
[PATCH v3 05/34] w1: identify devices with w1-eeprom uclas

Specific driver for the DS24 Maxim EEPROMs is added in the patch:
[PATCH v3 06/34] W1-EEPROM: add support for Maxim DS24 eeprom families

Bindings for the DS24xxx driver added in the patch:
[PATCH v3 07/34] dt-bindings: w1-eeprom: ds24xxx: create bindings

A sandbox driver for a onewire EEPROM is added in patch:
[PATCH v3 08/34] W1-EEPROM: add sandbox driver

Bindings for the sandbox eeprom driver added in patch:
[PATCH v3 09/34] dt-bindings: w1-eeprom: eep_sandbox: create bindings

A command is added for the onewire protocol in patch:
[PATCH v3 10/34] w1: add command for onewire protocol

Pinctrl driver for sandbox was updated to add a new group and function for w1:
[PATCH v3 11/34] pinctrl: sandbox: add gpio onewire w1 group

Add a node in sandbox DT to have a test node for sandbox.
[PATCH v3 12/34] sandbox: DTS: w1: add node for one wire interface on
 GPIO

The defconfig for sandbox is updated to include the drivers:
[PATCH v3 13/34] configs: sandbox: add onewire w1 and sandbox
 eeprom

Configuration for sama5d2 xplained is updated in patch:
[PATCH v3 14/34] configs: sama5d2_xplained: add onewire and eeprom

Configuration for sama5d3 xplained is updated in patch:
[PATCH v3 15/34] configs: sama5d3_xplained: add onewire and eeprom

Configuration for sama5d27_som1_ek is updated in patch:
[PATCH v3 16/34] configs: sama5d27_som1_ek: add onewire and eeprom
 drivers

Configuration for sama5d2 ptc is updated in patch:
[PATCH v3 17/34] configs: sama5d2_ptc_ek: add onewire and eeprom
 drivers

Configuration for sama5d4 xplained is updated in patch:
[PATCH v3 18/34] configs: sama5d4_xplained: add onewire and eeprom
 drivers

Pda detection is added in the common part for atmel boards:
[PATCH v3 19/34] board: atmel: add support for pda detection

Specifically add it for Sama5d2 xplained board in patch:
[PATCH v3 20/34] board: sama5d2_xplained: add pda detect call at init
 time

Specifically add it for Sama5d3 xplained board in patch:
[PATCH v3 21/34] board: sama5d3_xplained: add pda detect call at init
 time

Specifically add it for Sama5d27 som1 ek board in patch:
[PATCH v3 22/34] board: sama5d27_som1_ek: add pda detect call at init
 time

Specifically add it for Sama5d27 ptc ek board in patch:
[PATCH v3 23/34] board: sama5d2_ptc_ek: add pda detect call at init
 time

Specifically add it for Sama5d4 xplained board in patch:
[PATCH v3 24/34] board: sama5d4_xplained: add pda detect call at init
 time

Add support for overlays for sama5d2 xplained config in patch:
[PATCH v3 25/34] configs: sama5d2_xplained: add fdt overlay support

Add support for overlays for sama5d3 xplained config in patch:
[PATCH v3 26/34] configs: sama5d3_xplained: add fdt overlay support

Add support for overlays for sama5d2 ptc ek config in patch:
[PATCH v3 27/34] configs: sama5d2_ptc_ek: add fdt overlay support

Add support for overlays for sama5d2 som1 ek config in patch:
[PATCH v3 28/34] configs: sama5d27_som1_ek: add fdt overlay support

Add support for overlays for sama5d4 xplained config in patch:
[PATCH v3 29/34] configs: sama5d4_xplained: add fdt overlay support

The DT for the SAMA5D2 Soc and xplained is updated to include a onewire node.

[U-Boot] [PATCH] ARM: display5: Remove "factory procedure" from display5 board config

[Lukasz Majewski]

This code now is regarded as dead one and hence shall be removed.

Signed-off-by: Lukasz Majewski 

---

 configs/display5_factory_defconfig |  2 +-
 include/configs/display5.h | 22 --
 2 files changed, 1 insertion(+), 23 deletions(-)

diff --git a/configs/display5_factory_defconfig 
b/configs/display5_factory_defconfig
index edb37c3b2f..5962b642b2 100644
--- a/configs/display5_factory_defconfig
+++ b/configs/display5_factory_defconfig
@@ -15,7 +15,7 @@ CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="run factory"
+CONFIG_BOOTCOMMAND="echo SDP Display5 recovery"
 CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_MISC_INIT_R=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/include/configs/display5.h b/include/configs/display5.h
index 60777da061..aba4b01d21 100644
--- a/include/configs/display5.h
+++ b/include/configs/display5.h
@@ -115,27 +115,6 @@
"name=rootfs2,size=512M,uuid=${uuid_gpt_rootfs2};" \
"name=data,size=-,uuid=${uuid_gpt_data}\0"
 
-#define FACTORY_PROCEDURE \
-   "echo '###';" \
-   "echo '# Factory Boot#';" \
-   "echo '###';" \
-   "env default -a;" \
-   "saveenv;" \
-   "gpt write mmc ${mmcdev} ${partitions};" \
-   "run tftp_sf_SPL;" \
-   "run tftp_sf_uboot;" \
-   TFTP_UPDATE_KERNEL \
-   "run tftp_sf_fitImg_SWU;" \
-   "run tftp_sf_initramfs_SWU;" \
-   TFTP_UPDATE_ROOTFS \
-   "echo '###';" \
-   "echo '# END - OK#';" \
-   "echo '###';" \
-   "setenv bootcmd 'env default -a; saveenv; run falcon_setup; reset';" \
-   "setenv boot_os 'n';" \
-   "saveenv;" \
-   "reset;"
-
 #define SWUPDATE_RECOVERY_PROCEDURE \
"echo '###';" \
"echo '# RECOVERY SWUupdate  #';" \
@@ -261,7 +240,6 @@
"bootdelay=1\0" \
"baudrate=115200\0" \
"bootcmd=" CONFIG_BOOTCOMMAND "\0" \
-   "factory=" FACTORY_PROCEDURE "\0" \
"ethact=FEC\0" \
"ethaddr=00:11:B8:01:30:dc\0" \
"ipaddr=192.168.2.130\0" \
-- 
2.11.0

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Re: [U-Boot] [PATCH v3 45/58] spi: Add Allwinner A31 SPI driver

[Maxime Ripard]

1;5202;0c
On Mon, Aug 20, 2018 at 05:12:20PM +0530, Jagan Teki wrote:
> On Mon, Aug 20, 2018 at 4:48 PM, Maxime Ripard
>  wrote:
> > On Sun, Aug 19, 2018 at 07:27:02PM +0530, Jagan Teki wrote:
> >> Add Allwinner sun6i SPI driver for A31, H3/H5 an A64.
> >>
> >> Tested-by: Fahad Sadah 
> >> Signed-off-by: Jagan Teki 
> >
> > This has nothing to do in this serie.
> 
> Driver require CLK, RESET changes, so added on top of it.

I understand why it has a dependency on this serie, but it doesn't
belong in it. It's far too big to review already to not have an
unrelated patch in the middle of the serie.

Maxime

-- 
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Embedded Linux and Kernel engineering
https://bootlin.com


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Re: [U-Boot] [PATCH v3 24/58] arm64: allwinner: dts: h6: fix Pine H64 MMC bus width

[Maxime Ripard]

On Mon, Aug 20, 2018 at 05:09:54PM +0530, Jagan Teki wrote:
> On Mon, Aug 20, 2018 at 5:05 PM, Maxime Ripard
>  wrote:
> > On Sun, Aug 19, 2018 at 07:26:41PM +0530, Jagan Teki wrote:
> >> Currently the enabled MMC controllers on Pine H64 do not have bus-width
> >> set, which make them fall back to 1-bit mode and become quite slow.
> >>
> >> Fix this by add the corresponding bus-width properties.
> >>
> >> Same commit is there in mailing-list, but yet to merge,
> >> commit fb8971bea0910a3172cd8ce75ccc01b50104ebf7
> >> Author: Icenowy Zheng 
> >> Date:   Thu Jul 26 12:41:27 2018 +0800
> >>
> >> arm64: allwinner: dts: h6: fix Pine H64 MMC bus width
> >>
> >> Cc: Icenowy Zheng 
> >> Signed-off-by: Jagan Teki 
> >
> > That also has nothing to do with this serie. Please send independant
> > patches independantly.
> 
> This change required for U-Boot proper to detect mmc0, mmc2 with new
> CLK, RESET and DM_MMC

No, it will work just fine without that patch, no matter if we're
having DM_MMC, RESET or CLK. What we won't have is optimal data rates,
but this doesn't really have anything to do with it.

Maxime

-- 
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Embedded Linux and Kernel engineering
https://bootlin.com


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Re: [U-Boot] [PATCH v3 02/10] include: Add new DCS commands in the enum list

[Simon Glass]

On 17 August 2018 at 08:38, Yannick Fertré  wrote:
> Adding new DCS commands which are specified in the
> DCS 1.3 spec related to CABC.
>
> Signed-off-by: Yannick Fertré 
> ---
>  include/mipi_display.h | 8 
>  1 file changed, 8 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 01/10] video: stm32: stm32_ltdc: add bridge to display controller

[Simon Glass]

On 17 August 2018 at 08:38, Yannick Fertré  wrote:
>
> Manage a bridge insert between the display controller & a panel.
>
> Signed-off-by: Yannick Fertré 
> ---
>  drivers/video/stm32/stm32_ltdc.c | 143 
> ++-
>  1 file changed, 82 insertions(+), 61 deletions(-)

Reviewed-by: Simon Glass 
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[U-Boot] [PATCH 1/2] spl: socfpga: only gen5 devices and arria10 require sfp image

[Dalon Westergreen]

Only the Cyclone5/Arria5 and Arria10 devices require the sfp
formated image for booting. This path ensures that the file is
only generated for those devices.

Signed-off-by: Dalon Westergreen 
---
 scripts/Makefile.spl | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 252f13826d..76d08fd92b 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -188,7 +188,8 @@ ALL-y   += $(obj)/$(BOARD)-spl.bin
 endif
 
 ifdef CONFIG_ARCH_SOCFPGA
-ALL-y  += $(obj)/$(SPL_BIN).sfp
+ALL-$(CONFIG_TARGET_SOCFPGA_GEN5)  += $(obj)/$(SPL_BIN).sfp
+ALL-$(CONFIG_TARGET_SOCFPGA_ARRIA10)   += $(obj)/$(SPL_BIN).sfp
 endif
 
 ifdef CONFIG_ARCH_SUNXI
-- 
2.17.1

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[U-Boot] [PATCH 2/2] spl: socfpga: stratix10: add hex file output for spl image

[Dalon Westergreen]

Stratix10 requires a hex image of the spl for boot.  The hex
image is added to the FPGA configuration image and loaded to
the processor memory by the configuration engine.

Signed-off-by: Dalon Westergreen 
---
 scripts/Makefile.spl | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 76d08fd92b..c424f87e6e 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -190,6 +190,7 @@ endif
 ifdef CONFIG_ARCH_SOCFPGA
 ALL-$(CONFIG_TARGET_SOCFPGA_GEN5)  += $(obj)/$(SPL_BIN).sfp
 ALL-$(CONFIG_TARGET_SOCFPGA_ARRIA10)   += $(obj)/$(SPL_BIN).sfp
+ALL-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += $(obj)/$(SPL_BIN).hex
 endif
 
 ifdef CONFIG_ARCH_SUNXI
@@ -299,6 +300,15 @@ OBJCOPYFLAGS_u-boot-x86-16bit-spl.bin := -O binary -j 
.start16 -j .resetvec
 $(obj)/u-boot-x86-16bit-spl.bin: $(obj)/u-boot-spl FORCE
$(call if_changed,objcopy)
 
+ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
+OBJCOPYFLAGS_$(SPL_BIN).hex = -I binary -O ihex --change-addresses 0xffe0
+else
+OBJCOPYFLAGS_$(SPL_BIN).hex = -I binary -O ihex
+endif
+
+$(obj)/$(SPL_BIN).hex: $(obj)/$(SPL_BIN).bin FORCE
+   $(call if_changed,objcopy)
+
 LDFLAGS_$(SPL_BIN) += -T u-boot-spl.lds $(LDFLAGS_FINAL)
 
 # Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
-- 
2.17.1

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[U-Boot] [PATCH 0/2] socfpga: cleanup files generated for spl

[Dalon Westergreen]

These patches add a hex output of the spl image for Stratix10
devices, and remove the sfp mkimage output for Stratix10 devices.
In Stratix10, the spl image is added to the initial FPGA configuration
bitstream.  A hex file is needed to do this. 

Dalon Westergreen (2):
  spl: socfpga: only gen5 devices and arria10 require sfp image
  spl: socfpga: stratix10: add hex file output for spl image

 scripts/Makefile.spl | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

-- 
2.17.1

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Re: [U-Boot] [PATCH 3/8] armv8: mmu: Fix "left shift in type int" undefined behavior

[Eugeniu Rosca]

Hi Tom,

On Sun, Aug 19, 2018 at 09:51:42PM -0400, Tom Rini wrote:
> On Mon, Aug 20, 2018 at 02:00:27AM +0200, Eugeniu Rosca wrote:
[..]
> > diff --git a/arch/arm/include/asm/armv8/mmu.h 
> > b/arch/arm/include/asm/armv8/mmu.h
> > index 62d00d15c26d..b2ce13db0d2b 100644
> > --- a/arch/arm/include/asm/armv8/mmu.h
> > +++ b/arch/arm/include/asm/armv8/mmu.h
> > @@ -94,11 +94,11 @@
> >  #define TCR_TG0_4K (0 << 14)
> >  #define TCR_TG0_64K(1 << 14)
> >  #define TCR_TG0_16K(2 << 14)
> > -#define TCR_EPD1_DISABLE   (1 << 23)
> > +#define TCR_EPD1_DISABLE   BIT(23)
> >  
> > -#define TCR_EL1_RSVD   (1 << 31)
> > -#define TCR_EL2_RSVD   (1 << 31 | 1 << 23)
> > -#define TCR_EL3_RSVD   (1 << 31 | 1 << 23)
> > +#define TCR_EL1_RSVD   BIT(31)
> > +#define TCR_EL2_RSVD   (BIT(31) | BIT(23))
> > +#define TCR_EL3_RSVD   (BIT(31) | BIT(23))
> >  
> >  #ifndef __ASSEMBLY__
> >  static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr)
> 
> For consistency within the file, spell it out as 1UL ?  I don't like
> mixing shifts and BITS in a file, and I really don't like being
> inconsistent, so I'd also be OK with BIT() in all of the bits.

I will use (1UL << i) in v2, unless there is some strong preference
to use BIT() macro. In the latter case, a simple definition like
(7 << N) will require conversion to (BIT(N+2) | BIT(N+1) | BIT(N)),
which looks more complicated to me.

> -- 
> Tom

Thanks,
Eugeniu.
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