Re: [U-Boot] [PATCH v2] net/macb: increase RX buffer size for GEM

2019-08-22 Thread Ramon Fried


On August 22, 2019 5:59:11 PM GMT+03:00, Stefan Roese  wrote:
>Hi Ramon,
>
>On 22.08.19 13:15, Ramon Fried wrote:
>> 
>> 
>> On August 22, 2019 12:38:08 PM GMT+03:00, Stefan Roese
> wrote:
>>> Hi Ramon,
>>>
>>> On 14.07.19 17:25, Ramon Fried wrote:
 Macb Ethernet controller requires a RX buffer of 128 bytes. It is
 highly sub-optimal for Gigabit-capable GEM that is able to use
 a bigger DMA buffer. Change this constant and associated macros
 with data stored in the private structure.
 RX DMA buffer size has to be multiple of 64 bytes as indicated in
 DMA Configuration Register specification.

 Signed-off-by: Ramon Fried 
>>>
>>> This patch breaks ethernet on my AT91SAM9G25 based board. With this
>>> patch now, tftp does not complete the xfer any more:
>>>
>>> => tftp 2100 big
>>> ethernet@f802c000: PHY present at 1
>>> ethernet@f802c000: Starting autonegotiation...
>>> ethernet@f802c000: Autonegotiation complete
>>> ethernet@f802c000: link up, 100Mbps full-duplex (lpa: 0xc5e1)
>>> Using ethernet@f802c000 device
>>> TFTP from server 192.168.1.5; our IP address is 192.168.1.249
>>> Filename 'big'.
>>> Load address: 0x2100
>>> Loading: #T T
>>>
>>> With this patch reverted (as well as with v2019.07), tftp works
>>> just fine.
>>>
>>> I did not look into the patch yet. Perhaps you have a quick idea
>>> on why this breaks my platform.
>>>
>>> BTW: When I disable the dcache (dcache off), tftp also works fine
>>> with this patch. So its definitely something cache / dma related.
>>>
>> Thanks for letting me know, I'll be next to a PC tomorrow, I'll look
>> into it.
>
>I did look into this patch a bit and did not find any functional
>change for the non-GEM part I'm using. Hopefully I'll find some more
>time tomorrow to dig into this. If you spot something meanwhile,
>then even better. ;)
Are you sure this is the bad patch? 
try master branch and bisect. 
I would also make sure that your HW is doesn't identify as GEM. 
Thanks, Ramon 
>
>Thanks,
>Stefan

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Sent from my Android device with K-9 Mail. Please excuse my brevity.
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Re: [U-Boot] [PATCH] cmd: pci: Adjust display of digits for 64bit address and size

2019-08-22 Thread Kunihiko Hayashi
Hi Bin,

On Fri, 23 Aug 2019 11:43:55 +0800  wrote:

> Hi Kunihiko,
> 
> On Fri, Aug 23, 2019 at 9:57 AM Kunihiko Hayashi
>  wrote:
> >
> > The command "pci bar" and "pci region" display the address and size in
> > 16 characters including "0x", so the command can only display
> > 14 hexadecimal digits if the number of digits in the address and size is
> > less than 14.
> >
> > ID   BaseSizeWidth  Type
> > --
> >  0   0x002000  0x10  64 MEM   Prefetchable
> >  1   0x8000  0x10  64 MEM   Prefetchable
> 
> I am not sure why the ID 0 line has 14 digits while the ID 1 line has 16 
> digits.
> 
> Shouldn't both lines be either 14 digits so that's what you are fixing
> in this patch?

The original format is "%#016llx".
The base address of ID 1, "0x8000", is greater than
16 characters. So the result value is displayed as it is in 16 digits.

However, the other values are less than 16 characters, and the values are
zero padded. The padded values including "0x" are displayed in 16 characters.
As a result, the values are displayed in 14 digits.

After applying this patch, the values including "0x" are displayed in
18 characters, so the values are always displayed in 16 digits.

Thank you,

---
Best Regards,
Kunihiko Hayashi


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Re: [U-Boot] [PATCH 1/2] dm: core: Add functions to read 64-bit dt properties

2019-08-22 Thread Bin Meng
On Fri, Aug 23, 2019 at 11:58 AM T Karthik Reddy  wrote:
>
> Hi Bin Meng,
>
> > -Original Message-
> > From: Bin Meng 
> > Sent: Friday, August 23, 2019 8:58 AM
> > To: Michal Simek 
> > Cc: U-Boot Mailing List ; T Karthik Reddy
> > ; git 
> > Subject: Re: [U-Boot] [PATCH 1/2] dm: core: Add functions to read 64-bit dt
> > properties
> >
> > Hi Michal,
> >
> > On Thu, Aug 22, 2019 at 7:18 PM Michal Simek 
> > wrote:
> > >
> > > From: T Karthik Reddy 
> > >
> > > This patch adds functions dev_read_u64_default & dev_read_u64 to read
> > > unsigned 64-bit values from devicetree.
> > >
> > > Signed-off-by: T Karthik Reddy 
> > > Signed-off-by: Michal Simek 
> > > ---
> > >
> > >  drivers/core/ofnode.c |  2 +-
> > >  drivers/core/read.c   | 10 ++
> > >  include/dm/ofnode.h   |  2 +-
> > >  include/dm/read.h | 32 
> > >  4 files changed, 44 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index
> > > e74a662d1d30..7eca00cd6613 100644
> > > --- a/drivers/core/ofnode.c
> > > +++ b/drivers/core/ofnode.c
> > > @@ -79,7 +79,7 @@ int ofnode_read_u64(ofnode node, const char
> > *propname, u64 *outp)
> > > return 0;
> > >  }
> > >
> > > -int ofnode_read_u64_default(ofnode node, const char *propname, u64
> > > def)
> > > +u64 ofnode_read_u64_default(ofnode node, const char *propname, u64
> > > +def)
> >
> > Why changing the return value type here?
>
> Because "ofnode_read_u64_default" will get a 64-bit integer value from DT & 
> that 64-bit value should return instead of 32-bit value.

Somehow I misread the changes was to another API ofnode_read_u64. Yes,
that makes sense!
>
> >
> > >  {
> > > assert(ofnode_valid(node));
> > > ofnode_read_u64(node, propname, ); diff --git
> > > a/drivers/core/read.c b/drivers/core/read.c index
> > > 8b5502de1159..5dd2ddca70e8 100644
> > > --- a/drivers/core/read.c
> > > +++ b/drivers/core/read.c
> > > @@ -11,6 +11,16 @@
> > >  #include 
> > >  #include 
> > >
> > > +int dev_read_u64(struct udevice *dev, const char *propname, u64
> > > +*outp) {
> > > +   return ofnode_read_u64(dev_ofnode(dev), propname, outp); }
> > > +
> > > +u64 dev_read_u64_default(struct udevice *dev, const char *propname,
> > > +u64 def) {
> > > +   return ofnode_read_u64_default(dev_ofnode(dev), propname,
> > > +def); }
> > > +
> >
> > I would put the dev_read_u64_* routines after the u32 version below.
>
> It will be modified in V2.
>

Regards,
Bin
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Re: [U-Boot] [PATCH] cmd: pci: Adjust display of digits for 64bit address and size

2019-08-22 Thread Bin Meng
Hi Kunihiko,

On Fri, Aug 23, 2019 at 9:57 AM Kunihiko Hayashi
 wrote:
>
> The command "pci bar" and "pci region" display the address and size in
> 16 characters including "0x", so the command can only display
> 14 hexadecimal digits if the number of digits in the address and size is
> less than 14.
>
> ID   BaseSizeWidth  Type
> --
>  0   0x002000  0x10  64 MEM   Prefetchable
>  1   0x8000  0x10  64 MEM   Prefetchable

I am not sure why the ID 0 line has 14 digits while the ID 1 line has 16 digits.

Shouldn't both lines be either 14 digits so that's what you are fixing
in this patch?

>
> The 64-bit address and size should be displayed in 18(= 16+2) digits,
> so this patch adjusts them.
>
> Cc: Yehuda Yitschak 
> Cc: Simon Glass 
> Signed-off-by: Kunihiko Hayashi 
> ---
>  cmd/pci.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/cmd/pci.c b/cmd/pci.c
> index 2c5ee2a..0043471 100644
> --- a/cmd/pci.c
> +++ b/cmd/pci.c
> @@ -148,7 +148,7 @@ int pci_bar_show(struct udevice *dev)
>
> if ((!is_64 && size_low) || (is_64 && size)) {
> size = ~size + 1;
> -   printf(" %d   %#016llx  %#016llx  %d %s   %s\n",
> +   printf(" %d   %#018llx  %#018llx  %d %s   %s\n",
>bar_id, (unsigned long long)base,
>(unsigned long long)size, is_64 ? 64 : 32,
>is_io ? "I/O" : "MEM",
> @@ -629,10 +629,10 @@ static void pci_show_regions(struct udevice *bus)
> return;
> }
>
> -   printf("#   %-16s %-16s %-16s  %s\n", "Bus start", "Phys start", 
> "Size",
> +   printf("#   %-18s %-18s %-18s  %s\n", "Bus start", "Phys start", 
> "Size",
>"Flags");
> for (i = 0, reg = hose->regions; i < hose->region_count; i++, reg++) {
> -   printf("%d   %#016llx %#016llx %#016llx  ", i,
> +   printf("%d   %#018llx %#018llx %#018llx  ", i,
>(unsigned long long)reg->bus_start,
>(unsigned long long)reg->phys_start,
>(unsigned long long)reg->size);
> --

Regards,
Bin
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[U-Boot] [PATCH v4 1/1] nvme: Fix PRP Offset Invalid

2019-08-22 Thread Aaron Williams
When large writes take place I saw a Samsung EVO 970+ return a status
value of 0x13, PRP Offset Invalid.  I tracked this down to the
improper handling of PRP entries.  The blocks the PRP entries are
placed in cannot cross a page boundary and thus should be allocated
on page boundaries.  This is how the Linux kernel driver works.

With this patch, the PRP pool is allocated on a page boundary and
other than the very first allocation, the pool size is a multiple of
the page size.  Each page can hold (4096 / 8) - 1 entries since the
last entry must point to the next page in the pool.

Signed-off-by: Aaron Williams 
Reviewed-by: Bin Meng 
---
 drivers/nvme/nvme.c | 29 +++--
 1 file changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index d4965e2ef6..47f101e280 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -73,6 +73,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
u64 *prp_pool;
int length = total_len;
int i, nprps;
+   u32 prps_per_page = (page_size >> 3) - 1;
+   u32 num_pages;
+
length -= (page_size - offset);

if (length <= 0) {
@@ -89,15 +92,20 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
}

nprps = DIV_ROUND_UP(length, page_size);
+   num_pages = DIV_ROUND_UP(nprps, prps_per_page);

if (nprps > dev->prp_entry_num) {
free(dev->prp_pool);
-   dev->prp_pool = malloc(nprps << 3);
+   /*
+* Always increase in increments of pages.  It doesn't waste
+* much memory and reduces the number of allocations.
+*/
+   dev->prp_pool = memalign(page_size, num_pages * page_size);
if (!dev->prp_pool) {
printf("Error: malloc prp_pool fail\n");
return -ENOMEM;
}
-   dev->prp_entry_num = nprps;
+   dev->prp_entry_num = prps_per_page * num_pages;
}

prp_pool = dev->prp_pool;
@@ -788,14 +796,6 @@ static int nvme_probe(struct udevice *udev)
}
memset(ndev->queues, 0, NVME_Q_NUM * sizeof(struct nvme_queue *));

-   ndev->prp_pool = malloc(MAX_PRP_POOL);
-   if (!ndev->prp_pool) {
-   ret = -ENOMEM;
-   printf("Error: %s: Out of memory!\n", udev->name);
-   goto free_nvme;
-   }
-   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
-
ndev->cap = nvme_readq(>bar->cap);
ndev->q_depth = min_t(int, NVME_CAP_MQES(ndev->cap) + 1, NVME_Q_DEPTH);
ndev->db_stride = 1 << NVME_CAP_STRIDE(ndev->cap);
@@ -805,6 +805,15 @@ static int nvme_probe(struct udevice *udev)
if (ret)
goto free_queue;

+   /* Allocate after the page size is known */
+   ndev->prp_pool = memalign(ndev->page_size, MAX_PRP_POOL);
+   if (!ndev->prp_pool) {
+   ret = -ENOMEM;
+   printf("Error: %s: Out of memory!\n", udev->name);
+   goto free_nvme;
+   }
+   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
+
ret = nvme_setup_io_queues(ndev);
if (ret)
goto free_queue;
--
2.16.4

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[U-Boot] [PATCH v4 1/1] nvme: Fix PRP Offset Invalid

2019-08-22 Thread Aaron Williams
When large writes take place I saw a Samsung EVO 970+ return a status
value of 0x13, PRP Offset Invalid.  I tracked this down to the
improper handling of PRP entries.  The blocks the PRP entries are
placed in cannot cross a page boundary and thus should be allocated
on page boundaries.  This is how the Linux kernel driver works.

With this patch, the PRP pool is allocated on a page boundary and
other than the very first allocation, the pool size is a multiple of
the page size.  Each page can hold (4096 / 8) - 1 entries since the
last entry must point to the next page in the pool.

Signed-off-by: Aaron Williams 
Reviewed-by: Bin Meng 
---
 drivers/nvme/nvme.c | 29 +++--
 1 file changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index d4965e2ef6..47f101e280 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -73,6 +73,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
u64 *prp_pool;
int length = total_len;
int i, nprps;
+   u32 prps_per_page = (page_size >> 3) - 1;
+   u32 num_pages;
+
length -= (page_size - offset);
 
if (length <= 0) {
@@ -89,15 +92,20 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
}
 
nprps = DIV_ROUND_UP(length, page_size);
+   num_pages = DIV_ROUND_UP(nprps, prps_per_page);
 
if (nprps > dev->prp_entry_num) {
free(dev->prp_pool);
-   dev->prp_pool = malloc(nprps << 3);
+   /*
+* Always increase in increments of pages.  It doesn't waste
+* much memory and reduces the number of allocations.
+*/
+   dev->prp_pool = memalign(page_size, num_pages * page_size);
if (!dev->prp_pool) {
printf("Error: malloc prp_pool fail\n");
return -ENOMEM;
}
-   dev->prp_entry_num = nprps;
+   dev->prp_entry_num = prps_per_page * num_pages;
}
 
prp_pool = dev->prp_pool;
@@ -788,14 +796,6 @@ static int nvme_probe(struct udevice *udev)
}
memset(ndev->queues, 0, NVME_Q_NUM * sizeof(struct nvme_queue *));
 
-   ndev->prp_pool = malloc(MAX_PRP_POOL);
-   if (!ndev->prp_pool) {
-   ret = -ENOMEM;
-   printf("Error: %s: Out of memory!\n", udev->name);
-   goto free_nvme;
-   }
-   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
-
ndev->cap = nvme_readq(>bar->cap);
ndev->q_depth = min_t(int, NVME_CAP_MQES(ndev->cap) + 1, NVME_Q_DEPTH);
ndev->db_stride = 1 << NVME_CAP_STRIDE(ndev->cap);
@@ -805,6 +805,15 @@ static int nvme_probe(struct udevice *udev)
if (ret)
goto free_queue;
 
+   /* Allocate after the page size is known */
+   ndev->prp_pool = memalign(ndev->page_size, MAX_PRP_POOL);
+   if (!ndev->prp_pool) {
+   ret = -ENOMEM;
+   printf("Error: %s: Out of memory!\n", udev->name);
+   goto free_nvme;
+   }
+   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
+
ret = nvme_setup_io_queues(ndev);
if (ret)
goto free_queue;
-- 
2.16.4

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[U-Boot] [PATCH v4 0/1] nvme: Fix PRP Offset Invalid

2019-08-22 Thread Aaron Williams
Doh!  I forgot to check that in.  This should fix it.  I'm still
trying to get used to git send-email.

-Aaron

Aaron Williams (1):
  nvme: Fix PRP Offset Invalid

 drivers/nvme/nvme.c | 29 +++--
 1 file changed, 19 insertions(+), 10 deletions(-)

--
2.16.4

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Re: [U-Boot] [PATCH 1/1] siemens: avoid out of bound access

2019-08-22 Thread Bin Meng
On Fri, Aug 23, 2019 at 3:59 AM Heinrich Schuchardt  wrote:
>
> char num[1];
> sprintf(num, "%d", i);
>
> leads to a buffer overrun.
>
> Simplify the overly complex coding.
>
> Signed-off-by: Heinrich Schuchardt 
> ---
>  board/siemens/common/board.c | 5 +
>  1 file changed, 1 insertion(+), 4 deletions(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 1/2] mtd: spi: Add SYS_SPI_BLOCK_SIZE to Kconfig

2019-08-22 Thread Chee, Tien Fong
On Thu, 2019-08-22 at 09:54 +0200, Marek Vasut wrote:
> On 8/22/19 9:40 AM, Chee, Tien Fong wrote:
> > 
> > On Mon, 2019-07-29 at 15:48 +0800, tien.fong.c...@intel.com wrote:
> > > 
> > > From: Tien Fong Chee 
> > > 
> > > Different SPI flash has different block erase size configuration,
> > > it
> > > can
> > > be configured as block erase size or sub-block erase size, so
> > > SYS_SPI_BLOCK_SIZE is created to provide UBI a consistent block
> > > reading.
> > > UBI block reading would be eventually translated to offset
> > > access into SPI regardless how the block erase size is configured
> > > on
> > > SPI.
> > > This would made the UBI transparent from SPI layer.
> > > 
> > > Signed-off-by: Tien Fong Chee 
> > > ---
> > >  drivers/mtd/spi/Kconfig | 7 +++
> > >  1 file changed, 7 insertions(+)
> > > 
> > > diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
> > > index d3b007a731..ea3779c521 100644
> > > --- a/drivers/mtd/spi/Kconfig
> > > +++ b/drivers/mtd/spi/Kconfig
> > > @@ -196,4 +196,11 @@ config SPI_FLASH_MTD
> > >  
> > >     If unsure, say N
> > >  
> > > +config SYS_SPI_BLOCK_SIZE
> > > + hex "SPI chip eraseblock size for UBI reading"
> > > + depends on SPL_SPI_FLASH_SUPPORT
> > > + default 65536
> > > + help
> > > +   Number of data bytes in a physical eraseblock for UBI
> > > reading.
> > > +
> > >  endmenu # menu "SPI Flash Support"
> > Any comment?
> UBI is able to obtain underlying media erase block size from the MTD
> subsystem, just let it do that. Besides, any such compile-time config
> would fail the next time you change the SPI NOR (e.g. because it's
> EOL),
> as that would force you to rebuild U-Boot, which might ultimately not
> be
> possible.

Okay, let me check how to get this info from MTD. If you have some
ideas, you can let me know too :) .
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Re: [U-Boot] [PATCH 1/2] dm: core: Add functions to read 64-bit dt properties

2019-08-22 Thread Bin Meng
Hi Michal,

On Thu, Aug 22, 2019 at 7:18 PM Michal Simek  wrote:
>
> From: T Karthik Reddy 
>
> This patch adds functions dev_read_u64_default & dev_read_u64
> to read unsigned 64-bit values from devicetree.
>
> Signed-off-by: T Karthik Reddy 
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/core/ofnode.c |  2 +-
>  drivers/core/read.c   | 10 ++
>  include/dm/ofnode.h   |  2 +-
>  include/dm/read.h | 32 
>  4 files changed, 44 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
> index e74a662d1d30..7eca00cd6613 100644
> --- a/drivers/core/ofnode.c
> +++ b/drivers/core/ofnode.c
> @@ -79,7 +79,7 @@ int ofnode_read_u64(ofnode node, const char *propname, u64 
> *outp)
> return 0;
>  }
>
> -int ofnode_read_u64_default(ofnode node, const char *propname, u64 def)
> +u64 ofnode_read_u64_default(ofnode node, const char *propname, u64 def)

Why changing the return value type here?

>  {
> assert(ofnode_valid(node));
> ofnode_read_u64(node, propname, );
> diff --git a/drivers/core/read.c b/drivers/core/read.c
> index 8b5502de1159..5dd2ddca70e8 100644
> --- a/drivers/core/read.c
> +++ b/drivers/core/read.c
> @@ -11,6 +11,16 @@
>  #include 
>  #include 
>
> +int dev_read_u64(struct udevice *dev, const char *propname, u64 *outp)
> +{
> +   return ofnode_read_u64(dev_ofnode(dev), propname, outp);
> +}
> +
> +u64 dev_read_u64_default(struct udevice *dev, const char *propname, u64 def)
> +{
> +   return ofnode_read_u64_default(dev_ofnode(dev), propname, def);
> +}
> +

I would put the dev_read_u64_* routines after the u32 version below.

>  int dev_read_u32(struct udevice *dev, const char *propname, u32 *outp)
>  {
> return ofnode_read_u32(dev_ofnode(dev), propname, outp);
> diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
> index 4f89db44c19e..5c4cbf099869 100644
> --- a/include/dm/ofnode.h
> +++ b/include/dm/ofnode.h
> @@ -254,7 +254,7 @@ int ofnode_read_u64(ofnode node, const char *propname, 
> u64 *outp);
>   * @def:   default value to return if the property has no value
>   * @return property value, or @def if not found
>   */
> -int ofnode_read_u64_default(ofnode node, const char *propname, u64 def);
> +u64 ofnode_read_u64_default(ofnode node, const char *propname, u64 def);
>
>  /**
>   * ofnode_read_string() - Read a string from a property
> diff --git a/include/dm/read.h b/include/dm/read.h
> index 0c62d62f1148..8985f248c68f 100644
> --- a/include/dm/read.h
> +++ b/include/dm/read.h
> @@ -44,6 +44,26 @@ static inline bool dev_of_valid(struct udevice *dev)
>  }
>
>  #ifndef CONFIG_DM_DEV_READ_INLINE
> +/**
> + * dev_read_u64() - read a 64-bit integer from a device's DT property
> + *
> + * @dev:device to read DT property from
> + * @propname:   name of the property to read from
> + * @outp:   place to put value (if found)
> + * @return 0 if OK, -ve on error
> + */
> +int dev_read_u64(struct udevice *dev, const char *propname, u64 *outp);
> +
> +/**
> + * dev_read_u64_default() - read a 64-bit integer from a device's DT property
> + *
> + * @dev:device to read DT property from
> + * @propname:   name of the property to read from
> + * @def:default value to return if the property has no value
> + * @return property value, or @def if not found
> + */
> +u64 dev_read_u64_default(struct udevice *dev, const char *propname, u64 def);
> +
>  /**
>   * dev_read_u32() - read a 32-bit integer from a device's DT property
>   *
> @@ -563,6 +583,18 @@ int dev_read_alias_highest_id(const char *stem);
>
>  #else /* CONFIG_DM_DEV_READ_INLINE is enabled */
>
> +static inline int dev_read_u64(struct udevice *dev,
> +  const char *propname, u64 *outp)
> +{
> +   return ofnode_read_u64(dev_ofnode(dev), propname, outp);
> +}
> +
> +static inline u64 dev_read_u64_default(struct udevice *dev,
> +  const char *propname, u64 def)
> +{
> +   return ofnode_read_u64_default(dev_ofnode(dev), propname, def);
> +}
> +
>  static inline int dev_read_u32(struct udevice *dev,
>const char *propname, u32 *outp)
>  {
> --

Regards,
Bin
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Re: [U-Boot] [PATCH v3 1/1] nvme: Fix PRP Offset Invalid

2019-08-22 Thread Bin Meng
Hi Aaron,

On Fri, Aug 23, 2019 at 2:05 AM Aaron Williams  wrote:
>
> When large writes take place I saw a Samsung EVO 970+ return a status
> value of 0x13, PRP Offset Invalid.  I tracked this down to the
> improper handling of PRP entries.  The blocks the PRP entries are
> placed in cannot cross a page boundary and thus should be allocated
> on page boundaries.  This is how the Linux kernel driver works.
>
> With this patch, the PRP pool is allocated on a page boundary and
> other than the very first allocation, the pool size is a multiple of
> the page size.  Each page can hold (4096 / 8) - 1 entries since the
> last entry must point to the next page in the pool.
>
> Signed-off-by: Aaron Williams 
> Reviewed-by: Bin Meng 
> ---
>  drivers/nvme/nvme.c | 28 ++--
>  1 file changed, 18 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
> index d4965e2ef6..bc4cf40b40 100644
> --- a/drivers/nvme/nvme.c
> +++ b/drivers/nvme/nvme.c
> @@ -73,6 +73,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
> u64 *prp_pool;
> int length = total_len;
> int i, nprps;
> +   u32 prps_per_page = (page_size >> 3) - 1;
> +   u32 num_pages;
> +
> length -= (page_size - offset);
>
> if (length <= 0) {
> @@ -89,15 +92,19 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 
> *prp2,
> }
>
> nprps = DIV_ROUND_UP(length, page_size);
> +   num_pages = DIV_ROUND_UP(nprps, prps_per_page);
>
> if (nprps > dev->prp_entry_num) {
> free(dev->prp_pool);
> -   dev->prp_pool = malloc(nprps << 3);
> +   /* Always increase in increments of pages.  It doesn't waste

It seems you forgot the address this multi-line comment format issue.

Please resend the patch. thanks!

> +* much memory and reduces the number of allocations.
> +*/

[snip]

Regards,
Bin
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Re: [U-Boot] [PATCH 1/1] cmd: gpio: remove redundant assignment

2019-08-22 Thread Bin Meng
On Fri, Aug 23, 2019 at 4:19 AM Heinrich Schuchardt  wrote:
>
> The assigned value NULL is overwritten before being used. Remove the
> assignment.
>
> Signed-off-by: Heinrich Schuchardt 
> ---
>  cmd/gpio.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH] net: make net_random_ethaddr() more random

2019-08-22 Thread Bin Meng
On Fri, Aug 23, 2019 at 6:08 AM Michael Walle  wrote:
>
> The net_random_ethaddr() tries to get some entropy from different
> startup times of a board. The seed is initialized with get_timer() which
> has only a granularity of milliseconds. We can do better if we use
> get_ticks() which returns the raw timer ticks. Using this we have a
> higher chance of getting different values at startup.
>
> Signed-off-by: Michael Walle 
> ---
>  include/net.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/net.h b/include/net.h
> index a54d5eeac5..8215316bd3 100644
> --- a/include/net.h
> +++ b/include/net.h
> @@ -816,7 +816,7 @@ static inline int is_valid_ethaddr(const u8 *addr)
>  static inline void net_random_ethaddr(uchar *addr)
>  {
> int i;
> -   unsigned int seed = get_timer(0);
> +   unsigned int seed = get_ticks() & (unsigned int)-1;

Shouldn't this be directly:

unsigned int seed = get_ticks();

>
> for (i = 0; i < 6; i++)
> addr[i] = rand_r();

Regards,
Bin
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Re: [U-Boot] [PATCH 1/3] dm: pcie_fsl: Fix workaround of P4080 erratum A003

2019-08-22 Thread Bin Meng
On Fri, Aug 23, 2019 at 10:43 AM Z.q. Hou  wrote:
>
> Hi Bin,
>
> Sorry for my delay respond, and thanks for your comments!
>
> > -Original Message-
> > From: Bin Meng [mailto:bmeng...@gmail.com]
> > Sent: 2019年7月23日 21:04
> > To: Z.q. Hou 
> > Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> > 
> > Subject: Re: [U-Boot] [PATCH 1/3] dm: pcie_fsl: Fix workaround of P4080
> > erratum A003
> >
> > On Tue, Jul 23, 2019 at 8:53 PM Hou Zhiqiang 
> > wrote:
> > >
> > > In the workaround of P4080 erratum A003, it uses the macro
> > > CONFIG_SYS_FSL_CORENET_SERDES_ADDR to get the SerDes block register
> > > address, the CONFIG_SYS_FSL_CORENET_SERDES_ADDR is defined as
> > > following:
> > >
> > > #define CONFIG_SYS_FSL_CORENET_SERDES_ADDR \
> > > (CONFIG_SYS_IMMR +
> > CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
> > >
> > > This is valid on P4080, but on non-corenet platforms, such as MPC8548,
> > > there is not definition of CONFIG_SYS_FSL_CORENET_SERDES_OFFSET, then
> > > on these platforms the following build error will come up:
> > >
> > > drivers/pci/pcie_fsl.c: In function 'fsl_pcie_init_port':
> > > ./arch/powerpc/include/asm/immap_85xx.h:3000:21: error:
> > > 'CONFIG_SYS_FSL_CORENET_SERDES_OFFSET' undeclared (first use in this
> > > function); did you mean 'CONFIG_SYS_FSL_CORENET_SERDES_ADDR'?
> > >   (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
> > >
> > ^~~~
> > >
> > > Signed-off-by: Hou Zhiqiang 
> > > ---
> > >  drivers/pci/pcie_fsl.c | 2 +-
> > >  drivers/pci/pcie_fsl.h | 6 ++
> > >  2 files changed, 7 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index
> > > bfb207e..999e9c9 100644
> > > --- a/drivers/pci/pcie_fsl.c
> > > +++ b/drivers/pci/pcie_fsl.c
> > > @@ -445,7 +445,7 @@ static int fsl_pcie_init_port(struct fsl_pcie *pcie)
> > > !fsl_pcie_link_up(pcie)) {
> > > serdes_corenet_t *srds_regs;
> > >
> > > -   srds_regs = (void
> > *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
> > > +   srds_regs = (void *)P4080_SERDES_ADDR;
> > > val_32 = in_be32(_regs->srdspccr0);
> > >
> > > if ((val_32 >> 28) == 3) { diff --git
> > > a/drivers/pci/pcie_fsl.h b/drivers/pci/pcie_fsl.h index
> > > ce2b1af..e09099b 100644
> > > --- a/drivers/pci/pcie_fsl.h
> > > +++ b/drivers/pci/pcie_fsl.h
> > > @@ -41,6 +41,12 @@
> > >  #define LTSSM_L0_REV3  0x11
> > >  #define LTSSM_L0   0x16
> > >
> > > +#ifdef ARCH_P4080
> > > +#define P4080_SERDES_ADDR
> > CONFIG_SYS_FSL_CORENET_SERDES_ADDR
> > > +#else
> > > +#define P4080_SERDES_ADDR  0
> >
> > So for non-P4080 platform, we are accessing address at zero?
>
> This macro is only used in the workaround of P4080 Erratum A003, so for 
> non-P4080, it won't run into this workaround.
>

Still don't get it. Then why not use #ifdef P4080_Erratum_A003 #endif ?

Regards,
Bin
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Re: [U-Boot] [U-BOOT PATCH] gpio: fu540: add support for DM based gpio driver for FU540 SoC

2019-08-22 Thread Bin Meng
On Fri, Aug 23, 2019 at 9:02 AM Sagar Shrikant Kadam
 wrote:
>
> This patch adds a DM based driver model for gpio controller present in
> FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
> bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
> GPIO15 are routed to the J1 header on the board.
>
> This implementation is ported from linux based gpio driver submitted
> for review by Wesley W. Terpstra  and/or Atish Patra
> . The linux driver can be referred
> here [1]
>
> [1]: https://lkml.org/lkml/2018/10/9/1103
>
> Signed-off-by: Sagar Shrikant Kadam 
> ---
>  arch/riscv/include/asm/arch-generic/gpio.h |  35 +++
>  arch/riscv/include/asm/gpio.h  |   6 ++
>  board/sifive/fu540/Kconfig |   3 +
>  drivers/gpio/Kconfig   |   8 ++
>  drivers/gpio/Makefile  |   1 +
>  drivers/gpio/fu540-gpio.c  | 145 
> +
>  6 files changed, 198 insertions(+)
>  create mode 100644 arch/riscv/include/asm/arch-generic/gpio.h
>  create mode 100644 arch/riscv/include/asm/gpio.h
>  create mode 100644 drivers/gpio/fu540-gpio.c

Pleas split this into two patch:

patch [1/2]: add the gpio driver
patch [2/2]: enable the gpio driver in sifive/fu540

Looks DTS change is missing??

>
> diff --git a/arch/riscv/include/asm/arch-generic/gpio.h 
> b/arch/riscv/include/asm/arch-generic/gpio.h
> new file mode 100644
> index 000..bedb8d8
> --- /dev/null
> +++ b/arch/riscv/include/asm/arch-generic/gpio.h
> @@ -0,0 +1,35 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2019 SiFive, Inc.
> + */
> +
> +#ifndef _GPIO_FU540_H
> +#define _GPIO_FU540_H
> +
> +#define GPIO_INPUT_VAL 0x00
> +#define GPIO_INPUT_EN  0x04
> +#define GPIO_OUTPUT_EN 0x08
> +#define GPIO_OUTPUT_VAL0x0C
> +#define GPIO_RISE_IE   0x18
> +#define GPIO_RISE_IP   0x1C
> +#define GPIO_FALL_IE   0x20
> +#define GPIO_FALL_IP   0x24
> +#define GPIO_HIGH_IE   0x28
> +#define GPIO_HIGH_IP   0x2C
> +#define GPIO_LOW_IE0x30
> +#define GPIO_LOW_IP0x34
> +#define GPIO_OUTPUT_XOR0x40
> +
> +#define NR_GPIOS   16
> +
> +enum gpio_state {
> +   LOW,
> +   HIGH
> +};
> +
> +/* Details about a GPIO bank */
> +struct fu540_gpio_platdata {
> +   u8 *base; /* address of registers in physical memory */

Shouldn't it be u32?

> +};
> +
> +#endif /* _GPIO_FU540_H */
> diff --git a/arch/riscv/include/asm/gpio.h b/arch/riscv/include/asm/gpio.h
> new file mode 100644
> index 000..008d756
> --- /dev/null
> +++ b/arch/riscv/include/asm/gpio.h
> @@ -0,0 +1,6 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2018 SiFive, Inc.
> + */
> +
> +#include 
> diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
> index 5d65080..f939ed2 100644
> --- a/board/sifive/fu540/Kconfig
> +++ b/board/sifive/fu540/Kconfig
> @@ -44,6 +44,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> imply MMC_SPI
> imply MMC_BROKEN_CD
> imply CMD_MMC
> +   imply DM_GPIO
> +   imply FU540_GPIO
> +   imply CMD_GPIO
> imply SMP
>
>  endif
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index 7d9c97f..b93092a 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -280,6 +280,14 @@ config STM32_GPIO
>   usable on many stm32 families like stm32f4/f7/h7 and stm32mp1.
>   Tested on STM32F7.
>
> +config FU540_GPIO

rename this to SIFIVE_GPIO

> +   bool "FU540 GPIO Driver"
> +   depends on DM_GPIO
> +   help
> + Device model driver for GPIO controller present in FU540 SoC. This
> + driver enables GPIO interface on HiFive Unleashed A00 board a board
> + from SiFive Inc. having FU540-C000 SoC.
> +
>  config MVEBU_GPIO
> bool "Marvell MVEBU GPIO driver"
> depends on DM_GPIO && ARCH_MVEBU
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 4a8aa0f..238ad17 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -61,3 +61,4 @@ obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o
>  obj-$(CONFIG_PM8916_GPIO)  += pm8916_gpio.o
>  obj-$(CONFIG_MT7621_GPIO)  += mt7621_gpio.o
>  obj-$(CONFIG_MSCC_SGPIO)   += mscc_sgpio.o
> +obj-$(CONFIG_FU540_GPIO)   += fu540-gpio.o
> diff --git a/drivers/gpio/fu540-gpio.c b/drivers/gpio/fu540-gpio.c

I think the name should be: sifive_gpio.c

> new file mode 100644
> index 000..7761689
> --- /dev/null
> +++ b/drivers/gpio/fu540-gpio.c
> @@ -0,0 +1,145 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * SiFive GPIO driver
> + *
> + * Copyright (C) 2019 SiFive, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.

No need this because there is already SPDX in the first line.

> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> 

Re: [U-Boot] [PATCH v1] pci: add DM based mpc85xx driver

2019-08-22 Thread Z.q. Hou


> -Original Message-
> From: Prabhakar Kushwaha
> Sent: 2019年8月22日 19:35
> To: Heiko Schocher ; u-boot@lists.denx.de; Z.q. Hou
> 
> Cc: Alexander Graf ; Andrew F. Davis ; Xiaowei
> Bao ; Bin Meng ; Eugen
> Hristev ; Heinrich Schuchardt
> ; Horatiu Vultur ; Z.q.
> Hou ; Krzysztof Kozlowski ; Liviu
> Dudau ; Marek Vasut
> ; Mario Six ; Michal Simek
> ; Neil Armstrong ;
> Ryder Lee ; Simon Glass ;
> Stefan Roese 
> Subject: RE: [PATCH v1] pci: add DM based mpc85xx driver
> 
> Dear Zhiqiang
> 
> > -Original Message-
> > From: Heiko Schocher 
> > Sent: Tuesday, July 16, 2019 9:06 AM
> > To: u-boot@lists.denx.de
> > Cc: Heiko Schocher ; Alexander Graf ;
> > Andrew F. Davis ; Xiaowei Bao ; Bin
> > Meng ; Eugen Hristev
> > ; Heinrich Schuchardt
> > ; Horatiu Vultur ;
> > Z.q. Hou ; Krzysztof Kozlowski
> > ; Liviu Dudau ; Marek
> Vasut
> > ; Mario Six ; Michal Simek
> > ; Neil Armstrong ;
> > Prabhakar Kushwaha ; Ryder Lee
> > ; Simon Glass ; Stefan
> Roese
> > 
> > Subject: [PATCH v1] pci: add DM based mpc85xx driver
> >
> > add DM based PCI Configuration space access support for MPC85xx PCI
> > Bridge
> >
> > Signed-off-by: Heiko Schocher 
> >
> > ---
> 
> Can you please review this patch
> 

Sure.

Thanks,
Zhiqiang

> --pk
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Re: [U-Boot] [PATCH 1/3] dm: pcie_fsl: Fix workaround of P4080 erratum A003

2019-08-22 Thread Z.q. Hou
Hi Bin,

Sorry for my delay respond, and thanks for your comments!

> -Original Message-
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: 2019年7月23日 21:04
> To: Z.q. Hou 
> Cc: U-Boot Mailing List ; Prabhakar Kushwaha
> 
> Subject: Re: [U-Boot] [PATCH 1/3] dm: pcie_fsl: Fix workaround of P4080
> erratum A003
> 
> On Tue, Jul 23, 2019 at 8:53 PM Hou Zhiqiang 
> wrote:
> >
> > In the workaround of P4080 erratum A003, it uses the macro
> > CONFIG_SYS_FSL_CORENET_SERDES_ADDR to get the SerDes block register
> > address, the CONFIG_SYS_FSL_CORENET_SERDES_ADDR is defined as
> > following:
> >
> > #define CONFIG_SYS_FSL_CORENET_SERDES_ADDR \
> > (CONFIG_SYS_IMMR +
> CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
> >
> > This is valid on P4080, but on non-corenet platforms, such as MPC8548,
> > there is not definition of CONFIG_SYS_FSL_CORENET_SERDES_OFFSET, then
> > on these platforms the following build error will come up:
> >
> > drivers/pci/pcie_fsl.c: In function 'fsl_pcie_init_port':
> > ./arch/powerpc/include/asm/immap_85xx.h:3000:21: error:
> > 'CONFIG_SYS_FSL_CORENET_SERDES_OFFSET' undeclared (first use in this
> > function); did you mean 'CONFIG_SYS_FSL_CORENET_SERDES_ADDR'?
> >   (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
> >
> ^~~~
> >
> > Signed-off-by: Hou Zhiqiang 
> > ---
> >  drivers/pci/pcie_fsl.c | 2 +-
> >  drivers/pci/pcie_fsl.h | 6 ++
> >  2 files changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index
> > bfb207e..999e9c9 100644
> > --- a/drivers/pci/pcie_fsl.c
> > +++ b/drivers/pci/pcie_fsl.c
> > @@ -445,7 +445,7 @@ static int fsl_pcie_init_port(struct fsl_pcie *pcie)
> > !fsl_pcie_link_up(pcie)) {
> > serdes_corenet_t *srds_regs;
> >
> > -   srds_regs = (void
> *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
> > +   srds_regs = (void *)P4080_SERDES_ADDR;
> > val_32 = in_be32(_regs->srdspccr0);
> >
> > if ((val_32 >> 28) == 3) { diff --git
> > a/drivers/pci/pcie_fsl.h b/drivers/pci/pcie_fsl.h index
> > ce2b1af..e09099b 100644
> > --- a/drivers/pci/pcie_fsl.h
> > +++ b/drivers/pci/pcie_fsl.h
> > @@ -41,6 +41,12 @@
> >  #define LTSSM_L0_REV3  0x11
> >  #define LTSSM_L0   0x16
> >
> > +#ifdef ARCH_P4080
> > +#define P4080_SERDES_ADDR
> CONFIG_SYS_FSL_CORENET_SERDES_ADDR
> > +#else
> > +#define P4080_SERDES_ADDR  0
> 
> So for non-P4080 platform, we are accessing address at zero?

This macro is only used in the workaround of P4080 Erratum A003, so for 
non-P4080, it won't run into this workaround.

Thanks,
Zhiqiang

> 
> Regards,
> Bin
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[U-Boot] [PATCH] cmd: pci: Adjust display of digits for 64bit address and size

2019-08-22 Thread Kunihiko Hayashi
The command "pci bar" and "pci region" display the address and size in
16 characters including "0x", so the command can only display
14 hexadecimal digits if the number of digits in the address and size is
less than 14.

ID   BaseSizeWidth  Type
--
 0   0x002000  0x10  64 MEM   Prefetchable
 1   0x8000  0x10  64 MEM   Prefetchable

The 64-bit address and size should be displayed in 18(= 16+2) digits,
so this patch adjusts them.

Cc: Yehuda Yitschak 
Cc: Simon Glass 
Signed-off-by: Kunihiko Hayashi 
---
 cmd/pci.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/cmd/pci.c b/cmd/pci.c
index 2c5ee2a..0043471 100644
--- a/cmd/pci.c
+++ b/cmd/pci.c
@@ -148,7 +148,7 @@ int pci_bar_show(struct udevice *dev)
 
if ((!is_64 && size_low) || (is_64 && size)) {
size = ~size + 1;
-   printf(" %d   %#016llx  %#016llx  %d %s   %s\n",
+   printf(" %d   %#018llx  %#018llx  %d %s   %s\n",
   bar_id, (unsigned long long)base,
   (unsigned long long)size, is_64 ? 64 : 32,
   is_io ? "I/O" : "MEM",
@@ -629,10 +629,10 @@ static void pci_show_regions(struct udevice *bus)
return;
}
 
-   printf("#   %-16s %-16s %-16s  %s\n", "Bus start", "Phys start", "Size",
+   printf("#   %-18s %-18s %-18s  %s\n", "Bus start", "Phys start", "Size",
   "Flags");
for (i = 0, reg = hose->regions; i < hose->region_count; i++, reg++) {
-   printf("%d   %#016llx %#016llx %#016llx  ", i,
+   printf("%d   %#018llx %#018llx %#018llx  ", i,
   (unsigned long long)reg->bus_start,
   (unsigned long long)reg->phys_start,
   (unsigned long long)reg->size);
-- 
2.7.4

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[U-Boot] [U-BOOT PATCH] gpio: fu540: add support for DM based gpio driver for FU540 SoC

2019-08-22 Thread Sagar Shrikant Kadam
This patch adds a DM based driver model for gpio controller present in
FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
GPIO15 are routed to the J1 header on the board.

This implementation is ported from linux based gpio driver submitted
for review by Wesley W. Terpstra  and/or Atish Patra
. The linux driver can be referred
here [1]

[1]: https://lkml.org/lkml/2018/10/9/1103

Signed-off-by: Sagar Shrikant Kadam 
---
 arch/riscv/include/asm/arch-generic/gpio.h |  35 +++
 arch/riscv/include/asm/gpio.h  |   6 ++
 board/sifive/fu540/Kconfig |   3 +
 drivers/gpio/Kconfig   |   8 ++
 drivers/gpio/Makefile  |   1 +
 drivers/gpio/fu540-gpio.c  | 145 +
 6 files changed, 198 insertions(+)
 create mode 100644 arch/riscv/include/asm/arch-generic/gpio.h
 create mode 100644 arch/riscv/include/asm/gpio.h
 create mode 100644 drivers/gpio/fu540-gpio.c

diff --git a/arch/riscv/include/asm/arch-generic/gpio.h 
b/arch/riscv/include/asm/arch-generic/gpio.h
new file mode 100644
index 000..bedb8d8
--- /dev/null
+++ b/arch/riscv/include/asm/arch-generic/gpio.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 SiFive, Inc.
+ */
+
+#ifndef _GPIO_FU540_H
+#define _GPIO_FU540_H
+
+#define GPIO_INPUT_VAL 0x00
+#define GPIO_INPUT_EN  0x04
+#define GPIO_OUTPUT_EN 0x08
+#define GPIO_OUTPUT_VAL0x0C
+#define GPIO_RISE_IE   0x18
+#define GPIO_RISE_IP   0x1C
+#define GPIO_FALL_IE   0x20
+#define GPIO_FALL_IP   0x24
+#define GPIO_HIGH_IE   0x28
+#define GPIO_HIGH_IP   0x2C
+#define GPIO_LOW_IE0x30
+#define GPIO_LOW_IP0x34
+#define GPIO_OUTPUT_XOR0x40
+
+#define NR_GPIOS   16
+
+enum gpio_state {
+   LOW,
+   HIGH
+};
+
+/* Details about a GPIO bank */
+struct fu540_gpio_platdata {
+   u8 *base; /* address of registers in physical memory */
+};
+
+#endif /* _GPIO_FU540_H */
diff --git a/arch/riscv/include/asm/gpio.h b/arch/riscv/include/asm/gpio.h
new file mode 100644
index 000..008d756
--- /dev/null
+++ b/arch/riscv/include/asm/gpio.h
@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018 SiFive, Inc.
+ */
+
+#include 
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
index 5d65080..f939ed2 100644
--- a/board/sifive/fu540/Kconfig
+++ b/board/sifive/fu540/Kconfig
@@ -44,6 +44,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy
imply MMC_SPI
imply MMC_BROKEN_CD
imply CMD_MMC
+   imply DM_GPIO
+   imply FU540_GPIO
+   imply CMD_GPIO
imply SMP
 
 endif
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 7d9c97f..b93092a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -280,6 +280,14 @@ config STM32_GPIO
  usable on many stm32 families like stm32f4/f7/h7 and stm32mp1.
  Tested on STM32F7.
 
+config FU540_GPIO
+   bool "FU540 GPIO Driver"
+   depends on DM_GPIO
+   help
+ Device model driver for GPIO controller present in FU540 SoC. This
+ driver enables GPIO interface on HiFive Unleashed A00 board a board
+ from SiFive Inc. having FU540-C000 SoC.
+
 config MVEBU_GPIO
bool "Marvell MVEBU GPIO driver"
depends on DM_GPIO && ARCH_MVEBU
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 4a8aa0f..238ad17 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -61,3 +61,4 @@ obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o
 obj-$(CONFIG_PM8916_GPIO)  += pm8916_gpio.o
 obj-$(CONFIG_MT7621_GPIO)  += mt7621_gpio.o
 obj-$(CONFIG_MSCC_SGPIO)   += mscc_sgpio.o
+obj-$(CONFIG_FU540_GPIO)   += fu540-gpio.o
diff --git a/drivers/gpio/fu540-gpio.c b/drivers/gpio/fu540-gpio.c
new file mode 100644
index 000..7761689
--- /dev/null
+++ b/drivers/gpio/fu540-gpio.c
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SiFive GPIO driver
+ *
+ * Copyright (C) 2019 SiFive, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int fu540_gpio_probe(struct udevice *dev)
+{
+   struct fu540_gpio_platdata *plat = dev_get_platdata(dev);
+   struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+   char name[18], *str;
+
+   sprintf(name, "gpio@%4p", plat->base);
+   str = strdup(name);
+   if (!str)
+   return -ENOMEM;
+   uc_priv->bank_name = str;
+   uc_priv->gpio_count = NR_GPIOS;
+
+   return 0;
+}
+
+static void fu540_update_gpio_reg(u8 *bptr, u32 offset, bool value)
+{
+   void __iomem *ptr = (void __iomem *)bptr;
+
+   u32 bit = BIT(offset), old = readl(ptr);
+
+   if 

[U-Boot] [U-BOOT PATCH] add gpio support for HiFive Unleashed A00 board.

2019-08-22 Thread Sagar Shrikant Kadam
U-Boot currently is missing GPIO support for FU540-C000 SoC which is
mounted on HiFive Unleashed A00 board. This patch is intended to add DM
based GPIO controller driver in order to access GPIO pins within the SoC
using GPIO command in U-Boot. More details on the GPIO controller within
the SoC can be found at[1]

The driver is based above master branch of u-boot-riscv.git and provides a
method to configure Input/Output mode of the GPIO pin along with an option
to set or clear state of the GPIO pin. The patch is available in
dev/sagark/gpio_v2 branch here[2].

GPIO device node added to the mainline bound device tree for HiFive
Unleashed is available in dev/sagark/mlv5.3-rc5 branch of repo here[3].

This implementation is ported from linux driver submitted for review
at [4]. 

More details of GPIO pin routing on J1 header is available in schematic
document[5]

[1] https://static.dev.sifive.com/FU540-C000-v1.0.pdf
[2] https://github.com/sagsifive/u-boot
[3] https://github.sifive.com/sagsifive/riscv-linux/
[4] https://lkml.org/lkml/2018/10/9/1103
[5] 
https://static.dev.sifive.com/dev-kits/hifive-unleashed/hifive-unleashed-a00-schematics.pdf

Driver Testing:
#Set GPIO1 high. 
=>gpio set 1
  Can be confirmed by probing pin No #24 on J1 Header or memory dump of 
  gpio register space viz: #md 0x1006 

#Set GPIO1 low
=>gpio clear 0

#Toggle GPIO1 
=>gpio toggle 1 #Toggle value of GPIO1  
=>gpio toggle 1 #Toggle value of GPIO1

#Configure pin as input
=>gpio input 3  #Configure gpio line 3 as input.

Sagar Shrikant Kadam (1):
  gpio: fu540: add support for DM based gpio driver for FU540 SoC

 arch/riscv/include/asm/arch-generic/gpio.h |  35 +++
 arch/riscv/include/asm/gpio.h  |   6 ++
 board/sifive/fu540/Kconfig |   3 +
 drivers/gpio/Kconfig   |   8 ++
 drivers/gpio/Makefile  |   1 +
 drivers/gpio/fu540-gpio.c  | 145 +
 6 files changed, 198 insertions(+)
 create mode 100644 arch/riscv/include/asm/arch-generic/gpio.h
 create mode 100644 arch/riscv/include/asm/gpio.h
 create mode 100644 drivers/gpio/fu540-gpio.c

-- 
2.7.4

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Re: [U-Boot] [PATCH] efi_loader: disk: install file system protocol to a whole disk

2019-08-22 Thread AKASHI Takahiro
On Thu, Aug 22, 2019 at 12:52:41PM +0200, Heinrich Schuchardt wrote:
> On 8/22/19 11:11 AM, Mark Kettenis wrote:
> >>From: AKASHI Takahiro 
> >>Date: Thu, 22 Aug 2019 17:06:25 +0900
> >>
> >>Currently, a whole disk without any partitions is not associated
> >>with EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. So even if it houses FAT
> >>file system, there is a chance that we may not be able to access
> >>it, particularly, when accesses are to be attempted after searching
> >>that protocol against a device handle.
> >>
> >>With this patch, EFI_SIMPLE_FILE_SYSTEM_PROTOCOL is installed
> >>to such a disk if part_get_info() shows there is not partition
> >>table installed on it.
> >
> >Do other UEFI implementations support this?
> 
> What use cases exist that come without partition table?

I didn't find any *explicit* description in UEFI specification
that mandates that any block device should have a partition table.
It may be mandatory for boot(able) disks, but for others?

> You can create an MBR with partition table that is a valid start of a
> file system.

Obviously we can do that, but if this is not a mandatory requirement,
we'd better support no-partitioned cases.

> So you should first check if a partition table exists. Only if none
> exists you can test for a possible file system.

I don't get your point. Are you saying that we should support a file system
for a disk only if it has a file system?
This is not true even for existing partitions as FILE_SYSTEM PROTOCOL
is always installed to every partition whether or not it really
houses a file system under the current implementation.

Thanks,
-Takahiro Akashi


> Best regards
> 
> Heinrich
> 
> >
> >>Signed-off-by: AKASHI Takahiro 
> >>---
> >>  lib/efi_loader/efi_disk.c | 4 +++-
> >>  1 file changed, 3 insertions(+), 1 deletion(-)
> >>
> >>diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> >>index 7a6b06821a47..548fe667e6f8 100644
> >>--- a/lib/efi_loader/efi_disk.c
> >>+++ b/lib/efi_loader/efi_disk.c
> >>@@ -239,6 +239,7 @@ static efi_status_t efi_disk_add_dev(
> >>struct efi_disk_obj **disk)
> >>  {
> >>struct efi_disk_obj *diskobj;
> >>+   disk_partition_t info;
> >>efi_status_t ret;
> >>
> >>/* Don't add empty devices */
> >>@@ -270,7 +271,8 @@ static efi_status_t efi_disk_add_dev(
> >>   diskobj->dp);
> >>if (ret != EFI_SUCCESS)
> >>return ret;
> >>-   if (part >= 1) {
> >>+   /* partitions or whole disk without partitions */
> >>+   if (part >= 1 || part_get_info(desc, part, )) {
> >>diskobj->volume = efi_simple_file_system(desc, part,
> >> diskobj->dp);
> >>ret = efi_add_protocol(>header,
> >>--
> >>2.21.0
> >>
> >>___
> >>U-Boot mailing list
> >>U-Boot@lists.denx.de
> >>https://lists.denx.de/listinfo/u-boot
> >
> 
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Re: [U-Boot] efi_loader: LoadOptions (bootargs)

2019-08-22 Thread AKASHI Takahiro
On Thu, Aug 22, 2019 at 07:53:46PM +0200, Heinrich Schuchardt wrote:
> On 8/22/19 11:03 AM, AKASHI Takahiro wrote:
> >Heinrich,
> >
> >I'm now wondering whether LoadedImage's LoadOptions, which comes
> >from "bootargs" variable, should contain a command(application) name
> >as a first argument or not.
> >
> >When I tried some efi application (efitools), I found that it expected
> >so. For example, efitools' UpdateVars.efi takes
> > Usage: UpdateVars.efi: [-g guid] [-a] [-e] [-b] var file
> >
> >and I had to passed arguments by specifying "foo db DB.auth" for
> >"bootargs" where foo makes no sense.
> >
> >What do you think about this issue?
> 
> Do you relate to
> https://git.kernel.org/pub/scm/linux/kernel/git/jejb/efitools.git?

Yes.

> This style of parsing LoadOptions is defined by the EFI shell. See
> function ParseCommandLineToArgs() in
> ShellPkg/Application/Shell/ShellParametersProtocol.c.

So do you mean that Shell.efi is responsible for adding a command name
to LoadOptions (or bootargs) as a first parameter or that LoadOptions
is solely for Shell environment?

If so, should we do the same thing at bootefi?

> If UpdateVars.efi would work differently it could not be launched via
> the shell.

Well, I'm trying to run UpdateVars.efi in a standalone way
by invoking it directly from bootefi/bootmgr and it obviously fails
due to this issue.

Thanks,
-Takashiro Akashi


> Best regards
> 
> Heinrich
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Re: [U-Boot] pull request: u-boot-fsl-qoriq/master

2019-08-22 Thread Tom Rini
On Thu, Aug 22, 2019 at 08:32:50AM +, Prabhakar Kushwaha wrote:

> Dear Tom,
> 
> Please find my pull request for u-boot-fsl-qoriq/master
> 
> Summary i.e. Changes for v2019.10-rc3
> - i2c dm model support of lx2160a, ls1088a, lx2088a, ls1028a
> - icid setup for ls1028a, ls1088a
> - other small fixes
> 
> Travis-CI:  https://travis-ci.org/prabhukush/u-boot/builds/575158792
> 
> 
> --pk (prabhakar: prabhu_kush)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH 2/2] efi_loader: device_path: support Sandbox's "host" devices

2019-08-22 Thread AKASHI Takahiro
On Thu, Aug 22, 2019 at 08:19:24PM +0200, Heinrich Schuchardt wrote:
> On 8/22/19 10:54 AM, AKASHI Takahiro wrote:
> >Sandbox's "host" devices are currently described as UCLASS_ROOT udevice
> >with DEV_IF_HOST block device. As the current implementation of
> >efi_device_path doesn't support such a type, any "host" device
> >on sandbox cannot be seen as a distinct object.
> >
> >For example,
> >   => host bind 0 /foo/disk.img
> >
> >   => efi devices
> >   Scanning disk host0...
> >   Found 1 disks
> >   Device   Device Path
> >    
> >   15c19970 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
> >   15c19d70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
> >
> >   => efi dh
> >   Handle   Protocols
> >    
> >   15c19970 Device Path, Device Path To Text, Device Path Utilities, 
> > Unicode Collation 2, HII String, HII Database, HII Config Routing
> >   15c19ba0 Driver Binding
> >   15c19c10 Simple Text Output
> >   15c19c80 Simple Text Input, Simple Text Input Ex
> >   15c19d70 Block IO, Device Path, Simple File System
> >
> >As you can see here, efi_root (0x15c19970) and host0 device
> >(0x15c19d70) has the same representation of device path.
> >
> >This is not only inconvenient, but also confusing since two different
> >efi objects are associated with the same device path and
> >efi_dp_find_obj() will possibly return a wrong result.
> >
> >Solution:
> >Each "host" device should be given an additional device path node
> >of Logical Unit Number(LUN) to make it distinguishable. The result
> >would be:
> >   Device   Device Path
> >    
> >   15c19970 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
> >   15c19d70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/LUN(0)
> >
> >Signed-off-by: AKASHI Takahiro 
> >---
> >  lib/efi_loader/efi_device_path.c | 22 ++
> >  1 file changed, 22 insertions(+)
> >
> >diff --git a/lib/efi_loader/efi_device_path.c 
> >b/lib/efi_loader/efi_device_path.c
> >index eeeb80683607..565bb6888fe1 100644
> >--- a/lib/efi_loader/efi_device_path.c
> >+++ b/lib/efi_loader/efi_device_path.c
> >@@ -12,6 +12,7 @@
> >  #include 
> >  #include 
> >  #include 
> >+#include 
> >  #include 
> >
> >  /* template END node: */
> >@@ -422,6 +423,10 @@ static unsigned dp_size(struct udevice *dev)
> >
> > switch (dev->driver->id) {
> > case UCLASS_ROOT:
> >+#ifdef CONFIG_SANDBOX
> >+/* stop traversing parents at this point: */
> >+return sizeof(ROOT) + sizeof(struct efi_device_path_lun);
> >+#endif
> > case UCLASS_SIMPLE_BUS:
> > /* stop traversing parents at this point: */
> > return sizeof(ROOT);
> >@@ -505,6 +510,23 @@ static void *dp_fill(void *buf, struct udevice *dev)
> >  #ifdef CONFIG_BLK
> > case UCLASS_BLK:
> > switch (dev->parent->uclass->uc_drv->id) {
> >+#ifdef CONFIG_SANDBOX
> >+case UCLASS_ROOT: {
> >+/* stop traversing parents at this point: */
> >+struct efi_device_path_vendor *vdp = buf;
> >+struct efi_device_path_lun *dp;
> >+struct host_block_dev *host_dev = dev_get_platdata(dev);
> >+struct blk_desc *desc = dev_get_uclass_platdata(dev);
> >+
> >+*vdp++ = ROOT;
> >+dp = (struct efi_device_path_lun *)vdp;
> >+dp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
> >+dp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_LUN;
> >+dp->dp.length = sizeof(*dp);
> >+dp->logical_unit_number = desc->devnum;
> >+return ++dp;
> >+}
> >+#endif
> >  #ifdef CONFIG_IDE
> > case UCLASS_IDE: {
> > struct efi_device_path_atapi *dp =
> >
> 
> Hello Takahiro,
> 
> thank you for pointing out that currently we generate the same device
> path twice. This for sure is something we need to fix.
> 
> In the table below you will find the device tree for
> 
> ./u-boot -d arch/sandbox/dts/test.dtb
> 
> In the device tree I see exactly one root node. I see no device called
> host0.

"Host0" or whatever other host device is a pseudo device which will
be dynamically created, like other hot-pluggable devices, by "host bind"
command on sandbox U-Boot. So it won't appear in device tree.

-Takahiro Akashi

> Could you, please, assign the device paths you want to generate to the
> device tree nodes below. Hopefully we than can come up with a UEFI
> compliant solution.
> 
> @Simon:
> Why do we have siblings in the device tree with the same name (e.g.
> demo_shape_drv)? I thought siblings should always have different names.
> 
> Best regards
> 
> Heinrich
> 
> 
>  Class Index  Probed  DriverName
> 

Re: [U-Boot] [PATCH 1/2] efi_loader: device_path: add Device Logical Unit sub type

2019-08-22 Thread AKASHI Takahiro
On Thu, Aug 22, 2019 at 08:44:49PM +0200, Heinrich Schuchardt wrote:
> On 8/22/19 10:54 AM, AKASHI Takahiro wrote:
> >This sub type may not be very useful for normal systems,
> >but it will be used to support "host" devices on U-Boot sandbox
> >build.
> >
> >See UEFI Specification 2.8, section 10.3.4.8.
> >
> >Signed-off-by: AKASHI Takahiro 
> >---
> >  include/efi_api.h| 6 ++
> >  lib/efi_loader/efi_device_path_to_text.c | 6 ++
> >  2 files changed, 12 insertions(+)
> >
> >diff --git a/include/efi_api.h b/include/efi_api.h
> >index d3fff3c57936..bb028546c864 100644
> >--- a/include/efi_api.h
> >+++ b/include/efi_api.h
> >@@ -427,6 +427,7 @@ struct efi_device_path_acpi_path {
> >  #  define DEVICE_PATH_SUB_TYPE_MSG_USB 0x05
> >  #  define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR0x0b
> >  #  define DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS   0x0f
> >+#  define DEVICE_PATH_SUB_TYPE_MSG_LUN  0x11
> >  #  define DEVICE_PATH_SUB_TYPE_MSG_SD  0x1a
> >  #  define DEVICE_PATH_SUB_TYPE_MSG_MMC 0x1d
> >
> >@@ -443,6 +444,11 @@ struct efi_device_path_scsi {
> > u16 logical_unit_number;
> >  } __packed;
> >
> >+struct efi_device_path_lun {
> >+struct efi_device_path dp;
> >+u8 logical_unit_number;
> >+} __packed;
> >+
> >  struct efi_device_path_usb {
> > struct efi_device_path dp;
> > u8 parent_port_number;
> >diff --git a/lib/efi_loader/efi_device_path_to_text.c 
> >b/lib/efi_loader/efi_device_path_to_text.c
> >index 96fd08971b73..8aae8215e1af 100644
> >--- a/lib/efi_loader/efi_device_path_to_text.c
> >+++ b/lib/efi_loader/efi_device_path_to_text.c
> >@@ -107,6 +107,12 @@ static char *dp_msging(char *s, struct efi_device_path 
> >*dp)
> >  ide->logical_unit_number);
> > break;
> > }
> >+case DEVICE_PATH_SUB_TYPE_MSG_LUN: {
> >+struct efi_device_path_lun *lun =
> >+(struct efi_device_path_lun *)dp;
> >+s += sprintf(s, "LUN(%u)", lun->logical_unit_number);
> 
> The UEFI spec 2 has this output example:
> Unit(LUN)
> 
> In EDK2:
> MdePkg/Library/UefiDevicePathLib/DevicePathToText.c:1019:
> UefiDevicePathLibCatPrint (Str, L"Unit(0x%x)", LogicalUnit->Lun);
> 
> Please, correct the output format to match EDK2 (and the spec).

Good catch, thank you. Will fix.

-Takahiro Akashi


> Best regards
> 
> Heinrich
> 
> >+break;
> >+}
> > case DEVICE_PATH_SUB_TYPE_MSG_USB: {
> > struct efi_device_path_usb *udp =
> > (struct efi_device_path_usb *)dp;
> >
> 
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Re: [U-Boot] [PATCH 2/3] bouncebuf: Add DMA validation check to addr_aligned().【请注意,邮件由u-boot-boun...@lists.denx.de代发】 addr_aligned().

2019-08-22 Thread Heiko Stuebner
Hi Simon,

just pulling up this thread again, as it would be great if we could
resolve how to proceed here.

The important points regarding your questions are below.


Am Samstag, 6. Juli 2019, 20:04:52 CEST schrieb Heiko Stuebner:
> Am Samstag, 6. Juli 2019, 19:16:29 CEST schrieb Simon Glass:
> > On Thu, 4 Jul 2019 at 14:43, Heiko Stübner  wrote:
> > > Am Dienstag, 4. Juni 2019, 05:23:14 CEST schrieb Kever Yang:
> > > > On 05/19/2019 12:08 AM, Simon Glass wrote:
> > > > > On Tue, 7 May 2019 at 03:05, Christoph Muellner
> > > > >  wrote:
> > > > >> Currently addr_aligned() performs an alignment and a length check
> > > > >> to validate the DMA address. However, some machines have stricter
> > > > >> restrictions of DMA-able addresses.
> > > > >>
> > > > >> This patch adds a call to mach_addr_is_dmaable() to honor this
> > > > >> machine specific restrictions.
> > > > >>
> > > > >> Signed-off-by: Christoph Muellner 
> > > > >> 
> > > > >> ---
> > > > >>
> > > > >>  common/bouncebuf.c | 6 ++
> > > > >>  1 file changed, 6 insertions(+)
> > > > > I feel like this should be handled with DM. Can we add a new method to
> > > > > the DMA uclass to check an address? If not provided by the DMA driver,
> > > > > we can assume the address is OK.
> > > >
> > > > The DMA in MMC controller which is not stand alone, do not using the
> > > > driver of DMA uclass, so I'm afraid this is not able to using DMA uclass
> > > > for this address check.
> > >
> > > were you able to consider Kever's response?
> > >
> > > The issue bites us for example when the mmc-driver with its internal dma
> > > does transfer atf loadables to the socs sram. There is no system dma
> > > controller involved but so far we're experiencing this on _all_ Rockchip
> > > socs that need multiple parts of the ATF be written to different memory
> > > locations. (the sram code is obviously needed for suspend/resume).
> > 
> > I don't really understand the thing about the internal MMC DMA controller.
>
> The dw_mmc IP block can either be connected to a system-level
> dma controller (like a pl330 on for example the rk3188)
> or have its own completely separate dma-controller _inside_ the
> dw-mmc ip-block itself (I think all newer Rockchip socs for example).
> 
> > Is it not possible to call a DMA driver to validate an address, or to
> > allocate an address? It isn't necessary to use the driver for a
> > transfer.
> 
> For the internal-dma case, there really is no separate dma-driver
> involved, all is contained in dw-mmc.
> 
> On rk3288 on the kernel-side we also "just" blocked off the offending
> memory area due to all other approaches being cumbersome,
> with multiple IP blocks all bringing their own dma-controllers
> circumventing the system-level ones.
> 
> > But if this is related to DMA, then it seems to me that the DMA uclass
> > should support the functionality, perhaps with a new method?
> 
> So something like
>   int dma_address_is_allowed(void *address);
> which then calls into a system-specific function (or valus from Kconfig)?
> Or do you have something different in mind?


Thanks
Heiko




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[U-Boot] [PATCH] net: make net_random_ethaddr() more random

2019-08-22 Thread Michael Walle
The net_random_ethaddr() tries to get some entropy from different
startup times of a board. The seed is initialized with get_timer() which
has only a granularity of milliseconds. We can do better if we use
get_ticks() which returns the raw timer ticks. Using this we have a
higher chance of getting different values at startup.

Signed-off-by: Michael Walle 
---
 include/net.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/net.h b/include/net.h
index a54d5eeac5..8215316bd3 100644
--- a/include/net.h
+++ b/include/net.h
@@ -816,7 +816,7 @@ static inline int is_valid_ethaddr(const u8 *addr)
 static inline void net_random_ethaddr(uchar *addr)
 {
int i;
-   unsigned int seed = get_timer(0);
+   unsigned int seed = get_ticks() & (unsigned int)-1;
 
for (i = 0; i < 6; i++)
addr[i] = rand_r();
-- 
2.20.1

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[U-Boot] [PATCH] ARM: am3517-evm: Disable CONFIG_USB_EHCI_OMAP in SPL

2019-08-22 Thread Adam Ford
Found accidentally in omap3_logic, CONFIG_USB_EHCI_OMAP adds some
code size to SPL, so this patch disables it on the am3517-evm to
reduce the code a bit since it's tight for space.

Signed-off-by: Adam Ford 

diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 63489133a8..3e5f0b1992 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -26,8 +26,11 @@
  * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
  * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
  */
-
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_USB_EHCI_OMAP
+#else
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO   57
+#endif
 
 /* I2C */
 
-- 
2.17.1

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[U-Boot] [PATCH 1/1] doc: slimbootloader: Update Linux booting steps on QEMU

2019-08-22 Thread Park, Aiden
Add steps to test Linux booting on QEMU with Yocto image.

Signed-off-by: Aiden Park 
---
 doc/board/intel/slimbootloader.rst | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/doc/board/intel/slimbootloader.rst 
b/doc/board/intel/slimbootloader.rst
index 07c9b126f7..375e676804 100644
--- a/doc/board/intel/slimbootloader.rst
+++ b/doc/board/intel/slimbootloader.rst
@@ -86,6 +86,28 @@ The PayloadId can be any 4 Bytes value.
 
$ qemu-system-x86_64 -machine q35 -nographic -serial mon:stdio -pflash 
Outputs/qemu/SlimBootloader.bin
 
+Test Linux booting on QEMU target
+-
+
+Let's use LeafHill (APL) Yocto image for testing.
+Download it from 
http://downloads.yoctoproject.org/releases/yocto/yocto-2.0/machines/leafhill/.
+
+1. Prepare Yocto hard disk image::
+
+   $ wget 
http://downloads.yoctoproject.org/releases/yocto/yocto-2.0/machines/leafhill/leafhill-4.0-jethro-2.0.tar.bz2
+   $ tar -xvf leafhill-4.0-jethro-2.0.tar.bz2
+   $ ls -l 
leafhill-4.0-jethro-2.0/binary/core-image-sato-intel-corei7-64.hddimg
+
+2. Launch Slim Bootloader on QEMU with disk image::
+
+   $ qemu-system-x86_64 -machine q35 -nographic -serial mon:stdio -pflash 
Outputs/qemu/SlimBootloader.bin -drive 
id=mydrive,if=none,file=/path/to/core-image-sato-intel-corei7-64.hddimg,format=raw
 -device ide-hd,drive=mydrive
+
+3. Update boot environment values on shell::
+
+   => setenv bootfile vmlinuz
+   => setenv bootdev scsi
+   => boot
+
 Build Instruction for Slim Bootloader for LeafHill (APL) target
 ---
 
-- 
2.20.1


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Re: [U-Boot] [PATCH v5 1/5] spl: dm: disable SPI DM flash for non-DM SPL

2019-08-22 Thread Lukasz Majewski
On Thu, 22 Aug 2019 01:56:48 +
Xiaowei Bao  wrote:

> > -Original Message-
> > From: Lukasz Majewski 
> > Sent: 2019年8月20日 17:50
> > To: Xiaowei Bao 
> > Cc: w...@denx.de; Ruchika Gupta ; Shengzhou Liu
> > ; ja...@amarulasolutions.com; Prabhakar
> > Kushwaha ; u-boot@lists.denx.de; Jiafei
> > Pan ; Chuanhua Han 
> > Subject: Re: [U-Boot] [PATCH v5 1/5] spl: dm: disable SPI DM flash
> > for non-DM SPL
> > 
> > On Tue, 20 Aug 2019 09:00:40 +
> > Xiaowei Bao  wrote:
> >   
> > > > -Original Message-
> > > > From: Lukasz Majewski 
> > > > Sent: 2019年8月20日 16:20
> > > > To: Xiaowei Bao 
> > > > Cc: w...@denx.de; Ruchika Gupta ;
> > > > Shengzhou  
> > Liu  
> > > > ; ja...@amarulasolutions.com; Prabhakar
> > > > Kushwaha ; u-boot@lists.denx.de;
> > > > Jiafei Pan ; Chuanhua Han
> > > >  Subject: Re: [U-Boot] [PATCH v5 1/5]
> > > > spl: dm: disable SPI DM flash for non-DM SPL
> > > >
> > > > On Tue, 20 Aug 2019 07:51:18 +
> > > > Xiaowei Bao  wrote:
> > > >  
> > > > > > -Original Message-
> > > > > > From: Lukasz Majewski 
> > > > > > Sent: 2019年8月20日 15:43
> > > > > > To: Xiaowei Bao 
> > > > > > Cc: w...@denx.de; Ruchika Gupta ;  
> > Shengzhou  
> > > > Liu  
> > > > > > ; ja...@amarulasolutions.com;
> > > > > > Prabhakar Kushwaha ;
> > > > > > u-boot@lists.denx.de; Jiafei Pan ; Pan
> > > > > > Jiafei ; Chuanhua Han  
> >   
> > > > > > Subject: Re: [U-Boot] [PATCH v5 1/5] spl: dm: disable SPI DM
> > > > > > flash for non-DM SPL
> > > > > >
> > > > > > On Tue, 20 Aug 2019 07:27:39 + Xiaowei Bao
> > > > > >  wrote:
> > > > > >  
> > > > > > > > -Original Message-
> > > > > > > > From: Lukasz Majewski 
> > > > > > > > Sent: 2019年8月20日 15:14
> > > > > > > > To: Xiaowei Bao 
> > > > > > > > Cc: w...@denx.de; Ruchika Gupta ;  
> > > > Shengzhou  
> > > > > > Liu  
> > > > > > > > ; ja...@amarulasolutions.com;
> > > > > > > > Prabhakar Kushwaha ;
> > > > > > > > u-boot@lists.denx.de; Jiafei Pan ;
> > > > > > > > Pan Jiafei ; Chuanhua Han  
> > > >   
> > > > > > > > Subject: Re: [U-Boot] [PATCH v5 1/5] spl: dm: disable
> > > > > > > > SPI DM flash for non-DM SPL
> > > > > > > >
> > > > > > > > Hi Xiaowei,
> > > > > > > >  
> > > > > > > > > From: Chuanhua Han 
> > > > > > > > >
> > > > > > > > > This patch solves the problem that spiboot cannot be
> > > > > > > > > performed in non-DM SPL.  
> > > > > > > >
> > > > > > > > I've posted recently a set of patches to move setting of
> > > > > > > > DM_SPI_FLASH to Kconfig:
> > > > > > > > https://patchwork.ozlabs.org/cover/1146494/
> > > > > > > >
> > > > > > > > Please rebase your work on top of it.  
> > > > > > > Did this set of patches merge to the u-boot mainline?  
> > > > > >
> > > > > > Those patches were not yet accepted to mainline.
> > > > > >  
> > > > > > > Do I need to
> > > > > > > depend on your patches?  
> > > > > >
> > > > > > It would be best to avoid duplicating the effort.
> > > > > >  
> > > > > > > If yes, please provide the full patches link, I can't see
> > > > > > > the contents of this set of patches.  
> > > > > >
> > > > > > When you open the link:
> > > > > > https://patchwork.ozlabs.org/cover/1146494/
> > > > > >
> > > > > > On top left you have:
> > > > > > "Related" -> "show"
> > > > > >
> > > > > > After clicking on it you will see the list of patches.
> > > > > >
> > > > > > You may also want to use "Series" on top right and download
> > > > > > the whole patch series.  
> > > > > I have check these set of patches, it don't impact my
> > > > > patches, my patches implemented the ESPI DM driver of
> > > > > POWERPC.  
> > > >
> > > > But you add:
> > > >
> > > > +#undef CONFIG_DM_SPI_FLASH
> > > >
> > > > for SPL, Which is problematic as explained in the patch set.  
> > > Can I modify the patches like this?
> > > diff --git a/include/config_uncmd_spl.h
> > > b/include/config_uncmd_spl.h index da94b3d..c2f9735 100644
> > > --- a/include/config_uncmd_spl.h
> > > +++ b/include/config_uncmd_spl.h
> > > @@ -15,7 +15,6 @@
> > >  #undef CONFIG_DM_GPIO
> > >  #undef CONFIG_DM_I2C
> > >  #undef CONFIG_DM_SPI
> > > -#undef CONFIG_DM_SPI_FLASH
> > >  #endif
> > >
> > >  #undef CONFIG_DM_WARN
> > > diff --git a/include/configs/T208xQDS.h
> > > b/include/configs/T208xQDS.h index 98bb334..b45ec4a 100644
> > > --- a/include/configs/T208xQDS.h
> > > +++ b/include/configs/T208xQDS.h
> > > @@ -10,6 +10,13 @@
> > >  #ifndef __T208xQDS_H
> > >  #define __T208xQDS_H
> > >
> > > +/* SPI Flash Configs */
> > > +#if defined(CONFIG_SPL_BUILD)
> > > +#undef CONFIG_DM_SPI
> > > +#undef CONFIG_DM_SPI_FLASH
> > > +#undef CONFIG_SPI_FLASH_MTD
> > > +#endif  
> > 
> > The whole point is to avoid adding the above code.
> > 
> > The rationale for this can be found in the commit message:
> > https://patchwork.ozlabs.org/patch/1146375/  
> Hi Lukasz, thanks for your comments, ask a question, I modify my
> driver like this: diff --git a/drivers/spi/fsl_espi.c
> b/drivers/spi/fsl_espi.c index fd5ac97..54be036 100644
> 

[U-Boot] SPL building unwanted code

2019-08-22 Thread Adam Ford
I have boards (omap3_logic and omap3_logic_somlv) which do not want
USB enabled for SPL yet SPL is showing USB chunks being compiled into
it.

I had to create a patch [1] which disables the USB host controller
when in SPL, yet some of the framework is still present. There appears
to be an option in the SPL menu for enabling/disabling "Support USB
host drivers" and an option for "Support USB Gadget drivers" and for
me, neither are selected.  What I'd like to do is kill off all the USB
code inside SPL to shrink the size.

When I look at the Makefile for the USB host, there doesn't appear to
be any checks for whether or not we're in SPL.

There also appears to be an inconsistency in where to place the
options for enabling something in SPL.  In some cases, high-level
options are listed in SPL/TPL menu, but in other instances, the
options are listed under the "Device Drivers" menu.  What I'd like to
do is add a menu option for CONFIG_SPL_USB which lets people turn off
all USB code when in SPL if they don't want any, then fix up the
Makefiles to use the SPL/TPL macros to determine if we need to build
or not.

My question is is...Where should the menu item for enabling
CONFIG_SPL_USB be used, in the SPL/TPL menu or the USB menu?

adam

[1] - https://patchwork.ozlabs.org/patch/1151811/
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[U-Boot] [PATCH] ARM: omap3_logic: Fix SPL boot failure when EHCI enabled

2019-08-22 Thread Adam Ford
Some of the USB code is still being built into SPL even when the
SPL menu options have it explicitly disabled for SPL. Unit there is
a better solution, This patch undefines CONFIG_USB_EHCI_OMAP when
building SPL which reduces the code and lets the board boot again.

Fixes: 25e4ff45b17d ("ARM: omap3_logic: Enable OMAP EHCI support
for SOM-LV Boards")

Signed-off-by: Adam Ford 

diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index b7c3ddf564..90292ae312 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -30,6 +30,9 @@
 /* I2C */
 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM AT24C64  */
 
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_USB_EHCI_OMAP
+#endif
 #ifdef CONFIG_USB_EHCI_OMAP
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO   4
 #endif
-- 
2.17.1

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Re: [U-Boot] [PATCH 4/5] moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 4

2019-08-22 Thread Chris Packham
On Thu, 2019-08-22 at 15:41 +0200, Hannes Schmelzer wrote:
> the x530 board needs conversion of SPL_SPI_LOAD to Kconfig first
> 
> Signed-off-by: Hannes Schmelzer 

Reviewed-by: Chris Packham 

> ---
> 
>  configs/x530_defconfig | 1 +
>  include/configs/x530.h | 1 -
>  2 files changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/configs/x530_defconfig b/configs/x530_defconfig
> index 7db8de4..2bf20f4 100644
> --- a/configs/x530_defconfig
> +++ b/configs/x530_defconfig
> @@ -21,6 +21,7 @@ CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y
>  CONFIG_MISC_INIT_R=y
>  CONFIG_SPL_TEXT_BASE=0x4030
>  CONFIG_SPL_BOARD_INIT=y
> +CONFIG_SPL_SPI_LOAD=y
>  CONFIG_SPL_WATCHDOG_SUPPORT=y
>  CONFIG_CMD_MEMINFO=y
>  # CONFIG_CMD_FLASH is not set
> diff --git a/include/configs/x530.h b/include/configs/x530.h
> index 80ae15b..0946121 100644
> --- a/include/configs/x530.h
> +++ b/include/configs/x530.h
> @@ -120,7 +120,6 @@
>  #define CONFIG_SPL_BOOTROM_SAVE  (CONFIG_SPL_STACK + 4)
>  
>  /* SPL related SPI defines */
> -#define CONFIG_SPL_SPI_LOAD
>  #define CONFIG_SYS_SPI_U_BOOT_OFFS   0x24000
>  #define CONFIG_SYS_U_BOOT_OFFS   CONFIG_SYS_SPI_U_BOOT_O
> FFS
>  
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[U-Boot] [PATCH v2 1/2] arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)

2019-08-22 Thread Sunil Mohan Adapa
A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.

The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.

https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/dt-for-5.4=02bb66b347ff8115f53948f86b884e008ba385b9

This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
device-tree.

Signed-off-by: Sunil Mohan Adapa 
---
 arch/arm/dts/Makefile  |  1 +
 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts | 23 ++
 2 files changed, 24 insertions(+)
 create mode 100644 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 05ff624c07..d28906a63b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -530,6 +530,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-nanopi-a64.dtb \
sun50i-a64-oceanic-5205-5inmfd.dtb \
sun50i-a64-olinuxino.dtb \
+   sun50i-a64-olinuxino-emmc.dtb \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-lts.dtb \
sun50i-a64-pine64-plus.dtb \
diff --git a/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts 
b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
new file mode 100644
index 00..96ab0227e8
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Martin Ayotte 
+ * Copyright (C) 2019 Sunil Mohan Adapa 
+ */
+
+#include "sun50i-a64-olinuxino.dts"
+
+/ {
+   model = "Olimex A64-Olinuxino-eMMC";
+   compatible = "olimex,a64-olinuxino-emmc", "allwinner,sun50i-a64";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   vmmc-supply = <_dcdc1>;
+   vqmmc-supply = <_dcdc1>;
+   bus-width = <8>;
+   non-removable;
+   cap-mmc-hw-reset;
+   status = "okay";
+};
-- 
2.20.1

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[U-Boot] [PATCH v2 2/2] configs: sun50i: Add support for Olimex A64-Olinuxino-eMMC

2019-08-22 Thread Sunil Mohan Adapa
A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.

The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.

https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/dt-for-5.4=02bb66b347ff8115f53948f86b884e008ba385b9

Based on a64-olinuxino_defconfig.

This patch has been tested on A64-OLinuXino-1Ge16GW.

Signed-off-by: Sunil Mohan Adapa 
---
 board/sunxi/MAINTAINERS  |  5 +
 configs/a64-olinuxino-emmc_defconfig | 17 +
 2 files changed, 22 insertions(+)
 create mode 100644 configs/a64-olinuxino-emmc_defconfig

diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index c7e9d3eda0..442ff3d9cd 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -106,6 +106,11 @@ M: Jagan Teki 
 S: Maintained
 F: configs/a64-olinuxino_defconfig
 
+A64-OLINUXINO-EMMC BOARD
+M: Sunil Mohan Adapa 
+S: Maintained
+F: configs/a64-olinuxino-emmc_defconfig
+
 A80 OPTIMUS BOARD
 M: Chen-Yu Tsai 
 S: Maintained
diff --git a/configs/a64-olinuxino-emmc_defconfig 
b/configs/a64-olinuxino-emmc_defconfig
new file mode 100644
index 00..56153e38a7
--- /dev/null
+++ b/configs/a64-olinuxino-emmc_defconfig
@@ -0,0 +1,17 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_USE_PREBOOT=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc"
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
-- 
2.20.1

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[U-Boot] [PATCH v2 0/2] arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)

2019-08-22 Thread Sunil Mohan Adapa
This is a follow up a patch that didn't create a separate dts:
https://lists.denx.de/pipermail/u-boot/2019-July/379109.html

A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.

The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.

https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/dt-for-5.4=02bb66b347ff8115f53948f86b884e008ba385b9

This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
device-tree.

Changes:

v2: Separate device tree for emmc models.

Sunil Mohan Adapa (2):
  arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)
  configs: sun50i: Add support for Olimex A64-Olinuxino-eMMC

 arch/arm/dts/Makefile  |  1 +
 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts | 23 ++
 board/sunxi/MAINTAINERS|  5 +
 configs/a64-olinuxino-emmc_defconfig   | 17 
 4 files changed, 46 insertions(+)
 create mode 100644 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
 create mode 100644 configs/a64-olinuxino-emmc_defconfig

-- 
2.20.1

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[U-Boot] [PATCH 0/5] convert CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig

2019-08-22 Thread Hannes Schmelzer
The intention of this series is to bring the CONFIG_SYS_SPI_U_BOOT_OFFS
option to Kconfig. For getting sure not introducing bugs and don't
forget boards the requirement is a clean run of moveconfig.py without
warnings.

To achieve this we need to prepare a few things:
- manually edit header files which have formula within the #define
- manually edit header files which are referencing to another #define
- manually edit common header files which are defining the option even
it is not needed on affected build-targets.

A few boards are failing in moveconfig.py because the needed tool-chain
isn't found. Not a big issue since they aren't affected from the
desired change.



Hannes Schmelzer (5):
  moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step
1
  moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step
2
  moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step
3
  moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step
4
  Convert CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig

 common/spl/Kconfig  | 8 
 configs/alt_defconfig   | 1 +
 configs/am57xx_evm_defconfig| 1 +
 configs/am57xx_hs_evm_defconfig | 1 +
 configs/am57xx_hs_evm_usb_defconfig | 1 +
 configs/brppt1_spi_defconfig| 1 +
 configs/brsmarc1_defconfig  | 1 +
 configs/cgtqmx6eval_defconfig   | 1 +
 configs/chromebit_mickey_defconfig  | 1 +
 configs/chromebook_bob_defconfig| 1 +
 configs/chromebook_jerry_defconfig  | 1 +
 configs/chromebook_minnie_defconfig | 1 +
 configs/chromebook_speedy_defconfig | 1 +
 configs/cm_fx6_defconfig| 1 +
 configs/cm_t43_defconfig| 1 +
 configs/controlcenterdc_defconfig   | 1 +
 configs/da850evm_defconfig  | 1 +
 configs/da850evm_nand_defconfig | 1 +
 configs/db-88f6720_defconfig| 1 +
 configs/db-88f6820-amc_defconfig| 1 +
 configs/db-88f6820-gp_defconfig | 1 +
 configs/db-mv784mp-gp_defconfig | 1 +
 configs/dh_imx6_defconfig   | 1 +
 configs/display5_defconfig  | 1 +
 configs/display5_factory_defconfig  | 1 +
 configs/dra7xx_evm_defconfig| 1 +
 configs/dra7xx_hs_evm_defconfig | 1 +
 configs/dra7xx_hs_evm_usb_defconfig | 1 +
 configs/draco_defconfig | 1 +
 configs/ds414_defconfig | 1 +
 configs/etamin_defconfig| 1 +
 configs/gose_defconfig  | 1 +
 configs/j721e_evm_a72_defconfig | 1 +
 configs/j721e_evm_r5_defconfig  | 1 +
 configs/k2e_evm_defconfig   | 1 +
 configs/k2g_evm_defconfig   | 1 +
 configs/k2hk_evm_defconfig  | 1 +
 configs/k2l_evm_defconfig   | 1 +
 configs/koelsch_defconfig   | 1 +
 configs/lager_defconfig | 1 +
 configs/maxbcm_defconfig| 1 +
 configs/ot1200_spl_defconfig| 1 +
 configs/pcm058_defconfig| 1 +
 configs/pfla02_defconfig| 1 +
 configs/porter_defconfig| 1 +
 configs/puma-rk3399_defconfig   | 1 +
 configs/pxm2_defconfig  | 1 +
 configs/rastaban_defconfig  | 1 +
 configs/rut_defconfig   | 1 +
 configs/sama5d2_xplained_spiflash_defconfig | 1 +
 configs/sama5d3xek_spiflash_defconfig   | 1 +
 configs/sama5d4_xplained_spiflash_defconfig | 1 +
 configs/sama5d4ek_spiflash_defconfig| 1 +
 configs/silk_defconfig  | 1 +
 configs/socfpga_arria5_defconfig| 1 +
 configs/socfpga_cyclone5_defconfig  | 1 +
 configs/socfpga_dbm_soc1_defconfig  | 1 +
 configs/socfpga_de0_nano_soc_defconfig  | 1 +
 configs/socfpga_de10_nano_defconfig | 1 +
 configs/socfpga_is1_defconfig   | 1 +
 configs/socfpga_mcvevk_defconfig| 1 +
 configs/socfpga_sockit_defconfig| 1 +
 configs/socfpga_socrates_defconfig  | 1 +
 configs/socfpga_sr1500_defconfig| 1 +
 configs/socfpga_stratix10_defconfig | 1 +
 configs/socfpga_vining_fpga_defconfig   | 1 +
 configs/stout_defconfig | 1 +
 configs/theadorable_debug_defconfig | 1 +
 configs/thuban_defconfig| 1 +
 configs/topic_miami_defconfig   | 1 +
 configs/topic_miamilite_defconfig   | 1 +
 configs/topic_miamiplus_defconfig   | 1 +
 configs/turris_omnia_defconfig  | 1 +
 configs/x530_defconfig  | 2 ++
 configs/zc5202_defconfig| 1 +
 configs/zc5601_defconfig| 1 +
 configs/zynq_cc108_defconfig| 1 +
 

[U-Boot] [PATCH 1/1] cmd: gpio: remove redundant assignment

2019-08-22 Thread Heinrich Schuchardt
The assigned value NULL is overwritten before being used. Remove the
assignment.

Signed-off-by: Heinrich Schuchardt 
---
 cmd/gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cmd/gpio.c b/cmd/gpio.c
index 53366f36e7..eff36ab2af 100644
--- a/cmd/gpio.c
+++ b/cmd/gpio.c
@@ -91,7 +91,7 @@ static int do_gpio_status(bool all, const char *gpio_name)

if (!gpio_name || !bank_name ||
!strncasecmp(gpio_name, bank_name, banklen)) {
-   const char *p = NULL;
+   const char *p;
int offset;

p = gpio_name + banklen;
--
2.20.1

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[U-Boot] [PATCH 1/1] siemens: avoid out of bound access

2019-08-22 Thread Heinrich Schuchardt
char num[1];
sprintf(num, "%d", i);

leads to a buffer overrun.

Simplify the overly complex coding.

Signed-off-by: Heinrich Schuchardt 
---
 board/siemens/common/board.c | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index 676935a843..75462d1c34 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -189,14 +189,11 @@ void set_env_gpios(unsigned char state)
 {
char *ptr_env;
char str_tmp[5];/* must contain "ledX"*/
-   char num[1];
unsigned char i, idx, pos1, pos2, ccount;
unsigned char gpio_n, gpio_s0, gpio_s1;

for (i = 0; i < MAX_NR_LEDS; i++) {
-   strcpy(str_tmp, "led");
-   sprintf(num, "%d", i);
-   strcat(str_tmp, num);
+   sprintf(str_tmp, "led%d", i);

/* If env var is not found we stop */
ptr_env = env_get(str_tmp);
--
2.20.1

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Re: [U-Boot] [PATCH 1/2] efi_loader: device_path: add Device Logical Unit sub type

2019-08-22 Thread Heinrich Schuchardt

On 8/22/19 10:54 AM, AKASHI Takahiro wrote:

This sub type may not be very useful for normal systems,
but it will be used to support "host" devices on U-Boot sandbox
build.

See UEFI Specification 2.8, section 10.3.4.8.

Signed-off-by: AKASHI Takahiro 
---
  include/efi_api.h| 6 ++
  lib/efi_loader/efi_device_path_to_text.c | 6 ++
  2 files changed, 12 insertions(+)

diff --git a/include/efi_api.h b/include/efi_api.h
index d3fff3c57936..bb028546c864 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -427,6 +427,7 @@ struct efi_device_path_acpi_path {
  #  define DEVICE_PATH_SUB_TYPE_MSG_USB0x05
  #  define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR   0x0b
  #  define DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS  0x0f
+#  define DEVICE_PATH_SUB_TYPE_MSG_LUN 0x11
  #  define DEVICE_PATH_SUB_TYPE_MSG_SD 0x1a
  #  define DEVICE_PATH_SUB_TYPE_MSG_MMC0x1d

@@ -443,6 +444,11 @@ struct efi_device_path_scsi {
u16 logical_unit_number;
  } __packed;

+struct efi_device_path_lun {
+   struct efi_device_path dp;
+   u8 logical_unit_number;
+} __packed;
+
  struct efi_device_path_usb {
struct efi_device_path dp;
u8 parent_port_number;
diff --git a/lib/efi_loader/efi_device_path_to_text.c 
b/lib/efi_loader/efi_device_path_to_text.c
index 96fd08971b73..8aae8215e1af 100644
--- a/lib/efi_loader/efi_device_path_to_text.c
+++ b/lib/efi_loader/efi_device_path_to_text.c
@@ -107,6 +107,12 @@ static char *dp_msging(char *s, struct efi_device_path *dp)
 ide->logical_unit_number);
break;
}
+   case DEVICE_PATH_SUB_TYPE_MSG_LUN: {
+   struct efi_device_path_lun *lun =
+   (struct efi_device_path_lun *)dp;
+   s += sprintf(s, "LUN(%u)", lun->logical_unit_number);


The UEFI spec 2 has this output example:
Unit(LUN)

In EDK2:
MdePkg/Library/UefiDevicePathLib/DevicePathToText.c:1019:
UefiDevicePathLibCatPrint (Str, L"Unit(0x%x)", LogicalUnit->Lun);

Please, correct the output format to match EDK2 (and the spec).

Best regards

Heinrich


+   break;
+   }
case DEVICE_PATH_SUB_TYPE_MSG_USB: {
struct efi_device_path_usb *udp =
(struct efi_device_path_usb *)dp;



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Re: [U-Boot] [PATCH 2/2] efi_loader: device_path: support Sandbox's "host" devices

2019-08-22 Thread Heinrich Schuchardt

On 8/22/19 10:54 AM, AKASHI Takahiro wrote:

Sandbox's "host" devices are currently described as UCLASS_ROOT udevice
with DEV_IF_HOST block device. As the current implementation of
efi_device_path doesn't support such a type, any "host" device
on sandbox cannot be seen as a distinct object.

For example,
   => host bind 0 /foo/disk.img

   => efi devices
   Scanning disk host0...
   Found 1 disks
   Device   Device Path
    
   15c19970 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
   15c19d70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)

   => efi dh
   Handle   Protocols
    
   15c19970 Device Path, Device Path To Text, Device Path Utilities, 
Unicode Collation 2, HII String, HII Database, HII Config Routing
   15c19ba0 Driver Binding
   15c19c10 Simple Text Output
   15c19c80 Simple Text Input, Simple Text Input Ex
   15c19d70 Block IO, Device Path, Simple File System

As you can see here, efi_root (0x15c19970) and host0 device
(0x15c19d70) has the same representation of device path.

This is not only inconvenient, but also confusing since two different
efi objects are associated with the same device path and
efi_dp_find_obj() will possibly return a wrong result.

Solution:
Each "host" device should be given an additional device path node
of Logical Unit Number(LUN) to make it distinguishable. The result
would be:
   Device   Device Path
    
   15c19970 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
   15c19d70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/LUN(0)

Signed-off-by: AKASHI Takahiro 
---
  lib/efi_loader/efi_device_path.c | 22 ++
  1 file changed, 22 insertions(+)

diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index eeeb80683607..565bb6888fe1 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -12,6 +12,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 

  /* template END node: */
@@ -422,6 +423,10 @@ static unsigned dp_size(struct udevice *dev)

switch (dev->driver->id) {
case UCLASS_ROOT:
+#ifdef CONFIG_SANDBOX
+   /* stop traversing parents at this point: */
+   return sizeof(ROOT) + sizeof(struct efi_device_path_lun);
+#endif
case UCLASS_SIMPLE_BUS:
/* stop traversing parents at this point: */
return sizeof(ROOT);
@@ -505,6 +510,23 @@ static void *dp_fill(void *buf, struct udevice *dev)
  #ifdef CONFIG_BLK
case UCLASS_BLK:
switch (dev->parent->uclass->uc_drv->id) {
+#ifdef CONFIG_SANDBOX
+   case UCLASS_ROOT: {
+   /* stop traversing parents at this point: */
+   struct efi_device_path_vendor *vdp = buf;
+   struct efi_device_path_lun *dp;
+   struct host_block_dev *host_dev = dev_get_platdata(dev);
+   struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+   *vdp++ = ROOT;
+   dp = (struct efi_device_path_lun *)vdp;
+   dp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+   dp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_LUN;
+   dp->dp.length = sizeof(*dp);
+   dp->logical_unit_number = desc->devnum;
+   return ++dp;
+   }
+#endif
  #ifdef CONFIG_IDE
case UCLASS_IDE: {
struct efi_device_path_atapi *dp =



Hello Takahiro,

thank you for pointing out that currently we generate the same device
path twice. This for sure is something we need to fix.

In the table below you will find the device tree for

./u-boot -d arch/sandbox/dts/test.dtb

In the device tree I see exactly one root node. I see no device called
host0.

Could you, please, assign the device paths you want to generate to the
device tree nodes below. Hopefully we than can come up with a UEFI
compliant solution.

@Simon:
Why do we have siblings in the device tree with the same name (e.g.
demo_shape_drv)? I thought siblings should always have different names.

Best regards

Heinrich


 Class Index  Probed  DriverName
---
 root 0  [ + ]   root_driver   root_driver
 demo 0  [   ]   demo_shape_drv|-- demo_shape_drv
 demo 1  [   ]   demo_simple_drv   |-- demo_simple_drv
 demo 2  [   ]   demo_shape_drv|-- demo_shape_drv
 demo 3  [   ]   demo_simple_drv   |-- demo_simple_drv
 demo 4  [   ]   demo_shape_drv|-- demo_shape_drv
 test 0  [   ]   test_drv  |-- test_drv
 test 1  [   ]   test_drv  |-- test_drv
 test  

[U-Boot] [PATCH v3 1/1] nvme: Fix PRP Offset Invalid

2019-08-22 Thread Aaron Williams
When large writes take place I saw a Samsung EVO 970+ return a status
value of 0x13, PRP Offset Invalid.  I tracked this down to the
improper handling of PRP entries.  The blocks the PRP entries are
placed in cannot cross a page boundary and thus should be allocated
on page boundaries.  This is how the Linux kernel driver works.

With this patch, the PRP pool is allocated on a page boundary and
other than the very first allocation, the pool size is a multiple of
the page size.  Each page can hold (4096 / 8) - 1 entries since the
last entry must point to the next page in the pool.

Signed-off-by: Aaron Williams 
Reviewed-by: Bin Meng 
---
 drivers/nvme/nvme.c | 28 ++--
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index d4965e2ef6..bc4cf40b40 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -73,6 +73,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
u64 *prp_pool;
int length = total_len;
int i, nprps;
+   u32 prps_per_page = (page_size >> 3) - 1;
+   u32 num_pages;
+
length -= (page_size - offset);
 
if (length <= 0) {
@@ -89,15 +92,19 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
}
 
nprps = DIV_ROUND_UP(length, page_size);
+   num_pages = DIV_ROUND_UP(nprps, prps_per_page);
 
if (nprps > dev->prp_entry_num) {
free(dev->prp_pool);
-   dev->prp_pool = malloc(nprps << 3);
+   /* Always increase in increments of pages.  It doesn't waste
+* much memory and reduces the number of allocations.
+*/
+   dev->prp_pool = memalign(page_size, num_pages * page_size);
if (!dev->prp_pool) {
printf("Error: malloc prp_pool fail\n");
return -ENOMEM;
}
-   dev->prp_entry_num = nprps;
+   dev->prp_entry_num = prps_per_page * num_pages;
}
 
prp_pool = dev->prp_pool;
@@ -788,14 +795,6 @@ static int nvme_probe(struct udevice *udev)
}
memset(ndev->queues, 0, NVME_Q_NUM * sizeof(struct nvme_queue *));
 
-   ndev->prp_pool = malloc(MAX_PRP_POOL);
-   if (!ndev->prp_pool) {
-   ret = -ENOMEM;
-   printf("Error: %s: Out of memory!\n", udev->name);
-   goto free_nvme;
-   }
-   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
-
ndev->cap = nvme_readq(>bar->cap);
ndev->q_depth = min_t(int, NVME_CAP_MQES(ndev->cap) + 1, NVME_Q_DEPTH);
ndev->db_stride = 1 << NVME_CAP_STRIDE(ndev->cap);
@@ -805,6 +804,15 @@ static int nvme_probe(struct udevice *udev)
if (ret)
goto free_queue;
 
+   /* Allocate after the page size is known */
+   ndev->prp_pool = memalign(ndev->page_size, MAX_PRP_POOL);
+   if (!ndev->prp_pool) {
+   ret = -ENOMEM;
+   printf("Error: %s: Out of memory!\n", udev->name);
+   goto free_nvme;
+   }
+   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
+
ret = nvme_setup_io_queues(ndev);
if (ret)
goto free_queue;
-- 
2.16.4

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[U-Boot] [PATCH v3 1/1] nvme: Fix PRP Offset Invalid

2019-08-22 Thread Aaron Williams
When large writes take place I saw a Samsung EVO 970+ return a status
value of 0x13, PRP Offset Invalid.  I tracked this down to the
improper handling of PRP entries.  The blocks the PRP entries are
placed in cannot cross a page boundary and thus should be allocated
on page boundaries.  This is how the Linux kernel driver works.

With this patch, the PRP pool is allocated on a page boundary and
other than the very first allocation, the pool size is a multiple of
the page size.  Each page can hold (4096 / 8) - 1 entries since the
last entry must point to the next page in the pool.

Signed-off-by: Aaron Williams 
Reviewed-by: Bin Meng 
---
 drivers/nvme/nvme.c | 28 ++--
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index d4965e2ef6..bc4cf40b40 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -73,6 +73,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
u64 *prp_pool;
int length = total_len;
int i, nprps;
+   u32 prps_per_page = (page_size >> 3) - 1;
+   u32 num_pages;
+
length -= (page_size - offset);

if (length <= 0) {
@@ -89,15 +92,19 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
}

nprps = DIV_ROUND_UP(length, page_size);
+   num_pages = DIV_ROUND_UP(nprps, prps_per_page);

if (nprps > dev->prp_entry_num) {
free(dev->prp_pool);
-   dev->prp_pool = malloc(nprps << 3);
+   /* Always increase in increments of pages.  It doesn't waste
+* much memory and reduces the number of allocations.
+*/
+   dev->prp_pool = memalign(page_size, num_pages * page_size);
if (!dev->prp_pool) {
printf("Error: malloc prp_pool fail\n");
return -ENOMEM;
}
-   dev->prp_entry_num = nprps;
+   dev->prp_entry_num = prps_per_page * num_pages;
}

prp_pool = dev->prp_pool;
@@ -788,14 +795,6 @@ static int nvme_probe(struct udevice *udev)
}
memset(ndev->queues, 0, NVME_Q_NUM * sizeof(struct nvme_queue *));

-   ndev->prp_pool = malloc(MAX_PRP_POOL);
-   if (!ndev->prp_pool) {
-   ret = -ENOMEM;
-   printf("Error: %s: Out of memory!\n", udev->name);
-   goto free_nvme;
-   }
-   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
-
ndev->cap = nvme_readq(>bar->cap);
ndev->q_depth = min_t(int, NVME_CAP_MQES(ndev->cap) + 1, NVME_Q_DEPTH);
ndev->db_stride = 1 << NVME_CAP_STRIDE(ndev->cap);
@@ -805,6 +804,15 @@ static int nvme_probe(struct udevice *udev)
if (ret)
goto free_queue;

+   /* Allocate after the page size is known */
+   ndev->prp_pool = memalign(ndev->page_size, MAX_PRP_POOL);
+   if (!ndev->prp_pool) {
+   ret = -ENOMEM;
+   printf("Error: %s: Out of memory!\n", udev->name);
+   goto free_nvme;
+   }
+   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
+
ret = nvme_setup_io_queues(ndev);
if (ret)
goto free_queue;
--
2.16.4

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[U-Boot] [PATCH v3 0/1] nvme: Fix invalid PRP Offset

2019-08-22 Thread Aaron Williams
Hopefully this addresses all of the issues.

I ran into problems with the Samsung EVO 970+ NVME drive where I was
getting a status code of 0x2013 which is Invalid PRP Offset.  The
PRP data structure cannot span page boundaries and it should be a
multiple of the page size, where the last entry points to the next
page.  This patch fixes this and duplicates the way this works in
the Linux kernel.

Personally I would like to move away from using PRP since I think
it may be possible to just use a simple scatter-gather entry instead.

If I do that it will be in a later patch.

Aaron Williams (1):
  nvme: Fix PRP Offset Invalid

 drivers/nvme/nvme.c | 28 ++--
 1 file changed, 18 insertions(+), 10 deletions(-)

--
2.16.4

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Re: [U-Boot] efi_loader: LoadOptions (bootargs)

2019-08-22 Thread Heinrich Schuchardt

On 8/22/19 11:03 AM, AKASHI Takahiro wrote:

Heinrich,

I'm now wondering whether LoadedImage's LoadOptions, which comes
from "bootargs" variable, should contain a command(application) name
as a first argument or not.

When I tried some efi application (efitools), I found that it expected
so. For example, efitools' UpdateVars.efi takes
 Usage: UpdateVars.efi: [-g guid] [-a] [-e] [-b] var file

and I had to passed arguments by specifying "foo db DB.auth" for
"bootargs" where foo makes no sense.

What do you think about this issue?


Do you relate to
https://git.kernel.org/pub/scm/linux/kernel/git/jejb/efitools.git?

This style of parsing LoadOptions is defined by the EFI shell. See
function ParseCommandLineToArgs() in
ShellPkg/Application/Shell/ShellParametersProtocol.c.

If UpdateVars.efi would work differently it could not be launched via
the shell.

Best regards

Heinrich
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[U-Boot] [PATCH V2 05/10] usb: r8a66597: Replace R8A66597_BASE0

2019-08-22 Thread Marek Vasut
Replace R8A66597_BASE0 with proper SYSCFG0 accesses, no functional
change.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: No change
---
 drivers/usb/host/r8a66597-hcd.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 2b9f8a150a..28d0c0fcde 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -76,10 +76,10 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
 * and USB1, so we must always set the USB0 register
 */
 #if (CONFIG_R8A66597_XTAL == 1)
-   setbits(le16, R8A66597_BASE0, XTAL);
+   r8a66597_bset(r8a66597, XTAL, SYSCFG0);
 #endif
mdelay(1);
-   setbits(le16, R8A66597_BASE0, UPLLE);
+   r8a66597_bset(r8a66597, UPLLE, SYSCFG0);
mdelay(1);
r8a66597_bset(r8a66597, SUSPM, SUSPMODE0);
 
@@ -90,7 +90,7 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
 {
r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0);
 
-   clrbits(le16, R8A66597_BASE0, UPLLE);
+   r8a66597_bclr(r8a66597, UPLLE, SYSCFG0);
mdelay(1);
r8a66597_bclr(r8a66597, USBE, SYSCFG0);
mdelay(1);
-- 
2.23.0.rc1

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[U-Boot] [PATCH V2 10/10] ARM: renesas: Enable R8A66597 USB host on GR Peach

2019-08-22 Thread Marek Vasut
Enable USB host support on GR Peach board.

To use USB host on GR Peach, it might be necessary to solder JP3 header
onto the board first and then short it. Shorting JP3 is mandatory to let
the U5 regulator to supply VBUS to the CN3 USB port.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: No change
---
 arch/arm/dts/r7s72100-gr-peach-u-boot.dts | 14 ++
 configs/grpeach_defconfig |  9 -
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts 
b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts
index 28247d19d7..30e35e47d6 100644
--- a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts
+++ b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts
@@ -37,6 +37,15 @@
};
};
 
+   reg_usbhs0_vbus: regulator-usbhs0-vbus {
+   compatible = "regulator-fixed";
+   regulator-name = "usbhs0_vbus";
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   gpio = < 1 GPIO_ACTIVE_LOW>;
+   };
+
+
rpc: rpc@0xee20 {
compatible = "renesas,rpc-r7s72100", "renesas,rpc";
reg = <0x3fefa000 0x100>, <0x1800 0x0800>;
@@ -76,3 +85,8 @@
 _pins {
u-boot,dm-pre-reloc;
 };
+
+ {
+   vbus-supply = <_usbhs0_vbus>;
+   status = "okay";
+};
diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig
index 32254b3b0e..adabfbc085 100644
--- a/configs/grpeach_defconfig
+++ b/configs/grpeach_defconfig
@@ -10,6 +10,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
@@ -30,7 +31,7 @@ CONFIG_ENV_SPI_MAX_HZ=5000
 CONFIG_USE_ENV_SPI_MODE=y
 CONFIG_ENV_SPI_MODE=0x0
 CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_BLK=y
 CONFIG_DM_GPIO=y
 CONFIG_RZA1_GPIO=y
 CONFIG_LED=y
@@ -43,11 +44,17 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_DM_ETH=y
 CONFIG_SH_ETHER=y
 CONFIG_PINCTRL=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_RENESAS_RPC_SPI=y
 CONFIG_TIMER=y
 CONFIG_RENESAS_OSTM_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_R8A66597_HCD=y
+CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
-- 
2.23.0.rc1

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[U-Boot] [PATCH V2 08/10] usb: r8a66597: Checkpatch cleanup

2019-08-22 Thread Marek Vasut
Fix remaining checkpatch complaints in the driver.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: Update on top of change in "usb: r8a66597: Convert to USB DM"
---
 drivers/usb/host/r8a66597-hcd.c |  63 ++---
 drivers/usb/host/r8a66597.h | 473 
 2 files changed, 268 insertions(+), 268 deletions(-)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index b5a93e29f3..8b60ab2c6d 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -58,7 +58,7 @@ static void get_hub_data(struct usb_device *dev, u16 
*hub_devnum, u16 *hubport)
 
/* check a device connected to root_hub */
if ((parent && parent->devnum == 1) ||
-   (dev->devnum == 1))
+   dev->devnum == 1)
return;
 
*hub_devnum = (u8)parent->devnum;
@@ -66,7 +66,7 @@ static void get_hub_data(struct usb_device *dev, u16 
*hub_devnum, u16 *hubport)
 }
 
 static void set_devadd(struct r8a66597 *r8a66597, u8 r8a66597_address,
-   struct usb_device *dev, int port)
+  struct usb_device *dev, int port)
 {
u16 val, usbspd, upphub, hubport;
unsigned long devadd_reg = get_devadd_addr(r8a66597_address);
@@ -321,7 +321,7 @@ static int send_bulk_packet(struct r8a66597 *r8a66597, 
struct usb_device *dev,
R8A66597_DPRINT("%s\n", __func__);
 
r8a66597_mdfy(r8a66597, MBW | BULK_OUT_PIPENUM,
-   MBW | CURPIPE, CFIFOSEL);
+ MBW | CURPIPE, CFIFOSEL);
r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, BULK_OUT_PIPENUM);
tmp = r8a66597_read(r8a66597, CFIFOCTR);
if ((tmp & FRDY) == 0) {
@@ -345,7 +345,7 @@ static int send_bulk_packet(struct r8a66597 *r8a66597, 
struct usb_device *dev,
dev->act_len += size;
 
r8a66597_mdfy(r8a66597, PID_BUF, PID,
-   get_pipectr_addr(BULK_OUT_PIPENUM));
+ get_pipectr_addr(BULK_OUT_PIPENUM));
 
while (!(r8a66597_read(r8a66597, BEMPSTS) & (1 << BULK_OUT_PIPENUM)))
if (ctrlc())
@@ -354,7 +354,7 @@ static int send_bulk_packet(struct r8a66597 *r8a66597, 
struct usb_device *dev,
 
if (dev->act_len >= transfer_len)
r8a66597_mdfy(r8a66597, PID_NAK, PID,
-   get_pipectr_addr(BULK_OUT_PIPENUM));
+ get_pipectr_addr(BULK_OUT_PIPENUM));
 
return 0;
 }
@@ -375,17 +375,17 @@ static int receive_bulk_packet(struct r8a66597 *r8a66597,
/* prepare */
if (dev->act_len == 0) {
r8a66597_mdfy(r8a66597, PID_NAK, PID,
-   get_pipectr_addr(pipenum));
+ get_pipectr_addr(pipenum));
r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
 
r8a66597_write(r8a66597, TRCLR, get_pipetre_addr(pipenum));
r8a66597_write(r8a66597,
-   (transfer_len + maxpacket - 1) / maxpacket,
+  (transfer_len + maxpacket - 1) / maxpacket,
get_pipetrn_addr(pipenum));
r8a66597_bset(r8a66597, TRENB, get_pipetre_addr(pipenum));
 
r8a66597_mdfy(r8a66597, PID_BUF, PID,
-   get_pipectr_addr(pipenum));
+ get_pipectr_addr(pipenum));
}
 
r8a66597_mdfy(r8a66597, MBW | pipenum, MBW | CURPIPE, CFIFOSEL);
@@ -462,7 +462,7 @@ static int receive_control_packet(struct r8a66597 *r8a66597,
 }
 
 static int send_status_packet(struct r8a66597 *r8a66597,
-  unsigned long pipe)
+ unsigned long pipe)
 {
r8a66597_bset(r8a66597, SQSET, DCPCTR);
r8a66597_mdfy(r8a66597, PID_NAK, PID, DCPCTR);
@@ -553,9 +553,7 @@ static int check_usb_device_connecting(struct r8a66597 
*r8a66597)
return -1;  /* fail */
 }
 
-/*-*
- * Virtual Root Hub
- *-*/
+/* Virtual Root Hub */
 
 #include 
 
@@ -637,34 +635,34 @@ static int r8a66597_submit_rh_msg(struct udevice *udev, 
struct usb_device *dev,
switch ((wValue & 0xff00) >> 8) {
case (0x01): /* device descriptor */
len = min_t(unsigned int,
- leni,
+   leni,
  min_t(unsigned int,
- sizeof(root_hub_dev_des),
+   sizeof(root_hub_dev_des),
  wLength));
memcpy(buffer, root_hub_dev_des, len);
break;
case (0x02): /* configuration descriptor */
len = min_t(unsigned int,

[U-Boot] [PATCH V2 09/10] usb: r8a66597: Add optional DM VBUS regulator support

2019-08-22 Thread Marek Vasut
Add DM regulator support for toggling VBUS, this is useful on boards
which control the VBUS e.g. through GPIO.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: New patch
---
 drivers/usb/host/r8a66597-hcd.c | 29 +
 drivers/usb/host/r8a66597.h |  1 +
 2 files changed, 30 insertions(+)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 8b60ab2c6d..2c6c888694 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "r8a66597.h"
 
@@ -818,9 +819,27 @@ static int r8a66597_usb_probe(struct udevice *dev)
 {
struct r8a66597 *priv = dev_get_priv(dev);
struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
+   int ret;
 
bus_priv->desc_before_addr = true;
 
+   if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
+   ret = device_get_supply_regulator(dev, "vbus-supply",
+ >vbus_supply);
+   if (ret) {
+   dev_err(dev,
+   "can't get VBUS supply\n");
+   return ret;
+   }
+
+   ret = regulator_set_enable(priv->vbus_supply, true);
+   if (ret) {
+   dev_err(dev,
+   "can't enable VBUS supply\n");
+   return ret;
+   }
+   }
+
disable_controller(priv);
mdelay(100);
 
@@ -838,9 +857,19 @@ static int r8a66597_usb_probe(struct udevice *dev)
 static int r8a66597_usb_remove(struct udevice *dev)
 {
struct r8a66597 *priv = dev_get_priv(dev);
+   int ret;
 
disable_controller(priv);
 
+   if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
+   ret = regulator_set_enable(priv->vbus_supply, false);
+   if (ret) {
+   dev_err(dev,
+   "can't disable VBUS supply\n");
+   return ret;
+   }
+   }
+
return 0;
 }
 
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index 3077bc7999..b6110d6b3f 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -396,6 +396,7 @@ struct r8a66597 {
unsigned short port_change;
u16 speed;  /* HSMODE or FSMODE or LSMODE */
unsigned char rh_devnum;
+   struct udevice *vbus_supply;
 };
 
 static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long 
offset)
-- 
2.23.0.rc1

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[U-Boot] [PATCH V2 07/10] usb: r8a66597: Add Kconfig entry

2019-08-22 Thread Marek Vasut
Add missing Kconfig entry for the R8A66597 driver.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: No change
---
 drivers/usb/host/Kconfig | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 42046c8062..30c6b69be8 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -300,3 +300,12 @@ config USB_DWC2_BUFFER_SIZE
  because larger transactions could be split in smaller ones.
 
 endif # USB_DWC2
+
+config USB_R8A66597_HCD
+   bool "Renesas R8A66597 USB Core support"
+   depends on OF_CONTROL
+   depends on DM_USB
+   select USB_HOST
+   ---help---
+ This enables support for the on-chip Renesas R8A66597 USB 2.0
+ controller, present in various RZ and SH SoCs.
-- 
2.23.0.rc1

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[U-Boot] [PATCH V2 06/10] usb: r8a66597: Convert to USB DM

2019-08-22 Thread Marek Vasut
Convert the R8A66597 USB driver to DM and add support for DT probing.
Drop support for legacy non-DM and non-DT probing, since there are no
platform using that.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: Drop incorrect debug print
---
 drivers/usb/host/r8a66597-hcd.c | 195 
 1 file changed, 125 insertions(+), 70 deletions(-)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 28d0c0fcde..b5a93e29f3 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -7,6 +7,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -19,29 +20,49 @@
 #define R8A66597_DPRINT(...)
 #endif
 
-static struct r8a66597 gr8a66597;
+static inline struct usb_device *usb_dev_get_parent(struct usb_device *udev)
+{
+   struct udevice *parent = udev->dev->parent;
+
+   /*
+* When called from usb-uclass.c: usb_scan_device() udev->dev points
+* to the parent udevice, not the actual udevice belonging to the
+* udev as the device is not instantiated yet.
+*
+* If dev is an usb-bus, then we are called from usb_scan_device() for
+* an usb-device plugged directly into the root port, return NULL.
+*/
+   if (device_get_uclass_id(udev->dev) == UCLASS_USB)
+   return NULL;
+
+   /*
+* If these 2 are not the same we are being called from
+* usb_scan_device() and udev itself is the parent.
+*/
+   if (dev_get_parent_priv(udev->dev) != udev)
+   return udev;
+
+   /* We are being called normally, use the parent pointer */
+   if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
+   return dev_get_parent_priv(parent);
+
+   return NULL;
+}
 
 static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)
 {
-   int i;
+   struct usb_device *parent = usb_dev_get_parent(dev);
 
*hub_devnum = 0;
*hubport = 0;
 
/* check a device connected to root_hub */
-   if ((dev->parent && dev->parent->devnum == 1) ||
+   if ((parent && parent->devnum == 1) ||
(dev->devnum == 1))
return;
 
-   for (i = 0; i < USB_MAXCHILDREN; i++) {
-   if (dev->parent->children[i] == dev) {
-   *hub_devnum = (u8)dev->parent->devnum;
-   *hubport = i;
-   return;
-   }
-   }
-
-   printf("get_hub_data error.\n");
+   *hub_devnum = (u8)parent->devnum;
+   *hubport = parent->portnr - 1;
 }
 
 static void set_devadd(struct r8a66597 *r8a66597, u8 r8a66597_address,
@@ -538,10 +559,11 @@ static int check_usb_device_connecting(struct r8a66597 
*r8a66597)
 
 #include 
 
-static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
-   void *buffer, int transfer_len, struct devrequest *cmd)
+static int r8a66597_submit_rh_msg(struct udevice *udev, struct usb_device *dev,
+ unsigned long pipe, void *buffer,
+ int transfer_len, struct devrequest *cmd)
 {
-   struct r8a66597 *r8a66597 = 
+   struct r8a66597 *r8a66597 = dev_get_priv(udev);
int leni = transfer_len;
int len = 0;
int stat = 0;
@@ -609,7 +631,7 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, 
unsigned long pipe,
}
break;
case RH_SET_ADDRESS:
-   gr8a66597.rh_devnum = wValue;
+   r8a66597->rh_devnum = wValue;
break;
case RH_GET_DESCRIPTOR:
switch ((wValue & 0xff00) >> 8) {
@@ -705,50 +727,21 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, 
unsigned long pipe,
return stat;
 }
 
-int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-   int transfer_len)
+static int r8a66597_submit_control_msg(struct udevice *udev, struct usb_device 
*dev,
+  unsigned long pipe, void *buffer, int length,
+  struct devrequest *setup)
 {
-   struct r8a66597 *r8a66597 = 
-   int ret = 0;
-
-   R8A66597_DPRINT("%s\n", __func__);
-   R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n",
-   pipe, buffer, transfer_len, dev->devnum);
-
-   set_devadd(r8a66597, dev->devnum, dev, 0);
-
-   pipe_buffer_setting(r8a66597, dev, pipe);
-
-   dev->act_len = 0;
-   while (dev->act_len < transfer_len && ret == 0) {
-   if (ctrlc())
-   return -1;
-
-   if (usb_pipein(pipe))
-   ret = receive_bulk_packet(r8a66597, dev, pipe, buffer,
-   transfer_len);
-   else
-   ret = send_bulk_packet(r8a66597, dev, pipe, buffer,
- 

[U-Boot] [PATCH V2 04/10] usb: r8a66597: Remove BE support

2019-08-22 Thread Marek Vasut
While the USB controller can work both in LE and BE modes, there is
no user for the BE mode, so drop it. If there ever is a user for it,
it can be easily re-added back.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: No change
---
 drivers/usb/host/r8a66597-hcd.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index d144b57a61..2b9f8a150a 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -139,9 +139,9 @@ static int enable_controller(struct r8a66597 *r8a66597)
for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
r8a66597_write(r8a66597, 0, get_intenb_reg(port));
 
-   r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, CFIFOSEL);
-   r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D0FIFOSEL);
-   r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D1FIFOSEL);
+   r8a66597_bclr(r8a66597, BIGEND, CFIFOSEL);
+   r8a66597_bclr(r8a66597, BIGEND, D0FIFOSEL);
+   r8a66597_bclr(r8a66597, BIGEND, D1FIFOSEL);
r8a66597_bset(r8a66597, TRNENSEL, SOFCFG);
 
for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
-- 
2.23.0.rc1

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[U-Boot] [PATCH V2 03/10] usb: r8a66597: Replace IO accessors

2019-08-22 Thread Marek Vasut
Replace in{bwl}()/out{bwl}() IO accessors with read{bwl}()/write{bwl}(),
to make the driver compile both on SH and ARM.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: No change
---
 drivers/usb/host/r8a66597.h | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index 1e370cdd6c..7ad14ddfd2 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -402,7 +402,7 @@ struct r8a66597 {
 
 static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long 
offset)
 {
-   return inw(r8a66597->reg + offset);
+   return readw(r8a66597->reg + offset);
 }
 
 static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
@@ -416,10 +416,10 @@ static inline void r8a66597_read_fifo(struct r8a66597 
*r8a66597,
 
count = len / 4;
for (i = 0; i < count; i++)
-   p[i] = inl(r8a66597->reg + offset);
+   p[i] = readl(r8a66597->reg + offset);
 
if (len & 0x0003) {
-   unsigned long tmp = inl(fifoaddr);
+   unsigned long tmp = readl(fifoaddr);
memcpy((unsigned char *)buf + count * 4, , len & 0x03);
}
 }
@@ -427,7 +427,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 
*r8a66597,
 static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
  unsigned long offset)
 {
-   outw(val, r8a66597->reg + offset);
+   writew(val, r8a66597->reg + offset);
 }
 
 static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
@@ -442,15 +442,15 @@ static inline void r8a66597_write_fifo(struct r8a66597 
*r8a66597,
 
count = len / 4;
for (i = 0; i < count; i++)
-   outl(p[i], fifoaddr);
+   writel(p[i], fifoaddr);
 
if (len & 0x0003) {
pb = (unsigned char *)buf + count * 4;
for (i = 0; i < (len & 0x0003); i++) {
if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
-   outb(pb[i], fifoaddr + i);
+   writeb(pb[i], fifoaddr + i);
else
-   outb(pb[i], fifoaddr + 3 - i);
+   writeb(pb[i], fifoaddr + 3 - i);
}
}
 }
-- 
2.23.0.rc1

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[U-Boot] [PATCH V2 02/10] usb: r8a66597: Make CONFIG_RZA_USB default

2019-08-22 Thread Marek Vasut
No other platforms use this r8a66597 controller but RZ/A1,
make RZ/A1 support the default and drop all the other SoC
support to remove ifdeffery.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: No change
---
 drivers/usb/host/r8a66597-hcd.c | 35 -
 drivers/usb/host/r8a66597.h | 39 -
 2 files changed, 74 deletions(-)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 8cca09f6d8..d144b57a61 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -70,20 +70,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
}
} while ((tmp & USBE) != USBE);
r8a66597_bclr(r8a66597, USBE, SYSCFG0);
-#if !defined(CONFIG_RZA_USB)
-   r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0);
-
-   i = 0;
-   r8a66597_bset(r8a66597, XCKE, SYSCFG0);
-   do {
-   udelay(1000);
-   tmp = r8a66597_read(r8a66597, SYSCFG0);
-   if (i++ > 500) {
-   printf("register access fail.\n");
-   return -1;
-   }
-   } while ((tmp & SCKE) != SCKE);
-#else
/*
 * RZ/A Only:
 * Bits XTAL(UCKSEL) and UPLLE in SYSCFG0 for USB0 controls both USB0
@@ -96,28 +82,18 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
setbits(le16, R8A66597_BASE0, UPLLE);
mdelay(1);
r8a66597_bset(r8a66597, SUSPM, SUSPMODE0);
-#endif /* CONFIG_RZA_USB */
 
return 0;
 }
 
 static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
 {
-#if !defined(CONFIG_RZA_USB)
-   r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
-   udelay(1);
-   r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
-   r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
-   r8a66597_bclr(r8a66597, USBE, SYSCFG0);
-#else
r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0);
 
clrbits(le16, R8A66597_BASE0, UPLLE);
mdelay(1);
r8a66597_bclr(r8a66597, USBE, SYSCFG0);
mdelay(1);
-
-#endif
 }
 
 static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
@@ -127,10 +103,6 @@ static void r8a66597_enable_port(struct r8a66597 
*r8a66597, int port)
val = port ? DRPD : DCFM | DRPD;
r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
-
-#if !defined(CONFIG_RZA_USB)
-   r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
-#endif
 }
 
 static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
@@ -160,9 +132,6 @@ static int enable_controller(struct r8a66597 *r8a66597)
if (ret < 0)
return ret;
 
-#if !defined(CONFIG_RZA_USB)
-   r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG);
-#endif
r8a66597_bset(r8a66597, USBE, SYSCFG0);
 
r8a66597_bset(r8a66597, INTL, SOFCFG);
@@ -280,16 +249,13 @@ static int send_setup_packet(struct r8a66597 *r8a66597, 
struct usb_device *dev,
unsigned long setup_addr = USBREQ;
u16 intsts1;
int timeout = 3000;
-#if defined(CONFIG_RZA_USB)
u16 dcpctr;
-#endif
u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum;
 
r8a66597_write(r8a66597, make_devsel(devsel) |
 (8 << dev->maxpacketsize), DCPMAXP);
r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
 
-#if defined(CONFIG_RZA_USB)
dcpctr = r8a66597_read(r8a66597, DCPCTR);
if ((dcpctr & PID) == PID_BUF) {
if (readw_poll_timeout(r8a66597->reg + DCPCTR, dcpctr,
@@ -298,7 +264,6 @@ static int send_setup_packet(struct r8a66597 *r8a66597, 
struct usb_device *dev,
return -ETIMEDOUT;
}
}
-#endif
 
for (i = 0; i < 4; i++) {
r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index 4859e26355..1e370cdd6c 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -89,27 +89,14 @@
 #define SUSPMODE0  0x102   /* RZ/A only */
 
 /* System Configuration Control Register */
-#if !defined(CONFIG_RZA_USB)
-#defineXTAL0xC000  /* b15-14: Crystal selection */
-#define  XTAL48 0x8000   /* 48MHz */
-#define  XTAL24 0x4000   /* 24MHz */
-#define  XTAL12 0x   /* 12MHz */
-#defineXCKE0x2000  /* b13: External clock enable */
-#definePLLC0x0800  /* b11: PLL control */
-#defineSCKE0x0400  /* b10: USB clock enable */
-#definePCSDIS  0x0200  /* b9: not CS wakeup */
-#defineLPSME   0x0100  /* b8: Low power sleep mode */
-#endif
 #defineHSE 0x0080  /* b7: Hi-speed enable */
 #defineDCFM0x0040  /* b6: Controller function select  */
 

[U-Boot] [PATCH V2 01/10] usb: r8a66597: Remove CONFIG_SUPERH_ON_CHIP_R8A66597

2019-08-22 Thread Marek Vasut
Remove CONFIG_SUPERH_ON_CHIP_R8A66597 macro, which is unused.

Signed-off-by: Marek Vasut 
Cc: Chris Brandt 
---
V2: No change
---
 drivers/usb/host/r8a66597-hcd.c | 14 --
 drivers/usb/host/r8a66597.h | 12 ++--
 2 files changed, 2 insertions(+), 24 deletions(-)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 3c263e51c1..8cca09f6d8 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -61,17 +61,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
u16 tmp;
int i = 0;
 
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
-   do {
-   r8a66597_write(r8a66597, SCKE, SYSCFG0);
-   tmp = r8a66597_read(r8a66597, SYSCFG0);
-   if (i++ > 1000) {
-   printf("register access fail.\n");
-   return -1;
-   }
-   } while ((tmp & SCKE) != SCKE);
-   r8a66597_write(r8a66597, 0x04, 0x02);
-#else
do {
r8a66597_write(r8a66597, USBE, SYSCFG0);
tmp = r8a66597_read(r8a66597, SYSCFG0);
@@ -108,7 +97,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
mdelay(1);
r8a66597_bset(r8a66597, SUSPM, SUSPMODE0);
 #endif /* CONFIG_RZA_USB */
-#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */
 
return 0;
 }
@@ -118,11 +106,9 @@ static void r8a66597_clock_disable(struct r8a66597 
*r8a66597)
 #if !defined(CONFIG_RZA_USB)
r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
udelay(1);
-#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
r8a66597_bclr(r8a66597, USBE, SYSCFG0);
-#endif
 #else
r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0);
 
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index ffdb39e8bb..4859e26355 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -178,15 +178,11 @@
 #defineREW 0x4000  /* b14: Buffer rewind */
 #defineDCLRM   0x2000  /* b13: DMA buffer clear mode */
 #defineDREQE   0x1000  /* b12: DREQ output enable */
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
-#defineMBW 0x0800
-#else
 #if !defined(CONFIG_RZA_USB)
 #defineMBW 0x0400  /* b10: Maximum bit width for FIFO 
access */
 #else
 #defineMBW 0x0800  /* b10: Maximum bit width for FIFO 
access */
 #endif
-#endif
 #define  MBW_8  0x   /*  8bit */
 #define  MBW_16 0x0400   /* 16bit */
 #define  MBW_32 0x0800   /* 32bit */
@@ -398,11 +394,7 @@
 #define R8A66597_MAX_NUM_PIPE  10
 #define R8A66597_BUF_BSIZE 8
 #define R8A66597_MAX_DEVICE10
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
-#define R8A66597_MAX_ROOT_HUB  1
-#else
 #define R8A66597_MAX_ROOT_HUB  2
-#endif
 #define R8A66597_MAX_SAMPLING  5
 #define R8A66597_RH_POLL_TIME  10
 
@@ -435,7 +427,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 
*r8a66597,
  int len)
 {
int i;
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB)
+#if defined(CONFIG_RZA_USB)
unsigned long fifoaddr = r8a66597->reg + offset;
unsigned long count;
unsigned long *p = buf;
@@ -469,7 +461,7 @@ static inline void r8a66597_write_fifo(struct r8a66597 
*r8a66597,
 {
int i;
unsigned long fifoaddr = r8a66597->reg + offset;
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB)
+#if defined(CONFIG_RZA_USB)
unsigned long count;
unsigned char *pb;
unsigned long *p = buf;
-- 
2.23.0.rc1

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[U-Boot] [GIT] Pull request: u-boot-clk (22.08.2019)

2019-08-22 Thread Lukasz Majewski
Dear Tom,

Please find a PR for u-boot-clk branch:

The following changes since commit
753e5385ca6d0fe5b5f5a3a97cc96b0f2469ca94:

  test/py: Add cmd_memory dependency back to test_mmc_wr (2019-08-22
  00:09:58 +0200)

are available in the git repository at:

   https://gitlab.denx.de/u-boot/custodians/u-boot-clk

for you to fetch changes up to f62ec5c4bba2556202523b0f48655dacbe90753a:

  clk: imx: add i.MX8MM clk driver (2019-08-22 00:10:15 +0200)


Peng Fan (8):
  clk: introduce enable_count
  clk: prograte clk enable/disable to parent
  clk: support clk tree dump
  sandbox: clk: add clk enable/disable test code
  clk: imx: expose CCF entry for all
  clk: imx: add pll14xx driver
  clk: imx: add i.MX8M composite clk support
  clk: imx: add i.MX8MM clk driver

 cmd/clk.c  |  79
 +++- drivers/clk/Kconfig
  |   2 -- drivers/clk/clk-uclass.c   |  77
 +++ drivers/clk/clk.c
 |   1 + drivers/clk/clk_fixed_rate.c   |   1 +
 drivers/clk/clk_sandbox_ccf.c  |  15 +
 drivers/clk/imx/Kconfig|  16 +
 drivers/clk/imx/Makefile   |   2 ++
 drivers/clk/imx/clk-composite-8m.c | 170
 
+++
 drivers/clk/imx/clk-imx8mm.c   | 415
 
+++
 drivers/clk/imx/clk-pll14xx.c  | 381
 

 drivers/clk/imx/clk.h  |  25 ++ include/clk.h
 |   1 + include/sandbox-clk.h  |   3
 ++ test/dm/clk_ccf.c  |  28  15 files
 changed, 1178 insertions(+), 38 deletions(-) create mode 100644
 drivers/clk/imx/clk-composite-8m.c create mode 100644
 drivers/clk/imx/clk-imx8mm.c create mode 100644
 drivers/clk/imx/clk-pll14xx.c

Travis-CI: https://travis-ci.org/lmajewski/u-boot-dfu/builds/575085150

Best regards,

Lukasz Majewski

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Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de


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Re: [U-Boot] [PATCH] ARM: vexpress_*_defconfig: replace earlyprintk with earlycon

2019-08-22 Thread Linus Walleij
On Wed, Aug 21, 2019 at 7:29 PM Sudeep Holla  wrote:

> earlyprintk no longer works on arm64 platforms. Replace it with earlycon
> which works fine.
>
> Cc: Ryan Harkin 
> Cc: Liviu Dudau 
> Cc: Linus Walleij 
> Signed-off-by: Sudeep Holla 

Reviewed-by: Linus Walleij 

Yours,
Linus Walleij
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Re: [U-Boot] [PATCH v2] net/macb: increase RX buffer size for GEM

2019-08-22 Thread Stefan Roese

Hi Ramon,

On 22.08.19 13:15, Ramon Fried wrote:



On August 22, 2019 12:38:08 PM GMT+03:00, Stefan Roese  
wrote:

Hi Ramon,

On 14.07.19 17:25, Ramon Fried wrote:

Macb Ethernet controller requires a RX buffer of 128 bytes. It is
highly sub-optimal for Gigabit-capable GEM that is able to use
a bigger DMA buffer. Change this constant and associated macros
with data stored in the private structure.
RX DMA buffer size has to be multiple of 64 bytes as indicated in
DMA Configuration Register specification.

Signed-off-by: Ramon Fried 


This patch breaks ethernet on my AT91SAM9G25 based board. With this
patch now, tftp does not complete the xfer any more:

=> tftp 2100 big
ethernet@f802c000: PHY present at 1
ethernet@f802c000: Starting autonegotiation...
ethernet@f802c000: Autonegotiation complete
ethernet@f802c000: link up, 100Mbps full-duplex (lpa: 0xc5e1)
Using ethernet@f802c000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.249
Filename 'big'.
Load address: 0x2100
Loading: #T T

With this patch reverted (as well as with v2019.07), tftp works
just fine.

I did not look into the patch yet. Perhaps you have a quick idea
on why this breaks my platform.

BTW: When I disable the dcache (dcache off), tftp also works fine
with this patch. So its definitely something cache / dma related.


Thanks for letting me know, I'll be next to a PC tomorrow, I'll look
into it.


I did look into this patch a bit and did not find any functional
change for the non-GEM part I'm using. Hopefully I'll find some more
time tomorrow to dig into this. If you spot something meanwhile,
then even better. ;)

Thanks,
Stefan
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Re: [U-Boot] [PATCH] nvme: Fix PRP Offset Invalid

2019-08-22 Thread Bin Meng
HI Aaron,

On Thu, Aug 22, 2019 at 5:12 PM Aaron Williams  wrote:
>
> When large writes take place I saw a Samsung EVO 970+ return a status
> value of 0x13, PRP Offset Invalid.  I tracked this down to the
> improper handling of PRP entries.  The blocks the PRP entries are
> placed in cannot cross a page boundary and thus should be allocated
> on page boundaries.  This is how the Linux kernel driver works.
>
> With this patch, the PRP pool is allocated on a page boundary and
> other than the very first allocation, the pool size is a multiple of
> the page size.  Each page can hold (4096 / 8) - 1 entries since the
> last entry must point to the next page in the pool.
>
> Signed-off-by: Aaron Williams 
> ---
>  drivers/nvme/nvme.c | 28 ++--
>  1 file changed, 18 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
> index d4965e2ef6..bc4cf40b40 100644
> --- a/drivers/nvme/nvme.c
> +++ b/drivers/nvme/nvme.c
> @@ -73,6 +73,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
> u64 *prp_pool;
> int length = total_len;
> int i, nprps;
> +   u32 prps_per_page = (page_size >> 3) - 1;
> +   u32 num_pages;
> +
> length -= (page_size - offset);
>
> if (length <= 0) {
> @@ -89,15 +92,19 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 
> *prp2,
> }
>
> nprps = DIV_ROUND_UP(length, page_size);
> +   num_pages = DIV_ROUND_UP(nprps, prps_per_page);
>
> if (nprps > dev->prp_entry_num) {
> free(dev->prp_pool);
> -   dev->prp_pool = malloc(nprps << 3);
> +   /* Always increase in increments of pages.  It doesn't waste

nits: please use the correct multi-line comment format.

> +* much memory and reduces the number of allocations.
> +*/
> +   dev->prp_pool = memalign(page_size, num_pages * page_size);
> if (!dev->prp_pool) {
> printf("Error: malloc prp_pool fail\n");
> return -ENOMEM;
> }
> -   dev->prp_entry_num = nprps;
> +   dev->prp_entry_num = prps_per_page * num_pages;
> }
>
> prp_pool = dev->prp_pool;
> @@ -788,14 +795,6 @@ static int nvme_probe(struct udevice *udev)
> }
> memset(ndev->queues, 0, NVME_Q_NUM * sizeof(struct nvme_queue *));
>
> -   ndev->prp_pool = malloc(MAX_PRP_POOL);
> -   if (!ndev->prp_pool) {
> -   ret = -ENOMEM;
> -   printf("Error: %s: Out of memory!\n", udev->name);
> -   goto free_nvme;
> -   }
> -   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
> -
> ndev->cap = nvme_readq(>bar->cap);
> ndev->q_depth = min_t(int, NVME_CAP_MQES(ndev->cap) + 1, 
> NVME_Q_DEPTH);
> ndev->db_stride = 1 << NVME_CAP_STRIDE(ndev->cap);
> @@ -805,6 +804,15 @@ static int nvme_probe(struct udevice *udev)
> if (ret)
> goto free_queue;
>
> +   /* Allocate after the page size is known */
> +   ndev->prp_pool = memalign(ndev->page_size, MAX_PRP_POOL);
> +   if (!ndev->prp_pool) {
> +   ret = -ENOMEM;
> +   printf("Error: %s: Out of memory!\n", udev->name);
> +   goto free_nvme;
> +   }
> +   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
> +
> ret = nvme_setup_io_queues(ndev);
> if (ret)
> goto free_queue;
> --

Other than above nits, you can include my:
Reviewed-by: Bin Meng 

in your next version patch. Thanks!

Regards,
Bin
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Re: [U-Boot] toolchain for riscv?

2019-08-22 Thread Bin Meng
Hi Hannes,

On Thu, Aug 22, 2019 at 6:21 PM Hannes Schmelzer  wrote:
>
> hi,
>
> just tried to run moveconfig.py, having trouble to find the toolchain
> for "riscv".
>
> I already did run "tools/buildman/buildman.py --fetch-arch=all", but no
> toolchain for riscv was downloaded.
>
> where to get correct toolchain?
>

./tools/buildman/buildman --fetch-arch riscv64

Regards,
Bin
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Re: [U-Boot] [PATCH] blk: Invalidate block cache when switching hwpart

2019-08-22 Thread Felix Brack
On 11.07.19 09:10, Weijie Gao wrote:

> Some storage devices have multiple hw partitions and both address from
> zero, for example eMMC.
> However currently block cache invalidation only applies to block
> write/erase.
> This can cause a problem that data of current hw partition is cached
> before switching to another hw partition. And the following read
> operation of the latter hw partition will get wrong data when reading
> from the addresses that have been cached previously.
> 
> To solve this problem, invalidate block cache after a successful
> select_hwpart operation.
> 
> Signed-off-by: Weijie Gao 
> ---
This patch breaks correct operation of PDU001 board.

>  drivers/block/blk-uclass.c | 14 --
>  1 file changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
> index baaf431e5e0..c23b6682a6c 100644
> --- a/drivers/block/blk-uclass.c
> +++ b/drivers/block/blk-uclass.c
> @@ -208,7 +208,11 @@ int blk_select_hwpart_devnum(enum if_type if_type, int 
> devnum, int hwpart)
>   if (ret)
>   return ret;
>  
> - return blk_select_hwpart(dev, hwpart);
> + ret = blk_select_hwpart(dev, hwpart);
> + if (!ret)
> + blkcache_invalidate(if_type, devnum);
> +
> + return ret;
>  }
>  
>  int blk_list_part(enum if_type if_type)
> @@ -348,7 +352,13 @@ int blk_select_hwpart(struct udevice *dev, int hwpart)
>  
>  int blk_dselect_hwpart(struct blk_desc *desc, int hwpart)
>  {
> - return blk_select_hwpart(desc->bdev, hwpart);
> + int ret;
> +
> + ret = blk_select_hwpart(desc->bdev, hwpart);
> + if (!ret)
> + blkcache_invalidate(desc->if_type, desc->devnum);
> +
Commenting the invalidation of the block cache on this line results in
proper working of the board.

> + return ret;
>  }
>  
>  int blk_first_device(int if_type, struct udevice **devp)
> 
With the patch active, files from the boot FAT partition of the SD-card
(mmc device 1) do not load anymore, hence booting fails.
Using the eMMC (mmc device 0) instead works fine, files can bee loaded
and the board boots.

To isolate the problem I have modified the configuration to only load a
10k test file (test.bin) instead of loading the DTB and zImage files
followed by booting LINUX. Furthermore I have enabled debugging for some
parts of the code.

When I boot from the SD-card (which fails) I get the following logged:
===
CPU  : AM335X-GP rev 1.0
Model: EETS,PDU001
DRAM:  256 MiB
mmc_bind: alias ret=-2, devnum=-1
mmc_bind: alias ret=-2, devnum=-1
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
In:serial@481a6000
Out:   serial@481a6000
Err:   serial@481a6000
Press SPACE to abort autoboot in 1 seconds
blk_get_devnum_by_typename: if_type=6, devnum=1: m...@4806.blk, 6, 0
blk_get_devnum_by_typename: if_type=6, devnum=1: m...@481d8000.blk, 6, 1
clock is disabled (0Hz)
clock is enabled (40Hz)
clock is enabled (5000Hz)
miss: start 0, count 1
blk_find_device: if_type=6, devnum=1: m...@4806.blk, 6, 0
blk_find_device: if_type=6, devnum=1: m...@481d8000.blk, 6, 1
fill: start 0, count 1
part_init: try 'EFI': ret=-1
hit: start 0, count 1
part_init: try 'DOS': ret=0
blk_get_devnum_by_typename: Device desc 8dfb3a98
miss: start 0, count 1
blk_find_device: if_type=6, devnum=1: m...@4806.blk, 6, 0
blk_find_device: if_type=6, devnum=1: m...@481d8000.blk, 6, 1
fill: start 0, count 1
part_init: try 'EFI': ret=-1
hit: start 0, count 1
part_init: try 'DOS': ret=0
hit: start 0, count 1
miss: start 800, count 1
blk_find_device: if_type=6, devnum=1: m...@4806.blk, 6, 0
blk_find_device: if_type=6, devnum=1: m...@481d8000.blk, 6, 1
fill: start 800, count 1
hit: start 800, count 1
FAT16, fat_sect: 1, fatlength: 64
Rootdir begins at cluster: 0, sector: 129, offset: 10200
Data begins at: 153
Sector size: 512, cluster size: 4
FAT read(sect=129), clust_size=4, read_size=4, DIRENTSPERBLOCK=16
miss: start 881, count 4
blk_find_device: if_type=6, devnum=1: m...@4806.blk, 6, 0
blk_find_device: if_type=6, devnum=1: m...@481d8000.blk, 6, 1
fill: start 881, count 4
miss: start 800, count 1
blk_find_device: if_type=6, devnum=1: m...@4806.blk, 6, 0
blk_find_device: if_type=6, devnum=1: m...@481d8000.blk, 6, 1
fill: start 800, count 1
FAT16, fat_sect: 1, fatlength: 64
Rootdir begins at cluster: 0, sector: 129, offset: 10200
Data begins at: 153
Sector size: 512, cluster size: 4
FAT read(sect=129), clust_size=4, read_size=4, DIRENTSPERBLOCK=16
miss: start 881, count 4
blk_find_device: if_type=6, devnum=1: m...@4806.blk, 6, 0
blk_find_device: if_type=6, devnum=1: m...@481d8000.blk, 6, 1
fill: start 881, count 4
reading test.bin at pos 0
Filesize: 0 bytes
Read position past EOF: 0
0 bytes read in 94 ms (0 Bytes/s)
===

Obviously the the file test.bin does not get loaded.

Booting from the eMMC (which works) logs the following:
===
CPU  : AM335X-GP rev 1.0
Model: EETS,PDU001
DRAM:  256 MiB
mmc_bind: alias ret=-2, devnum=-1
mmc_bind: alias ret=-2, 

[U-Boot] [PATCH 5/5] Convert CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig

2019-08-22 Thread Hannes Schmelzer
This converts the following to Kconfig:
   CONFIG_SYS_SPI_U_BOOT_OFFS

Signed-off-by: Hannes Schmelzer 
---

 common/spl/Kconfig  | 8 
 configs/alt_defconfig   | 1 +
 configs/am57xx_evm_defconfig| 1 +
 configs/am57xx_hs_evm_defconfig | 1 +
 configs/am57xx_hs_evm_usb_defconfig | 1 +
 configs/brppt1_spi_defconfig| 1 +
 configs/brsmarc1_defconfig  | 1 +
 configs/cgtqmx6eval_defconfig   | 1 +
 configs/chromebit_mickey_defconfig  | 1 +
 configs/chromebook_bob_defconfig| 1 +
 configs/chromebook_jerry_defconfig  | 1 +
 configs/chromebook_minnie_defconfig | 1 +
 configs/chromebook_speedy_defconfig | 1 +
 configs/cm_fx6_defconfig| 1 +
 configs/cm_t43_defconfig| 1 +
 configs/controlcenterdc_defconfig   | 1 +
 configs/da850evm_defconfig  | 1 +
 configs/da850evm_nand_defconfig | 1 +
 configs/db-88f6720_defconfig| 1 +
 configs/db-88f6820-amc_defconfig| 1 +
 configs/db-88f6820-gp_defconfig | 1 +
 configs/db-mv784mp-gp_defconfig | 1 +
 configs/dh_imx6_defconfig   | 1 +
 configs/display5_defconfig  | 1 +
 configs/display5_factory_defconfig  | 1 +
 configs/dra7xx_evm_defconfig| 1 +
 configs/dra7xx_hs_evm_defconfig | 1 +
 configs/dra7xx_hs_evm_usb_defconfig | 1 +
 configs/draco_defconfig | 1 +
 configs/ds414_defconfig | 1 +
 configs/etamin_defconfig| 1 +
 configs/gose_defconfig  | 1 +
 configs/j721e_evm_a72_defconfig | 1 +
 configs/j721e_evm_r5_defconfig  | 1 +
 configs/k2e_evm_defconfig   | 1 +
 configs/k2g_evm_defconfig   | 1 +
 configs/k2hk_evm_defconfig  | 1 +
 configs/k2l_evm_defconfig   | 1 +
 configs/koelsch_defconfig   | 1 +
 configs/lager_defconfig | 1 +
 configs/maxbcm_defconfig| 1 +
 configs/ot1200_spl_defconfig| 1 +
 configs/pcm058_defconfig| 1 +
 configs/pfla02_defconfig| 1 +
 configs/porter_defconfig| 1 +
 configs/puma-rk3399_defconfig   | 1 +
 configs/pxm2_defconfig  | 1 +
 configs/rastaban_defconfig  | 1 +
 configs/rut_defconfig   | 1 +
 configs/sama5d2_xplained_spiflash_defconfig | 1 +
 configs/sama5d3xek_spiflash_defconfig   | 1 +
 configs/sama5d4_xplained_spiflash_defconfig | 1 +
 configs/sama5d4ek_spiflash_defconfig| 1 +
 configs/silk_defconfig  | 1 +
 configs/socfpga_arria5_defconfig| 1 +
 configs/socfpga_cyclone5_defconfig  | 1 +
 configs/socfpga_dbm_soc1_defconfig  | 1 +
 configs/socfpga_de0_nano_soc_defconfig  | 1 +
 configs/socfpga_de10_nano_defconfig | 1 +
 configs/socfpga_is1_defconfig   | 1 +
 configs/socfpga_mcvevk_defconfig| 1 +
 configs/socfpga_sockit_defconfig| 1 +
 configs/socfpga_socrates_defconfig  | 1 +
 configs/socfpga_sr1500_defconfig| 1 +
 configs/socfpga_stratix10_defconfig | 1 +
 configs/socfpga_vining_fpga_defconfig   | 1 +
 configs/stout_defconfig | 1 +
 configs/theadorable_debug_defconfig | 1 +
 configs/thuban_defconfig| 1 +
 configs/topic_miami_defconfig   | 1 +
 configs/topic_miamilite_defconfig   | 1 +
 configs/topic_miamiplus_defconfig   | 1 +
 configs/turris_omnia_defconfig  | 1 +
 configs/x530_defconfig  | 1 +
 configs/zc5202_defconfig| 1 +
 configs/zc5601_defconfig| 1 +
 configs/zynq_cc108_defconfig| 1 +
 configs/zynq_cse_qspi_defconfig | 1 +
 configs/zynq_dlc20_rev1_0_defconfig | 1 +
 configs/zynq_microzed_defconfig | 1 +
 configs/zynq_z_turn_defconfig   | 1 +
 configs/zynq_zc702_defconfig| 1 +
 configs/zynq_zc706_defconfig| 1 +
 configs/zynq_zc770_xm010_defconfig  | 1 +
 configs/zynq_zc770_xm013_defconfig  | 1 +
 configs/zynq_zed_defconfig  | 1 +
 configs/zynq_zybo_defconfig | 1 +
 configs/zynq_zybo_z7_defconfig  | 1 +
 include/configs/alt.h   | 1 -
 include/configs/am335x_evm.h| 1 -
 include/configs/am57xx_evm.h| 1 -
 include/configs/at91sam9n12ek.h | 5 -
 include/configs/at91sam9x5ek.h  | 4 
 include/configs/bav335x.h   | 1 -
 include/configs/brppt1.h| 1 -
 include/configs/brsmarc1.h

[U-Boot] [PATCH 2/5] moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 2

2019-08-22 Thread Hannes Schmelzer
some boards have common headers for several individual build-targets
where CONFIG_SYS_SPI_U_BOOT_OFFS is defined even it is not needed (only
needed if CONFIG_SPL_SPI_LOAD is defined also). Take this define here
under '#ifdef CONFIG_SPL_SPI_LOAD' for having a clean run of
moveconfig.py

Signed-off-by: Hannes Schmelzer 
---

 include/configs/at91sam9n12ek.h| 2 +-
 include/configs/at91sam9x5ek.h | 2 +-
 include/configs/rk3128_common.h| 2 ++
 include/configs/rk3288_common.h| 2 ++
 include/configs/rk3328_common.h| 2 ++
 include/configs/rk3399_common.h| 2 ++
 include/configs/sama5d27_som1_ek.h | 2 +-
 include/configs/sama5d3xek.h   | 2 +-
 include/configs/socfpga_common.h   | 4 ++--
 include/configs/sunxi-common.h | 2 +-
 include/configs/ti814x_evm.h   | 2 ++
 include/configs/xilinx_zynqmp.h| 3 ++-
 include/configs/zynq-common.h  | 2 ++
 13 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index e9b97b6..2abe979 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -153,7 +153,7 @@
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img"
 
 #elif CONFIG_SYS_USE_NANDFLASH
-#elif CONFIG_SPI_BOOT
+#elif CONFIG_SPI_BOOT && CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
 
 #elif CONFIG_NAND_BOOT
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 9353de7..8056822 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -125,7 +125,7 @@
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img"
 
-#elif CONFIG_SPI_BOOT
+#elif CONFIG_SPI_BOOT && CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
 
 #elif CONFIG_NAND_BOOT
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index edd5532..e39009a 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -27,7 +27,9 @@
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)  /* 64M */
 
 /* RAW SD card / eMMC locations. */
+#ifdef CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2
+#endif
 
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
 #define CONFIG_SYS_SDRAM_BASE  0x6000
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index a647619..f30cc94 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -30,7 +30,9 @@
 #define CONFIG_IRAM_BASE   0xff70
 
 /* RAW SD card / eMMC locations. */
+#ifdef CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2
+#endif
 
 /* FAT sd card locations. */
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index bd424c0..a68e01e 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -25,7 +25,9 @@
 
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)  /* 64M */
 
+#ifdef CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2
+#endif
 
 /* FAT sd card locations. */
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index fc66797..cda5d03 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -39,7 +39,9 @@
 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 2
 
 /* RAW SD card / eMMC locations. */
+#ifdef CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2
+#endif
 
 /* FAT sd card locations. */
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
diff --git a/include/configs/sama5d27_som1_ek.h 
b/include/configs/sama5d27_som1_ek.h
index 90846c4..7898f4d 100644
--- a/include/configs/sama5d27_som1_ek.h
+++ b/include/configs/sama5d27_som1_ek.h
@@ -62,7 +62,7 @@
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img"
 #endif
 
-#ifdef CONFIG_QSPI_BOOT
+#if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL_SPI_LOAD)
 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
 #endif
 
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index db840e9..c5a2e54 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -84,7 +84,7 @@
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img"
 
-#elif CONFIG_SPI_BOOT
+#elif CONFIG_SPI_BOOT && CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
 
 #elif CONFIG_NAND_BOOT
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 36b0ed5..4141c7e 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -214,9 +214,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 
 /* SPL QSPI boot support */
 #ifdef CONFIG_SPL_SPI_SUPPORT
-#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5) && 

[U-Boot] [PATCH 4/5] moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 4

2019-08-22 Thread Hannes Schmelzer
the x530 board needs conversion of SPL_SPI_LOAD to Kconfig first

Signed-off-by: Hannes Schmelzer 
---

 configs/x530_defconfig | 1 +
 include/configs/x530.h | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/x530_defconfig b/configs/x530_defconfig
index 7db8de4..2bf20f4 100644
--- a/configs/x530_defconfig
+++ b/configs/x530_defconfig
@@ -21,6 +21,7 @@ CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y
 CONFIG_MISC_INIT_R=y
 CONFIG_SPL_TEXT_BASE=0x4030
 CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_SPI_LOAD=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
diff --git a/include/configs/x530.h b/include/configs/x530.h
index 80ae15b..0946121 100644
--- a/include/configs/x530.h
+++ b/include/configs/x530.h
@@ -120,7 +120,6 @@
 #define CONFIG_SPL_BOOTROM_SAVE(CONFIG_SPL_STACK + 4)
 
 /* SPL related SPI defines */
-#define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
 
-- 
2.7.4


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[U-Boot] [PATCH 3/5] moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 3

2019-08-22 Thread Hannes Schmelzer
Exact two boards are referencing CONFIG_SYS_SPI_U_BOOT_OFFS to another
define, we replace this manually with the value for having a clean run
of moveconfig.py afterwards.

Signed-off-by: Hannes Schmelzer 
---

 include/configs/mt7629.h | 4 +++-
 include/configs/ti_armv7_keystone2.h | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h
index 6e9b868..fc69d61 100644
--- a/include/configs/mt7629.h
+++ b/include/configs/mt7629.h
@@ -38,7 +38,9 @@
 #define CONFIG_SPL_PAD_TO  0x1
 
 #define CONFIG_SPI_ADDR0x3000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
+#ifdef CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
+#endif
 #define CONFIG_SYS_UBOOT_BASE  (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO)
 
 /* SPL -> Uboot */
diff --git a/include/configs/ti_armv7_keystone2.h 
b/include/configs/ti_armv7_keystone2.h
index 03753c5..9144662 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -44,7 +44,9 @@
CONFIG_SYS_SPL_MALLOC_SIZE + \
SPL_MALLOC_F_SIZE + \
KEYSTONE_SPL_STACK_SIZE - 4)
-#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
+#ifdef CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
+#endif
 
 /* SRAM scratch space entries  */
 #define SRAM_SCRATCH_SPACE_ADDRCONFIG_SPL_STACK + 0x8
-- 
2.7.4


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[U-Boot] [PATCH 1/5] moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 1

2019-08-22 Thread Hannes Schmelzer
Some boards have coded this offset with formula or bitshifts in their
board-config. Manually convert these things into hex-values to be able
using moveconfig.py afterwards.

Signed-off-by: Hannes Schmelzer 

---

 doc/README.rockchip | 2 +-
 include/configs/cgtqmx6eval.h   | 2 +-
 include/configs/cl-som-imx7.h   | 2 +-
 include/configs/cm_fx6.h| 2 +-
 include/configs/cm_t43.h| 2 +-
 include/configs/el6x_common.h   | 2 +-
 include/configs/ot1200.h| 2 +-
 include/configs/pcm058.h| 2 +-
 include/configs/pfla02.h| 2 +-
 include/configs/rk3128_common.h | 2 +-
 include/configs/rk3288_common.h | 2 +-
 include/configs/rk3328_common.h | 2 +-
 include/configs/rk3399_common.h | 2 +-
 13 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 7d4dc1b..463acd9 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -560,7 +560,7 @@ header and skipping every second 2KB block. Then the U-Boot 
image is written at
 offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
 The position of U-Boot is controlled with this setting in U-Boot:
 
-   #define CONFIG_SYS_SPI_U_BOOT_OFFS  (128 << 10)
+   #define CONFIG_SYS_SPI_U_BOOT_OFFS  0x2
 
 If you have a Dediprog em100pro connected then you can write the image with:
 
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index 07c6409..eedf0dd 100644
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@@ -17,7 +17,7 @@
 #define CONFIG_MACH_TYPE   4122
 
 #ifdef CONFIG_SPL
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
 #include "imx6_spl.h"
 #endif
 
diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h
index 4c93fc6..b745f5c 100644
--- a/include/configs/cl-som-imx7.h
+++ b/include/configs/cl-som-imx7.h
@@ -167,7 +167,7 @@
 /* SPL */
 #include "imx7_spl.h"
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
 #endif /* CONFIG_SPL_BUILD */
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 60bac9a..b2fae87 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -207,7 +207,7 @@
 
 /* SPL */
 #include "imx6_spl.h"
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
 
 /* Display */
 #define CONFIG_IMX_HDMI
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index b2c1300..8d9bf71 100644
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -115,7 +115,7 @@
 
 /* SPL defines. */
 #define CONFIG_SYS_SPL_ARGS_ADDR   (CONFIG_SYS_SDRAM_BASE + (128 << 20))
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x4
 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
 
 /* EEPROM */
diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h
index bf70ea0..bd46a34 100644
--- a/include/configs/el6x_common.h
+++ b/include/configs/el6x_common.h
@@ -20,7 +20,7 @@
 #define CONFIG_MXC_UART
 
 #ifdef CONFIG_SPL
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
 #include "imx6_spl.h"
 #endif
 
diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h
index 7dfcccb..17ccf8b 100644
--- a/include/configs/ot1200.h
+++ b/include/configs/ot1200.h
@@ -59,7 +59,7 @@
 /* SPL */
 #ifdef CONFIG_SPL
 #include "imx6_spl.h"
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
 #endif
 
 #define CONFIG_FEC_MXC
diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h
index b0415b2..98959ce 100644
--- a/include/configs/pcm058.h
+++ b/include/configs/pcm058.h
@@ -8,7 +8,7 @@
 #define __PCM058_CONFIG_H
 
 #ifdef CONFIG_SPL
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
 #include "imx6_spl.h"
 #endif
 
diff --git a/include/configs/pfla02.h b/include/configs/pfla02.h
index 3a9b85a..ed7e4fb 100644
--- a/include/configs/pfla02.h
+++ b/include/configs/pfla02.h
@@ -8,7 +8,7 @@
 #define __PCM058_CONFIG_H
 
 #ifdef CONFIG_SPL
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1
 #include "imx6_spl.h"
 #endif
 
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index d12696d..edd5532 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -27,7 +27,7 @@
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)  /* 64M */
 
 /* RAW SD card / eMMC locations. */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2
 
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
 #define CONFIG_SYS_SDRAM_BASE  0x6000
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 

[U-Boot] Error reading cluster" from fs/fat/fat.c

2019-08-22 Thread Oliver Graute
Hello list,

I have a annoying problem with u-boot 2019.07. I try to boot a Linux
Image from a fat16 partition on a SD-Card. But I got the "Error reading
cluster" Message from fs/fat/fat.c

=> boot
switch to partitions #0, OK
mmc2 is current device
Error reading cluster
** Unable to read file Image **

=> mmc part
Partition Map for MMC device 2  --   Partition Type: DOS
PartStart SectorNum Sectors UUIDType
  1 16384   266240  d38187c8-01 06
  2 282624  7491584 d38187c8-02 83

After some debugging I end up in blk_dread() from drivers/block/blk-uclass.c

blks_read = ops->read(dev, start, blkcnt, buffer);

here I got blks_read=0 which seems is the cause for the "Error reading cluster"
later in get_cluster().

Here a Debug Trace with some variables printed out:

...
get_fatent() FAT16: entry: 0x595c = 22876, offset: 0x055c = 1372
get_fatent() FAT16: ret: 0x595d, entry: 0x595c, offset: 0x055c
get_cluster() gc - clustnum: 16813, startsect: 134800
blkcache_read() miss: start 24e90, count 48513
blk_dread() dev=fd6ebaa0
blk_dread() start=24e90
blk_dread() blkcnt=48513
blk_dread() buffer=8028
blk_find_device() blk_find_device: if_type=6, devnum=2: us...@5b01.blk, 6, 0
blk_find_device() blk_find_device: if_type=6, devnum=2: us...@5b03.blk, 6, 2
blk_dread() blks_read=0
blk_dread() blkcnt=48513
disk_read() ret=0
disk_read() nr_blocks=48513
get_cluster() Error reading data (got -1) 2
get_cluster() ret=-1
get_cluster() idx=48513
Error reading cluster 2
** Unable to read file Image **


Can somebody help me to find the cause of this problem? Is something
with my fat partion or partition table wrong or do I hit a bug?

Best regards,

Oliver
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[U-Boot] SPL: Unsupported Boot Device!

2019-08-22 Thread Sigitas


Hi all,

I've posted question regarding subject to nxp community, but there was 
an answer that, "uboot-fslc" is community version on uboot not supported 
by nxp".


Link: https://community.nxp.com/thread/510468

I will appreciate any guidelines to solve this problem.

Best

Sigis

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Re: [U-Boot] [PATCH] ARM: vexpress_*_defconfig: replace earlyprintk with earlycon

2019-08-22 Thread Ryan Harkin
On Thu, 22 Aug 2019 at 13:10, Sudeep Holla  wrote:

> On Thu, Aug 22, 2019 at 12:38:31PM +0100, Ryan Harkin wrote:
> > On Thu, 22 Aug 2019 at 02:25, Peng Fan  wrote:
> >
> > > > Subject: [U-Boot] [PATCH] ARM: vexpress_*_defconfig: replace
> earlyprintk
> > > > with earlycon
> > > >
> > > > earlyprintk no longer works on arm64 platforms. Replace it with
> earlycon
> > > > which works fine.
> > > >
> > > > Cc: Ryan Harkin 
> > > > Cc: Liviu Dudau 
> > > > Cc: Linus Walleij 
> > > > Signed-off-by: Sudeep Holla 
> > > > ---
> > > >  configs/vexpress_aemv8a_dram_defconfig | 2 +-
> > > > configs/vexpress_aemv8a_juno_defconfig | 2 +-
> > > > configs/vexpress_aemv8a_semi_defconfig | 2 +-
> > > >  3 files changed, 3 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/configs/vexpress_aemv8a_dram_defconfig
> > > > b/configs/vexpress_aemv8a_dram_defconfig
> > > > index 2ff9e4b9f291..51860da387da 100644
> > > > --- a/configs/vexpress_aemv8a_dram_defconfig
> > > > +++ b/configs/vexpress_aemv8a_dram_defconfig
> > > > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> > > >  CONFIG_DISTRO_DEFAULTS=y
> > > >  CONFIG_BOOTDELAY=1
> > > >  CONFIG_USE_BOOTARGS=y
> > > > -CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c09
> > > > debug user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw
> > > > rootwait loglevel=9"
> > > > +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c09 debug
> > > > user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw rootwait
> > > > loglevel=9"
> > > >  # CONFIG_USE_BOOTCOMMAND is not set
> > > >  # CONFIG_DISPLAY_CPUINFO is not set
> > > >  # CONFIG_DISPLAY_BOARDINFO is not set
> > > > diff --git a/configs/vexpress_aemv8a_juno_defconfig
> > > > b/configs/vexpress_aemv8a_juno_defconfig
> > > > index fd306f9f6bf0..0823d17c1158 100644
> > > > --- a/configs/vexpress_aemv8a_juno_defconfig
> > > > +++ b/configs/vexpress_aemv8a_juno_defconfig
> > > > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> > > >  CONFIG_DISTRO_DEFAULTS=y
> > > >  CONFIG_BOOTDELAY=1
> > > >  CONFIG_USE_BOOTARGS=y
> > > > -CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw
> > > > rootwait earlyprintk=pl011,0x7ff8 debug user_debug=31
> > > > androidboot.hardware=juno loglevel=9"
> > > > +CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw
> > > > rootwait earlycon=pl011,0x7ff8 debug user_debug=31
> > > > androidboot.hardware=juno loglevel=9"
> > > >  # CONFIG_USE_BOOTCOMMAND is not set
> > > >  # CONFIG_DISPLAY_CPUINFO is not set
> > > >  # CONFIG_DISPLAY_BOARDINFO is not set
> > > > diff --git a/configs/vexpress_aemv8a_semi_defconfig
> > > > b/configs/vexpress_aemv8a_semi_defconfig
> > > > index bff52f703836..db5ad3dfa5a4 100644
> > > > --- a/configs/vexpress_aemv8a_semi_defconfig
> > > > +++ b/configs/vexpress_aemv8a_semi_defconfig
> > > > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> > > >  CONFIG_DISTRO_DEFAULTS=y
> > > >  CONFIG_BOOTDELAY=1
> > > >  CONFIG_USE_BOOTARGS=y
> > > > -CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c09
> > > > debug user_debug=31 loglevel=9"
> > > > +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c09 debug
> > > > user_debug=31 loglevel=9"
> > > >  # CONFIG_USE_BOOTCOMMAND is not set
> > > >  # CONFIG_DISPLAY_CPUINFO is not set
> > > >  # CONFIG_DISPLAY_BOARDINFO is not set
> > >
> > > Reviewed-by: Peng Fan 
> > >
> > Reviewed-by: Ryan Harkin 
> >
> > >
> > > Nitpick: this will be no early print when booting older version kernel.
> > >
> >
> > Note also that the -dram platform is no longer used or tested. I'll send
> a
> > patch to remove it.
> >
>
> Ah OK, I was about to try that on FVP but then saw -semihosting one.
> Thanks for the review. I assume you will post on top of my patch or do
> you need me to drop changes in -dram defconfig and post v2 ?
>

It's OK, go ahead with your patch and I'll send mine after it's merged.


>
> --
> Regards,
> Sudeep
>
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Re: [U-Boot] [PATCH] ARM: vexpress_*_defconfig: replace earlyprintk with earlycon

2019-08-22 Thread Sudeep Holla
On Thu, Aug 22, 2019 at 01:25:46AM +, Peng Fan wrote:
> > Subject: [U-Boot] [PATCH] ARM: vexpress_*_defconfig: replace earlyprintk
> > with earlycon
> > 
> > earlyprintk no longer works on arm64 platforms. Replace it with earlycon
> > which works fine.
> > 
> > Cc: Ryan Harkin 
> > Cc: Liviu Dudau 
> > Cc: Linus Walleij 
> > Signed-off-by: Sudeep Holla 
> > ---
> >  configs/vexpress_aemv8a_dram_defconfig | 2 +-
> > configs/vexpress_aemv8a_juno_defconfig | 2 +-
> > configs/vexpress_aemv8a_semi_defconfig | 2 +-
> >  3 files changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/configs/vexpress_aemv8a_dram_defconfig
> > b/configs/vexpress_aemv8a_dram_defconfig
> > index 2ff9e4b9f291..51860da387da 100644
> > --- a/configs/vexpress_aemv8a_dram_defconfig
> > +++ b/configs/vexpress_aemv8a_dram_defconfig
> > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> >  CONFIG_DISTRO_DEFAULTS=y
> >  CONFIG_BOOTDELAY=1
> >  CONFIG_USE_BOOTARGS=y
> > -CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c09
> > debug user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw
> > rootwait loglevel=9"
> > +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c09 debug
> > user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw rootwait
> > loglevel=9"
> >  # CONFIG_USE_BOOTCOMMAND is not set
> >  # CONFIG_DISPLAY_CPUINFO is not set
> >  # CONFIG_DISPLAY_BOARDINFO is not set
> > diff --git a/configs/vexpress_aemv8a_juno_defconfig
> > b/configs/vexpress_aemv8a_juno_defconfig
> > index fd306f9f6bf0..0823d17c1158 100644
> > --- a/configs/vexpress_aemv8a_juno_defconfig
> > +++ b/configs/vexpress_aemv8a_juno_defconfig
> > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> >  CONFIG_DISTRO_DEFAULTS=y
> >  CONFIG_BOOTDELAY=1
> >  CONFIG_USE_BOOTARGS=y
> > -CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw
> > rootwait earlyprintk=pl011,0x7ff8 debug user_debug=31
> > androidboot.hardware=juno loglevel=9"
> > +CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw
> > rootwait earlycon=pl011,0x7ff8 debug user_debug=31
> > androidboot.hardware=juno loglevel=9"
> >  # CONFIG_USE_BOOTCOMMAND is not set
> >  # CONFIG_DISPLAY_CPUINFO is not set
> >  # CONFIG_DISPLAY_BOARDINFO is not set
> > diff --git a/configs/vexpress_aemv8a_semi_defconfig
> > b/configs/vexpress_aemv8a_semi_defconfig
> > index bff52f703836..db5ad3dfa5a4 100644
> > --- a/configs/vexpress_aemv8a_semi_defconfig
> > +++ b/configs/vexpress_aemv8a_semi_defconfig
> > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> >  CONFIG_DISTRO_DEFAULTS=y
> >  CONFIG_BOOTDELAY=1
> >  CONFIG_USE_BOOTARGS=y
> > -CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c09
> > debug user_debug=31 loglevel=9"
> > +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c09 debug
> > user_debug=31 loglevel=9"
> >  # CONFIG_USE_BOOTCOMMAND is not set
> >  # CONFIG_DISPLAY_CPUINFO is not set
> >  # CONFIG_DISPLAY_BOARDINFO is not set
> 
> Reviewed-by: Peng Fan 
> 
> Nitpick: this will be no early print when booting older version kernel.

Indeed, thanks for the review.

--
Regards,
Sudeep
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Re: [U-Boot] [PATCH] ARM: vexpress_*_defconfig: replace earlyprintk with earlycon

2019-08-22 Thread Sudeep Holla
On Thu, Aug 22, 2019 at 12:38:31PM +0100, Ryan Harkin wrote:
> On Thu, 22 Aug 2019 at 02:25, Peng Fan  wrote:
>
> > > Subject: [U-Boot] [PATCH] ARM: vexpress_*_defconfig: replace earlyprintk
> > > with earlycon
> > >
> > > earlyprintk no longer works on arm64 platforms. Replace it with earlycon
> > > which works fine.
> > >
> > > Cc: Ryan Harkin 
> > > Cc: Liviu Dudau 
> > > Cc: Linus Walleij 
> > > Signed-off-by: Sudeep Holla 
> > > ---
> > >  configs/vexpress_aemv8a_dram_defconfig | 2 +-
> > > configs/vexpress_aemv8a_juno_defconfig | 2 +-
> > > configs/vexpress_aemv8a_semi_defconfig | 2 +-
> > >  3 files changed, 3 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/configs/vexpress_aemv8a_dram_defconfig
> > > b/configs/vexpress_aemv8a_dram_defconfig
> > > index 2ff9e4b9f291..51860da387da 100644
> > > --- a/configs/vexpress_aemv8a_dram_defconfig
> > > +++ b/configs/vexpress_aemv8a_dram_defconfig
> > > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> > >  CONFIG_DISTRO_DEFAULTS=y
> > >  CONFIG_BOOTDELAY=1
> > >  CONFIG_USE_BOOTARGS=y
> > > -CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c09
> > > debug user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw
> > > rootwait loglevel=9"
> > > +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c09 debug
> > > user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw rootwait
> > > loglevel=9"
> > >  # CONFIG_USE_BOOTCOMMAND is not set
> > >  # CONFIG_DISPLAY_CPUINFO is not set
> > >  # CONFIG_DISPLAY_BOARDINFO is not set
> > > diff --git a/configs/vexpress_aemv8a_juno_defconfig
> > > b/configs/vexpress_aemv8a_juno_defconfig
> > > index fd306f9f6bf0..0823d17c1158 100644
> > > --- a/configs/vexpress_aemv8a_juno_defconfig
> > > +++ b/configs/vexpress_aemv8a_juno_defconfig
> > > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> > >  CONFIG_DISTRO_DEFAULTS=y
> > >  CONFIG_BOOTDELAY=1
> > >  CONFIG_USE_BOOTARGS=y
> > > -CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw
> > > rootwait earlyprintk=pl011,0x7ff8 debug user_debug=31
> > > androidboot.hardware=juno loglevel=9"
> > > +CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw
> > > rootwait earlycon=pl011,0x7ff8 debug user_debug=31
> > > androidboot.hardware=juno loglevel=9"
> > >  # CONFIG_USE_BOOTCOMMAND is not set
> > >  # CONFIG_DISPLAY_CPUINFO is not set
> > >  # CONFIG_DISPLAY_BOARDINFO is not set
> > > diff --git a/configs/vexpress_aemv8a_semi_defconfig
> > > b/configs/vexpress_aemv8a_semi_defconfig
> > > index bff52f703836..db5ad3dfa5a4 100644
> > > --- a/configs/vexpress_aemv8a_semi_defconfig
> > > +++ b/configs/vexpress_aemv8a_semi_defconfig
> > > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> > >  CONFIG_DISTRO_DEFAULTS=y
> > >  CONFIG_BOOTDELAY=1
> > >  CONFIG_USE_BOOTARGS=y
> > > -CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c09
> > > debug user_debug=31 loglevel=9"
> > > +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c09 debug
> > > user_debug=31 loglevel=9"
> > >  # CONFIG_USE_BOOTCOMMAND is not set
> > >  # CONFIG_DISPLAY_CPUINFO is not set
> > >  # CONFIG_DISPLAY_BOARDINFO is not set
> >
> > Reviewed-by: Peng Fan 
> >
> Reviewed-by: Ryan Harkin 
>
> >
> > Nitpick: this will be no early print when booting older version kernel.
> >
>
> Note also that the -dram platform is no longer used or tested. I'll send a
> patch to remove it.
>

Ah OK, I was about to try that on FVP but then saw -semihosting one.
Thanks for the review. I assume you will post on top of my patch or do
you need me to drop changes in -dram defconfig and post v2 ?

--
Regards,
Sudeep
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Re: [U-Boot] [PATCH] ARM: vexpress_*_defconfig: replace earlyprintk with earlycon

2019-08-22 Thread Ryan Harkin
On Thu, 22 Aug 2019 at 02:25, Peng Fan  wrote:

> > Subject: [U-Boot] [PATCH] ARM: vexpress_*_defconfig: replace earlyprintk
> > with earlycon
> >
> > earlyprintk no longer works on arm64 platforms. Replace it with earlycon
> > which works fine.
> >
> > Cc: Ryan Harkin 
> > Cc: Liviu Dudau 
> > Cc: Linus Walleij 
> > Signed-off-by: Sudeep Holla 
> > ---
> >  configs/vexpress_aemv8a_dram_defconfig | 2 +-
> > configs/vexpress_aemv8a_juno_defconfig | 2 +-
> > configs/vexpress_aemv8a_semi_defconfig | 2 +-
> >  3 files changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/configs/vexpress_aemv8a_dram_defconfig
> > b/configs/vexpress_aemv8a_dram_defconfig
> > index 2ff9e4b9f291..51860da387da 100644
> > --- a/configs/vexpress_aemv8a_dram_defconfig
> > +++ b/configs/vexpress_aemv8a_dram_defconfig
> > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> >  CONFIG_DISTRO_DEFAULTS=y
> >  CONFIG_BOOTDELAY=1
> >  CONFIG_USE_BOOTARGS=y
> > -CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c09
> > debug user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw
> > rootwait loglevel=9"
> > +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c09 debug
> > user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw rootwait
> > loglevel=9"
> >  # CONFIG_USE_BOOTCOMMAND is not set
> >  # CONFIG_DISPLAY_CPUINFO is not set
> >  # CONFIG_DISPLAY_BOARDINFO is not set
> > diff --git a/configs/vexpress_aemv8a_juno_defconfig
> > b/configs/vexpress_aemv8a_juno_defconfig
> > index fd306f9f6bf0..0823d17c1158 100644
> > --- a/configs/vexpress_aemv8a_juno_defconfig
> > +++ b/configs/vexpress_aemv8a_juno_defconfig
> > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> >  CONFIG_DISTRO_DEFAULTS=y
> >  CONFIG_BOOTDELAY=1
> >  CONFIG_USE_BOOTARGS=y
> > -CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw
> > rootwait earlyprintk=pl011,0x7ff8 debug user_debug=31
> > androidboot.hardware=juno loglevel=9"
> > +CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw
> > rootwait earlycon=pl011,0x7ff8 debug user_debug=31
> > androidboot.hardware=juno loglevel=9"
> >  # CONFIG_USE_BOOTCOMMAND is not set
> >  # CONFIG_DISPLAY_CPUINFO is not set
> >  # CONFIG_DISPLAY_BOARDINFO is not set
> > diff --git a/configs/vexpress_aemv8a_semi_defconfig
> > b/configs/vexpress_aemv8a_semi_defconfig
> > index bff52f703836..db5ad3dfa5a4 100644
> > --- a/configs/vexpress_aemv8a_semi_defconfig
> > +++ b/configs/vexpress_aemv8a_semi_defconfig
> > @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" vexpress_aemv8a"
> >  CONFIG_DISTRO_DEFAULTS=y
> >  CONFIG_BOOTDELAY=1
> >  CONFIG_USE_BOOTARGS=y
> > -CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c09
> > debug user_debug=31 loglevel=9"
> > +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c09 debug
> > user_debug=31 loglevel=9"
> >  # CONFIG_USE_BOOTCOMMAND is not set
> >  # CONFIG_DISPLAY_CPUINFO is not set
> >  # CONFIG_DISPLAY_BOARDINFO is not set
>
> Reviewed-by: Peng Fan 
>
Reviewed-by: Ryan Harkin 


>
> Nitpick: this will be no early print when booting older version kernel.
>

Note also that the -dram platform is no longer used or tested. I'll send a
patch to remove it.


> > --
> > 2.17.1
> >
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> >
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.d
> > enx.de%2Flistinfo%2Fu-bootdata=02%7C01%7CPeng.Fan%40nxp.com
> > %7C527db1f88898493ad3a708d7265d2df8%7C686ea1d3bc2b4c6fa92cd99c5
> > c301635%7C0%7C0%7C637020053985296717sdata=eTWujuzFpTwWil
> > xc%2F7W7I7t8UQirTZ%2BE8MWkFGsdzrk%3Dreserved=0
> ___
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Re: [U-Boot] [PATCH v1] pci: add DM based mpc85xx driver

2019-08-22 Thread Prabhakar Kushwaha
Dear Zhiqiang 

> -Original Message-
> From: Heiko Schocher 
> Sent: Tuesday, July 16, 2019 9:06 AM
> To: u-boot@lists.denx.de
> Cc: Heiko Schocher ; Alexander Graf ;
> Andrew F. Davis ; Xiaowei Bao ; Bin
> Meng ; Eugen Hristev
> ; Heinrich Schuchardt
> ; Horatiu Vultur ;
> Z.q. Hou ; Krzysztof Kozlowski ;
> Liviu Dudau ; Marek Vasut
> ; Mario Six ; Michal Simek
> ; Neil Armstrong ;
> Prabhakar Kushwaha ; Ryder Lee
> ; Simon Glass ; Stefan
> Roese 
> Subject: [PATCH v1] pci: add DM based mpc85xx driver
> 
> add DM based PCI Configuration space access support for MPC85xx PCI
> Bridge
> 
> Signed-off-by: Heiko Schocher 
> 
> ---

Can you please review this patch 

--pk
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Re: [U-Boot] [PATCH v1] ddr, fsl: add DM_I2C support

2019-08-22 Thread Prabhakar Kushwaha
Dear Heiko,


> -Original Message-
> From: U-Boot  On Behalf Of Heiko Schocher
> Sent: Tuesday, July 16, 2019 9:29 AM
> To: u-boot@lists.denx.de
> Cc: York Sun 
> Subject: [U-Boot] [PATCH v1] ddr, fsl: add DM_I2C support
> 
> add DM_I2C support for this driver.
> 
> Signed-off-by: Heiko Schocher 
> 
> ---
> 
> Did not fixed checkpatch warning:
> 
> CHECK: Prefer kernel type 'u8' over 'uint8_t'
> +   uint8_t buf = 0;
> 
> Travis build, see:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftravis
> -ci.org%2Fhsdenx%2Fu-boot-
> test%2Fbuilds%2F558858904data=02%7C01%7Cprabhakar.kushwaha%
> 40nxp.com%7C2c5f1ecc6ff9417a8ccb08d709a20297%7C686ea1d3bc2b4c6fa92
> cd99c5c301635%7C0%7C0%7C636988463754459178sdata=H%2FkQV%2
> Bavu2EfajG3El5M%2FsKyuSPO6Nn0QRMVpzsvsUY%3Dreserved=0
> 
>  drivers/ddr/fsl/main.c | 88 --
> 

How you tested both NXP's powerpc and ARM platforms as fsl i2c is yet to move 
to DM model?
Or my understanding is wrong. 

--pk
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[U-Boot] [PATCH 2/2] mmc: sdhci: Add support for dt caps & caps mask

2019-08-22 Thread Michal Simek
From: T Karthik Reddy 

The sdhci capabilities registers can be incorrect. The
sdhci-caps-mask and sdhci-caps dt properties specify which bits of
the registers are incorrect and what their values should be. This
patch makes the sdhci driver use those properties to correct the caps.
Also use "dev_read_u64_default" instead of "dev_read_u32_array" for
caps mask.

Signed-off-by: T Karthik Reddy 
Signed-off-by: Michal Simek 
---

 drivers/mmc/sdhci.c | 23 ++-
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 2779bca93f08..fbc576fd726e 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -711,17 +711,19 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct 
sdhci_host *host,
 {
u32 caps, caps_1 = 0;
 #if CONFIG_IS_ENABLED(DM_MMC)
-   u32 mask[2] = {0};
-   int ret;
-   ret = dev_read_u32_array(host->mmc->dev, "sdhci-caps-mask",
-mask, 2);
-   if (ret && ret != -1)
-   return ret;
-
-   caps = ~mask[1] & sdhci_readl(host, SDHCI_CAPABILITIES);
+   u64 dt_caps, dt_caps_mask;
+
+   dt_caps_mask = dev_read_u64_default(host->mmc->dev,
+   "sdhci-caps-mask", 0);
+   dt_caps = dev_read_u64_default(host->mmc->dev,
+  "sdhci-caps", 0);
+   caps = ~(u32)dt_caps_mask &
+  sdhci_readl(host, SDHCI_CAPABILITIES);
+   caps |= (u32)dt_caps;
 #else
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
 #endif
+   debug("%s, caps: 0x%x\n", __func__, caps);
 
 #ifdef CONFIG_MMC_SDHCI_SDMA
if (!(caps & SDHCI_CAN_DO_SDMA)) {
@@ -762,10 +764,13 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct 
sdhci_host *host,
/* Check whether the clock multiplier is supported or not */
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
 #if CONFIG_IS_ENABLED(DM_MMC)
-   caps_1 = ~mask[0] & sdhci_readl(host, SDHCI_CAPABILITIES_1);
+   caps_1 = ~(u32)(dt_caps_mask >> 32) &
+sdhci_readl(host, SDHCI_CAPABILITIES_1);
+   caps_1 |= (u32)(dt_caps >> 32);
 #else
caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
 #endif
+   debug("%s, caps_1: 0x%x\n", __func__, caps_1);
host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
SDHCI_CLOCK_MUL_SHIFT;
}
-- 
2.17.1

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[U-Boot] [PATCH 1/2] dm: core: Add functions to read 64-bit dt properties

2019-08-22 Thread Michal Simek
From: T Karthik Reddy 

This patch adds functions dev_read_u64_default & dev_read_u64
to read unsigned 64-bit values from devicetree.

Signed-off-by: T Karthik Reddy 
Signed-off-by: Michal Simek 
---

 drivers/core/ofnode.c |  2 +-
 drivers/core/read.c   | 10 ++
 include/dm/ofnode.h   |  2 +-
 include/dm/read.h | 32 
 4 files changed, 44 insertions(+), 2 deletions(-)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index e74a662d1d30..7eca00cd6613 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -79,7 +79,7 @@ int ofnode_read_u64(ofnode node, const char *propname, u64 
*outp)
return 0;
 }
 
-int ofnode_read_u64_default(ofnode node, const char *propname, u64 def)
+u64 ofnode_read_u64_default(ofnode node, const char *propname, u64 def)
 {
assert(ofnode_valid(node));
ofnode_read_u64(node, propname, );
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 8b5502de1159..5dd2ddca70e8 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -11,6 +11,16 @@
 #include 
 #include 
 
+int dev_read_u64(struct udevice *dev, const char *propname, u64 *outp)
+{
+   return ofnode_read_u64(dev_ofnode(dev), propname, outp);
+}
+
+u64 dev_read_u64_default(struct udevice *dev, const char *propname, u64 def)
+{
+   return ofnode_read_u64_default(dev_ofnode(dev), propname, def);
+}
+
 int dev_read_u32(struct udevice *dev, const char *propname, u32 *outp)
 {
return ofnode_read_u32(dev_ofnode(dev), propname, outp);
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 4f89db44c19e..5c4cbf099869 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -254,7 +254,7 @@ int ofnode_read_u64(ofnode node, const char *propname, u64 
*outp);
  * @def:   default value to return if the property has no value
  * @return property value, or @def if not found
  */
-int ofnode_read_u64_default(ofnode node, const char *propname, u64 def);
+u64 ofnode_read_u64_default(ofnode node, const char *propname, u64 def);
 
 /**
  * ofnode_read_string() - Read a string from a property
diff --git a/include/dm/read.h b/include/dm/read.h
index 0c62d62f1148..8985f248c68f 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -44,6 +44,26 @@ static inline bool dev_of_valid(struct udevice *dev)
 }
 
 #ifndef CONFIG_DM_DEV_READ_INLINE
+/**
+ * dev_read_u64() - read a 64-bit integer from a device's DT property
+ *
+ * @dev:device to read DT property from
+ * @propname:   name of the property to read from
+ * @outp:   place to put value (if found)
+ * @return 0 if OK, -ve on error
+ */
+int dev_read_u64(struct udevice *dev, const char *propname, u64 *outp);
+
+/**
+ * dev_read_u64_default() - read a 64-bit integer from a device's DT property
+ *
+ * @dev:device to read DT property from
+ * @propname:   name of the property to read from
+ * @def:default value to return if the property has no value
+ * @return property value, or @def if not found
+ */
+u64 dev_read_u64_default(struct udevice *dev, const char *propname, u64 def);
+
 /**
  * dev_read_u32() - read a 32-bit integer from a device's DT property
  *
@@ -563,6 +583,18 @@ int dev_read_alias_highest_id(const char *stem);
 
 #else /* CONFIG_DM_DEV_READ_INLINE is enabled */
 
+static inline int dev_read_u64(struct udevice *dev,
+  const char *propname, u64 *outp)
+{
+   return ofnode_read_u64(dev_ofnode(dev), propname, outp);
+}
+
+static inline u64 dev_read_u64_default(struct udevice *dev,
+  const char *propname, u64 def)
+{
+   return ofnode_read_u64_default(dev_ofnode(dev), propname, def);
+}
+
 static inline int dev_read_u32(struct udevice *dev,
   const char *propname, u32 *outp)
 {
-- 
2.17.1

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[U-Boot] [PATCH 0/2] Add sdhci dt caps & caps mask support

2019-08-22 Thread Michal Simek
Hi,

This patch series adds support for reading 64-bit dt properties & add
support sdhci dt caps & caps mask.

Thanks,
Michal


T Karthik Reddy (2):
  dm: core: Add functions to read 64-bit dt properties
  mmc: sdhci: Add support for dt caps & caps mask

 drivers/core/ofnode.c |  2 +-
 drivers/core/read.c   | 10 ++
 drivers/mmc/sdhci.c   | 23 ++-
 include/dm/ofnode.h   |  2 +-
 include/dm/read.h | 32 
 5 files changed, 58 insertions(+), 11 deletions(-)

-- 
2.17.1

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Re: [U-Boot] [PATCH v2] net/macb: increase RX buffer size for GEM

2019-08-22 Thread Ramon Fried


On August 22, 2019 12:38:08 PM GMT+03:00, Stefan Roese  
wrote:
>Hi Ramon,
>
>On 14.07.19 17:25, Ramon Fried wrote:
>> Macb Ethernet controller requires a RX buffer of 128 bytes. It is
>> highly sub-optimal for Gigabit-capable GEM that is able to use
>> a bigger DMA buffer. Change this constant and associated macros
>> with data stored in the private structure.
>> RX DMA buffer size has to be multiple of 64 bytes as indicated in
>> DMA Configuration Register specification.
>> 
>> Signed-off-by: Ramon Fried 
>
>This patch breaks ethernet on my AT91SAM9G25 based board. With this
>patch now, tftp does not complete the xfer any more:
>
>=> tftp 2100 big
>ethernet@f802c000: PHY present at 1
>ethernet@f802c000: Starting autonegotiation...
>ethernet@f802c000: Autonegotiation complete
>ethernet@f802c000: link up, 100Mbps full-duplex (lpa: 0xc5e1)
>Using ethernet@f802c000 device
>TFTP from server 192.168.1.5; our IP address is 192.168.1.249
>Filename 'big'.
>Load address: 0x2100
>Loading: #T T
>
>With this patch reverted (as well as with v2019.07), tftp works
>just fine.
>
>I did not look into the patch yet. Perhaps you have a quick idea
>on why this breaks my platform.
>
>BTW: When I disable the dcache (dcache off), tftp also works fine
>with this patch. So its definitely something cache / dma related.
>
Thanks for letting me know, I'll be next to a PC tomorrow, I'll look into it. 
Thanks, 
Ramon 
>Thanks,
>Stefan
>
>> ---
>> v2: Fix multi-line comment style
>>   drivers/net/macb.c | 30 ++
>>   1 file changed, 22 insertions(+), 8 deletions(-)
>> 
>> diff --git a/drivers/net/macb.c b/drivers/net/macb.c
>> index c072f99d8f..3c8b9722b3 100644
>> --- a/drivers/net/macb.c
>> +++ b/drivers/net/macb.c
>> @@ -45,10 +45,17 @@
>>   
>>   DECLARE_GLOBAL_DATA_PTR;
>>   
>> -#define MACB_RX_BUFFER_SIZE 4096
>> -#define MACB_RX_RING_SIZE   (MACB_RX_BUFFER_SIZE / 128)
>> +/*
>> + * These buffer sizes must be power of 2 and divisible
>> + * by RX_BUFFER_MULTIPLE
>> + */
>> +#define MACB_RX_BUFFER_SIZE 128
>> +#define GEM_RX_BUFFER_SIZE  2048
>>   #define RX_BUFFER_MULTIPLE 64
>> +
>> +#define MACB_RX_RING_SIZE   32
>>   #define MACB_TX_RING_SIZE  16
>> +
>>   #define MACB_TX_TIMEOUT1000
>>   #define MACB_AUTONEG_TIMEOUT   500
>>   
>> @@ -95,6 +102,7 @@ struct macb_device {
>>  void*tx_buffer;
>>  struct macb_dma_desc*rx_ring;
>>  struct macb_dma_desc*tx_ring;
>> +size_t  rx_buffer_size;
>>   
>>  unsigned long   rx_buffer_dma;
>>  unsigned long   rx_ring_dma;
>> @@ -395,15 +403,16 @@ static int _macb_recv(struct macb_device *macb,
>uchar **packetp)
>>  }
>>   
>>  if (status & MACB_BIT(RX_EOF)) {
>> -buffer = macb->rx_buffer + 128 * macb->rx_tail;
>> +buffer = macb->rx_buffer +
>> +macb->rx_buffer_size * macb->rx_tail;
>>  length = status & RXBUF_FRMLEN_MASK;
>>   
>>  macb_invalidate_rx_buffer(macb);
>>  if (macb->wrapped) {
>>  unsigned int headlen, taillen;
>>   
>> -headlen = 128 * (MACB_RX_RING_SIZE
>> - - macb->rx_tail);
>> +headlen = macb->rx_buffer_size *
>> +(MACB_RX_RING_SIZE - macb->rx_tail);
>>  taillen = length - headlen;
>>  memcpy((void *)net_rx_packets[0],
>> buffer, headlen);
>> @@ -701,7 +710,7 @@ static void gmac_configure_dma(struct macb_device
>*macb)
>>  u32 buffer_size;
>>  u32 dmacfg;
>>   
>> -buffer_size = 128 / RX_BUFFER_MULTIPLE;
>> +buffer_size = macb->rx_buffer_size / RX_BUFFER_MULTIPLE;
>>  dmacfg = gem_readl(macb, DMACFG) & ~GEM_BF(RXBS, -1L);
>>  dmacfg |= GEM_BF(RXBS, buffer_size);
>>   
>> @@ -746,7 +755,7 @@ static int _macb_init(struct macb_device *macb,
>const char *name)
>>  paddr |= MACB_BIT(RX_WRAP);
>>  macb->rx_ring[i].addr = paddr;
>>  macb->rx_ring[i].ctrl = 0;
>> -paddr += 128;
>> +paddr += macb->rx_buffer_size;
>>  }
>>  macb_flush_ring_desc(macb, RX);
>>  macb_flush_rx_buffer(macb);
>> @@ -957,8 +966,13 @@ static void _macb_eth_initialize(struct
>macb_device *macb)
>>  int id = 0; /* This is not used by functions we call */
>>  u32 ncfgr;
>>   
>> +if (macb_is_gem(macb))
>> +macb->rx_buffer_size = GEM_RX_BUFFER_SIZE;
>> +else
>> +macb->rx_buffer_size = MACB_RX_BUFFER_SIZE;
>> +
>>  /* TODO: we need check the rx/tx_ring_dma is dcache line aligned
>*/
>> -macb->rx_buffer = dma_alloc_coherent(MACB_RX_BUFFER_SIZE,
>> +macb->rx_buffer 

Re: [U-Boot] [PATCH] efi_loader: disk: install file system protocol to a whole disk

2019-08-22 Thread Heinrich Schuchardt

On 8/22/19 11:11 AM, Mark Kettenis wrote:

From: AKASHI Takahiro 
Date: Thu, 22 Aug 2019 17:06:25 +0900

Currently, a whole disk without any partitions is not associated
with EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. So even if it houses FAT
file system, there is a chance that we may not be able to access
it, particularly, when accesses are to be attempted after searching
that protocol against a device handle.

With this patch, EFI_SIMPLE_FILE_SYSTEM_PROTOCOL is installed
to such a disk if part_get_info() shows there is not partition
table installed on it.


Do other UEFI implementations support this?


What use cases exist that come without partition table?

You can create an MBR with partition table that is a valid start of a
file system.

So you should first check if a partition table exists. Only if none
exists you can test for a possible file system.

Best regards

Heinrich




Signed-off-by: AKASHI Takahiro 
---
  lib/efi_loader/efi_disk.c | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 7a6b06821a47..548fe667e6f8 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -239,6 +239,7 @@ static efi_status_t efi_disk_add_dev(
struct efi_disk_obj **disk)
  {
struct efi_disk_obj *diskobj;
+   disk_partition_t info;
efi_status_t ret;

/* Don't add empty devices */
@@ -270,7 +271,8 @@ static efi_status_t efi_disk_add_dev(
   diskobj->dp);
if (ret != EFI_SUCCESS)
return ret;
-   if (part >= 1) {
+   /* partitions or whole disk without partitions */
+   if (part >= 1 || part_get_info(desc, part, )) {
diskobj->volume = efi_simple_file_system(desc, part,
 diskobj->dp);
ret = efi_add_protocol(>header,
--
2.21.0

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[U-Boot] [PATCH] mtd: nand: raw: Move CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig

2019-08-22 Thread Stefan Roese
Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs,
headers and whitelist.

Please note that this symbol already was used in Kconfig
(imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was
not available in Kconfig. This changes now with this patch and all
boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what
I also need on my GARDENA AT91SAM based board.

Signed-off-by: Stefan Roese 
Cc: Eugen Hristev 
Cc: Miquel Raynal 
Cc: Gregory CLEMENT 
---
 configs/colibri-imx6ull_defconfig| 1 +
 configs/da850evm_nand_defconfig  | 1 +
 configs/db-88f6820-amc_defconfig | 1 +
 configs/db-mv784mp-gp_defconfig  | 1 +
 configs/db-xc3-24g4xg_defconfig  | 1 +
 configs/devkit3250_defconfig | 1 +
 configs/imx6q_logic_defconfig| 1 +
 configs/k2e_evm_defconfig| 1 +
 configs/k2e_hs_evm_defconfig | 1 +
 configs/k2g_evm_defconfig| 1 +
 configs/k2g_hs_evm_defconfig | 1 +
 configs/k2hk_evm_defconfig   | 1 +
 configs/k2hk_hs_evm_defconfig| 1 +
 configs/k2l_evm_defconfig| 1 +
 configs/k2l_hs_evm_defconfig | 1 +
 configs/m53menlo_defconfig   | 1 +
 configs/mx53ard_defconfig| 1 +
 configs/omapl138_lcdk_defconfig  | 2 +-
 configs/pcm058_defconfig | 1 +
 configs/x530_defconfig   | 1 +
 drivers/mtd/nand/raw/Kconfig | 5 +
 include/configs/colibri-imx6ull.h| 1 -
 include/configs/da850evm.h   | 1 -
 include/configs/db-88f6820-amc.h | 1 -
 include/configs/db-mv784mp-gp.h  | 1 -
 include/configs/db-xc3-24g4xg.h  | 1 -
 include/configs/devkit3250.h | 1 -
 include/configs/imx6_logic.h | 1 -
 include/configs/m53menlo.h   | 1 -
 include/configs/mvebu_armada-8k.h| 1 -
 include/configs/mx53ard.h| 1 -
 include/configs/omapl138_lcdk.h  | 1 -
 include/configs/pcm058.h | 1 -
 include/configs/ti_armv7_keystone2.h | 1 -
 include/configs/x530.h   | 2 --
 scripts/config_whitelist.txt | 1 -
 36 files changed, 25 insertions(+), 17 deletions(-)

diff --git a/configs/colibri-imx6ull_defconfig 
b/configs/colibri-imx6ull_defconfig
index e184223773..6fa1f18989 100644
--- a/configs/colibri-imx6ull_defconfig
+++ b/configs/colibri-imx6ull_defconfig
@@ -55,6 +55,7 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC_IMX=y
 CONFIG_MTD=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_MXS=y
 CONFIG_NAND_MXS_DT=y
 CONFIG_MTD_UBI_FASTMAP=y
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
index 0ad4b66991..77c502688b 100644
--- a/configs/da850evm_nand_defconfig
+++ b/configs/da850evm_nand_defconfig
@@ -51,6 +51,7 @@ CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_MTD=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index 38d519237f..6bff375586 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -55,6 +55,7 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_MVTWSI=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_PXA3XX=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 5654fd7b44..d3f70cfdc5 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -51,6 +51,7 @@ CONFIG_SATA_MV=y
 CONFIG_BLK=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_PXA3XX=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig
index 3a311ebdf2..f2e17053ce 100644
--- a/configs/db-xc3-24g4xg_defconfig
+++ b/configs/db-xc3-24g4xg_defconfig
@@ -37,6 +37,7 @@ CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_MTD=y
 CONFIG_MTD_DEVICE=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_PXA3XX=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SFDP_SUPPORT=y
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index a47cf02b8f..0171d8385f 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -37,6 +37,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_LPC32XX_SLC=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_PHYLIB=y
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index 290e1a7558..848b51b940 100644
--- a/configs/imx6q_logic_defconfig
+++ b/configs/imx6q_logic_defconfig
@@ -70,6 +70,7 @@ CONFIG_LED_GPIO=y
 CONFIG_FSL_ESDHC_IMX=y
 CONFIG_MTD=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_MXS=y
 CONFIG_NAND_MXS_DT=y
 CONFIG_PHYLIB=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index 78864f2419..40bebf97e0 100644
--- a/configs/k2e_evm_defconfig
+++ 

[U-Boot] [PATCH v4 8/8] ata: ahci: Don't forget to clear upper address regs.

2019-08-22 Thread Frank Wunderlich
From: Oleksandr Rybalko 

In 32bits mode upper bits need to be set to 0, otherwise controller will
try to DMA into not existing memory and stops with error.

Tested-by: Frank Wunderlich 
Signed-off-by: Frank Wunderlich 
Signed-off-by: Oleksandr Rybalko 
---
changes since v3: fix build warning on x86_64
changes since v2: none
---
 drivers/ata/ahci.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index e3135bb75f..3d782b0944 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -548,6 +548,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 
port)
 {
struct ahci_ioports *pp = &(uc_priv->port[port]);
void __iomem *port_mmio = pp->port_mmio;
+   u64 dma_addr;
u32 port_status;
void __iomem *mem;
 
@@ -593,10 +594,12 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, 
u8 port)
pp->cmd_tbl_sg =
(struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem);
 
-   writel_with_flush((unsigned long)pp->cmd_slot,
- port_mmio + PORT_LST_ADDR);
-
-   writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
+   dma_addr = (ulong)pp->cmd_slot;
+   writel_with_flush(dma_addr, port_mmio + PORT_LST_ADDR);
+   writel_with_flush(dma_addr >> 32, port_mmio + PORT_LST_ADDR_HI);
+   dma_addr = (ulong)pp->rx_fis;
+   writel_with_flush(dma_addr, port_mmio + PORT_FIS_ADDR);
+   writel_with_flush(dma_addr >> 32, port_mmio + PORT_FIS_ADDR_HI);
 
 #ifdef CONFIG_SUNXI_AHCI
sunxi_dma_init(port_mmio);
-- 
2.17.1

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[U-Boot] [PATCH v4 7/8] ahci-pci: ASM1061 report wrong class, but support AHCI.

2019-08-22 Thread Frank Wunderlich
From: Oleksandr Rybalko 

Tested-by: Frank Wunderlich 
Signed-off-by: Frank Wunderlich 
Signed-off-by: Oleksandr Rybalko 
---
changes since v3: none
changes since v2: none
---
 drivers/ata/ahci-pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/ata/ahci-pci.c b/drivers/ata/ahci-pci.c
index 1ca439d3fa..11ec98b56f 100644
--- a/drivers/ata/ahci-pci.c
+++ b/drivers/ata/ahci-pci.c
@@ -35,6 +35,7 @@ U_BOOT_DRIVER(ahci_pci) = {
 
 static struct pci_device_id ahci_pci_supported[] = {
{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_SATA_AHCI, ~0) },
+   { PCI_DEVICE(0x1b21, 0x0611) },
{},
 };
 
-- 
2.17.1

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[U-Boot] [PATCH v4 5/8] dt-bindings: pcie: add a document for MT7623 PCIe controller

2019-08-22 Thread Frank Wunderlich
From: Ryder Lee 

This adds a document for MT7623 PCIe controller.

Signed-off-by: Ryder Lee 
Signed-off-by: Frank Wunderlich 
---
changes since v3: none
changes since v2: dt-bindings added with v3
---
 .../pci/mediatek-pcie.txt | 122 ++
 1 file changed, 122 insertions(+)
 create mode 100644 doc/device-tree-bindings/pci/mediatek-pcie.txt

diff --git a/doc/device-tree-bindings/pci/mediatek-pcie.txt 
b/doc/device-tree-bindings/pci/mediatek-pcie.txt
new file mode 100644
index 00..2f9f549b7a
--- /dev/null
+++ b/doc/device-tree-bindings/pci/mediatek-pcie.txt
@@ -0,0 +1,122 @@
+MediaTek Gen2 PCIe controller
+
+Required properties:
+- compatible: Should contain one of the following strings:
+   "mediatek,mt7623-pcie"
+- device_type: Must be "pci"
+- reg: Base addresses and lengths of the PCIe subsys and root ports.
+- reg-names: Names of the above areas to use during resource lookup.
+- #address-cells: Address representation for root ports (must be 3)
+- #size-cells: Size representation for root ports (must be 2)
+- clocks: Must contain an entry for each entry in clock-names.
+- clock-names:
+  Mandatory entries:
+   - sys_ckN :transaction layer and data link layer clock
+  Required entries for MT7623:
+   - free_ck :for reference clock of PCIe subsys
+  where N starting from 0 to one less than the number of root ports.
+- phys: List of PHY specifiers (used by generic PHY framework).
+- phy-names : Must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
+  number of PHYs as specified in *phys* property.
+- power-domains: A phandle and power domain specifier pair to the power domain
+  which is responsible for collapsing and restoring power to the peripheral.
+- bus-range: Range of bus numbers associated with this controller.
+- ranges: Ranges for the PCI memory and I/O regions.
+
+Required properties for MT7623:
+- #interrupt-cells: Size representation for interrupts (must be 1)
+- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
+  Please refer to the standard PCI bus binding document for a more detailed
+  explanation.
+- resets: Must contain an entry for each entry in reset-names.
+- reset-names: Must be "pcie-rst0", "pcie-rst1", "pcie-rstN".. based on the
+  number of root ports.
+
+In addition, the device tree node must have sub-nodes describing each
+PCIe port interface, having the following mandatory properties:
+
+Required properties:
+- device_type: Must be "pci"
+- reg: Only the first four bytes are used to refer to the correct bus number
+  and device number.
+- #address-cells: Must be 3
+- #size-cells: Must be 2
+- #interrupt-cells: Must be 1
+- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
+  Please refer to the standard PCI bus binding document for a more detailed
+  explanation.
+- ranges: Sub-ranges distributed from the PCIe controller node. An empty
+  property is sufficient.
+
+Examples for MT7623:
+
+   hifsys: syscon@1a00 {
+   compatible = "mediatek,mt7623-hifsys",
+"syscon";
+   reg = <0x1a00 0x1000>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+
+   pcie: pcie@1a14 {
+   compatible = "mediatek,mt7623-pcie";
+   device_type = "pci";
+   reg = <0x1a14 0x1000>, /* PCIe shared registers */
+ <0x1a142000 0x1000>, /* Port0 registers */
+ <0x1a143000 0x1000>, /* Port1 registers */
+ <0x1a144000 0x1000>; /* Port2 registers */
+   reg-names = "subsys", "port0", "port1", "port2";
+   #address-cells = <3>;
+   #size-cells = <2>;
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0xf800 0 0 0>;
+   interrupt-map = <0x 0 0 0  GIC_SPI 193 
IRQ_TYPE_LEVEL_LOW>,
+   <0x0800 0 0 0  GIC_SPI 194 
IRQ_TYPE_LEVEL_LOW>,
+   <0x1000 0 0 0  GIC_SPI 195 
IRQ_TYPE_LEVEL_LOW>;
+   clocks = < CLK_TOP_ETHIF_SEL>,
+< CLK_HIFSYS_PCIE0>,
+< CLK_HIFSYS_PCIE1>,
+< CLK_HIFSYS_PCIE2>;
+   clock-names = "free_ck", "sys_ck0", "sys_ck1", "sys_ck2";
+   resets = < HIFSYS_PCIE0_RST>,
+< HIFSYS_PCIE1_RST>,
+< HIFSYS_PCIE2_RST>;
+   reset-names = "pcie-rst0", "pcie-rst1", "pcie-rst2";
+   phys = <_phy PHY_TYPE_PCIE>, <_phy PHY_TYPE_PCIE>,
+  <_phy PHY_TYPE_PCIE>;
+   phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
+   power-domains = < MT7623_POWER_DOMAIN_HIF>;
+   bus-range = <0x00 0xff>;
+   ranges = <0x8100 0 0x1a16 0x1a16 0 0x0001   
/* I/O space */
+ 0x8300 0 0x6000 0x6000 0 

[U-Boot] [PATCH v4 4/8] arm: dts: split mtk-reset.h into per-chip header

2019-08-22 Thread Frank Wunderlich
From: Ryder Lee 

This follows the linux header rules to avoid conflict bitfields.

Tested-by: Frank Wunderlich 
Signed-off-by: Ryder Lee 
Signed-off-by: Frank Wunderlich 
---
changes since v3: none
changes since v2: none
---
 arch/arm/dts/mt7623.dtsi  |  2 +-
 arch/arm/dts/mt7629.dtsi  |  2 +-
 .../reset/{mtk-reset.h => mt7623-reset.h} |  4 +--
 include/dt-bindings/reset/mt7629-reset.h  | 36 +++
 4 files changed, 39 insertions(+), 5 deletions(-)
 rename include/dt-bindings/reset/{mtk-reset.h => mt7623-reset.h} (88%)
 create mode 100644 include/dt-bindings/reset/mt7629-reset.h

diff --git a/arch/arm/dts/mt7623.dtsi b/arch/arm/dts/mt7623.dtsi
index 3a868ea2ee..1135b1e1ae 100644
--- a/arch/arm/dts/mt7623.dtsi
+++ b/arch/arm/dts/mt7623.dtsi
@@ -11,7 +11,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include "skeleton.dtsi"
 
 / {
diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi
index ecbd29d7ae..3c9eab9770 100644
--- a/arch/arm/dts/mt7629.dtsi
+++ b/arch/arm/dts/mt7629.dtsi
@@ -10,7 +10,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include "skeleton.dtsi"
 
 / {
diff --git a/include/dt-bindings/reset/mtk-reset.h 
b/include/dt-bindings/reset/mt7623-reset.h
similarity index 88%
rename from include/dt-bindings/reset/mtk-reset.h
rename to include/dt-bindings/reset/mt7623-reset.h
index 78fcdab009..a859a5b26a 100644
--- a/include/dt-bindings/reset/mtk-reset.h
+++ b/include/dt-bindings/reset/mt7623-reset.h
@@ -6,11 +6,9 @@
 #ifndef _DT_BINDINGS_MTK_RESET_H_
 #define _DT_BINDINGS_MTK_RESET_H_
 
-/* ETHSYS */
+/* ETHSYS resets */
 #define ETHSYS_PPE_RST 31
-#define ETHSYS_EPHY_RST24
 #define ETHSYS_GMAC_RST23
-#define ETHSYS_ESW_RST 16
 #define ETHSYS_FE_RST  6
 #define ETHSYS_MCM_RST 2
 #define ETHSYS_SYS_RST 0
diff --git a/include/dt-bindings/reset/mt7629-reset.h 
b/include/dt-bindings/reset/mt7629-reset.h
new file mode 100644
index 00..8f1634f7a6
--- /dev/null
+++ b/include/dt-bindings/reset/mt7629-reset.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_MTK_RESET_H_
+#define _DT_BINDINGS_MTK_RESET_H_
+
+/* PCIe Subsystem resets */
+#define PCIE1_CORE_RST 19
+#define PCIE1_MMIO_RST 20
+#define PCIE1_HRST 21
+#define PCIE1_USER_RST 22
+#define PCIE1_PIPE_RST 23
+#define PCIE0_CORE_RST 27
+#define PCIE0_MMIO_RST 28
+#define PCIE0_HRST 29
+#define PCIE0_USER_RST 30
+#define PCIE0_PIPE_RST 31
+
+/* SSUSB Subsystem resets */
+#define SSUSB_PHY_PWR_RST  3
+#define SSUSB_MAC_PWR_RST  4
+
+/* ETH Subsystem resets */
+#define ETHSYS_SYS_RST 0
+#define ETHSYS_MCM_RST 2
+#define ETHSYS_HSDMA_RST   5
+#define ETHSYS_FE_RST  6
+#define ETHSYS_ESW_RST 16
+#define ETHSYS_GMAC_RST23
+#define ETHSYS_EPHY_RST24
+#define ETHSYS_CRYPTO_RST  29
+#define ETHSYS_PPE_RST 31
+
+#endif /* _DT_BINDINGS_MTK_RESET_H_ */
-- 
2.17.1

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[U-Boot] [PATCH v4 6/8] dt-bindings: phy: add a document for MediaTek tphy

2019-08-22 Thread Frank Wunderlich
From: Ryder Lee 

This adds a document for tphy which supports physical layer
functionality for a number of controllers on MediaTek SoCs,
such as, USB2.0, USB3.0, PCIe, and SATA.

Signed-off-by: Ryder Lee 
Signed-off-by: Frank Wunderlich 
---
changes since v3: none
changes since v2: dt-bindings added with v3
---
 doc/device-tree-bindings/phy/phy-mtk-tphy.txt | 86 +++
 1 file changed, 86 insertions(+)
 create mode 100644 doc/device-tree-bindings/phy/phy-mtk-tphy.txt

diff --git a/doc/device-tree-bindings/phy/phy-mtk-tphy.txt 
b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
new file mode 100644
index 00..037c5a4be5
--- /dev/null
+++ b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
@@ -0,0 +1,86 @@
+MediaTek T-PHY binding
+--
+
+T-phy controller supports physical layer functionality for a number of
+controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
+
+Required properties (controller (parent) node):
+ - compatible  : should be one of
+ "mediatek,generic-tphy-v1"
+ - clocks  : (deprecated, use port's clocks instead) a list of phandle +
+ clock-specifier pairs, one for each entry in clock-names
+ - clock-names : (deprecated, use port's one instead) must contain
+ "u3phya_ref": for reference clock of usb3.0 analog phy.
+
+Required nodes : a sub-node is required for each port the controller
+ provides. Address range information including the usual
+ 'reg' property is used inside these nodes to describe
+ the controller's topology.
+
+Optional properties (controller (parent) node):
+ - reg : offset and length of register shared by multiple ports,
+ exclude port's private register.
+ - mediatek,src-ref-clk-mhz: frequency of reference clock for slew rate
+ calibrate
+ - mediatek,src-coef   : coefficient for slew rate calibrate, depends on
+ SoC process
+
+Required properties (port (child) node):
+- reg  : address and length of the register set for the port.
+- clocks   : a list of phandle + clock-specifier pairs, one for each
+ entry in clock-names
+- clock-names  : must contain
+ "ref": 48M reference clock for HighSpeed analog phy; and 26M
+   reference clock for SuperSpeed analog phy, sometimes is
+   24M, 25M or 27M, depended on platform.
+- #phy-cells   : should be 1 (See second example)
+ cell after port phandle is phy type from:
+   - PHY_TYPE_USB2
+   - PHY_TYPE_USB3
+   - PHY_TYPE_PCIE
+   - PHY_TYPE_SATA
+
+Example:
+
+   u3phy2: usb-phy@1a244000 {
+   compatible = "mediatek,generic-tphy-v1";
+   reg = <0x1a244000 0x0700>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   status = "disabled";
+
+   u2port1: usb-phy@1a244800 {
+   reg = <0x1a244800 0x0100>;
+   clocks = < CLK_TOP_USB_PHY48M>;
+   clock-names = "ref";
+   #phy-cells = <1>;
+   status = "okay";
+   };
+
+   u3port1: usb-phy@1a244900 {
+   reg = <0x1a244900 0x0700>;
+   clocks = <>;
+   clock-names = "ref";
+   #phy-cells = <1>;
+   status = "okay";
+   };
+   };
+
+Specifying phy control of devices
+-
+
+Device nodes should specify the configuration required in their "phys"
+property, containing a phandle to the phy port node and a device type;
+phy-names for each port are optional.
+
+Example:
+
+#include 
+
+usb30: usb@1127 {
+   ...
+   phys = < PHY_TYPE_USB2>, < PHY_TYPE_USB3>;
+   phy-names = "usb2-0", "usb3-0";
+   ...
+};
-- 
2.17.1

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[U-Boot] [PATCH v4 3/8] arm: dts: add PCIe controller for MT7623 SoC

2019-08-22 Thread Frank Wunderlich
From: Ryder Lee 

This adds PCIe and its PHY nodes for MT7623.

Tested-by: Frank Wunderlich 
Signed-off-by: Ryder Lee 
Signed-off-by: Frank Wunderlich 
---
changes since v3: none
changes since v2: none
---
 arch/arm/dts/mt7623.dtsi | 128 +++
 arch/arm/dts/mt7623n-bananapi-bpi-r2.dts |  29 +
 2 files changed, 157 insertions(+)

diff --git a/arch/arm/dts/mt7623.dtsi b/arch/arm/dts/mt7623.dtsi
index 64079c61bf..3a868ea2ee 100644
--- a/arch/arm/dts/mt7623.dtsi
+++ b/arch/arm/dts/mt7623.dtsi
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include "skeleton.dtsi"
@@ -255,6 +256,133 @@
#reset-cells = <1>;
};
 
+   pcie: pcie@1a14 {
+   compatible = "mediatek,mt7623-pcie";
+   device_type = "pci";
+   reg = <0x1a14 0x1000>, /* PCIe shared registers */
+ <0x1a142000 0x1000>, /* Port0 registers */
+ <0x1a143000 0x1000>, /* Port1 registers */
+ <0x1a144000 0x1000>; /* Port2 registers */
+   reg-names = "subsys", "port0", "port1", "port2";
+   #address-cells = <3>;
+   #size-cells = <2>;
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0xf800 0 0 0>;
+   interrupt-map = <0x 0 0 0  GIC_SPI 193 
IRQ_TYPE_LEVEL_LOW>,
+   <0x0800 0 0 0  GIC_SPI 194 
IRQ_TYPE_LEVEL_LOW>,
+   <0x1000 0 0 0  GIC_SPI 195 
IRQ_TYPE_LEVEL_LOW>;
+   clocks = < CLK_TOP_ETHIF_SEL>,
+< CLK_HIFSYS_PCIE0>,
+< CLK_HIFSYS_PCIE1>,
+< CLK_HIFSYS_PCIE2>;
+   clock-names = "free_ck", "sys_ck0", "sys_ck1", "sys_ck2";
+   resets = < HIFSYS_PCIE0_RST>,
+< HIFSYS_PCIE1_RST>,
+< HIFSYS_PCIE2_RST>;
+   reset-names = "pcie-rst0", "pcie-rst1", "pcie-rst2";
+   phys = <_port PHY_TYPE_PCIE>,
+  <_port PHY_TYPE_PCIE>,
+  < PHY_TYPE_PCIE>;
+   phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
+   power-domains = < MT7623_POWER_DOMAIN_HIF>;
+   bus-range = <0x00 0xff>;
+   status = "disabled";
+   ranges = <0x8100 0 0x1a16 0x1a16 0 0x0001
+ 0x8300 0 0x6000 0x6000 0 0x1000>;
+
+   pcie@0,0 {
+   reg = <0x 0 0 0 0>;
+   #address-cells = <3>;
+   #size-cells = <2>;
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0>;
+   interrupt-map = <0 0 0 0  GIC_SPI 193 
IRQ_TYPE_LEVEL_LOW>;
+   ranges;
+   status = "disabled";
+   };
+
+   pcie@1,0 {
+   reg = <0x0800 0 0 0 0>;
+   #address-cells = <3>;
+   #size-cells = <2>;
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0>;
+   interrupt-map = <0 0 0 0  GIC_SPI 194 
IRQ_TYPE_LEVEL_LOW>;
+   ranges;
+   status = "disabled";
+   };
+
+   pcie@2,0 {
+   reg = <0x1000 0 0 0 0>;
+   #address-cells = <3>;
+   #size-cells = <2>;
+   #interrupt-cells = <1>;
+   interrupt-map-mask = <0 0 0 0>;
+   interrupt-map = <0 0 0 0  GIC_SPI 195 
IRQ_TYPE_LEVEL_LOW>;
+   ranges;
+   status = "disabled";
+   };
+   };
+
+   pcie0_phy: pcie-phy@1a149000 {
+   compatible = "mediatek,generic-tphy-v1";
+   reg = <0x1a149000 0x0700>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   status = "disabled";
+
+   pcie0_port: pcie-phy@1a149900 {
+   reg = <0x1a149900 0x0700>;
+   clocks = <>;
+   clock-names = "ref";
+   #phy-cells = <1>;
+   status = "okay";
+   };
+   };
+
+   pcie1_phy: pcie-phy@1a14a000 {
+   compatible = "mediatek,generic-tphy-v1";
+   reg = <0x1a14a000 0x0700>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   status = "disabled";
+
+   pcie1_port: pcie-phy@1a14a900 {
+   reg = <0x1a14a900 0x0700>;
+   clocks = <>;
+   clock-names = "ref";
+   #phy-cells = <1>;
+   status = "okay";

[U-Boot] [PATCH v4 2/8] phy: mediatek: add MediaTek T-PHY support for PCIe

2019-08-22 Thread Frank Wunderlich
From: Ryder Lee 

The driver provides PHY for USB2, USB3.0, PCIe and SATA, and now
we just enable PCIe. As for the other functionalities will be
added gradually in upcoming days.

This is adapted from the Linux version.

Tested-by: Frank Wunderlich 
Signed-off-by: Ryder Lee 
Signed-off-by: Frank Wunderlich 
---
changes since v3: none
changes since v2:
 - use clrsetbits_le32 instead of readl/writel
 - change SSC-delta
---
 drivers/phy/Kconfig|  11 ++
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-mtk-tphy.c | 362 +
 3 files changed, 374 insertions(+)
 create mode 100644 drivers/phy/phy-mtk-tphy.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 957efb3984..2099dd9547 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -190,4 +190,15 @@ config MT76X8_USB_PHY
 
  This PHY is found on MT76x8 devices supporting USB.
 
+config PHY_MTK_TPHY
+   bool "MediaTek T-PHY Driver"
+   depends on PHY
+   depends on ARCH_MEDIATEK
+   help
+ MediaTek T-PHY driver supports usb2.0, usb3.0 ports, PCIe and
+ SATA, and meanwhile supports two version T-PHY which have
+ different banks layout, the T-PHY with shared banks between
+ multi-ports is first version, otherwise is second veriosn,
+ so you can easily distinguish them by banks layout.
+
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 90646ca55b..15b4d58a2d 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o
 obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o
 obj-$(CONFIG_KEYSTONE_USB_PHY) += keystone-usb-phy.o
 obj-$(CONFIG_MT76X8_USB_PHY) += mt76x8-usb-phy.o
+obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
diff --git a/drivers/phy/phy-mtk-tphy.c b/drivers/phy/phy-mtk-tphy.c
new file mode 100644
index 00..3701481256
--- /dev/null
+++ b/drivers/phy/phy-mtk-tphy.c
@@ -0,0 +1,362 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2015 - 2019 MediaTek Inc.
+ * Author: Chunfeng Yun 
+ *Ryder Lee 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+/* version V1 sub-banks offset base address */
+/* banks shared by multiple phys */
+#define SSUSB_SIFSLV_V1_SPLLC  0x000   /* shared by u3 phys */
+#define SSUSB_SIFSLV_V1_CHIP   0x300   /* shared by u3 phys */
+/* u3/pcie/sata phy banks */
+#define SSUSB_SIFSLV_V1_U3PHYD 0x000
+#define SSUSB_SIFSLV_V1_U3PHYA 0x200
+
+#define U3P_U3_CHIP_GPIO_CTLD  0x0c
+#define P3C_REG_IP_SW_RST  BIT(31)
+#define P3C_MCU_BUS_CK_GATE_EN BIT(30)
+#define P3C_FORCE_IP_SW_RSTBIT(29)
+
+#define U3P_U3_CHIP_GPIO_CTLE  0x10
+#define P3C_RG_SWRST_U3_PHYD   BIT(25)
+#define P3C_RG_SWRST_U3_PHYD_FORCE_EN  BIT(24)
+
+#define U3P_U3_PHYA_REG0   0x000
+#define P3A_RG_CLKDRV_OFF  GENMASK(3, 2)
+#define P3A_RG_CLKDRV_OFF_VAL(x)   ((0x3 & (x)) << 2)
+
+#define U3P_U3_PHYA_REG1   0x004
+#define P3A_RG_CLKDRV_AMP  GENMASK(31, 29)
+#define P3A_RG_CLKDRV_AMP_VAL(x)   ((0x7 & (x)) << 29)
+
+#define U3P_U3_PHYA_DA_REG00x100
+#define P3A_RG_XTAL_EXT_PE2H   GENMASK(17, 16)
+#define P3A_RG_XTAL_EXT_PE2H_VAL(x)((0x3 & (x)) << 16)
+#define P3A_RG_XTAL_EXT_PE1H   GENMASK(13, 12)
+#define P3A_RG_XTAL_EXT_PE1H_VAL(x)((0x3 & (x)) << 12)
+#define P3A_RG_XTAL_EXT_EN_U3  GENMASK(11, 10)
+#define P3A_RG_XTAL_EXT_EN_U3_VAL(x)   ((0x3 & (x)) << 10)
+
+#define U3P_U3_PHYA_DA_REG40x108
+#define P3A_RG_PLL_DIVEN_PE2H  GENMASK(21, 19)
+#define P3A_RG_PLL_BC_PE2H GENMASK(7, 6)
+#define P3A_RG_PLL_BC_PE2H_VAL(x)  ((0x3 & (x)) << 6)
+
+#define U3P_U3_PHYA_DA_REG50x10c
+#define P3A_RG_PLL_BR_PE2H GENMASK(29, 28)
+#define P3A_RG_PLL_BR_PE2H_VAL(x)  ((0x3 & (x)) << 28)
+#define P3A_RG_PLL_IC_PE2H GENMASK(15, 12)
+#define P3A_RG_PLL_IC_PE2H_VAL(x)  ((0xf & (x)) << 12)
+
+#define U3P_U3_PHYA_DA_REG60x110
+#define P3A_RG_PLL_IR_PE2H GENMASK(19, 16)
+#define P3A_RG_PLL_IR_PE2H_VAL(x)  ((0xf & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG70x114
+#define P3A_RG_PLL_BP_PE2H GENMASK(19, 16)
+#define P3A_RG_PLL_BP_PE2H_VAL(x)  ((0xf & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG20   0x13c
+#define P3A_RG_PLL_DELTA1_PE2H GENMASK(31, 16)
+#define P3A_RG_PLL_DELTA1_PE2H_VAL(x)  ((0x & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG25   0x148
+#define P3A_RG_PLL_DELTA_PE2H  GENMASK(15, 0)
+#define P3A_RG_PLL_DELTA_PE2H_VAL(x)   (0x & (x))
+
+#define U3P_U3_PHYD_RXDET1 0x128
+#define P3D_RG_RXDET_STB2_SET  GENMASK(17, 9)
+#define P3D_RG_RXDET_STB2_SET_VAL(x)   ((0x1ff & (x)) << 9)
+
+#define U3P_U3_PHYD_RXDET2 0x12c
+#define 

[U-Boot] [PATCH v4 1/8] pci: mediatek: add PCIe controller support for MT7623

2019-08-22 Thread Frank Wunderlich
From: Ryder Lee 

This adds PCIe controller support for MT7623.
This is adapted from the Linux version.

Tested-by: Frank Wunderlich 
Signed-off-by: Ryder Lee 
Signed-off-by: Frank Wunderlich 
---
changes since v3: none
changes since v2:
 - rename driver to "MediaTek PCIe Gen2 controller"
 - use clrsetbits_le32 instead of readl/writel
---
 drivers/pci/Kconfig |   8 ++
 drivers/pci/Makefile|   1 +
 drivers/pci/pcie_mediatek.c | 279 
 3 files changed, 288 insertions(+)
 create mode 100644 drivers/pci/pcie_mediatek.c

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 3fe38f7315..88df9001ee 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -145,4 +145,12 @@ config PCI_MVEBU
  Say Y here if you want to enable PCIe controller support on
  Armada XP/38x SoCs.
 
+config PCIE_MEDIATEK
+   bool "MediaTek PCIe Gen2 controller"
+   depends on DM_PCI
+   depends on ARCH_MEDIATEK
+   help
+ Say Y here if you want to enable Gen2 PCIe controller,
+ which could be found on MT7623 SoC family.
+
 endif
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index b5ebd50c85..7093d63918 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \
pcie_layerscape_gen4_fixup.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
 obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
+obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o
diff --git a/drivers/pci/pcie_mediatek.c b/drivers/pci/pcie_mediatek.c
new file mode 100644
index 00..a0dcb258b0
--- /dev/null
+++ b/drivers/pci/pcie_mediatek.c
@@ -0,0 +1,279 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * MediaTek PCIe host controller driver.
+ *
+ * Copyright (c) 2017-2019 MediaTek Inc.
+ * Author: Ryder Lee 
+ *Honghui Zhang 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* PCIe shared registers */
+#define PCIE_SYS_CFG   0x00
+#define PCIE_INT_ENABLE0x0c
+#define PCIE_CFG_ADDR  0x20
+#define PCIE_CFG_DATA  0x24
+
+/* PCIe per port registers */
+#define PCIE_BAR0_SETUP0x10
+#define PCIE_CLASS 0x34
+#define PCIE_LINK_STATUS   0x50
+
+#define PCIE_PORT_INT_EN(x)BIT(20 + (x))
+#define PCIE_PORT_PERST(x) BIT(1 + (x))
+#define PCIE_PORT_LINKUP   BIT(0)
+#define PCIE_BAR_MAP_MAX   GENMASK(31, 16)
+
+#define PCIE_BAR_ENABLEBIT(0)
+#define PCIE_REVISION_ID   BIT(0)
+#define PCIE_CLASS_CODE(0x60400 << 8)
+#define PCIE_CONF_REG(regn)(((regn) & GENMASK(7, 2)) | \
+   regn) >> 8) & GENMASK(3, 0)) << 24))
+#define PCIE_CONF_ADDR(regn, bdf) \
+   (PCIE_CONF_REG(regn) | (bdf))
+
+/* MediaTek specific configuration registers */
+#define PCIE_FTS_NUM   0x70c
+#define PCIE_FTS_NUM_MASK  GENMASK(15, 8)
+#define PCIE_FTS_NUM_L0(x) ((x) & 0xff << 8)
+
+#define PCIE_FC_CREDIT 0x73c
+#define PCIE_FC_CREDIT_MASK(GENMASK(31, 31) | GENMASK(28, 16))
+#define PCIE_FC_CREDIT_VAL(x)  ((x) << 16)
+
+struct mtk_pcie_port {
+   void __iomem *base;
+   struct list_head list;
+   struct mtk_pcie *pcie;
+   struct reset_ctl reset;
+   struct clk sys_ck;
+   struct phy phy;
+   u32 slot;
+};
+
+struct mtk_pcie {
+   void __iomem *base;
+   struct clk free_ck;
+   struct list_head ports;
+};
+
+static int mtk_pcie_config_address(struct udevice *udev, pci_dev_t bdf,
+  uint offset, void **paddress)
+{
+   struct mtk_pcie *pcie = dev_get_priv(udev);
+
+   writel(PCIE_CONF_ADDR(offset, bdf), pcie->base + PCIE_CFG_ADDR);
+   *paddress = pcie->base + PCIE_CFG_DATA + (offset & 3);
+
+   return 0;
+}
+
+static int mtk_pcie_read_config(struct udevice *bus, pci_dev_t bdf,
+   uint offset, ulong *valuep,
+   enum pci_size_t size)
+{
+   return pci_generic_mmap_read_config(bus, mtk_pcie_config_address,
+   bdf, offset, valuep, size);
+}
+
+static int mtk_pcie_write_config(struct udevice *bus, pci_dev_t bdf,
+uint offset, ulong value,
+enum pci_size_t size)
+{
+   return pci_generic_mmap_write_config(bus, mtk_pcie_config_address,
+bdf, offset, value, size);
+}
+
+static const struct dm_pci_ops mtk_pcie_ops = {
+   .read_config= mtk_pcie_read_config,
+   .write_config   = mtk_pcie_write_config,
+};
+
+static void mtk_pcie_port_free(struct mtk_pcie_port *port)
+{
+   list_del(>list);
+   free(port);
+}
+
+static int mtk_pcie_startup_port(struct mtk_pcie_port *port)
+{
+   struct mtk_pcie *pcie = 

[U-Boot] [PATCH v4 0/8] add PCIe, its PHY and AHCI support for mt7623

2019-08-22 Thread Frank Wunderlich
This series adds PCIe/PHY drivers which were adapted from Linux version.
The related drivers were tested on bpi-r2.

To get AHCI (SATA) working on R2 (ASM1061 PCIe2SATA-Controller) 2 addional
changes are needed (see Parts 5+6 from Oleksandr Rybalko)

changes since v3:
- fix build-warning on x86_64 in commit "Don't forget to clear upper address 
regs"
- move history below --- 
changes since v2:
- rename pcie-driver to "MediaTek PCIe Gen2 controller"
- replaced readl/writel with (clr/set)bits_le32
- add dt-binding documents for pcie and phy
changes since v1:
- replaced mt2701 PCIe driver with version (PHY+PCIe) from Ryder


Oleksandr Rybalko (2):
  ahci-pci: ASM1061 report wrong class, but support AHCI.
  ata: ahci: Don't forget to clear upper address regs.

Ryder Lee (6):
  pci: mediatek: add PCIe controller support for MT7623
  phy: mediatek: add MediaTek T-PHY support for PCIe
  arm: dts: add PCIe controller for MT7623 SoC
  arm: dts: split mtk-reset.h into per-chip header
  dt-bindings: pcie: add a document for MT7623 PCIe controller
  dt-bindings: phy: add a document for MediaTek tphy

 arch/arm/dts/mt7623.dtsi  | 130 ++-
 arch/arm/dts/mt7623n-bananapi-bpi-r2.dts  |  29 ++
 arch/arm/dts/mt7629.dtsi  |   2 +-
 .../pci/mediatek-pcie.txt | 122 ++
 doc/device-tree-bindings/phy/phy-mtk-tphy.txt |  86 +
 drivers/ata/ahci-pci.c|   1 +
 drivers/ata/ahci.c|  11 +-
 drivers/pci/Kconfig   |   8 +
 drivers/pci/Makefile  |   1 +
 drivers/pci/pcie_mediatek.c   | 279 ++
 drivers/phy/Kconfig   |  11 +
 drivers/phy/Makefile  |   1 +
 drivers/phy/phy-mtk-tphy.c| 362 ++
 .../reset/{mtk-reset.h => mt7623-reset.h} |   4 +-
 include/dt-bindings/reset/mt7629-reset.h  |  36 ++
 15 files changed, 1074 insertions(+), 9 deletions(-)
 create mode 100644 doc/device-tree-bindings/pci/mediatek-pcie.txt
 create mode 100644 doc/device-tree-bindings/phy/phy-mtk-tphy.txt
 create mode 100644 drivers/pci/pcie_mediatek.c
 create mode 100644 drivers/phy/phy-mtk-tphy.c
 rename include/dt-bindings/reset/{mtk-reset.h => mt7623-reset.h} (88%)
 create mode 100644 include/dt-bindings/reset/mt7629-reset.h

-- 
2.17.1

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[U-Boot] toolchain for riscv?

2019-08-22 Thread Hannes Schmelzer

hi,

just tried to run moveconfig.py, having trouble to find the toolchain 
for "riscv".


I already did run "tools/buildman/buildman.py --fetch-arch=all", but no 
toolchain for riscv was downloaded.


where to get correct toolchain?

cheers,
Hannes

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Re: [U-Boot] [PATCH v2] net/macb: increase RX buffer size for GEM

2019-08-22 Thread Stefan Roese

Hi Ramon,

On 14.07.19 17:25, Ramon Fried wrote:

Macb Ethernet controller requires a RX buffer of 128 bytes. It is
highly sub-optimal for Gigabit-capable GEM that is able to use
a bigger DMA buffer. Change this constant and associated macros
with data stored in the private structure.
RX DMA buffer size has to be multiple of 64 bytes as indicated in
DMA Configuration Register specification.

Signed-off-by: Ramon Fried 


This patch breaks ethernet on my AT91SAM9G25 based board. With this
patch now, tftp does not complete the xfer any more:

=> tftp 2100 big
ethernet@f802c000: PHY present at 1
ethernet@f802c000: Starting autonegotiation...
ethernet@f802c000: Autonegotiation complete
ethernet@f802c000: link up, 100Mbps full-duplex (lpa: 0xc5e1)
Using ethernet@f802c000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.249
Filename 'big'.
Load address: 0x2100
Loading: #T T

With this patch reverted (as well as with v2019.07), tftp works
just fine.

I did not look into the patch yet. Perhaps you have a quick idea
on why this breaks my platform.

BTW: When I disable the dcache (dcache off), tftp also works fine
with this patch. So its definitely something cache / dma related.

Thanks,
Stefan


---
v2: Fix multi-line comment style
  drivers/net/macb.c | 30 ++
  1 file changed, 22 insertions(+), 8 deletions(-)

diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index c072f99d8f..3c8b9722b3 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -45,10 +45,17 @@
  
  DECLARE_GLOBAL_DATA_PTR;
  
-#define MACB_RX_BUFFER_SIZE		4096

-#define MACB_RX_RING_SIZE  (MACB_RX_BUFFER_SIZE / 128)
+/*
+ * These buffer sizes must be power of 2 and divisible
+ * by RX_BUFFER_MULTIPLE
+ */
+#define MACB_RX_BUFFER_SIZE128
+#define GEM_RX_BUFFER_SIZE 2048
  #define RX_BUFFER_MULTIPLE64
+
+#define MACB_RX_RING_SIZE  32
  #define MACB_TX_RING_SIZE 16
+
  #define MACB_TX_TIMEOUT   1000
  #define MACB_AUTONEG_TIMEOUT  500
  
@@ -95,6 +102,7 @@ struct macb_device {

void*tx_buffer;
struct macb_dma_desc*rx_ring;
struct macb_dma_desc*tx_ring;
+   size_t  rx_buffer_size;
  
  	unsigned long		rx_buffer_dma;

unsigned long   rx_ring_dma;
@@ -395,15 +403,16 @@ static int _macb_recv(struct macb_device *macb, uchar 
**packetp)
}
  
  		if (status & MACB_BIT(RX_EOF)) {

-   buffer = macb->rx_buffer + 128 * macb->rx_tail;
+   buffer = macb->rx_buffer +
+   macb->rx_buffer_size * macb->rx_tail;
length = status & RXBUF_FRMLEN_MASK;
  
  			macb_invalidate_rx_buffer(macb);

if (macb->wrapped) {
unsigned int headlen, taillen;
  
-headlen = 128 * (MACB_RX_RING_SIZE

-- macb->rx_tail);
+   headlen = macb->rx_buffer_size *
+   (MACB_RX_RING_SIZE - macb->rx_tail);
taillen = length - headlen;
memcpy((void *)net_rx_packets[0],
   buffer, headlen);
@@ -701,7 +710,7 @@ static void gmac_configure_dma(struct macb_device *macb)
u32 buffer_size;
u32 dmacfg;
  
-	buffer_size = 128 / RX_BUFFER_MULTIPLE;

+   buffer_size = macb->rx_buffer_size / RX_BUFFER_MULTIPLE;
dmacfg = gem_readl(macb, DMACFG) & ~GEM_BF(RXBS, -1L);
dmacfg |= GEM_BF(RXBS, buffer_size);
  
@@ -746,7 +755,7 @@ static int _macb_init(struct macb_device *macb, const char *name)

paddr |= MACB_BIT(RX_WRAP);
macb->rx_ring[i].addr = paddr;
macb->rx_ring[i].ctrl = 0;
-   paddr += 128;
+   paddr += macb->rx_buffer_size;
}
macb_flush_ring_desc(macb, RX);
macb_flush_rx_buffer(macb);
@@ -957,8 +966,13 @@ static void _macb_eth_initialize(struct macb_device *macb)
int id = 0; /* This is not used by functions we call */
u32 ncfgr;
  
+	if (macb_is_gem(macb))

+   macb->rx_buffer_size = GEM_RX_BUFFER_SIZE;
+   else
+   macb->rx_buffer_size = MACB_RX_BUFFER_SIZE;
+
/* TODO: we need check the rx/tx_ring_dma is dcache line aligned */
-   macb->rx_buffer = dma_alloc_coherent(MACB_RX_BUFFER_SIZE,
+   macb->rx_buffer = dma_alloc_coherent(macb->rx_buffer_size * 
MACB_RX_RING_SIZE,
 >rx_buffer_dma);
macb->rx_ring = dma_alloc_coherent(MACB_RX_DMA_DESC_SIZE,
   >rx_ring_dma);


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Re: [U-Boot] [PATCH] nvme: Fix PRP Offset Invalid

2019-08-22 Thread Aaron Williams
I'm sorry about the messed up subject saying [PATCH]. For some reason git 
send-email is mangling the subject line. I'm new to trying to use this method 
to send out patches. This is version 2 of my patch.

-Aaron

On Thursday, August 22, 2019 2:12:32 AM PDT Aaron Williams wrote:
> When large writes take place I saw a Samsung EVO 970+ return a status
> value of 0x13, PRP Offset Invalid.  I tracked this down to the
> improper handling of PRP entries.  The blocks the PRP entries are
> placed in cannot cross a page boundary and thus should be allocated
> on page boundaries.  This is how the Linux kernel driver works.
> 
> With this patch, the PRP pool is allocated on a page boundary and
> other than the very first allocation, the pool size is a multiple of
> the page size.  Each page can hold (4096 / 8) - 1 entries since the
> last entry must point to the next page in the pool.
> 
> Signed-off-by: Aaron Williams 
> ---
>  drivers/nvme/nvme.c | 28 ++--
>  1 file changed, 18 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
> index d4965e2ef6..bc4cf40b40 100644
> --- a/drivers/nvme/nvme.c
> +++ b/drivers/nvme/nvme.c
> @@ -73,6 +73,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64
> *prp2, u64 *prp_pool;
>   int length = total_len;
>   int i, nprps;
> + u32 prps_per_page = (page_size >> 3) - 1;
> + u32 num_pages;
> +
>   length -= (page_size - offset);
> 
>   if (length <= 0) {
> @@ -89,15 +92,19 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64
> *prp2, }
> 
>   nprps = DIV_ROUND_UP(length, page_size);
> + num_pages = DIV_ROUND_UP(nprps, prps_per_page);
> 
>   if (nprps > dev->prp_entry_num) {
>   free(dev->prp_pool);
> - dev->prp_pool = malloc(nprps << 3);
> + /* Always increase in increments of pages.  It doesn't 
waste
> +  * much memory and reduces the number of allocations.
> +  */
> + dev->prp_pool = memalign(page_size, num_pages * 
page_size);
>   if (!dev->prp_pool) {
>   printf("Error: malloc prp_pool fail\n");
>   return -ENOMEM;
>   }
> - dev->prp_entry_num = nprps;
> + dev->prp_entry_num = prps_per_page * num_pages;
>   }
> 
>   prp_pool = dev->prp_pool;
> @@ -788,14 +795,6 @@ static int nvme_probe(struct udevice *udev)
>   }
>   memset(ndev->queues, 0, NVME_Q_NUM * sizeof(struct nvme_queue 
*));
> 
> - ndev->prp_pool = malloc(MAX_PRP_POOL);
> - if (!ndev->prp_pool) {
> - ret = -ENOMEM;
> - printf("Error: %s: Out of memory!\n", udev->name);
> - goto free_nvme;
> - }
> - ndev->prp_entry_num = MAX_PRP_POOL >> 3;
> -
>   ndev->cap = nvme_readq(>bar->cap);
>   ndev->q_depth = min_t(int, NVME_CAP_MQES(ndev->cap) + 1, 
NVME_Q_DEPTH);
>   ndev->db_stride = 1 << NVME_CAP_STRIDE(ndev->cap);
> @@ -805,6 +804,15 @@ static int nvme_probe(struct udevice *udev)
>   if (ret)
>   goto free_queue;
> 
> + /* Allocate after the page size is known */
> + ndev->prp_pool = memalign(ndev->page_size, MAX_PRP_POOL);
> + if (!ndev->prp_pool) {
> + ret = -ENOMEM;
> + printf("Error: %s: Out of memory!\n", udev->name);
> + goto free_nvme;
> + }
> + ndev->prp_entry_num = MAX_PRP_POOL >> 3;
> +
>   ret = nvme_setup_io_queues(ndev);
>   if (ret)
>   goto free_queue;




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[U-Boot] [PATCH] nvme: Fix PRP Offset Invalid

2019-08-22 Thread Aaron Williams
When large writes take place I saw a Samsung EVO 970+ return a status
value of 0x13, PRP Offset Invalid.  I tracked this down to the
improper handling of PRP entries.  The blocks the PRP entries are
placed in cannot cross a page boundary and thus should be allocated
on page boundaries.  This is how the Linux kernel driver works.

With this patch, the PRP pool is allocated on a page boundary and
other than the very first allocation, the pool size is a multiple of
the page size.  Each page can hold (4096 / 8) - 1 entries since the
last entry must point to the next page in the pool.

Signed-off-by: Aaron Williams 
---
 drivers/nvme/nvme.c | 28 ++--
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index d4965e2ef6..bc4cf40b40 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -73,6 +73,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
u64 *prp_pool;
int length = total_len;
int i, nprps;
+   u32 prps_per_page = (page_size >> 3) - 1;
+   u32 num_pages;
+
length -= (page_size - offset);
 
if (length <= 0) {
@@ -89,15 +92,19 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
}
 
nprps = DIV_ROUND_UP(length, page_size);
+   num_pages = DIV_ROUND_UP(nprps, prps_per_page);
 
if (nprps > dev->prp_entry_num) {
free(dev->prp_pool);
-   dev->prp_pool = malloc(nprps << 3);
+   /* Always increase in increments of pages.  It doesn't waste
+* much memory and reduces the number of allocations.
+*/
+   dev->prp_pool = memalign(page_size, num_pages * page_size);
if (!dev->prp_pool) {
printf("Error: malloc prp_pool fail\n");
return -ENOMEM;
}
-   dev->prp_entry_num = nprps;
+   dev->prp_entry_num = prps_per_page * num_pages;
}
 
prp_pool = dev->prp_pool;
@@ -788,14 +795,6 @@ static int nvme_probe(struct udevice *udev)
}
memset(ndev->queues, 0, NVME_Q_NUM * sizeof(struct nvme_queue *));
 
-   ndev->prp_pool = malloc(MAX_PRP_POOL);
-   if (!ndev->prp_pool) {
-   ret = -ENOMEM;
-   printf("Error: %s: Out of memory!\n", udev->name);
-   goto free_nvme;
-   }
-   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
-
ndev->cap = nvme_readq(>bar->cap);
ndev->q_depth = min_t(int, NVME_CAP_MQES(ndev->cap) + 1, NVME_Q_DEPTH);
ndev->db_stride = 1 << NVME_CAP_STRIDE(ndev->cap);
@@ -805,6 +804,15 @@ static int nvme_probe(struct udevice *udev)
if (ret)
goto free_queue;
 
+   /* Allocate after the page size is known */
+   ndev->prp_pool = memalign(ndev->page_size, MAX_PRP_POOL);
+   if (!ndev->prp_pool) {
+   ret = -ENOMEM;
+   printf("Error: %s: Out of memory!\n", udev->name);
+   goto free_nvme;
+   }
+   ndev->prp_entry_num = MAX_PRP_POOL >> 3;
+
ret = nvme_setup_io_queues(ndev);
if (ret)
goto free_queue;
-- 
2.16.4

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Re: [U-Boot] [PATCH] efi_loader: disk: install file system protocol to a whole disk

2019-08-22 Thread Mark Kettenis
> From: AKASHI Takahiro 
> Date: Thu, 22 Aug 2019 17:06:25 +0900
> 
> Currently, a whole disk without any partitions is not associated
> with EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. So even if it houses FAT
> file system, there is a chance that we may not be able to access
> it, particularly, when accesses are to be attempted after searching
> that protocol against a device handle.
> 
> With this patch, EFI_SIMPLE_FILE_SYSTEM_PROTOCOL is installed
> to such a disk if part_get_info() shows there is not partition
> table installed on it.

Do other UEFI implementations support this?

> Signed-off-by: AKASHI Takahiro 
> ---
>  lib/efi_loader/efi_disk.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> index 7a6b06821a47..548fe667e6f8 100644
> --- a/lib/efi_loader/efi_disk.c
> +++ b/lib/efi_loader/efi_disk.c
> @@ -239,6 +239,7 @@ static efi_status_t efi_disk_add_dev(
>   struct efi_disk_obj **disk)
>  {
>   struct efi_disk_obj *diskobj;
> + disk_partition_t info;
>   efi_status_t ret;
>  
>   /* Don't add empty devices */
> @@ -270,7 +271,8 @@ static efi_status_t efi_disk_add_dev(
>  diskobj->dp);
>   if (ret != EFI_SUCCESS)
>   return ret;
> - if (part >= 1) {
> + /* partitions or whole disk without partitions */
> + if (part >= 1 || part_get_info(desc, part, )) {
>   diskobj->volume = efi_simple_file_system(desc, part,
>diskobj->dp);
>   ret = efi_add_protocol(>header,
> -- 
> 2.21.0
> 
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Re: [U-Boot] [PATCH 5/6] bmips: bcm63268: add support for brcmnand

2019-08-22 Thread Álvaro Fernández Rojas
Hi Daniel,

“brcm,nand-bcm6368“ is the probe and interrupt part of the driver.
The core part of the driver is the one that only supports HW rev 4.0 and newer.

Best regards,
Álvaro.


De: Daniel Schwierzeck 
Enviado: miércoles, agosto 14, 2019 3:23 p. m.
Para: Álvaro Fernández Rojas; u-boot@lists.denx.de; 
philippe.rey...@softathome.com; tr...@konsulko.com
Asunto: Re: [PATCH 5/6] bmips: bcm63268: add support for brcmnand



Am 13.08.19 um 21:19 schrieb Álvaro Fernández Rojas:
> BCM63268 uses 4.0 HW nand controller, which is currently supported by
> brcmnand driver.
>
> Signed-off-by: Álvaro Fernández Rojas 
> ---
> arch/mips/dts/brcm,bcm63268.dtsi | 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/mips/dts/brcm,bcm63268.dtsi 
> b/arch/mips/dts/brcm,bcm63268.dtsi
> index f8a72ef535..5294242529 100644
> --- a/arch/mips/dts/brcm,bcm63268.dtsi
> +++ b/arch/mips/dts/brcm,bcm63268.dtsi
> @@ -141,6 +141,24 @@
> status = "disabled";
> };
>
> + nand: nand-controller@1200 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "brcm,nand-bcm6368",

if BCM63268 is already supported by brcmnand, why should it match with
your new driver?

> + "brcm,brcmnand-v4.0",
> + "brcm,brcmnand";
> + reg-names = "nand",
> + "nand-cache",
> + "nand-int-base";
> + reg = <0x1200 0x180>,
> + <0x1600 0x200>,
> + <0x10b0 0x10>;
> + clocks = <_clk BCM63268_CLK_NAND>;
> + clock-names = "nand";
> +
> + status = "disabled";
> + };
> +
> periph_pwr: power-controller@1000184c {
> compatible = "brcm,bcm6328-power-domain";
> reg = <0x1000184c 0x4>;
>

--
- Daniel
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[U-Boot] efi_loader: LoadOptions (bootargs)

2019-08-22 Thread AKASHI Takahiro
Heinrich,

I'm now wondering whether LoadedImage's LoadOptions, which comes
from "bootargs" variable, should contain a command(application) name
as a first argument or not.

When I tried some efi application (efitools), I found that it expected
so. For example, efitools' UpdateVars.efi takes
Usage: UpdateVars.efi: [-g guid] [-a] [-e] [-b] var file

and I had to passed arguments by specifying "foo db DB.auth" for
"bootargs" where foo makes no sense.

What do you think about this issue?

Thanks,
-Takahiro Akashi
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[U-Boot] [PATCH 2/2] efi_loader: device_path: support Sandbox's "host" devices

2019-08-22 Thread AKASHI Takahiro
Sandbox's "host" devices are currently described as UCLASS_ROOT udevice
with DEV_IF_HOST block device. As the current implementation of
efi_device_path doesn't support such a type, any "host" device
on sandbox cannot be seen as a distinct object.

For example,
  => host bind 0 /foo/disk.img

  => efi devices
  Scanning disk host0...
  Found 1 disks
  Device   Device Path
   
  15c19970 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
  15c19d70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)

  => efi dh
  Handle   Protocols
   
  15c19970 Device Path, Device Path To Text, Device Path Utilities, 
Unicode Collation 2, HII String, HII Database, HII Config Routing
  15c19ba0 Driver Binding
  15c19c10 Simple Text Output
  15c19c80 Simple Text Input, Simple Text Input Ex
  15c19d70 Block IO, Device Path, Simple File System

As you can see here, efi_root (0x15c19970) and host0 device
(0x15c19d70) has the same representation of device path.

This is not only inconvenient, but also confusing since two different
efi objects are associated with the same device path and
efi_dp_find_obj() will possibly return a wrong result.

Solution:
Each "host" device should be given an additional device path node
of Logical Unit Number(LUN) to make it distinguishable. The result
would be:
  Device   Device Path
   
  15c19970 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
  15c19d70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/LUN(0)

Signed-off-by: AKASHI Takahiro 
---
 lib/efi_loader/efi_device_path.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index eeeb80683607..565bb6888fe1 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /* template END node: */
@@ -422,6 +423,10 @@ static unsigned dp_size(struct udevice *dev)
 
switch (dev->driver->id) {
case UCLASS_ROOT:
+#ifdef CONFIG_SANDBOX
+   /* stop traversing parents at this point: */
+   return sizeof(ROOT) + sizeof(struct efi_device_path_lun);
+#endif
case UCLASS_SIMPLE_BUS:
/* stop traversing parents at this point: */
return sizeof(ROOT);
@@ -505,6 +510,23 @@ static void *dp_fill(void *buf, struct udevice *dev)
 #ifdef CONFIG_BLK
case UCLASS_BLK:
switch (dev->parent->uclass->uc_drv->id) {
+#ifdef CONFIG_SANDBOX
+   case UCLASS_ROOT: {
+   /* stop traversing parents at this point: */
+   struct efi_device_path_vendor *vdp = buf;
+   struct efi_device_path_lun *dp;
+   struct host_block_dev *host_dev = dev_get_platdata(dev);
+   struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+   *vdp++ = ROOT;
+   dp = (struct efi_device_path_lun *)vdp;
+   dp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+   dp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_LUN;
+   dp->dp.length = sizeof(*dp);
+   dp->logical_unit_number = desc->devnum;
+   return ++dp;
+   }
+#endif
 #ifdef CONFIG_IDE
case UCLASS_IDE: {
struct efi_device_path_atapi *dp =
-- 
2.21.0

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Re: [U-Boot] [PATCH v4 1/4] armv8: ls1028a: The ls1028a platform supports the I2C driver model

2019-08-22 Thread Prabhakar Kushwaha

> -Original Message-
> From: Alex Marginean 
> Sent: Friday, July 12, 2019 5:17 PM
> To: Chuanhua Han ; albert.u.b...@aribaud.net;
> Sudhanshu Gupta ; Harninder Rai
> ; Rajesh Bhagat ; Andy
> Tang ; Prabhakar Kushwaha
> 
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH v4 1/4] armv8: ls1028a: The ls1028a platform
> supports the I2C driver model
> 
> On 7/10/2019 4:16 PM, Chuanhua Han wrote:
> > DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
> > I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
> > compilation, a compilation error will be generated. This patch solves
> > the problem that the i2c-related api of the ls1028a platform does not
> > support dm.
> 
> I wouldn't mention DM_I2C_COMPAT at all in the commit message, it's not
> currently enabled and after this patch set it's not needed either.
> You could just mention that the patch is updating ls1028a board init code to
> support DM_I2C.
> 
> >
> > Signed-off-by: Chuanhua Han 
> > ---
> > depends on:
> > -
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch
> work.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D113364
> data=02%7C01%7Cprabhakar.kushwaha%40nxp.com%7C6f4831088b7844837
> 72d08d706bea74c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636
> 985288233302816sdata=Fca4rUVC9A%2BemvycTWnILNfGvlg42iOlwozk
> c0ngIwM%3Dreserved=0
> > -
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch
> work.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D110856
> data=02%7C01%7Cprabhakar.kushwaha%40nxp.com%7C6f4831088b7844837
> 72d08d706bea74c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636
> 985288233302816sdata=9%2F1FmA0GZqnODbYvuX3SERC8TDcYF8eMX
> mLzILb3wH0%3Dreserved=0
> > -
> >
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D109677
> ;dat
> >
> a=02%7C01%7Cprabhakar.kushwaha%40nxp.com%7C6f4831088b784483772d
> 08d706b
> >
> ea74c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6369852882333
> 02816&
> >
> amp;sdata=HYgFDC9knJz3HdY5BLAHwotg5OutAWWEbz6xmm%2FTXzs%3D&
> amp;reserve
> > d=0
> >
> > Changes in v4:
> > - No change.
> > Changes in v3:
> > - No change.
> > Changes in v2:
> > - No change.
> >
> >   arch/arm/cpu/armv8/fsl-layerscape/Kconfig |8 
> >   board/freescale/ls1028a/ls1028a.c |8 
> >   include/configs/ls1028a_common.h  |3 ---
> >   include/configs/ls1028ardb.h  |1 -
> >   4 files changed, 8 insertions(+), 12 deletions(-)
> >
> 
> code changes look OK to me.
> 
> Reviewed-by: Alex Marginean 

This patch has been applied to fsl-qoriq master, awaiting upstream.

--pk

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[U-Boot] [PATCH 1/2] efi_loader: device_path: add Device Logical Unit sub type

2019-08-22 Thread AKASHI Takahiro
This sub type may not be very useful for normal systems,
but it will be used to support "host" devices on U-Boot sandbox
build.

See UEFI Specification 2.8, section 10.3.4.8.

Signed-off-by: AKASHI Takahiro 
---
 include/efi_api.h| 6 ++
 lib/efi_loader/efi_device_path_to_text.c | 6 ++
 2 files changed, 12 insertions(+)

diff --git a/include/efi_api.h b/include/efi_api.h
index d3fff3c57936..bb028546c864 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -427,6 +427,7 @@ struct efi_device_path_acpi_path {
 #  define DEVICE_PATH_SUB_TYPE_MSG_USB 0x05
 #  define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR0x0b
 #  define DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS   0x0f
+#  define DEVICE_PATH_SUB_TYPE_MSG_LUN 0x11
 #  define DEVICE_PATH_SUB_TYPE_MSG_SD  0x1a
 #  define DEVICE_PATH_SUB_TYPE_MSG_MMC 0x1d
 
@@ -443,6 +444,11 @@ struct efi_device_path_scsi {
u16 logical_unit_number;
 } __packed;
 
+struct efi_device_path_lun {
+   struct efi_device_path dp;
+   u8 logical_unit_number;
+} __packed;
+
 struct efi_device_path_usb {
struct efi_device_path dp;
u8 parent_port_number;
diff --git a/lib/efi_loader/efi_device_path_to_text.c 
b/lib/efi_loader/efi_device_path_to_text.c
index 96fd08971b73..8aae8215e1af 100644
--- a/lib/efi_loader/efi_device_path_to_text.c
+++ b/lib/efi_loader/efi_device_path_to_text.c
@@ -107,6 +107,12 @@ static char *dp_msging(char *s, struct efi_device_path *dp)
 ide->logical_unit_number);
break;
}
+   case DEVICE_PATH_SUB_TYPE_MSG_LUN: {
+   struct efi_device_path_lun *lun =
+   (struct efi_device_path_lun *)dp;
+   s += sprintf(s, "LUN(%u)", lun->logical_unit_number);
+   break;
+   }
case DEVICE_PATH_SUB_TYPE_MSG_USB: {
struct efi_device_path_usb *udp =
(struct efi_device_path_usb *)dp;
-- 
2.21.0

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Re: [U-Boot] [PATCH v4] drivers: net: mc: Report extra memory to Linux

2019-08-22 Thread Prabhakar Kushwaha

> -Original Message-
> From: Meenakshi Aggarwal 
> Sent: Thursday, May 23, 2019 3:14 PM
> To: u-boot@lists.denx.de; Prabhakar Kushwaha
> 
> Cc: Meenakshi Aggarwal 
> Subject: [PATCH v4] drivers: net: mc: Report extra memory to Linux
> 
> MC firmware need to be aligned to 512M, so minimum 512MB DDR is
> reserved.
> But MC support to work with 128MB or 256MB DDR memory also, in this case,
> rest of the memory is not usable.
> So reporting this extra memory to Linux through dtb memory fixup.
> 
> Signed-off-by: Meenakshi Aggarwal 
> ---
> changed for v1:
> - Incorporated review comments in one board, Missed for
> other boards
> changed for v2:
>   - Incorporated review comments in all boards changed for v3:
> - Include revision history in patch changed for v4:
>   - Remove macro TRUE/FALSE
> 
This patch has been applied to fsl-qoriq master, awaiting upstream.

--pk
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