[U-Boot] Pull request: u-boot-riscv/master

2020-02-09 Thread uboot
Hi Tom,

Please pull some riscv updates:

- Fix ax25-ae350.rst document.
- Refine RISC-V linker script and start.S.
- Add option to print more information on exception.

https://travis-ci.org/rickchen36/u-boot-riscv/builds/646697243

Thanks
Rick


The following changes since commit e1dff2d69e5a21a61c3eb28e5d230a6d48749b6c:

  Merge branch '2020-02-07-master-imports' (2020-02-07 19:04:23 -0500)

are available in the Git repository at:

  g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git

for you to fetch changes up to 404339759ef5e0bcd4fa7768d1148b1ace2d2bb6:

  riscv: Remove unnecessary instruction (2020-02-10 14:51:52 +0800)


Heinrich Schuchardt (1):
  doc: fix AX25-AE350 RISC-V documentation

Jagan Teki (1):
  doc: fix opensbi build steps for AX25-AE350

Sean Anderson (3):
  riscv: Fix breakage caused by linker relaxation
  riscv: Add option to print registers on exception
  riscv: Remove unnecessary instruction

 arch/riscv/Kconfig |   3 +
 arch/riscv/cpu/mtrap.S |   3 +-
 arch/riscv/cpu/start.S |   5 +-
 arch/riscv/cpu/u-boot.lds  |   1 -
 arch/riscv/lib/interrupts.c|  50 +
 doc/board/AndesTech/ax25-ae350.rst | 343 
+-
 6 files changed, 219 insertions(+), 186 deletions(-)


Re: dm, serial: problem with using ns16550 driver before relocation on mpc83xx

2020-02-09 Thread Heiko Schocher

Hello Mario,

Am 10.02.2020 um 07:16 schrieb Mario Six:

Hi Heiko,

On Fri, Feb 7, 2020 at 6:53 AM Heiko Schocher  wrote:


Hi Simon,

removed Dirk from cc and added Mario Six

@Mario: Dirk is maintainer of the gazerbeam board:

https://gitlab.denx.de/u-boot/u-boot/blob/master/board/gdsys/mpc8308/MAINTAINERS#L2

but EMail get not delivered to his EMail address ... so I added
you to cc ... may you have a gazerbeam board? May you can try,
if current U-Boot mainline works (in special serial console) on it?


Dirk no longer works as gdsys (which is also the reason why I'm much less
active on the mailing list than I used to be).


Ah, ok! Thanks for the info ... may you can add overtake the
maintainership for the gazerbeam board?


I have a gazerbeam board. I'll try to get some time to test mainline on it some
time this week.


Many Thanks for your time!

bye,
Heiko



thanks!


Regards,
Mario


Am 06.02.2020 um 18:46 schrieb Simon Glass:

Hi Heiko,

On Wed, 5 Feb 2020 at 22:19, Heiko Schocher  wrote:


Hello Simon,

Am 05.02.2020 um 18:59 schrieb Simon Glass:

Hi Heiko,

On Wed, 5 Feb 2020 at 02:04, Heiko Schocher  wrote:


Hello Bin, Simon,

I just porting the mpc83xx based kmcoge5ne board support DTS and got
problems using the serial ns16550 driver.

I need the serial driver before rolcation, so I enabled
"u-boot,dm-pre-reloc;" as usual in the device tree, but board does not
boot ...

I found the commit:

commit 4687919684e0e4390b9fc20d1809ecaa9dc3cb81
Author: Bin Meng 
Date:   Wed Oct 24 06:36:36 2018 -0700

serial: Remove DM_FLAG_PRE_RELOC flag in various drivers

which added to the ns16550 serial driver:

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 04b604fa2c..1e6fc6c668 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -487,7 +487,9 @@ U_BOOT_DRIVER(ns16550_serial) = {
.priv_auto_alloc_size = sizeof(struct NS16550),
.probe = ns16550_serial_probe,
.ops= &ns16550_serial_ops,
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
.flags  = DM_FLAG_PRE_RELOC,
+#endif
 };
 #endif
 #endif /* SERIAL_PRESENT */

So, as OF_CONTROL is defined for me, the flag "u-boot,dm-pre-reloc" seems
not working anymore ...

Adding this back:

hs@xmglap:u-boot-secu  [20200205-temp] $ git diff
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 9851663dc5..386ca9cffa 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -528,7 +528,7 @@ U_BOOT_DRIVER(ns16550_serial) = {
.priv_auto_alloc_size = sizeof(struct NS16550),
.probe = ns16550_serial_probe,
.ops= &ns16550_serial_ops,
-#if !CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.flags  = DM_FLAG_PRE_RELOC,
 #endif
 };

and board boots fine with the flag "u-boot,dm-pre-reloc" in DTS ...

May I do something wrong here? I found in mainline for example
the "arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi" board, which
has the exactly same dts settings than I have now.

@Dirk: Can you check, if this board boots with current mainline?

Shouldn;t be the logic, that in case OF_CONTROL is enabled and if
flag "u-boot,dm-pre-reloc" is set in DTS for the device, the device
should be bound before relocation, and we do not need to check, if
the driver sets DM_FLAG_PRE_RELOC ?

But may I miss here something ...

Any hints?


+Tom Rini

I found I needed this for rpi.

http://patchwork.ozlabs.org/patch/1202913/

But I still haven't gone back to figure out why Tom doesn't.


Hmm... I have added the "u-boot,dm-pre-reloc;" to the uart node.

Like it is for the gazerbeam board, see [1]

It works if "DM_FLAG_PRE_RELOC" is set the driver in flags... no
need for a gpio node before relocation like it is inabove patch.

I wonder if we need DM_FLAG_PRE_RELOC at all in a driver and
OF_CONTROL case. Shouldn't it be enough if the DTB node for the
driver contains the "u-boot,dm-pre-reloc;" property?


Well in the rpi case it is the pinctrl that needs that property. I
think you should dig into exactly what is going wrong on the board you
have. Then it should be possible to see what is missing and add it.


Ok, I try to find out more, thanks!

bye,
Heiko
--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de




--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de


[Patch v2 1/2] configs: ls2080ardb: Make MC_INIT access flash memory as per spi-mem

2020-02-09 Thread Kuldeep Singh
MC_INIT command currently access spi-nor flash memory directly. As per
spi-mem framework, flash memory access via absolute addresses is no more
possible. Use flash APIs to access memory instead of directly using it.

Signed-off-by: Kuldeep Singh 
---
v2:
-Rebase to top
-reword commit message

 include/configs/ls2080ardb.h | 28 ++--
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index a35bb0f..7a8168b 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -317,11 +317,15 @@ unsigned long get_board_sys_clk(void);
 #include 
 
 #ifdef CONFIG_TFABOOT
-#define QSPI_MC_INIT_CMD   \
-   "env exists secureboot && " \
-   "esbc_validate 0x2064 && "  \
-   "esbc_validate 0x2068;" \
-   "fsl_mc start mc 0x20a0 0x20e0 \0"
+#define QSPI_MC_INIT_CMD   \
+   "sf probe 0:0;sf read 0x80a0 0xa0 0x10;"\
+   " sf read 0x80e0 0xe0 0x10; "   \
+   "env exists secureboot && " \
+   "sf read 0x8064 0x64 0x4 && "   \
+   "esbc_validate 0x8064 && "  \
+   "sf read 0x8068 0x68 0x4 && "   \
+   "esbc_validate 0x8068; "\
+   "fsl_mc start mc 0x80a0 0x80e0 \0"
 #define SD_MC_INIT_CMD \
"mmcinfo;mmc read 0x80a0 0x5000 0x1200;" \
"mmc read 0x80e0 0x7000 0x800;" \
@@ -338,11 +342,15 @@ unsigned long get_board_sys_clk(void);
"fsl_mc start mc 0x580a0 0x580e0 \0"
 #else
 #ifdef CONFIG_QSPI_BOOT
-#define MC_INIT_CMD\
-   "mcinitcmd=env exists secureboot && "   \
-   "esbc_validate 0x2064 && "  \
-   "esbc_validate 0x2068;" \
-   "fsl_mc start mc 0x20a0 0x20e0 \0"
+#define MC_INIT_CMD\
+   "mcinitcmd=sf probe 0:0;sf read 0x80a0 0xa0 0x10; " \
+   " sf read 0x80e0 0xe0 0x10; "   \
+   "env exists secureboot && " \
+   "sf read 0x8064 0x64 0x4 && "   \
+   "sf read 0x8068 0x68 0x4 && "   \
+   "esbc_validate 0x8064 && "  \
+   "esbc_validate 0x8068;" \
+   "fsl_mc start mc 0x80a0 0x80e0 \0"
 #elif defined(CONFIG_SD_BOOT)
 #define MC_INIT_CMD \
"mcinitcmd=mmcinfo;mmc read 0x8000 0x5000 0x800;" \
-- 
2.7.4



[Patch v2 2/2] configs: ls2080ardb: Make BOOT command access flash memory as per spi-mem

2020-02-09 Thread Kuldeep Singh
BOOT command currently access spi-nor flash memory directly. As per spi-mem
framework, flash memory access via absolute addresses is no more possible.
Use flash APIs to access memory instead of directly using it.

Signed-off-by: Kuldeep Singh 
---
v2:
-Rebase to top
-Reword commit message

 include/configs/ls2080ardb.h | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 7a8168b..eae753d 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -505,9 +505,11 @@ unsigned long get_board_sys_clk(void);
 #ifdef CONFIG_TFABOOT
 #define QSPI_NOR_BOOTCOMMAND   \
"env exists mcinitcmd && env exists secureboot "\
-   "&& esbc_validate 0x206C; " \
+   "&& sf read 0x806c 0x6c 0x4 "   \
+   "&& esbc_validate 0x806C; " \
"env exists mcinitcmd && "  \
-   "fsl_mc lazyapply dpl 0x20d0; " \
+   "sf read 0x80d0 0xd0 0x10; "\
+   "fsl_mc lazyapply dpl 0x80d0; " \
"run distro_bootcmd;run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;"
 
@@ -535,9 +537,11 @@ unsigned long get_board_sys_clk(void);
 /* Try to boot an on-QSPI kernel first, then do normal distro boot */
 #define CONFIG_BOOTCOMMAND \
"env exists mcinitcmd && env exists secureboot "\
-   "&& esbc_validate 0x206C; " \
+   "&& sf read 0x806c 0x6c 0x4 "   \
+   "&& esbc_validate 0x806C; " \
"env exists mcinitcmd && "  \
-   "fsl_mc lazyapply dpl 0x20d0; " \
+   "sf read 0x80d0 0xd0 0x10 && "  \
+   "fsl_mc lazyapply dpl 0x80d0; " \
"run distro_bootcmd;run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;"
 #elif defined(CONFIG_SD_BOOT)
-- 
2.7.4



Re: [PATCH 1/1] doc: fix AX25-AE350 RISC-V documentation

2020-02-09 Thread Rick Chen
Hi Heinrich

> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Saturday, February 08, 2020 5:38 AM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: Bin Meng; Tom Rini; U-Boot Mailing List
> Subject: Re: [PATCH 1/1] doc: fix AX25-AE350 RISC-V documentation
>
> On 2/4/20 3:50 PM, Bin Meng wrote:
> > On Sat, Dec 28, 2019 at 2:51 AM Heinrich Schuchardt  
> > wrote:
> >>
> >> Since commit 04883bf7acca ("doc: update AX25-AE350 RISC-V
> >> documentation") `make htmldocs` produces a log of warnings like
> >>
> >> doc/board/AndesTech/ax25-ae350.rst:373:
> >> WARNING: Block quote ends without a blank line; unexpected unindent.
> >> doc/board/AndesTech/ax25-ae350.rst:0:
> >> WARNING: Undefined substitution referenced: "_ __ ___ _ __ | (___ | |_) |".
> >>
> >> Reformat the problematic passages.
> >>
> >> Fixes: 04883bf7acca ("doc: update AX25-AE350 RISC-V documentation")
> >> Signed-off-by: Heinrich Schuchardt 
> >> ---
> >>   doc/board/AndesTech/ax25-ae350.rst | 335 +++--
> >>   1 file changed, 168 insertions(+), 167 deletions(-)
> >>
> >
> > Tested-by: Bin Meng 
> >
>
> Hello Rick,
>
> I would like to implement a 'make htmldocs' test for Gitlab. This requires 
> that we fix all problems first.
>
> Please, consider merging this patch with your next pull-request.

OK.
I will send a PR to sync to master ASAP.

Thanks
Rick

>
> Thanks. Best regards.
>
> Heinrich


[PATCH] board: lx2160aqds: Add board fixup for PCIe nodes.

2020-02-09 Thread Vikas Singh
Update "board_fix_fdt" with correct counter value "i".
This will fix the issue while fetching the "reg_names"
resource from fdt after fixup.

Signed-off-by: Vikas Singh 
---
 board/freescale/lx2160a/lx2160a.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/freescale/lx2160a/lx2160a.c 
b/board/freescale/lx2160a/lx2160a.c
index 4509a34..5c23554 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -169,6 +169,7 @@ int board_fix_fdt(void *fdt)
 
reg_name = reg_names;
remaining_names_len = names_len - (reg_name - reg_names);
+   i = 0;
while ((i < ARRAY_SIZE(reg_names_map)) && remaining_names_len) {
old_name_len = strlen(reg_names_map[i].old_str);
new_name_len = strlen(reg_names_map[i].new_str);
-- 
2.7.4



Re: dm, serial: problem with using ns16550 driver before relocation on mpc83xx

2020-02-09 Thread Mario Six
Hi Heiko,

On Fri, Feb 7, 2020 at 6:53 AM Heiko Schocher  wrote:
>
> Hi Simon,
>
> removed Dirk from cc and added Mario Six
>
> @Mario: Dirk is maintainer of the gazerbeam board:
>
> https://gitlab.denx.de/u-boot/u-boot/blob/master/board/gdsys/mpc8308/MAINTAINERS#L2
>
> but EMail get not delivered to his EMail address ... so I added
> you to cc ... may you have a gazerbeam board? May you can try,
> if current U-Boot mainline works (in special serial console) on it?
>
Dirk no longer works as gdsys (which is also the reason why I'm much less
active on the mailing list than I used to be).

I have a gazerbeam board. I'll try to get some time to test mainline on it some
time this week.

> thanks!
>
Regards,
Mario

> Am 06.02.2020 um 18:46 schrieb Simon Glass:
> > Hi Heiko,
> >
> > On Wed, 5 Feb 2020 at 22:19, Heiko Schocher  wrote:
> >>
> >> Hello Simon,
> >>
> >> Am 05.02.2020 um 18:59 schrieb Simon Glass:
> >>> Hi Heiko,
> >>>
> >>> On Wed, 5 Feb 2020 at 02:04, Heiko Schocher  wrote:
> 
>  Hello Bin, Simon,
> 
>  I just porting the mpc83xx based kmcoge5ne board support DTS and got
>  problems using the serial ns16550 driver.
> 
>  I need the serial driver before rolcation, so I enabled
>  "u-boot,dm-pre-reloc;" as usual in the device tree, but board does not
>  boot ...
> 
>  I found the commit:
> 
>  commit 4687919684e0e4390b9fc20d1809ecaa9dc3cb81
>  Author: Bin Meng 
>  Date:   Wed Oct 24 06:36:36 2018 -0700
> 
> serial: Remove DM_FLAG_PRE_RELOC flag in various drivers
> 
>  which added to the ns16550 serial driver:
> 
>  diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
>  index 04b604fa2c..1e6fc6c668 100644
>  --- a/drivers/serial/ns16550.c
>  +++ b/drivers/serial/ns16550.c
>  @@ -487,7 +487,9 @@ U_BOOT_DRIVER(ns16550_serial) = {
> .priv_auto_alloc_size = sizeof(struct NS16550),
> .probe = ns16550_serial_probe,
> .ops= &ns16550_serial_ops,
>  +#if !CONFIG_IS_ENABLED(OF_CONTROL)
> .flags  = DM_FLAG_PRE_RELOC,
>  +#endif
>  };
>  #endif
>  #endif /* SERIAL_PRESENT */
> 
>  So, as OF_CONTROL is defined for me, the flag "u-boot,dm-pre-reloc" seems
>  not working anymore ...
> 
>  Adding this back:
> 
>  hs@xmglap:u-boot-secu  [20200205-temp] $ git diff
>  diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
>  index 9851663dc5..386ca9cffa 100644
>  --- a/drivers/serial/ns16550.c
>  +++ b/drivers/serial/ns16550.c
>  @@ -528,7 +528,7 @@ U_BOOT_DRIVER(ns16550_serial) = {
> .priv_auto_alloc_size = sizeof(struct NS16550),
> .probe = ns16550_serial_probe,
> .ops= &ns16550_serial_ops,
>  -#if !CONFIG_IS_ENABLED(OF_CONTROL)
>  +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
> .flags  = DM_FLAG_PRE_RELOC,
>  #endif
>  };
> 
>  and board boots fine with the flag "u-boot,dm-pre-reloc" in DTS ...
> 
>  May I do something wrong here? I found in mainline for example
>  the "arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi" board, which
>  has the exactly same dts settings than I have now.
> 
>  @Dirk: Can you check, if this board boots with current mainline?
> 
>  Shouldn;t be the logic, that in case OF_CONTROL is enabled and if
>  flag "u-boot,dm-pre-reloc" is set in DTS for the device, the device
>  should be bound before relocation, and we do not need to check, if
>  the driver sets DM_FLAG_PRE_RELOC ?
> 
>  But may I miss here something ...
> 
>  Any hints?
> >>>
> >>> +Tom Rini
> >>>
> >>> I found I needed this for rpi.
> >>>
> >>> http://patchwork.ozlabs.org/patch/1202913/
> >>>
> >>> But I still haven't gone back to figure out why Tom doesn't.
> >>
> >> Hmm... I have added the "u-boot,dm-pre-reloc;" to the uart node.
> >>
> >> Like it is for the gazerbeam board, see [1]
> >>
> >> It works if "DM_FLAG_PRE_RELOC" is set the driver in flags... no
> >> need for a gpio node before relocation like it is inabove patch.
> >>
> >> I wonder if we need DM_FLAG_PRE_RELOC at all in a driver and
> >> OF_CONTROL case. Shouldn't it be enough if the DTB node for the
> >> driver contains the "u-boot,dm-pre-reloc;" property?
> >
> > Well in the rpi case it is the pinctrl that needs that property. I
> > think you should dig into exactly what is going wrong on the board you
> > have. Then it should be possible to see what is missing and add it.
>
> Ok, I try to find out more, thanks!
>
> bye,
> Heiko
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de


[PATCH] arm: mach-k3: Fix nomenclature on Silicon Revisions

2020-02-09 Thread Lokesh Vutla
Data manual mentions the new silicon revisions as SR instead of PG. Use
the same nomenclature inside U-Boot as well.

Signed-off-by: Lokesh Vutla 
---
 arch/arm/mach-k3/common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 2f82edb970..7af60a7f2f 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -218,7 +218,7 @@ int print_cpuinfo(void)
name = "Unknown Silicon";
};
 
-   printf("%s PG ", name);
+   printf("%s SR ", name);
switch (rev) {
case REV_PG1_0:
name = "1.0";
-- 
2.23.0



Re: [PATCH] omap: move GPIO_TO_PIN macro to asm/arch-am33xx/gpio

2020-02-09 Thread Lokesh Vutla



On 10/02/20 12:22 AM, Dario Binacchi wrote:
> It's a generic macro like the others found in gpio.h which can now also
> be used in other modules besides the one in which it was previously
> defined.

hmm.. who is the user of this macro? Any drivers should directly use gpio uclass
apis. These board specific macros are meant to be deprecated.

Thanks and regards,
Lokesh

> 
> Signed-off-by: Dario Binacchi 
> ---
> 
>  arch/arm/include/asm/arch-am33xx/gpio.h | 3 +++
>  board/ti/am335x/board.c | 1 -
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/include/asm/arch-am33xx/gpio.h 
> b/arch/arm/include/asm/arch-am33xx/gpio.h
> index 24dc4bb1d0..8146f28d36 100644
> --- a/arch/arm/include/asm/arch-am33xx/gpio.h
> +++ b/arch/arm/include/asm/arch-am33xx/gpio.h
> @@ -27,4 +27,7 @@
>  
>  /* GPIO SETDATAOUT register */
>  #define GPIO_SETDATAOUT(x)   (1 << x)
> +
> +#define GPIO_TO_PIN(bank, gpio)  (32 * (bank) + (gpio))
> +
>  #endif /* _GPIO_AM33xx_H */
> diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
> index 3d7f73843c..ec4e43296d 100644
> --- a/board/ti/am335x/board.c
> +++ b/board/ti/am335x/board.c
> @@ -43,7 +43,6 @@
>  DECLARE_GLOBAL_DATA_PTR;
>  
>  /* GPIO that controls power to DDR on EVM-SK */
> -#define GPIO_TO_PIN(bank, gpio)  (32 * (bank) + (gpio))
>  #define GPIO_DDR_VTT_EN  GPIO_TO_PIN(0, 7)
>  #define ICE_GPIO_DDR_VTT_EN  GPIO_TO_PIN(0, 18)
>  #define GPIO_PR1_MII_CTRLGPIO_TO_PIN(3, 4)
> 


Re: [PATCH 10/11] arm: fdt: omap: update dts panel node

2020-02-09 Thread Lokesh Vutla



On 10/02/20 12:17 AM, Dario Binacchi wrote:
> Add the "u-boot,dm-pre-reloc" property to the "ti,tilcdc,panel"
> compatible node. In this way the video-uclass module can allocate the
> amount of memory needed to be assigned to the frame buffer.

hmm..why do you need to add pre-reloc for allocating the memory? pre-reloc flag
is needed only when probing before relocation.

> 
> Signed-off-by: Dario Binacchi 

$subject should be : arm: dts: am335x:

> ---
> 
>  arch/arm/dts/am335x-brppt1-mmc.dts  | 2 ++
>  arch/arm/dts/am335x-brppt1-nand.dts | 2 ++
>  arch/arm/dts/am335x-brppt1-spi.dts  | 2 ++
>  arch/arm/dts/am335x-brsmarc1.dts| 1 +
>  arch/arm/dts/am335x-brxre1.dts  | 2 ++
>  arch/arm/dts/am335x-evm.dts | 1 +
>  arch/arm/dts/am335x-evmsk.dts   | 1 +
>  arch/arm/dts/am335x-guardian.dts| 1 +
>  arch/arm/dts/am335x-pdu001.dts  | 1 +
>  arch/arm/dts/am335x-pxm50.dts   | 1 +
>  arch/arm/dts/am335x-rut.dts | 1 +
>  arch/arm/dts/da850-evm.dts  | 1 +
>  12 files changed, 16 insertions(+)
> 
> diff --git a/arch/arm/dts/am335x-brppt1-mmc.dts 
> b/arch/arm/dts/am335x-brppt1-mmc.dts
> index 9be34d9da0..6f919711f0 100644
> --- a/arch/arm/dts/am335x-brppt1-mmc.dts
> +++ b/arch/arm/dts/am335x-brppt1-mmc.dts
> @@ -53,6 +53,8 @@
>   bkl-pwm = <&pwmbacklight>;
>   bkl-tps = <&tps_bl>;
>  
> + u-boot,dm-pre-reloc;

This is u-boot specific dt flag. Please use it under *-u-boot.dtsi file.

Thanks and regards,
Lokesh


Re: [PATCH 09/11] video: omap: add support for DM/DTS

2020-02-09 Thread Lokesh Vutla



On 10/02/20 12:17 AM, Dario Binacchi wrote:
> Update the driver to support the device tree and the driver model.
> Timings and panel parameters are now loaded from the device tree.
> 
> The DM code replaces the am335x_lcdpanel structure with
> tilcdc_panel_info taken from the linux kernel, as well the management
> of additional parameters not covered in the legacy code. In addition,
> the am335x_lcdpanel structure contains parameters and operations that
> were probably a requirement of the board for which this driver was
> developed and which, however, were not developed in the linux kernel.
> All this led to rewrite th DM controller initialization code, except

Nice..!!

> for the pixel clock setting that is executed in a function created in a
> previous patch with code taken from the legacy am335xfb_init.
> 
> The patch has been tested on a custom board with the following DT
> configuration:
> 
>   panel {
>   compatible = "ti,tilcdc,panel";
>   pinctrl-names = "default";
>   pinctrl-0 = <&lcd_enable_pins>;
>   enable-gpios = <&gpio0 31 0>;
>   backlight = <&backlight>;
>   status = "okay";
>   u-boot,dm-pre-reloc;
>   panel-info {
>   ac-bias   = <255>;
>   ac-bias-intrpt= <0>;
>   dma-burst-sz  = <16>;
>   bpp   = <16>;
>   fdd   = <0x80>;
>   sync-edge = <0>;
>   sync-ctrl = <1>;
>   raster-order  = <0>;
>   fifo-th   = <0>;
>   };
>   display-timings {
>   native-mode = <&timing0>;
>   timing0: 800x480 {
>   hactive = <800>;
>   vactive = <480>;
>   hback-porch = <46>;
>   hfront-porch= <210>;
>   hsync-len   = <20>;
>   vback-porch = <23>;
>   vfront-porch= <22>;
>   vsync-len   = <10>;
>   clock-frequency = <3300>;
>   hsync-active= <0>;
>   vsync-active= <0>;
>   };
>   };
>   };

Are these bindings same as Linux kernel?

> 
> Signed-off-by: Dario Binacchi 
> Tested-by: Dario Binacchi 
> ---
> 
>  drivers/video/am335x-fb.c | 346 --
>  drivers/video/am335x-fb.h |   4 +
>  2 files changed, 340 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
> index e53c1d276e..e8bd9c6464 100644
> --- a/drivers/video/am335x-fb.c
> +++ b/drivers/video/am335x-fb.c
> @@ -2,6 +2,7 @@
>  /*
>   * Copyright (C) 2013-2018 Hannes Schmelzer 
>   * B&R Industrial Automation GmbH - http://www.br-automation.com
> + * Copyright (C) 2020 Dario Binacchi 
>   *
>   * minimal framebuffer driver for TI's AM335x SoC to be compatible with
>   * Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c)
> @@ -11,19 +12,18 @@
>   * - starts output DMA from gd->fb_base buffer
>   */
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
> +#include 
>  #include "am335x-fb.h"
>  
> -#if !defined(LCD_CNTL_BASE)
> -#error "hw-base address of LCD-Controller (LCD_CNTL_BASE) not defined!"
> -#endif
> -
>  #define LCDC_FMAX2
>  
>  /* LCD Control Register */
> @@ -41,6 +41,7 @@
>  #define LCDC_DMA_CTRL_BURST_40x2
>  #define LCDC_DMA_CTRL_BURST_80x3
>  #define LCDC_DMA_CTRL_BURST_16   0x4
> +#define LCDC_DMA_CTRL_FIFO_TH(x) (((x) & 0x07) << 8)
>  /* LCD Timing_0 Register */
>  #define LCDC_RASTER_TIMING_0_HORMSB(x)   (x) >> 4) - 1) & 
> 0x40) >> 4)
>  #define LCDC_RASTER_TIMING_0_HORLSB(x)   (x) >> 4) - 1) & 
> 0x3F) << 4)
> @@ -55,19 +56,26 @@
>  /* LCD Timing_2 Register */
>  #define LCDC_RASTER_TIMING_2_HFPMSB(x)   x) - 1) & 0x300) >> 
> 8)
>  #define LCDC_RASTER_TIMING_2_HBPMSB(x)   x) - 1) & 0x300) >> 
> 4)
> -#define LCDC_RASTER_TIMING_2_INVMASK(x)  ((x) & 0x3F0)
> +#define LCDC_RASTER_TIMING_2_ACB(x)  (((x) & 0xFF) << 8)
> +#define LCDC_RASTER_TIMING_2_ACBI(x) (((x) & 0x0F) << 16)
> +#define LCDC_RASTER_TIMING_2_VSYNC_INVERTBIT(20)
> +#define LCDC_RASTER_TIMING_2_HSYNC_INVERTBIT(21)
> +#define LCDC_RASTER_TIMING_2_PXCLK_INVERTBIT(22)
> +#define LCDC_RASTER_TIMING_2_DE_INVERT   BIT(23)
> +#define LCDC_RASTER_TIMING_2_HSVS_RISEFALL   BIT(24)
> +#define LC

Re: [PATCH 07/11] video: omap: add loop exit conditions to the dpll setup

2020-02-09 Thread Lokesh Vutla



On 10/02/20 12:17 AM, Dario Binacchi wrote:
> In case of null error, round rate is equal to target rate, so it is
> useless to continue to search the DPLL setup parameters to get the
> desidered pixel clock rate.
> 
> Signed-off-by: Dario Binacchi 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh




Re: [PATCH 06/11] video: omap: fix debug message

2020-02-09 Thread Lokesh Vutla



On 10/02/20 12:17 AM, Dario Binacchi wrote:
> "DISP" -> "DIV"
> 
> Signed-off-by: Dario Binacchi 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh





Re: [PATCH 01/11] video: omap: use BIT() macro

2020-02-09 Thread Lokesh Vutla



On 10/02/20 12:17 AM, Dario Binacchi wrote:
> Use the standard BIT() macro for bitfield definitions.
> 
> Signed-off-by: Dario Binacchi 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh


Re: [PATCH 02/11] video: omap: add missing bitfield masks

2020-02-09 Thread Lokesh Vutla



On 10/02/20 12:17 AM, Dario Binacchi wrote:
> Add, if missing, the bitfield masks in the setting macros of the LCD
> controller registers.

may be cleaner to use GENMASK

Thanks and regards,
Lokesh

> 
> Signed-off-by: Dario Binacchi 
> ---
> 
>  drivers/video/am335x-fb.c | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
> index 18e3bd1f35..ed445546ec 100644
> --- a/drivers/video/am335x-fb.c
> +++ b/drivers/video/am335x-fb.c
> @@ -26,14 +26,14 @@
>  #define LCDC_FMAX2
>  
>  /* LCD Control Register */
> -#define LCD_CLK_DIVISOR(x)   ((x) << 8)
> +#define LCD_CLK_DIVISOR(x)   (((x) & 0xFF) << 8)
>  #define LCD_RASTER_MODE  BIT(0)
>  /* LCD Clock Enable Register */
>  #define LCD_CORECLKENBIT(0)
>  #define LCD_LIDDCLKENBIT(1)
>  #define LCD_DMACLKEN BIT(2)
>  /* LCD DMA Control Register */
> -#define LCD_DMA_BURST_SIZE(x)((x) << 4)
> +#define LCD_DMA_BURST_SIZE(x)(((x) & 0x07) << 4)
>  #define LCD_DMA_BURST_1  0x0
>  #define LCD_DMA_BURST_2  0x1
>  #define LCD_DMA_BURST_4  0x2
> @@ -46,9 +46,9 @@
>  #define LCD_HORLSB(x)(x) >> 4)-1) & 
> 0x3F) << 4)
>  #define LCD_HORMSB(x)(x) >> 4)-1) & 
> 0x40) >> 4)
>  /* LCD Timing_1 Register */
> -#define LCD_VBP(x)   ((x) << 24)
> -#define LCD_VFP(x)   ((x) << 16)
> -#define LCD_VSW(x)   (((x)-1) << 10)
> +#define LCD_VBP(x)   (((x) & 0xFF) << 24)
> +#define LCD_VFP(x)   (((x) & 0xFF) << 16)
> +#define LCD_VSW(x)   x) - 1) & 0x3F) << 10)
>  #define LCD_VERLSB(x)(((x)-1) & 0x3FF)
>  /* LCD Timing_2 Register */
>  #define LCD_HSWMSB(x)x)-1) & 0x3C0) << 
> 21)
> 


RE: [PATCH 1/2] board: solidrun lx2160a-cex7: new board

2020-02-09 Thread Priyanka Jain (OSS)
>-Original Message-
>From: U-Boot  On Behalf Of Baruch Siach
>Sent: Thursday, February 6, 2020 5:16 PM
>To: Priyanka Jain 
>Cc: u-boot@lists.denx.de; Rabeeh Khoury 
>Subject: Re: [PATCH 1/2] board: solidrun lx2160a-cex7: new board
>
>Hi Priyanka,
>
>On Thu, Jan 23, 2020 at 11:42:56AM +0200, Baruch Siach wrote:
>> On Thu, Jan 23, 2020 at 09:25:29AM +, Priyanka Jain wrote:
>> > >-Original Message-
>> > >From: Baruch Siach 
>> > >Sent: Wednesday, December 4, 2019 6:59 PM
>> > >To: Priyanka Jain 
>> > >Cc: u-boot@lists.denx.de; Rabeeh Khoury ; Jon
>> > >Nettleton ; Baruch Siach 
>> > >Subject: [PATCH 1/2] board: solidrun lx2160a-cex7: new board
>> > >
>> > >Add board level support code for the SolidRun LX2160A based
>> > >COM-Express
>> > >7 system.
>> > >
>> > >Signed-off-by: Baruch Siach 
>> > >---
>> > This patch has  below compilation warning. Kindly fix.
>> >aarch64:  +   lx2160acex7_tfa
>> > +board/solidrun/lx2160acex7/lx2160acex7.c: In function 'uart_get_clock':
>> > +board/solidrun/lx2160acex7/lx2160acex7.c:50:18: error: implicit
>> > +declaration of function 'get_serial_clock'; did you mean
>> > +'uart_get_clock'? [-Werror=implicit-function-declaration]
>> > +  serial0.clock = get_serial_clock();
>> > +  ^~~~
>> > +  uart_get_clock
>> > +cc1: all warnings being treated as errors
>> > +make[2]: *** [board/solidrun/lx2160acex7/lx2160acex7.o] Error 1
>> > +make[1]: *** [board/solidrun/lx2160acex7] Error 2
>> > +make: *** [sub-make] Error 2
>>
>> Thanks for your review.
>>
>> This build error is because of commit d96c26040e901 ("common: Move
>> clock functions into a new file"). clock_legacy.h include in now
>> missing. I'll rebase the patches on current master and post an update.
>
>It turns out that adding clock_legacy.h is not enough. The board does not
>boot current U-Boot master with nothing shown on the console. Do you have
>any idea what LX2160A related code change might have caused that?
>
>Thanks,
>baruch
>
>
These might be related to UART related changes done by Vabhav for lx2160ardb.
Adding Vabhav to provide the details. Meanwhile, you can also check changes via 
git log.

Regards
Priyanka


RE: net: porting qe driver to DM

2020-02-09 Thread Qiang Zhao
Hi,

I will work on porting driver/qe to DM.

Best Regards
Qiang Zhao

> -Original Message-
> From: Ran Wang 
> Sent: 2020年2月3日 18:23
> To: h...@denx.de; u-boot@lists.denx.de; Qiang Zhao 
> Cc: Mario Six ; York Sun ; Xiaobo Xie
> 
> Subject: RE: net: porting qe driver to DM
> 
> Add Qiang
> 
> Thanks & Regards,
> Ran
> 
> > -Original Message-
> > From: Heiko Schocher 
> > Sent: Monday, February 03, 2020 16:11
> > To: u-boot@lists.denx.de
> > Cc: Mario Six ; York Sun ; Ran
> > Wang 
> > Subject: net: porting qe driver to DM
> >
> > Hello all,
> >
> > somebody working on porting the drivers/qe to DM ?
> >
> > Thanks!
> >
> > bye,
> > Heiko
> > --
> > DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> > Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email:
> h...@denx.de


Re: [PATCH 1/1] net: designware: speed should be in a debug message

2020-02-09 Thread Bin Meng
Hi Heinrich,

On Sun, Feb 9, 2020 at 11:58 AM Heinrich Schuchardt  wrote:
>
> On 2/9/20 3:59 AM, Bin Meng wrote:
> > On Sun, Feb 9, 2020 at 8:38 AM Heinrich Schuchardt  
> > wrote:
> >>
> >> The network connection speed is a debug information. So we should use
> >> debug() and not printf().
> >>
> >> Signed-off-by: Heinrich Schuchardt 
> >> ---
> >>   drivers/net/designware.c | 6 +++---
> >>   1 file changed, 3 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/net/designware.c b/drivers/net/designware.c
> >> index 19fc34f771..a89f4bedf1 100644
> >> --- a/drivers/net/designware.c
> >> +++ b/drivers/net/designware.c
> >> @@ -255,9 +255,9 @@ static int dw_adjust_link(struct dw_eth_dev *priv, 
> >> struct eth_mac_regs *mac_p,
> >>
> >>  writel(conf, &mac_p->conf);
> >>
> >> -   printf("Speed: %d, %s duplex%s\n", phydev->speed,
> >> -  (phydev->duplex) ? "full" : "half",
> >> -  (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
> >> +   debug("Speed: %d, %s duplex%s\n", phydev->speed,
> >> + (phydev->duplex) ? "full" : "half",
> >> + (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
> >
> > Maybe this was intentional as I see such in the MACB driver as well.
> > Leaving this to Joe and original author of this driver to comment.
>
> Thanks for reviewing.
>
> In my syslog driver
> https://lists.denx.de/pipermail/u-boot/2020-February/399551.html
> I got this message everytime that I initialized the network.

Yeah, so we probably need set up a rule for network drivers?

Regards,
Bin


Re: [PATCH] dm: fix design.rst document

2020-02-09 Thread Bin Meng
On Mon, Feb 10, 2020 at 2:57 AM Dario Binacchi  wrote:
>
> The patch fixes some errors.
>
> Signed-off-by: Dario Binacchi 
> ---
>
>  doc/driver-model/design.rst | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>

Reviewed-by: Bin Meng 


Re: [PATCH v2 1/2] rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399

2020-02-09 Thread Kever Yang



On 2020/2/3 下午9:50, su...@amarulasolutions.com wrote:

From: Suniel Mahesh 

roc-pc-rk3399 board has one user button & three user LED's. Currently
we don't have any code support for these devices. Since button and LED's are
specific to roc-pc-rk3399 board, split it into its own board file and add code
support here.

Signed-off-by: Suniel Mahesh 


Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Changes for v2:

- changed board directory and corresponding files naming convention from
   roc-rk3399-pc to roc-pc-rk3399.
- Tested on firefly roc-pc-rk3399, an rk3399 based target.
---
  arch/arm/mach-rockchip/rk3399/Kconfig   | 20 
  board/firefly/roc-pc-rk3399/Kconfig | 16 
  board/firefly/roc-pc-rk3399/MAINTAINERS |  6 ++
  board/firefly/roc-pc-rk3399/Makefile|  7 +++
  board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 29 +
  board/rockchip/evb_rk3399/MAINTAINERS   |  6 --
  configs/roc-pc-rk3399_defconfig |  1 +
  include/configs/roc-pc-rk3399.h | 22 ++
  8 files changed, 101 insertions(+), 6 deletions(-)
  create mode 100644 board/firefly/roc-pc-rk3399/Kconfig
  create mode 100644 board/firefly/roc-pc-rk3399/MAINTAINERS
  create mode 100644 board/firefly/roc-pc-rk3399/Makefile
  create mode 100644 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
  create mode 100644 include/configs/roc-pc-rk3399.h

diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig 
b/arch/arm/mach-rockchip/rk3399/Kconfig
index f994152..0dc43c2 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -81,6 +81,25 @@ config TARGET_ROCKPRO64_RK3399
   * GPIO expansion ports
   * DC 12V/2A
  
+config TARGET_ROC_PC_RK3399

+   bool "Firefly ROC-RK3399-PC board"
+   help
+ ROC-RK3399-PC is SBC produced by Firefly. Key features:
+
+  * Rockchip RK3399
+  * 4GB Dual-Channel LPDDR4 64-bit
+  * SD card slot
+  * eMMC socket
+  * 16MB SPI Flash
+  * Gigabit ethernet
+  * PCIe
+  * HDMI In/Out, DP, MIPI DSI/CSI, eDP
+  * USB 3.0, 2.0
+  * USB Type C power and data
+  * GPIO expansion ports
+  * wide voltage input(5V-15V), dual cell battery
+  * Wifi/BT accessible via expansion board M.2
+
  endchoice
  
  config ROCKCHIP_BOOT_MODE_REG

@@ -128,5 +147,6 @@ source "board/theobroma-systems/puma_rk3399/Kconfig"
  source "board/vamrs/rock960_rk3399/Kconfig"
  source "board/google/gru/Kconfig"
  source "board/pine64/rockpro64_rk3399/Kconfig"
+source "board/firefly/roc-pc-rk3399/Kconfig"
  
  endif

diff --git a/board/firefly/roc-pc-rk3399/Kconfig 
b/board/firefly/roc-pc-rk3399/Kconfig
new file mode 100644
index 000..720fbbb
--- /dev/null
+++ b/board/firefly/roc-pc-rk3399/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_ROC_PC_RK3399
+
+config SYS_BOARD
+default "roc-pc-rk3399"
+
+config SYS_VENDOR
+default "firefly"
+
+config SYS_CONFIG_NAME
+default "roc-pc-rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+def_bool y
+
+endif
+
diff --git a/board/firefly/roc-pc-rk3399/MAINTAINERS 
b/board/firefly/roc-pc-rk3399/MAINTAINERS
new file mode 100644
index 000..7564dd2
--- /dev/null
+++ b/board/firefly/roc-pc-rk3399/MAINTAINERS
@@ -0,0 +1,6 @@
+ROC-RK3399-PC
+M: Levin Du 
+S: Maintained
+F: board/firefly/roc-pc-rk3399
+F: include/configs/roc-pc-rk3399.h
+F: configs/roc-pc-rk3399_defconfig
diff --git a/board/firefly/roc-pc-rk3399/Makefile 
b/board/firefly/roc-pc-rk3399/Makefile
new file mode 100644
index 000..29c79b2
--- /dev/null
+++ b/board/firefly/roc-pc-rk3399/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2016 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  += roc-pc-rk3399.o
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
new file mode 100644
index 000..d47dba8
--- /dev/null
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_f(void)
+{
+   struct udevice *regulator;
+   int ret;
+
+   ret = regulator_get_by_platname("vcc5v0_host", ®ulator);
+   if (ret) {
+   debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
+   goto out;
+   }
+
+   ret = regulator_set_enable(regulator, true);
+   if (ret)
+   debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
+out:
+   return 0;
+}
+#endif
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS 
b/board/rockchip/evb_rk3399/MAINTAINERS
index eab4c4c..0834254 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -55,12 +55,6 @@ F:   con

Re: [PATCH v2 2/2] board: roc-pc-rk3399: Add support for onboard LED's and push button to indicate power mode

2020-02-09 Thread Kever Yang



On 2020/2/3 下午9:50, su...@amarulasolutions.com wrote:

From: Suniel Mahesh 

Added support for onboard LED's and push button. When powered board will be
in low power mode(yellow LED), on button press, board enters full power mode
(red LED) and boots u-boot.

Signed-off-by: Suniel Mahesh 


Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Changes for v2:

- Tested on firefly roc-pc-rk3399, an rk3399 based target.
---
  arch/arm/mach-rockchip/tpl.c|  7 +++
  board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 32 +
  configs/roc-pc-rk3399_defconfig |  1 +
  3 files changed, 40 insertions(+)

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 31a3eb4..a2b8d31 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -40,11 +40,18 @@ __weak void rockchip_stimer_init(void)
   TIMER_CONTROL_REG);
  }
  
+__weak int board_early_init_f(void)

+{
+   return 0;
+}
+
  void board_init_f(ulong dummy)
  {
struct udevice *dev;
int ret;
  
+	board_early_init_f();

+
  #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
/*
 * Debug UART can be used from here if required:
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index d47dba8..de9185a 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -7,6 +7,10 @@
  #include 
  #include 
  #include 
+#include 
+#include 
+#include 
+#include 
  
  #ifndef CONFIG_SPL_BUILD

  int board_early_init_f(void)
@@ -27,3 +31,31 @@ out:
return 0;
  }
  #endif
+
+#if defined(CONFIG_TPL_BUILD)
+
+#define PMUGRF_BASE 0xff32
+#define GPIO0_BASE  0xff72
+
+int board_early_init_f(void)
+{
+   struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
+   struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
+
+   /**
+* 1. Glow yellow LED, termed as low power
+* 2. Poll for on board power key press
+* 3. Once 2 done, off yellow and glow red LED, termed as full power
+* 4. Continue booting...
+*/
+   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
+
+   spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL);
+   while (readl(&gpio0->ext_port) & 0x20);
+
+   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+   spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
+
+   return 0;
+}
+#endif
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index 5a82029..36c0e0e 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -57,3 +57,4 @@ CONFIG_USB_ETHER_RTL8152=y
  CONFIG_USB_ETHER_SMSC95XX=y
  CONFIG_SPL_TINY_MEMSET=y
  CONFIG_ERRNO_STR=y
+CONFIG_TPL_GPIO_SUPPORT=y





Re: [PATCH 1/1] log: output for CONFIG_LOG=n

2020-02-09 Thread Heinrich Schuchardt

On 2/9/20 11:21 PM, Sean Anderson wrote:

On 2/9/20 4:59 PM, Heinrich Schuchardt wrote:

If CONFIG_LOG=n, we should still output errors, warnings, notices, infos,
and for DEBUG=1 also debug messages.

Signed-off-by: Heinrich Schuchardt 


Why not just change the default for CONFIG_LOG to y? This is effectively
the same, except it still allows users to completely disable logging
altogether.

--Sean



I have tested your suggestion for qemu_arm64_defconfig:

Without my patch and CONFIG_LOG=n:

u-boot.bin 664200 bytes

With my patch and CONFIG_LOG=n:

u-boot.bin 664432 bytes

Without my patch but with CONFIG_LOG=y and CONFIG_CONSOLE=y:

u-boot.bin 48 bytes

So your suggestion consumes 2216 additional bytes to produce the
essentially the same console output.

IMHO CONFIG_LOG=y is currently only helpful in the following situation:

* You are debugging your board and want to interactively change
  logging levels.
* You want to log to a remote syslog server.

Best regards

Heinrich


Re: [PATCH 1/1] log: output for CONFIG_LOG=n

2020-02-09 Thread Sean Anderson
On 2/9/20 4:59 PM, Heinrich Schuchardt wrote:
> If CONFIG_LOG=n, we should still output errors, warnings, notices, infos,
> and for DEBUG=1 also debug messages.
> 
> Signed-off-by: Heinrich Schuchardt 

Why not just change the default for CONFIG_LOG to y? This is effectively
the same, except it still allows users to completely disable logging
altogether.

--Sean


[PATCH 1/1] log: output for CONFIG_LOG=n

2020-02-09 Thread Heinrich Schuchardt
If CONFIG_LOG=n, we should still output errors, warnings, notices, infos,
and for DEBUG=1 also debug messages.

Signed-off-by: Heinrich Schuchardt 
---
 include/log.h | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/log.h b/include/log.h
index 62fb8afbd0..0453876001 100644
--- a/include/log.h
+++ b/include/log.h
@@ -115,11 +115,11 @@ static inline int _log_nop(enum log_category_t cat, enum 
log_level_t level,
 #define log_io(_fmt...)log(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt)
 #else
 #define _LOG_MAX_LEVEL LOGL_INFO
-#define log_err(_fmt...)   log_nop(LOG_CATEGORY, LOGL_ERR, ##_fmt)
-#define log_warning(_fmt...)   log_nop(LOG_CATEGORY, LOGL_WARNING, ##_fmt)
-#define log_notice(_fmt...)log_nop(LOG_CATEGORY, LOGL_NOTICE, ##_fmt)
-#define log_info(_fmt...)  log_nop(LOG_CATEGORY, LOGL_INFO, ##_fmt)
-#define log_debug(_fmt...) log_nop(LOG_CATEGORY, LOGL_DEBUG, ##_fmt)
+#define log_err(_fmt, ...) printf(_fmt, ##__VA_ARGS__)
+#define log_warning(_fmt, ...) printf(_fmt, ##__VA_ARGS__)
+#define log_notice(_fmt, ...)  printf(_fmt, ##__VA_ARGS__)
+#define log_info(_fmt, ...)printf(_fmt, ##__VA_ARGS__)
+#define log_debug(_fmt, ...)   debug(_fmt, ##__VA_ARGS__)
 #define log_content(_fmt...)   log_nop(LOG_CATEGORY, \
LOGL_DEBUG_CONTENT, ##_fmt)
 #define log_io(_fmt...)log_nop(LOG_CATEGORY, LOGL_DEBUG_IO, 
##_fmt)
--
2.24.1



[PATCH] dm: fix design.rst document

2020-02-09 Thread Dario Binacchi
The patch fixes some errors.

Signed-off-by: Dario Binacchi 
---

 doc/driver-model/design.rst | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/doc/driver-model/design.rst b/doc/driver-model/design.rst
index 8fd28c0f52..5247ecc276 100644
--- a/doc/driver-model/design.rst
+++ b/doc/driver-model/design.rst
@@ -231,7 +231,7 @@ You should see something like this::
 What is going on?
 -
 
-Let's start at the top. The demo command is in common/cmd_demo.c. It does
+Let's start at the top. The demo command is in cmd/demo.c. It does
 the usual command processing and then:
 
 .. code-block:: c
@@ -402,7 +402,7 @@ in the board file.
 
 .. code-block:: c
 
-   static const struct dm_demo_cdata red_square = {
+   static const struct dm_demo_pdata red_square = {
.colour = "red",
.sides = 4.
};
@@ -489,12 +489,12 @@ The demo uclass is declared like this:
 
 .. code-block:: c
 
-   U_BOOT_CLASS(demo) = {
+   UCLASS_DRIVER(demo) = {
.id = UCLASS_DEMO,
};
 
 It is also possible to specify special methods for probe, etc. The uclass
-numbering comes from include/dm/uclass.h. To add a new uclass, add to the
+numbering comes from include/dm/uclass-id.h. To add a new uclass, add to the
 end of the enum there, then declare your uclass as above.
 
 
-- 
2.24.0



[PATCH] omap: move GPIO_TO_PIN macro to asm/arch-am33xx/gpio

2020-02-09 Thread Dario Binacchi
It's a generic macro like the others found in gpio.h which can now also
be used in other modules besides the one in which it was previously
defined.

Signed-off-by: Dario Binacchi 
---

 arch/arm/include/asm/arch-am33xx/gpio.h | 3 +++
 board/ti/am335x/board.c | 1 -
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-am33xx/gpio.h 
b/arch/arm/include/asm/arch-am33xx/gpio.h
index 24dc4bb1d0..8146f28d36 100644
--- a/arch/arm/include/asm/arch-am33xx/gpio.h
+++ b/arch/arm/include/asm/arch-am33xx/gpio.h
@@ -27,4 +27,7 @@
 
 /* GPIO SETDATAOUT register */
 #define GPIO_SETDATAOUT(x) (1 << x)
+
+#define GPIO_TO_PIN(bank, gpio)(32 * (bank) + (gpio))
+
 #endif /* _GPIO_AM33xx_H */
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 3d7f73843c..ec4e43296d 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -43,7 +43,6 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* GPIO that controls power to DDR on EVM-SK */
-#define GPIO_TO_PIN(bank, gpio)(32 * (bank) + (gpio))
 #define GPIO_DDR_VTT_ENGPIO_TO_PIN(0, 7)
 #define ICE_GPIO_DDR_VTT_ENGPIO_TO_PIN(0, 18)
 #define GPIO_PR1_MII_CTRL  GPIO_TO_PIN(3, 4)
-- 
2.24.0



[PATCH 11/11] fdt: video: omap: add framebuffer and panel bindings

2020-02-09 Thread Dario Binacchi
Add device-tree binding documentation for ti framebuffer and generic
panel output driver.

Signed-off-by: Dario Binacchi 
---

 .../video/tilcdc/panel.txt| 66 +++
 .../video/tilcdc/tilcdc.txt   | 82 +++
 2 files changed, 148 insertions(+)
 create mode 100644 doc/device-tree-bindings/video/tilcdc/panel.txt
 create mode 100644 doc/device-tree-bindings/video/tilcdc/tilcdc.txt

diff --git a/doc/device-tree-bindings/video/tilcdc/panel.txt 
b/doc/device-tree-bindings/video/tilcdc/panel.txt
new file mode 100644
index 00..808216310e
--- /dev/null
+++ b/doc/device-tree-bindings/video/tilcdc/panel.txt
@@ -0,0 +1,66 @@
+Device-Tree bindings for tilcdc DRM generic panel output driver
+
+Required properties:
+ - compatible: value should be "ti,tilcdc,panel".
+ - panel-info: configuration info to configure LCDC correctly for the panel
+   - ac-bias: AC Bias Pin Frequency
+   - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
+   - dma-burst-sz: DMA burst size
+   - bpp: Bits per pixel
+   - fdd: FIFO DMA Request Delay
+   - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling
+   - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore
+   - raster-order: Raster Data Order Select: 1=Most-to-least 0=Least-to-most
+   - fifo-th: DMA FIFO threshold
+ - display-timings: typical videomode of lcd panel.  Multiple video modes
+   can be listed if the panel supports multiple timings, but the 'native-mode'
+   should be the preferred/default resolution.  Refer to
+   Documentation/devicetree/bindings/display/panel/display-timing.txt for 
display
+   timing binding details.
+
+Optional properties:
+- backlight: phandle of the backlight device attached to the panel
+- enable-gpios: GPIO pin to enable or disable the panel
+
+Recommended properties:
+ - pinctrl-names, pinctrl-0: the pincontrol settings to configure
+   muxing properly for pins that connect to TFP410 device
+
+Example:
+
+   /* Settings for CDTech_S035Q01 / LCD3 cape: */
+   lcd3 {
+   compatible = "ti,tilcdc,panel";
+   pinctrl-names = "default";
+   pinctrl-0 = <&bone_lcd3_cape_lcd_pins>;
+   backlight = <&backlight>;
+   enable-gpios = <&gpio3 19 0>;
+
+   panel-info {
+   ac-bias   = <255>;
+   ac-bias-intrpt= <0>;
+   dma-burst-sz  = <16>;
+   bpp   = <16>;
+   fdd   = <0x80>;
+   sync-edge = <0>;
+   sync-ctrl = <1>;
+   raster-order  = <0>;
+   fifo-th   = <0>;
+   };
+   display-timings {
+   native-mode = <&timing0>;
+   timing0: 320x240 {
+   hactive = <320>;
+   vactive = <240>;
+   hback-porch = <21>;
+   hfront-porch= <58>;
+   hsync-len   = <47>;
+   vback-porch = <11>;
+   vfront-porch= <23>;
+   vsync-len   = <2>;
+   clock-frequency = <800>;
+   hsync-active= <0>;
+   vsync-active= <0>;
+   };
+   };
+   };
diff --git a/doc/device-tree-bindings/video/tilcdc/tilcdc.txt 
b/doc/device-tree-bindings/video/tilcdc/tilcdc.txt
new file mode 100644
index 00..7bf1bb4448
--- /dev/null
+++ b/doc/device-tree-bindings/video/tilcdc/tilcdc.txt
@@ -0,0 +1,82 @@
+Device-Tree bindings for tilcdc DRM driver
+
+Required properties:
+ - compatible: value should be one of the following:
+- "ti,am33xx-tilcdc" for AM335x based boards
+- "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards
+ - interrupts: the interrupt number
+ - reg: base address and size of the LCDC device
+
+Recommended properties:
+ - ti,hwmods: Name of the hwmod associated to the LCDC
+
+Optional properties:
+ - max-bandwidth: The maximum pixels per second that the memory
+   interface / lcd controller combination can sustain
+ - max-width: The maximum horizontal pixel width supported by
+   the lcd controller.
+ - max-pixelclock: The maximum pixel clock that can be supported
+   by the lcd controller in KHz.
+ - blue-and-red-wiring: Recognized values "straight" or "crossed".
+   This property deals with the LCDC revision 2 (found on AM335x)
+   color errata [1].
+- "straight" indicates normal wiring that supports RGB565,
+  BGR888, and XBGR color formats.
+- "crossed" indicates wiring that has blue and red wires
+  crossed. This setup supports BGR565, RGB888 and XRGB
+  formats.
+- If the

[PATCH 10/11] arm: fdt: omap: update dts panel node

2020-02-09 Thread Dario Binacchi
Add the "u-boot,dm-pre-reloc" property to the "ti,tilcdc,panel"
compatible node. In this way the video-uclass module can allocate the
amount of memory needed to be assigned to the frame buffer.

Signed-off-by: Dario Binacchi 
---

 arch/arm/dts/am335x-brppt1-mmc.dts  | 2 ++
 arch/arm/dts/am335x-brppt1-nand.dts | 2 ++
 arch/arm/dts/am335x-brppt1-spi.dts  | 2 ++
 arch/arm/dts/am335x-brsmarc1.dts| 1 +
 arch/arm/dts/am335x-brxre1.dts  | 2 ++
 arch/arm/dts/am335x-evm.dts | 1 +
 arch/arm/dts/am335x-evmsk.dts   | 1 +
 arch/arm/dts/am335x-guardian.dts| 1 +
 arch/arm/dts/am335x-pdu001.dts  | 1 +
 arch/arm/dts/am335x-pxm50.dts   | 1 +
 arch/arm/dts/am335x-rut.dts | 1 +
 arch/arm/dts/da850-evm.dts  | 1 +
 12 files changed, 16 insertions(+)

diff --git a/arch/arm/dts/am335x-brppt1-mmc.dts 
b/arch/arm/dts/am335x-brppt1-mmc.dts
index 9be34d9da0..6f919711f0 100644
--- a/arch/arm/dts/am335x-brppt1-mmc.dts
+++ b/arch/arm/dts/am335x-brppt1-mmc.dts
@@ -53,6 +53,8 @@
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
 
+   u-boot,dm-pre-reloc;
+
panel-info {
ac-bias = <255>;
ac-bias-intrpt  = <0>;
diff --git a/arch/arm/dts/am335x-brppt1-nand.dts 
b/arch/arm/dts/am335x-brppt1-nand.dts
index 11bd5c551c..9d4340f591 100644
--- a/arch/arm/dts/am335x-brppt1-nand.dts
+++ b/arch/arm/dts/am335x-brppt1-nand.dts
@@ -53,6 +53,8 @@
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
 
+   u-boot,dm-pre-reloc;
+
panel-info {
ac-bias = <255>;
ac-bias-intrpt  = <0>;
diff --git a/arch/arm/dts/am335x-brppt1-spi.dts 
b/arch/arm/dts/am335x-brppt1-spi.dts
index 01ab74be5e..c078af8fba 100644
--- a/arch/arm/dts/am335x-brppt1-spi.dts
+++ b/arch/arm/dts/am335x-brppt1-spi.dts
@@ -54,6 +54,8 @@
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
 
+   u-boot,dm-pre-reloc;
+
panel-info {
ac-bias = <255>;
ac-bias-intrpt  = <0>;
diff --git a/arch/arm/dts/am335x-brsmarc1.dts b/arch/arm/dts/am335x-brsmarc1.dts
index a63fc2da22..7e9516e8f8 100644
--- a/arch/arm/dts/am335x-brsmarc1.dts
+++ b/arch/arm/dts/am335x-brsmarc1.dts
@@ -59,6 +59,7 @@
/*backlight = <&tps_bl>; */
compatible = "ti,tilcdc,panel";
status = "okay";
+   u-boot,dm-pre-reloc;
 
panel-info {
ac-bias = <255>;
diff --git a/arch/arm/dts/am335x-brxre1.dts b/arch/arm/dts/am335x-brxre1.dts
index 33d8ab78d8..6091a12fb7 100644
--- a/arch/arm/dts/am335x-brxre1.dts
+++ b/arch/arm/dts/am335x-brxre1.dts
@@ -79,6 +79,8 @@
 
backlight = <&tps_bl>;
 
+   u-boot,dm-pre-reloc;
+
panel-info {
ac-bias = <255>;
ac-bias-intrpt  = <0>;
diff --git a/arch/arm/dts/am335x-evm.dts b/arch/arm/dts/am335x-evm.dts
index 0bda4d4429..60e4991658 100644
--- a/arch/arm/dts/am335x-evm.dts
+++ b/arch/arm/dts/am335x-evm.dts
@@ -109,6 +109,7 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins_s0>;
+   u-boot,dm-pre-reloc;
panel-info {
ac-bias   = <255>;
ac-bias-intrpt= <0>;
diff --git a/arch/arm/dts/am335x-evmsk.dts b/arch/arm/dts/am335x-evmsk.dts
index 5762967cf7..3d713a6b88 100644
--- a/arch/arm/dts/am335x-evmsk.dts
+++ b/arch/arm/dts/am335x-evmsk.dts
@@ -172,6 +172,7 @@
pinctrl-0 = <&lcd_pins_default>;
pinctrl-1 = <&lcd_pins_sleep>;
status = "okay";
+   u-boot,dm-pre-reloc;
panel-info {
ac-bias   = <255>;
ac-bias-intrpt= <0>;
diff --git a/arch/arm/dts/am335x-guardian.dts b/arch/arm/dts/am335x-guardian.dts
index 5ed2133e78..9e2b9d6b48 100644
--- a/arch/arm/dts/am335x-guardian.dts
+++ b/arch/arm/dts/am335x-guardian.dts
@@ -67,6 +67,7 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
pinctrl-1 = <&lcd_pins_sleep>;
+   u-boot,dm-pre-reloc;
 
display-timings {
320x240 {
diff --git a/arch/arm/dts/am335x-pdu001.dts b/arch/arm/dts/am335x-pdu001.dts
index ae43d61f4e..13085a7884 100644
--- a/arch/arm/dts/am335x-pdu001.dts
+++ b/arch/arm/dts/am335x-pdu001.dts
@@ -54,6 +54,7 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins_s0>;
+   u-boot,dm-pre-reloc;
panel-info {
ac-bias   = <255>;
ac-bias

[PATCH 05/11] video: omap: rename LCD controller registers

2020-02-09 Thread Dario Binacchi
Add more clarity by prefixing the name of the register to the bitfields.

Signed-off-by: Dario Binacchi 
---

 drivers/video/am335x-fb.c | 107 +++---
 1 file changed, 54 insertions(+), 53 deletions(-)

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index 2facac986a..02299107af 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -26,42 +26,42 @@
 #define LCDC_FMAX  2
 
 /* LCD Control Register */
-#define LCD_RASTER_MODEBIT(0)
-#define LCD_CLK_DIVISOR(x) (((x) & 0xFF) << 8)
+#define LCDC_CTRL_RASTER_MODE  BIT(0)
+#define LCDC_CTRL_CLK_DIVISOR(x)   (((x) & 0xFF) << 8)
 /* LCD Clock Enable Register */
-#define LCD_CORECLKEN  BIT(0)
-#define LCD_LIDDCLKEN  BIT(1)
-#define LCD_DMACLKEN   BIT(2)
+#define LCDC_CLKC_ENABLE_CORECLKEN BIT(0)
+#define LCDC_CLKC_ENABLE_LIDDCLKEN BIT(1)
+#define LCDC_CLKC_ENABLE_DMACLKEN  BIT(2)
 /* LCD DMA Control Register */
-#define LCD_DMA_BURST_SIZE(x)  (((x) & 0x07) << 4)
-#define LCD_DMA_BURST_10x0
-#define LCD_DMA_BURST_20x1
-#define LCD_DMA_BURST_40x2
-#define LCD_DMA_BURST_80x3
-#define LCD_DMA_BURST_16   0x4
+#define LCDC_DMA_CTRL_BURST_SIZE(x)(((x) & 0x07) << 4)
+#define LCDC_DMA_CTRL_BURST_1  0x0
+#define LCDC_DMA_CTRL_BURST_2  0x1
+#define LCDC_DMA_CTRL_BURST_4  0x2
+#define LCDC_DMA_CTRL_BURST_8  0x3
+#define LCDC_DMA_CTRL_BURST_16 0x4
 /* LCD Timing_0 Register */
-#define LCD_HORMSB(x)  (x) >> 4) - 1) & 0x40) >> 4)
-#define LCD_HORLSB(x)  (x) >> 4) - 1) & 0x3F) << 4)
-#define LCD_HSWLSB(x)  x) - 1) & 0x3F) << 10)
-#define LCD_HFPLSB(x)  x) - 1) & 0xFF) << 16)
-#define LCD_HBPLSB(x)  x) - 1) & 0xFF) << 24)
+#define LCDC_RASTER_TIMING_0_HORMSB(x) (x) >> 4) - 1) & 0x40) >> 4)
+#define LCDC_RASTER_TIMING_0_HORLSB(x) (x) >> 4) - 1) & 0x3F) << 4)
+#define LCDC_RASTER_TIMING_0_HSWLSB(x) x) - 1) & 0x3F) << 10)
+#define LCDC_RASTER_TIMING_0_HFPLSB(x) x) - 1) & 0xFF) << 16)
+#define LCDC_RASTER_TIMING_0_HBPLSB(x) x) - 1) & 0xFF) << 24)
 /* LCD Timing_1 Register */
-#define LCD_VERLSB(x)  (((x) - 1) & 0x3FF)
-#define LCD_VSW(x) x) - 1) & 0x3F) << 10)
-#define LCD_VFP(x) (((x) & 0xFF) << 16)
-#define LCD_VBP(x) (((x) & 0xFF) << 24)
+#define LCDC_RASTER_TIMING_1_VERLSB(x) (((x) - 1) & 0x3FF)
+#define LCDC_RASTER_TIMING_1_VSW(x)x) - 1) & 0x3F) << 10)
+#define LCDC_RASTER_TIMING_1_VFP(x)(((x) & 0xFF) << 16)
+#define LCDC_RASTER_TIMING_1_VBP(x)(((x) & 0xFF) << 24)
 /* LCD Timing_2 Register */
-#define LCD_HFPMSB(x)  x) - 1) & 0x300) >> 8)
-#define LCD_HBPMSB(x)  x) - 1) & 0x300) >> 4)
-#define LCD_INVMASK(x) ((x) & 0x3F0)
-#define LCD_VERMSB(x)  x) - 1) & 0x400) << 16)
-#define LCD_HSWMSB(x)  x) - 1) & 0x3C0) << 21)
+#define LCDC_RASTER_TIMING_2_HFPMSB(x) x) - 1) & 0x300) >> 8)
+#define LCDC_RASTER_TIMING_2_HBPMSB(x) x) - 1) & 0x300) >> 4)
+#define LCDC_RASTER_TIMING_2_INVMASK(x)((x) & 0x3F0)
+#define LCDC_RASTER_TIMING_2_VERMSB(x) x) - 1) & 0x400) << 16)
+#define LCDC_RASTER_TIMING_2_HSWMSB(x) x) - 1) & 0x3C0) << 21)
 /* LCD Raster Ctrl Register */
-#define LCD_RASTER_ENABLE  BIT(0)
-#define LCD_TFT_MODE   BIT(7)
-#define LCD_PALMODE_RAWDATA(0x02 << 20)
-#define LCD_TFT_24BPP_MODE BIT(25)
-#define LCD_TFT_24BPP_UNPACK   BIT(26)
+#define LCDC_RASTER_CTRL_ENABLEBIT(0)
+#define LCDC_RASTER_CTRL_TFT_MODE  BIT(7)
+#define LCDC_RASTER_CTRL_PALMODE_RAWDATA   (0x02 << 20)
+#define LCDC_RASTER_CTRL_TFT_24BPP_MODEBIT(25)
+#define LCDC_RASTER_CTRL_TFT_24BPP_UNPACK  BIT(26)
 
 /* Macro definitions */
 #define FBSIZE(x)  ((x->hactive * x->vactive * x->bpp) >> 3)
@@ -131,10 +131,10 @@ int am335xfb_init(struct am335x_lcdpanel *panel)
case 16:
break;
case 32:
-   raster_ctrl |= LCD_TFT_24BPP_UNPACK;
+   raster_ctrl |= LCDC_RASTER_CTRL_TFT_24BPP_UNPACK;
/* fallthrough *

[PATCH 09/11] video: omap: add support for DM/DTS

2020-02-09 Thread Dario Binacchi
Update the driver to support the device tree and the driver model.
Timings and panel parameters are now loaded from the device tree.

The DM code replaces the am335x_lcdpanel structure with
tilcdc_panel_info taken from the linux kernel, as well the management
of additional parameters not covered in the legacy code. In addition,
the am335x_lcdpanel structure contains parameters and operations that
were probably a requirement of the board for which this driver was
developed and which, however, were not developed in the linux kernel.
All this led to rewrite th DM controller initialization code, except
for the pixel clock setting that is executed in a function created in a
previous patch with code taken from the legacy am335xfb_init.

The patch has been tested on a custom board with the following DT
configuration:

panel {
compatible = "ti,tilcdc,panel";
pinctrl-names = "default";
pinctrl-0 = <&lcd_enable_pins>;
enable-gpios = <&gpio0 31 0>;
backlight = <&backlight>;
status = "okay";
u-boot,dm-pre-reloc;
panel-info {
ac-bias   = <255>;
ac-bias-intrpt= <0>;
dma-burst-sz  = <16>;
bpp   = <16>;
fdd   = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order  = <0>;
fifo-th   = <0>;
};
display-timings {
native-mode = <&timing0>;
timing0: 800x480 {
hactive = <800>;
vactive = <480>;
hback-porch = <46>;
hfront-porch= <210>;
hsync-len   = <20>;
vback-porch = <23>;
vfront-porch= <22>;
vsync-len   = <10>;
clock-frequency = <3300>;
hsync-active= <0>;
vsync-active= <0>;
};
};
};

Signed-off-by: Dario Binacchi 
Tested-by: Dario Binacchi 
---

 drivers/video/am335x-fb.c | 346 --
 drivers/video/am335x-fb.h |   4 +
 2 files changed, 340 insertions(+), 10 deletions(-)

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index e53c1d276e..e8bd9c6464 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -2,6 +2,7 @@
 /*
  * Copyright (C) 2013-2018 Hannes Schmelzer 
  * B&R Industrial Automation GmbH - http://www.br-automation.com
+ * Copyright (C) 2020 Dario Binacchi 
  *
  * minimal framebuffer driver for TI's AM335x SoC to be compatible with
  * Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c)
@@ -11,19 +12,18 @@
  * - starts output DMA from gd->fb_base buffer
  */
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include "am335x-fb.h"
 
-#if !defined(LCD_CNTL_BASE)
-#error "hw-base address of LCD-Controller (LCD_CNTL_BASE) not defined!"
-#endif
-
 #define LCDC_FMAX  2
 
 /* LCD Control Register */
@@ -41,6 +41,7 @@
 #define LCDC_DMA_CTRL_BURST_4  0x2
 #define LCDC_DMA_CTRL_BURST_8  0x3
 #define LCDC_DMA_CTRL_BURST_16 0x4
+#define LCDC_DMA_CTRL_FIFO_TH(x)   (((x) & 0x07) << 8)
 /* LCD Timing_0 Register */
 #define LCDC_RASTER_TIMING_0_HORMSB(x) (x) >> 4) - 1) & 0x40) >> 4)
 #define LCDC_RASTER_TIMING_0_HORLSB(x) (x) >> 4) - 1) & 0x3F) << 4)
@@ -55,19 +56,26 @@
 /* LCD Timing_2 Register */
 #define LCDC_RASTER_TIMING_2_HFPMSB(x) x) - 1) & 0x300) >> 8)
 #define LCDC_RASTER_TIMING_2_HBPMSB(x) x) - 1) & 0x300) >> 4)
-#define LCDC_RASTER_TIMING_2_INVMASK(x)((x) & 0x3F0)
+#define LCDC_RASTER_TIMING_2_ACB(x)(((x) & 0xFF) << 8)
+#define LCDC_RASTER_TIMING_2_ACBI(x)   (((x) & 0x0F) << 16)
+#define LCDC_RASTER_TIMING_2_VSYNC_INVERT  BIT(20)
+#define LCDC_RASTER_TIMING_2_HSYNC_INVERT  BIT(21)
+#define LCDC_RASTER_TIMING_2_PXCLK_INVERT  BIT(22)
+#define LCDC_RASTER_TIMING_2_DE_INVERT BIT(23)
+#define LCDC_RASTER_TIMING_2_HSVS_RISEFALL BIT(24)
+#define LCDC_RASTER_TIMING_2_HSVS_CONTROL  BIT(25)
 #define LCDC_RASTER_TIMING_2_VERMSB(x) x) - 1) & 0x400) << 16)
 #define LCDC_RASTER_TIMING_2_HSWMSB(x) x) - 1) & 0x3C0) << 21)
 /* LCD Raster Ctrl Register */
 #define LCDC_RASTER_CTRL_ENABLEBIT(0)
 #define LCDC

[PATCH 07/11] video: omap: add loop exit conditions to the dpll setup

2020-02-09 Thread Dario Binacchi
In case of null error, round rate is equal to target rate, so it is
useless to continue to search the DPLL setup parameters to get the
desidered pixel clock rate.

Signed-off-by: Dario Binacchi 
---

 drivers/video/am335x-fb.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index 779032396e..bb89cb515d 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -160,7 +160,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel)
err = panel->pxl_clk;
err_r = err;
 
-   for (d = 2; d < 255; d++) {
+   for (d = 2; err_r && d < 255; d++) {
for (m = 2; m < 2047; m++) {
if ((V_OSCK * m) < (panel->pxl_clk * d))
continue;
@@ -176,6 +176,8 @@ int am335xfb_init(struct am335x_lcdpanel *panel)
dpll_disp.m = m;
dpll_disp.n = n;
best_d = d;
+   if (err_r == 0)
+   break;
}
}
}
-- 
2.24.0



[PATCH 06/11] video: omap: fix debug message

2020-02-09 Thread Dario Binacchi
"DISP" -> "DIV"

Signed-off-by: Dario Binacchi 
---

 drivers/video/am335x-fb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index 02299107af..779032396e 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -179,7 +179,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel)
}
}
}
-   debug("%s: PLL: best error %d Hz (M %d, N %d, DISP %d)\n",
+   debug("%s: PLL: best error %d Hz (M %d, N %d, DIV %d)\n",
  __func__, err_r, dpll_disp.m, dpll_disp.n, best_d);
do_setup_dpll(&dpll_disp_regs, &dpll_disp);
 
-- 
2.24.0



[PATCH 08/11] video: omap: create two routines to set the pixel clock rate

2020-02-09 Thread Dario Binacchi
Created in preparation to support driver-model, they can also be called
from legacy code. In this way, code duplication is avoided.

Signed-off-by: Dario Binacchi 
---

 drivers/video/am335x-fb.c | 130 --
 1 file changed, 97 insertions(+), 33 deletions(-)

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index bb89cb515d..e53c1d276e 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include "am335x-fb.h"
 
@@ -26,6 +27,7 @@
 #define LCDC_FMAX  2
 
 /* LCD Control Register */
+#define LCDC_CTRL_CLK_DIVISOR_MASK (0xFF00)
 #define LCDC_CTRL_RASTER_MODE  BIT(0)
 #define LCDC_CTRL_CLK_DIVISOR(x)   (((x) & 0xFF) << 8)
 /* LCD Clock Enable Register */
@@ -98,10 +100,95 @@ struct am335x_lcdhw {
unsigned intclkc_reset; /* 0x70 */
 };
 
+struct dpll_data {
+   unsigned long rounded_rate;
+   u16 rounded_m;
+   u8 rounded_n;
+   u8 rounded_div;
+};
+
 static struct am335x_lcdhw *lcdhw = (void *)LCD_CNTL_BASE;
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/**
+ * am335x_dpll_round_rate() - Round a target rate for an OMAP DPLL
+ *
+ * @dpll_data: struct dpll_data pointer for the DPLL
+ * @rate:  New DPLL clock rate
+ * @return rounded rate and the computed m, n and div values in the dpll_data
+ * structure, or -ve error code.
+ */
+static ulong am335x_dpll_round_rate(struct dpll_data *dd, ulong rate)
+{
+   unsigned int m, n, d;
+   unsigned long rounded_rate;
+   int err, err_r;
+
+   dd->rounded_rate = -EFAULT;
+   err = rate;
+   err_r = err;
+
+   for (d = 2; err && d < 255; d++) {
+   for (m = 2; m < 2047; m++) {
+   if ((V_OSCK * m) < (rate * d))
+   continue;
+
+   n = (V_OSCK * m) / (rate * d);
+   if (n > 127)
+   break;
+
+   if (((V_OSCK * m) / n) > LCDC_FMAX)
+   break;
+
+   rounded_rate = (V_OSCK * m) / n / d;
+   err = abs(rounded_rate - rate);
+   if (err < err_r) {
+   err_r = err;
+   dd->rounded_rate = rounded_rate;
+   dd->rounded_m = m;
+   dd->rounded_n = n;
+   dd->rounded_div = d;
+   if (err == 0)
+   break;
+   }
+   }
+   }
+
+   debug("DPLL display: best error %d Hz (M %d, N %d, DIV %d)\n",
+ err_r, dd->rounded_m, dd->rounded_n, dd->rounded_div);
+
+   return dd->rounded_rate;
+}
+
+/**
+ * am335x_fb_set_pixel_clk_rate() - Set pixel clock rate.
+ *
+ * @am335x_lcdhw: Base address of the LCD controller registers.
+ * @rate: New clock rate in Hz.
+ * @return new rate, or -ve error code.
+ */
+static ulong am335x_fb_set_pixel_clk_rate(struct am335x_lcdhw *regs, ulong 
rate)
+{
+   struct dpll_params dpll_disp = { 1, 0, 1, -1, -1, -1, -1 };
+   struct dpll_data dd;
+   ulong round_rate;
+   u32 reg;
+
+   round_rate = am335x_dpll_round_rate(&dd, rate);
+   if (IS_ERR_VALUE(round_rate))
+   return round_rate;
+
+   dpll_disp.m = dd.rounded_m;
+   dpll_disp.n = dd.rounded_n;
+   do_setup_dpll(&dpll_disp_regs, &dpll_disp);
+
+   reg = readl(®s->ctrl) & ~LCDC_CTRL_CLK_DIVISOR_MASK;
+   reg |= LCDC_CTRL_CLK_DIVISOR(dd.rounded_div);
+   writel(reg, ®s->ctrl);
+   return round_rate;
+}
+
 int lcd_get_size(int *line_length)
 {
*line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
@@ -111,11 +198,9 @@ int lcd_get_size(int *line_length)
 int am335xfb_init(struct am335x_lcdpanel *panel)
 {
u32 raster_ctrl = 0;
-
struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL;
-   struct dpll_params dpll_disp = { 1, 0, 1, -1, -1, -1, -1 };
-   unsigned int m, n, d, best_d = 2;
-   int err = 0, err_r = 0;
+   ulong rate;
+   u32 reg;
 
if (gd->fb_base == 0) {
printf("ERROR: no valid fb_base stored in GLOBAL_DATA_PTR!\n");
@@ -156,34 +241,9 @@ int am335xfb_init(struct am335x_lcdpanel *panel)
debug("using frambuffer at 0x%08x with size %d.\n",
  (unsigned int)gd->fb_base, FBSIZE(panel));
 
-   /* setup display pll for requested clock frequency */
-   err = panel->pxl_clk;
-   err_r = err;
-
-   for (d = 2; err_r && d < 255; d++) {
-   for (m = 2; m < 2047; m++) {
-   if ((V_OSCK * m) < (panel->pxl_clk * d))
-   continue;
-   n = (V_OSCK * m) / (panel->pxl_clk * d);
-   

[PATCH 04/11] video: omap: fix bitfields order

2020-02-09 Thread Dario Binacchi
Arrange the bitfields of each register in the ascending order.

Signed-off-by: Dario Binacchi 
---

 drivers/video/am335x-fb.c | 29 ++---
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index 17476f5b72..2facac986a 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -26,8 +26,8 @@
 #define LCDC_FMAX  2
 
 /* LCD Control Register */
-#define LCD_CLK_DIVISOR(x) (((x) & 0xFF) << 8)
 #define LCD_RASTER_MODEBIT(0)
+#define LCD_CLK_DIVISOR(x) (((x) & 0xFF) << 8)
 /* LCD Clock Enable Register */
 #define LCD_CORECLKEN  BIT(0)
 #define LCD_LIDDCLKEN  BIT(1)
@@ -40,29 +40,28 @@
 #define LCD_DMA_BURST_80x3
 #define LCD_DMA_BURST_16   0x4
 /* LCD Timing_0 Register */
-#define LCD_HBPLSB(x)  x) - 1) & 0xFF) << 24)
-#define LCD_HFPLSB(x)  x) - 1) & 0xFF) << 16)
-#define LCD_HSWLSB(x)  x) - 1) & 0x3F) << 10)
-#define LCD_HORLSB(x)  (x) >> 4) - 1) & 0x3F) << 4)
 #define LCD_HORMSB(x)  (x) >> 4) - 1) & 0x40) >> 4)
+#define LCD_HORLSB(x)  (x) >> 4) - 1) & 0x3F) << 4)
+#define LCD_HSWLSB(x)  x) - 1) & 0x3F) << 10)
+#define LCD_HFPLSB(x)  x) - 1) & 0xFF) << 16)
+#define LCD_HBPLSB(x)  x) - 1) & 0xFF) << 24)
 /* LCD Timing_1 Register */
-#define LCD_VBP(x) (((x) & 0xFF) << 24)
-#define LCD_VFP(x) (((x) & 0xFF) << 16)
-#define LCD_VSW(x) x) - 1) & 0x3F) << 10)
 #define LCD_VERLSB(x)  (((x) - 1) & 0x3FF)
+#define LCD_VSW(x) x) - 1) & 0x3F) << 10)
+#define LCD_VFP(x) (((x) & 0xFF) << 16)
+#define LCD_VBP(x) (((x) & 0xFF) << 24)
 /* LCD Timing_2 Register */
-#define LCD_HSWMSB(x)  x) - 1) & 0x3C0) << 21)
-#define LCD_VERMSB(x)  x) - 1) & 0x400) << 16)
-#define LCD_HBPMSB(x)  x) - 1) & 0x300) >> 4)
 #define LCD_HFPMSB(x)  x) - 1) & 0x300) >> 8)
+#define LCD_HBPMSB(x)  x) - 1) & 0x300) >> 4)
 #define LCD_INVMASK(x) ((x) & 0x3F0)
+#define LCD_VERMSB(x)  x) - 1) & 0x400) << 16)
+#define LCD_HSWMSB(x)  x) - 1) & 0x3C0) << 21)
 /* LCD Raster Ctrl Register */
+#define LCD_RASTER_ENABLE  BIT(0)
+#define LCD_TFT_MODE   BIT(7)
+#define LCD_PALMODE_RAWDATA(0x02 << 20)
 #define LCD_TFT_24BPP_MODE BIT(25)
 #define LCD_TFT_24BPP_UNPACK   BIT(26)
-#define LCD_PALMODE_RAWDATA(0x02 << 20)
-#define LCD_TFT_MODE   BIT(7)
-#define LCD_RASTER_ENABLE  BIT(0)
-
 
 /* Macro definitions */
 #define FBSIZE(x)  ((x->hactive * x->vactive * x->bpp) >> 3)
-- 
2.24.0



[PATCH 00/11] Add DM/DTS support for omap video driver

2020-02-09 Thread Dario Binacchi


Changes:

 * Fix coding style
 * Refactor some parts of the driver
 * Add support for driver model and device-tree
 * Update the boards device-tree
 * Add device-tree binding documentation


Dario Binacchi (11):
  video: omap: use BIT() macro
  video: omap: add missing bitfield masks
  video: omap: fix coding style on use of spaces
  video: omap: fix bitfields order
  video: omap: rename LCD controller registers
  video: omap: fix debug message
  video: omap: add loop exit conditions to the dpll setup
  video: omap: create two routines to set the pixel clock rate
  video: omap: add support for DM/DTS
  arm: fdt: omap: update dts panel node
  fdt: video: omap: add framebuffer and panel bindings

 arch/arm/dts/am335x-brppt1-mmc.dts|   2 +
 arch/arm/dts/am335x-brppt1-nand.dts   |   2 +
 arch/arm/dts/am335x-brppt1-spi.dts|   2 +
 arch/arm/dts/am335x-brsmarc1.dts  |   1 +
 arch/arm/dts/am335x-brxre1.dts|   2 +
 arch/arm/dts/am335x-evm.dts   |   1 +
 arch/arm/dts/am335x-evmsk.dts |   1 +
 arch/arm/dts/am335x-guardian.dts  |   1 +
 arch/arm/dts/am335x-pdu001.dts|   1 +
 arch/arm/dts/am335x-pxm50.dts |   1 +
 arch/arm/dts/am335x-rut.dts   |   1 +
 arch/arm/dts/da850-evm.dts|   1 +
 .../video/tilcdc/panel.txt|  66 ++
 .../video/tilcdc/tilcdc.txt   |  82 +++
 drivers/video/am335x-fb.c | 576 +++---
 drivers/video/am335x-fb.h |  16 +-
 16 files changed, 658 insertions(+), 98 deletions(-)
 create mode 100644 doc/device-tree-bindings/video/tilcdc/panel.txt
 create mode 100644 doc/device-tree-bindings/video/tilcdc/tilcdc.txt

-- 
2.24.0



[PATCH 01/11] video: omap: use BIT() macro

2020-02-09 Thread Dario Binacchi
Use the standard BIT() macro for bitfield definitions.

Signed-off-by: Dario Binacchi 
---

 drivers/video/am335x-fb.c | 16 
 drivers/video/am335x-fb.h | 12 ++--
 2 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index 51c1af587f..18e3bd1f35 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -27,11 +27,11 @@
 
 /* LCD Control Register */
 #define LCD_CLK_DIVISOR(x) ((x) << 8)
-#define LCD_RASTER_MODE0x01
+#define LCD_RASTER_MODEBIT(0)
 /* LCD Clock Enable Register */
-#define LCD_CORECLKEN  (0x01 << 0)
-#define LCD_LIDDCLKEN  (0x01 << 1)
-#define LCD_DMACLKEN   (0x01 << 2)
+#define LCD_CORECLKEN  BIT(0)
+#define LCD_LIDDCLKEN  BIT(1)
+#define LCD_DMACLKEN   BIT(2)
 /* LCD DMA Control Register */
 #define LCD_DMA_BURST_SIZE(x)  ((x) << 4)
 #define LCD_DMA_BURST_10x0
@@ -57,11 +57,11 @@
 #define LCD_HFPMSB(x)  x)-1) & 0x300) >> 8)
 #define LCD_INVMASK(x) ((x) & 0x3F0)
 /* LCD Raster Ctrl Register */
-#define LCD_TFT_24BPP_MODE (1 << 25)
-#define LCD_TFT_24BPP_UNPACK   (1 << 26)
+#define LCD_TFT_24BPP_MODE BIT(25)
+#define LCD_TFT_24BPP_UNPACK   BIT(26)
 #define LCD_PALMODE_RAWDATA(0x02 << 20)
-#define LCD_TFT_MODE   (0x01 << 7)
-#define LCD_RASTER_ENABLE  (0x01 << 0)
+#define LCD_TFT_MODE   BIT(7)
+#define LCD_RASTER_ENABLE  BIT(0)
 
 
 /* Macro definitions */
diff --git a/drivers/video/am335x-fb.h b/drivers/video/am335x-fb.h
index f5883c02dd..ad9b015e09 100644
--- a/drivers/video/am335x-fb.h
+++ b/drivers/video/am335x-fb.h
@@ -7,7 +7,7 @@
 #ifndef AM335X_FB_H
 #define AM335X_FB_H
 
-#define HSVS_CONTROL   (0x01 << 25)/*
+#define HSVS_CONTROL   BIT(25) /*
 * 0 = lcd_lp and lcd_fp are driven on
 * opposite edges of pixel clock than
 * the lcd_pixel_o
@@ -17,7 +17,7 @@
 * Matrix displays the edge timing is
 * fixed
 */
-#define HSVS_RISEFALL  (0x01 << 24)/*
+#define HSVS_RISEFALL  BIT(24) /*
 * 0 = lcd_lp and lcd_fp are driven on
 * the rising edge of pixel clock (bit
 * 25 must be set to 1)
@@ -25,19 +25,19 @@
 * the falling edge of pixel clock (bit
 * 25 must be set to 1)
 */
-#define DE_INVERT  (0x01 << 23)/*
+#define DE_INVERT  BIT(23) /*
 * 0 = DE is low-active
 * 1 = DE is high-active
 */
-#define PXCLK_INVERT   (0x01 << 22)/*
+#define PXCLK_INVERT   BIT(22) /*
 * 0 = pix-clk is high-active
 * 1 = pic-clk is low-active
 */
-#define HSYNC_INVERT   (0x01 << 21)/*
+#define HSYNC_INVERT   BIT(21) /*
 * 0 = HSYNC is active high
 * 1 = HSYNC is avtive low
 */
-#define VSYNC_INVERT   (0x01 << 20)/*
+#define VSYNC_INVERT   BIT(20) /*
 * 0 = VSYNC is active high
 * 1 = VSYNC is active low
 */
-- 
2.24.0



[PATCH 02/11] video: omap: add missing bitfield masks

2020-02-09 Thread Dario Binacchi
Add, if missing, the bitfield masks in the setting macros of the LCD
controller registers.

Signed-off-by: Dario Binacchi 
---

 drivers/video/am335x-fb.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index 18e3bd1f35..ed445546ec 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -26,14 +26,14 @@
 #define LCDC_FMAX  2
 
 /* LCD Control Register */
-#define LCD_CLK_DIVISOR(x) ((x) << 8)
+#define LCD_CLK_DIVISOR(x) (((x) & 0xFF) << 8)
 #define LCD_RASTER_MODEBIT(0)
 /* LCD Clock Enable Register */
 #define LCD_CORECLKEN  BIT(0)
 #define LCD_LIDDCLKEN  BIT(1)
 #define LCD_DMACLKEN   BIT(2)
 /* LCD DMA Control Register */
-#define LCD_DMA_BURST_SIZE(x)  ((x) << 4)
+#define LCD_DMA_BURST_SIZE(x)  (((x) & 0x07) << 4)
 #define LCD_DMA_BURST_10x0
 #define LCD_DMA_BURST_20x1
 #define LCD_DMA_BURST_40x2
@@ -46,9 +46,9 @@
 #define LCD_HORLSB(x)  (x) >> 4)-1) & 0x3F) << 4)
 #define LCD_HORMSB(x)  (x) >> 4)-1) & 0x40) >> 4)
 /* LCD Timing_1 Register */
-#define LCD_VBP(x) ((x) << 24)
-#define LCD_VFP(x) ((x) << 16)
-#define LCD_VSW(x) (((x)-1) << 10)
+#define LCD_VBP(x) (((x) & 0xFF) << 24)
+#define LCD_VFP(x) (((x) & 0xFF) << 16)
+#define LCD_VSW(x) x) - 1) & 0x3F) << 10)
 #define LCD_VERLSB(x)  (((x)-1) & 0x3FF)
 /* LCD Timing_2 Register */
 #define LCD_HSWMSB(x)  x)-1) & 0x3C0) << 21)
-- 
2.24.0



[PATCH 03/11] video: omap: fix coding style on use of spaces

2020-02-09 Thread Dario Binacchi
Use one space around (on each side of) the binary '-' operator.

Signed-off-by: Dario Binacchi 
---

 drivers/video/am335x-fb.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index ed445546ec..17476f5b72 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -40,21 +40,21 @@
 #define LCD_DMA_BURST_80x3
 #define LCD_DMA_BURST_16   0x4
 /* LCD Timing_0 Register */
-#define LCD_HBPLSB(x)  x)-1) & 0xFF) << 24)
-#define LCD_HFPLSB(x)  x)-1) & 0xFF) << 16)
-#define LCD_HSWLSB(x)  x)-1) & 0x3F) << 10)
-#define LCD_HORLSB(x)  (x) >> 4)-1) & 0x3F) << 4)
-#define LCD_HORMSB(x)  (x) >> 4)-1) & 0x40) >> 4)
+#define LCD_HBPLSB(x)  x) - 1) & 0xFF) << 24)
+#define LCD_HFPLSB(x)  x) - 1) & 0xFF) << 16)
+#define LCD_HSWLSB(x)  x) - 1) & 0x3F) << 10)
+#define LCD_HORLSB(x)  (x) >> 4) - 1) & 0x3F) << 4)
+#define LCD_HORMSB(x)  (x) >> 4) - 1) & 0x40) >> 4)
 /* LCD Timing_1 Register */
 #define LCD_VBP(x) (((x) & 0xFF) << 24)
 #define LCD_VFP(x) (((x) & 0xFF) << 16)
 #define LCD_VSW(x) x) - 1) & 0x3F) << 10)
-#define LCD_VERLSB(x)  (((x)-1) & 0x3FF)
+#define LCD_VERLSB(x)  (((x) - 1) & 0x3FF)
 /* LCD Timing_2 Register */
-#define LCD_HSWMSB(x)  x)-1) & 0x3C0) << 21)
-#define LCD_VERMSB(x)  x)-1) & 0x400) << 16)
-#define LCD_HBPMSB(x)  x)-1) & 0x300) >> 4)
-#define LCD_HFPMSB(x)  x)-1) & 0x300) >> 8)
+#define LCD_HSWMSB(x)  x) - 1) & 0x3C0) << 21)
+#define LCD_VERMSB(x)  x) - 1) & 0x400) << 16)
+#define LCD_HBPMSB(x)  x) - 1) & 0x300) >> 4)
+#define LCD_HFPMSB(x)  x) - 1) & 0x300) >> 8)
 #define LCD_INVMASK(x) ((x) & 0x3F0)
 /* LCD Raster Ctrl Register */
 #define LCD_TFT_24BPP_MODE BIT(25)
-- 
2.24.0



Re: [U-Boot] [PATCH] net: eth-uclass: Remove warning about ROM MAC address

2020-02-09 Thread Joe Hershberger
On Tue, Jan 28, 2020 at 10:33 AM Fabio Estevam  wrote:
>
> Hi Joe,
>
> Ping
>
> On Mon, Jan 6, 2020 at 8:32 PM Fabio Estevam  wrote:
> >
> > Hi Joe,
> >
> > On Wed, Dec 11, 2019 at 8:54 AM Schrempf Frieder
> >  wrote:
> > >
> > > On 11.10.19 01:00, Soeren Moch wrote:
> > > > Using a MAC address from ROM storage is the normal case for most
> > > > ethernet hardware. Why should we warn about this?
> > > >
> > > > Signed-off-by: Soeren Moch 
> > >
> > > Some months ago I came up with the very same patch and I currently have
> > > it in my local fork with the description "Reading the MAC address from
> > > ROM is often a standard use case and should not produce a warning".
> > >
> > > Therefore I'm supporting Soeren's and Fabio's point of view here and I'm
> > > in favor of merging this patch or if preferred, change the printf() to
> > > debug().
> > >
> > > Reviewed-by: Frieder Schrempf 
> >
> > Any feedback, please?

Traditionally the env was the source of truth for the MAC, so using
the ROM was a fall-back if the env didn't have one. But times change,
I guess. I'll pull this into my next PR.

Acked-by: Joe Hershberger 


Re: [PATCHv6 4/5] arm: dts: g12: Move common nodes to the -u-boot.dtsi

2020-02-09 Thread Anand Moon
Hi Neil,

Thanks for your review comments.

On Sun, 9 Feb 2020 at 18:28, Neil Armstrong  wrote:
>
> Hi,
>
> Le 09/02/2020 à 12:05, Anand Moon a écrit :
> > Move u-boot specific common nodes in the dts files to
> > meson-g12-common-u-boot.dtsi. This allows us to keep the basic
> > dts[i] files up-to-date with the ones in kernel,
> > but at the same time allowing the u-boot to add its own
> > properties to the existing nodes.
> > Also add missing mmc alias to dts nodes to avoid
> > below debug warning.
> >
> > mmc_bind: alias ret=-2, devnum=-1
> > mmc_bind: alias ret=-2, devnum=-1
>
> Same as patch 4.
>
> Neil
>

$ git grep meson-g12-common-u-boot.dtsi
arch/arm/dts/meson-g12a-sei510-u-boot.dtsi:#include
"meson-g12-common-u-boot.dtsi"
arch/arm/dts/meson-g12a-u200-u-boot.dtsi:#include "meson-g12-common-u-boot.dtsi"
arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi:#include
"meson-g12-common-u-boot.dtsi"
arch/arm/dts/meson-sm1-sei610-u-boot.dtsi:#include
"meson-g12-common-u-boot.dtsi"

So all the common nodes is included in *meson-g12-common-u-boot.dtsi*
for G12 dts.

-Anand

> >
> > Signed-off-by: Anand Moon 
> > ---
> > No changes from previous patch
> > ---
> >  arch/arm/dts/meson-g12-common-u-boot.dtsi | 12 
> >  arch/arm/dts/meson-g12a-sei510.dts|  9 -
> >  arch/arm/dts/meson-g12a-u200.dts  |  9 -
> >  arch/arm/dts/meson-g12b-odroid-n2.dts |  9 -
> >  arch/arm/dts/meson-khadas-vim3.dtsi   |  9 -
> >  arch/arm/dts/meson-sm1-sei610.dts |  9 -
> >  6 files changed, 12 insertions(+), 45 deletions(-)
> >
> > diff --git a/arch/arm/dts/meson-g12-common-u-boot.dtsi 
> > b/arch/arm/dts/meson-g12-common-u-boot.dtsi
> > index 38fd3d3feb..347b8ded22 100644
> > --- a/arch/arm/dts/meson-g12-common-u-boot.dtsi
> > +++ b/arch/arm/dts/meson-g12-common-u-boot.dtsi
> > @@ -8,6 +8,18 @@
> >   soc {
> >   u-boot,dm-pre-reloc;
> >   };
> > +
> > + aliases {
> > + serial0 = &uart_AO;
> > + ethernet0 = ðmac;
> > + mmc0 = &sd_emmc_a;
> > + mmc1 = &sd_emmc_b;
> > + mmc2 = &sd_emmc_c;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> >  };
> >
> >  &canvas {
> > diff --git a/arch/arm/dts/meson-g12a-sei510.dts 
> > b/arch/arm/dts/meson-g12a-sei510.dts
> > index c7a8736885..c6a48ebbe5 100644
> > --- a/arch/arm/dts/meson-g12a-sei510.dts
> > +++ b/arch/arm/dts/meson-g12a-sei510.dts
> > @@ -28,11 +28,6 @@
> >   };
> >   };
> >
> > - aliases {
> > - serial0 = &uart_AO;
> > - ethernet0 = ðmac;
> > - };
> > -
> >   mono_dac: audio-codec-0 {
> >   compatible = "maxim,max98357a";
> >   #sound-dai-cells = <0>;
> > @@ -49,10 +44,6 @@
> >   sound-name-prefix = "MIC";
> >   };
> >
> > - chosen {
> > - stdout-path = "serial0:115200n8";
> > - };
> > -
> >   cvbs-connector {
> >   compatible = "composite-video-connector";
> >
> > diff --git a/arch/arm/dts/meson-g12a-u200.dts 
> > b/arch/arm/dts/meson-g12a-u200.dts
> > index 8551fbd4a4..8be7b6985b 100644
> > --- a/arch/arm/dts/meson-g12a-u200.dts
> > +++ b/arch/arm/dts/meson-g12a-u200.dts
> > @@ -13,15 +13,6 @@
> >   compatible = "amlogic,u200", "amlogic,g12a";
> >   model = "Amlogic Meson G12A U200 Development Board";
> >
> > - aliases {
> > - serial0 = &uart_AO;
> > - ethernet0 = ðmac;
> > - };
> > -
> > - chosen {
> > - stdout-path = "serial0:115200n8";
> > - };
> > -
> >   cvbs-connector {
> >   compatible = "composite-video-connector";
> >
> > diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts 
> > b/arch/arm/dts/meson-g12b-odroid-n2.dts
> > index 42f1540575..a37f66a5e0 100644
> > --- a/arch/arm/dts/meson-g12b-odroid-n2.dts
> > +++ b/arch/arm/dts/meson-g12b-odroid-n2.dts
> > @@ -15,15 +15,6 @@
> >   compatible = "hardkernel,odroid-n2", "amlogic,g12b";
> >   model = "Hardkernel ODROID-N2";
> >
> > - aliases {
> > - serial0 = &uart_AO;
> > - ethernet0 = ðmac;
> > - };
> > -
> > - chosen {
> > - stdout-path = "serial0:115200n8";
> > - };
> > -
> >   memory@0 {
> >   device_type = "memory";
> >   reg = <0x0 0x0 0x0 0x4000>;
> > diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi 
> > b/arch/arm/dts/meson-khadas-vim3.dtsi
> > index 8647da7d66..c6b0ce9a88 100644
> > --- a/arch/arm/dts/meson-khadas-vim3.dtsi
> > +++ b/arch/arm/dts/meson-khadas-vim3.dtsi
> > @@ -11,15 +11,6 @@
> >  / {
> >   model = "Khadas VIM3";
> >
> > - aliases {
> > - serial0 = &uart_AO;
> > - ethernet0 = ðmac;
> > - };
> > -
> > - chosen {
> > - stdout-path = "serial0:115200n8";
> > - };
> > -
> >   memory@0 {
> >   device_type = "memory";
> >   

Re: [PATCHv6 3/5] arm: dts: gx: Move common nodes to the -u-boot.dtsi

2020-02-09 Thread Anand Moon
Hi Neil,

Thanks for your review.

On Sun, 9 Feb 2020 at 18:28, Neil Armstrong  wrote:
>
> Hi,
>
> Le 09/02/2020 à 12:05, Anand Moon a écrit :
> > Move u-boot specific common nodes in the dts files to
> > meson-gx-u-boot.dtsi. This allows us to keep the basic
> > dts[i] files up-to-date with the ones in kernel,
> > but at the same time allowing the u-boot to add its own
> > properties to the existing nodes.
> > Also add missing mmc alias to dts nodes to avoid
> > below debug warning.
> >
> > mmc_bind: alias ret=-2, devnum=-1
> > mmc_bind: alias ret=-2, devnum=-1
>
> The mmc aliases are u-boot specific, so only those should be
> moved into the meson-gx-u-boot.dtsi.
>
> Please keep the other aliases in the their linux sync'ed files.
>
> Neil
>

meson-gx-u-boot.dtsi is included in following dts file so
their is no another common -u-boot.dtsi for all the SBC dts.

$ git grep meson-gx-u-boot.dtsi
arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi:#include "meson-gx-u-boot.dtsi"
arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi:#include "meson-gx-u-boot.dtsi"
arch/arm/dts/meson-gxbb-p200-u-boot.dtsi:#include "meson-gx-u-boot.dtsi"
arch/arm/dts/meson-gxbb-p201-u-boot.dtsi:#include "meson-gx-u-boot.dtsi"
arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi:#include
"meson-gx-u-boot.dtsi"
arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi:#include
"meson-gx-u-boot.dtsi"
arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi:#include "meson-gx-u-boot.dtsi"
arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi:#include "meson-gx-u-boot.dtsi"

So all the common nodes is included in *meson-gx-u-boot.dtsi* for GXBB
and GXL dts.



-Anand

> >
> > Signed-off-by: Anand Moon 
> > ---
> > no changes from previous
> > ---
> >  arch/arm/dts/meson-gx-u-boot.dtsi | 15 +++
> >  arch/arm/dts/meson-gxbb-nanopi-k2.dts |  9 -
> >  arch/arm/dts/meson-gxbb-odroidc2.dts  |  9 -
> >  arch/arm/dts/meson-gxbb-p20x.dtsi |  9 -
> >  arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 10 --
> >  arch/arm/dts/meson-gxl-s905x-khadas-vim.dts   |  5 -
> >  arch/arm/dts/meson-gxl-s905x-libretech-cc.dts |  9 -
> >  arch/arm/dts/meson-gxl-s905x-p212.dtsi| 10 --
> >  arch/arm/dts/meson-gxm-khadas-vim2.dts| 10 --
> >  9 files changed, 15 insertions(+), 71 deletions(-)
> >
> > diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi 
> > b/arch/arm/dts/meson-gx-u-boot.dtsi
> > index b84e5edba4..13be3a7b8f 100644
> > --- a/arch/arm/dts/meson-gx-u-boot.dtsi
> > +++ b/arch/arm/dts/meson-gx-u-boot.dtsi
> > @@ -8,6 +8,21 @@
> >   soc {
> >   u-boot,dm-pre-reloc;
> >   };
> > +
> > + aliases {
> > + serial0 = &uart_AO;
> > + serial1 = &uart_A;
> > + serial2 = &uart_AO_B;
> > + ethernet0 = ðmac;
> > + spi0 = &spifc;
> > + mmc0 = &sd_emmc_a;
> > + mmc1 = &sd_emmc_b;
> > + mmc2 = &sd_emmc_c;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> >  };
> >
> >  &vpu {
> > diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts 
> > b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
> > index cbe99bd4e0..11690d6c46 100644
> > --- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts
> > +++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
> > @@ -11,15 +11,6 @@
> >  / {
> >   compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
> >
> > - aliases {
> > - serial0 = &uart_AO;
> > - ethernet0 = ðmac;
> > - };
> > -
> > - chosen {
> > - stdout-path = "serial0:115200n8";
> > - };
> > -
> >   memory@0 {
> >   device_type = "memory";
> >   reg = <0x0 0x0 0x0 0x8000>;
> > diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
> > b/arch/arm/dts/meson-gxbb-odroidc2.dts
> > index 54954b314a..f8cd76a2ef 100644
> > --- a/arch/arm/dts/meson-gxbb-odroidc2.dts
> > +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
> > @@ -14,15 +14,6 @@
> >   compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
> >   model = "Hardkernel ODROID-C2";
> >
> > - aliases {
> > - serial0 = &uart_AO;
> > - ethernet0 = ðmac;
> > - };
> > -
> > - chosen {
> > - stdout-path = "serial0:115200n8";
> > - };
> > -
> >   memory@0 {
> >   device_type = "memory";
> >   reg = <0x0 0x0 0x0 0x8000>;
> > diff --git a/arch/arm/dts/meson-gxbb-p20x.dtsi 
> > b/arch/arm/dts/meson-gxbb-p20x.dtsi
> > index 0be0f2a5d2..c9822e50f9 100644
> > --- a/arch/arm/dts/meson-gxbb-p20x.dtsi
> > +++ b/arch/arm/dts/meson-gxbb-p20x.dtsi
> > @@ -8,15 +8,6 @@
> >  #include "meson-gxbb.dtsi"
> >
> >  / {
> > - aliases {
> > - serial0 = &uart_AO;
> > - ethernet0 = ðmac;
> > - };
> > -
> > - chosen {
> > - stdout-path = "serial0:115200n8";
> > - };
> > -
> >   memory@0 {
> >   de

Re: [PATCHv6 5/5] arm: dts: s400: Move common nodes to the -u-boot.dtsi

2020-02-09 Thread Anand Moon
hi Neil,

Thanks for your review comments.

On Sun, 9 Feb 2020 at 18:29, Neil Armstrong  wrote:
>
> Hi,
>
> Le 09/02/2020 à 12:05, Anand Moon a écrit :
> > Move u-boot specific common nodes in the dts files to
> > meson-axg-s400-u-boot.dtsi. This allows us to keep the basic
> > dts[i] files up-to-date with the ones in kernel,
> > but at the same time allowing the u-boot to add its own
> > properties to the existing nodes.
> > Also add missing mmc alias to dts nodes to avoid
> > below debug warning.
> >
> > mmc_bind: alias ret=-2, devnum=-1
> > mmc_bind: alias ret=-2, devnum=-1
>
>
> Same as patch 4.
>
> Neil
>

$ git grep meson-axg-s400-u-boot.dtsi
it not show any thing, looks like it's not getting included.
so  I will update this in next version.

-Anand
> >
> > Signed-off-by: Anand Moon 
> > ---
> > no changes from previous changes
> > ---
> >  arch/arm/dts/meson-axg-s400-u-boot.dtsi | 16 
> >  arch/arm/dts/meson-axg-s400.dts |  9 -
> >  2 files changed, 16 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm/dts/meson-axg-s400-u-boot.dtsi 
> > b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
> > index c46eb3f38d..74241e9fcd 100644
> > --- a/arch/arm/dts/meson-axg-s400-u-boot.dtsi
> > +++ b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
> > @@ -2,6 +2,22 @@
> >  /*
> >   * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
> >   */
> > +/ {
> > + soc {
> > + u-boot,dm-pre-reloc;
> > + };
> > +
> > + aliases {
> > + serial0 = &uart_AO;
> > + serial1 = &uart_A;
> > + mmc1 = &sd_emmc_b;
> > + mmc2 = &sd_emmc_c;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> > +};
> >
> >  /* wifi module */
> >  &sd_emmc_b {
> > diff --git a/arch/arm/dts/meson-axg-s400.dts 
> > b/arch/arm/dts/meson-axg-s400.dts
> > index 18778ada7b..feb84255ad 100644
> > --- a/arch/arm/dts/meson-axg-s400.dts
> > +++ b/arch/arm/dts/meson-axg-s400.dts
> > @@ -55,11 +55,6 @@
> >   };
> >   };
> >
> > - aliases {
> > - serial0 = &uart_AO;
> > - serial1 = &uart_A;
> > - };
> > -
> >   linein: audio-codec@0 {
> >   #sound-dai-cells = <0>;
> >   compatible = "everest,es7241";
> > @@ -100,10 +95,6 @@
> >   reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
> >   };
> >
> > - chosen {
> > - stdout-path = "serial0:115200n8";
> > - };
> > -
> >   memory@0 {
> >   device_type = "memory";
> >   reg = <0x0 0x0 0x0 0x4000>;
> >


Re: [PATCHv6 2/5] mmc: meson-gx: Use proper compatible string as per the dts

2020-02-09 Thread Anand Moon
Hi Neil

Thanks for your review comments.

On Sun, 9 Feb 2020 at 18:31, Neil Armstrong  wrote:
>
> Hi,
>
> Le 09/02/2020 à 12:05, Anand Moon a écrit :
> > Use proper compatible string as per the dts so that mmc driver
> > could be tuned properly. SoC family S905, S905X have common clk
> > tuning parameters setting, while AGX and G12 have common clk tuning
> > parameters setting for mmc driver.
> >
> > Suggested-by: Neil Armstrong 
> > Signed-off-by: Anand Moon 
> > ---
> > No changes.
> > ---
> >  arch/arm/include/asm/arch-meson/sd_emmc.h |  7 
> >  drivers/mmc/meson_gx_mmc.c| 46 +--
> >  2 files changed, 41 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/arm/include/asm/arch-meson/sd_emmc.h 
> > b/arch/arm/include/asm/arch-meson/sd_emmc.h
> > index f4299485dc..83142d5d3f 100644
> > --- a/arch/arm/include/asm/arch-meson/sd_emmc.h
> > +++ b/arch/arm/include/asm/arch-meson/sd_emmc.h
> > @@ -13,6 +13,12 @@
> >  #define SDIO_PORT_B  1
> >  #define SDIO_PORT_C  2
> >
> > +enum mmc_compatible {
> > +MMC_COMPATIBLE_GXBB,
> > +MMC_COMPATIBLE_GX,
> > +MMC_COMPATIBLE_AXG,
> > +};
> > +
> >  #define SD_EMMC_CLKSRC_24M   2400/* 24 MHz */
> >  #define SD_EMMC_CLKSRC_DIV2  10  /* 1 GHz */
> >
> > @@ -87,6 +93,7 @@
> >  struct meson_mmc_platdata {
> >   struct mmc_config cfg;
> >   struct mmc mmc;
> > + int compat;
> >   void *regbase;
> >   void *w_buf;
> >  };
> > diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
> > index b013c7c5fb..1aefe360c4 100644
> > --- a/drivers/mmc/meson_gx_mmc.c
> > +++ b/drivers/mmc/meson_gx_mmc.c
> > @@ -37,7 +37,8 @@ static inline void meson_write(struct mmc *mmc, uint32_t 
> > val, int offset)
> >   writel(val, get_regbase(mmc) + offset);
> >  }
> >
> > -static void meson_mmc_config_clock(struct mmc *mmc)
> > +static void meson_mmc_config_clock(struct mmc *mmc,
> > +struct meson_mmc_platdata *pdata)
> >  {
> >   uint32_t meson_mmc_clk = 0;
> >   unsigned int clk, clk_src, clk_div;
> > @@ -66,14 +67,20 @@ static void meson_mmc_config_clock(struct mmc *mmc)
> >   /* RX clock phase 0:180 */
> >   meson_mmc_clk |= FIELD_PREP(CLK_RX_PHASE_MASK, CLK_PHASE_0);
> >
> > -#ifdef CONFIG_MESON_GX
> > - /* clk always on */
> > - meson_mmc_clk |= CLK_V2_ALWAYS_ON;
> > -#endif
> > -#if (defined(CONFIG_MESON_AXG) || defined(CONFIG_MESON_G12A))
> > - /* clk always on */
> > - meson_mmc_clk |= CLK_V3_ALWAYS_ON;
> > -#endif
> > + switch (pdata->compat) {
> > + case MMC_COMPATIBLE_GXBB:
> > + case MMC_COMPATIBLE_GX:
> > + /* clk always on */
> > + meson_mmc_clk |= CLK_V2_ALWAYS_ON;
> > + break;
> > + case MMC_COMPATIBLE_AXG:
> > + /* clk always on */
> > + meson_mmc_clk |= CLK_V3_ALWAYS_ON;
> > + break;
> > + default:
> > + debug("no compatible supported");
> > + break;
> > + }
> >
> >   /* clock settings */
> >   meson_mmc_clk |= clk_src;
> > @@ -85,9 +92,11 @@ static void meson_mmc_config_clock(struct mmc *mmc)
> >  static int meson_dm_mmc_set_ios(struct udevice *dev)
> >  {
> >   struct mmc *mmc = mmc_get_mmc_dev(dev);
> > + struct meson_mmc_platdata *pdata =
> > + (struct meson_mmc_platdata *)dev_get_driver_data(dev);
> >   uint32_t meson_mmc_cfg;
> >
> > - meson_mmc_config_clock(mmc);
> > + meson_mmc_config_clock(mmc, pdata);
> >
> >   meson_mmc_cfg = meson_read(mmc, MESON_SD_EMMC_CFG);
> >
> > @@ -324,9 +333,22 @@ int meson_mmc_bind(struct udevice *dev)
> >   return mmc_bind(dev, &pdata->mmc, &pdata->cfg);
> >  }
> >
> > +static const struct meson_mmc_platdata gxbb_data = {
> > +.compat = MMC_COMPATIBLE_GXBB,
> > +};
> > +
> > +static const struct meson_mmc_platdata gx_data = {
> > +.compat = MMC_COMPATIBLE_GX,
> > +};
> > +
> > +static const struct meson_mmc_platdata axg_data = {
> > +.compat = MMC_COMPATIBLE_AXG,
> > +};
> > +
> >  static const struct udevice_id meson_mmc_match[] = {
> > - { .compatible = "amlogic,meson-gx-mmc" },
> > - { .compatible = "amlogic,meson-axg-mmc" },
> > + { .compatible = "amlogic,meson-gxbb-mmc", .data = (ulong)&gxbb_data },
> > + { .compatible = "amlogic,meson-gx-mmc", .data = (ulong)&gx_data },
> > + { .compatible = "amlogic,meson-axg-mmc", .data = (ulong)&axg_data },
> >   { /* sentinel */ }
> >  };
> >
> >
>
>
> It's fine but you should do that before patch 1, and introduce the clk setup 
> directly with the MMC_COMPATIBLE_*.
>

Only GXBB and GLX have  CLK_ALWAYS_ON(24) bit set
and AXG and G12X  have CLK_ALWAYS_ON(28) bit set
for clk enable rest of the configuration is all most common for all the SoC.
let keep this simple as of now.


> If you move it before, then:
>
> Reviewed-by: Neil Armstrong 
>
> Neil


Re: [PATCHv6 1/5] mmc: meson-gx: Fix clk phase tuning for MMC

2020-02-09 Thread Anand Moon
Hi Neil,

Thanks for you review comments.

On Sun, 9 Feb 2020 at 18:38, Neil Armstrong  wrote:
>
> Hi,
>
> Le 09/02/2020 à 12:05, Anand Moon a écrit :
> > As per mainline line kernel fix the clk tuning phase for mmc,
> > set Core=180, Tx=0, Rx=0 clk phase for mmc initialization.
> > As per S905, S905X, AGX and S922X datasheet set the default
> > values for clk tuning.
> >
> > Signed-off-by: Anand Moon 
> > ---
> > Changes from previous
> > v5  Fix the commit message, configure as per mainline kernel.
> > drop the RX_DELAY_MASK and TX_DELAY_MASK as they are not used.
> >
> > v4  Fix the update mask value using FIELD_PREP macro.
> >
> > v3  Fix the initialization of core clk tunning phase as per datasheet.
> > Fix the commit message.
> >
> > v2: Fix the clk phase macro to support PHASE_180
> > drop the wrong CLK_CORE_PHASE_MASK macro.
> >
> > v1: use the mainline kernel tuning for clk tuning.
> >
> > Fixed the commmit messages.
> > Patch v1:
> > https://patchwork.ozlabs.org/patch/1201208/
> >
> > Before these changes.
> > clock is enabled (380953Hz)
> > clock is enabled (2500Hz)
> > After these changes
> > clock is enabled (380953Hz)
> > clock is enabled (2500Hz)
> > clock is enabled (5200Hz)
> > Test on Odroid N2 and Odroid C2 with eMMC and microSD cards
> > ---
> >  arch/arm/include/asm/arch-meson/sd_emmc.h | 24 +++
> >  drivers/mmc/meson_gx_mmc.c| 28 +++
> >  2 files changed, 38 insertions(+), 14 deletions(-)
> >
> > diff --git a/arch/arm/include/asm/arch-meson/sd_emmc.h 
> > b/arch/arm/include/asm/arch-meson/sd_emmc.h
> > index e3a72c8b66..f4299485dc 100644
> > --- a/arch/arm/include/asm/arch-meson/sd_emmc.h
> > +++ b/arch/arm/include/asm/arch-meson/sd_emmc.h
> > @@ -7,6 +7,7 @@
> >  #define __SD_EMMC_H__
> >
> >  #include 
> > +#include 
> >
> >  #define SDIO_PORT_A  0
> >  #define SDIO_PORT_B  1
> > @@ -19,15 +20,20 @@
> >  #define   CLK_MAX_DIV63
> >  #define   CLK_SRC_24M(0 << 6)
> >  #define   CLK_SRC_DIV2   (1 << 6)
> > -#define   CLK_CO_PHASE_000   (0 << 8)
> > -#define   CLK_CO_PHASE_090   (1 << 8)
> > -#define   CLK_CO_PHASE_180   (2 << 8)
> > -#define   CLK_CO_PHASE_270   (3 << 8)
> > -#define   CLK_TX_PHASE_000   (0 << 10)
> > -#define   CLK_TX_PHASE_090   (1 << 10)
> > -#define   CLK_TX_PHASE_180   (2 << 10)
> > -#define   CLK_TX_PHASE_270   (3 << 10)
> > -#define   CLK_ALWAYS_ON  BIT(24)
> > +
> > +#define   CRYSTAL_24MHZ  0
> > +#define   CLK_PHASE_00
> > +#define   CLK_PHASE_180  2
> > +
> > +#define   CLK_DIV_MASK   GENMASK(5, 0)
> > +#define   CLK_SRC_MASK   GENMASK(7, 6)
> > +#define   CLK_CORE_PHASE_MASKGENMASK(9, 8)
> > +#define   CLK_TX_PHASE_MASK  GENMASK(11, 10)
> > +#define   CLK_RX_PHASE_MASK  GENMASK(13, 12)
> > +
> > +#define   CLK_V2_ALWAYS_ON   BIT(24)
> > +
> > +#define   CLK_V3_ALWAYS_ON   BIT(28)
> >
> >  #define MESON_SD_EMMC_CFG0x44
> >  #define   CFG_BUS_WIDTH_MASK GENMASK(1, 0)
> > diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
> > index 86c1a7164a..b013c7c5fb 100644
> > --- a/drivers/mmc/meson_gx_mmc.c
> > +++ b/drivers/mmc/meson_gx_mmc.c
> > @@ -16,6 +16,10 @@
> >  #include 
> >  #include 
> >
> > +#include 
> > +#include 
> > +#include 
> > +
> >  static inline void *get_regbase(const struct mmc *mmc)
> >  {
> >   struct meson_mmc_platdata *pdata = mmc->priv;
> > @@ -51,11 +55,25 @@ static void meson_mmc_config_clock(struct mmc *mmc)
> >   }
> >   clk_div = DIV_ROUND_UP(clk, mmc->clock);
> >
> > - /* 180 phase core clock */
> > - meson_mmc_clk |= CLK_CO_PHASE_180;
> > -
> > - /* 180 phase tx clock */
> > - meson_mmc_clk |= CLK_TX_PHASE_000;
> > + /* Clock divider */
> > + meson_mmc_clk |= CLK_DIV_MASK;
>
> This will set the max divider, whatever the value of clk_div, so the 
> following statement:
> meson_mmc_clk |= clk_div;
> will have no effect.

As per the datasheet S905 and S922X max divider is 63.
CLK_DIV_MASK[0-5]  Cfg_div: Clock divider
Frequency = clock source/cfg_div
Clock off: cfg_div==0, the
clock is disabled
Divider bypass: cfg_div==1,
clock source is used as core clock without divider
Maximum divider 63

So here is the log of clk_div and clk_freq at my end.

MMC Device 0 not found
no mmc device at slot 0
clock is disabled (0Hz)
clock is enabled (380953Hz)
..clk_div : 63
Card did not respond to voltage select!
clock is disabled (0Hz)
clock is enabled (380953Hz)
..clk_div : 63
clock is 

Re: [U-Boot] logging

2020-02-09 Thread Simon Glass
Hi Heinrich,

On Sun, 9 Feb 2020 at 05:08, Heinrich Schuchardt  wrote:
>
> Hello Simon,
>
> I would like to convert printf and debug messages in the UEFI sub-system
> to log messages.
>
> Currently if CONFIG_LOG=n, log_*() functions are mapped to log_nop(). So
> no output is provided independent of the criticality of the message.
>
> What I would like to do is map log_err() to printf() and log_debug() to
> debug() if CONFIG_LOG=n . This way we could get the same console output
> no matter if CONFIG_LOG is enabled.
>
> Would this make sense to you?
>
> #if CONFIG_IS_ENABLED(LOG)
> #define _LOG_MAX_LEVEL CONFIG_VAL(LOG_MAX_LEVEL)
> #define log_err(_fmt...)log(LOG_CATEGORY, LOGL_ERR, ##_fmt)
> #define log_warning(_fmt...)log(LOG_CATEGORY, LOGL_WARNING, ##_fmt)
> #define log_notice(_fmt...) log(LOG_CATEGORY, LOGL_NOTICE, ##_fmt)
> #define log_info(_fmt...)   log(LOG_CATEGORY, LOGL_INFO, ##_fmt)
> #define log_debug(_fmt...)  log(LOG_CATEGORY, LOGL_DEBUG, ##_fmt)
> #define log_content(_fmt...)log(LOG_CATEGORY, LOGL_DEBUG_CONTENT,
> ##_fmt)
> #define log_io(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt)
> #else
> #define _LOG_MAX_LEVEL LOGL_INFO
> #define log_err(_fmt...)printf(##_fmt)
> #define log_warning(_fmt...)printf(##_fmt)
> #define log_notice(_fmt...) printf(##_fmt)
> #define log_info(_fmt...)   printf(##_fmt)
> #define log_debug(_fmt...)  debug(##_fmt)
> #define log_content(_fmt...)log_nop(LOG_CATEGORY, \
>  LOGL_DEBUG_CONTENT, ##_fmt)
> #define log_io(_fmt...) log_nop(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt)
> #endif

I think that makes sense, yes.

Regards,
Simon


Re: [PATCH v2 02/10] mmc: Add init() API

2020-02-09 Thread Wolfgang Denk
Dear Faiz,

In message <04e0144c-cad3-d242-0393-ba33afa3d...@ti.com> you wrote:
>
> > I am in the cc list of your first mail, but not from Simon's reply mail.
>
> So Peng got the email but the list is dropping CCs after it gets them.
> How do I avoid this in the future? Should I always add maintainers in To?

We are investigating this.  I _think_ (but this needs to be
verified, I just had a short look) that Mailman might try to bee too
clever; my speculation is that it might remove addresses from the
Cc: list wich have the "nodupes" option set in their profile.
Maybe mailman "thinks" that this is what it should do - otherwise
the recipient would receive dupes at least for a reply-to-all, one
trough the mailing list and the other through the Cc:

But as mentioned, this needs to be investigated.

I can see this ancient bug report [1], where a reply reads:

In any case, this behavior is intentional by design. Cc:
recipients who are list members with their 'avoid duplicates'
option set are removed from the Cc: list to keep that list
from growing excessively in long threads with many
'reply-all' replies.

[1] https://bugs.launchpad.net/mailman/+bug/1216960


So apparently a solution/workaoround could be to globally remove the
"nodupes" option for all subscribers, but I'm not sure if this is
what we should do.


I feel the key problem here is that we expect something from the
mailing list that it has not been designed for - the differentiation
between "this is just some random posting" and "this is a posting
which is specifically addressed to you".  this may or may not work,
and it depends on several factors - how the mailing list tool works,
and how the recipient filters his incoming e-mail.

But I don't have any clever solution either.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
A Sense of humor can help you overlook the unattractive, tolerate the
unpleasant,  cope  with  the  unexpected  and   smile   through   the
unbearable.   - Moshe Waldoks


Re: [PATCH v3 1/6] net: introduce DSA class for Ethernet switches

2020-02-09 Thread Vladimir Oltean
Hi Alex,

On Tue, 3 Dec 2019 at 17:32, Alex Marginean  wrote:
>
> DSA stands for Distributed Switch Architecture and it covers switches that
> are connected to the CPU through an Ethernet link and generally use frame
> tags to pass information about the source/destination ports to/from CPU.
> Front panel ports are presented as regular ethernet devices in U-Boot and
> they are expected to support the typical networking commands.
> DSA switches may be cascaded, DSA class code does not currently support
> this.
>
> Signed-off-by: Alex Marginean 
> ---
>  drivers/net/Kconfig|  13 ++
>  include/dm/uclass-id.h |   1 +
>  include/net/dsa.h  | 141 
>  net/Makefile   |   1 +
>  net/dsa-uclass.c   | 369 +
>  5 files changed, 525 insertions(+)
>  create mode 100644 include/net/dsa.h
>  create mode 100644 net/dsa-uclass.c
>
> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
> index 4182897d89..a4157cb122 100644
> --- a/drivers/net/Kconfig
> +++ b/drivers/net/Kconfig
> @@ -37,6 +37,19 @@ config DM_MDIO_MUX
>   This is currently implemented in net/mdio-mux-uclass.c
>   Look in include/miiphy.h for details.
>
> +config DM_DSA
> +   bool "Enable Driver Model for DSA switches"
> +   depends on DM_ETH && DM_MDIO
> +   help
> + Enable Driver Model for DSA switches
> +
> + Adds UCLASS_DSA class supporting switches that follow the 
> Distributed
> + Switch Architecture (DSA).  These switches rely on the presence of a
> + management switch port connected to an Ethernet controller capable 
> of
> + receiving frames from the switch.  This host Ethernet controller is
> + called "master" and "cpu" in DSA terminology.
> + This is currently implemented in net/dsa-uclass.c
> +
>  config MDIO_SANDBOX
> depends on DM_MDIO && SANDBOX
> default y
> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
> index 0c563d898b..8f37a91488 100644
> --- a/include/dm/uclass-id.h
> +++ b/include/dm/uclass-id.h
> @@ -42,6 +42,7 @@ enum uclass_id {
> UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
> UCLASS_DSI_HOST,/* Display Serial Interface host */
> UCLASS_DMA, /* Direct Memory Access */
> +   UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture 
> */
> UCLASS_EFI, /* EFI managed devices */
> UCLASS_ETH, /* Ethernet device */
> UCLASS_FIRMWARE,/* Firmware */
> diff --git a/include/net/dsa.h b/include/net/dsa.h
> new file mode 100644
> index 00..2387419b9d
> --- /dev/null
> +++ b/include/net/dsa.h
> @@ -0,0 +1,141 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (c) 2019 NXP
> + */
> +
> +#ifndef __DSA_H__
> +#define __DSA_H__
> +
> +#include 
> +#include 
> +#include 
> +
> +/**
> + * DSA stands for Distributed Switch Architecture and it is infrastructure
> + * intended to support drivers for Switches that rely on an intermediary
> + * Ethernet device for I/O.  These switches may support cascading allowing
> + * them to be arranged as a tree.
> + * DSA is documented in detail in the Linux kernel documentation under
> + * Documentation/networking/dsa/dsa.txt
> + * The network layout of such a switch is shown below:
> + *
> + * |---
> + * | CPU network device (eth0)|
> + * 
> + * |  + * |  |
> + * |  |
> + * |tag added by CPU> |
> + * ||
> + * | Switch driver  |
> + * ||
> + * |||| ||
> + * |---|  |---|  |---|
> + * | sw0p0 |  | sw0p1 |  | sw0p2 |
> + * |---|  |---|  |---|
> + *
> + * In U-Boot the intent is to allow access to front panel ports (shown at the
> + * bottom of the picture) though the master Ethernet port (eth0 in the 
> picture).
> + * Front panel ports are presented as regular Ethernet devices in U-Boot and
> + * they are expected to support the typical networking commands.
> + * In general DSA switches require the use of tags, extra headers added both 
> by
> + * software on Tx and by the switch on Rx.  These tags carry at a minimum 
> port
> + * information and switch information for cascaded set-ups.
> + * In U-Boot these tags are inserted and parsed by the DSA switch driver, the
> + * class code helps with headroom/tailroom for the extra headers.
> + *
> + * TODO:
> + * - handle switch cascading, for now U-Boot only supports stand-alone 
> switches.
> + * - propagate the master Eth MAC address to switch ports, this is used in
> + * Linux to avoid using additional MAC addresses on master Eth.
> + * - Add support to probe DSA switches connecte

Re: [PATCHv6 1/5] mmc: meson-gx: Fix clk phase tuning for MMC

2020-02-09 Thread Neil Armstrong
Hi,

Le 09/02/2020 à 12:05, Anand Moon a écrit :
> As per mainline line kernel fix the clk tuning phase for mmc,
> set Core=180, Tx=0, Rx=0 clk phase for mmc initialization.
> As per S905, S905X, AGX and S922X datasheet set the default
> values for clk tuning.
> 
> Signed-off-by: Anand Moon 
> ---
> Changes from previous
> v5  Fix the commit message, configure as per mainline kernel.
> drop the RX_DELAY_MASK and TX_DELAY_MASK as they are not used.
> 
> v4  Fix the update mask value using FIELD_PREP macro.
> 
> v3  Fix the initialization of core clk tunning phase as per datasheet.
> Fix the commit message.
> 
> v2: Fix the clk phase macro to support PHASE_180
> drop the wrong CLK_CORE_PHASE_MASK macro.
> 
> v1: use the mainline kernel tuning for clk tuning.
> 
> Fixed the commmit messages.
> Patch v1:
> https://patchwork.ozlabs.org/patch/1201208/
> 
> Before these changes.
> clock is enabled (380953Hz)
> clock is enabled (2500Hz)
> After these changes
> clock is enabled (380953Hz)
> clock is enabled (2500Hz)
> clock is enabled (5200Hz)
> Test on Odroid N2 and Odroid C2 with eMMC and microSD cards
> ---
>  arch/arm/include/asm/arch-meson/sd_emmc.h | 24 +++
>  drivers/mmc/meson_gx_mmc.c| 28 +++
>  2 files changed, 38 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-meson/sd_emmc.h 
> b/arch/arm/include/asm/arch-meson/sd_emmc.h
> index e3a72c8b66..f4299485dc 100644
> --- a/arch/arm/include/asm/arch-meson/sd_emmc.h
> +++ b/arch/arm/include/asm/arch-meson/sd_emmc.h
> @@ -7,6 +7,7 @@
>  #define __SD_EMMC_H__
>  
>  #include 
> +#include 
>  
>  #define SDIO_PORT_A  0
>  #define SDIO_PORT_B  1
> @@ -19,15 +20,20 @@
>  #define   CLK_MAX_DIV63
>  #define   CLK_SRC_24M(0 << 6)
>  #define   CLK_SRC_DIV2   (1 << 6)
> -#define   CLK_CO_PHASE_000   (0 << 8)
> -#define   CLK_CO_PHASE_090   (1 << 8)
> -#define   CLK_CO_PHASE_180   (2 << 8)
> -#define   CLK_CO_PHASE_270   (3 << 8)
> -#define   CLK_TX_PHASE_000   (0 << 10)
> -#define   CLK_TX_PHASE_090   (1 << 10)
> -#define   CLK_TX_PHASE_180   (2 << 10)
> -#define   CLK_TX_PHASE_270   (3 << 10)
> -#define   CLK_ALWAYS_ON  BIT(24)
> +
> +#define   CRYSTAL_24MHZ  0
> +#define   CLK_PHASE_00
> +#define   CLK_PHASE_180  2
> +
> +#define   CLK_DIV_MASK   GENMASK(5, 0)
> +#define   CLK_SRC_MASK   GENMASK(7, 6)
> +#define   CLK_CORE_PHASE_MASKGENMASK(9, 8)
> +#define   CLK_TX_PHASE_MASK  GENMASK(11, 10)
> +#define   CLK_RX_PHASE_MASK  GENMASK(13, 12)
> +
> +#define   CLK_V2_ALWAYS_ON   BIT(24)
> +
> +#define   CLK_V3_ALWAYS_ON   BIT(28)
>  
>  #define MESON_SD_EMMC_CFG0x44
>  #define   CFG_BUS_WIDTH_MASK GENMASK(1, 0)
> diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
> index 86c1a7164a..b013c7c5fb 100644
> --- a/drivers/mmc/meson_gx_mmc.c
> +++ b/drivers/mmc/meson_gx_mmc.c
> @@ -16,6 +16,10 @@
>  #include 
>  #include 
>  
> +#include 
> +#include 
> +#include 
> +
>  static inline void *get_regbase(const struct mmc *mmc)
>  {
>   struct meson_mmc_platdata *pdata = mmc->priv;
> @@ -51,11 +55,25 @@ static void meson_mmc_config_clock(struct mmc *mmc)
>   }
>   clk_div = DIV_ROUND_UP(clk, mmc->clock);
>  
> - /* 180 phase core clock */
> - meson_mmc_clk |= CLK_CO_PHASE_180;
> -
> - /* 180 phase tx clock */
> - meson_mmc_clk |= CLK_TX_PHASE_000;
> + /* Clock divider */
> + meson_mmc_clk |= CLK_DIV_MASK;

This will set the max divider, whatever the value of clk_div, so the following 
statement:
meson_mmc_clk |= clk_div;
will have no effect.


> + /* Clock source : Crystal 24MHz */
> + meson_mmc_clk |= FIELD_PREP(CLK_SRC_MASK, CRYSTAL_24MHZ);

You set CRYSTAL_24MHZ here, but the src is selected in clk_src and set with:
meson_mmc_clk |= clk_src;

In conclusion your change forces the 24MHz crystal and max divider whatever the
freq asked by the mmc core !

> + /* Core clock phase 2:180 */
> + meson_mmc_clk |= FIELD_PREP(CLK_CORE_PHASE_MASK, CLK_PHASE_180);
> + /* TX clock phase 0:180 */
> + meson_mmc_clk |= FIELD_PREP(CLK_TX_PHASE_MASK, CLK_PHASE_0);
> + /* RX clock phase 0:180 */
> + meson_mmc_clk |= FIELD_PREP(CLK_RX_PHASE_MASK, CLK_PHASE_0);

These are ok, but it's exactly the same as before with a different style.

> +
> +#ifdef CONFIG_MESON_GX
> + /* clk always on */
> + meson_mmc_clk |= CLK_V2_ALWAYS_ON;
> +#endif
> +#if (defined(CONFIG_MESON_AXG) || defined(CONFIG_MESON_G12A))
> + /* clk always on */
> + meson_mmc_clk |= CLK_V3_ALWAYS_ON;
> +#endif

Why not, not sure about the effect.

>  
>   /* clock set

Re: [PATCHv6 2/5] mmc: meson-gx: Use proper compatible string as per the dts

2020-02-09 Thread Neil Armstrong
Hi,

Le 09/02/2020 à 12:05, Anand Moon a écrit :
> Use proper compatible string as per the dts so that mmc driver
> could be tuned properly. SoC family S905, S905X have common clk
> tuning parameters setting, while AGX and G12 have common clk tuning
> parameters setting for mmc driver.
> 
> Suggested-by: Neil Armstrong 
> Signed-off-by: Anand Moon 
> ---
> No changes.
> ---
>  arch/arm/include/asm/arch-meson/sd_emmc.h |  7 
>  drivers/mmc/meson_gx_mmc.c| 46 +--
>  2 files changed, 41 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-meson/sd_emmc.h 
> b/arch/arm/include/asm/arch-meson/sd_emmc.h
> index f4299485dc..83142d5d3f 100644
> --- a/arch/arm/include/asm/arch-meson/sd_emmc.h
> +++ b/arch/arm/include/asm/arch-meson/sd_emmc.h
> @@ -13,6 +13,12 @@
>  #define SDIO_PORT_B  1
>  #define SDIO_PORT_C  2
>  
> +enum mmc_compatible {
> +MMC_COMPATIBLE_GXBB,
> +MMC_COMPATIBLE_GX,
> +MMC_COMPATIBLE_AXG,
> +};
> +
>  #define SD_EMMC_CLKSRC_24M   2400/* 24 MHz */
>  #define SD_EMMC_CLKSRC_DIV2  10  /* 1 GHz */
>  
> @@ -87,6 +93,7 @@
>  struct meson_mmc_platdata {
>   struct mmc_config cfg;
>   struct mmc mmc;
> + int compat;
>   void *regbase;
>   void *w_buf;
>  };
> diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
> index b013c7c5fb..1aefe360c4 100644
> --- a/drivers/mmc/meson_gx_mmc.c
> +++ b/drivers/mmc/meson_gx_mmc.c
> @@ -37,7 +37,8 @@ static inline void meson_write(struct mmc *mmc, uint32_t 
> val, int offset)
>   writel(val, get_regbase(mmc) + offset);
>  }
>  
> -static void meson_mmc_config_clock(struct mmc *mmc)
> +static void meson_mmc_config_clock(struct mmc *mmc,
> +struct meson_mmc_platdata *pdata)
>  {
>   uint32_t meson_mmc_clk = 0;
>   unsigned int clk, clk_src, clk_div;
> @@ -66,14 +67,20 @@ static void meson_mmc_config_clock(struct mmc *mmc)
>   /* RX clock phase 0:180 */
>   meson_mmc_clk |= FIELD_PREP(CLK_RX_PHASE_MASK, CLK_PHASE_0);
>  
> -#ifdef CONFIG_MESON_GX
> - /* clk always on */
> - meson_mmc_clk |= CLK_V2_ALWAYS_ON;
> -#endif
> -#if (defined(CONFIG_MESON_AXG) || defined(CONFIG_MESON_G12A))
> - /* clk always on */
> - meson_mmc_clk |= CLK_V3_ALWAYS_ON;
> -#endif
> + switch (pdata->compat) {
> + case MMC_COMPATIBLE_GXBB:
> + case MMC_COMPATIBLE_GX:
> + /* clk always on */
> + meson_mmc_clk |= CLK_V2_ALWAYS_ON;
> + break;
> + case MMC_COMPATIBLE_AXG:
> + /* clk always on */
> + meson_mmc_clk |= CLK_V3_ALWAYS_ON;
> + break;
> + default:
> + debug("no compatible supported");
> + break;
> + }
>  
>   /* clock settings */
>   meson_mmc_clk |= clk_src;
> @@ -85,9 +92,11 @@ static void meson_mmc_config_clock(struct mmc *mmc)
>  static int meson_dm_mmc_set_ios(struct udevice *dev)
>  {
>   struct mmc *mmc = mmc_get_mmc_dev(dev);
> + struct meson_mmc_platdata *pdata =
> + (struct meson_mmc_platdata *)dev_get_driver_data(dev);
>   uint32_t meson_mmc_cfg;
>  
> - meson_mmc_config_clock(mmc);
> + meson_mmc_config_clock(mmc, pdata);
>  
>   meson_mmc_cfg = meson_read(mmc, MESON_SD_EMMC_CFG);
>  
> @@ -324,9 +333,22 @@ int meson_mmc_bind(struct udevice *dev)
>   return mmc_bind(dev, &pdata->mmc, &pdata->cfg);
>  }
>  
> +static const struct meson_mmc_platdata gxbb_data = {
> +.compat = MMC_COMPATIBLE_GXBB,
> +};
> +
> +static const struct meson_mmc_platdata gx_data = {
> +.compat = MMC_COMPATIBLE_GX,
> +};
> +
> +static const struct meson_mmc_platdata axg_data = {
> +.compat = MMC_COMPATIBLE_AXG,
> +};
> +
>  static const struct udevice_id meson_mmc_match[] = {
> - { .compatible = "amlogic,meson-gx-mmc" },
> - { .compatible = "amlogic,meson-axg-mmc" },
> + { .compatible = "amlogic,meson-gxbb-mmc", .data = (ulong)&gxbb_data },
> + { .compatible = "amlogic,meson-gx-mmc", .data = (ulong)&gx_data },
> + { .compatible = "amlogic,meson-axg-mmc", .data = (ulong)&axg_data },
>   { /* sentinel */ }
>  };
>  
> 


It's fine but you should do that before patch 1, and introduce the clk setup 
directly with the MMC_COMPATIBLE_*.

If you move it before, then:

Reviewed-by: Neil Armstrong 

Neil


Re: [PATCHv6 4/5] arm: dts: g12: Move common nodes to the -u-boot.dtsi

2020-02-09 Thread Neil Armstrong
Hi,

Le 09/02/2020 à 12:05, Anand Moon a écrit :
> Move u-boot specific common nodes in the dts files to
> meson-g12-common-u-boot.dtsi. This allows us to keep the basic
> dts[i] files up-to-date with the ones in kernel,
> but at the same time allowing the u-boot to add its own
> properties to the existing nodes.
> Also add missing mmc alias to dts nodes to avoid
> below debug warning.
> 
> mmc_bind: alias ret=-2, devnum=-1
> mmc_bind: alias ret=-2, devnum=-1

Same as patch 4.

Neil

> 
> Signed-off-by: Anand Moon 
> ---
> No changes from previous patch
> ---
>  arch/arm/dts/meson-g12-common-u-boot.dtsi | 12 
>  arch/arm/dts/meson-g12a-sei510.dts|  9 -
>  arch/arm/dts/meson-g12a-u200.dts  |  9 -
>  arch/arm/dts/meson-g12b-odroid-n2.dts |  9 -
>  arch/arm/dts/meson-khadas-vim3.dtsi   |  9 -
>  arch/arm/dts/meson-sm1-sei610.dts |  9 -
>  6 files changed, 12 insertions(+), 45 deletions(-)
> 
> diff --git a/arch/arm/dts/meson-g12-common-u-boot.dtsi 
> b/arch/arm/dts/meson-g12-common-u-boot.dtsi
> index 38fd3d3feb..347b8ded22 100644
> --- a/arch/arm/dts/meson-g12-common-u-boot.dtsi
> +++ b/arch/arm/dts/meson-g12-common-u-boot.dtsi
> @@ -8,6 +8,18 @@
>   soc {
>   u-boot,dm-pre-reloc;
>   };
> +
> + aliases {
> + serial0 = &uart_AO;
> + ethernet0 = ðmac;
> + mmc0 = &sd_emmc_a;
> + mmc1 = &sd_emmc_b;
> + mmc2 = &sd_emmc_c;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
>  };
>  
>  &canvas {
> diff --git a/arch/arm/dts/meson-g12a-sei510.dts 
> b/arch/arm/dts/meson-g12a-sei510.dts
> index c7a8736885..c6a48ebbe5 100644
> --- a/arch/arm/dts/meson-g12a-sei510.dts
> +++ b/arch/arm/dts/meson-g12a-sei510.dts
> @@ -28,11 +28,6 @@
>   };
>   };
>  
> - aliases {
> - serial0 = &uart_AO;
> - ethernet0 = ðmac;
> - };
> -
>   mono_dac: audio-codec-0 {
>   compatible = "maxim,max98357a";
>   #sound-dai-cells = <0>;
> @@ -49,10 +44,6 @@
>   sound-name-prefix = "MIC";
>   };
>  
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   cvbs-connector {
>   compatible = "composite-video-connector";
>  
> diff --git a/arch/arm/dts/meson-g12a-u200.dts 
> b/arch/arm/dts/meson-g12a-u200.dts
> index 8551fbd4a4..8be7b6985b 100644
> --- a/arch/arm/dts/meson-g12a-u200.dts
> +++ b/arch/arm/dts/meson-g12a-u200.dts
> @@ -13,15 +13,6 @@
>   compatible = "amlogic,u200", "amlogic,g12a";
>   model = "Amlogic Meson G12A U200 Development Board";
>  
> - aliases {
> - serial0 = &uart_AO;
> - ethernet0 = ðmac;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   cvbs-connector {
>   compatible = "composite-video-connector";
>  
> diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts 
> b/arch/arm/dts/meson-g12b-odroid-n2.dts
> index 42f1540575..a37f66a5e0 100644
> --- a/arch/arm/dts/meson-g12b-odroid-n2.dts
> +++ b/arch/arm/dts/meson-g12b-odroid-n2.dts
> @@ -15,15 +15,6 @@
>   compatible = "hardkernel,odroid-n2", "amlogic,g12b";
>   model = "Hardkernel ODROID-N2";
>  
> - aliases {
> - serial0 = &uart_AO;
> - ethernet0 = ðmac;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   memory@0 {
>   device_type = "memory";
>   reg = <0x0 0x0 0x0 0x4000>;
> diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi 
> b/arch/arm/dts/meson-khadas-vim3.dtsi
> index 8647da7d66..c6b0ce9a88 100644
> --- a/arch/arm/dts/meson-khadas-vim3.dtsi
> +++ b/arch/arm/dts/meson-khadas-vim3.dtsi
> @@ -11,15 +11,6 @@
>  / {
>   model = "Khadas VIM3";
>  
> - aliases {
> - serial0 = &uart_AO;
> - ethernet0 = ðmac;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   memory@0 {
>   device_type = "memory";
>   reg = <0x0 0x0 0x0 0x8000>;
> diff --git a/arch/arm/dts/meson-sm1-sei610.dts 
> b/arch/arm/dts/meson-sm1-sei610.dts
> index 3435aaa4e8..4372708811 100644
> --- a/arch/arm/dts/meson-sm1-sei610.dts
> +++ b/arch/arm/dts/meson-sm1-sei610.dts
> @@ -14,15 +14,6 @@
>   compatible = "seirobotics,sei610", "amlogic,sm1";
>   model = "SEI Robotics SEI610";
>  
> - aliases {
> - serial0 = &uart_AO;
> - ethernet0 = ðmac;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   emmc_pwrseq: emmc-pwrseq {
>   compatible = "mmc-pwrseq-emmc";
>   reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
> 


Re: [PATCHv6 5/5] arm: dts: s400: Move common nodes to the -u-boot.dtsi

2020-02-09 Thread Neil Armstrong
Hi,

Le 09/02/2020 à 12:05, Anand Moon a écrit :
> Move u-boot specific common nodes in the dts files to
> meson-axg-s400-u-boot.dtsi. This allows us to keep the basic
> dts[i] files up-to-date with the ones in kernel,
> but at the same time allowing the u-boot to add its own
> properties to the existing nodes.
> Also add missing mmc alias to dts nodes to avoid
> below debug warning.
> 
> mmc_bind: alias ret=-2, devnum=-1
> mmc_bind: alias ret=-2, devnum=-1


Same as patch 4.

Neil

> 
> Signed-off-by: Anand Moon 
> ---
> no changes from previous changes
> ---
>  arch/arm/dts/meson-axg-s400-u-boot.dtsi | 16 
>  arch/arm/dts/meson-axg-s400.dts |  9 -
>  2 files changed, 16 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm/dts/meson-axg-s400-u-boot.dtsi 
> b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
> index c46eb3f38d..74241e9fcd 100644
> --- a/arch/arm/dts/meson-axg-s400-u-boot.dtsi
> +++ b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
> @@ -2,6 +2,22 @@
>  /*
>   * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
>   */
> +/ {
> + soc {
> + u-boot,dm-pre-reloc;
> + };
> +
> + aliases {
> + serial0 = &uart_AO;
> + serial1 = &uart_A;
> + mmc1 = &sd_emmc_b;
> + mmc2 = &sd_emmc_c;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
>  
>  /* wifi module */
>  &sd_emmc_b {
> diff --git a/arch/arm/dts/meson-axg-s400.dts b/arch/arm/dts/meson-axg-s400.dts
> index 18778ada7b..feb84255ad 100644
> --- a/arch/arm/dts/meson-axg-s400.dts
> +++ b/arch/arm/dts/meson-axg-s400.dts
> @@ -55,11 +55,6 @@
>   };
>   };
>  
> - aliases {
> - serial0 = &uart_AO;
> - serial1 = &uart_A;
> - };
> -
>   linein: audio-codec@0 {
>   #sound-dai-cells = <0>;
>   compatible = "everest,es7241";
> @@ -100,10 +95,6 @@
>   reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
>   };
>  
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   memory@0 {
>   device_type = "memory";
>   reg = <0x0 0x0 0x0 0x4000>;
> 


Re: [PATCHv6 3/5] arm: dts: gx: Move common nodes to the -u-boot.dtsi

2020-02-09 Thread Neil Armstrong
Hi,

Le 09/02/2020 à 12:05, Anand Moon a écrit :
> Move u-boot specific common nodes in the dts files to
> meson-gx-u-boot.dtsi. This allows us to keep the basic
> dts[i] files up-to-date with the ones in kernel,
> but at the same time allowing the u-boot to add its own
> properties to the existing nodes.
> Also add missing mmc alias to dts nodes to avoid
> below debug warning.
> 
> mmc_bind: alias ret=-2, devnum=-1
> mmc_bind: alias ret=-2, devnum=-1

The mmc aliases are u-boot specific, so only those should be
moved into the meson-gx-u-boot.dtsi.

Please keep the other aliases in the their linux sync'ed files.

Neil

> 
> Signed-off-by: Anand Moon 
> ---
> no changes from previous
> ---
>  arch/arm/dts/meson-gx-u-boot.dtsi | 15 +++
>  arch/arm/dts/meson-gxbb-nanopi-k2.dts |  9 -
>  arch/arm/dts/meson-gxbb-odroidc2.dts  |  9 -
>  arch/arm/dts/meson-gxbb-p20x.dtsi |  9 -
>  arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 10 --
>  arch/arm/dts/meson-gxl-s905x-khadas-vim.dts   |  5 -
>  arch/arm/dts/meson-gxl-s905x-libretech-cc.dts |  9 -
>  arch/arm/dts/meson-gxl-s905x-p212.dtsi| 10 --
>  arch/arm/dts/meson-gxm-khadas-vim2.dts| 10 --
>  9 files changed, 15 insertions(+), 71 deletions(-)
> 
> diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi 
> b/arch/arm/dts/meson-gx-u-boot.dtsi
> index b84e5edba4..13be3a7b8f 100644
> --- a/arch/arm/dts/meson-gx-u-boot.dtsi
> +++ b/arch/arm/dts/meson-gx-u-boot.dtsi
> @@ -8,6 +8,21 @@
>   soc {
>   u-boot,dm-pre-reloc;
>   };
> +
> + aliases {
> + serial0 = &uart_AO;
> + serial1 = &uart_A;
> + serial2 = &uart_AO_B;
> + ethernet0 = ðmac;
> + spi0 = &spifc;
> + mmc0 = &sd_emmc_a;
> + mmc1 = &sd_emmc_b;
> + mmc2 = &sd_emmc_c;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
>  };
>  
>  &vpu {
> diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts 
> b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
> index cbe99bd4e0..11690d6c46 100644
> --- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts
> +++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
> @@ -11,15 +11,6 @@
>  / {
>   compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
>  
> - aliases {
> - serial0 = &uart_AO;
> - ethernet0 = ðmac;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   memory@0 {
>   device_type = "memory";
>   reg = <0x0 0x0 0x0 0x8000>;
> diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
> b/arch/arm/dts/meson-gxbb-odroidc2.dts
> index 54954b314a..f8cd76a2ef 100644
> --- a/arch/arm/dts/meson-gxbb-odroidc2.dts
> +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
> @@ -14,15 +14,6 @@
>   compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
>   model = "Hardkernel ODROID-C2";
>  
> - aliases {
> - serial0 = &uart_AO;
> - ethernet0 = ðmac;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   memory@0 {
>   device_type = "memory";
>   reg = <0x0 0x0 0x0 0x8000>;
> diff --git a/arch/arm/dts/meson-gxbb-p20x.dtsi 
> b/arch/arm/dts/meson-gxbb-p20x.dtsi
> index 0be0f2a5d2..c9822e50f9 100644
> --- a/arch/arm/dts/meson-gxbb-p20x.dtsi
> +++ b/arch/arm/dts/meson-gxbb-p20x.dtsi
> @@ -8,15 +8,6 @@
>  #include "meson-gxbb.dtsi"
>  
>  / {
> - aliases {
> - serial0 = &uart_AO;
> - ethernet0 = ðmac;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   memory@0 {
>   device_type = "memory";
>   reg = <0x0 0x0 0x0 0x4000>;
> diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts 
> b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
> index 82b1c48511..4f9072a83e 100644
> --- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
> +++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
> @@ -16,16 +16,6 @@
>"amlogic,meson-gxl";
>   model = "Libre Computer Board AML-S805X-AC";
>  
> - aliases {
> - serial0 = &uart_AO;
> - ethernet0 = ðmac;
> - spi0 = &spifc;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
>   cvbs-connector {
>   /*
>* The pads are present but no connector is soldered on
> diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts 
> b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
> index ceb34afe42..072e4575d2 100644
> --- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
> +++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
> @@ -26,11 +26,6 @@
>   };
>   };
>  
> - aliases {
> - serial2 = &uart_AO_B;
> - ethernet0 = ðmac;
> - };
> -
>   gpio

[U-Boot] logging

2020-02-09 Thread Heinrich Schuchardt

Hello Simon,

I would like to convert printf and debug messages in the UEFI sub-system
to log messages.

Currently if CONFIG_LOG=n, log_*() functions are mapped to log_nop(). So
no output is provided independent of the criticality of the message.

What I would like to do is map log_err() to printf() and log_debug() to
debug() if CONFIG_LOG=n . This way we could get the same console output
no matter if CONFIG_LOG is enabled.

Would this make sense to you?

#if CONFIG_IS_ENABLED(LOG)
#define _LOG_MAX_LEVEL CONFIG_VAL(LOG_MAX_LEVEL)
#define log_err(_fmt...)log(LOG_CATEGORY, LOGL_ERR, ##_fmt)
#define log_warning(_fmt...)log(LOG_CATEGORY, LOGL_WARNING, ##_fmt)
#define log_notice(_fmt...) log(LOG_CATEGORY, LOGL_NOTICE, ##_fmt)
#define log_info(_fmt...)   log(LOG_CATEGORY, LOGL_INFO, ##_fmt)
#define log_debug(_fmt...)  log(LOG_CATEGORY, LOGL_DEBUG, ##_fmt)
#define log_content(_fmt...)log(LOG_CATEGORY, LOGL_DEBUG_CONTENT,
##_fmt)
#define log_io(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt)
#else
#define _LOG_MAX_LEVEL LOGL_INFO
#define log_err(_fmt...)    printf(##_fmt)
#define log_warning(_fmt...)    printf(##_fmt)
#define log_notice(_fmt...) printf(##_fmt)
#define log_info(_fmt...)   printf(##_fmt)
#define log_debug(_fmt...)  debug(##_fmt)
#define log_content(_fmt...)log_nop(LOG_CATEGORY, \
LOGL_DEBUG_CONTENT, ##_fmt)
#define log_io(_fmt...) log_nop(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt)
#endif

Best regards

Heinrich


Re: [yocto] Support UBI u-boot

2020-02-09 Thread JH
Anyway, hacked the Makefile and mtdpart.c, finally got it compiled to
support UBI. I think some latest branch might fix the problems I
haven't tested, if not, I am happy to make patches.

Thank you all.

Kind regards,

- jh

On 2/9/20, JH  wrote:
> Changed to https://source.codeaurora.org/external/imx/uboot-imx.git
> branch imx_v2018.03_4.14.98_2.0.0_ga, it can now support
> CONFIG_CMD_MTDPARTS ind defconfg, all MTDPARTS error gone, but then
> 2018.03-r0/git/cmd/ubi.c missed dependencies of del_mtd_partitions,
> add_mtd_partitions, mtd_get_device_size all in mtdpart.c which can
> only be enabled by CONFIG_MTD_PARTITIONS:
>
> obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
>
> But that CONFIG_MTD_PARTITIONS is not supported in defconfig.
>
> Could anyone advise which branch works for UBI?
>
> Thank you.
>
> Kind regards,
>
> - jh
>


[PATCHv6 5/5] arm: dts: s400: Move common nodes to the -u-boot.dtsi

2020-02-09 Thread Anand Moon
Move u-boot specific common nodes in the dts files to
meson-axg-s400-u-boot.dtsi. This allows us to keep the basic
dts[i] files up-to-date with the ones in kernel,
but at the same time allowing the u-boot to add its own
properties to the existing nodes.
Also add missing mmc alias to dts nodes to avoid
below debug warning.

mmc_bind: alias ret=-2, devnum=-1
mmc_bind: alias ret=-2, devnum=-1

Signed-off-by: Anand Moon 
---
no changes from previous changes
---
 arch/arm/dts/meson-axg-s400-u-boot.dtsi | 16 
 arch/arm/dts/meson-axg-s400.dts |  9 -
 2 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/arch/arm/dts/meson-axg-s400-u-boot.dtsi 
b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
index c46eb3f38d..74241e9fcd 100644
--- a/arch/arm/dts/meson-axg-s400-u-boot.dtsi
+++ b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
@@ -2,6 +2,22 @@
 /*
  * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
  */
+/ {
+   soc {
+   u-boot,dm-pre-reloc;
+   };
+
+   aliases {
+   serial0 = &uart_AO;
+   serial1 = &uart_A;
+   mmc1 = &sd_emmc_b;
+   mmc2 = &sd_emmc_c;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
 
 /* wifi module */
 &sd_emmc_b {
diff --git a/arch/arm/dts/meson-axg-s400.dts b/arch/arm/dts/meson-axg-s400.dts
index 18778ada7b..feb84255ad 100644
--- a/arch/arm/dts/meson-axg-s400.dts
+++ b/arch/arm/dts/meson-axg-s400.dts
@@ -55,11 +55,6 @@
};
};
 
-   aliases {
-   serial0 = &uart_AO;
-   serial1 = &uart_A;
-   };
-
linein: audio-codec@0 {
#sound-dai-cells = <0>;
compatible = "everest,es7241";
@@ -100,10 +95,6 @@
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
 
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x4000>;
-- 
2.25.0



[PATCHv6 4/5] arm: dts: g12: Move common nodes to the -u-boot.dtsi

2020-02-09 Thread Anand Moon
Move u-boot specific common nodes in the dts files to
meson-g12-common-u-boot.dtsi. This allows us to keep the basic
dts[i] files up-to-date with the ones in kernel,
but at the same time allowing the u-boot to add its own
properties to the existing nodes.
Also add missing mmc alias to dts nodes to avoid
below debug warning.

mmc_bind: alias ret=-2, devnum=-1
mmc_bind: alias ret=-2, devnum=-1

Signed-off-by: Anand Moon 
---
No changes from previous patch
---
 arch/arm/dts/meson-g12-common-u-boot.dtsi | 12 
 arch/arm/dts/meson-g12a-sei510.dts|  9 -
 arch/arm/dts/meson-g12a-u200.dts  |  9 -
 arch/arm/dts/meson-g12b-odroid-n2.dts |  9 -
 arch/arm/dts/meson-khadas-vim3.dtsi   |  9 -
 arch/arm/dts/meson-sm1-sei610.dts |  9 -
 6 files changed, 12 insertions(+), 45 deletions(-)

diff --git a/arch/arm/dts/meson-g12-common-u-boot.dtsi 
b/arch/arm/dts/meson-g12-common-u-boot.dtsi
index 38fd3d3feb..347b8ded22 100644
--- a/arch/arm/dts/meson-g12-common-u-boot.dtsi
+++ b/arch/arm/dts/meson-g12-common-u-boot.dtsi
@@ -8,6 +8,18 @@
soc {
u-boot,dm-pre-reloc;
};
+
+   aliases {
+   serial0 = &uart_AO;
+   ethernet0 = ðmac;
+   mmc0 = &sd_emmc_a;
+   mmc1 = &sd_emmc_b;
+   mmc2 = &sd_emmc_c;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
 };
 
 &canvas {
diff --git a/arch/arm/dts/meson-g12a-sei510.dts 
b/arch/arm/dts/meson-g12a-sei510.dts
index c7a8736885..c6a48ebbe5 100644
--- a/arch/arm/dts/meson-g12a-sei510.dts
+++ b/arch/arm/dts/meson-g12a-sei510.dts
@@ -28,11 +28,6 @@
};
};
 
-   aliases {
-   serial0 = &uart_AO;
-   ethernet0 = ðmac;
-   };
-
mono_dac: audio-codec-0 {
compatible = "maxim,max98357a";
#sound-dai-cells = <0>;
@@ -49,10 +44,6 @@
sound-name-prefix = "MIC";
};
 
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
cvbs-connector {
compatible = "composite-video-connector";
 
diff --git a/arch/arm/dts/meson-g12a-u200.dts b/arch/arm/dts/meson-g12a-u200.dts
index 8551fbd4a4..8be7b6985b 100644
--- a/arch/arm/dts/meson-g12a-u200.dts
+++ b/arch/arm/dts/meson-g12a-u200.dts
@@ -13,15 +13,6 @@
compatible = "amlogic,u200", "amlogic,g12a";
model = "Amlogic Meson G12A U200 Development Board";
 
-   aliases {
-   serial0 = &uart_AO;
-   ethernet0 = ðmac;
-   };
-
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
cvbs-connector {
compatible = "composite-video-connector";
 
diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts 
b/arch/arm/dts/meson-g12b-odroid-n2.dts
index 42f1540575..a37f66a5e0 100644
--- a/arch/arm/dts/meson-g12b-odroid-n2.dts
+++ b/arch/arm/dts/meson-g12b-odroid-n2.dts
@@ -15,15 +15,6 @@
compatible = "hardkernel,odroid-n2", "amlogic,g12b";
model = "Hardkernel ODROID-N2";
 
-   aliases {
-   serial0 = &uart_AO;
-   ethernet0 = ðmac;
-   };
-
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x4000>;
diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi 
b/arch/arm/dts/meson-khadas-vim3.dtsi
index 8647da7d66..c6b0ce9a88 100644
--- a/arch/arm/dts/meson-khadas-vim3.dtsi
+++ b/arch/arm/dts/meson-khadas-vim3.dtsi
@@ -11,15 +11,6 @@
 / {
model = "Khadas VIM3";
 
-   aliases {
-   serial0 = &uart_AO;
-   ethernet0 = ðmac;
-   };
-
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x8000>;
diff --git a/arch/arm/dts/meson-sm1-sei610.dts 
b/arch/arm/dts/meson-sm1-sei610.dts
index 3435aaa4e8..4372708811 100644
--- a/arch/arm/dts/meson-sm1-sei610.dts
+++ b/arch/arm/dts/meson-sm1-sei610.dts
@@ -14,15 +14,6 @@
compatible = "seirobotics,sei610", "amlogic,sm1";
model = "SEI Robotics SEI610";
 
-   aliases {
-   serial0 = &uart_AO;
-   ethernet0 = ðmac;
-   };
-
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
-- 
2.25.0



[PATCHv6 2/5] mmc: meson-gx: Use proper compatible string as per the dts

2020-02-09 Thread Anand Moon
Use proper compatible string as per the dts so that mmc driver
could be tuned properly. SoC family S905, S905X have common clk
tuning parameters setting, while AGX and G12 have common clk tuning
parameters setting for mmc driver.

Suggested-by: Neil Armstrong 
Signed-off-by: Anand Moon 
---
No changes.
---
 arch/arm/include/asm/arch-meson/sd_emmc.h |  7 
 drivers/mmc/meson_gx_mmc.c| 46 +--
 2 files changed, 41 insertions(+), 12 deletions(-)

diff --git a/arch/arm/include/asm/arch-meson/sd_emmc.h 
b/arch/arm/include/asm/arch-meson/sd_emmc.h
index f4299485dc..83142d5d3f 100644
--- a/arch/arm/include/asm/arch-meson/sd_emmc.h
+++ b/arch/arm/include/asm/arch-meson/sd_emmc.h
@@ -13,6 +13,12 @@
 #define SDIO_PORT_B1
 #define SDIO_PORT_C2
 
+enum mmc_compatible {
+MMC_COMPATIBLE_GXBB,
+MMC_COMPATIBLE_GX,
+MMC_COMPATIBLE_AXG,
+};
+
 #define SD_EMMC_CLKSRC_24M 2400/* 24 MHz */
 #define SD_EMMC_CLKSRC_DIV210  /* 1 GHz */
 
@@ -87,6 +93,7 @@
 struct meson_mmc_platdata {
struct mmc_config cfg;
struct mmc mmc;
+   int compat;
void *regbase;
void *w_buf;
 };
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index b013c7c5fb..1aefe360c4 100644
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -37,7 +37,8 @@ static inline void meson_write(struct mmc *mmc, uint32_t val, 
int offset)
writel(val, get_regbase(mmc) + offset);
 }
 
-static void meson_mmc_config_clock(struct mmc *mmc)
+static void meson_mmc_config_clock(struct mmc *mmc,
+  struct meson_mmc_platdata *pdata)
 {
uint32_t meson_mmc_clk = 0;
unsigned int clk, clk_src, clk_div;
@@ -66,14 +67,20 @@ static void meson_mmc_config_clock(struct mmc *mmc)
/* RX clock phase 0:180 */
meson_mmc_clk |= FIELD_PREP(CLK_RX_PHASE_MASK, CLK_PHASE_0);
 
-#ifdef CONFIG_MESON_GX
-   /* clk always on */
-   meson_mmc_clk |= CLK_V2_ALWAYS_ON;
-#endif
-#if (defined(CONFIG_MESON_AXG) || defined(CONFIG_MESON_G12A))
-   /* clk always on */
-   meson_mmc_clk |= CLK_V3_ALWAYS_ON;
-#endif
+   switch (pdata->compat) {
+   case MMC_COMPATIBLE_GXBB:
+   case MMC_COMPATIBLE_GX:
+   /* clk always on */
+   meson_mmc_clk |= CLK_V2_ALWAYS_ON;
+   break;
+   case MMC_COMPATIBLE_AXG:
+   /* clk always on */
+   meson_mmc_clk |= CLK_V3_ALWAYS_ON;
+   break;
+   default:
+   debug("no compatible supported");
+   break;
+   }
 
/* clock settings */
meson_mmc_clk |= clk_src;
@@ -85,9 +92,11 @@ static void meson_mmc_config_clock(struct mmc *mmc)
 static int meson_dm_mmc_set_ios(struct udevice *dev)
 {
struct mmc *mmc = mmc_get_mmc_dev(dev);
+   struct meson_mmc_platdata *pdata =
+   (struct meson_mmc_platdata *)dev_get_driver_data(dev);
uint32_t meson_mmc_cfg;
 
-   meson_mmc_config_clock(mmc);
+   meson_mmc_config_clock(mmc, pdata);
 
meson_mmc_cfg = meson_read(mmc, MESON_SD_EMMC_CFG);
 
@@ -324,9 +333,22 @@ int meson_mmc_bind(struct udevice *dev)
return mmc_bind(dev, &pdata->mmc, &pdata->cfg);
 }
 
+static const struct meson_mmc_platdata gxbb_data = {
+.compat = MMC_COMPATIBLE_GXBB,
+};
+
+static const struct meson_mmc_platdata gx_data = {
+.compat = MMC_COMPATIBLE_GX,
+};
+
+static const struct meson_mmc_platdata axg_data = {
+.compat = MMC_COMPATIBLE_AXG,
+};
+
 static const struct udevice_id meson_mmc_match[] = {
-   { .compatible = "amlogic,meson-gx-mmc" },
-   { .compatible = "amlogic,meson-axg-mmc" },
+   { .compatible = "amlogic,meson-gxbb-mmc", .data = (ulong)&gxbb_data },
+   { .compatible = "amlogic,meson-gx-mmc", .data = (ulong)&gx_data },
+   { .compatible = "amlogic,meson-axg-mmc", .data = (ulong)&axg_data },
{ /* sentinel */ }
 };
 
-- 
2.25.0



[PATCHv6 3/5] arm: dts: gx: Move common nodes to the -u-boot.dtsi

2020-02-09 Thread Anand Moon
Move u-boot specific common nodes in the dts files to
meson-gx-u-boot.dtsi. This allows us to keep the basic
dts[i] files up-to-date with the ones in kernel,
but at the same time allowing the u-boot to add its own
properties to the existing nodes.
Also add missing mmc alias to dts nodes to avoid
below debug warning.

mmc_bind: alias ret=-2, devnum=-1
mmc_bind: alias ret=-2, devnum=-1

Signed-off-by: Anand Moon 
---
no changes from previous
---
 arch/arm/dts/meson-gx-u-boot.dtsi | 15 +++
 arch/arm/dts/meson-gxbb-nanopi-k2.dts |  9 -
 arch/arm/dts/meson-gxbb-odroidc2.dts  |  9 -
 arch/arm/dts/meson-gxbb-p20x.dtsi |  9 -
 arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 10 --
 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts   |  5 -
 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts |  9 -
 arch/arm/dts/meson-gxl-s905x-p212.dtsi| 10 --
 arch/arm/dts/meson-gxm-khadas-vim2.dts| 10 --
 9 files changed, 15 insertions(+), 71 deletions(-)

diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi 
b/arch/arm/dts/meson-gx-u-boot.dtsi
index b84e5edba4..13be3a7b8f 100644
--- a/arch/arm/dts/meson-gx-u-boot.dtsi
+++ b/arch/arm/dts/meson-gx-u-boot.dtsi
@@ -8,6 +8,21 @@
soc {
u-boot,dm-pre-reloc;
};
+
+   aliases {
+   serial0 = &uart_AO;
+   serial1 = &uart_A;
+   serial2 = &uart_AO_B;
+   ethernet0 = ðmac;
+   spi0 = &spifc;
+   mmc0 = &sd_emmc_a;
+   mmc1 = &sd_emmc_b;
+   mmc2 = &sd_emmc_c;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
 };
 
 &vpu {
diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts 
b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
index cbe99bd4e0..11690d6c46 100644
--- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
@@ -11,15 +11,6 @@
 / {
compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
 
-   aliases {
-   serial0 = &uart_AO;
-   ethernet0 = ðmac;
-   };
-
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x8000>;
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
b/arch/arm/dts/meson-gxbb-odroidc2.dts
index 54954b314a..f8cd76a2ef 100644
--- a/arch/arm/dts/meson-gxbb-odroidc2.dts
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -14,15 +14,6 @@
compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
model = "Hardkernel ODROID-C2";
 
-   aliases {
-   serial0 = &uart_AO;
-   ethernet0 = ðmac;
-   };
-
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x8000>;
diff --git a/arch/arm/dts/meson-gxbb-p20x.dtsi 
b/arch/arm/dts/meson-gxbb-p20x.dtsi
index 0be0f2a5d2..c9822e50f9 100644
--- a/arch/arm/dts/meson-gxbb-p20x.dtsi
+++ b/arch/arm/dts/meson-gxbb-p20x.dtsi
@@ -8,15 +8,6 @@
 #include "meson-gxbb.dtsi"
 
 / {
-   aliases {
-   serial0 = &uart_AO;
-   ethernet0 = ðmac;
-   };
-
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x4000>;
diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts 
b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
index 82b1c48511..4f9072a83e 100644
--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
+++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
@@ -16,16 +16,6 @@
 "amlogic,meson-gxl";
model = "Libre Computer Board AML-S805X-AC";
 
-   aliases {
-   serial0 = &uart_AO;
-   ethernet0 = ðmac;
-   spi0 = &spifc;
-   };
-
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
cvbs-connector {
/*
 * The pads are present but no connector is soldered on
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts 
b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
index ceb34afe42..072e4575d2 100644
--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
@@ -26,11 +26,6 @@
};
};
 
-   aliases {
-   serial2 = &uart_AO_B;
-   ethernet0 = ðmac;
-   };
-
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts 
b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
index a23252efc6..8d3965ab42 100644
--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
+++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
@@ -15,15 +15,6 @@
compatible 

[PATCHv6 0/5] Odroid n2 using eMMC would fail to boot up

2020-02-09 Thread Anand Moon
Here are some small changes to fix booting of Odroid N2 using eMMC.
Fixed the clk tunnig during mmc initialization.
Added two new patches to fix warning

Build and tested on top of below patches
[0] https://patchwork.ozlabs.org/patch/1213648/
[1] https://patchwork.ozlabs.org/patch/1213650/

Tested on below eMMC module on Odroid N2 and C2
new orange - eMMC AJNB4R 14.6 GiB MMC 5.1
old back   - eMMC CGND3R 58.2 GiB MMC 5.0

Prevoius changes: 
Fixed the clk tuning as per mainline kernel

[3]v1 https://patchwork.ozlabs.org/cover/1201206/
[4]v2 https://patchwork.ozlabs.org/cover/1215217/
[5]v3 https://www.mail-archive.com/u-boot@lists.denx.de/msg351859.html
[6]v4 https://patchwork.ozlabs.org/cover/1227205/
[7]v5 https://patchwork.ozlabs.org/cover/1232879/

-Anand

Anand Moon (5):
  mmc: meson-gx: Fix clk phase tuning for MMC
  mmc: meson-gx: Use proper compatible string as per the dts
  arm: dts: gx: Move common nodes to the -u-boot.dtsi
  arm: dts: g12: Move common nodes to the -u-boot.dtsi
  arm: dts: s400: Move common nodes to the -u-boot.dtsi

 arch/arm/dts/meson-axg-s400-u-boot.dtsi   | 16 +
 arch/arm/dts/meson-axg-s400.dts   |  9 ---
 arch/arm/dts/meson-g12-common-u-boot.dtsi | 12 
 arch/arm/dts/meson-g12a-sei510.dts|  9 ---
 arch/arm/dts/meson-g12a-u200.dts  |  9 ---
 arch/arm/dts/meson-g12b-odroid-n2.dts |  9 ---
 arch/arm/dts/meson-gx-u-boot.dtsi | 15 +
 arch/arm/dts/meson-gxbb-nanopi-k2.dts |  9 ---
 arch/arm/dts/meson-gxbb-odroidc2.dts  |  9 ---
 arch/arm/dts/meson-gxbb-p20x.dtsi |  9 ---
 arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 10 
 arch/arm/dts/meson-gxl-s905x-khadas-vim.dts   |  5 --
 arch/arm/dts/meson-gxl-s905x-libretech-cc.dts |  9 ---
 arch/arm/dts/meson-gxl-s905x-p212.dtsi| 10 
 arch/arm/dts/meson-gxm-khadas-vim2.dts| 10 
 arch/arm/dts/meson-khadas-vim3.dtsi   |  9 ---
 arch/arm/dts/meson-sm1-sei610.dts |  9 ---
 arch/arm/include/asm/arch-meson/sd_emmc.h | 31 +++---
 drivers/mmc/meson_gx_mmc.c| 58 ---
 19 files changed, 114 insertions(+), 143 deletions(-)

-- 
2.25.0



[PATCHv6 1/5] mmc: meson-gx: Fix clk phase tuning for MMC

2020-02-09 Thread Anand Moon
As per mainline line kernel fix the clk tuning phase for mmc,
set Core=180, Tx=0, Rx=0 clk phase for mmc initialization.
As per S905, S905X, AGX and S922X datasheet set the default
values for clk tuning.

Signed-off-by: Anand Moon 
---
Changes from previous
v5  Fix the commit message, configure as per mainline kernel.
drop the RX_DELAY_MASK and TX_DELAY_MASK as they are not used.

v4  Fix the update mask value using FIELD_PREP macro.

v3  Fix the initialization of core clk tunning phase as per datasheet.
Fix the commit message.

v2: Fix the clk phase macro to support PHASE_180
drop the wrong CLK_CORE_PHASE_MASK macro.

v1: use the mainline kernel tuning for clk tuning.

Fixed the commmit messages.
Patch v1:
https://patchwork.ozlabs.org/patch/1201208/

Before these changes.
clock is enabled (380953Hz)
clock is enabled (2500Hz)
After these changes
clock is enabled (380953Hz)
clock is enabled (2500Hz)
clock is enabled (5200Hz)
Test on Odroid N2 and Odroid C2 with eMMC and microSD cards
---
 arch/arm/include/asm/arch-meson/sd_emmc.h | 24 +++
 drivers/mmc/meson_gx_mmc.c| 28 +++
 2 files changed, 38 insertions(+), 14 deletions(-)

diff --git a/arch/arm/include/asm/arch-meson/sd_emmc.h 
b/arch/arm/include/asm/arch-meson/sd_emmc.h
index e3a72c8b66..f4299485dc 100644
--- a/arch/arm/include/asm/arch-meson/sd_emmc.h
+++ b/arch/arm/include/asm/arch-meson/sd_emmc.h
@@ -7,6 +7,7 @@
 #define __SD_EMMC_H__
 
 #include 
+#include 
 
 #define SDIO_PORT_A0
 #define SDIO_PORT_B1
@@ -19,15 +20,20 @@
 #define   CLK_MAX_DIV  63
 #define   CLK_SRC_24M  (0 << 6)
 #define   CLK_SRC_DIV2 (1 << 6)
-#define   CLK_CO_PHASE_000 (0 << 8)
-#define   CLK_CO_PHASE_090 (1 << 8)
-#define   CLK_CO_PHASE_180 (2 << 8)
-#define   CLK_CO_PHASE_270 (3 << 8)
-#define   CLK_TX_PHASE_000 (0 << 10)
-#define   CLK_TX_PHASE_090 (1 << 10)
-#define   CLK_TX_PHASE_180 (2 << 10)
-#define   CLK_TX_PHASE_270 (3 << 10)
-#define   CLK_ALWAYS_ONBIT(24)
+
+#define   CRYSTAL_24MHZ0
+#define   CLK_PHASE_0  0
+#define   CLK_PHASE_1802
+
+#define   CLK_DIV_MASK GENMASK(5, 0)
+#define   CLK_SRC_MASK GENMASK(7, 6)
+#define   CLK_CORE_PHASE_MASK  GENMASK(9, 8)
+#define   CLK_TX_PHASE_MASKGENMASK(11, 10)
+#define   CLK_RX_PHASE_MASKGENMASK(13, 12)
+
+#define   CLK_V2_ALWAYS_ON BIT(24)
+
+#define   CLK_V3_ALWAYS_ON BIT(28)
 
 #define MESON_SD_EMMC_CFG  0x44
 #define   CFG_BUS_WIDTH_MASK   GENMASK(1, 0)
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index 86c1a7164a..b013c7c5fb 100644
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -16,6 +16,10 @@
 #include 
 #include 
 
+#include 
+#include 
+#include 
+
 static inline void *get_regbase(const struct mmc *mmc)
 {
struct meson_mmc_platdata *pdata = mmc->priv;
@@ -51,11 +55,25 @@ static void meson_mmc_config_clock(struct mmc *mmc)
}
clk_div = DIV_ROUND_UP(clk, mmc->clock);
 
-   /* 180 phase core clock */
-   meson_mmc_clk |= CLK_CO_PHASE_180;
-
-   /* 180 phase tx clock */
-   meson_mmc_clk |= CLK_TX_PHASE_000;
+   /* Clock divider */
+   meson_mmc_clk |= CLK_DIV_MASK;
+   /* Clock source : Crystal 24MHz */
+   meson_mmc_clk |= FIELD_PREP(CLK_SRC_MASK, CRYSTAL_24MHZ);
+   /* Core clock phase 2:180 */
+   meson_mmc_clk |= FIELD_PREP(CLK_CORE_PHASE_MASK, CLK_PHASE_180);
+   /* TX clock phase 0:180 */
+   meson_mmc_clk |= FIELD_PREP(CLK_TX_PHASE_MASK, CLK_PHASE_0);
+   /* RX clock phase 0:180 */
+   meson_mmc_clk |= FIELD_PREP(CLK_RX_PHASE_MASK, CLK_PHASE_0);
+
+#ifdef CONFIG_MESON_GX
+   /* clk always on */
+   meson_mmc_clk |= CLK_V2_ALWAYS_ON;
+#endif
+#if (defined(CONFIG_MESON_AXG) || defined(CONFIG_MESON_G12A))
+   /* clk always on */
+   meson_mmc_clk |= CLK_V3_ALWAYS_ON;
+#endif
 
/* clock settings */
meson_mmc_clk |= clk_src;
-- 
2.25.0



Re: [yocto] Support UBI u-boot

2020-02-09 Thread JH
Changed to https://source.codeaurora.org/external/imx/uboot-imx.git
branch imx_v2018.03_4.14.98_2.0.0_ga, it can now support
CONFIG_CMD_MTDPARTS ind defconfg, all MTDPARTS error gone, but then
2018.03-r0/git/cmd/ubi.c missed dependencies of del_mtd_partitions,
add_mtd_partitions, mtd_get_device_size all in mtdpart.c which can
only be enabled by CONFIG_MTD_PARTITIONS:

obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o

But that CONFIG_MTD_PARTITIONS is not supported in defconfig.

Could anyone advise which branch works for UBI?

Thank you.

Kind regards,

- jh