[PATCH] clk: Add more information to debug messages

[Sean Anderson]

Some of the debug messages in the clock subsystem can be made more
informative by adding the clock name or adding the explicit error.

Signed-off-by: Sean Anderson 
---

 drivers/clk/clk-uclass.c | 24 +---
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 71878474eb..d44df05680 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -237,8 +237,8 @@ static int clk_set_default_parents(struct udevice *dev, int 
stage)
continue;
 
if (ret < 0) {
-   debug("%s: failed to reparent clock %d for %s\n",
- __func__, index, dev_read_name(dev));
+   debug("%s: failed to reparent clock %d for %s (err = 
%d)\n",
+ __func__, index, dev_read_name(dev), ret);
return ret;
}
}
@@ -295,8 +295,8 @@ static int clk_set_default_rates(struct udevice *dev, int 
stage)
ret = clk_set_rate(, rates[index]);
 
if (ret < 0) {
-   debug("%s: failed to set rate on clock index %d (%ld) 
for %s\n",
- __func__, index, clk.id, dev_read_name(dev));
+   debug("%s: failed to set rate on clock index %d (%ld) 
for %s (err = %d)\n",
+ __func__, index, clk.id, dev_read_name(dev), ret);
break;
}
}
@@ -436,7 +436,7 @@ ulong clk_get_rate(struct clk *clk)
 {
const struct clk_ops *ops;
 
-   debug("%s(clk=%p)\n", __func__, clk);
+   debug("%s(clk=%p \"%s\")\n", __func__, clk, clk->dev->name);
if (!clk_valid(clk))
return 0;
ops = clk_dev_ops(clk->dev);
@@ -452,7 +452,7 @@ struct clk *clk_get_parent(struct clk *clk)
struct udevice *pdev;
struct clk *pclk;
 
-   debug("%s(clk=%p)\n", __func__, clk);
+   debug("%s(clk=%p) \"%s\"\n", __func__, clk, clk->dev->name);
if (!clk_valid(clk))
return NULL;
 
@@ -469,7 +469,7 @@ long long clk_get_parent_rate(struct clk *clk)
const struct clk_ops *ops;
struct clk *pclk;
 
-   debug("%s(clk=%p)\n", __func__, clk);
+   debug("%s(clk=%p \"%s\")\n", __func__, clk, clk->dev->name);
if (!clk_valid(clk))
return 0;
 
@@ -492,7 +492,8 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
 {
const struct clk_ops *ops;
 
-   debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
+   debug("%s(clk=%p \"%s\", rate=%lu)\n", __func__, clk, clk->dev->name,
+ rate);
if (!clk_valid(clk))
return 0;
ops = clk_dev_ops(clk->dev);
@@ -507,7 +508,8 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 {
const struct clk_ops *ops;
 
-   debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
+   debug("%s(clk=%p \"%s\", parent=%p \"%s\")\n", __func__, clk,
+ clk->dev->name, parent, parent->dev->name);
if (!clk_valid(clk))
return 0;
ops = clk_dev_ops(clk->dev);
@@ -524,7 +526,7 @@ int clk_enable(struct clk *clk)
struct clk *clkp = NULL;
int ret;
 
-   debug("%s(clk=%p)\n", __func__, clk);
+   debug("%s(clk=%p \"%s\")\n", __func__, clk, clk->dev->name);
if (!clk_valid(clk))
return 0;
ops = clk_dev_ops(clk->dev);
@@ -584,7 +586,7 @@ int clk_disable(struct clk *clk)
struct clk *clkp = NULL;
int ret;
 
-   debug("%s(clk=%p)\n", __func__, clk);
+   debug("%s(clk=%p) \"%s\"\n", __func__, clk, clk->dev->name);
if (!clk_valid(clk))
return 0;
ops = clk_dev_ops(clk->dev);
-- 
2.25.1

[PATCH 1/2] patman: Add option to suppress empty changelog entries

[Sean Anderson]

By default, patman outputs a line for every edition of the series in every
patch, regardless of whether any changes were made. This can result in many
redundant lines in patch changelogs, especially when a patch did not exist
before a certain revision. For example, the default behaviour could result
in a changelog of

Changes in v6:
- Make a change

Changes in v5: None

Changes in v4:
- New

Changes in v3: None
Changes in v2: None
Changes in v1: None

With this patch applied and with --no-empty-changes, the same patch would
look like

Changes in v6:
- Make a change

Changes in v4:
- New

This is entirely aesthetic, but I think it reduces clutter, especially for
patches added later on in a series.

Signed-off-by: Sean Anderson 
---

 tools/patman/func_test.py   |  2 +-
 tools/patman/patchstream.py | 15 ---
 tools/patman/patman.py  |  7 +--
 tools/patman/series.py  | 12 +++-
 tools/patman/test.py|  2 +-
 5 files changed, 22 insertions(+), 16 deletions(-)

diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py
index 76319fff37..0a8dc9b661 100644
--- a/tools/patman/func_test.py
+++ b/tools/patman/func_test.py
@@ -149,7 +149,7 @@ class TestFunctional(unittest.TestCase):
 series = patchstream.GetMetaDataForTest(text)
 cover_fname, args = self.CreatePatchesForTest(series)
 with capture() as out:
-patchstream.FixPatches(series, args)
+patchstream.FixPatches(series, args, False)
 if cover_fname and series.get('cover'):
 patchstream.InsertCoverLetter(cover_fname, series, count)
 series.DoChecks()
diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py
index df3eb7483b..3d83ed6adb 100644
--- a/tools/patman/patchstream.py
+++ b/tools/patman/patchstream.py
@@ -62,7 +62,7 @@ class PatchStream:
 unwanted tags or inject additional ones. These correspond to the two
 phases of processing.
 """
-def __init__(self, series, name=None, is_log=False):
+def __init__(self, series, empty_changes=True, name=None, is_log=False):
 self.skip_blank = False  # True to skip a single blank line
 self.found_test = False  # Found a TEST= line
 self.lines_after_test = 0# MNumber of lines found after TEST=
@@ -78,6 +78,7 @@ class PatchStream:
 self.state = STATE_MSG_HEADER# What state are we in?
 self.signoff = []# Contents of signoff line
 self.commit = None   # Current commit
+self.empty_changes = empty_changes# Whether to output empty changes
 
 def AddToSeries(self, line, name, value):
 """Add a new Series-xxx tag.
@@ -340,9 +341,9 @@ class PatchStream:
 elif line == '---':
 self.state = STATE_DIFFS
 
-# Output the tags (signeoff first), then change list
+# Output the tags (signoff first), then change list
 out = []
-log = self.series.MakeChangeLog(self.commit)
+log = self.series.MakeChangeLog(self.commit, 
self.empty_changes)
 out += [line]
 if self.commit:
 out += self.commit.notes
@@ -495,7 +496,7 @@ def GetMetaDataForTest(text):
 ps.Finalize()
 return series
 
-def FixPatch(backup_dir, fname, series, commit):
+def FixPatch(backup_dir, fname, series, commit, empty_changes):
 """Fix up a patch file, by adding/removing as required.
 
 We remove our tags from the patch file, insert changes lists, etc.
@@ -513,7 +514,7 @@ def FixPatch(backup_dir, fname, series, commit):
 handle, tmpname = tempfile.mkstemp()
 outfd = os.fdopen(handle, 'w', encoding='utf-8')
 infd = open(fname, 'r', encoding='utf-8')
-ps = PatchStream(series)
+ps = PatchStream(series, empty_changes=empty_changes)
 ps.commit = commit
 ps.ProcessStream(infd, outfd)
 infd.close()
@@ -525,7 +526,7 @@ def FixPatch(backup_dir, fname, series, commit):
 shutil.move(tmpname, fname)
 return ps.warn
 
-def FixPatches(series, fnames):
+def FixPatches(series, fnames, empty_changes):
 """Fix up a list of patches identified by filenames
 
 The patch files are processed in place, and overwritten.
@@ -541,7 +542,7 @@ def FixPatches(series, fnames):
 commit = series.commits[count]
 commit.patch = fname
 commit.count = count
-result = FixPatch(backup_dir, fname, series, commit)
+result = FixPatch(backup_dir, fname, series, commit, empty_changes)
 if result:
 print('%d warnings for %s:' % (len(result), fname))
 for warn in result:
diff --git a/tools/patman/patman.py b/tools/patman/patman.py
index cf53e532dd..6f92c5b7f3 100755
--- a/tools/patman/patman.py
+++ b/tools/patman/patman.py
@@ -61,7 +61,10 @@ parser.add_option('--no-check', action='store_false', 
dest='check_patch',
   default=True,

[PATCH 0/2] patman: Add changelog customization options

[Sean Anderson]

This series adds a few changes I have been using locally as options for
patman.


Sean Anderson (2):
  patman: Add option to suppress empty changelog entries
  patman: Add option to disable combined changelogs

 tools/patman/func_test.py   |  4 ++--
 tools/patman/patchstream.py | 22 --
 tools/patman/patman.py  | 13 ++---
 tools/patman/series.py  | 12 +++-
 tools/patman/test.py|  2 +-
 5 files changed, 32 insertions(+), 21 deletions(-)

-- 
2.25.1

[PATCH 2/2] patman: Add option to disable combined changelogs

[Sean Anderson]

By default patman generates a combined changelog for the cover letter. This
may not always be desireable.

Many patches may have the same changes. These can be coalesced with
"Series-process-log: uniq", but this is imperfect. First, this cannot be
used when there are multi-line changes. In addition, similar changes like
"Move foo to patch 7" will not be merged with the similar "Move foo to this
patch from patch 6".

Changes may not make sens outside of the patch they are written for. For
example, a change line of "Add check for bar" does not make sense outside
of the context in which bar might be checked for. Some changes like "New"
or "Lint" may be repeated many times throughout different change logs, but
carry no useful information in a summary.

Lastly, I like to summarize the broad strokes of the changes I have made in
the cover letter, while documenting all the details in the appropriate
patches. I think this make it easier to get a good feel for what has
changed, without making it difficult to wade through every change in the
whole series.

For these reasons, this patch adds an option to disable the automatic
changelog.

Signed-off-by: Sean Anderson 
---

 tools/patman/func_test.py   | 2 +-
 tools/patman/patchstream.py | 7 ---
 tools/patman/patman.py  | 6 +-
 3 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py
index 0a8dc9b661..65eccceb74 100644
--- a/tools/patman/func_test.py
+++ b/tools/patman/func_test.py
@@ -151,7 +151,7 @@ class TestFunctional(unittest.TestCase):
 with capture() as out:
 patchstream.FixPatches(series, args, False)
 if cover_fname and series.get('cover'):
-patchstream.InsertCoverLetter(cover_fname, series, count)
+patchstream.InsertCoverLetter(cover_fname, series, count, True)
 series.DoChecks()
 cc_file = series.MakeCcFile(process_tags, cover_fname,
 not ignore_bad_tags, add_maintainers,
diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py
index 3d83ed6adb..1cc9bce00c 100644
--- a/tools/patman/patchstream.py
+++ b/tools/patman/patchstream.py
@@ -551,7 +551,7 @@ def FixPatches(series, fnames, empty_changes):
 count += 1
 print('Cleaned %d patches' % count)
 
-def InsertCoverLetter(fname, series, count):
+def InsertCoverLetter(fname, series, count, changelog):
 """Inserts a cover letter with the required info into patch 0
 
 Args:
@@ -581,7 +581,8 @@ def InsertCoverLetter(fname, series, count):
 line += '\n'.join(series.notes) + '\n'
 
 # Now the change list
-out = series.MakeChangeLog(None)
-line += '\n' + '\n'.join(out)
+if changelog:
+out = series.MakeChangeLog(None, False)
+line += '\n' + '\n'.join(out)
 fd.write(line)
 fd.close()
diff --git a/tools/patman/patman.py b/tools/patman/patman.py
index 6f92c5b7f3..aa123c18c2 100755
--- a/tools/patman/patman.py
+++ b/tools/patman/patman.py
@@ -62,6 +62,9 @@ parser.add_option('--no-check', action='store_false', 
dest='check_patch',
   help="Don't check for patch compliance")
 parser.add_option('--no-tags', action='store_false', dest='process_tags',
   default=True, help="Don't process subject tags as aliases")
+parser.add_option('--no-changelog', action = 'store_false', dest='changelog',
+  default=True,
+ help="Don't create a changelog in the cover letter")
 parser.add_option('--no-empty-changes', action = 'store_false',
   dest='empty_changes', default=True,
  help="Suppress empty change entries in patch changelogs")
@@ -151,7 +154,8 @@ else:
 # Fix up the patch files to our liking, and insert the cover letter
 patchstream.FixPatches(series, args, options.empty_changes)
 if cover_fname and series.get('cover'):
-patchstream.InsertCoverLetter(cover_fname, series, options.count)
+patchstream.InsertCoverLetter(cover_fname, series, options.count,
+   options.changelog)
 
 # Do a few checks on the series
 series.DoChecks()
-- 
2.25.1

[PATCH] armv8: ls1028aqds: add some environments

[andy . tang]

From: Yuantian Tang 

Add sd and emmc bootcmd environments to facilitate
the boot process.

Signed-off-by: Yuantian Tang 
---
 include/configs/ls1028aqds.h | 38 +---
 1 file changed, 27 insertions(+), 11 deletions(-)

diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h
index b0e9441a48..4cffd69446 100644
--- a/include/configs/ls1028aqds.h
+++ b/include/configs/ls1028aqds.h
@@ -142,19 +142,35 @@
"${scripthdraddr} ${prefix}${boot_script_hdr} " \
"&& esbc_validate ${scripthdraddr};" \
"source ${scriptaddr}\0" \
-   "sd_bootcmd=echo Trying load from SD ..;" \
-   "mmcinfo; mmc read $load_addr " \
-   "$kernel_addr_sd $kernel_size_sd && " \
+   "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
+   "sf probe 0:0 && sf read $load_addr " \
+   "$kernel_start $kernel_size ; env exists secureboot &&" \
+   "sf read $kernelheader_addr_r $kernelheader_start " \
+   "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
+   " bootm $load_addr#$board\0" \
+   "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
+   "sf probe 0:0 && sf read $load_addr 0x94 0x3 " \
+   "&& hdp load $load_addr 0x2000\0"   \
+   "sd_bootcmd=echo Trying load from SD ...;" \
+   "mmcinfo; mmc read $load_addr " \
+   "$kernel_addr_sd $kernel_size_sd && "   \
"env exists secureboot && mmc read $kernelheader_addr_r " \
-   "$kernelhdr_addr_sd $kernelhdr_size_sd " \
-   " && esbc_validate ${kernelheader_addr_r};" \
-   "bootm $load_addr#$board\0" \
-   "emmc_bootcmd=echo Trying load from EMMC ..;" \
-   "mmcinfo; mmc dev 1; mmc read $load_addr " \
-   "$kernel_addr_sd $kernel_size_sd && " \
+   "$kernelhdr_addr_sd $kernelhdr_size_sd "\
+   " && esbc_validate ${kernelheader_addr_r};" \
+   "bootm $load_addr#$board\0" \
+   "sd_hdploadcmd=echo Trying load HDP firmware from SD..;"\
+   "mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
+   "&& hdp load $load_addr 0x2000\0"   \
+   "emmc_bootcmd=echo Trying load from EMMC ..;"   \
+   "mmcinfo; mmc dev 1; mmc read $load_addr "  \
+   "$kernel_addr_sd $kernel_size_sd && "   \
"env exists secureboot && mmc read $kernelheader_addr_r " \
-   "$kernelhdr_addr_sd $kernelhdr_size_sd " \
+   "$kernelhdr_addr_sd $kernelhdr_size_sd "\
" && esbc_validate ${kernelheader_addr_r};" \
-   "bootm $load_addr#$board\0"
+   "bootm $load_addr#$board\0" \
+   "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;"  \
+   "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 "   \
+   "&& hdp load $load_addr 0x2000\0"
+
 #endif
 #endif /* __LS1028A_QDS_H */
-- 
2.17.1

Re: [PATCH v3 3/5] riscv: Provide a mechanism to fix DT for reserved memory

[Bin Meng]

On Fri, Mar 20, 2020 at 4:46 AM Atish Patra  wrote:
>
> On Thu, Mar 19, 2020 at 7:31 AM Bin Meng  wrote:
> >
> > On Wed, Mar 18, 2020 at 5:19 AM Atish Patra  wrote:
> > >
> > > In RISC-V, M-mode software can reserve physical memory regions
> > > by setting appropriate physical memory protection (PMP) csr. As the
> > > PMP csr are accessible only in M-mode, S-mode U-Boot can not read
> > > this configuration directly. However, M-mode software can pass this
> > > information via reserved-memory node in device tree so that S-mode
> > > software can access this information.
> > >
> > > This patch provides a framework to copy to the reserved-memory node
> > > from one DT to another. This will be used to update the DT used by
> > > U-Boot and the DT passed to the next stage OS.
> > >
> > > Signed-off-by: Atish Patra 
> > > ---
> > >  arch/riscv/cpu/start.S|  1 +
> > >  arch/riscv/include/asm/global_data.h  |  1 +
> > >  arch/riscv/include/asm/u-boot-riscv.h |  1 +
> > >  arch/riscv/lib/asm-offsets.c  |  1 +
> > >  arch/riscv/lib/bootm.c| 68 +++
> > >  5 files changed, 72 insertions(+)
> > >
> > > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> > > index 6b3ff99c3882..0282685c2906 100644
> > > --- a/arch/riscv/cpu/start.S
> > > +++ b/arch/riscv/cpu/start.S
> > > @@ -121,6 +121,7 @@ call_board_init_f_0:
> > >
> > > jal board_init_f_init_reserve
> > >
> > > +   SREGs1, GD_FIRMWARE_FDT_ADDR(gp)
> > > /* save the boot hart id to global_data */
> > > SREGtp, GD_BOOT_HART(gp)
> > >
> > > diff --git a/arch/riscv/include/asm/global_data.h 
> > > b/arch/riscv/include/asm/global_data.h
> > > index b74bd7e738bb..51ac8d1c98e2 100644
> > > --- a/arch/riscv/include/asm/global_data.h
> > > +++ b/arch/riscv/include/asm/global_data.h
> > > @@ -15,6 +15,7 @@
> > >  /* Architecture-specific global data */
> > >  struct arch_global_data {
> > > long boot_hart; /* boot hart id */
> > > +   phys_addr_t firmware_fdt_addr;
> > >  #ifdef CONFIG_SIFIVE_CLINT
> > > void __iomem *clint;/* clint base address */
> > >  #endif
> > > diff --git a/arch/riscv/include/asm/u-boot-riscv.h 
> > > b/arch/riscv/include/asm/u-boot-riscv.h
> > > index 49febd588102..b7bea0ba184d 100644
> > > --- a/arch/riscv/include/asm/u-boot-riscv.h
> > > +++ b/arch/riscv/include/asm/u-boot-riscv.h
> > > @@ -17,5 +17,6 @@ int cleanup_before_linux(void);
> > >  /* board/.../... */
> > >  int board_init(void);
> > >  void board_quiesce_devices(void);
> > > +int riscv_board_reserved_mem_fixup(void *fdt);
> > >
> > >  #endif /* _U_BOOT_RISCV_H_ */
> > > diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
> > > index 4fa4fd371473..7301c1b98e23 100644
> > > --- a/arch/riscv/lib/asm-offsets.c
> > > +++ b/arch/riscv/lib/asm-offsets.c
> > > @@ -14,6 +14,7 @@
> > >  int main(void)
> > >  {
> > > DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart));
> > > +   DEFINE(GD_FIRMWARE_FDT_ADDR, offsetof(gd_t, 
> > > arch.firmware_fdt_addr));
> > >  #ifndef CONFIG_XIP
> > > DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts));
> > >  #endif
> > > diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
> > > index f927694ae32f..5e907e96701c 100644
> > > --- a/arch/riscv/lib/bootm.c
> > > +++ b/arch/riscv/lib/bootm.c
> > > @@ -19,6 +19,7 @@
> > >  #include 
> > >  #include 
> > >  #include 
> > > +#include 
> > >
> > >  DECLARE_GLOBAL_DATA_PTR;
> > >
> > > @@ -26,6 +27,73 @@ __weak void board_quiesce_devices(void)
> > >  {
> > >  }
> > >
> > > +int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
> >
> > We probably need find a better place for this routine, see below
> > comments for riscv_board_reserved_mem_fixup().
> >
> > We need make this routine public in u-boot-riscv.h as well.
> >
> > > +{
> > > +   uint32_t phandle;
> > > +   struct fdt_memory pmp_mem;
> > > +   fdt_addr_t addr;
> > > +   fdt_size_t size;
> > > +   int offset, node, err, rmem_offset;
> > > +   bool nomap = false;
> > > +   char basename[32] = {0};
> > > +   int bname_len;
> > > +   int max_len = sizeof(basename);
> > > +   const char *name;
> > > +   char *temp;
> > > +
> > > +   offset = fdt_path_offset(src, "/reserved-memory");
> > > +   if (offset < 0) {
> > > +   printf("No reserved memory region found in source FDT\n");
> > > +   return 0;
> > > +   }
> > > +
> > > +   fdt_for_each_subnode(node, src, offset) {
> > > +   name = fdt_get_name(src, node, NULL);
> > > +
> > > +   addr = fdtdec_get_addr_size_auto_noparent(src, node,
> > > + "reg", 0, ,
> > > + true);
> > > +   if (addr == FDT_ADDR_T_NONE) {
> > > +   debug("failed to read address/size for 

Re: [PATCH v3 4/5] riscv: Setup reserved-memory node for FU540

[Bin Meng]

On Fri, Mar 20, 2020 at 4:57 AM Atish Patra  wrote:
>
> On Thu, Mar 19, 2020 at 7:32 AM Bin Meng  wrote:
> >
> > On Wed, Mar 18, 2020 at 5:19 AM Atish Patra  wrote:
> > >
> > > FU540 uses OF_SEPARATE instead of OF_PRIOR.
> > >
> > > Enable OF_BOARD_FIXUP to update the DT with reserved-memory node.
> > >
> > > Signed-off-by: Atish Patra 
> > > ---
> > >  board/sifive/fu540/fu540.c | 15 +++
> > >  configs/sifive_fu540_defconfig |  1 +
> > >  2 files changed, 16 insertions(+)
> > >
> > > diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
> > > index 47a20902517c..82b3a9c8e729 100644
> > > --- a/board/sifive/fu540/fu540.c
> > > +++ b/board/sifive/fu540/fu540.c
> > > @@ -141,6 +141,21 @@ int misc_init_r(void)
> > >
> > >  #endif
> > >
> > > +#ifdef CONFIG_OF_BOARD_FIXUP
> > > +int board_fix_fdt(void *fdt)
> >
> > This routine should be put in a more generic file, as this could
> > potentially apply to all RISC-V platforms that need OF_BOARD_FIXUP
> > (e.g.: U-Boot itself is built with OF_SEPARATE).
> >
> > In case other platform wants to override this, we can define it as a __weak.
> >
> I am not opposed to that idea but board specific functions should be
> defined in board specific file.
> If we can violate that rule, I am okay with the proposal.

Probably we need a new option for this kind of fix-up, not
CONFIG_OF_BOARD_FIXUP that suggests it should be put in a board codes,
as it is really that board-specific.

>
> We can define a __weak board_fix_fdt in arch/riscv/lib/fdt_fixup.c and
> guard it under CONFIG_OF_BOARD_FIXUP.

Yep for now this looks good.

>
> > > +{
> > > +   int err;
> > > +
> > > +   err = riscv_board_reserved_mem_fixup(fdt);
> > > +   if (err < 0) {
> > > +   printf("failed to fixup DT for reserved memory: %d\n", 
> > > err);
> > > +   return err;
> > > +   }
> > > +
> > > +   return 0;
> > > +}
> > > +#endif
> > > +
> > >  int board_init(void)
> > >  {
> > > /* For now nothing to do here. */
> > > diff --git a/configs/sifive_fu540_defconfig 
> > > b/configs/sifive_fu540_defconfig
> > > index 6d61e6c960ee..8fb3794cd578 100644
> > > --- a/configs/sifive_fu540_defconfig
> > > +++ b/configs/sifive_fu540_defconfig
> > > @@ -12,3 +12,4 @@ CONFIG_DISPLAY_BOARDINFO=y
> > >  CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
> > >  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> > >  CONFIG_DM_MTD=y
> > > +CONFIG_OF_BOARD_FIXUP=y
> >
> > This line should be inserted after CONFIG_DISPLAY_BOARDINFO=y
> >
> > Please ensure defconfig file is updated like this:
> >
> > $ make sifive_fu540_defconfig
> > $ make savedefconfig
> > $ cp defconfig configs/sifive_fu540_defconfig
> >
>
> Sure. Will do that.

Regards,
Bin

[PATCH v2 7/8] spi: ca_sflash: Add CAxxxx SPI Flash Controller

[Alex Nemirovsky]

From: Pengpeng Chen 

Add SPI Flash controller driver for Cortina Access
CA SoCs

Signed-off-by: Pengpeng Chen 
Signed-off-by: Alex Nemirovsky 
CC: Jagan Teki 

---

Changes in v3:
- Fixup syntax issues related to checkpatch.pl cleanup

Changes in v2: None

 MAINTAINERS |   2 +
 drivers/spi/Kconfig |   8 +
 drivers/spi/Makefile|   1 +
 drivers/spi/ca_sflash.c | 576 
 4 files changed, 587 insertions(+)
 create mode 100644 drivers/spi/ca_sflash.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 24a2655..8509779 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -184,6 +184,7 @@ F:  drivers/mmc/ca_dw_mmc.c
 F: drivers/i2c/i2c-cortina.c
 F: drivers/i2c/i2c-cortina.h
 F: drivers/led/led_cortina.c
+F: drivers/spi/ca_sflash.c
 
 ARM/CZ.NIC TURRIS MOX SUPPORT
 M: Marek Behun 
@@ -678,6 +679,7 @@ F:  drivers/mmc/ca_dw_mmc.c
 F: drivers/i2c/i2c-cortina.c
 F: drivers/i2c/i2c-cortina.h
 F: drivers/led/led_cortina.c
+F: drivers/spi/ca_sflash.c
 
 MIPS MSCC
 M: Gregory CLEMENT 
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 4166c61..8a244f1 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -106,6 +106,14 @@ config BCMSTB_SPI
  be used to access the SPI flash on platforms embedding this
  Broadcom SPI core.
 
+config CORTINA_SFLASH
+   bool "Cortina-Access Serial Flash controller driver"
+   depends on DM_SPI && SPI_MEM
+   help
+ Enable the Cortina-Access Serial Flash controller driver. This driver
+ can be used to access the SPI NOR/NAND flash on platforms embedding 
this
+ Cortina-Access IP core.
+
 config CADENCE_QSPI
bool "Cadence QSPI driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 52462e1..32b98b4 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
 obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o
 obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
 obj-$(CONFIG_CF_SPI) += cf_spi.o
+obj-$(CONFIG_CORTINA_SFLASH) += ca_sflash.o
 obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
 obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o
 obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
diff --git a/drivers/spi/ca_sflash.c b/drivers/spi/ca_sflash.c
new file mode 100644
index 000..0709650
--- /dev/null
+++ b/drivers/spi/ca_sflash.c
@@ -0,0 +1,576 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Driver for Cortina SPI-FLASH Controller
+ *
+ * Copyright (C) 2020 Cortina Access Inc. All Rights Reserved.
+ *
+ * Author: PengPeng Chen 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct ca_sflash_regs {
+   u32 idr;/* 0x00:Flash word ID Register */
+   u32 tc; /* 0x04:Flash Timeout Counter Register */
+   u32 sr; /* 0x08:Flash Status Register */
+   u32 tr; /* 0x0C:Flash Type Register */
+   u32 asr;/* 0x10:Flash ACCESS START/BUSY Register */
+   u32 isr;/* 0x14:Flash Interrupt Status Register */
+   u32 imr;/* 0x18:Flash Interrupt Mask Register */
+   u32 fcr;/* 0x1C:NAND Flash FIFO Control Register */
+   u32 ffsr;   /* 0x20:Flash FIFO Status Register */
+   u32 ffar;   /* 0x24:Flash FIFO ADDRESS Register */
+   u32 ffmar;  /* 0x28:Flash FIFO MATCHING ADDRESS Register */
+   u32 ffdr;   /* 0x2C:Flash FIFO Data Register */
+   u32 ar; /* 0x30:Serial Flash Access Register */
+   u32 ear;/* 0x34:Serial Flash Extend Access Register */
+   u32 adr;/* 0x38:Serial Flash ADdress Register */
+   u32 dr; /* 0x3C:Serial Flash Data Register */
+   u32 tmr;/* 0x40:Serial Flash Timing Register */
+};
+
+/*
+ * FLASH_TYPE
+ */
+#define CA_FLASH_TR_PINBIT(15)
+#define CA_FLASH_TR_TYPE_MASK  GENMASK(14, 12)
+#define CA_FLASH_TR_TYPE(tp)   (((tp) << 12) & CA_FLASH_TR_TYPE_MASK)
+#define CA_FLASH_TR_WIDTH  BIT(11)
+#define CA_FLASH_TR_SIZE_MASK  GENMASK(10, 9)
+#define CA_FLASH_TR_SIZE(sz)   (((sz) << 9) & CA_FLASH_TR_SIZE_MASK)
+
+/*
+ * FLASH_FLASH_ACCESS_START
+ */
+#define CA_FLASH_ASR_IND_START_EN  BIT(1)
+#define CA_FLASH_ASR_DMA_START_EN  BIT(3)
+#define CA_FLASH_ASR_WR_ACCESS_EN  BIT(9)
+
+/*
+ * FLASH_FLASH_INTERRUPT
+ */
+#define CA_FLASH_ISR_REG_IRQ   BIT(1)
+#define CA_FLASH_ISR_FIFO_IRQ  BIT(2)
+
+/*
+ * FLASH_SF_ACCESS
+ */
+#define CA_SF_AR_OPCODE_MASK   GENMASK(7, 0)
+#define CA_SF_AR_OPCODE(op)((op) << 0 & CA_SF_AR_OPCODE_MASK)
+#define CA_SF_AR_ACCODE_MASK

[PATCH v2 5/8] led: led_cortina: Add CAxxx LED support

[Alex Nemirovsky]

From: Jway Lin 

Add Cortina Access LED controller support for CA SOCs

Signed-off-by: Jway Lin 
Signed-off-by: Alex Nemirovsky 
CC: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 MAINTAINERS   |   2 +
 drivers/led/Kconfig   |   8 ++
 drivers/led/Makefile  |   1 +
 drivers/led/led_cortina.c | 308 ++
 4 files changed, 319 insertions(+)
 create mode 100644 drivers/led/led_cortina.c

diff --git a/MAINTAINERS b/MAINTAINERS
index b147faa..24a2655 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -183,6 +183,7 @@ F:  drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
 F: drivers/i2c/i2c-cortina.c
 F: drivers/i2c/i2c-cortina.h
+F: drivers/led/led_cortina.c
 
 ARM/CZ.NIC TURRIS MOX SUPPORT
 M: Marek Behun 
@@ -676,6 +677,7 @@ F:  drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
 F: drivers/i2c/i2c-cortina.c
 F: drivers/i2c/i2c-cortina.h
+F: drivers/led/led_cortina.c
 
 MIPS MSCC
 M: Gregory CLEMENT 
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index 6675934..cc87fbf 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -35,6 +35,14 @@ config LED_BCM6858
  This option enables support for LEDs connected to the BCM6858
  HW has blinking capabilities and up to 32 LEDs can be controlled.
 
+config LED_CORTINA
+   bool "LED Support for Cortina Access CA SoCs"
+   depends on LED && (CORTINA_PLATFORM)
+   help
+ This option enables support for LEDs connected to the Cortina
+ Access CA SOCs.
+
+
 config LED_BLINK
bool "Support LED blinking"
depends on LED
diff --git a/drivers/led/Makefile b/drivers/led/Makefile
index 3654dd3..8e3ae7f 100644
--- a/drivers/led/Makefile
+++ b/drivers/led/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_LED_BCM6328) += led_bcm6328.o
 obj-$(CONFIG_LED_BCM6358) += led_bcm6358.o
 obj-$(CONFIG_LED_BCM6858) += led_bcm6858.o
 obj-$(CONFIG_$(SPL_)LED_GPIO) += led_gpio.o
+obj-$(CONFIG_LED_CORTINA) += led_cortina.o
diff --git a/drivers/led/led_cortina.c b/drivers/led/led_cortina.c
new file mode 100644
index 000..53435e8
--- /dev/null
+++ b/drivers/led/led_cortina.c
@@ -0,0 +1,308 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * Copyright (C) 2020 Cortina-Access
+ * Author: Jway Lin 
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define CORTINA_LED_NUM16
+
+#define BIT(nr)(1UL << (nr))
+
+#define cortina_LED_CONTROL0x00
+#define cortina_LED_CONFIG_0   0x04
+#define cortina_LED_CONFIG_1   0x08
+#define cortina_LED_CONFIG_2   0x0c
+#define cortina_LED_CONFIG_3   0x10
+#define cortina_LED_CONFIG_4   0x14
+#define cortina_LED_CONFIG_5   0x18
+#define cortina_LED_CONFIG_6   0x1c
+#define cortina_LED_CONFIG_7   0x20
+#define cortina_LED_CONFIG_8   0x24
+#define cortina_LED_CONFIG_9   0x28
+#define cortina_LED_CONFIG_10  0x2c
+#define cortina_LED_CONFIG_11  0x30
+#define cortina_LED_CONFIG_12  0x34
+#define cortina_LED_CONFIG_13  0x38
+#define cortina_LED_CONFIG_14  0x3c
+#define cortina_LED_CONFIG_15  0x40
+
+#define cortina_LED_MAX_HW_BLINK   127
+#define cortina_LED_MAX_COUNT  CORTINA_LED_NUM
+#define cortina_LED_MAX_PORT   8
+
+/* LED_CONTROL fields */
+#define cortina_LED_BLINK_RATE1_OFFSET 0
+#define cortina_LED_BLINK_RATE1_MASK   0xFF
+#define cortina_LED_BLINK_RATE2_OFFSET 8
+#define cortina_LED_BLINK_RATE2_MASK   0xFF
+#define cortina_LED_CLK_TEST   BIT(16)
+#define cortina_LED_CLK_POLARITY   BIT(17)
+#define cortina_LED_CLK_TEST_MODE  BIT(16)
+#define cortina_LED_CLK_TEST_RX_TEST   BIT(30)
+#define cortina_LED_CLK_TEST_TX_TEST   BIT(31)
+
+/* LED_CONFIG fields */
+#define cortina_LED_EVENT_ON_OFFSET0
+#define cortina_LED_EVENT_ON_MASK  0x7
+#define cortina_LED_EVENT_BLINK_OFFSET 3
+#define cortina_LED_EVENT_BLINK_MASK   0x7
+#define cortina_LED_EVENT_OFF_OFFSET   6
+#define cortina_LED_EVENT_OFF_MASK 0x7
+#define cortina_LED_OFF_ON_OFFSET  9
+#define cortina_LED_OFF_ON_MASK0x3
+#define cortina_LED_PORT_OFFSET11
+#define cortina_LED_PORT_MASK  0x7
+#define cortina_LED_OFF_VALBIT(14)
+#define cortina_LED_SW_EVENT   BIT(15)
+#define cortina_LED_BLINK_SEL  BIT(16)
+
+struct cortina_led_cfg {
+   void __iomem *regs;
+   spinlock_t *lock;   /* protect LED resource access */
+   int idx;
+   bool active_low;
+
+   int off_event;
+   int blink_event;
+   int on_event;
+   int port;
+   int blink;
+   int enable;
+};
+
+struct cortina_led_top_cfg {
+   void __iomem *regs;
+   u16 blink_rate1;
+   u16 blink_rate2;
+};
+
+static struct cortina_led_top_cfg glb_led_ctrl;
+
+static void 

[PATCH v2 3/8] i2c: i2c-cortina: added CAxxxx I2C support

[Alex Nemirovsky]

From: Arthur Li 

Add I2C controller support for Cortina Access CA SoCs

Signed-off-by: Arthur Li 
Signed-off-by: Alex Nemirovsky 
CC: Heiko Schocher 
---

Changes in v3: None
Changes in v2: None

 MAINTAINERS   |   4 +
 drivers/i2c/Kconfig   |   7 +
 drivers/i2c/Makefile  |   1 +
 drivers/i2c/i2c-cortina.c | 346 ++
 drivers/i2c/i2c-cortina.h |  92 
 5 files changed, 450 insertions(+)
 create mode 100644 drivers/i2c/i2c-cortina.c
 create mode 100644 drivers/i2c/i2c-cortina.h

diff --git a/MAINTAINERS b/MAINTAINERS
index bb45d3c..b147faa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -181,6 +181,8 @@ F:  drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
+F: drivers/i2c/i2c-cortina.c
+F: drivers/i2c/i2c-cortina.h
 
 ARM/CZ.NIC TURRIS MOX SUPPORT
 M: Marek Behun 
@@ -672,6 +674,8 @@ F:  drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
 F: drivers/mmc/ca_dw_mmc.c
+F: drivers/i2c/i2c-cortina.c
+F: drivers/i2c/i2c-cortina.h
 
 MIPS MSCC
 M: Gregory CLEMENT 
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 03d2fed..b98a4aa 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -85,6 +85,13 @@ config SYS_I2C_CADENCE
  Say yes here to select Cadence I2C Host Controller. This controller is
  e.g. used by Xilinx Zynq.
 
+config SYS_I2C_CA
+   tristate "Cortina-Access I2C Controller"
+   depends on DM_I2C && CORTINA_PLATFORM
+   default n
+   help
+ Say yes here to select Cortina-Access I2C Host Controller.
+
 config SYS_I2C_DAVINCI
bool "Davinci I2C Controller"
depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index f5a471f..5d18cf7 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_SYS_I2C) += i2c_core.o
 obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
 obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
 obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
+obj-$(CONFIG_SYS_I2C_CA) += i2c-cortina.o
 obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o
 obj-$(CONFIG_SYS_I2C_DW) += designware_i2c.o
 ifdef CONFIG_DM_PCI
diff --git a/drivers/i2c/i2c-cortina.c b/drivers/i2c/i2c-cortina.c
new file mode 100644
index 000..99c63f3
--- /dev/null
+++ b/drivers/i2c/i2c-cortina.c
@@ -0,0 +1,346 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020
+ * Arthur Li, Cortina Access, arthur...@cortina-access.com.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "i2c-cortina.h"
+
+static void set_speed(struct i2c_regs *regs, int i2c_spd)
+{
+   union ca_biw_cfg i2c_cfg;
+
+   i2c_cfg.wrd = readl(>i2c_cfg);
+   i2c_cfg.bf.core_en = 0;
+   writel(i2c_cfg.wrd, >i2c_cfg);
+
+   switch (i2c_spd) {
+   case IC_SPEED_MODE_MAX:
+   i2c_cfg.bf.prer =
+   CORTINA_PER_IO_FREQ / (5 * I2C_MAX_SPEED) - 1;
+   break;
+
+   case IC_SPEED_MODE_STANDARD:
+   i2c_cfg.bf.prer =
+   CORTINA_PER_IO_FREQ / (5 * I2C_STANDARD_SPEED) - 1;
+   break;
+
+   case IC_SPEED_MODE_FAST:
+   default:
+   i2c_cfg.bf.prer =
+   CORTINA_PER_IO_FREQ / (5 * I2C_FAST_SPEED) - 1;
+   break;
+   }
+
+   i2c_cfg.bf.core_en = 1;
+   writel(i2c_cfg.wrd, >i2c_cfg);
+}
+
+static int ca_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
+{
+   struct ca_i2c *priv = dev_get_priv(bus);
+   int i2c_spd;
+
+   if (speed >= I2C_MAX_SPEED) {
+   i2c_spd = IC_SPEED_MODE_MAX;
+   priv->speed = I2C_MAX_SPEED;
+   } else if (speed >= I2C_FAST_SPEED) {
+   i2c_spd = IC_SPEED_MODE_FAST;
+   priv->speed = I2C_FAST_SPEED;
+   } else {
+   i2c_spd = IC_SPEED_MODE_STANDARD;
+   priv->speed = I2C_STANDARD_SPEED;
+   }
+
+   set_speed(priv->regs, i2c_spd);
+
+   return 0;
+}
+
+static int ca_i2c_get_bus_speed(struct udevice *bus)
+{
+   struct ca_i2c *priv = dev_get_priv(bus);
+
+   return priv->speed;
+}
+
+static void ca_i2c_init(struct i2c_regs *regs)
+{
+   union ca_biw_cfg i2c_cfg;
+
+   i2c_cfg.wrd = readl(>i2c_cfg);
+   i2c_cfg.bf.core_en = 0;
+   i2c_cfg.bf.biw_soft_reset = 1;
+   writel(i2c_cfg.wrd, >i2c_cfg);
+   mdelay(10);
+   i2c_cfg.bf.biw_soft_reset = 0;
+   writel(i2c_cfg.wrd, >i2c_cfg);
+
+   set_speed(regs, IC_SPEED_MODE_STANDARD);
+
+   i2c_cfg.wrd = readl(>i2c_cfg);
+   i2c_cfg.bf.core_en = 1;
+   writel(i2c_cfg.wrd, >i2c_cfg);
+}
+
+static int i2c_wait_complete(struct i2c_regs *regs)
+{
+   union ca_biw_ctrl i2c_ctrl;
+   unsigned long start_time_bb = get_timer(0);
+
+   i2c_ctrl.wrd = readl(>i2c_ctrl);

[PATCH v2 2/8] board: presidio-asic: Add eMMC board support

[Alex Nemirovsky]

Add initial eMMC support for Cortina Access Presidio
Engineering Board

Signed-off-by: Alex Nemirovsky 
CC: Peng Fan 
---

Changes in v3: None
Changes in v2: None

 configs/cortina_presidio-asic-emmc_defconfig | 33 
 1 file changed, 33 insertions(+)
 create mode 100644 configs/cortina_presidio-asic-emmc_defconfig

diff --git a/configs/cortina_presidio-asic-emmc_defconfig 
b/configs/cortina_presidio-asic-emmc_defconfig
new file mode 100644
index 000..e10008a
--- /dev/null
+++ b/configs/cortina_presidio-asic-emmc_defconfig
@@ -0,0 +1,33 @@
+CONFIG_ARM=y
+# CONFIG_SYS_ARCH_TIMER is not set
+CONFIG_TARGET_PRESIDIO_ASIC=y
+CONFIG_SYS_TEXT_BASE=0x0400
+CONFIG_ENV_SIZE=0x2
+CONFIG_DM_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_IDENT_STRING="Presidio-SoC"
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_SYS_PROMPT="G3#"
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_WDT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
+# CONFIG_NET is not set
+CONFIG_DM=y
+CONFIG_CORTINA_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_CORTINA=y
+CONFIG_DM_SERIAL=y
+CONFIG_CORTINA_UART=y
+CONFIG_WDT=y
+CONFIG_WDT_CORTINA=y
-- 
2.7.4

[PATCH v2 8/8] board: presidio-asic: Add SPI NAND and NOR support

[Alex Nemirovsky]

Add SPI NAND and NOR support for Cortina Access
Presidio Engineering Board

Signed-off-by: Alex Nemirovsky 
CC: Jagan Teki 
---

Changes in v3: None
Changes in v2: None

 arch/arm/dts/ca-presidio-engboard.dts|  8 ++--
 board/cortina/presidio-asic/presidio.c   | 16 ++-
 configs/cortina_presidio-asic-spi-nand_defconfig | 48 +++
 configs/cortina_presidio-asic-spi-nor_defconfig  | 59 
 4 files changed, 125 insertions(+), 6 deletions(-)
 create mode 100644 configs/cortina_presidio-asic-spi-nand_defconfig
 create mode 100644 configs/cortina_presidio-asic-spi-nor_defconfig

diff --git a/arch/arm/dts/ca-presidio-engboard.dts 
b/arch/arm/dts/ca-presidio-engboard.dts
index ae897e8..8c73eb6 100644
--- a/arch/arm/dts/ca-presidio-engboard.dts
+++ b/arch/arm/dts/ca-presidio-engboard.dts
@@ -55,15 +55,13 @@
};
 
sflash: sflash-controller@f4324000 {
-   #address-cells = <2>;
-   #size-cells = <1>;
compatible = "cortina,ca-sflash";
reg = <0x0 0xf4324000 0x50>;
reg-names = "sflash-regs";
flash@0 {
-   compatible = "jedec,spi-nor";
-   spi-rx-bus-width = <1>;
-   spi-max-frequency = <10800>;
+   compatible = "spi-nand", "jedec,spi-nor";
+   spi-rx-bus-width = <4>;
+   spi-tx-bus-width = <4>;
};
};
 
diff --git a/board/cortina/presidio-asic/presidio.c 
b/board/cortina/presidio-asic/presidio.c
index b4fa01f..d547b60 100644
--- a/board/cortina/presidio-asic/presidio.c
+++ b/board/cortina/presidio-asic/presidio.c
@@ -14,7 +14,7 @@
 #include 
 #include 
 #include 
-
+#include 
 DECLARE_GLOBAL_DATA_PTR;
 
 #define CA_PERIPH_BASE  0xE000UL
@@ -70,9 +70,23 @@ static noinline int invoke_psci_fn_smc(u64 function_id, u64 
arg0, u64 arg1,
return function_id;
 }
 
+#ifdef CONFIG_CORTINA_SFLASH
+static int init_sflash(void)
+{
+   struct udevice *dev;
+
+   uclass_first_device(UCLASS_SPI, );
+
+   return 0;
+}
+#endif
+
 int board_early_init_r(void)
 {
dcache_disable();
+#ifdef CONFIG_CORTINA_SFLASH
+   init_sflash();
+#endif
return 0;
 }
 
diff --git a/configs/cortina_presidio-asic-spi-nand_defconfig 
b/configs/cortina_presidio-asic-spi-nand_defconfig
new file mode 100644
index 000..515ad22
--- /dev/null
+++ b/configs/cortina_presidio-asic-spi-nand_defconfig
@@ -0,0 +1,48 @@
+CONFIG_ARM=y
+# CONFIG_SYS_ARCH_TIMER is not set
+CONFIG_TARGET_PRESIDIO_ASIC=y
+CONFIG_SYS_TEXT_BASE=0x0400
+CONFIG_ENV_SIZE=0x2
+CONFIG_DM_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_IDENT_STRING="Presidio-SoC"
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=7
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_SYS_PROMPT="G3#"
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_WDT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
+# CONFIG_NET is not set
+CONFIG_DM=y
+CONFIG_CORTINA_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CA=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_CORTINA=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_DM_SERIAL=y
+CONFIG_CORTINA_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_CORTINA_SFLASH=y
+CONFIG_WDT=y
+CONFIG_WDT_CORTINA=y
diff --git a/configs/cortina_presidio-asic-spi-nor_defconfig 
b/configs/cortina_presidio-asic-spi-nor_defconfig
new file mode 100644
index 000..d7ecec3
--- /dev/null
+++ b/configs/cortina_presidio-asic-spi-nor_defconfig
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+# CONFIG_SYS_ARCH_TIMER is not set
+CONFIG_TARGET_PRESIDIO_ASIC=y
+CONFIG_SYS_TEXT_BASE=0x0400
+CONFIG_ENV_SIZE=0x2
+CONFIG_DM_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_IDENT_STRING="Presidio-SoC"
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_SYS_PROMPT="G3#"
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_WDT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
+# CONFIG_NET is not set
+CONFIG_DM=y
+CONFIG_CORTINA_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CA=y
+CONFIG_LED=y
+CONFIG_LED_CORTINA=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_CORTINA=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y

[PATCH v2 6/8] board: presidio: add LED support

[Alex Nemirovsky]

From: Jway Lin 

Add LED support for Cortina Access Presidio Engineering Board

Signed-off-by: Jway Lin 
Signed-off-by: Alex Nemirovsky 
CC: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 arch/arm/dts/ca-presidio-engboard.dts| 31 
 configs/cortina_presidio-asic-emmc_defconfig |  2 ++
 2 files changed, 33 insertions(+)

diff --git a/arch/arm/dts/ca-presidio-engboard.dts 
b/arch/arm/dts/ca-presidio-engboard.dts
index c03dacc..ae897e8 100644
--- a/arch/arm/dts/ca-presidio-engboard.dts
+++ b/arch/arm/dts/ca-presidio-engboard.dts
@@ -66,4 +66,35 @@
spi-max-frequency = <10800>;
};
};
+
+   leds: led-controller@f43200f0 {
+   compatible = "cortina,ca-leds";
+   reg = <0x0 0xf43200f0 0x40>;
+
+   cortina,blink_rate1 = <256>;
+   cortina,blink_rate2 = <512>;
+
+   led@0 {
+   pin = <0>;
+   active-low;
+   blink-sel =<0>;
+   port = <0>;
+   off-event = <0>;
+   label = "led0";
+   };
+
+   led@1 {
+   pin = <1>;
+   active-low;
+   blink-sel =<1>;
+   label = "led1";
+   };
+
+   led@2 {
+   pin = <2>;
+   active-low;
+   label = "led2";
+   };
+
+   };
 };
diff --git a/configs/cortina_presidio-asic-emmc_defconfig 
b/configs/cortina_presidio-asic-emmc_defconfig
index e45e23c..3c6bd6b 100644
--- a/configs/cortina_presidio-asic-emmc_defconfig
+++ b/configs/cortina_presidio-asic-emmc_defconfig
@@ -27,6 +27,8 @@ CONFIG_DM=y
 CONFIG_CORTINA_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CA=y
+CONFIG_LED=y
+CONFIG_LED_CORTINA=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_CORTINA=y
-- 
2.7.4

[PATCH v2 4/8] board: presidio-asic: Add I2C support

[Alex Nemirovsky]

Add I2C board support for Cortina Access Presidio Engineering Board

Signed-off-by: Alex Nemirovsky 
CC: Heiko Schocher 
---

Changes in v3: None
Changes in v2: None

 configs/cortina_presidio-asic-emmc_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/cortina_presidio-asic-emmc_defconfig 
b/configs/cortina_presidio-asic-emmc_defconfig
index e10008a..e45e23c 100644
--- a/configs/cortina_presidio-asic-emmc_defconfig
+++ b/configs/cortina_presidio-asic-emmc_defconfig
@@ -10,6 +10,7 @@ CONFIG_SHOW_BOOT_PROGRESS=y
 CONFIG_BOOTDELAY=3
 CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_SYS_PROMPT="G3#"
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PART=y
 CONFIG_CMD_WDT=y
@@ -24,6 +25,8 @@ CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
 # CONFIG_NET is not set
 CONFIG_DM=y
 CONFIG_CORTINA_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CA=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_CORTINA=y
-- 
2.7.4

[PATCH v2 1/8] mmc: ca_dw_mmc: add DesignWare based DM support for CAxxxx SoCs

[Alex Nemirovsky]

From: Arthur Li 

Initial DesignWare based DM support for Cortina Access CA SoCs.

Signed-off-by: Arthur Li 
Signed-off-by: Alex Nemirovsky 
CC: Peng Fan 

---

Changes in v3: None
Changes in v2:
- Add I2C controller
- Add LED controller
- Add SPI NAND and NOR controller

 MAINTAINERS |   2 +
 drivers/mmc/Kconfig |  11 +++
 drivers/mmc/Makefile|   1 +
 drivers/mmc/ca_dw_mmc.c | 181 
 4 files changed, 195 insertions(+)
 create mode 100644 drivers/mmc/ca_dw_mmc.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 82e4159..bb45d3c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -180,6 +180,7 @@ F:  board/cortina/common/
 F: drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
+F: drivers/mmc/ca_dw_mmc.c
 
 ARM/CZ.NIC TURRIS MOX SUPPORT
 M: Marek Behun 
@@ -670,6 +671,7 @@ F:  board/cortina/common/
 F: drivers/gpio/cortina_gpio.c
 F: drivers/watchdog/cortina_wdt.c
 F: drivers/serial/serial_cortina.c
+F: drivers/mmc/ca_dw_mmc.c
 
 MIPS MSCC
 M: Gregory CLEMENT 
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 2f0eedc..bb38787 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -205,6 +205,17 @@ config MMC_DW
  block, this provides host support for SD and MMC interfaces, in both
  PIO, internal DMA mode and external DMA mode.
 
+config MMC_DW_CORTINA
+   bool "Cortina specific extensions for Synopsys DW Memory Card Interface"
+   depends on DM_MMC
+   depends on MMC_DW
+   depends on BLK
+   default n
+   help
+ This selects support for Cortina SoC specific extensions to the
+ Synopsys DesignWare Memory Card Interface driver. Select this option
+ for platforms based on Cortina CA Soc's.
+
 config MMC_DW_EXYNOS
bool "Exynos specific extensions for Synopsys DW Memory Card Interface"
depends on ARCH_EXYNOS
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 9c1f8e5..615b724 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -20,6 +20,7 @@ endif
 obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
 obj-$(CONFIG_MMC_DAVINCI)  += davinci_mmc.o
 obj-$(CONFIG_MMC_DW)   += dw_mmc.o
+obj-$(CONFIG_MMC_DW_CORTINA)   += ca_dw_mmc.o
 obj-$(CONFIG_MMC_DW_EXYNOS)+= exynos_dw_mmc.o
 obj-$(CONFIG_MMC_DW_K3)+= hi6220_dw_mmc.o
 obj-$(CONFIG_MMC_DW_ROCKCHIP)  += rockchip_dw_mmc.o
diff --git a/drivers/mmc/ca_dw_mmc.c b/drivers/mmc/ca_dw_mmc.c
new file mode 100644
index 000..acbc850
--- /dev/null
+++ b/drivers/mmc/ca_dw_mmc.c
@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Cortina Access
+ * Arthur Li 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SD_CLK_SEL_MASK (0x3)
+#define SD_DLL_DEFAULT  (0x143000)
+#define SD_SCLK_MAX (2)
+
+#define SD_CLK_SEL_200MHZ (0x2)
+#define SD_CLK_SEL_100MHZ (0x1)
+
+#define IO_DRV_SD_DS_OFFSET (16)
+#define IO_DRV_SD_DS_MASK   (0xff << IO_DRV_SD_DS_OFFSET)
+
+#define MIN_FREQ (40)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct ca_mmc_plat {
+   struct mmc_config cfg;
+   struct mmc mmc;
+};
+
+struct ca_dwmmc_priv_data {
+   struct dwmci_host host;
+   void __iomem *sd_dll_reg;
+   void __iomem *io_drv_reg;
+   u8 ds;
+};
+
+static void ca_dwmci_clksel(struct dwmci_host *host)
+{
+   struct ca_dwmmc_priv_data *priv = host->priv;
+   u32 val = readl(priv->sd_dll_reg);
+
+   if (host->bus_hz >= 2) {
+   val &= ~SD_CLK_SEL_MASK;
+   val |= SD_CLK_SEL_200MHZ;
+   } else if (host->bus_hz >= 1) {
+   val &= ~SD_CLK_SEL_MASK;
+   val |= SD_CLK_SEL_100MHZ;
+   } else {
+   val &= ~SD_CLK_SEL_MASK;
+   }
+
+   writel(val, priv->sd_dll_reg);
+}
+
+static void ca_dwmci_board_init(struct dwmci_host *host)
+{
+   struct ca_dwmmc_priv_data *priv = host->priv;
+   u32 val = readl(priv->io_drv_reg);
+
+   writel(SD_DLL_DEFAULT, priv->sd_dll_reg);
+
+   val &= ~IO_DRV_SD_DS_MASK;
+   if (priv && priv->ds)
+   val |= priv->ds << IO_DRV_SD_DS_OFFSET;
+   writel(val, priv->io_drv_reg);
+}
+
+unsigned int ca_dwmci_get_mmc_clock(struct dwmci_host *host, uint freq)
+{
+   struct ca_dwmmc_priv_data *priv = host->priv;
+   u8 sd_clk_sel = readl(priv->sd_dll_reg) & SD_CLK_SEL_MASK;
+   u8 clk_div;
+
+   switch (sd_clk_sel) {
+   case 2:
+   clk_div = 1;
+   break;
+   case 1:
+   clk_div = 2;
+   break;
+   default:
+   clk_div = 4;
+   }
+
+   return SD_SCLK_MAX / clk_div / (host->div + 1);
+}
+
+static int ca_dwmmc_ofdata_to_platdata(struct udevice *dev)
+{
+   struct ca_dwmmc_priv_data *priv = dev_get_priv(dev);
+ 

[PATCH v2 0/8] Cortina Access Drivers Package 2

[Alex Nemirovsky]

This release adds the following drivers and
integrates support  into the Cortina Access
Presidio Engineering Board:

CA SoC eMMC/SD controller
CA SoC I2C controller
CA Soc LED controller
CA SPI NAND and NOR controller

Changes in v3:
- Fixup syntax issues related to checkpatch.pl cleanup

Changes in v2:
- Add I2C controller
- Add LED controller
- Add SPI NAND and NOR controller

Alex Nemirovsky (3):
  board: presidio-asic: Add eMMC board support
  board: presidio-asic: Add I2C support
  board: presidio-asic: Add SPI NAND and NOR support

Arthur Li (2):
  mmc: ca_dw_mmc: add DesignWare based DM support for CA SoCs
  i2c: i2c-cortina: added CA I2C support

Jway Lin (2):
  led: led_cortina: Add CAxxx LED support
  board: presidio: add LED support

Pengpeng Chen (1):
  spi: ca_sflash: Add CA SPI Flash Controller

 MAINTAINERS  |  10 +
 arch/arm/dts/ca-presidio-engboard.dts|  39 +-
 board/cortina/presidio-asic/presidio.c   |  16 +-
 configs/cortina_presidio-asic-emmc_defconfig |  38 ++
 configs/cortina_presidio-asic-spi-nand_defconfig |  48 ++
 configs/cortina_presidio-asic-spi-nor_defconfig  |  59 +++
 drivers/i2c/Kconfig  |   7 +
 drivers/i2c/Makefile |   1 +
 drivers/i2c/i2c-cortina.c| 346 ++
 drivers/i2c/i2c-cortina.h|  92 
 drivers/led/Kconfig  |   8 +
 drivers/led/Makefile |   1 +
 drivers/led/led_cortina.c| 308 
 drivers/mmc/Kconfig  |  11 +
 drivers/mmc/Makefile |   1 +
 drivers/mmc/ca_dw_mmc.c  | 181 +++
 drivers/spi/Kconfig  |   8 +
 drivers/spi/Makefile |   1 +
 drivers/spi/ca_sflash.c  | 576 +++
 19 files changed, 1745 insertions(+), 6 deletions(-)
 create mode 100644 configs/cortina_presidio-asic-emmc_defconfig
 create mode 100644 configs/cortina_presidio-asic-spi-nand_defconfig
 create mode 100644 configs/cortina_presidio-asic-spi-nor_defconfig
 create mode 100644 drivers/i2c/i2c-cortina.c
 create mode 100644 drivers/i2c/i2c-cortina.h
 create mode 100644 drivers/led/led_cortina.c
 create mode 100644 drivers/mmc/ca_dw_mmc.c
 create mode 100644 drivers/spi/ca_sflash.c

-- 
2.7.4

Re: [PATCH v2 1/8] mmc: ca_dw_mmc: add DesignWare based DM support for CAxxxx SoCs

[Alex Nemirovsky]

Hi Arthur,

could you respond to this or fix as required?

Thanks
Alex

> On Mar 18, 2020, at 10:27 PM, Jaehoon Chung  wrote:
> 
> On 3/19/20 10:52 AM, Alex Nemirovsky wrote:
>> From: Arthur Li 
>> 
>> Initial DesignWare based DM support for Cortina Access CA SoCs.
>> 
>> Signed-off-by: Arthur Li 
>> Signed-off-by: Alex Nemirovsky 
>> 
>> ---
>> 
>> Changes in v3: None
>> Changes in v2:
>> - Add I2C controller
>> - Add LED controller
>> - Add SPI NAND and NOR controller
>> 
>> MAINTAINERS |   2 +
>> drivers/mmc/Kconfig |  11 +++
>> drivers/mmc/Makefile|   1 +
>> drivers/mmc/ca_dw_mmc.c | 181 
>> 
>> 4 files changed, 195 insertions(+)
>> create mode 100644 drivers/mmc/ca_dw_mmc.c
>> 
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 82e4159..bb45d3c 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -180,6 +180,7 @@ F:   board/cortina/common/
>> F:   drivers/gpio/cortina_gpio.c
>> F:   drivers/watchdog/cortina_wdt.c
>> F:   drivers/serial/serial_cortina.c
>> +F:  drivers/mmc/ca_dw_mmc.c
>> 
>> ARM/CZ.NIC TURRIS MOX SUPPORT
>> M:   Marek Behun 
>> @@ -670,6 +671,7 @@ F:   board/cortina/common/
>> F:   drivers/gpio/cortina_gpio.c
>> F:   drivers/watchdog/cortina_wdt.c
>> F:   drivers/serial/serial_cortina.c
>> +F:  drivers/mmc/ca_dw_mmc.c
>> 
>> MIPS MSCC
>> M:   Gregory CLEMENT 
>> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
>> index 2f0eedc..bb38787 100644
>> --- a/drivers/mmc/Kconfig
>> +++ b/drivers/mmc/Kconfig
>> @@ -205,6 +205,17 @@ config MMC_DW
>>block, this provides host support for SD and MMC interfaces, in both
>>PIO, internal DMA mode and external DMA mode.
>> 
>> +config MMC_DW_CORTINA
>> +bool "Cortina specific extensions for Synopsys DW Memory Card Interface"
>> +depends on DM_MMC
>> +depends on MMC_DW
>> +depends on BLK
>> +default n
>> +help
>> +  This selects support for Cortina SoC specific extensions to the
>> +  Synopsys DesignWare Memory Card Interface driver. Select this option
>> +  for platforms based on Cortina CA Soc's.
>> +
>> config MMC_DW_EXYNOS
>>  bool "Exynos specific extensions for Synopsys DW Memory Card Interface"
>>  depends on ARCH_EXYNOS
>> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
>> index 9c1f8e5..615b724 100644
>> --- a/drivers/mmc/Makefile
>> +++ b/drivers/mmc/Makefile
>> @@ -20,6 +20,7 @@ endif
>> obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
>> obj-$(CONFIG_MMC_DAVINCI)+= davinci_mmc.o
>> obj-$(CONFIG_MMC_DW) += dw_mmc.o
>> +obj-$(CONFIG_MMC_DW_CORTINA)+= ca_dw_mmc.o
>> obj-$(CONFIG_MMC_DW_EXYNOS)  += exynos_dw_mmc.o
>> obj-$(CONFIG_MMC_DW_K3)  += hi6220_dw_mmc.o
>> obj-$(CONFIG_MMC_DW_ROCKCHIP)+= rockchip_dw_mmc.o
>> diff --git a/drivers/mmc/ca_dw_mmc.c b/drivers/mmc/ca_dw_mmc.c
>> new file mode 100644
>> index 000..acbc850
>> --- /dev/null
>> +++ b/drivers/mmc/ca_dw_mmc.c
>> @@ -0,0 +1,181 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * (C) Copyright 2019 Cortina Access
>> + * Arthur Li 
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#define SD_CLK_SEL_MASK (0x3)
>> +#define SD_DLL_DEFAULT  (0x143000)
>> +#define SD_SCLK_MAX (2)
>> +
>> +#define SD_CLK_SEL_200MHZ (0x2)
>> +#define SD_CLK_SEL_100MHZ (0x1)
>> +
>> +#define IO_DRV_SD_DS_OFFSET (16)
>> +#define IO_DRV_SD_DS_MASK   (0xff << IO_DRV_SD_DS_OFFSET)
>> +
>> +#define MIN_FREQ (40)
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +struct ca_mmc_plat {
>> +struct mmc_config cfg;
>> +struct mmc mmc;
>> +};
>> +
>> +struct ca_dwmmc_priv_data {
>> +struct dwmci_host host;
>> +void __iomem *sd_dll_reg;
>> +void __iomem *io_drv_reg;
>> +u8 ds;
>> +};
>> +
>> +static void ca_dwmci_clksel(struct dwmci_host *host)
>> +{
>> +struct ca_dwmmc_priv_data *priv = host->priv;
>> +u32 val = readl(priv->sd_dll_reg);
>> +
> 
> How about below?
> 
> val &= ~SD_CLK_SEL_MASK;
> 
> if (..) {
>   val |= ..
> } else if (...) {
>   val |= ...
> }
> 
>> +if (host->bus_hz >= 2) {
>> +val &= ~SD_CLK_SEL_MASK;
>> +val |= SD_CLK_SEL_200MHZ;
>> +} else if (host->bus_hz >= 1) {
>> +val &= ~SD_CLK_SEL_MASK;
>> +val |= SD_CLK_SEL_100MHZ;
>> +} else {
>> +val &= ~SD_CLK_SEL_MASK;
>> +}
>> +
>> +writel(val, priv->sd_dll_reg);
>> +}
>> +
>> +static void ca_dwmci_board_init(struct dwmci_host *host)
>> +{
>> +struct ca_dwmmc_priv_data *priv = host->priv;
>> +u32 val = readl(priv->io_drv_reg);
>> +
>> +writel(SD_DLL_DEFAULT, priv->sd_dll_reg);
>> +
>> +val &= ~IO_DRV_SD_DS_MASK;
>> +if (priv && priv->ds)
>> +val |= priv->ds << IO_DRV_SD_DS_OFFSET;
>> +writel(val, priv->io_drv_reg);
>> +}
>> +
>> +unsigned int 

Re: [PATCH v3 0/3] Add command to display or save Linux PStore dumps

[Heinrich Schuchardt]

On 3/19/20 9:37 PM, Wolfgang Denk wrote:

Dear Frédéric,

In message <20200319175737.10166-1-frederic.da...@collabora.com> you wrote:

This serie of patches adds a new pstore command allowing to display or save
ramoops logs (oops, panic, console, ftrace and user) generated by a previous
kernel crash.
PStore parameters can be set in U-Boot configuration file, or at run-time
using "pstore set" command. For kernel using Device Tree, the parameters are
dynamically added to Device Tree.
Records size should be the same as the ones used by kernel, and should be a
power of 2.


I wonder if we are reinventing the wheel here again?

There is this feature in U-Boot which is called "shared log buffer";
a couple of years ago this was fully functional at least on Power
and ARM architectures, but it was rarely used and probably has not
been tested for years.  A;so, the necessary tiny patch to have it
supported in Linux as well never made it upstream (don't remember
why, likely lack of time/interest).

The functionality we had then was the following:

- A memory area war reserved in U-Boot (typically at the upper end
   of memory) as a buffer that was shared between U-Boot and Linux.
   The format was as used for the kernel log buffer.
- Upon boot, U-Boot would not re-initialize an existing log buffer,
   but keep it's content.  That means, you could read and display the
   log buffer of the linux kernel that was running before the reset.
   After kernel crashes, pretty often this contained information that
   the kernel could not even print to the serial console any more.
- In U-Boot, you could append log entries to that buffer.  For
   example, this was used to record the results of the Power On Self
   Test (POST) routines (another feature that only few people still
   remember).
- When booting Linux, the kernel syslog mechanism was used to
   extract the information from the log buffer in the usual way.

The interesting fact here was that the Linux kernel was able to
extract and save the kernel panic messages etc. from the crash
before, plus any messages logged by U-Boot.


To me this sounds very much like what you are adding here (plus a
few features more).  Does it make sense to unify such code?


It seems you are relating to
https://lore.kernel.org/lkml/844oyrqvvb@sauna.l.org/t/

ramoops in Linux is exactly doing what was suggested in 2009. You can
find the Documentation/admin-guide/ramoops.rst

git grep -GHrn 'shared log' finds nothing in U-Boot. So if any part of
the old implementation in U-Boot exists, could you, please, point us to
the coding.

If the original design never made it into Linux and there is an
established Linux interface since 2011, I would plead to eliminate any
remaining non-compliant coding from U-Boot should it exist.

Best regards

Heinrich





Added Heiko to Cc:, as he is currently working on fixes to get
shared logbuffer working again for another project.

Best regards,

Wolfgang Denk

[PATCH] efi_loader: eliminate EFI_CALL() for variable access

[Heinrich Schuchardt]

In several places of the UEFI sub-system UEFI variables as accessed via
runtime services functions. These functions require being called via
EFI_CALL() to restore the register holding the gd variable. Some code
even calls the functions via the runtime services table.

By making the functions exposing the variable runtime services wrappers for
exported functions that we can use internally we get rid of this clumsy
code.

Signed-off-by: Heinrich Schuchardt 
---
 cmd/efidebug.c|  63 +--
 cmd/nvedit_efi.c  |  18 +++---
 include/efi_loader.h  |   9 +++
 lib/efi_loader/efi_bootmgr.c  |  20 +++---
 lib/efi_loader/efi_setup.c|  42 ++---
 lib/efi_loader/efi_variable.c | 115 +++---
 6 files changed, 169 insertions(+), 98 deletions(-)

diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index bb7c13d6a1..f7744bdc55 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -17,7 +17,6 @@
 #include 

 #define BS systab.boottime
-#define RT systab.runtime

 /**
  * efi_get_device_handle_info() - get information of UEFI device
@@ -612,11 +611,11 @@ static int do_efi_boot_add(cmd_tbl_t *cmdtp, int flag,
goto out;
}

-   ret = EFI_CALL(RT->set_variable(var_name16, ,
-   EFI_VARIABLE_NON_VOLATILE |
-   EFI_VARIABLE_BOOTSERVICE_ACCESS |
-   EFI_VARIABLE_RUNTIME_ACCESS,
-   size, data));
+   ret = efi_set_variable_int(var_name16, ,
+  EFI_VARIABLE_NON_VOLATILE |
+  EFI_VARIABLE_BOOTSERVICE_ACCESS |
+  EFI_VARIABLE_RUNTIME_ACCESS,
+  size, data);
if (ret != EFI_SUCCESS) {
printf("Cannot set %ls\n", var_name16);
r = CMD_RET_FAILURE;
@@ -667,7 +666,8 @@ static int do_efi_boot_rm(cmd_tbl_t *cmdtp, int flag,
p = var_name16;
utf8_utf16_strncpy(, var_name, 9);

-   ret = EFI_CALL(RT->set_variable(var_name16, , 0, 0, NULL));
+   ret = efi_set_variable_int(var_name16, , 0, 0,
+  NULL);
if (ret) {
printf("Cannot remove %ls\n", var_name16);
return CMD_RET_FAILURE;
@@ -747,11 +747,11 @@ static void show_efi_boot_opt(int id)
guid = efi_global_variable_guid;

size = 0;
-   ret = EFI_CALL(RT->get_variable(var_name16, , NULL, , NULL));
+   ret = efi_get_variable_int(var_name16, , NULL, , NULL);
if (ret == EFI_BUFFER_TOO_SMALL) {
data = malloc(size);
-   ret = EFI_CALL(RT->get_variable(var_name16, , NULL, ,
-   data));
+   ret = efi_get_variable_int(var_name16, , NULL, ,
+  data);
}
if (ret == EFI_SUCCESS)
show_efi_boot_opt_data(id, data, size);
@@ -806,8 +806,7 @@ static int do_efi_boot_dump(cmd_tbl_t *cmdtp, int flag,
var_name16[0] = 0;
for (;;) {
size = buf_size;
-   ret = EFI_CALL(efi_get_next_variable_name(, var_name16,
- ));
+   ret = efi_get_next_variable_name_int(, var_name16, );
if (ret == EFI_NOT_FOUND)
break;
if (ret == EFI_BUFFER_TOO_SMALL) {
@@ -818,9 +817,8 @@ static int do_efi_boot_dump(cmd_tbl_t *cmdtp, int flag,
return CMD_RET_FAILURE;
}
var_name16 = p;
-   ret = EFI_CALL(efi_get_next_variable_name(,
- var_name16,
- ));
+   ret = efi_get_next_variable_name_int(, var_name16,
+);
}
if (ret != EFI_SUCCESS) {
free(var_name16);
@@ -868,12 +866,11 @@ static int show_efi_boot_order(void)

guid = efi_global_variable_guid;
size = 0;
-   ret = EFI_CALL(RT->get_variable(L"BootOrder", , NULL, ,
-   NULL));
+   ret = efi_get_variable_int(L"BootOrder", , NULL, , NULL);
if (ret == EFI_BUFFER_TOO_SMALL) {
bootorder = malloc(size);
-   ret = EFI_CALL(RT->get_variable(L"BootOrder", , NULL,
-   , bootorder));
+   ret = efi_get_variable_int(L"BootOrder", , NULL,
+  , bootorder);
}
if (ret == EFI_NOT_FOUND) {
printf("BootOrder not defined\n");
@@ 

[PATCH v7 21/22] doc: riscv: Add documentation for Sipeed Maix Bit

[Sean Anderson]

This patch adds documentation for the Sipeed Maix bit, and more generally
for the Kendryte K210 processor.

Signed-off-by: Sean Anderson 
---

Changes in v7:
- Split off into its own patch
- Fix size of clint

 doc/board/index.rst|   1 +
 doc/board/sipeed/index.rst |   9 ++
 doc/board/sipeed/maix.rst  | 298 +
 3 files changed, 308 insertions(+)
 create mode 100644 doc/board/sipeed/index.rst
 create mode 100644 doc/board/sipeed/maix.rst

diff --git a/doc/board/index.rst b/doc/board/index.rst
index 51a2ae6f28..dcc47c5a21 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -16,6 +16,7 @@ Board-specific doc
renesas/index
rockchip/index
sifive/index
+   sipeed/index
st/index
toradex/index
xilinx/index
diff --git a/doc/board/sipeed/index.rst b/doc/board/sipeed/index.rst
new file mode 100644
index 00..3518e2d8f4
--- /dev/null
+++ b/doc/board/sipeed/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sipeed
+==
+
+.. toctree::
+   :maxdepth: 2
+
+   maix
diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst
new file mode 100644
index 00..5f7018da28
--- /dev/null
+++ b/doc/board/sipeed/maix.rst
@@ -0,0 +1,298 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2020 Sean Anderson 
+
+Maix Bit
+
+
+Several of the Sipeed Maix series of boards cotain the Kendryte K210 processor,
+a 64-bit RISC-V CPU. This processor contains several peripherals to accelerate
+neural network processing and other "ai" tasks. This includes a "KPU" neural
+network processor, an audio processor supporting beamforming reception, and a
+digital video port supporting capture and output at VGA resolution. Other
+peripherals include 8M of SRAM (accessible with and without caching); 
remappable
+pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA controller;
+and I2C, I2S, and SPI controllers. Maix peripherals vary, but include spi 
flash;
+on-board usb-serial bridges; ports for cameras, displays, and sd cards; and
+ESP32 chips. Currently, only the Sipeed Maix Bit V2.0 (bitm) is supported, but
+the boards are fairly similar.
+
+Documentation for Maix boards is available from
+`Sipeed's website `_.
+Documentation for the Kendryte K210 is available from
+`Kendryte's website `_. However, hardware
+details are rather lacking, so most technical reference has been taken from the
+`standalone sdk `_.
+
+Build and boot steps
+
+
+To build u-boot, run
+
+.. code-block:: none
+
+make sipeed_maix_bitm_defconfig
+make CROSS_COMPILE=
+
+To flash u-boot to a maix bit, run
+
+.. code-block:: none
+
+kflash -tp /dev/ -B bit_mic u-boot-dtb.bin
+
+Boot output should look like the following:
+
+.. code-block:: none
+
+U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
+
+DRAM:  8 MiB
+In:serial@3800
+Out:   serial@3800
+Err:   serial@3800
+=>
+
+Loading Images
+^^
+
+To load a kernel, transfer it over serial.
+
+.. code-block:: none
+
+=> loady 8000 150
+## Switch baudrate to 150 bps and press ENTER ...
+
+*** baud: 150
+
+*** baud: 150 ***
+## Ready for binary (ymodem) download to 0x8000 at 150 bps...
+C
+*** file: loader.bin
+$ sz -vv loader.bin
+Sending: loader.bin
+Bytes Sent:2478208   BPS:72937
+Sending:
+Ymodem sectors/kbytes sent:   0/ 0k
+Transfer complete
+
+*** exit status: 0 ***
+## Total Size  = 0x0025d052 = 2478162 Bytes
+## Switch baudrate to 115200 bps and press ESC ...
+
+*** baud: 115200
+
+*** baud: 115200 ***
+=>
+
+Running Programs
+
+
+Binaries
+
+
+To run a bare binary, use the ``go`` command:
+
+.. code-block:: none
+
+=> loady
+## Ready for binary (ymodem) download to 0x8000 at 115200 bps...
+C
+*** file: ./examples/standalone/hello_world.bin
+$ sz -vv ./examples/standalone/hello_world.bin
+Sending: hello_world.bin
+Bytes Sent:   4864   BPS:649
+Sending:
+Ymodem sectors/kbytes sent:   0/ 0k
+Transfer complete
+
+*** exit status: 0 ***
+(CAN) packets, 5 retries
+## Total Size  = 0x12f8 = 4856 Bytes
+=> go 8000
+## Starting application at 0x8000 ...
+Example expects ABI version 9
+Actual U-Boot ABI version 9
+Hello World
+argc = 1
+argv[0] = "8000"
+argv[1] = ""
+Hit any key to exit ...
+
+Legacy Images
+"
+
+To run legacy images, use the ``bootm`` command:
+
+.. code-block:: none
+
+$ tools/mkimage -A riscv -O u-boot -T standalone -C none -a 8000 -e 
8000 -d examples/standalone/hello_world.bin hello_world.img
+Image Name:
+Created:  Thu Mar  5 12:04:10 2020
+Image Type:   RISC-V U-Boot 

Re: [PATCH v3 4/5] riscv: Setup reserved-memory node for FU540

[Atish Patra]

On Thu, Mar 19, 2020 at 7:32 AM Bin Meng  wrote:
>
> On Wed, Mar 18, 2020 at 5:19 AM Atish Patra  wrote:
> >
> > FU540 uses OF_SEPARATE instead of OF_PRIOR.
> >
> > Enable OF_BOARD_FIXUP to update the DT with reserved-memory node.
> >
> > Signed-off-by: Atish Patra 
> > ---
> >  board/sifive/fu540/fu540.c | 15 +++
> >  configs/sifive_fu540_defconfig |  1 +
> >  2 files changed, 16 insertions(+)
> >
> > diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
> > index 47a20902517c..82b3a9c8e729 100644
> > --- a/board/sifive/fu540/fu540.c
> > +++ b/board/sifive/fu540/fu540.c
> > @@ -141,6 +141,21 @@ int misc_init_r(void)
> >
> >  #endif
> >
> > +#ifdef CONFIG_OF_BOARD_FIXUP
> > +int board_fix_fdt(void *fdt)
>
> This routine should be put in a more generic file, as this could
> potentially apply to all RISC-V platforms that need OF_BOARD_FIXUP
> (e.g.: U-Boot itself is built with OF_SEPARATE).
>
> In case other platform wants to override this, we can define it as a __weak.
>
I am not opposed to that idea but board specific functions should be
defined in board specific file.
If we can violate that rule, I am okay with the proposal.

We can define a __weak board_fix_fdt in arch/riscv/lib/fdt_fixup.c and
guard it under CONFIG_OF_BOARD_FIXUP.

> > +{
> > +   int err;
> > +
> > +   err = riscv_board_reserved_mem_fixup(fdt);
> > +   if (err < 0) {
> > +   printf("failed to fixup DT for reserved memory: %d\n", err);
> > +   return err;
> > +   }
> > +
> > +   return 0;
> > +}
> > +#endif
> > +
> >  int board_init(void)
> >  {
> > /* For now nothing to do here. */
> > diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
> > index 6d61e6c960ee..8fb3794cd578 100644
> > --- a/configs/sifive_fu540_defconfig
> > +++ b/configs/sifive_fu540_defconfig
> > @@ -12,3 +12,4 @@ CONFIG_DISPLAY_BOARDINFO=y
> >  CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
> >  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> >  CONFIG_DM_MTD=y
> > +CONFIG_OF_BOARD_FIXUP=y
>
> This line should be inserted after CONFIG_DISPLAY_BOARDINFO=y
>
> Please ensure defconfig file is updated like this:
>
> $ make sifive_fu540_defconfig
> $ make savedefconfig
> $ cp defconfig configs/sifive_fu540_defconfig
>

Sure. Will do that.

> Regards,
> Bin



-- 
Regards,
Atish

[PATCH v7 22/22] riscv: Add Sipeed Maix support

[Sean Anderson]

The Sipeed Maix series is a collection of boards built around the RISC-V
Kendryte K210 processor. This processor contains several peripherals to
accelerate neural network processing and other "ai" tasks. This includes a
"KPU" neural network processor, an audio processor supporting beamforming
reception, and a digital video port supporting capture and output at VGA
resolution. Other peripherals include 8M of sram (accessible with and
without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
peripherals vary, but include spi flash; on-board usb-serial bridges; ports
for cameras, displays, and sd cards; and ESP32 chips. Currently, only the
Sipeed Maix Bit V2.0 (bitm) is supported, but the boards are fairly
similar.

Documentation for Maix boards is located at
.  Documentation for the Kendryte K210 is
located at . However, hardware details are
rather lacking, so most technical reference has been taken from the
standalone sdk located at
.

Signed-off-by: Sean Anderson 
board f

---

Changes in v7:
- Split docs off into their own patch
- Enable ram clocks by name

Changes in v6:
- Remove trailing whitespace from documentation
- Remove configuration for spi/pinmux/gpio features
- Flesh out documentation some more

Changes in v5:
- Configure relocation location with CONFIG_SYS_SDRAM_*
- Enable ram clocks
- Add pinmux/gpio/led support
- Remove (broken) MMC support
- Store the environment in flash
- Add partitions
- Add bootcmd
- Add docs for pinctrl and booting

Changes in v4:
- Rework documentation to be organized by board mfg not cpu mfg
- Update docs to reflect working SPI support
- Add proper spi support
- Don't define unneecessary macros in config.h
- Lower the default stack so it isn't clobbered on relocation
- Update MAINTAINERS
- Update copyright

Changes in v3:
- Reorder to be last in the patch series
- Add documentation for the board
- Generate defconfig with "make savedefconfig"
- Update Kconfig to imply most features we need
- Update MAINTAINERS

Changes in v2:
- Select CONFIG_SYS_RISCV_NOCOUNTER
- Imply CONFIG_CLK_K210
- Remove spurious references to CONFIG_ARCH_K210
- Remove many configs from defconfig where the defaults were fine
- Add a few "not set" lines to suppress unneeded defaults
- Reduce pre-reloc malloc space, now that clocks initialization happens
  later

 arch/riscv/Kconfig |  4 +++
 board/sipeed/maix/Kconfig  | 48 ++
 board/sipeed/maix/MAINTAINERS  | 11 ++
 board/sipeed/maix/Makefile |  5 +++
 board/sipeed/maix/maix.c   | 54 ++
 configs/sipeed_maix_bitm_defconfig |  8 +
 include/configs/sipeed-maix.h  | 24 +
 7 files changed, 154 insertions(+)
 create mode 100644 board/sipeed/maix/Kconfig
 create mode 100644 board/sipeed/maix/MAINTAINERS
 create mode 100644 board/sipeed/maix/Makefile
 create mode 100644 board/sipeed/maix/maix.c
 create mode 100644 configs/sipeed_maix_bitm_defconfig
 create mode 100644 include/configs/sipeed-maix.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index b7a5757584..d016dd75d7 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -20,6 +20,9 @@ config TARGET_QEMU_VIRT
 config TARGET_SIFIVE_FU540
bool "Support SiFive FU540 Board"
 
+config TARGET_SIPEED_MAIX
+   bool "Support Sipeed Maix Board"
+
 endchoice
 
 config SYS_ICACHE_OFF
@@ -53,6 +56,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/fu540/Kconfig"
+source "board/sipeed/maix/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig
new file mode 100644
index 00..8292089fc9
--- /dev/null
+++ b/board/sipeed/maix/Kconfig
@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2019-20 Sean Anderson 
+
+if TARGET_SIPEED_MAIX
+
+config SYS_BOARD
+   default "maix"
+
+config SYS_VENDOR
+   default "sipeed"
+
+config SYS_CPU
+   default "generic"
+
+config SYS_CONFIG_NAME
+   default "sipeed-maix"
+
+config SYS_TEXT_BASE
+   default 0x8000
+
+config DEFAULT_DEVICE_TREE
+   default "k210-maix-bit"
+
+config NR_CPUS
+   default 2
+
+config NR_DRAM_BANKS
+   default 3
+
+config BOARD_SPECIFIC_OPTIONS
+   def_bool y
+   select GENERIC_RISCV
+   select RISCV_PRIV_1_9
+   imply SMP
+   imply OF_BOARD_SETUP
+   imply DM_SERIAL
+   imply SIFIVE_SERIAL
+   imply SIFIVE_CLINT
+   imply POWER_DOMAIN
+   imply SIMPLE_PM_BUS
+   imply CLK_CCF
+   imply CLK_COMPOSITE_CCF
+   imply CLK_K210
+   imply DM_RESET
+   imply RESET_SYSCON
+   imply SYSRESET
+   

[PATCH v7 17/22] riscv: Allow use of reset drivers

[Sean Anderson]

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS
example, and disable the default reset handler when the sysreset driver is
enabled.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v3:
- New

 arch/riscv/lib/reset.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/lib/reset.c b/arch/riscv/lib/reset.c
index ce3c1cf872..7622e5df43 100644
--- a/arch/riscv/lib/reset.c
+++ b/arch/riscv/lib/reset.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 
+#ifndef CONFIG_SYSRESET
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
printf("resetting ...\n");
@@ -16,3 +17,4 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
return 0;
 }
+#endif
-- 
2.25.1

[PATCH v7 20/22] riscv: Add device tree for K210 and Sipeed Maix BitM

[Sean Anderson]

Where possible, I have tried to find compatible drivers based on the layout
of registers. However, many devices remain untested. All untested devices
have been left disabled, but some tentative properties (such as compatible
strings, and clocks, interrupts, and resets properties) have been added.

Signed-off-by: Sean Anderson 
---

Changes in v7:
- Move clocks node to be just before soc node, matching linux's tree
- Merge memory nodes into one node with different registers
- Add aliases for uclasses which use them
- Fix size of clint

Changes in v6:
- Remove spi, gpio, pinmux, wdt, and led bindings
- Use consistent capitalization for hex digits

Changes in v5:
- Add more compatible strings
- Add cache line size
- Document CPUs as rocket cores
- Flesh out the gpio devices
- Add ports for audio and video devices
- Add fpioa pinctrl support
- Configure pins for MMC on SPI1
- Enable MMC
- Fix a couple uart properties (Thanks laanwj)
- Reorder ram now that relocation is handled with CONFIG_SYS defines
- Enable WDT
- Add pinctrl properties
- Add gpio support
- Add led support
- Add assorted AV bindings
- Add compatible strings for ram
- Use GPIO-based CS for MMC
- Limit SPI flash to 50 MHz

Changes in v4:
- Set regs sizes to full address range
- Remove clock-frequency property from cpus
- Add spi-max-frequency to spi devices from documentation
- Add more compatible strings for each device
- Add AI ram as a separate memory bank. Its clock is disabled on boot, and
  it cannot be accessed
- Reorder memory banks so u-boot relocates higher, leaving more room to
  load boot images
- Add designware ssi CTRL0 field shifts to spi devices
- Don't enable the MMC slot
- Update copyright
- Lint

Changes in v3:
- Move this patch to the end of the series
- Add a max frequency for spi3
- Remov unused compatible strings from spi-flash@0
- Add s and u to isa string
- Fix mmu-type
- Remove cache-line size since it is unused (in u-boot) and undocumented
  (upstream)
- Add timer interrupts to clint0
- Round up various registers
- Add riscv,max-priority to plic
- Add apb* busses, since they have clocks which need to be enabled to
  access their devices
- Change uart compatible strings to "snps,dw-apb-uart", since that appears
  to match their registers
- Add compatible string for wdt*
- Add system reset device under sysctl
- Add reset device under sysctl

Changes in v2:
- Model changed to "Sipeed Maix Bit" to match file name
- Value of stdout-path fixed
- SD card slot compatible changed to "mmc-spi-slot"
- "jedec,spi-nor" added to spi flash compatible list
- Aliases for spi busses added
- timebase-frequency divided by 50 to match timer speed
- cpu-frequency renamed to clock-frequency
- CPUX_intc restyled to cpuX_intc
- "kendryte,k210-soc" added to soc compatible list for future-proofing
- PLIC handle renamed to plic0 from pic0
- K210_RST_SOC removed from sysrst, due to not being located in the reset
  register
- K210_RST_* numbers changed to match their bit offset within the reset
  register
- gpio_controller restyled to gpio-controller
- Added a second clock to the dma binding to match what the driver expects
- Changed "snps,designware-spi" compatible string to "snps,dw-apb-ssi" to
  match the correct driver
- Added a name to the spi clocks
- Added reg-io-width property to spi bindings
- Assigned a default parent to K210_CLK_SPI3
- Removed assigned clocks for ACLK and PLLs
- Removed u-boot,dm-pre-reloc bindings

 arch/riscv/dts/Makefile |   1 +
 arch/riscv/dts/k210-maix-bit.dts|  47 ++
 arch/riscv/dts/k210.dtsi| 594 
 include/dt-bindings/reset/k210-sysctl.h |  38 ++
 4 files changed, 680 insertions(+)
 create mode 100644 arch/riscv/dts/k210-maix-bit.dts
 create mode 100644 arch/riscv/dts/k210.dtsi
 create mode 100644 include/dt-bindings/reset/k210-sysctl.h

diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 4f30e6936f..3a6f96c67d 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -2,6 +2,7 @@
 
 dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
+dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
new file mode 100644
index 00..5b32c5fd5f
--- /dev/null
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+
+/dts-v1/;
+
+#include "k210.dtsi"
+
+#include 
+
+/ {
+   model = "Sipeed Maix Bit 2.0";
+   compatible = "sipeed,maix-bitm", "sipeed,maix-bit", "kendryte,k210";
+
+   chosen {
+   stdout-path = "serial0:115200";
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   status = "disabled";
+
+   simple-audio-card,cpu {
+  

[PATCH v7 19/22] riscv: Enable cpu clock if it is present

[Sean Anderson]

The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---
This patch was previously submitted on its own as
https://patchwork.ozlabs.org/patch/1232420/

Changes in v4:
- New

 drivers/cpu/riscv_cpu.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index c6ed060abc..9ce58695aa 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2018, Bin Meng 
+ * Copyright (C) 2020, Sean Anderson 
  */
 
 #include 
@@ -117,6 +118,24 @@ static int riscv_cpu_bind(struct udevice *dev)
return 0;
 }
 
+static int riscv_cpu_probe(struct udevice *dev)
+{
+   int ret = 0;
+   struct clk clk;
+
+   /* Get a clock if it exists */
+   ret = clk_get_by_index(dev, 0, );
+   if (ret)
+   return 0;
+
+   ret = clk_enable();
+   clk_free();
+   if (ret == -ENOSYS || ret == -ENOTSUPP)
+   return 0;
+   else
+   return ret;
+}
+
 static const struct cpu_ops riscv_cpu_ops = {
.get_desc   = riscv_cpu_get_desc,
.get_info   = riscv_cpu_get_info,
@@ -133,6 +152,7 @@ U_BOOT_DRIVER(riscv_cpu) = {
.id = UCLASS_CPU,
.of_match = riscv_cpu_ids,
.bind = riscv_cpu_bind,
+   .probe = riscv_cpu_probe,
.ops = _cpu_ops,
.flags = DM_FLAG_PRE_RELOC,
 };
-- 
2.25.1

[PATCH v7 15/22] riscv: Clean up IPI initialization code

[Sean Anderson]

The previous IPI code initialized the device whenever the first call was
made to a riscv_*_ipi function. This made it difficult to determine when
the IPI device was initialized. This patch introduces a new function
riscv_init_ipi. It is called once during arch_cpu_init_dm. Before this
point, no riscv_*_ipi functions should be called.

Signed-off-by: Sean Anderson 
---

Changes in v7:
- Split IPI clearing off into its own patch

Changes in v6:
- Fix some formatting
- Clear IPIs before enabling interrupts instead of using a ipi_ready flag
- Only print messages on error in smp code

Changes in v5:
- New

 arch/riscv/cpu/cpu.c  |  6 
 arch/riscv/include/asm/smp.h  | 43 +++
 arch/riscv/lib/andes_plic.c   | 34 -
 arch/riscv/lib/sbi_ipi.c  |  5 
 arch/riscv/lib/sifive_clint.c | 33 +++--
 arch/riscv/lib/smp.c  | 56 ---
 6 files changed, 90 insertions(+), 87 deletions(-)

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index e457f6acbf..f851374255 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -96,6 +96,12 @@ int arch_cpu_init_dm(void)
csr_write(CSR_SATP, 0);
}
 
+#ifdef CONFIG_SMP
+   ret = riscv_init_ipi();
+   if (ret)
+   return ret;
+#endif
+
return 0;
 }
 
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 74de92ed13..1b428856b2 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -51,4 +51,47 @@ void handle_ipi(ulong hart);
  */
 int smp_call_function(ulong addr, ulong arg0, ulong arg1, int wait);
 
+/**
+ * riscv_init_ipi() - Initialize inter-process interrupt (IPI) driver
+ *
+ * Platform code must provide this function. This function is called once after
+ * the cpu driver is initialized. No other riscv_*_ipi() calls will be made
+ * before this function is called.
+ *
+ * @return 0 if OK, -ve on error
+ */
+int riscv_init_ipi(void);
+
+/**
+ * riscv_send_ipi() - Send inter-processor interrupt (IPI)
+ *
+ * Platform code must provide this function.
+ *
+ * @hart: Hart ID of receiving hart
+ * @return 0 if OK, -ve on error
+ */
+int riscv_send_ipi(int hart);
+
+/**
+ * riscv_clear_ipi() - Clear inter-processor interrupt (IPI)
+ *
+ * Platform code must provide this function.
+ *
+ * @hart: Hart ID of hart to be cleared
+ * @return 0 if OK, -ve on error
+ */
+int riscv_clear_ipi(int hart);
+
+/**
+ * riscv_get_ipi() - Get status of inter-processor interrupt (IPI)
+ *
+ * Platform code must provide this function.
+ *
+ * @hart: Hart ID of hart to be checked
+ * @pending: Pointer to variable with result of the check,
+ *   1 if IPI is pending, 0 otherwise
+ * @return 0 if OK, -ve on error
+ */
+int riscv_get_ipi(int hart, int *pending);
+
 #endif
diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c
index 20529ab3eb..8484f76386 100644
--- a/arch/riscv/lib/andes_plic.c
+++ b/arch/riscv/lib/andes_plic.c
@@ -30,20 +30,6 @@
 #define SEND_IPI_TO_HART(hart)  (0x80 >> (hart))
 
 DECLARE_GLOBAL_DATA_PTR;
-static int init_plic(void);
-
-#define PLIC_BASE_GET(void)\
-   do {\
-   long *ret;  \
-   \
-   if (!gd->arch.plic) {   \
-   ret = syscon_get_first_range(RISCV_SYSCON_PLIC); \
-   if (IS_ERR(ret))\
-   return PTR_ERR(ret);\
-   gd->arch.plic = ret;\
-   init_plic();\
-   }   \
-   } while (0)
 
 static int enable_ipi(int hart)
 {
@@ -93,13 +79,21 @@ static int init_plic(void)
return -ENODEV;
 }
 
+int riscv_init_ipi(void)
+{
+   int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
+
+   if (IS_ERR(ret))
+   return PTR_ERR(ret);
+   gd->arch.plic = ret;
+
+   return init_plic();
+}
+
 int riscv_send_ipi(int hart)
 {
-   unsigned int ipi;
+   unsigned int ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart));
 
-   PLIC_BASE_GET();
-
-   ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart));
writel(ipi, (void __iomem *)PENDING_REG(gd->arch.plic,
gd->arch.boot_hart));
 
@@ -110,8 +104,6 @@ int riscv_clear_ipi(int hart)
 {
u32 source_id;
 
-   PLIC_BASE_GET();
-
source_id = readl((void __iomem *)CLAIM_REG(gd->arch.plic, hart));
writel(source_id, (void __iomem *)CLAIM_REG(gd->arch.plic, hart));
 
@@ -120,8 +112,6 @@ int riscv_clear_ipi(int hart)
 
 int 

[PATCH v7 14/22] riscv: Clear pending interrupts before enabling IPIs

[Sean Anderson]

On some platforms (k210), the previous stage bootloader may have not
cleared pending IPIs before transferring control to U-Boot. This can cause
race conditions, as multiple harts all attempt to initialize the IPI
controller at once. This patch clears IPIs before enabling them, ensuring
that only one hart modifies shared memory at once.

Signed-off-by: Sean Anderson 
---

Changes in v7:
- Split of into its own patch

 arch/riscv/cpu/start.S | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 6b3ff99c38..e8740c8568 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -67,6 +67,8 @@ _start:
 #else
li  t0, SIE_SSIE
 #endif
+   /* Clear any pending IPIs */
+   csrcMODE_PREFIX(ip), t0
csrsMODE_PREFIX(ie), t0
 #endif
 
-- 
2.25.1

[PATCH v7 18/22] riscv: Try to get cpu frequency from a "clocks" node if it exists

[Sean Anderson]

Instead of always using the "clock-frequency" property to determine cpu
frequency, try using a clock in "clocks" if it exists. This patch also
fixes a bug where there could be spurious higher frequencies if sizeof(u32)
!= sizeof(ulong).

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---
This patch was previously sumbitted on its own as
https://patchwork.ozlabs.org/patch/1232420/

This patch is the combination of the patches
https://patchwork.ozlabs.org/patch/1223933/
https://patchwork.ozlabs.org/patch/1224957/
"riscv: Fix incorrect cpu frequency on RV64"
"riscv: Try to get cpu frequency from device tree"

Changes in v5:
- Include linux/err.h explicitly
- Reword commit message

Changes in v4:
- New

 drivers/cpu/riscv_cpu.c | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index 28ad0aa30f..c6ed060abc 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -3,12 +3,14 @@
  * Copyright (C) 2018, Bin Meng 
  */
 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -27,9 +29,24 @@ static int riscv_cpu_get_desc(struct udevice *dev, char 
*buf, int size)
 
 static int riscv_cpu_get_info(struct udevice *dev, struct cpu_info *info)
 {
+   int ret;
+   struct clk clk;
const char *mmu;
 
-   dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
+   /* Zero out the frequency, in case sizeof(ulong) != sizeof(u32) */
+   info->cpu_freq = 0;
+
+   /* First try getting the frequency from the assigned clock */
+   ret = clk_get_by_index(dev, 0, );
+   if (!ret) {
+   ret = clk_get_rate();
+   if (!IS_ERR_VALUE(ret))
+   info->cpu_freq = ret;
+   clk_free();
+   }
+
+   if (!info->cpu_freq)
+   dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
 
mmu = dev_read_string(dev, "mmu-type");
if (!mmu)
-- 
2.25.1

[PATCH v7 16/22] riscv: Add option to support RISC-V privileged spec 1.9

[Sean Anderson]

Some older processors (notably the Kendryte K210) use an older version of
the RISC-V privileged specification. The primary changes between the old
and new are in virtual memory, and in the merging of three separate counter
enable CSRs.  Using the new CSR on an old processor causes an illegal
instruction exception.  This patch adds an option to use the old CSRs
instead of the new one.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v6:
- Reformat so chechpatch errors less

Changes in v5:
- Rename to 1.9 to reflect the spec as implemented by the k210

Changes in v4:
- Fixed CSRs not being defined properly (thanks bmeng)
- Added ifdefs for all changed CSRs (e.g. for VM)
- Also properly disable VM on boot

Changes in v3:
- Renamed from "riscv: Add option to disable writes to mcounteren"
- Added original functionality back for older priv specs.

Changes in v2:
- Moved forward in the patch series

 arch/riscv/Kconfig   | 10 +
 arch/riscv/cpu/cpu.c |  9 
 arch/riscv/include/asm/csr.h | 40 
 3 files changed, 59 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 3338b788f8..b7a5757584 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -225,6 +225,16 @@ config XIP
 config SHOW_REGS
bool "Show registers on unhandled exception"
 
+config RISCV_PRIV_1_9
+   bool "Use version 1.9 of the RISC-V priviledged specification"
+   help
+ Older versions of the RISC-V priviledged specification had
+ separate counter enable CSRs for each privilege mode. Writing
+ to the unified mcounteren CSR on a processor implementing the
+ old specification will result in an illegal instruction
+ exception. In addition to counter CSR changes, the way virtual
+ memory is configured was also changed.
+
 config STACK_SIZE_SHIFT
int
default 14
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index f851374255..3c1836694a 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -89,11 +89,20 @@ int arch_cpu_init_dm(void)
 * Enable perf counters for cycle, time,
 * and instret counters only
 */
+#ifdef CONFIG_RISCV_PRIV_1_9
+   csr_write(CSR_MSCOUNTEREN, GENMASK(2, 0));
+   csr_write(CSR_MUCOUNTEREN, GENMASK(2, 0));
+#else
csr_write(CSR_MCOUNTEREN, GENMASK(2, 0));
+#endif
 
/* Disable paging */
if (supports_extension('s'))
+#ifdef CONFIG_RISCV_PRIV_1_9
+   csr_read_clear(CSR_MSTATUS, SR_VM);
+#else
csr_write(CSR_SATP, 0);
+#endif
}
 
 #ifdef CONFIG_SMP
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index d1520743a2..1a15089cae 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -15,7 +15,11 @@
 #define SR_SIE _AC(0x0002, UL) /* Supervisor Interrupt Enable */
 #define SR_SPIE_AC(0x0020, UL) /* Previous Supervisor IE */
 #define SR_SPP _AC(0x0100, UL) /* Previously Supervisor */
+#ifdef CONFIG_RISCV_PRIV_1_9
+#define SR_PUM _AC(0x0004, UL) /* Protect User Memory Access */
+#else
 #define SR_SUM _AC(0x0004, UL) /* Supervisor User Memory Access */
+#endif
 
 #define SR_FS  _AC(0x6000, UL) /* Floating-point Status */
 #define SR_FS_OFF  _AC(0x, UL)
@@ -29,6 +33,22 @@
 #define SR_XS_CLEAN_AC(0x0001, UL)
 #define SR_XS_DIRTY_AC(0x00018000, UL)
 
+#ifdef CONFIG_RISCV_PRIV_1_9
+#define SR_VM  _AC(0x1F00, UL) /* Virtualization Management */
+#define SR_VM_MODE_BARE_AC(0x, UL) /* No translation or 
protection */
+#define SR_VM_MODE_BB  _AC(0x0100, UL) /* Single base-and-bound */
+/* Separate instruction and data base-and-bound */
+#define SR_VM_MODE_BBID_AC(0x0200, UL)
+#ifndef CONFIG_64BIT
+#define SR_VM_MODE_32  _AC(0x0800, UL)
+#define SR_VM_MODE SR_VM_MODE_32
+#else
+#define SR_VM_MODE_39  _AC(0x0900, UL)
+#define SR_VM_MODE_48  _AC(0x0A00, UL)
+#define SR_VM_MODE SR_VM_MODE_39
+#endif
+#endif
+
 #ifndef CONFIG_64BIT
 #define SR_SD  _AC(0x8000, UL) /* FS/XS dirty */
 #else
@@ -36,6 +56,7 @@
 #endif
 
 /* SATP flags */
+#ifndef CONFIG_RISCV_PRIV_1_9
 #ifndef CONFIG_64BIT
 #define SATP_PPN   _AC(0x003F, UL)
 #define SATP_MODE_32   _AC(0x8000, UL)
@@ -45,6 +66,7 @@
 #define SATP_MODE_39   _AC(0x8000, UL)
 #define SATP_MODE  SATP_MODE_39
 #endif
+#endif
 
 /* SCAUSE */
 #define SCAUSE_IRQ_FLAG(_AC(1, UL) << (__riscv_xlen - 1))
@@ -88,17 +110,35 @@
 #define CSR_SCAUSE 0x142
 #define CSR_STVAL  0x143
 #define CSR_SIP0x144
+#ifdef CONFIG_RISCV_PRIV_1_9
+#define CSR_SPTBR  0x180
+#else
 #define CSR_SATP   0x180
+#endif
 #define CSR_MSTATUS 

[PATCH v7 12/22] lib: Always set errno in hcreate_r

[Sean Anderson]

This could give a confusing error message if it failed and didn't set
errno.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v5:
- New

 lib/hashtable.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/hashtable.c b/lib/hashtable.c
index 907e8a642f..e9ac7e252e 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -109,8 +109,10 @@ int hcreate_r(size_t nel, struct hsearch_data *htab)
}
 
/* There is still another table active. Return with error. */
-   if (htab->table != NULL)
+   if (htab->table != NULL) {
+   __set_errno(EINVAL);
return 0;
+   }
 
/* Change nel to the first prime number not smaller as nel. */
nel |= 1;   /* make odd */
@@ -123,8 +125,10 @@ int hcreate_r(size_t nel, struct hsearch_data *htab)
/* allocate memory and zero out */
htab->table = (struct env_entry_node *)calloc(htab->size + 1,
sizeof(struct env_entry_node));
-   if (htab->table == NULL)
+   if (htab->table == NULL) {
+   __set_errno(ENOMEM);
return 0;
+   }
 
/* everything went alright */
return 1;
-- 
2.25.1

[PATCH v7 13/22] riscv: Add headers for asm/global_data.h

[Sean Anderson]

This header depended on bd_t and ulong, but did not include the appropriate
headers.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v4:
- Include compiler.h not linux/compiler.h

 arch/riscv/include/asm/global_data.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index b74bd7e738..7276d9763f 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -11,6 +11,8 @@
 #define __ASM_GBL_DATA_H
 
 #include 
+#include 
+#include 
 
 /* Architecture-specific global data */
 struct arch_global_data {
-- 
2.25.1

[PATCH v7 08/22] clk: Add K210 clock support

[Sean Anderson]

Due to the large number of clocks, I decided to use the CCF. The overall
structure is modeled after the imx code. Clocks are stored in several
arrays. There are some translation macros (FOOIFY()) which allow for more
dense packing.  A possible improvement could be to only store the
parameters we need, instead of the whole CCF struct.

Signed-off-by: Sean Anderson 
---

Changes in v7:
- Add numbering to some sysctl registers

Changes in v6:
- Reformat code so checkpatch generates fewer warnings
- Give "fictional" clocks their own ids
- Rename sysctl CLK_FREQ register to UART_BAUD to better reflect its
  semantics

Changes in v5:
- Don't unmap priv->reg
- Remove comment on APB clocks since it has been clarified by Kendryte
- Add i2s mclks
- Reorder clock ids to be continuous
- Rewrite to statically allocate all clocks. This has helped find several
  bugs (since it is easy to see when a clock has the wrong register).
- Fix ACLK sometimes having the wrong parent
- Fix SPI3 having the wrong divider
- Prevent being probed multiple times on failure

Changes in v4:
- Reparent aclk before configuring pll0
- Update copyright
- Lint

Changes in v3:
- Removed sysctl struct, replacing it with defines. This is to have the
  same interface to sysctl from C as from the device tree.
- Fixed clocks having the same id
- Fixed clocks not using the correct register/bits
- Aligned the defines in headers

Changes in v2:
- Add clk.o to obj-y
- Don't probe before relocation

 MAINTAINERS   |   7 +
 .../mfd/kendryte,k210-sysctl.txt  |  33 ++
 drivers/clk/kendryte/Kconfig  |   2 +-
 drivers/clk/kendryte/Makefile |   2 +-
 drivers/clk/kendryte/clk.c| 489 ++
 include/dt-bindings/clock/k210-sysctl.h   |  59 +++
 include/dt-bindings/mfd/k210-sysctl.h |  38 ++
 include/kendryte/clk.h|  35 ++
 8 files changed, 663 insertions(+), 2 deletions(-)
 create mode 100644 doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
 create mode 100644 drivers/clk/kendryte/clk.c
 create mode 100644 include/dt-bindings/clock/k210-sysctl.h
 create mode 100644 include/dt-bindings/mfd/k210-sysctl.h
 create mode 100644 include/kendryte/clk.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 92dda40a85..172f157bcd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -822,6 +822,13 @@ F: arch/riscv/
 F: cmd/riscv/
 F: tools/prelink-riscv.c
 
+RISC-V KENDRYTE
+M: Sean Anderson 
+S: Maintained
+F: doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
+F: drivers/clk/kendryte/
+F: include/kendryte/
+
 RNG
 M: Sughosh Ganu 
 R: Heinrich Schuchardt 
diff --git a/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt 
b/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
new file mode 100644
index 00..5b24abcb62
--- /dev/null
+++ b/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
@@ -0,0 +1,33 @@
+Kendryte K210 Sysctl
+
+This binding describes the K210 sysctl device, which contains many 
miscellaneous
+registers controlling system functionality. This node is a register map and can
+be reference by other bindings which need a phandle to the K210 sysctl regmap.
+
+Required properties:
+- compatible: should be
+   "kendryte,k210-sysctl", "syscon", "simple-mfd"
+- reg: address and length of the sysctl registers
+- reg-io-width: must be <4>
+
+Clock sub-node
+
+This node is a binding for the clock tree driver
+
+Required properties:
+- compatible: should be "kendryte,k210-clk"
+- clocks: phandle to the "in0" external oscillator
+- #clock-cells: must be <1>
+
+Example:
+sysctl: syscon@5044 {
+   compatible = "kendryte,k210-sysctl", "syscon", "simple-mfd";
+   reg = <0x5044 0x100>;
+   reg-io-width = <4>;
+
+   sysclk: clock-controller {
+   compatible = "kendryte,k210-clk";
+   clocks = <>;
+   #clock-cells = <1>;
+   };
+};
diff --git a/drivers/clk/kendryte/Kconfig b/drivers/clk/kendryte/Kconfig
index 7b69c8afaf..073fca0781 100644
--- a/drivers/clk/kendryte/Kconfig
+++ b/drivers/clk/kendryte/Kconfig
@@ -1,6 +1,6 @@
 config CLK_K210
bool "Clock support for Kendryte K210"
-   depends on CLK && CLK_CCF
+   depends on CLK && CLK_CCF && CLK_COMPOSITE_CCF
help
  This enables support clock driver for Kendryte K210 platforms.
 
diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
index 47f682fce3..6fb68253ae 100644
--- a/drivers/clk/kendryte/Makefile
+++ b/drivers/clk/kendryte/Makefile
@@ -1 +1 @@
-obj-y += bypass.o pll.o
+obj-y += bypass.o clk.o pll.o
diff --git a/drivers/clk/kendryte/clk.c b/drivers/clk/kendryte/clk.c
new file mode 100644
index 00..7eb2f705a0
--- /dev/null
+++ b/drivers/clk/kendryte/clk.c
@@ -0,0 +1,489 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+#include 
+
+#include 
+#include 
+#include 
+#include 

[PATCH v7 11/22] reset: Add generic reset driver

[Sean Anderson]

This patch adds a generic reset driver. It is designed to be useful when
one has a register in a regmap which contains bits that reset other
devices. I thought this seemed like a very generic use, so here is a
generic driver. The overall structure has been modeled on the syscon-reboot
driver.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

Changes in v5:
- Reorder includes
- Include linux/err.h explicitly

Changes in v4:
- Added basic test
- Fix incorrect usage of regmap_update_bits

Changes in v3:
- New

 arch/sandbox/dts/test.dts | 15 
 configs/sandbox_defconfig |  2 +
 .../reset/syscon-reset.txt| 36 +
 drivers/reset/Kconfig |  5 ++
 drivers/reset/Makefile|  1 +
 drivers/reset/reset-syscon.c  | 80 +++
 test/dm/Makefile  |  1 +
 test/dm/syscon-reset.c| 58 ++
 8 files changed, 198 insertions(+)
 create mode 100644 doc/device-tree-bindings/reset/syscon-reset.txt
 create mode 100644 drivers/reset/reset-syscon.c
 create mode 100644 test/dm/syscon-reset.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 96e0b55eed..6f2fcc64a4 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -940,6 +940,21 @@
clocks = <_sandbox 4>;
power-domains = < 1>;
};
+
+   resetc2: syscon-reset {
+   compatible = "syscon-reset";
+   #reset-cells = <1>;
+   regmap = <>;
+   offset = <1>;
+   mask = <0x27FF>;
+   assert-high = <0>;
+   };
+
+   syscon-reset-test {
+   compatible = "sandbox,misc_sandbox";
+   resets = < 15>, < 30>, < 60>;
+   reset-names = "valid", "no_mask", "out_of_range";
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index ef49cd2b83..787546243d 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -190,6 +190,8 @@ CONFIG_REMOTEPROC_SANDBOX=y
 CONFIG_DM_RESET=y
 CONFIG_SANDBOX_RESET=y
 CONFIG_DM_RNG=y
+CONFIG_RNG_SANDBOX=y
+CONFIG_RESET_SYSCON=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RV8803=y
 CONFIG_DEBUG_UART_SANDBOX=y
diff --git a/doc/device-tree-bindings/reset/syscon-reset.txt 
b/doc/device-tree-bindings/reset/syscon-reset.txt
new file mode 100644
index 00..f136b3d225
--- /dev/null
+++ b/doc/device-tree-bindings/reset/syscon-reset.txt
@@ -0,0 +1,36 @@
+Generic SYSCON mapped register reset driver
+
+This is a generic reset driver using syscon to map the reset register.
+The reset is generally performed with a write to the reset register
+defined by the register map pointed by syscon reference plus the offset and
+shifted by the reset specifier/
+
+To assert a reset on some device, the equivalent of the following operation is
+performed, where reset_id is the reset specifier from the device's resets
+property.
+
+   if (BIT(reset_id) & mask)
+   regmap[offset][reset_id] = assert-high;
+
+Required properties:
+- compatible: should contain "syscon-reset"
+- #reset-cells: must be 1
+- regmap: this is phandle to the register map node
+- offset: offset in the register map for the reboot register (in bytes)
+
+Optional properties:
+- mask: accept only the reset specifiers defined by the mask (32 bit)
+- assert-high: Bit to write when asserting a reset. Defaults to 1.
+
+Default will be little endian mode, 32 bit access only.
+
+Example:
+
+   reset-controller {
+   compatible = "syscon-reset";
+   #reset-cells = <1>;
+   regmap = <>;
+   offset = <0x20>;
+   mask = <0x27FF>;
+   assert-high = <0>;
+   };
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 75ccd65799..097bf32b21 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -148,4 +148,9 @@ config RESET_IMX7
help
  Support for reset controller on i.MX7/8 SoCs.
 
+config RESET_SYSCON
+   bool "Enable generic syscon reset driver support"
+   depends on DM_RESET
+   help
+ Support generic syscon mapped register reset devices.
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 0a044d5d8c..433f1eca54 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o
 obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
 obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
+obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o
diff --git a/drivers/reset/reset-syscon.c b/drivers/reset/reset-syscon.c
new file mode 100644
index 00..34dfe0bab6
--- /dev/null
+++ b/drivers/reset/reset-syscon.c
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Sean Anderson
+ 

[PATCH v7 09/22] dm: Add support for simple-pm-bus

[Sean Anderson]

This type of bus is used in Linux to designate buses which have power
domains and/or clocks which need to be enabled before their child devices
can be used. Because power domains are automatically enabled before probing
in U-Boot, we just need to enable any clocks present.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

Changes in v5:
- Reorder includes (simple pm)

Changes in v4:
- Split the bus off into its own driver
- Add test
- Fix line spacing in Kconfig
- Lint

Changes in v3:
- New

 arch/sandbox/dts/test.dts |  6 ++
 arch/sandbox/include/asm/clk.h|  1 +
 configs/sandbox_defconfig |  1 +
 .../bus/simple-pm-bus.txt | 44 +++
 drivers/core/Kconfig  |  7 +++
 drivers/core/Makefile |  1 +
 drivers/core/simple-pm-bus.c  | 56 +++
 test/dm/Makefile  |  1 +
 test/dm/simple-pm-bus.c   | 45 +++
 9 files changed, 162 insertions(+)
 create mode 100644 doc/device-tree-bindings/bus/simple-pm-bus.txt
 create mode 100644 drivers/core/simple-pm-bus.c
 create mode 100644 test/dm/simple-pm-bus.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 4a277934a7..96e0b55eed 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -934,6 +934,12 @@
mdio: mdio-test {
compatible = "sandbox,mdio";
};
+
+   pm-bus-test {
+   compatible = "simple-pm-bus";
+   clocks = <_sandbox 4>;
+   power-domains = < 1>;
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index 1573e4a134..c184c4bffc 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -21,6 +21,7 @@ enum sandbox_clk_id {
SANDBOX_CLK_ID_I2C,
SANDBOX_CLK_ID_UART1,
SANDBOX_CLK_ID_UART2,
+   SANDBOX_CLK_ID_BUS,
 
SANDBOX_CLK_ID_COUNT,
 };
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index f96891ecae..ef49cd2b83 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -90,6 +90,7 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_DEVRES=y
 CONFIG_DEBUG_DEVRES=y
+CONFIG_SIMPLE_PM_BUS=y
 CONFIG_ADC=y
 CONFIG_ADC_SANDBOX=y
 CONFIG_AXI=y
diff --git a/doc/device-tree-bindings/bus/simple-pm-bus.txt 
b/doc/device-tree-bindings/bus/simple-pm-bus.txt
new file mode 100644
index 00..6f15037131
--- /dev/null
+++ b/doc/device-tree-bindings/bus/simple-pm-bus.txt
@@ -0,0 +1,44 @@
+Simple Power-Managed Bus
+
+
+A Simple Power-Managed Bus is a transparent bus that doesn't need a real
+driver, as it's typically initialized by the boot loader.
+
+However, its bus controller is part of a PM domain, or under the control of a
+functional clock.  Hence, the bus controller's PM domain and/or clock must be
+enabled for child devices connected to the bus (either on-SoC or externally)
+to function.
+
+While "simple-pm-bus" follows the "simple-bus" set of properties, as specified
+in the Devicetree Specification, it is not an extension of "simple-bus".
+
+
+Required properties:
+  - compatible: Must contain at least "simple-pm-bus".
+   Must not contain "simple-bus".
+   It's recommended to let this be preceded by one or more
+   vendor-specific compatible values.
+  - #address-cells, #size-cells, ranges: Must describe the mapping between
+   parent address and child address spaces.
+
+Optional platform-specific properties for clock or PM domain control (at least
+one of them is required):
+  - clocks: Must contain a reference to the functional clock(s),
+  - power-domains: Must contain a reference to the PM domain.
+Please refer to the binding documentation for the clock and/or PM domain
+providers for more details.
+
+
+Example:
+
+   bsc: bus@fec1 {
+   compatible = "renesas,bsc-sh73a0", "renesas,bsc",
+"simple-pm-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0 0x2000>;
+   reg = <0xfec1 0x400>;
+   interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = <_clk>;
+   power-domains = <_a4s>;
+   };
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 3b95b5387b..0cd687526e 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -195,6 +195,13 @@ config SPL_SIMPLE_BUS
  Supports the 'simple-bus' driver, which is used on some systems
  in SPL.
 
+config SIMPLE_PM_BUS
+   bool "Support simple-pm-bus driver"
+   depends on DM && OF_CONTROL && CLK && POWER_DOMAIN
+   help
+ Supports the 'simple-pm-bus' driver, which is used for busses that
+ have power domains and/or clocks which need to be 

[PATCH v7 06/22] clk: Add K210 pll support

[Sean Anderson]

This pll code is primarily based on the code from the kendryte standalone
sdk in lib/drivers/sysctl.c. k210_pll_calc_params is roughly analogous to
the algorithm used to set the pll frequency, but it has been completely
rewritten to be fixed-point based.

Signed-off-by: Sean Anderson 
---

Changes in v6:
- Reformat code to reduce checkpatch errors

Changes in v5:
- Add function to register from a struct

Changes in v4:
- Rename the reference clock to "divider clock", and input clock to "reference
  clock" to match the upstream documentation.
- Add a test for calc_params. This currently resides in test/dm, but perhaps it
  should be moved to its own directory.
- Update MAINTAINERS
- Update copyright
- Lint

Changes in v3:
- Add an option to not include support for setting the pll rate. This saves
  around 1K in the final executable.
- Remove udelays to suppress warnings
- Bypass PLL after enabling, instead of before
- Check if the PLL is enabled already before doing a reset
- Fix bug with locked mask

Changes in v2:
- Rename driver to "k210_clk_pll"
- Add additional in-line documentation on algorithm and PLLs
- Restrict the range of internal VCO and reference frequencies
- Don't load driver before relocation
- Remove spurious references to mach-k210

 drivers/clk/Kconfig   |   1 +
 drivers/clk/Makefile  |   1 +
 drivers/clk/kendryte/Kconfig  |  12 +
 drivers/clk/kendryte/Makefile |   1 +
 drivers/clk/kendryte/pll.c| 601 ++
 include/kendryte/pll.h|  57 
 include/test/export.h |  16 +
 test/dm/Makefile  |   1 +
 test/dm/k210_pll.c|  96 ++
 9 files changed, 786 insertions(+)
 create mode 100644 drivers/clk/kendryte/Kconfig
 create mode 100644 drivers/clk/kendryte/Makefile
 create mode 100644 drivers/clk/kendryte/pll.c
 create mode 100644 include/kendryte/pll.h
 create mode 100644 include/test/export.h
 create mode 100644 test/dm/k210_pll.c

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 1992d4a4b4..fb8335267b 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -155,6 +155,7 @@ source "drivers/clk/analogbits/Kconfig"
 source "drivers/clk/at91/Kconfig"
 source "drivers/clk/exynos/Kconfig"
 source "drivers/clk/imx/Kconfig"
+source "drivers/clk/kendryte/Kconfig"
 source "drivers/clk/meson/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
 source "drivers/clk/owl/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index e01783391d..d911954581 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
 obj-$(CONFIG_$(SPL_TPL_)CLK_INTEL) += intel/
 obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
+obj-$(CONFIG_CLK_K210) += kendryte/
 obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
 obj-$(CONFIG_CLK_OWL) += owl/
 obj-$(CONFIG_CLK_RENESAS) += renesas/
diff --git a/drivers/clk/kendryte/Kconfig b/drivers/clk/kendryte/Kconfig
new file mode 100644
index 00..7b69c8afaf
--- /dev/null
+++ b/drivers/clk/kendryte/Kconfig
@@ -0,0 +1,12 @@
+config CLK_K210
+   bool "Clock support for Kendryte K210"
+   depends on CLK && CLK_CCF
+   help
+ This enables support clock driver for Kendryte K210 platforms.
+
+config CLK_K210_SET_RATE
+   bool "Enable setting the Kendryte K210 PLL rate"
+   depends on CLK_K210
+   help
+ Add functionality to calculate new rates for K210 PLLs. Enabling this
+ feature adds around 1K to U-Boot's final size.
diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
new file mode 100644
index 00..c56d93ea1c
--- /dev/null
+++ b/drivers/clk/kendryte/Makefile
@@ -0,0 +1 @@
+obj-y += pll.o
diff --git a/drivers/clk/kendryte/pll.c b/drivers/clk/kendryte/pll.c
new file mode 100644
index 00..699f933afc
--- /dev/null
+++ b/drivers/clk/kendryte/pll.c
@@ -0,0 +1,601 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+#include 
+
+#define LOG_CATEGORY UCLASS_CLK
+#include 
+/* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define CLK_K210_PLL "k210_clk_pll"
+
+#ifdef CONFIG_CLK_K210_SET_RATE
+static int k210_pll_enable(struct clk *clk);
+static int k210_pll_disable(struct clk *clk);
+
+/*
+ * The PLL included with the Kendryte K210 appears to be a True Circuits, Inc.
+ * General-Purpose PLL. The logical layout of the PLL with internal feedback is
+ * approximately the following:
+ *
+ *  +---+
+ *  |reference clock|
+ *  +---+
+ *  |
+ *  v
+ *+--+
+ *|/r|
+ *+--+
+ *  |
+ *  v
+ *   +-+
+ *   |divided clock|
+ *   +-+
+ *  |
+ *  v
+ *  +--+
+ *  |phase detector|<---+
+ *  +--+|
+ *  |   |
+ *  v   

[PATCH v7 10/22] dm: Fix error handling for dev_read_addr_ptr

[Sean Anderson]

dev_read_addr_ptr had different semantics depending on whether OF_LIVE was
enabled. This patch converts both implementations to return NULL on error,
and converts all call sites which check for FDT_ADDR_T_NONE to check for
NULL instead. This patch also removes the call to map_physmem, since we
have dev_remap_addr* for those semantics.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v5:
- New

 drivers/clk/imx/clk-imx8mp.c  | 2 +-
 drivers/core/read.c   | 2 +-
 drivers/pinctrl/broadcom/pinctrl-bcm283x.c| 2 +-
 drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 2 +-
 include/dm/read.h | 4 +++-
 5 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index a2693d2f7a..df30f4a087 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -281,7 +281,7 @@ static int imx8mp_clk_probe(struct udevice *dev)
clk_dm(IMX8MP_SYS_PLL2_1000M, imx_clk_fixed_factor("sys_pll2_1000m", 
"sys_pll2_out", 1, 1));
 
base = dev_read_addr_ptr(dev);
-   if (base == (void *)FDT_ADDR_T_NONE)
+   if (!base)
return -EINVAL;
 
clk_dm(IMX8MP_CLK_A53_SRC, imx_clk_mux2("arm_a53_src", base + 0x8000, 
24, 3, imx8mp_a53_sels, ARRAY_SIZE(imx8mp_a53_sels)));
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 1f999b1b31..2a8813fff1 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -154,7 +154,7 @@ void *dev_read_addr_ptr(const struct udevice *dev)
 {
fdt_addr_t addr = dev_read_addr(dev);
 
-   return (addr == FDT_ADDR_T_NONE) ? NULL : map_sysmem(addr, 0);
+   return (addr == FDT_ADDR_T_NONE) ? NULL : addr;
 }
 
 void *dev_remap_addr(const struct udevice *dev)
diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c 
b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
index eb720f09f8..6961536a4d 100644
--- a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
+++ b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
@@ -116,7 +116,7 @@ int bcm283x_pinctl_probe(struct udevice *dev)
}
 
priv->base_reg = dev_read_addr_ptr(dev);
-   if (priv->base_reg == (void *)FDT_ADDR_T_NONE) {
+   if (!priv->base_reg) {
debug("%s: Failed to get base address\n", __func__);
return -EINVAL;
}
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c 
b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
index c7351f32bb..bd95662ed5 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -630,7 +630,7 @@ int mtk_pinctrl_common_probe(struct udevice *dev,
int ret;
 
priv->base = dev_read_addr_ptr(dev);
-   if (priv->base == (void *)FDT_ADDR_T_NONE)
+   if (!priv->base)
return -EINVAL;
 
priv->soc = soc;
diff --git a/include/dm/read.h b/include/dm/read.h
index da8c7f25e7..d7183713dd 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -715,7 +715,9 @@ static inline fdt_addr_t dev_read_addr(const struct udevice 
*dev)
 
 static inline void *dev_read_addr_ptr(const struct udevice *dev)
 {
-   return devfdt_get_addr_ptr(dev);
+   void *addr = devfdt_get_addr_ptr(dev);
+
+   return ((fdt_addr_t)addr == FDT_ADDR_T_NONE) ? NULL : addr;
 }
 
 static inline fdt_addr_t dev_read_addr_pci(const struct udevice *dev)
-- 
2.25.1

[PATCH v7 07/22] clk: Add a bypass clock for K210

[Sean Anderson]

This is a small driver to do a software bypass of a clock if hardware
bypass is not working. I have tried to write this in a generic fashion, so
that it could be potentially broken out of the kendryte code at some future
date. For the K210, it is used to have aclk bypass pll0 and use in0 instead
so that the CPU keeps on working.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- Add function to register from a struct bypass

Changes in v4:
- New

 drivers/clk/kendryte/Makefile |   2 +-
 drivers/clk/kendryte/bypass.c | 270 ++
 include/kendryte/bypass.h |  31 
 3 files changed, 302 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/kendryte/bypass.c
 create mode 100644 include/kendryte/bypass.h

diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
index c56d93ea1c..47f682fce3 100644
--- a/drivers/clk/kendryte/Makefile
+++ b/drivers/clk/kendryte/Makefile
@@ -1 +1 @@
-obj-y += pll.o
+obj-y += bypass.o pll.o
diff --git a/drivers/clk/kendryte/bypass.c b/drivers/clk/kendryte/bypass.c
new file mode 100644
index 00..eb3e27d055
--- /dev/null
+++ b/drivers/clk/kendryte/bypass.c
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Sean Anderson 
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+#define LOG_CATEGORY UCLASS_CLK
+#include 
+
+#define CLK_K210_BYPASS "k210_clk_bypass"
+
+/*
+ * This is a small driver to do a software bypass of a clock if hardware bypass
+ * is not working. I have tried to write this in a generic fashion, so that it
+ * could be potentially broken out of the kendryte code at some future date.
+ *
+ * Say you have the following clock configuration
+ *
+ * +---+ +---+
+ * |osc| |pll|
+ * +---+ +---+
+ * ^
+ */|
+ *   / |
+ *  /  |
+ * /   |
+ */|
+ * +---+ +---+
+ * |clk| |clk|
+ * +---+ +---+
+ *
+ * But the pll does not have a bypass, so when you configure the pll, the
+ * configuration needs to change to look like
+ *
+ * +---+ +---+
+ * |osc| |pll|
+ * +---+ +---+
+ *   ^
+ *   |\
+ *   | \
+ *   |  \
+ *   |   \
+ *   |\
+ * +---+ +---+
+ * |clk| |clk|
+ * +---+ +---+
+ *
+ * To set this up, create a bypass clock with bypassee=pll and alt=osc. When
+ * creating the child clocks, set their parent to the bypass clock. After
+ * creating all the children, call k210_bypass_setchildren().
+ */
+
+static int k210_bypass_dobypass(struct k210_bypass *bypass)
+{
+   int ret, i;
+
+   /*
+* If we already have saved parents, then the children are already
+* bypassed
+*/
+   if (bypass->child_count && bypass->saved_parents[0])
+   return 0;
+
+   for (i = 0; i < bypass->child_count; i++) {
+   struct clk *child = bypass->children[i];
+   struct clk *parent = clk_get_parent(child);
+
+   if (IS_ERR(parent)) {
+   for (; i; i--)
+   bypass->saved_parents[i] = NULL;
+   return PTR_ERR(parent);
+   }
+   bypass->saved_parents[i] = parent;
+   }
+
+   for (i = 0; i < bypass->child_count; i++) {
+   struct clk *child = bypass->children[i];
+
+   ret = clk_set_parent(child, bypass->alt);
+   if (ret) {
+   for (; i; i--)
+   clk_set_parent(bypass->children[i],
+  bypass->saved_parents[i]);
+   for (i = 0; i < bypass->child_count; i++)
+   bypass->saved_parents[i] = NULL;
+   return ret;
+   }
+   }
+
+   return 0;
+}
+
+static int k210_bypass_unbypass(struct k210_bypass *bypass)
+{
+   int err, ret, i;
+
+   if (!bypass->child_count && !bypass->saved_parents[0]) {
+   log_warning("Cannot unbypass children; dobypass not called 
first\n");
+   return 0;
+   }
+
+   ret = 0;
+   for (i = 0; i < bypass->child_count; i++) {
+   err = clk_set_parent(bypass->children[i],
+bypass->saved_parents[i]);
+   if (err)
+   ret = err;
+   bypass->saved_parents[i] = NULL;
+   }
+   return ret;
+}
+
+static ulong k210_bypass_get_rate(struct clk *clk)
+{
+   struct k210_bypass *bypass = to_k210_bypass(clk);
+   const struct clk_ops *ops = bypass->bypassee_ops;
+
+   if (ops->get_rate)
+   return ops->get_rate(bypass->bypassee);
+   else
+   return clk_get_parent_rate(bypass->bypassee);
+}
+
+static ulong k210_bypass_set_rate(struct clk *clk, unsigned long rate)
+{
+   int ret;
+   struct k210_bypass *bypass = to_k210_bypass(clk);
+   const struct clk_ops *ops = bypass->bypassee_ops;
+
+   /* Don't bother bypassing if we aren't going to set the rate */
+   if 

[PATCH v7 03/22] clk: Unconditionally recursively en-/dis-able clocks

[Sean Anderson]

For clocks not in the CCF, their parents will not have UCLASS_CLK, so we
just enable them as normal. The enable count is local to the struct clk,
but this will never result in the actual en-/dis-able op being called
(unless the same struct clk is enabled twice).

For clocks in the CCF, we always traverse up the tree when enabling.
Previously, CCF clocks without id set would be skipped, stopping the
traversal too early.

Signed-off-by: Sean Anderson 
---

Changes in v6:
- Fix disable incorrectly recursing into non-clock devices

Changes in v5:
- Clear enable_count on request

Changes in v4:
- Lint

Changes in v3:
- New

 drivers/clk/clk-uclass.c | 60 ++--
 1 file changed, 27 insertions(+), 33 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 71878474eb..aa8dd9d027 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -410,6 +410,7 @@ int clk_request(struct udevice *dev, struct clk *clk)
ops = clk_dev_ops(dev);
 
clk->dev = dev;
+   clk->enable_count = 0;
 
if (!ops->request)
return 0;
@@ -521,7 +522,6 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 int clk_enable(struct clk *clk)
 {
const struct clk_ops *ops;
-   struct clk *clkp = NULL;
int ret;
 
debug("%s(clk=%p)\n", __func__, clk);
@@ -530,32 +530,29 @@ int clk_enable(struct clk *clk)
ops = clk_dev_ops(clk->dev);
 
if (CONFIG_IS_ENABLED(CLK_CCF)) {
-   /* Take id 0 as a non-valid clk, such as dummy */
-   if (clk->id && !clk_get_by_id(clk->id, )) {
-   if (clkp->enable_count) {
-   clkp->enable_count++;
-   return 0;
-   }
-   if (clkp->dev->parent &&
-   device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
-   ret = 
clk_enable(dev_get_clk_ptr(clkp->dev->parent));
-   if (ret) {
-   printf("Enable %s failed\n",
-  clkp->dev->parent->name);
-   return ret;
-   }
+   if (clk->enable_count) {
+   clk->enable_count++;
+   return 0;
+   }
+   if (clk->dev->parent &&
+   device_get_uclass_id(clk->dev->parent) == UCLASS_CLK) {
+   ret = clk_enable(dev_get_clk_ptr(clk->dev->parent));
+   if (ret) {
+   printf("Enable %s failed\n",
+  clk->dev->parent->name);
+   return ret;
}
}
 
if (ops->enable) {
ret = ops->enable(clk);
if (ret) {
-   printf("Enable %s failed\n", clk->dev->name);
+   printf("Enable %s failed (error %d)\n",
+  clk->dev->name, ret);
return ret;
}
}
-   if (clkp)
-   clkp->enable_count++;
+   clk->enable_count++;
} else {
if (!ops->enable)
return -ENOSYS;
@@ -581,7 +578,6 @@ int clk_enable_bulk(struct clk_bulk *bulk)
 int clk_disable(struct clk *clk)
 {
const struct clk_ops *ops;
-   struct clk *clkp = NULL;
int ret;
 
debug("%s(clk=%p)\n", __func__, clk);
@@ -590,29 +586,27 @@ int clk_disable(struct clk *clk)
ops = clk_dev_ops(clk->dev);
 
if (CONFIG_IS_ENABLED(CLK_CCF)) {
-   if (clk->id && !clk_get_by_id(clk->id, )) {
-   if (clkp->enable_count == 0) {
-   printf("clk %s already disabled\n",
-  clkp->dev->name);
-   return 0;
-   }
-
-   if (--clkp->enable_count > 0)
-   return 0;
+   if (clk->enable_count == 0) {
+   printf("clk %s already disabled\n",
+  clk->dev->name);
+   return 0;
}
 
+   if (--clk->enable_count > 0)
+   return 0;
+
if (ops->disable) {
ret = ops->disable(clk);
if (ret)
return ret;
}
 
-   if (clkp && clkp->dev->parent &&
-   device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
-   ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
+   if (clk->dev->parent &&
+   

[PATCH v7 05/22] clk: Add functions to register CCF clock structs

[Sean Anderson]

This patch adds alternate versions of the clk_*_register functions for use
with statically-allocated struct clks. This allows drivers to define clocks
at compile-time and register them at run-time without malloc-ing. This
increases the size of the binary, but should not affect ram usage (since
the clocks now no longer live on the heap).

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/clk/clk-composite.c  | 103 +++
 drivers/clk/clk-divider.c|  56 +--
 drivers/clk/clk-gate.c   |  38 -
 include/linux/clk-provider.h |   9 +++
 4 files changed, 112 insertions(+), 94 deletions(-)

diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 819bfca2fc..b328c4e5a5 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -95,6 +95,51 @@ static int clk_composite_disable(struct clk *clk)
return 0;
 }
 
+struct clk *clk_register_composite_struct(const char *name,
+ const char * const *parent_names,
+ int num_parents,
+ struct clk_composite *composite)
+{
+   int ret;
+   struct clk *clk;
+
+   if (!num_parents || (num_parents != 1 && !composite->mux))
+   return ERR_PTR(-EINVAL);
+
+   if (composite->mux && composite->mux_ops)
+   composite->mux->data = (ulong)composite;
+
+   if (composite->rate && composite->rate_ops) {
+   if (!composite->rate_ops->get_rate)
+   return ERR_PTR(-EINVAL);
+
+   composite->rate->data = (ulong)composite;
+   }
+
+   if (composite->gate && composite->gate_ops) {
+   if (!composite->gate_ops->enable ||
+   !composite->gate_ops->disable)
+   return ERR_PTR(-EINVAL);
+
+   composite->gate->data = (ulong)composite;
+   }
+
+   clk = >clk;
+   ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
+  parent_names[clk_composite_get_parent(clk)]);
+   if (ret)
+   clk = ERR_PTR(ret);
+
+   if (composite->mux)
+   composite->mux->dev = clk->dev;
+   if (composite->rate)
+   composite->rate->dev = clk->dev;
+   if (composite->gate)
+   composite->gate->dev = clk->dev;
+
+   return clk;
+}
+
 struct clk *clk_register_composite(struct device *dev, const char *name,
   const char * const *parent_names,
   int num_parents, struct clk *mux,
@@ -107,62 +152,24 @@ struct clk *clk_register_composite(struct device *dev, 
const char *name,
 {
struct clk *clk;
struct clk_composite *composite;
-   int ret;
-
-   if (!num_parents || (num_parents != 1 && !mux))
-   return ERR_PTR(-EINVAL);
 
composite = kzalloc(sizeof(*composite), GFP_KERNEL);
if (!composite)
return ERR_PTR(-ENOMEM);
 
-   if (mux && mux_ops) {
-   composite->mux = mux;
-   composite->mux_ops = mux_ops;
-   mux->data = (ulong)composite;
-   }
+   composite->mux = mux;
+   composite->mux_ops = mux_ops;
 
-   if (rate && rate_ops) {
-   if (!rate_ops->get_rate) {
-   clk = ERR_PTR(-EINVAL);
-   goto err;
-   }
+   composite->rate = rate;
+   composite->rate_ops = rate_ops;
 
-   composite->rate = rate;
-   composite->rate_ops = rate_ops;
-   rate->data = (ulong)composite;
-   }
+   composite->gate = gate;
+   composite->gate_ops = gate_ops;
 
-   if (gate && gate_ops) {
-   if (!gate_ops->enable || !gate_ops->disable) {
-   clk = ERR_PTR(-EINVAL);
-   goto err;
-   }
-
-   composite->gate = gate;
-   composite->gate_ops = gate_ops;
-   gate->data = (ulong)composite;
-   }
-
-   clk = >clk;
-   ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
-  parent_names[clk_composite_get_parent(clk)]);
-   if (ret) {
-   clk = ERR_PTR(ret);
-   goto err;
-   }
-
-   if (composite->mux)
-   composite->mux->dev = clk->dev;
-   if (composite->rate)
-   composite->rate->dev = clk->dev;
-   if (composite->gate)
-   composite->gate->dev = clk->dev;
-
-   return clk;
-
-err:
-   kfree(composite);
+   clk = clk_register_composite_struct(name, parent_names, num_parents,
+   composite);
+   if (IS_ERR(clk))
+   kfree(composite);
return clk;
 }
 
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 5fe1c3941f..747504d0a0 100644
--- 

[PATCH v7 04/22] clk: Fix clk_get_by_* handling of index

[Sean Anderson]

clk_get_by_index_nodev only ever fetched clock 1, due to passing a boolean
predicate instead of the index. Other clk_get_by_* functions got the clock
correctly, but passed a predicate instead of the index to clk_get_by_tail.
This could lead to confusing error messages.

Signed-off-by: Sean Anderson 
---

Changes in v7:
- New

 drivers/clk/clk-uclass.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index aa8dd9d027..c082fe95ff 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -121,7 +121,7 @@ static int clk_get_by_indexed_prop(struct udevice *dev, 
const char *prop_name,
 
 
return clk_get_by_index_tail(ret, dev_ofnode(dev), , "clocks",
-index > 0, clk);
+index, clk);
 }
 
 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
@@ -133,7 +133,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct 
clk *clk)
 index, );
 
return clk_get_by_index_tail(ret, dev_ofnode(dev), , "clocks",
-index > 0, clk);
+index, clk);
 }
 
 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
@@ -142,10 +142,10 @@ int clk_get_by_index_nodev(ofnode node, int index, struct 
clk *clk)
int ret;
 
ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
-index > 0, );
+index, );
 
return clk_get_by_index_tail(ret, node, , "clocks",
-index > 0, clk);
+index, clk);
 }
 
 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
-- 
2.25.1

[PATCH v7 02/22] clk: Check that ops of composite clock components exist before calling

[Sean Anderson]

clk_composite_ops was shared between all devices in the composite clock
driver.  If one clock had a feature (such as supporting set_parent) which
another clock did not, it could call a null pointer dereference.

This patch does three things
1. It adds null-pointer checks to all composite clock functions.
2. It makes clk_composite_ops const and sets its functions at compile-time.
3. It adds some basic sanity checks to num_parents.

The combined effect of these changes is that any of mux, rate, or gate can
be NULL, and composite clocks will still function normally. Previously, at
least mux had to exist, since clk_composite_get_parent was used to
determine the parent for clk_register.

Signed-off-by: Sean Anderson 
Acked-by: Lukasz Majewski 
---

Changes in v4:
- Return ENOTSUPP not ENOSYS with no set_parent

Changes in v3:
- Don't return an error code where a no-op would be fine

 drivers/clk/clk-composite.c | 57 +++--
 1 file changed, 35 insertions(+), 22 deletions(-)

diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 2ff1d6b47f..819bfca2fc 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -24,7 +24,10 @@ static u8 clk_composite_get_parent(struct clk *clk)
(struct clk *)dev_get_clk_ptr(clk->dev) : clk);
struct clk *mux = composite->mux;
 
-   return clk_mux_get_parent(mux);
+   if (mux)
+   return clk_mux_get_parent(mux);
+   else
+   return 0;
 }
 
 static int clk_composite_set_parent(struct clk *clk, struct clk *parent)
@@ -34,7 +37,10 @@ static int clk_composite_set_parent(struct clk *clk, struct 
clk *parent)
const struct clk_ops *mux_ops = composite->mux_ops;
struct clk *mux = composite->mux;
 
-   return mux_ops->set_parent(mux, parent);
+   if (mux && mux_ops)
+   return mux_ops->set_parent(mux, parent);
+   else
+   return -ENOTSUPP;
 }
 
 static unsigned long clk_composite_recalc_rate(struct clk *clk)
@@ -44,7 +50,10 @@ static unsigned long clk_composite_recalc_rate(struct clk 
*clk)
const struct clk_ops *rate_ops = composite->rate_ops;
struct clk *rate = composite->rate;
 
-   return rate_ops->get_rate(rate);
+   if (rate && rate_ops)
+   return rate_ops->get_rate(rate);
+   else
+   return clk_get_parent_rate(clk);
 }
 
 static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate)
@@ -54,7 +63,10 @@ static ulong clk_composite_set_rate(struct clk *clk, 
unsigned long rate)
const struct clk_ops *rate_ops = composite->rate_ops;
struct clk *clk_rate = composite->rate;
 
-   return rate_ops->set_rate(clk_rate, rate);
+   if (rate && rate_ops)
+   return rate_ops->set_rate(clk_rate, rate);
+   else
+   return clk_get_rate(clk);
 }
 
 static int clk_composite_enable(struct clk *clk)
@@ -64,7 +76,10 @@ static int clk_composite_enable(struct clk *clk)
const struct clk_ops *gate_ops = composite->gate_ops;
struct clk *gate = composite->gate;
 
-   return gate_ops->enable(gate);
+   if (gate && gate_ops)
+   return gate_ops->enable(gate);
+   else
+   return 0;
 }
 
 static int clk_composite_disable(struct clk *clk)
@@ -74,15 +89,12 @@ static int clk_composite_disable(struct clk *clk)
const struct clk_ops *gate_ops = composite->gate_ops;
struct clk *gate = composite->gate;
 
-   gate_ops->disable(gate);
-
-   return 0;
+   if (gate && gate_ops)
+   return gate_ops->disable(gate);
+   else
+   return 0;
 }
 
-struct clk_ops clk_composite_ops = {
-   /* This will be set according to clk_register_composite */
-};
-
 struct clk *clk_register_composite(struct device *dev, const char *name,
   const char * const *parent_names,
   int num_parents, struct clk *mux,
@@ -96,7 +108,9 @@ struct clk *clk_register_composite(struct device *dev, const 
char *name,
struct clk *clk;
struct clk_composite *composite;
int ret;
-   struct clk_ops *composite_ops = _composite_ops;
+
+   if (!num_parents || (num_parents != 1 && !mux))
+   return ERR_PTR(-EINVAL);
 
composite = kzalloc(sizeof(*composite), GFP_KERNEL);
if (!composite)
@@ -105,8 +119,6 @@ struct clk *clk_register_composite(struct device *dev, 
const char *name,
if (mux && mux_ops) {
composite->mux = mux;
composite->mux_ops = mux_ops;
-   if (mux_ops->set_parent)
-   composite_ops->set_parent = clk_composite_set_parent;
mux->data = (ulong)composite;
}
 
@@ -115,11 +127,6 @@ struct clk *clk_register_composite(struct device *dev, 
const char *name,
clk = ERR_PTR(-EINVAL);
goto err;

[PATCH v7 01/22] clk: Always use the supplied struct clk

[Sean Anderson]

CCF clocks should always use the struct clock passed to their methods for
extracting the driver-specific clock information struct. Previously, many
functions would use the clk->dev->priv if the device was bound. This could
cause problems with composite clocks. The individual clocks in a composite
clock did not have the ->dev field filled in. This was fine, because the
device-specific clock information would be used. However, since there was
no ->dev, there was no way to get the parent clock. This caused the
recalc_rate method of the CCF divider clock to fail. One option would be to
use the clk->priv field to get the composite clock and from there get the
appropriate parent device. However, this would tie the implementation to
the composite clock. In general, different devices should not rely on the
contents of ->priv from another device.

The simple solution to this problem is to just always use the supplied
struct clock. The composite clock now fills in the ->dev pointer of its
child clocks.  This allows child clocks to make calls like clk_get_parent()
without issue.

imx avoided the above problem by using a custom get_rate function with
composite clocks.

Signed-off-by: Sean Anderson 
Acked-by: Lukasz Majewski 
---

Changes in v4:
- Lint

Changes in v3:
- Documented new assumptions in the CCF
- Wrapped docs to 80 columns

 doc/imx/clk/ccf.txt| 63 +-
 drivers/clk/clk-composite.c|  7 
 drivers/clk/clk-divider.c  |  6 ++--
 drivers/clk/clk-fixed-factor.c |  3 +-
 drivers/clk/clk-gate.c |  6 ++--
 drivers/clk/clk-mux.c  | 12 +++
 drivers/clk/imx/clk-gate2.c|  4 +--
 7 files changed, 50 insertions(+), 51 deletions(-)

diff --git a/doc/imx/clk/ccf.txt b/doc/imx/clk/ccf.txt
index 36b60dc438..e40ac360e8 100644
--- a/doc/imx/clk/ccf.txt
+++ b/doc/imx/clk/ccf.txt
@@ -1,42 +1,37 @@
 Introduction:
 =
 
-This documentation entry describes the Common Clock Framework [CCF]
-port from Linux kernel (v5.1.12) to U-Boot.
+This documentation entry describes the Common Clock Framework [CCF] port from
+Linux kernel (v5.1.12) to U-Boot.
 
-This code is supposed to bring CCF to IMX based devices (imx6q, imx7
-imx8). Moreover, it also provides some common clock code, which would
-allow easy porting of CCF Linux code to other platforms.
+This code is supposed to bring CCF to IMX based devices (imx6q, imx7 imx8).
+Moreover, it also provides some common clock code, which would allow easy
+porting of CCF Linux code to other platforms.
 
 Design decisions:
 =
 
-* U-Boot's driver model [DM] for clk differs from Linux CCF. The most
-  notably difference is the lack of support for hierarchical clocks and
-  "clock as a manager driver" (single clock DTS node acts as a starting
-  point for all other clocks).
+* U-Boot's driver model [DM] for clk differs from Linux CCF. The most notably
+  difference is the lack of support for hierarchical clocks and "clock as a
+  manager driver" (single clock DTS node acts as a starting point for all other
+  clocks).
 
-* The clk_get_rate() caches the previously read data if CLK_GET_RATE_NOCACHE
-  is not set (no need for recursive access).
+* The clk_get_rate() caches the previously read data if CLK_GET_RATE_NOCACHE is
+  not set (no need for recursive access).
 
-* On purpose the "manager" clk driver (clk-imx6q.c) is not using large
-  table to store pointers to clocks - e.g. clk[IMX6QDL_CLK_USDHC2_SEL] = 
-  Instead we use udevice's linked list for the same class (UCLASS_CLK).
+* On purpose the "manager" clk driver (clk-imx6q.c) is not using large table to
+  store pointers to clocks - e.g. clk[IMX6QDL_CLK_USDHC2_SEL] =  Instead we
+  use udevice's linked list for the same class (UCLASS_CLK).
 
   Rationale:
   --
-When porting the code as is from Linux, one would need ~1KiB of RAM to
-store it. This is way too much if we do plan to use this driver in SPL.
+When porting the code as is from Linux, one would need ~1KiB of RAM to 
store
+it. This is way too much if we do plan to use this driver in SPL.
 
 * The "central" structure of this patch series is struct udevice and its
   uclass_priv field contains the struct clk pointer (to the originally created
   one).
 
-* Up till now U-Boot's driver model (DM) CLK operates on udevice (main
-  access to clock is by udevice ops)
-  In the CCF the access to struct clk (embodying pointer to *dev) is
-  possible via dev_get_clk_ptr() (it is a wrapper on dev_get_uclass_priv()).
-
 * To keep things simple the struct udevice's uclass_priv pointer is used to
   store back pointer to corresponding struct clk. However, it is possible to
   modify clk-uclass.c file and add there struct uc_clk_priv, which would have
@@ -45,13 +40,17 @@ Design decisions:
   setting .per_device_auto_alloc_size = sizeof(struct uc_clk_priv)) the
   uclass_priv stores the pointer to struct clk.
 
+* Non-CCF clocks do not have a pointer to a clock in 

[PATCH v7 00/22] riscv: Add Sipeed Maix support

[Sean Anderson]

This patch series adds support for Sipeed Maix boards and the Kendryte
K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
models are similar.

Known Bugs/Limitations:
- Accessing the AI ram hangs, limiting available ram to 6M
- Trying to boot an image with bootm fails with
  ERROR: Failed to allocate 0x7d60 bytes below 0x8000.

To flash u-boot to a maix bit, run
kflash -tp /dev/ -B bit_mic u-boot-dtb.bin

Boot output should look like the following:

U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)

DRAM:  8 MiB
In:serial@3800
Out:   serial@3800
Err:   serial@3800
=>

Changes for v7:
- Split documentation from other board support
- Split IPI clear from other IPI cleanup
- Rebased onto a clean upstream. Hopefully this fixes any patching
  problems.

Changes for v6:
- Remove spi, pinmux, gpio, led, and wdt support --- to be added in separate
  patches
- Rebase onto master
- Clear IPIs before enabling them
- Reorganize code so checkpatch errors less

Changes for v5:
- Rebase onto master
- Add pinconf support
- Add gpio support
- Store environment in spi flash
- Group patches by prefix
- Add additional documentation
- Add SMP support
- Add WDT support

Changes for v4:
- Linted several patches
- Updated the copyright year for several files
- Added tests for syscon-reset, simple-pm-bus, and the pll calc_rate function
- Added/updated documentation
- Fixed SPI for the nor flash
- Fixed PLLs not enabling/setting rate properly
- RISCV_PRIV_1_9_1 now (un)defines all diferring CSRs, and also disables VM
- More devicetree changes

Changes for v3:
- Remove patch to set RV64I as default
- Remove patch for a separate sysctl driver
- Split off cpu frequency patch into its own series
- Reorder support/devicetree patches to come last
- Add patch for reset driver
- Add simple-pm-bus for busses with their own clocks
- Add additional documentation
- Reword mcounteren patch to refer to the RISC-V priv spec 1.9.1
- Many devicetree changes
- Switch to "make savedefconfig" to generate the config

Changes for v2:
- Many bugfixes for the device tree
- Modify the config to build without errors
- Add support for keeping internal PLL frequencies in-range
- Fix several rebase-induced artifacts

Sean Anderson (22):
  clk: Always use the supplied struct clk
  clk: Check that ops of composite clock components exist before calling
  clk: Unconditionally recursively en-/dis-able clocks
  clk: Fix clk_get_by_* handling of index
  clk: Add functions to register CCF clock structs
  clk: Add K210 pll support
  clk: Add a bypass clock for K210
  clk: Add K210 clock support
  dm: Add support for simple-pm-bus
  dm: Fix error handling for dev_read_addr_ptr
  reset: Add generic reset driver
  lib: Always set errno in hcreate_r
  riscv: Add headers for asm/global_data.h
  riscv: Clear pending interrupts before enabling IPIs
  riscv: Clean up IPI initialization code
  riscv: Add option to support RISC-V privileged spec 1.9
  riscv: Allow use of reset drivers
  riscv: Try to get cpu frequency from a "clocks" node if it exists
  riscv: Enable cpu clock if it is present
  riscv: Add device tree for K210 and Sipeed Maix BitM
  doc: riscv: Add documentation for Sipeed Maix Bit
  riscv: Add Sipeed Maix support

 MAINTAINERS   |   7 +
 arch/riscv/Kconfig|  14 +
 arch/riscv/cpu/cpu.c  |  15 +
 arch/riscv/cpu/start.S|   2 +
 arch/riscv/dts/Makefile   |   1 +
 arch/riscv/dts/k210-maix-bit.dts  |  47 ++
 arch/riscv/dts/k210.dtsi  | 594 +
 arch/riscv/include/asm/csr.h  |  40 ++
 arch/riscv/include/asm/global_data.h  |   2 +
 arch/riscv/include/asm/smp.h  |  43 ++
 arch/riscv/lib/andes_plic.c   |  34 +-
 arch/riscv/lib/reset.c|   2 +
 arch/riscv/lib/sbi_ipi.c  |   5 +
 arch/riscv/lib/sifive_clint.c |  33 +-
 arch/riscv/lib/smp.c  |  56 +-
 arch/sandbox/dts/test.dts |  21 +
 arch/sandbox/include/asm/clk.h|   1 +
 board/sipeed/maix/Kconfig |  48 ++
 board/sipeed/maix/MAINTAINERS |  11 +
 board/sipeed/maix/Makefile|   5 +
 board/sipeed/maix/maix.c  |  54 ++
 configs/sandbox_defconfig |   3 +
 configs/sipeed_maix_bitm_defconfig|   8 +
 doc/board/index.rst   |   1 +
 doc/board/sipeed/index.rst|   9 +
 doc/board/sipeed/maix.rst | 298 +
 .../bus/simple-pm-bus.txt |  44 ++
 .../mfd/kendryte,k210-sysctl.txt  |  33 +
 .../reset/syscon-reset.txt|  36 ++
 doc/imx/clk/ccf.txt   |  63 +-
 drivers/clk/Kconfig   

Re: [PATCH v3 3/5] riscv: Provide a mechanism to fix DT for reserved memory

[Atish Patra]

On Thu, Mar 19, 2020 at 7:31 AM Bin Meng  wrote:
>
> On Wed, Mar 18, 2020 at 5:19 AM Atish Patra  wrote:
> >
> > In RISC-V, M-mode software can reserve physical memory regions
> > by setting appropriate physical memory protection (PMP) csr. As the
> > PMP csr are accessible only in M-mode, S-mode U-Boot can not read
> > this configuration directly. However, M-mode software can pass this
> > information via reserved-memory node in device tree so that S-mode
> > software can access this information.
> >
> > This patch provides a framework to copy to the reserved-memory node
> > from one DT to another. This will be used to update the DT used by
> > U-Boot and the DT passed to the next stage OS.
> >
> > Signed-off-by: Atish Patra 
> > ---
> >  arch/riscv/cpu/start.S|  1 +
> >  arch/riscv/include/asm/global_data.h  |  1 +
> >  arch/riscv/include/asm/u-boot-riscv.h |  1 +
> >  arch/riscv/lib/asm-offsets.c  |  1 +
> >  arch/riscv/lib/bootm.c| 68 +++
> >  5 files changed, 72 insertions(+)
> >
> > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> > index 6b3ff99c3882..0282685c2906 100644
> > --- a/arch/riscv/cpu/start.S
> > +++ b/arch/riscv/cpu/start.S
> > @@ -121,6 +121,7 @@ call_board_init_f_0:
> >
> > jal board_init_f_init_reserve
> >
> > +   SREGs1, GD_FIRMWARE_FDT_ADDR(gp)
> > /* save the boot hart id to global_data */
> > SREGtp, GD_BOOT_HART(gp)
> >
> > diff --git a/arch/riscv/include/asm/global_data.h 
> > b/arch/riscv/include/asm/global_data.h
> > index b74bd7e738bb..51ac8d1c98e2 100644
> > --- a/arch/riscv/include/asm/global_data.h
> > +++ b/arch/riscv/include/asm/global_data.h
> > @@ -15,6 +15,7 @@
> >  /* Architecture-specific global data */
> >  struct arch_global_data {
> > long boot_hart; /* boot hart id */
> > +   phys_addr_t firmware_fdt_addr;
> >  #ifdef CONFIG_SIFIVE_CLINT
> > void __iomem *clint;/* clint base address */
> >  #endif
> > diff --git a/arch/riscv/include/asm/u-boot-riscv.h 
> > b/arch/riscv/include/asm/u-boot-riscv.h
> > index 49febd588102..b7bea0ba184d 100644
> > --- a/arch/riscv/include/asm/u-boot-riscv.h
> > +++ b/arch/riscv/include/asm/u-boot-riscv.h
> > @@ -17,5 +17,6 @@ int cleanup_before_linux(void);
> >  /* board/.../... */
> >  int board_init(void);
> >  void board_quiesce_devices(void);
> > +int riscv_board_reserved_mem_fixup(void *fdt);
> >
> >  #endif /* _U_BOOT_RISCV_H_ */
> > diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
> > index 4fa4fd371473..7301c1b98e23 100644
> > --- a/arch/riscv/lib/asm-offsets.c
> > +++ b/arch/riscv/lib/asm-offsets.c
> > @@ -14,6 +14,7 @@
> >  int main(void)
> >  {
> > DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart));
> > +   DEFINE(GD_FIRMWARE_FDT_ADDR, offsetof(gd_t, 
> > arch.firmware_fdt_addr));
> >  #ifndef CONFIG_XIP
> > DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts));
> >  #endif
> > diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
> > index f927694ae32f..5e907e96701c 100644
> > --- a/arch/riscv/lib/bootm.c
> > +++ b/arch/riscv/lib/bootm.c
> > @@ -19,6 +19,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >
> >  DECLARE_GLOBAL_DATA_PTR;
> >
> > @@ -26,6 +27,73 @@ __weak void board_quiesce_devices(void)
> >  {
> >  }
> >
> > +int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
>
> We probably need find a better place for this routine, see below
> comments for riscv_board_reserved_mem_fixup().
>
> We need make this routine public in u-boot-riscv.h as well.
>
> > +{
> > +   uint32_t phandle;
> > +   struct fdt_memory pmp_mem;
> > +   fdt_addr_t addr;
> > +   fdt_size_t size;
> > +   int offset, node, err, rmem_offset;
> > +   bool nomap = false;
> > +   char basename[32] = {0};
> > +   int bname_len;
> > +   int max_len = sizeof(basename);
> > +   const char *name;
> > +   char *temp;
> > +
> > +   offset = fdt_path_offset(src, "/reserved-memory");
> > +   if (offset < 0) {
> > +   printf("No reserved memory region found in source FDT\n");
> > +   return 0;
> > +   }
> > +
> > +   fdt_for_each_subnode(node, src, offset) {
> > +   name = fdt_get_name(src, node, NULL);
> > +
> > +   addr = fdtdec_get_addr_size_auto_noparent(src, node,
> > + "reg", 0, ,
> > + true);
> > +   if (addr == FDT_ADDR_T_NONE) {
> > +   debug("failed to read address/size for %s\n", name);
> > +   continue;
> > +   }
> > +   strncpy(basename, name, max_len);
> > +   temp = strchr(basename, '@');
> > +   if (temp) {
> > +   bname_len = strnlen(basename, max_len) - 
> > strnlen(temp,
> > 

Re: [PATCH] cmd: ubi: add a command to rename volume

[Wolfgang Denk]

Dear Philippe,

In message <1584644739-10258-1-git-send-email-philippe.rey...@softathome.com> 
you wrote:
> This commit add the command ubi rename to rename an ubi volume.
> The format of the command is: ubi rename  .

Can we plase make this optional / configurable?

Thanks!

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Every revolutionary idea - in science, politics, art, or  whatever  -
evokes three stages of reaction in a hearer:
  1. It is completely impossible - don't waste my time.
  2. It is possible, but it is not worth doing.
  3. I said it was a good idea all along.

Re: [PATCH v3 1/5] riscv: Add boot hartid to Device tree

[Atish Patra]

On Wed, Mar 18, 2020 at 8:14 PM Bin Meng  wrote:
>
> On Thu, Mar 19, 2020 at 11:10 AM Bin Meng  wrote:
> >
> > On Wed, Mar 18, 2020 at 5:19 AM Atish Patra  wrote:
> > >
> > > Linux booting protocol mandates that register "a0" contains the hartid.
> > > However, U-boot can not pass the hartid via a0 during via standard UEFI
> >
> > nits: U-Boot
> >
> > remove "during" ?
> >
> > > protocol. DT nodes are commonly used to pass such information to the OS.
> > >
> > > Add a DT node under chosen node to indicate the boot hartid. EFI stub
> > > in Linux kernel will parse this node and pass it to the real kernel
> > > in "a0" before jumping to it.
> > >
> > > Signed-off-by: Atish Patra 
> > > Reviewed-by: Rick Chen 
> > > ---
> > >  arch/riscv/lib/bootm.c | 22 ++
> > >  1 file changed, 22 insertions(+)
> > >
> > > diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
> > > index fad16901c5f2..f927694ae32f 100644
> > > --- a/arch/riscv/lib/bootm.c
> > > +++ b/arch/riscv/lib/bootm.c
> > > @@ -28,6 +28,28 @@ __weak void board_quiesce_devices(void)
> > >
> > >  int arch_fixup_fdt(void *blob)
> > >  {
>
> One additional note, do have need to guard the "boot-hartid" fix-up with
>
> #ifdef CONFIG_EFI_LOADER
>
> #endif
>

Good point. Thanks I will add it.

> ?
>
> > > +   u32 size;
> > > +   int chosen_offset, err;
> > > +
> > > +   size = fdt_totalsize(blob);
> > > +   err  = fdt_open_into(blob, blob, size + 32);
> > > +   if (err < 0) {
> > > +   printf("Device Tree can't be expanded to accommodate new 
> > > node");
> > > +   return -1;
> >
> > return err
> >

Sure.

> > > +   }
> > > +   chosen_offset = fdt_path_offset(blob, "/chosen");
> > > +   if (chosen_offset < 0) {
> > > +   err = fdt_add_subnode(blob, 0, "chosen");
> > > +   if (err < 0) {
> > > +   printf("chosen node can not be added\n");
> > > +   return -1;
> >
> > return err
> >

Sure.

> > > +   }
> > > +   }
> > > +
> > > +   /* Overwrite the boot-hartid as U-Boot is the last state BL */
> >
> > typo: stage
> >
> > > +   fdt_setprop_u32(blob, chosen_offset, "boot-hartid",
> > > +  gd->arch.boot_hart);
> > > +
> > > return 0;
> > >  }
> > >
> > > --
>
> Regards,
> Bin

I will address all other typos as well.

-- 
Regards,
Atish

Re: [PATCH v3 2/3] test: Add PStore command tests

[Wolfgang Denk]

Dear Frédéric,

In message <20200319175737.10166-3-frederic.da...@collabora.com> you wrote:
>
> +++ b/test/py/tests/test_pstore.py
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: GPL-2.0

Can we please make new code always GPL-2.0+ ?


Thanks!

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
That's their goal, remember, a goal that's really contrary to that of
the programmer or administrator. We just want to get our  jobs  done.
$Bill  just  wants  to  become  $$Bill. These aren't even marginallly
congruent.
 -- Tom Christiansen in <6jhtqk$qls$1...@csnews.cs.colorado.edu>

Re: [PATCH v3 0/3] Add command to display or save Linux PStore dumps

[Wolfgang Denk]

Dear Frédéric,

In message <20200319175737.10166-1-frederic.da...@collabora.com> you wrote:
> This serie of patches adds a new pstore command allowing to display or save
> ramoops logs (oops, panic, console, ftrace and user) generated by a previous
> kernel crash.
> PStore parameters can be set in U-Boot configuration file, or at run-time
> using "pstore set" command. For kernel using Device Tree, the parameters are
> dynamically added to Device Tree.
> Records size should be the same as the ones used by kernel, and should be a
> power of 2.

I wonder if we are reinventing the wheel here again?

There is this feature in U-Boot which is called "shared log buffer";
a couple of years ago this was fully functional at least on Power
and ARM architectures, but it was rarely used and probably has not
been tested for years.  A;so, the necessary tiny patch to have it
supported in Linux as well never made it upstream (don't remember
why, likely lack of time/interest).

The functionality we had then was the following:

- A memory area war reserved in U-Boot (typically at the upper end
  of memory) as a buffer that was shared between U-Boot and Linux.
  The format was as used for the kernel log buffer.
- Upon boot, U-Boot would not re-initialize an existing log buffer,
  but keep it's content.  That means, you could read and display the
  log buffer of the linux kernel that was running before the reset.
  After kernel crashes, pretty often this contained information that
  the kernel could not even print to the serial console any more.
- In U-Boot, you could append log entries to that buffer.  For
  example, this was used to record the results of the Power On Self
  Test (POST) routines (another feature that only few people still
  remember).
- When booting Linux, the kernel syslog mechanism was used to
  extract the information from the log buffer in the usual way.

The interesting fact here was that the Linux kernel was able to
extract and save the kernel panic messages etc. from the crash
before, plus any messages logged by U-Boot.


To me this sounds very much like what you are adding here (plus a
few features more).  Does it make sense to unify such code?



Added Heiko to Cc:, as he is currently working on fixes to get
shared logbuffer working again for another project.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
I'm what passes for a Unix guru in my office. This is  a  frightening
concept. - Lee Ann Goldstein, in <3k55ba$c...@butch.lmsc.lockheed.com>

Re: [PATCH v3 3/3] cmd: Fixup DT to pass PStore Ramoops parameters

[Heinrich Schuchardt]

On 3/19/20 6:57 PM, Frédéric Danis wrote:
> To simplify configuration and keep synchronized the PStore/Ramoops between
> U-Boot and the Linux kernel, this commit dynamically adds the Ramoops
> parameters defined in the U-Boot session to the Device Tree.
>
> Signed-off-by: Frédéric Danis 
> ---
>  cmd/pstore.c  | 38 ++
>  common/image-fdt.c|  4 
>  doc/pstore.rst|  2 ++
>  include/fdt_support.h |  3 +++
>  4 files changed, 47 insertions(+)
>
> diff --git a/cmd/pstore.c b/cmd/pstore.c
> index 4e4d70d604..6cad635620 100644
> --- a/cmd/pstore.c
> +++ b/cmd/pstore.c
> @@ -479,6 +479,44 @@ static int do_pstore(cmd_tbl_t *cmdtp, int flag, int 
> argc, char * const argv[])
>   return c->cmd(cmdtp, flag, argc, argv);
>  }
>
> +void fdt_fixup_pstore(void *blob)
> +{
> + char node[32];
> + int  nodeoffset;/* node offset from libfdt */
> +
> + nodeoffset = fdt_path_offset(blob, "/");
> + if (nodeoffset < 0) {
> + /* Not found or something else bad happened. */
> + log_debug("fdt_path_offset() returned %s\n", 
> fdt_strerror(nodeoffset));

Thanks for implementing device tree support.

Should this be log_err()?

> + return;
> + }
> +
> + nodeoffset = fdt_add_subnode(blob, nodeoffset, "reserved-memory");
> + if (nodeoffset < 0) {
> + log_debug("Add 'reserved-memory' node failed: %s\n",
> + fdt_strerror(nodeoffset));
> + return;
> + }
> + fdt_appendprop_u32(blob, nodeoffset, "#address-cells", 2);

For adding the first value I guess it is preferable to use the fdt_set*
functions.

fdt_setprop_u32()

> + fdt_appendprop_u32(blob, nodeoffset, "#size-cells", 2);

fdt_setprop_u32()

> + fdt_appendprop(blob, nodeoffset, "ranges", NULL, 0);

fdt_setprop_empty()?

> +
> + sprintf(node, "ramoops@%llx", (unsigned long long)pstore_addr);
> + nodeoffset = fdt_add_subnode(blob, nodeoffset, node);
> + if (nodeoffset < 0) {
> + log_debug("Add '%s' node failed: %s\n", node, 
> fdt_strerror(nodeoffset));

Should this be log_err()?

> + return;
> + }
> + fdt_appendprop_string(blob, nodeoffset, "compatible", "ramoops");

fdt_setprop_string()

> + fdt_appendprop_u64(blob, nodeoffset, "reg", pstore_addr);

fdt_setprop_u64()

> + fdt_appendprop_u64(blob, nodeoffset, "reg", pstore_length);

This one is ok.

> + fdt_appendprop_u32(blob, nodeoffset, "record-size", pstore_record_size);

fdt_setprop_u32(), same below.

Best regards

Heinrich

> + fdt_appendprop_u32(blob, nodeoffset, "console-size", 
> pstore_console_size);
> + fdt_appendprop_u32(blob, nodeoffset, "ftrace-size", pstore_ftrace_size);
> + fdt_appendprop_u32(blob, nodeoffset, "pmsg-size", pstore_pmsg_size);
> + fdt_appendprop_u32(blob, nodeoffset, "ecc-size", pstore_ecc_size);
> +}
> +
>  U_BOOT_CMD(pstore, 10, 0, do_pstore,
>  "Manage Linux Persistent Storage",
>  "set   [record-size] [console-size] [ftrace-size] 
> [pmsg_size] [ecc-size]\n"
> diff --git a/common/image-fdt.c b/common/image-fdt.c
> index 3002948b6b..491d55ad1a 100644
> --- a/common/image-fdt.c
> +++ b/common/image-fdt.c
> @@ -547,6 +547,10 @@ int image_setup_libfdt(bootm_headers_t *images, void 
> *blob,
>   }
>   /* Update ethernet nodes */
>   fdt_fixup_ethernet(blob);
> +#if CONFIG_IS_ENABLED(CMD_PSTORE)
> + /* Append PStore configuration */
> + fdt_fixup_pstore(blob);
> +#endif
>   if (IMAGE_OF_BOARD_SETUP) {
>   fdt_ret = ft_board_setup(blob, gd->bd);
>   if (fdt_ret) {
> diff --git a/doc/pstore.rst b/doc/pstore.rst
> index 3ed2e9e0fd..3c84b8b172 100644
> --- a/doc/pstore.rst
> +++ b/doc/pstore.rst
> @@ -24,6 +24,8 @@ i.e.::
>
>  The same values should be set in U-Boot to be able to retrieve the records.
>  This values can be set at build time in U-Boot configuration file, or at 
> runtime.
> +U-Boot automatically patches the Device Tree to pass the Ramoops parameters 
> to
> +the kernel.
>
>  The PStore configuration parameters are:
>
> diff --git a/include/fdt_support.h b/include/fdt_support.h
> index ba14acd7f6..7afbdcfe37 100644
> --- a/include/fdt_support.h
> +++ b/include/fdt_support.h
> @@ -350,4 +350,7 @@ int fdt_update_ethernet_dt(void *blob);
>  #ifdef CONFIG_FSL_MC_ENET
>  void fdt_fixup_board_enet(void *blob);
>  #endif
> +#ifdef CONFIG_CMD_PSTORE
> +void fdt_fixup_pstore(void *blob);
> +#endif
>  #endif /* ifndef __FDT_SUPPORT_H */
>

[PATCH] cmd: ubi: add a command to rename volume

[Philippe Reynes]

This commit add the command ubi rename to rename an ubi volume.
The format of the command is: ubi rename  .

Signed-off-by: Philippe Reynes 
---
 cmd/ubi.c | 37 +
 1 file changed, 37 insertions(+)

diff --git a/cmd/ubi.c b/cmd/ubi.c
index cecf251..424f555 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -251,6 +251,39 @@ out_err:
return err;
 }
 
+static int ubi_rename_vol(char *oldname, char *newname)
+{
+   struct ubi_volume *vol;
+   struct ubi_rename_entry rename;
+   struct ubi_volume_desc desc;
+   struct list_head list;
+
+   vol = ubi_find_volume(oldname);
+   if (!vol) {
+   printf("%s: volume %s doesn't exist\n", __func__, oldname);
+   return ENODEV;
+   }
+
+   printf("Rename UBI volume %s to %s\n", oldname, newname);
+
+   if (ubi->ro_mode) {
+   printf("%s: ubi device is in read-only mode\n", __func__);
+   return EROFS;
+   }
+
+   rename.new_name_len = strlen(newname);
+   strcpy(rename.new_name, newname);
+   rename.remove = 0;
+   desc.vol = vol;
+   desc.mode = 0;
+   rename.desc = 
+   INIT_LIST_HEAD();
+   INIT_LIST_HEAD();
+   list_add(, );
+
+   return ubi_rename_volumes(ubi, );
+}
+
 static int ubi_volume_continue_write(char *volume, void *buf, size_t size)
 {
int err = 1;
@@ -604,6 +637,9 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return ubi_remove_vol(argv[2]);
}
 
+   if (strncmp(argv[1], "rename", 6) == 0)
+   return ubi_rename_vol(argv[2], argv[3]);
+
if (strncmp(argv[1], "skipcheck", 9) == 0) {
/* E.g., change skip_check flag */
if (argc == 4) {
@@ -693,6 +729,7 @@ U_BOOT_CMD(
"ubi remove[vol] volume"
" - Remove volume\n"
"ubi skipcheck volume on/off - Set or clear skip_check flag in volume 
header\n"
+   "ubi rename oldname newname\n"
"[Legends]\n"
" volume: character name\n"
" size: specified in bytes\n"
-- 
2.7.4

[PATCH v4 3/3] cmd: Fixup DT to pass PStore Ramoops parameters

[Frédéric Danis]

To simplify configuration and keep synchronized the PStore/Ramoops between
U-Boot and the Linux kernel, this commit dynamically adds the Ramoops
parameters defined in the U-Boot session to the Device Tree.

Signed-off-by: Frédéric Danis 
---
 cmd/pstore.c  | 38 ++
 common/image-fdt.c|  4 
 doc/pstore.rst|  2 ++
 include/fdt_support.h |  3 +++
 4 files changed, 47 insertions(+)

diff --git a/cmd/pstore.c b/cmd/pstore.c
index 4e4d70d604..6cad635620 100644
--- a/cmd/pstore.c
+++ b/cmd/pstore.c
@@ -479,6 +479,44 @@ static int do_pstore(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return c->cmd(cmdtp, flag, argc, argv);
 }
 
+void fdt_fixup_pstore(void *blob)
+{
+   char node[32];
+   int  nodeoffset;/* node offset from libfdt */
+
+   nodeoffset = fdt_path_offset(blob, "/");
+   if (nodeoffset < 0) {
+   /* Not found or something else bad happened. */
+   log_debug("fdt_path_offset() returned %s\n", 
fdt_strerror(nodeoffset));
+   return;
+   }
+
+   nodeoffset = fdt_add_subnode(blob, nodeoffset, "reserved-memory");
+   if (nodeoffset < 0) {
+   log_debug("Add 'reserved-memory' node failed: %s\n",
+   fdt_strerror(nodeoffset));
+   return;
+   }
+   fdt_appendprop_u32(blob, nodeoffset, "#address-cells", 2);
+   fdt_appendprop_u32(blob, nodeoffset, "#size-cells", 2);
+   fdt_appendprop(blob, nodeoffset, "ranges", NULL, 0);
+
+   sprintf(node, "ramoops@%llx", (unsigned long long)pstore_addr);
+   nodeoffset = fdt_add_subnode(blob, nodeoffset, node);
+   if (nodeoffset < 0) {
+   log_debug("Add '%s' node failed: %s\n", node, 
fdt_strerror(nodeoffset));
+   return;
+   }
+   fdt_appendprop_string(blob, nodeoffset, "compatible", "ramoops");
+   fdt_appendprop_u64(blob, nodeoffset, "reg", pstore_addr);
+   fdt_appendprop_u64(blob, nodeoffset, "reg", pstore_length);
+   fdt_appendprop_u32(blob, nodeoffset, "record-size", pstore_record_size);
+   fdt_appendprop_u32(blob, nodeoffset, "console-size", 
pstore_console_size);
+   fdt_appendprop_u32(blob, nodeoffset, "ftrace-size", pstore_ftrace_size);
+   fdt_appendprop_u32(blob, nodeoffset, "pmsg-size", pstore_pmsg_size);
+   fdt_appendprop_u32(blob, nodeoffset, "ecc-size", pstore_ecc_size);
+}
+
 U_BOOT_CMD(pstore, 10, 0, do_pstore,
   "Manage Linux Persistent Storage",
   "set   [record-size] [console-size] [ftrace-size] 
[pmsg_size] [ecc-size]\n"
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 3002948b6b..491d55ad1a 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -547,6 +547,10 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
}
/* Update ethernet nodes */
fdt_fixup_ethernet(blob);
+#if CONFIG_IS_ENABLED(CMD_PSTORE)
+   /* Append PStore configuration */
+   fdt_fixup_pstore(blob);
+#endif
if (IMAGE_OF_BOARD_SETUP) {
fdt_ret = ft_board_setup(blob, gd->bd);
if (fdt_ret) {
diff --git a/doc/pstore.rst b/doc/pstore.rst
index 90a8e1c2cb..0038249976 100644
--- a/doc/pstore.rst
+++ b/doc/pstore.rst
@@ -24,6 +24,8 @@ i.e.::
 
 The same values should be set in U-Boot to be able to retrieve the records.
 This values can be set at build time in U-Boot configuration file, or at 
runtime.
+U-Boot automatically patches the Device Tree to pass the Ramoops parameters to
+the kernel.
 
 The PStore configuration parameters are:
 
diff --git a/include/fdt_support.h b/include/fdt_support.h
index ba14acd7f6..7afbdcfe37 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -350,4 +350,7 @@ int fdt_update_ethernet_dt(void *blob);
 #ifdef CONFIG_FSL_MC_ENET
 void fdt_fixup_board_enet(void *blob);
 #endif
+#ifdef CONFIG_CMD_PSTORE
+void fdt_fixup_pstore(void *blob);
+#endif
 #endif /* ifndef __FDT_SUPPORT_H */
-- 
2.18.0

[PATCH v4 2/3] test: Add PStore command tests

[Frédéric Danis]

Add PStore command to sandbox and sandbox64 defconfigs.
Add test checking:
- 'pstore display' of all records
- 'pstore display' only the 2nd dump record
- 'pstore save' of all records

Signed-off-by: Frédéric Danis 
---
 configs/sandbox64_defconfig|   2 +
 configs/sandbox_defconfig  |   2 +
 test/py/tests/test_pstore.py   |  73 +
 test/py/tests/test_pstore_data_console.hex | Bin 0 -> 4096 bytes
 test/py/tests/test_pstore_data_panic1.hex  | Bin 0 -> 4096 bytes
 test/py/tests/test_pstore_data_panic2.hex  | Bin 0 -> 4096 bytes
 6 files changed, 77 insertions(+)
 create mode 100644 test/py/tests/test_pstore.py
 create mode 100644 test/py/tests/test_pstore_data_console.hex
 create mode 100644 test/py/tests/test_pstore_data_panic1.hex
 create mode 100644 test/py/tests/test_pstore_data_panic2.hex

diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 71a4d7fccb..f7b3544ae5 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -68,6 +68,8 @@ CONFIG_CMD_CBFS=y
 CONFIG_CMD_CRAMFS=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_PSTORE=y
+CONFIG_CMD_PSTORE_MEM_ADDR=0x300
 CONFIG_MAC_PARTITION=y
 CONFIG_AMIGA_PARTITION=y
 CONFIG_OF_CONTROL=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index f96891ecae..64b878abac 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -77,6 +77,8 @@ CONFIG_CMD_CBFS=y
 CONFIG_CMD_CRAMFS=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_PSTORE=y
+CONFIG_CMD_PSTORE_MEM_ADDR=0x300
 CONFIG_MAC_PARTITION=y
 CONFIG_AMIGA_PARTITION=y
 CONFIG_OF_CONTROL=y
diff --git a/test/py/tests/test_pstore.py b/test/py/tests/test_pstore.py
new file mode 100644
index 00..5c7e5cea74
--- /dev/null
+++ b/test/py/tests/test_pstore.py
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2020, Collabora
+# Author: Frédéric Danis 
+
+import pytest
+import u_boot_utils
+import tempfile
+import shutil
+
+PSTORE_ADDR=0x300
+PSTORE_LENGTH=0x10
+PSTORE_PANIC1='test/py/tests/test_pstore_data_panic1.hex'
+PSTORE_PANIC2='test/py/tests/test_pstore_data_panic2.hex'
+PSTORE_CONSOLE='test/py/tests/test_pstore_data_console.hex'
+ADDR=0x0108
+
+def load_pstore(u_boot_console):
+"""Load PStore records from sample files"""
+
+output = u_boot_console.run_command_list([
+'host load hostfs - 0x%x %s' % (PSTORE_ADDR, PSTORE_PANIC1),
+'host load hostfs - 0x%x %s' % (PSTORE_ADDR + 4096, PSTORE_PANIC2),
+'host load hostfs - 0x%x %s' % (PSTORE_ADDR + 253 * 4096, 
PSTORE_CONSOLE),
+'pstore set 0x%x 0x%x' % (PSTORE_ADDR, PSTORE_LENGTH)])
+
+def checkfile(u_boot_console, path, filesize, checksum):
+"""Check file against MD5 checksum"""
+
+output = u_boot_console.run_command_list([
+'load hostfs - %x %s' % (ADDR, path),
+'printenv filesize'])
+assert('filesize=%x' % (filesize) in ''.join(output))
+
+output = u_boot_console.run_command_list([
+'md5sum %x $filesize' % ADDR,
+'setenv filesize'])
+assert(checksum in ''.join(output))
+
+@pytest.mark.buildconfigspec('cmd_pstore')
+def test_pstore_display_all_records(u_boot_console):
+"""Test that pstore displays all records."""
+
+u_boot_console.run_command('')
+load_pstore(u_boot_console)
+response = u_boot_console.run_command('pstore display')
+assert(' Dump' in response)
+assert(' Console' in response)
+
+@pytest.mark.buildconfigspec('cmd_pstore')
+def test_pstore_display_one_record(u_boot_console):
+"""Test that pstore displays only one record."""
+
+u_boot_console.run_command('')
+load_pstore(u_boot_console)
+response = u_boot_console.run_command('pstore display dump 1')
+assert('Panic#2 Part1' in response)
+assert(' Console' not in response)
+
+@pytest.mark.buildconfigspec('cmd_pstore')
+def test_pstore_save_records(u_boot_console):
+"""Test that pstore saves all records."""
+
+outdir = tempfile.mkdtemp()
+
+u_boot_console.run_command('')
+load_pstore(u_boot_console)
+u_boot_console.run_command('pstore save hostfs - %s' % (outdir))
+
+checkfile(u_boot_console, '%s/dmesg-ramoops-0' % (outdir), 3798, 
'8059335ab4cfa62c77324c491659c503')
+checkfile(u_boot_console, '%s/dmesg-ramoops-1' % (outdir), 4035, 
'3ff30df3429d81939c75d0070b5187b9')
+checkfile(u_boot_console, '%s/console-ramoops-0' % (outdir), 4084, 
'bb44de4a9b8ebd9b17ae98003287325b')
+
+shutil.rmtree(outdir)
diff --git a/test/py/tests/test_pstore_data_console.hex 
b/test/py/tests/test_pstore_data_console.hex
new file mode 100644
index 
..e7f426e8928a2793457baced5f66ee165ef429f6
GIT binary patch
literal 4096
zcmcgv%TnVw6lJ!(nP0e*4NyZ8zvNd{7IX(_s%e@b&{Z=OMcI}D8f?ie*$MgY`GC1f
z?1ZL6Cktj4lpUjc?>YA&9Sz@~dDb&-IDxkz1{HH_2@lNt}`hF%c=vQY{D}JqApUVz+M^#mQS38q21kR=dA1k

[PATCH v4 1/3] cmd: Add command to display or save Linux PStore dumps

[Frédéric Danis]

This patch adds a new pstore command allowing to display or save ramoops
logs (oops, panic, console, ftrace and user) generated by a previous
kernel crash.
PStore parameters can be set in U-Boot configuration file, or at run-time
using "pstore set" command. Records size should be the same as the ones
used by kernel, and should be a power of 2.
This command allows:
- to display uncompressed logs
- to save compressed or uncompressed logs, compressed logs are saved as a
  compressed stream, it may need some work to be able to decompress it,
  e.g. adding a fake header:
  "printf "\x1f\x8b\x08\x00\x00\x00\x00\x00\x00\x00" |
  cat - dmesg-ramoops-0.enc.z | gzip -dc"
- ECC part is not used to check memory corruption
- only 1st FTrace log is displayed or saved

Signed-off-by: Frédéric Danis 
---
 cmd/Kconfig|  71 +++
 cmd/Makefile   |   1 +
 cmd/pstore.c   | 505 +
 doc/index.rst  |   7 +
 doc/pstore.rst |  74 
 5 files changed, 658 insertions(+)
 create mode 100644 cmd/pstore.c
 create mode 100644 doc/pstore.rst

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6403bc45a5..cd202bf7fb 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1736,6 +1736,77 @@ config CMD_QFW
  feature is to allow easy loading of files passed to qemu-system
  via -kernel / -initrd
 
+config CMD_PSTORE
+   bool "pstore"
+   help
+ This provides access to Linux PStore with Rammoops backend. The main
+ feature is to allow to display or save PStore records.
+
+ See doc/pstore.rst for more information.
+
+if CMD_PSTORE
+
+config CMD_PSTORE_MEM_ADDR
+   hex "Memory Address"
+   depends on CMD_PSTORE
+   help
+ Base addr used for PStore ramoops memory, should be identical to
+ ramoops.mem_address parameter used by kernel
+
+config CMD_PSTORE_MEM_SIZE
+   hex "Memory size"
+   depends on CMD_PSTORE
+   default "0x1"
+   help
+ Size of PStore ramoops memory, should be identical to ramoops.mem_size
+ parameter used by kernel, a power of 2 and larger than the sum of the
+ record sizes
+
+config CMD_PSTORE_RECORD_SIZE
+   hex "Dump record size"
+   depends on CMD_PSTORE
+   default "0x1000"
+   help
+ Size of each dump done on oops/panic, should be identical to
+ ramoops.record_size parameter used by kernel and a power of 2
+ Must be non-zero
+
+config CMD_PSTORE_CONSOLE_SIZE
+   hex "Kernel console log size"
+   depends on CMD_PSTORE
+   default "0x1000"
+   help
+ Size of kernel console log, should be identical to
+ ramoops.console_size parameter used by kernel and a power of 2
+ Must be non-zero
+
+config CMD_PSTORE_FTRACE_SIZE
+   hex "FTrace log size"
+   depends on CMD_PSTORE
+   default "0x1000"
+   help
+ Size of ftrace log, should be identical to ramoops.ftrace_size
+ parameter used by kernel and a power of 2
+
+config CMD_PSTORE_PMSG_SIZE
+   hex "User space message log size"
+   depends on CMD_PSTORE
+   default "0x1000"
+   help
+ Size of user space message log, should be identical to
+ ramoops.pmsg_size parameter used by kernel and a power of 2
+
+config CMD_PSTORE_ECC_SIZE
+   int "ECC size"
+   depends on CMD_PSTORE
+   default "0"
+   help
+   if non-zero, the option enables ECC support and specifies ECC buffer
+   size in bytes (1 is a special value, means 16 bytes ECC), should be
+   identical to ramoops.ramoops_ecc parameter used by kernel
+
+endif
+
 source "cmd/mvebu/Kconfig"
 
 config CMD_TERMINAL
diff --git a/cmd/Makefile b/cmd/Makefile
index f1dd513a4b..06d7ad7375 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -110,6 +110,7 @@ obj-$(CONFIG_CMD_PCI) += pci.o
 endif
 obj-$(CONFIG_CMD_PINMUX) += pinmux.o
 obj-$(CONFIG_CMD_PMC) += pmc.o
+obj-$(CONFIG_CMD_PSTORE) += pstore.o
 obj-$(CONFIG_CMD_PXE) += pxe.o pxe_utils.o
 obj-$(CONFIG_CMD_WOL) += wol.o
 obj-$(CONFIG_CMD_QFW) += qfw.o
diff --git a/cmd/pstore.c b/cmd/pstore.c
new file mode 100644
index 00..4e4d70d604
--- /dev/null
+++ b/cmd/pstore.c
@@ -0,0 +1,505 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright © 2019 Collabora Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct persistent_ram_buffer {
+   u32sig;
+   u32start;
+   u32size;
+   u8 data[0];
+};
+
+#define PERSISTENT_RAM_SIG (0x43474244) /* DBGC */
+#define RAMOOPS_KERNMSG_HDR ""
+
+#define PSTORE_TYPE_DMESG 0
+#define PSTORE_TYPE_CONSOLE 2
+#define PSTORE_TYPE_FTRACE 3
+#define PSTORE_TYPE_PMSG 7
+#define PSTORE_TYPE_ALL 255
+
+static phys_addr_t pstore_addr = CONFIG_CMD_PSTORE_MEM_ADDR;
+static phys_size_t pstore_length = CONFIG_CMD_PSTORE_MEM_SIZE;
+static unsigned int pstore_record_size = CONFIG_CMD_PSTORE_RECORD_SIZE;
+static unsigned int pstore_console_size = 

[PATCH v4 0/3] Add command to display or save Linux PStore dumps

[Frédéric Danis]

This serie of patches adds a new pstore command allowing to display or save
ramoops logs (oops, panic, console, ftrace and user) generated by a previous
kernel crash.
PStore parameters can be set in U-Boot configuration file, or at run-time
using "pstore set" command. For kernel using Device Tree, the parameters are
dynamically added to Device Tree.
Records size should be the same as the ones used by kernel, and should be a
power of 2.

Since v3:
- Fix PStore memory address in sandbox defconfig files for tests

Since v2:
- Add default value for PStore memory size
- Remove default value of PStore memory address
- Update config entry helps
- Replace calls to debug() by log_debug()
- Update documentation
- Replace 1M test file by 3 * 4K files and build pstore memory during test
- Add fdt_fixup_pstore() to pass PStore/Ramoops parameters to kernel

Since v1:
- Fix 64bit mode build warnings
- Add documentation
- Add function description comments
- Replace calls to pr_debug() by debug()
- Add CONFIG_CMD_PSTORE to sandbox and sandbox64
- Add unit tests

Frédéric Danis (3):
  cmd: Add command to display or save Linux PStore dumps
  test: Add PStore command tests
  cmd: Fixup DT to pass PStore Ramoops parameters

 cmd/Kconfig|  71 +++
 cmd/Makefile   |   1 +
 cmd/pstore.c   | 543 +
 common/image-fdt.c |   4 +
 configs/sandbox64_defconfig|   2 +
 configs/sandbox_defconfig  |   2 +
 doc/index.rst  |   7 +
 doc/pstore.rst |  76 +++
 include/fdt_support.h  |   3 +
 test/py/tests/test_pstore.py   |  73 +++
 test/py/tests/test_pstore_data_console.hex | Bin 0 -> 4096 bytes
 test/py/tests/test_pstore_data_panic1.hex  | Bin 0 -> 4096 bytes
 test/py/tests/test_pstore_data_panic2.hex  | Bin 0 -> 4096 bytes
 13 files changed, 782 insertions(+)
 create mode 100644 cmd/pstore.c
 create mode 100644 doc/pstore.rst
 create mode 100644 test/py/tests/test_pstore.py
 create mode 100644 test/py/tests/test_pstore_data_console.hex
 create mode 100644 test/py/tests/test_pstore_data_panic1.hex
 create mode 100644 test/py/tests/test_pstore_data_panic2.hex

-- 
2.18.0

Re: [PATCH v2 3/3] cmd: dm: Fixed/Added DM driver listing subcommands

[Sean Anderson]

On 3/19/20 12:13 PM, Niel Fourie wrote:
> Renamed dm "drivers" subcommand to "compat" (as it listed
> compatibility strings) and prevent it from segfaulting when
> drivers have no of_match populated.
> 
> Added a new "drivers" subcommand to dump a list of all known DM
> drivers and for each, their uclass id, uclass driver and names of
> attached devices.
> 
> Added a new "static" subcommand to dump a list of DM drivers with
> statically defined platform data.
> 
> Signed-off-by: Niel Fourie 
> CC: Simon Glass 
> CC: Sean Anderson 
> ---
> Depends on: https://patchwork.ozlabs.org/patch/1234460/
> 
> Changes in v2:
> - Add/extend Python tests
> - Fixed minor formatting/typographical errors
> 
>  cmd/dm.c | 22 +++-
>  drivers/core/dump.c  | 55 +++-
>  include/dm/util.h|  6 +
>  test/py/tests/test_dm.py | 22 ++--
>  4 files changed, 101 insertions(+), 4 deletions(-)
> 
> diff --git a/cmd/dm.c b/cmd/dm.c
> index 7a90685f8b..fa7eba6a17 100644
> --- a/cmd/dm.c
> +++ b/cmd/dm.c
> @@ -48,11 +48,29 @@ static int do_dm_dump_drivers(cmd_tbl_t *cmdtp, int flag, 
> int argc,
>   return 0;
>  }
>  
> +static int do_dm_dump_driver_compat(cmd_tbl_t *cmdtp, int flag, int argc,
> + char * const argv[])
> +{
> + dm_dump_driver_compat();
> +
> + return 0;
> +}
> +
> +static int do_dm_dump_static_driver_info(cmd_tbl_t *cmdtp, int flag, int 
> argc,
> +  char * const argv[])
> +{
> + dm_dump_static_driver_info();
> +
> + return 0;
> +}
> +
>  static cmd_tbl_t test_commands[] = {
>   U_BOOT_CMD_MKENT(tree, 0, 1, do_dm_dump_all, "", ""),
>   U_BOOT_CMD_MKENT(uclass, 1, 1, do_dm_dump_uclass, "", ""),
>   U_BOOT_CMD_MKENT(devres, 1, 1, do_dm_dump_devres, "", ""),
>   U_BOOT_CMD_MKENT(drivers, 1, 1, do_dm_dump_drivers, "", ""),
> + U_BOOT_CMD_MKENT(compat, 1, 1, do_dm_dump_driver_compat, "", ""),
> + U_BOOT_CMD_MKENT(static, 1, 1, do_dm_dump_static_driver_info, "", ""),
>  };
>  
>  static __maybe_unused void dm_reloc(void)
> @@ -94,5 +112,7 @@ U_BOOT_CMD(
>   "tree  Dump driver model tree ('*' = activated)\n"
>   "dm uclassDump list of instances for each uclass\n"
>   "dm devresDump list of device resources for each device\n"
> - "dm drivers   Dump list of drivers and their compatible strings"
> + "dm drivers   Dump list of drivers with uclass and instances\n"
> + "dm compatDump list of drivers with compatibility strings\n"
> + "dm staticDump list of drivers with static platform data"
>  );
> diff --git a/drivers/core/dump.c b/drivers/core/dump.c
> index b5046398d4..e96d59f861 100644
> --- a/drivers/core/dump.c
> +++ b/drivers/core/dump.c
> @@ -97,7 +97,7 @@ void dm_dump_uclass(void)
>   }
>  }
>  
> -void dm_dump_drivers(void)
> +void dm_dump_driver_compat(void)
>  {
>   struct driver *d = ll_entry_start(struct driver, driver);
>   const int n_ents = ll_entry_count(struct driver, driver);
> @@ -116,3 +116,56 @@ void dm_dump_drivers(void)
>   printf("%-20.20s\n", entry->name);
>   }
>  }
> +
> +void dm_dump_drivers(void)
> +{
> + struct driver *d = ll_entry_start(struct driver, driver);
> + const int n_ents = ll_entry_count(struct driver, driver);
> + struct driver *entry;
> + struct udevice *udev;
> + struct uclass *uc;
> + int i;
> +
> + puts("Driveruid uclass   Devices\n");
> + puts("--\n");
> +
> + for (entry = d; entry < d + n_ents; entry++) {
> + uclass_get(entry->id, );
> +
> + printf("%-25.25s %-3.3d %-20.20s ", entry->name, entry->id,
> +uc ? uc->uc_drv->name : "");
> +
> + if (!uc) {
> + puts("\n");
> + continue;
> + }
> +
> + i = 0;
> + uclass_foreach_dev(udev, uc) {
> + if (udev->driver != entry)
> + continue;
> + if (i)
> + printf("%-51.51s", "");
> +
> + printf("%-25.25s\n", udev->name);
> + i++;
> + }
> + if (!i)
> + puts("\n");
> + }
> +}
> +
> +void dm_dump_static_driver_info(void)
> +{
> + struct driver_info *drv = ll_entry_start(struct driver_info,
> +  driver_info);
> + const int n_ents = ll_entry_count(struct driver_info, driver_info);
> + struct driver_info *entry;
> +
> + puts("DriverAddress\n");
> + puts("-\n");
> + for (entry = drv; entry != drv + n_ents; entry++) {
> + printf("%-25.25s @%08lx\n", entry->name,
> +

[PATCH v3 3/3] cmd: Fixup DT to pass PStore Ramoops parameters

[Frédéric Danis]

To simplify configuration and keep synchronized the PStore/Ramoops between
U-Boot and the Linux kernel, this commit dynamically adds the Ramoops
parameters defined in the U-Boot session to the Device Tree.

Signed-off-by: Frédéric Danis 
---
 cmd/pstore.c  | 38 ++
 common/image-fdt.c|  4 
 doc/pstore.rst|  2 ++
 include/fdt_support.h |  3 +++
 4 files changed, 47 insertions(+)

diff --git a/cmd/pstore.c b/cmd/pstore.c
index 4e4d70d604..6cad635620 100644
--- a/cmd/pstore.c
+++ b/cmd/pstore.c
@@ -479,6 +479,44 @@ static int do_pstore(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return c->cmd(cmdtp, flag, argc, argv);
 }
 
+void fdt_fixup_pstore(void *blob)
+{
+   char node[32];
+   int  nodeoffset;/* node offset from libfdt */
+
+   nodeoffset = fdt_path_offset(blob, "/");
+   if (nodeoffset < 0) {
+   /* Not found or something else bad happened. */
+   log_debug("fdt_path_offset() returned %s\n", 
fdt_strerror(nodeoffset));
+   return;
+   }
+
+   nodeoffset = fdt_add_subnode(blob, nodeoffset, "reserved-memory");
+   if (nodeoffset < 0) {
+   log_debug("Add 'reserved-memory' node failed: %s\n",
+   fdt_strerror(nodeoffset));
+   return;
+   }
+   fdt_appendprop_u32(blob, nodeoffset, "#address-cells", 2);
+   fdt_appendprop_u32(blob, nodeoffset, "#size-cells", 2);
+   fdt_appendprop(blob, nodeoffset, "ranges", NULL, 0);
+
+   sprintf(node, "ramoops@%llx", (unsigned long long)pstore_addr);
+   nodeoffset = fdt_add_subnode(blob, nodeoffset, node);
+   if (nodeoffset < 0) {
+   log_debug("Add '%s' node failed: %s\n", node, 
fdt_strerror(nodeoffset));
+   return;
+   }
+   fdt_appendprop_string(blob, nodeoffset, "compatible", "ramoops");
+   fdt_appendprop_u64(blob, nodeoffset, "reg", pstore_addr);
+   fdt_appendprop_u64(blob, nodeoffset, "reg", pstore_length);
+   fdt_appendprop_u32(blob, nodeoffset, "record-size", pstore_record_size);
+   fdt_appendprop_u32(blob, nodeoffset, "console-size", 
pstore_console_size);
+   fdt_appendprop_u32(blob, nodeoffset, "ftrace-size", pstore_ftrace_size);
+   fdt_appendprop_u32(blob, nodeoffset, "pmsg-size", pstore_pmsg_size);
+   fdt_appendprop_u32(blob, nodeoffset, "ecc-size", pstore_ecc_size);
+}
+
 U_BOOT_CMD(pstore, 10, 0, do_pstore,
   "Manage Linux Persistent Storage",
   "set   [record-size] [console-size] [ftrace-size] 
[pmsg_size] [ecc-size]\n"
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 3002948b6b..491d55ad1a 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -547,6 +547,10 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
}
/* Update ethernet nodes */
fdt_fixup_ethernet(blob);
+#if CONFIG_IS_ENABLED(CMD_PSTORE)
+   /* Append PStore configuration */
+   fdt_fixup_pstore(blob);
+#endif
if (IMAGE_OF_BOARD_SETUP) {
fdt_ret = ft_board_setup(blob, gd->bd);
if (fdt_ret) {
diff --git a/doc/pstore.rst b/doc/pstore.rst
index 3ed2e9e0fd..3c84b8b172 100644
--- a/doc/pstore.rst
+++ b/doc/pstore.rst
@@ -24,6 +24,8 @@ i.e.::
 
 The same values should be set in U-Boot to be able to retrieve the records.
 This values can be set at build time in U-Boot configuration file, or at 
runtime.
+U-Boot automatically patches the Device Tree to pass the Ramoops parameters to
+the kernel.
 
 The PStore configuration parameters are:
 
diff --git a/include/fdt_support.h b/include/fdt_support.h
index ba14acd7f6..7afbdcfe37 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -350,4 +350,7 @@ int fdt_update_ethernet_dt(void *blob);
 #ifdef CONFIG_FSL_MC_ENET
 void fdt_fixup_board_enet(void *blob);
 #endif
+#ifdef CONFIG_CMD_PSTORE
+void fdt_fixup_pstore(void *blob);
+#endif
 #endif /* ifndef __FDT_SUPPORT_H */
-- 
2.18.0

[PATCH v3 2/3] test: Add PStore command tests

[Frédéric Danis]

Add PStore command to sandbox and sandbox64 defconfigs.
Add test checking:
- 'pstore display' of all records
- 'pstore display' only the 2nd dump record
- 'pstore save' of all records

Signed-off-by: Frédéric Danis 
---
 configs/sandbox64_defconfig|   1 +
 configs/sandbox_defconfig  |   1 +
 test/py/tests/test_pstore.py   |  73 +
 test/py/tests/test_pstore_data_console.hex | Bin 0 -> 4096 bytes
 test/py/tests/test_pstore_data_panic1.hex  | Bin 0 -> 4096 bytes
 test/py/tests/test_pstore_data_panic2.hex  | Bin 0 -> 4096 bytes
 6 files changed, 75 insertions(+)
 create mode 100644 test/py/tests/test_pstore.py
 create mode 100644 test/py/tests/test_pstore_data_console.hex
 create mode 100644 test/py/tests/test_pstore_data_panic1.hex
 create mode 100644 test/py/tests/test_pstore_data_panic2.hex

diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 71a4d7fccb..c36cac1ffc 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -68,6 +68,7 @@ CONFIG_CMD_CBFS=y
 CONFIG_CMD_CRAMFS=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_PSTORE=y
 CONFIG_MAC_PARTITION=y
 CONFIG_AMIGA_PARTITION=y
 CONFIG_OF_CONTROL=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index f96891ecae..155190a3d3 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -77,6 +77,7 @@ CONFIG_CMD_CBFS=y
 CONFIG_CMD_CRAMFS=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_PSTORE=y
 CONFIG_MAC_PARTITION=y
 CONFIG_AMIGA_PARTITION=y
 CONFIG_OF_CONTROL=y
diff --git a/test/py/tests/test_pstore.py b/test/py/tests/test_pstore.py
new file mode 100644
index 00..5c7e5cea74
--- /dev/null
+++ b/test/py/tests/test_pstore.py
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2020, Collabora
+# Author: Frédéric Danis 
+
+import pytest
+import u_boot_utils
+import tempfile
+import shutil
+
+PSTORE_ADDR=0x300
+PSTORE_LENGTH=0x10
+PSTORE_PANIC1='test/py/tests/test_pstore_data_panic1.hex'
+PSTORE_PANIC2='test/py/tests/test_pstore_data_panic2.hex'
+PSTORE_CONSOLE='test/py/tests/test_pstore_data_console.hex'
+ADDR=0x0108
+
+def load_pstore(u_boot_console):
+"""Load PStore records from sample files"""
+
+output = u_boot_console.run_command_list([
+'host load hostfs - 0x%x %s' % (PSTORE_ADDR, PSTORE_PANIC1),
+'host load hostfs - 0x%x %s' % (PSTORE_ADDR + 4096, PSTORE_PANIC2),
+'host load hostfs - 0x%x %s' % (PSTORE_ADDR + 253 * 4096, 
PSTORE_CONSOLE),
+'pstore set 0x%x 0x%x' % (PSTORE_ADDR, PSTORE_LENGTH)])
+
+def checkfile(u_boot_console, path, filesize, checksum):
+"""Check file against MD5 checksum"""
+
+output = u_boot_console.run_command_list([
+'load hostfs - %x %s' % (ADDR, path),
+'printenv filesize'])
+assert('filesize=%x' % (filesize) in ''.join(output))
+
+output = u_boot_console.run_command_list([
+'md5sum %x $filesize' % ADDR,
+'setenv filesize'])
+assert(checksum in ''.join(output))
+
+@pytest.mark.buildconfigspec('cmd_pstore')
+def test_pstore_display_all_records(u_boot_console):
+"""Test that pstore displays all records."""
+
+u_boot_console.run_command('')
+load_pstore(u_boot_console)
+response = u_boot_console.run_command('pstore display')
+assert(' Dump' in response)
+assert(' Console' in response)
+
+@pytest.mark.buildconfigspec('cmd_pstore')
+def test_pstore_display_one_record(u_boot_console):
+"""Test that pstore displays only one record."""
+
+u_boot_console.run_command('')
+load_pstore(u_boot_console)
+response = u_boot_console.run_command('pstore display dump 1')
+assert('Panic#2 Part1' in response)
+assert(' Console' not in response)
+
+@pytest.mark.buildconfigspec('cmd_pstore')
+def test_pstore_save_records(u_boot_console):
+"""Test that pstore saves all records."""
+
+outdir = tempfile.mkdtemp()
+
+u_boot_console.run_command('')
+load_pstore(u_boot_console)
+u_boot_console.run_command('pstore save hostfs - %s' % (outdir))
+
+checkfile(u_boot_console, '%s/dmesg-ramoops-0' % (outdir), 3798, 
'8059335ab4cfa62c77324c491659c503')
+checkfile(u_boot_console, '%s/dmesg-ramoops-1' % (outdir), 4035, 
'3ff30df3429d81939c75d0070b5187b9')
+checkfile(u_boot_console, '%s/console-ramoops-0' % (outdir), 4084, 
'bb44de4a9b8ebd9b17ae98003287325b')
+
+shutil.rmtree(outdir)
diff --git a/test/py/tests/test_pstore_data_console.hex 
b/test/py/tests/test_pstore_data_console.hex
new file mode 100644
index 
..e7f426e8928a2793457baced5f66ee165ef429f6
GIT binary patch
literal 4096
zcmcgv%TnVw6lJ!(nP0e*4NyZ8zvNd{7IX(_s%e@b&{Z=OMcI}D8f?ie*$MgY`GC1f
z?1ZL6Cktj4lpUjc?>YA&9Sz@~dDb&-IDxkz1{HH_2@lNt}`hF%c=vQY{D}JqApUVz+M^#mQS38q21kR=dA1k
z656*dwDxHrn#gIb!N!=1-E&>xgDwrjz_Af2FP@z4lvdzaX=YhgZ%XBT48sLX{ZLm_

[PATCH v3 1/3] cmd: Add command to display or save Linux PStore dumps

[Frédéric Danis]

This patch adds a new pstore command allowing to display or save ramoops
logs (oops, panic, console, ftrace and user) generated by a previous
kernel crash.
PStore parameters can be set in U-Boot configuration file, or at run-time
using "pstore set" command. Records size should be the same as the ones
used by kernel, and should be a power of 2.
This command allows:
- to display uncompressed logs
- to save compressed or uncompressed logs, compressed logs are saved as a
  compressed stream, it may need some work to be able to decompress it,
  e.g. adding a fake header:
  "printf "\x1f\x8b\x08\x00\x00\x00\x00\x00\x00\x00" |
  cat - dmesg-ramoops-0.enc.z | gzip -dc"
- ECC part is not used to check memory corruption
- only 1st FTrace log is displayed or saved

Signed-off-by: Frédéric Danis 
---
 cmd/Kconfig|  71 +++
 cmd/Makefile   |   1 +
 cmd/pstore.c   | 505 +
 doc/index.rst  |   7 +
 doc/pstore.rst |  74 
 5 files changed, 658 insertions(+)
 create mode 100644 cmd/pstore.c
 create mode 100644 doc/pstore.rst

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6403bc45a5..cd202bf7fb 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1736,6 +1736,77 @@ config CMD_QFW
  feature is to allow easy loading of files passed to qemu-system
  via -kernel / -initrd
 
+config CMD_PSTORE
+   bool "pstore"
+   help
+ This provides access to Linux PStore with Rammoops backend. The main
+ feature is to allow to display or save PStore records.
+
+ See doc/pstore.rst for more information.
+
+if CMD_PSTORE
+
+config CMD_PSTORE_MEM_ADDR
+   hex "Memory Address"
+   depends on CMD_PSTORE
+   help
+ Base addr used for PStore ramoops memory, should be identical to
+ ramoops.mem_address parameter used by kernel
+
+config CMD_PSTORE_MEM_SIZE
+   hex "Memory size"
+   depends on CMD_PSTORE
+   default "0x1"
+   help
+ Size of PStore ramoops memory, should be identical to ramoops.mem_size
+ parameter used by kernel, a power of 2 and larger than the sum of the
+ record sizes
+
+config CMD_PSTORE_RECORD_SIZE
+   hex "Dump record size"
+   depends on CMD_PSTORE
+   default "0x1000"
+   help
+ Size of each dump done on oops/panic, should be identical to
+ ramoops.record_size parameter used by kernel and a power of 2
+ Must be non-zero
+
+config CMD_PSTORE_CONSOLE_SIZE
+   hex "Kernel console log size"
+   depends on CMD_PSTORE
+   default "0x1000"
+   help
+ Size of kernel console log, should be identical to
+ ramoops.console_size parameter used by kernel and a power of 2
+ Must be non-zero
+
+config CMD_PSTORE_FTRACE_SIZE
+   hex "FTrace log size"
+   depends on CMD_PSTORE
+   default "0x1000"
+   help
+ Size of ftrace log, should be identical to ramoops.ftrace_size
+ parameter used by kernel and a power of 2
+
+config CMD_PSTORE_PMSG_SIZE
+   hex "User space message log size"
+   depends on CMD_PSTORE
+   default "0x1000"
+   help
+ Size of user space message log, should be identical to
+ ramoops.pmsg_size parameter used by kernel and a power of 2
+
+config CMD_PSTORE_ECC_SIZE
+   int "ECC size"
+   depends on CMD_PSTORE
+   default "0"
+   help
+   if non-zero, the option enables ECC support and specifies ECC buffer
+   size in bytes (1 is a special value, means 16 bytes ECC), should be
+   identical to ramoops.ramoops_ecc parameter used by kernel
+
+endif
+
 source "cmd/mvebu/Kconfig"
 
 config CMD_TERMINAL
diff --git a/cmd/Makefile b/cmd/Makefile
index f1dd513a4b..06d7ad7375 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -110,6 +110,7 @@ obj-$(CONFIG_CMD_PCI) += pci.o
 endif
 obj-$(CONFIG_CMD_PINMUX) += pinmux.o
 obj-$(CONFIG_CMD_PMC) += pmc.o
+obj-$(CONFIG_CMD_PSTORE) += pstore.o
 obj-$(CONFIG_CMD_PXE) += pxe.o pxe_utils.o
 obj-$(CONFIG_CMD_WOL) += wol.o
 obj-$(CONFIG_CMD_QFW) += qfw.o
diff --git a/cmd/pstore.c b/cmd/pstore.c
new file mode 100644
index 00..4e4d70d604
--- /dev/null
+++ b/cmd/pstore.c
@@ -0,0 +1,505 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright © 2019 Collabora Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct persistent_ram_buffer {
+   u32sig;
+   u32start;
+   u32size;
+   u8 data[0];
+};
+
+#define PERSISTENT_RAM_SIG (0x43474244) /* DBGC */
+#define RAMOOPS_KERNMSG_HDR ""
+
+#define PSTORE_TYPE_DMESG 0
+#define PSTORE_TYPE_CONSOLE 2
+#define PSTORE_TYPE_FTRACE 3
+#define PSTORE_TYPE_PMSG 7
+#define PSTORE_TYPE_ALL 255
+
+static phys_addr_t pstore_addr = CONFIG_CMD_PSTORE_MEM_ADDR;
+static phys_size_t pstore_length = CONFIG_CMD_PSTORE_MEM_SIZE;
+static unsigned int pstore_record_size = CONFIG_CMD_PSTORE_RECORD_SIZE;
+static unsigned int pstore_console_size = 

[PATCH v3 0/3] Add command to display or save Linux PStore dumps

[Frédéric Danis]

This serie of patches adds a new pstore command allowing to display or save
ramoops logs (oops, panic, console, ftrace and user) generated by a previous
kernel crash.
PStore parameters can be set in U-Boot configuration file, or at run-time
using "pstore set" command. For kernel using Device Tree, the parameters are
dynamically added to Device Tree.
Records size should be the same as the ones used by kernel, and should be a
power of 2.

Since v2:
- Add default value for PStore memory size
- Remove default value of PStore memory address
- Update config entry helps
- Replace calls to debug() by log_debug()
- Update documentation
- Replace 1M test file by 3 * 4K files and build pstore memory during test
- Add fdt_fixup_pstore() to pass PStore/Ramoops parameters to kernel

Since v1:
- Fix 64bit mode build warnings
- Add documentation
- Add function description comments
- Replace calls to pr_debug() by debug()
- Add CONFIG_CMD_PSTORE to sandbox and sandbox64
- Add unit tests

Frédéric Danis (3):
  cmd: Add command to display or save Linux PStore dumps
  test: Add PStore command tests
  cmd: Fixup DT to pass PStore Ramoops parameters

 cmd/Kconfig|  71 +++
 cmd/Makefile   |   1 +
 cmd/pstore.c   | 543 +
 common/image-fdt.c |   4 +
 configs/sandbox64_defconfig|   1 +
 configs/sandbox_defconfig  |   1 +
 doc/index.rst  |   7 +
 doc/pstore.rst |  76 +++
 include/fdt_support.h  |   3 +
 test/py/tests/test_pstore.py   |  73 +++
 test/py/tests/test_pstore_data_console.hex | Bin 0 -> 4096 bytes
 test/py/tests/test_pstore_data_panic1.hex  | Bin 0 -> 4096 bytes
 test/py/tests/test_pstore_data_panic2.hex  | Bin 0 -> 4096 bytes
 13 files changed, 780 insertions(+)
 create mode 100644 cmd/pstore.c
 create mode 100644 doc/pstore.rst
 create mode 100644 test/py/tests/test_pstore.py
 create mode 100644 test/py/tests/test_pstore_data_console.hex
 create mode 100644 test/py/tests/test_pstore_data_panic1.hex
 create mode 100644 test/py/tests/test_pstore_data_panic2.hex

-- 
2.18.0

RE: [RFC PATCH v2] cmd: mp: change the command name from cpu to mp

[Pragnesh Patel]

Hi Simon,

>-Original Message-
>From: Simon Glass 
>Sent: 19 March 2020 21:48
>To: Pragnesh Patel 
>Cc: U-Boot Mailing List ; Atish Patra
>; Palmer Dabbelt ; Bin
>Meng ; Paul Walmsley ;
>rick 
>Subject: Re: [RFC PATCH v2] cmd: mp: change the command name from cpu to
>mp
>
>Hi Pragnesh,
>
>On Sat, 14 Mar 2020 at 08:50, Pragnesh Patel 
>wrote:
>>
>> When CONFIG_CMD_CPU and CONFIG_MP both are enabled, U-Boot
>compilation
>> gives an error of "multiple definition of `_u_boot_list_2_cmd_2_cpu'"
>> so cpu command(cmd/cpu.c) and mp command(cmd/mp.c) should have
>> different command name.
>>
>> Signed-off-by: Pragnesh Patel 
>> ---
>>  cmd/mp.c | 18 +-
>>  1 file changed, 9 insertions(+), 9 deletions(-)
>
>Please can you instead port this code over to use the CPU uclass?

Sure, will port it.

>
>Regards,
>Simon

[PATCH 1/1] efi_loader: description of efi_variable.c

[Heinrich Schuchardt]

Correct the file description.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_variable.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index c316bdfec0..99d2f01f57 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -1,8 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- *  EFI utils
+ * UEFI runtime variable services
  *
- *  Copyright (c) 2017 Rob Clark
+ * Copyright (c) 2017 Rob Clark
  */

 #include 
--
2.20.1

Re: [RFC 06/14] efi_loader: capsule: add capsule_on_disk support

[Heinrich Schuchardt]

On 3/18/20 9:55 AM, Heinrich Schuchardt wrote:
> On 3/17/20 3:12 AM, AKASHI Takahiro wrote:
>> Capsule data can be loaded into the system either via UpdateCapsule
>> runtime service or files on a file system (of boot device).
>> The latter case is called "capsules on disk", and actual updates will
>> take place at the next boot time.
>>
>> In this commit, we will support capsule on disk mechanism.
>>
>> Please note that U-Boot itself has no notion of "boot device" and
>> all the capsule files to be executed will be identified only if they
>> are located in a specific directory on a device that is determined
>> by "Boot" variables.
> 
> We have efi_set_bootdev() defining the boot device. So why do you refer
> to Boot?
> 
> Please, add Sphinx style comments to the functions describing
> functionality and parameters.
> 
>>
>> Signed-off-by: AKASHI Takahiro 
>> ---
>>   include/efi_loader.h  |  18 ++
>>   lib/efi_loader/Kconfig    |   7 +
>>   lib/efi_loader/efi_boottime.c |   3 +
>>   lib/efi_loader/efi_capsule.c  | 548 ++
>>   lib/efi_loader/efi_setup.c    |   6 +
>>   5 files changed, 582 insertions(+)
>>
>> diff --git a/include/efi_loader.h b/include/efi_loader.h
>> index c3cb7735bf50..c701672e18db 100644
>> --- a/include/efi_loader.h
>> +++ b/include/efi_loader.h
>> @@ -178,6 +178,8 @@ extern const efi_guid_t
>> efi_guid_hii_config_routing_protocol;
>>   extern const efi_guid_t efi_guid_hii_config_access_protocol;
>>   extern const efi_guid_t efi_guid_hii_database_protocol;
>>   extern const efi_guid_t efi_guid_hii_string_protocol;
>> +/* GUID of capsule update result */
>> +extern const efi_guid_t efi_guid_capsule_report;
>>
>>   /* GUID of RNG protocol */
>>   extern const efi_guid_t efi_guid_rng_protocol;
>> @@ -690,6 +692,22 @@ efi_status_t EFIAPI efi_query_capsule_caps(
>>   u64 *maximum_capsule_size,
>>   u32 *reset_type);
>>
>> +#ifdef CONFIG_EFI_CAPSULE_ON_DISK
>> +#define EFI_CAPSULE_DIR L"\\EFI\\UpdateCapsule\\"
>> +
>> +/* Hook at initialization */
>> +efi_status_t efi_launch_capsules(void);
>> +/* Notify ExitBootServices() is called */
>> +void efi_capsule_boot_exit_notify(void);
>> +#else
>> +static inline efi_status_t efi_launch_capsules(void)
>> +{
>> +    return EFI_SUCCESS;
>> +}
>> +
>> +static inline efi_capsule_boot_exit_notify(void) {}
>> +#endif /* CONFIG_EFI_CAPSULE_ON_DISK */
>> +
>>   #else /* CONFIG_IS_ENABLED(EFI_LOADER) */
>>
>>   /* Without CONFIG_EFI_LOADER we don't have a runtime section, stub
>> it out */
>> diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
>> index 2ef6cb124f3a..95e10f7d981b 100644
>> --- a/lib/efi_loader/Kconfig
>> +++ b/lib/efi_loader/Kconfig
>> @@ -97,6 +97,13 @@ config EFI_CAPSULE_UPDATE
>>     Select this option if you want to use capsule update feature,
>>     including firmware updates and variable updates.
>>
>> +config EFI_CAPSULE_ON_DISK
>> +    bool "Enable capsule-on-disk support"
>> +    depends on EFI_CAPSULE_UPDATE
>> +    default n
>> +    help
>> +  Select this option if you want to use capsule-on-disk feature.
>> +
>>   config EFI_LOADER_BOUNCE_BUFFER
>>   bool "EFI Applications use bounce buffers for DMA operations"
>>   depends on ARM64
>> diff --git a/lib/efi_loader/efi_boottime.c
>> b/lib/efi_loader/efi_boottime.c
>> index 9860d5047502..c2a789b4f910 100644
>> --- a/lib/efi_loader/efi_boottime.c
>> +++ b/lib/efi_loader/efi_boottime.c
>> @@ -1981,6 +1981,9 @@ static efi_status_t EFIAPI
>> efi_exit_boot_services(efi_handle_t image_handle,
>>   /* Notify variable services */
>>   efi_variables_boot_exit_notify();
>>
>> +    /* Notify capsule services */
>> +    efi_capsule_boot_exit_notify();
>> +
>>   /* Remove all events except EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE */
>>   list_for_each_entry_safe(evt, next_event, _events, link) {
>>   if (evt->type != EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE)
>> diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
>> index d3f931910d10..f3e2a555a6b9 100644
>> --- a/lib/efi_loader/efi_capsule.c
>> +++ b/lib/efi_loader/efi_capsule.c
>> @@ -10,8 +10,14 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>
>> +const efi_guid_t efi_guid_capsule_report = EFI_CAPSULE_REPORT_GUID;
>> +
>> +/* for file system access */
>> +static struct efi_file_handle *bootdev_root;
>> +
>>   /*
>>    * Launch a capsule
>>    */
>> @@ -96,3 +102,545 @@ efi_status_t EFIAPI efi_query_capsule_caps(
>>   out:
>>   return EFI_EXIT(ret);
>>   }
>> +
>> +#ifdef CONFIG_EFI_CAPSULE_ON_DISK
>> +static void efi_capsule_result_variable(int num,
>> +    struct efi_capsule_header *capsule,
>> +    efi_status_t return_status)
>> +{
>> +    char variable_name[12];
>> +    u16 variable_name16[12], *p;
>> +    struct efi_capsule_result_variable_header result;
>> +    struct efi_time time;
>> +    efi_status_t ret;
>> +
>> +    sprintf(variable_name, 

[PATCH 2/2] efi_loader: identify EFI system partition

[Heinrich Schuchardt]

For capsule updates we need to identify the EFI system partition.

Signed-off-by: Heinrich Schuchardt 
---
 include/efi_loader.h  |  7 +++
 lib/efi_loader/efi_disk.c | 20 
 2 files changed, 27 insertions(+)

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 37c3f15da1..536ef84cb5 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -45,6 +45,13 @@ static inline void *guidcpy(void *dst, const void *src)
 /* Root node */
 extern efi_handle_t efi_root;

+/* EFI system partition */
+extern struct efi_system_partition {
+   enum if_type if_type;
+   int devnum;
+   u8 part;
+} efi_system_partition;
+
 int __efi_entry_check(void);
 int __efi_exit_check(void);
 const char *__efi_nesting(void);
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index fc0682bc48..2f752a5e99 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -13,6 +13,8 @@
 #include 
 #include 

+struct efi_system_partition efi_system_partition;
+
 const efi_guid_t efi_block_io_guid = EFI_BLOCK_IO_PROTOCOL_GUID;

 /**
@@ -372,6 +374,24 @@ static efi_status_t efi_disk_add_dev(
diskobj->ops.media = >media;
if (disk)
*disk = diskobj;
+
+   /* Store first EFI system partition */
+   if (part && !efi_system_partition.if_type) {
+   int r;
+   disk_partition_t info;
+
+   r = part_get_info(desc, part, );
+   if (r)
+   return EFI_DEVICE_ERROR;
+   if (info.bootable & PART_EFI_SYSTEM_PARTITION) {
+   efi_system_partition.if_type = desc->if_type;
+   efi_system_partition.devnum = desc->devnum;
+   efi_system_partition.part = part;
+   EFI_PRINT("EFI system partition: %s %d:%d\n",
+ blk_get_if_type_name(desc->if_type),
+ desc->devnum, part);
+   }
+   }
return EFI_SUCCESS;
 }

--
2.20.1

[PATCH 1/2] part: detect EFI system partition

[Heinrich Schuchardt]

Up to now for MBR and GPT partitions the info field 'bootable' was set to 1
if either the partition was an EFI system partition or the bootable flag
was set.

Turn info field 'bootable' into a bit mask with separate bits for bootable
and EFI system partition.

This will allow us to identify the EFI system partition in the UEFI
sub-system.

Signed-off-by: Heinrich Schuchardt 
---
 disk/part_dos.c | 10 --
 disk/part_efi.c | 12 
 include/part.h  | 11 ++-
 3 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/disk/part_dos.c b/disk/part_dos.c
index 83ff40d310..0ec7f1628e 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -45,9 +45,15 @@ static inline int is_extended(int part_type)
part_type == 0x85);
 }

-static inline int is_bootable(dos_partition_t *p)
+static int is_bootable(dos_partition_t *p)
 {
-   return (p->sys_ind == 0xef) || (p->boot_ind == 0x80);
+   int ret = 0;
+
+   if (p->sys_ind == 0xef)
+   ret |= PART_EFI_SYSTEM_PARTITION;
+   if (p->boot_ind == 0x80)
+   ret |= PART_BOOTABLE;
+   return ret;
 }

 static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector,
diff --git a/disk/part_efi.c b/disk/part_efi.c
index b2e157d9c1..19f1f43f4e 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -71,11 +71,15 @@ static char *print_efiname(gpt_entry *pte)

 static const efi_guid_t system_guid = PARTITION_SYSTEM_GUID;

-static inline int is_bootable(gpt_entry *p)
+static int is_bootable(gpt_entry *p)
 {
-   return p->attributes.fields.legacy_bios_bootable ||
-   !memcmp(&(p->partition_type_guid), _guid,
-   sizeof(efi_guid_t));
+   int ret = 0;
+
+   if (!memcmp(>partition_type_guid, _guid, sizeof(efi_guid_t)))
+   ret |=  PART_EFI_SYSTEM_PARTITION;
+   if (p->attributes.fields.legacy_bios_bootable)
+   ret |=  PART_BOOTABLE;
+   return ret;
 }

 static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
diff --git a/include/part.h b/include/part.h
index 0b5cf3d5e8..a63d1d0cda 100644
--- a/include/part.h
+++ b/include/part.h
@@ -51,13 +51,22 @@ struct block_drvr {
 #define PART_TYPE_LEN 32
 #define MAX_SEARCH_PARTITIONS 64

+#define PART_BOOTABLE  1
+#define PART_EFI_SYSTEM_PARTITION  2
+
 typedef struct disk_partition {
lbaint_tstart;  /* # of first block in partition*/
lbaint_tsize;   /* number of blocks in partition*/
ulong   blksz;  /* block size in bytes  */
uchar   name[PART_NAME_LEN];/* partition name   
*/
uchar   type[PART_TYPE_LEN];/* string type description  
*/
-   int bootable;   /* Active/Bootable flag is set  */
+   /*
+* The bootable is a bitmask with the following fields:
+*
+* PART_BOOTABLEthe MBR bootable flag is set
+* PART_EFI_SYSTEM_PARTITIONthe partition is an EFI system partition
+*/
+   int bootable;
 #if CONFIG_IS_ENABLED(PARTITION_UUIDS)
charuuid[UUID_STR_LEN + 1]; /* filesystem UUID as string, if exists 
*/
 #endif
--
2.20.1

[PATCH 0/2] efi_loader: detect EFI system partition

[Heinrich Schuchardt]

For the implementation of capsule updates we need to know where the EFI
system partition is located.

With the patches the first available EFI system partition is determined
both for MBR and GPT partition tables.

Heinrich Schuchardt (2):
  part: detect EFI system partition
  efi_loader: identify EFI system partition

 disk/part_dos.c   | 10 --
 disk/part_efi.c   | 12 
 include/efi_loader.h  |  7 +++
 include/part.h| 11 ++-
 lib/efi_loader/efi_disk.c | 20 
 5 files changed, 53 insertions(+), 7 deletions(-)

--
2.20.1

Re: [PATCH 2/2] uboot: fs/btrfs: Fix LZO false decompression error caused by pending zero

[David Sterba]

On Thu, Mar 19, 2020 at 03:34:12PM +0100, Matthias Brugger wrote:
> 
> 
> On 19/03/2020 14:56, David Sterba wrote:
> > On Thu, Mar 19, 2020 at 02:33:28PM +0100, Matthias Brugger wrote:
> >>>   dlen -= out_len;
> >>>  
> >>>   res += out_len;
> >>> +
> >>> + /*
> >>> +  * If the 4 bytes header does not fit to the rest of the page we
> >>> +  * have to move to next one, or we read some garbage.
> >>> +  */
> >>> + mod_page = tot_in % PAGE_SIZE;
> >>
> >> in U-Boot we use 4K page sizes, but the OS could use another page size 
> >> (16K or
> >> 64k). Would we need to adapt that code to reflect which page size is used 
> >> on the
> >> medium we want to access?
> > 
> > Yes, it is the 'sectorsize' as it's set up in fs_info or it's equivalent
> > in uboot. For kernel the page size == sectorsize is kind of implicit and
> > verified at mount time.
> > 
> 
> Does this mean we would need to add a Kconfig option to set the sectorsize in
> U-Boot?

No, the value depends on the filesystem so it can't be a config option.
What I mean is btrfs_super_block::sectorsize, where the superblock is
btrfs_info::sb.

Re: [PATCH v2] bootcount_ext: Add flag to enable/disable bootcount

[Simon Glass]

On Wed, 18 Mar 2020 at 02:17, Frédéric Danis
 wrote:
>
> Hi Simon,
>
> Sorry I missed to add the change log.
>
> Since v1:
> - Add doc/README.bootcount
> - Add version number in bootcount_ext file and change Magic byte

Reviewed-by: Simon Glass 


>
> Regards,
> Fred
>
> On 18/03/2020 03:17, Simon Glass wrote:
> > Hi Frédéric,
> >
> > On Tue, 17 Mar 2020 at 10:59, Frédéric Danis
> >  wrote:
> >> After a successful upgrade, multiple problem during boot sequence may
> >> trigger the altbootcmd process.
> >> This patch adds a version and an upgrade_available entries to the
> >> bootcount file to enable/disable the bootcount check.
> >> When failing to read the bootcount file it will consider that bootcount is
> >> enabled, acting as previously, and update the file accordingly.
> >>
> >> The bootcount file is only saved when `upgrade_available` is true, this
> >> allows to save writes to the filesystem.
> >>
> >> Signed-off-by: Frédéric Danis 
> > Is there a change log? I see that this is v2.
> >
> > Regards,
> > Simon
>

Re: [PATCH v2 32/39] irq: Add a method to convert an interrupt to ACPI

[Simon Glass]

Hi Wolfgang,

On Wed, 18 Mar 2020 at 10:20, Wolfgang Wallner
 wrote:
>
> Hi Simon,
>
> I'm resending this mail, as my email client has broken the formating
> in the first attempt, sorry.
>
>
> "Simon Glass"  schrieb am 09.03.2020 04:44:56:
>
> > Von: "Simon Glass" 
> > An: "U-Boot Mailing List" ,
> > Kopie: "Bin Meng" , "Wolfgang Wallner"
> > , "Andy Shevchenko"
> > , "Simon Glass" 
> > Datum: 09.03.2020 04:46
> > Betreff: [PATCH v2 32/39] irq: Add a method to convert an interrupt to
> ACPI
> >
> > When generating ACPI tables we need to convert IRQs in U-Boot to the
> ACPI
> > structures required by ACPI. This is a SoC-specific conversion and
> cannot
> > be handled by generic code, so add a new IRQ method to do the
> conversion.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> > Changes in v2: None
> >
> >  drivers/misc/irq-uclass.c | 18 +++-
> >  include/acpi_device.h | 27 +++
> >  include/irq.h | 41 +
> >  lib/acpi/acpi_device.c| 94 +++
> >  4 files changed, 178 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/misc/irq-uclass.c b/drivers/misc/irq-uclass.c
> > index 61aa10e465..b4a8b7b429 100644
> > --- a/drivers/misc/irq-uclass.c
> > +++ b/drivers/misc/irq-uclass.c
> > @@ -153,8 +153,6 @@ int irq_request(struct udevice *dev, struct irq
> *irq)
> > const struct irq_ops *ops;
> >
> > log_debug("(dev=%p, irq=%p)\n", dev, irq);
> > -   if (!irq)
> > -  return 0;
>
> Why is this code dropped?

We don't support passing NULL to this function. It would be invalid
and there is no point in adding code to check for it.

[..]

> > +/**
> > + * acpi_device_write_interrupt_or_gpio() - Write interrupt or GPIO to
> ACPI
> > + *
> > + * This reads the an interrupt from the device tree, if available. If
> not it
>
> typo: "the an"
>
> The description of what this function should do is rather vague.
> At least I'm not sure how it is meant to work.

OK I will beef it up.

[..]

> > +int acpi_device_write_interrupt_or_gpio(struct acpi_ctx *ctx,
> > +   struct udevice *dev, const char *prop)
> > +{
> > +   struct irq req_irq;
> > +   int ret;
> > +
> > +   ret = irq_get_by_index(dev, 0, _irq);
> > +   if (!ret) {
> > +  ret = acpi_device_write_interrupt_irq(ctx, _irq);
> > +  if (ret)
> > + return log_msg_ret("irq", ret);
> > +   } else {
> > +  struct gpio_desc req_gpio;
> > +
> > +  ret = gpio_request_by_name(dev, prop, 0, _gpio,
> > +  GPIOD_IS_IN);
> > +  if (ret)
> > + return log_msg_ret("no gpio", ret);
> > +  ret = acpi_device_write_gpio_desc(ctx, _gpio);
> > +  if (ret)
> > + return log_msg_ret("gpio", ret);
> > +   }
>
> Both code paths set the index value hardcoded to 0.
> Why is that? Would other indices not make sense?

We only support a single interrupt / GPIO at present. We could expand
this but there is no use case for that yet.

Regards,
Simon

Re: [PATCH v3] arm: add acpi support for the arm

[Simon Glass]

Hi Steven,

On Wed, 18 Mar 2020 at 00:46, Steven Hao  wrote:
>
> Hi Simon:
>
> Nowdays I get that you are updating the acpi in uboot. I want to ask for that
> could you support the arm platform or keep out a interface for adding 
> arm-acpi.
> For example, the acpi_table.h file may be put in include folder, instead of 
> arch/x86/include/asm  folder.
>

It is hard for me to know what ACPI bits ARM uses. Do you know? It
should be easy enough to move the code later if needed.

Regards,
Simon


> Steven Hao
> 2020-03-18
> 
> 发件人: Simon Glass 
> 发送时间: 2019年12月28日 0:41
> 收件人: Steven Hao 
> 抄送: Bin Meng ; Heinrich Schuchardt ; 
> liu...@phytium.com.cn ; ag...@csgraf.de 
> ; ja...@amarulasolutions.com ; 
> marek.va...@gmail.com ; s...@denx.de ; 
> patrice.chot...@st.com ; a...@ti.com ; 
> horatiu.vul...@microchip.com ; 
> narmstr...@baylibre.com ; ryder@mediatek.com 
> ; igor.opan...@gmail.com ; 
> patrick.delau...@st.com ; 
> eugen.hris...@microchip.com ; 
> judge.pack...@gmail.com ; 
> yamada.masah...@socionext.com ; 
> swar...@nvidia.com ; michal.si...@xilinx.com 
> ; u-boot@lists.denx.de ; Andy 
> Shevchenko 
> 主题: Re: [PATCH v3] arm: add acpi support for the arm
>
> Hi,
>
> On Sun, 15 Dec 2019 at 18:54, Steven Hao  wrote:
> >
> > This problem seems like lay aside.
> >
> > 
> > 发件人: Bin Meng 
> > 发送时间: 2019年11月27日 14:04
> > 收件人: Simon Glass 
> > 抄送: Heinrich Schuchardt ; Steven Hao 
> > ; liu...@phytium.com.cn 
> > ; ag...@csgraf.de ; 
> > ja...@amarulasolutions.com ; 
> > marek.va...@gmail.com ; s...@denx.de ; 
> > patrice.chot...@st.com ; a...@ti.com ; 
> > horatiu.vul...@microchip.com ; 
> > narmstr...@baylibre.com ; ryder@mediatek.com 
> > ; igor.opan...@gmail.com ; 
> > patrick.delau...@st.com ; 
> > eugen.hris...@microchip.com ; 
> > judge.pack...@gmail.com ; 
> > yamada.masah...@socionext.com ; 
> > swar...@nvidia.com ; michal.si...@xilinx.com 
> > ; u-boot@lists.denx.de ; 
> > Andy Shevchenko 
> > 主题: Re: [PATCH v3] arm: add acpi support for the arm
> >
> > Hi Simon,
> >
> > On Wed, Nov 27, 2019 at 11:42 AM Simon Glass  wrote:
> > >
> > > Hi Heinrich,
> > >
> > > On Mon, 25 Nov 2019 at 18:12, Heinrich Schuchardt  
> > > wrote:
> > > >
> > > > On 11/26/19 12:40 AM, Simon Glass wrote:
> > > > > Hi,
> > > > >
> > > > > On Mon, 25 Nov 2019 at 15:57, Heinrich Schuchardt 
> > > > >  wrote:
> > > > >>
> > > > >> On 11/25/19 3:42 AM, Steven Hao wrote:> 获取 Outlook for iOS
> > > > >> 
> > > > >>> 
> > > > >>> *主题:* Re: [PATCH v3] arm: add acpi support for the arm
> > > > >>> Hi Steven,
> > > > >>>
> > > > >>> On Mon, Nov 25, 2019 at 10:09 AM Steven Hao 
> > > > >>> 
> > > > >>> wrote:
> > > > 
> > > >  Dear Bin：
> > > > 
> > > >  Firstly：
> > > >  I know that acpi about x86 is existing. And it is usefull for x86
> > > > >> platfporm. If it  is used to arm platform，some modification may have 
> > > > >> to
> > > > >> do. For example，facs table is useless for arm.
> > > > 
> > > >  In adition，The acpi table is writed statically and then modified
> > > > >> dynamically in my patch. It is a new method.
> > > > 
> > > >  I want to consult that whether my method is helpful or not.
> > > > 
> > > >  Secondly：
> > > >  If i want to reuse the x86-acpi. I will overwrite the
> > > > >> write_acpi_tables function. But the definition about acpi strcuture 
> > > > >> is
> > > > >> placed in arch/x86/include/asm directory. It can not be used to arm
> > > > >> plateform. If the acpi library need to surport for all platform，i  
> > > > >> think
> > > > >> it should move to /include directory.
> > > > 
> > > > >>>
> > > > >>> Yes, we all are aware that modifications are needed to the existing
> > > > >>> x86 ACPI support to support ARM. We don't want to create 2 ACP
> > > > >>> implementation in U-Boot.
> > > > >>>
> > > > >>> Regards,
> > > > >>> Bin> Dear Bin：
> > > > >>>
> > > > >>> I have a suggetion that the acpi specification definition such as 
> > > > >>> all
> > > > >>> acpi table structure definition  should be place in /include 
> > > > >>> directory.
> > > > >>> and write_acpi_tables function can be placed in platform directory.
> > > > >>>Creating acpi table mothod  can be diffrent between x86 and arm.
> > > > >>>
> > > > >>> Thank you
> > > > >>> Steven Hao
> > > > >>>
> > > > >>
> > > > >> Currently we are using CPU specific C files generating ACPI tables, 
> > > > >> e.g.
> > > > >> arch/x86/cpu/tangier/acpi.c.
> > > > >>
> > > > >> I would prefer if we would generate the ACPI tables and definition
> > > > >> blocks completely from text files instead of using C code. This would
> > > > >> avoid any architecture specific code.
> > > > >
> > > > > I am finding with Apollo Lake that this isn't possible - we need to
> > > > > insert run-time information into the tables set up with .asl files.
> > 

Re: [RFC PATCH v2] cmd: mp: change the command name from cpu to mp

[Simon Glass]

Hi Pragnesh,

On Sat, 14 Mar 2020 at 08:50, Pragnesh Patel  wrote:
>
> When CONFIG_CMD_CPU and CONFIG_MP both are enabled, U-Boot compilation
> gives an error of "multiple definition of `_u_boot_list_2_cmd_2_cpu'"
> so cpu command(cmd/cpu.c) and mp command(cmd/mp.c) should have different
> command name.
>
> Signed-off-by: Pragnesh Patel 
> ---
>  cmd/mp.c | 18 +-
>  1 file changed, 9 insertions(+), 9 deletions(-)

Please can you instead port this code over to use the CPU uclass?

Regards,
Simon

[PATCH v2 3/3] cmd: dm: Fixed/Added DM driver listing subcommands

[Niel Fourie]

Renamed dm "drivers" subcommand to "compat" (as it listed
compatibility strings) and prevent it from segfaulting when
drivers have no of_match populated.

Added a new "drivers" subcommand to dump a list of all known DM
drivers and for each, their uclass id, uclass driver and names of
attached devices.

Added a new "static" subcommand to dump a list of DM drivers with
statically defined platform data.

Signed-off-by: Niel Fourie 
CC: Simon Glass 
CC: Sean Anderson 
---
Depends on: https://patchwork.ozlabs.org/patch/1234460/

Changes in v2:
- Add/extend Python tests
- Fixed minor formatting/typographical errors

 cmd/dm.c | 22 +++-
 drivers/core/dump.c  | 55 +++-
 include/dm/util.h|  6 +
 test/py/tests/test_dm.py | 22 ++--
 4 files changed, 101 insertions(+), 4 deletions(-)

diff --git a/cmd/dm.c b/cmd/dm.c
index 7a90685f8b..fa7eba6a17 100644
--- a/cmd/dm.c
+++ b/cmd/dm.c
@@ -48,11 +48,29 @@ static int do_dm_dump_drivers(cmd_tbl_t *cmdtp, int flag, 
int argc,
return 0;
 }
 
+static int do_dm_dump_driver_compat(cmd_tbl_t *cmdtp, int flag, int argc,
+   char * const argv[])
+{
+   dm_dump_driver_compat();
+
+   return 0;
+}
+
+static int do_dm_dump_static_driver_info(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+   dm_dump_static_driver_info();
+
+   return 0;
+}
+
 static cmd_tbl_t test_commands[] = {
U_BOOT_CMD_MKENT(tree, 0, 1, do_dm_dump_all, "", ""),
U_BOOT_CMD_MKENT(uclass, 1, 1, do_dm_dump_uclass, "", ""),
U_BOOT_CMD_MKENT(devres, 1, 1, do_dm_dump_devres, "", ""),
U_BOOT_CMD_MKENT(drivers, 1, 1, do_dm_dump_drivers, "", ""),
+   U_BOOT_CMD_MKENT(compat, 1, 1, do_dm_dump_driver_compat, "", ""),
+   U_BOOT_CMD_MKENT(static, 1, 1, do_dm_dump_static_driver_info, "", ""),
 };
 
 static __maybe_unused void dm_reloc(void)
@@ -94,5 +112,7 @@ U_BOOT_CMD(
"tree  Dump driver model tree ('*' = activated)\n"
"dm uclassDump list of instances for each uclass\n"
"dm devresDump list of device resources for each device\n"
-   "dm drivers   Dump list of drivers and their compatible strings"
+   "dm drivers   Dump list of drivers with uclass and instances\n"
+   "dm compatDump list of drivers with compatibility strings\n"
+   "dm staticDump list of drivers with static platform data"
 );
diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index b5046398d4..e96d59f861 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -97,7 +97,7 @@ void dm_dump_uclass(void)
}
 }
 
-void dm_dump_drivers(void)
+void dm_dump_driver_compat(void)
 {
struct driver *d = ll_entry_start(struct driver, driver);
const int n_ents = ll_entry_count(struct driver, driver);
@@ -116,3 +116,56 @@ void dm_dump_drivers(void)
printf("%-20.20s\n", entry->name);
}
 }
+
+void dm_dump_drivers(void)
+{
+   struct driver *d = ll_entry_start(struct driver, driver);
+   const int n_ents = ll_entry_count(struct driver, driver);
+   struct driver *entry;
+   struct udevice *udev;
+   struct uclass *uc;
+   int i;
+
+   puts("Driveruid uclass   Devices\n");
+   puts("--\n");
+
+   for (entry = d; entry < d + n_ents; entry++) {
+   uclass_get(entry->id, );
+
+   printf("%-25.25s %-3.3d %-20.20s ", entry->name, entry->id,
+  uc ? uc->uc_drv->name : "");
+
+   if (!uc) {
+   puts("\n");
+   continue;
+   }
+
+   i = 0;
+   uclass_foreach_dev(udev, uc) {
+   if (udev->driver != entry)
+   continue;
+   if (i)
+   printf("%-51.51s", "");
+
+   printf("%-25.25s\n", udev->name);
+   i++;
+   }
+   if (!i)
+   puts("\n");
+   }
+}
+
+void dm_dump_static_driver_info(void)
+{
+   struct driver_info *drv = ll_entry_start(struct driver_info,
+driver_info);
+   const int n_ents = ll_entry_count(struct driver_info, driver_info);
+   struct driver_info *entry;
+
+   puts("DriverAddress\n");
+   puts("-\n");
+   for (entry = drv; entry != drv + n_ents; entry++) {
+   printf("%-25.25s @%08lx\n", entry->name,
+  (ulong)map_to_sysmem(entry->platdata));
+   }
+}
diff --git a/include/dm/util.h b/include/dm/util.h
index 0ccb3fbadf..974347ce0b 100644
--- a/include/dm/util.h
+++ b/include/dm/util.h
@@ -42,6 

[PATCH v2 1/3] cmd: part: Add subcommand to list supported partition tables

[Niel Fourie]

Add a subcommand "types" to the part command, which lists the supported
partition table types.

Signed-off-by: Niel Fourie 
CC: Simon Glass 
---
Changes in v2:
- Add Python test

 cmd/part.c | 27 +--
 test/py/tests/test_part.py | 14 ++
 2 files changed, 39 insertions(+), 2 deletions(-)
 create mode 100644 test/py/tests/test_part.py

diff --git a/cmd/part.c b/cmd/part.c
index 5e4e45ca6d..fae5df7b71 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -182,6 +182,26 @@ static int do_part_number(int argc, char * const argv[])
return do_part_info(argc, argv, CMD_PART_INFO_NUMBER);
 }
 
+static int do_part_types(int argc, char * const argv[])
+{
+   struct part_driver *drv = ll_entry_start(struct part_driver,
+part_driver);
+   const int n_ents = ll_entry_count(struct part_driver, part_driver);
+   struct part_driver *entry;
+   int i = 0;
+
+   puts("Supported partition tables");
+
+   for (entry = drv; entry != drv + n_ents; entry++) {
+   printf("%c %s", i ? ',' : ':', entry->name);
+   i++;
+   }
+   if (!i)
+   puts(": ");
+   puts("\n");
+   return CMD_RET_SUCCESS;
+}
+
 static int do_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
if (argc < 2)
@@ -197,7 +217,8 @@ static int do_part(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return do_part_size(argc - 2, argv + 2);
else if (!strcmp(argv[1], "number"))
return do_part_number(argc - 2, argv + 2);
-
+   else if (!strcmp(argv[1], "types"))
+   return do_part_types(argc - 2, argv + 2);
return CMD_RET_USAGE;
 }
 
@@ -221,5 +242,7 @@ U_BOOT_CMD(
"  part can be either partition number or partition name\n"
"part number\n"
"- set environment variable to the partition number using the 
partition name\n"
-   "  part must be specified as partition name"
+   "  part must be specified as partition name\n"
+   "part types\n"
+   "- list supported partition table types"
 );
diff --git a/test/py/tests/test_part.py b/test/py/tests/test_part.py
new file mode 100644
index 00..cba9804510
--- /dev/null
+++ b/test/py/tests/test_part.py
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (C) 2020
+# Niel Fourie, DENX Software Engineering, lu...@denx.de
+
+import pytest
+
+@pytest.mark.buildconfigspec('cmd_part')
+@pytest.mark.buildconfigspec('partitions')
+@pytest.mark.buildconfigspec('efi_partition')
+def test_dm_compat(u_boot_console):
+"""Test that `part types` prints a result which includes `EFI`."""
+output = u_boot_console.run_command('part types')
+assert "Supported partition tables:" in output
+assert "EFI" in output
-- 
2.25.1

[PATCH v2 2/3] cmd: fs: Add command to list supported fs types

[Niel Fourie]

Added command "fstypes" to list supported/included filesystems.

Signed-off-by: Niel Fourie 
CC: Simon Glass 
---
Changes in v2:
- Add Python test

 cmd/fs.c | 11 +++
 fs/fs.c  | 20 
 include/fs.h |  5 +
 test/py/tests/test_fs/test_fs_cmd.py | 12 
 4 files changed, 48 insertions(+)
 create mode 100644 test/py/tests/test_fs/test_fs_cmd.py

diff --git a/cmd/fs.c b/cmd/fs.c
index db74767b7b..26b47bd001 100644
--- a/cmd/fs.c
+++ b/cmd/fs.c
@@ -99,3 +99,14 @@ U_BOOT_CMD(
"fstype  : \n"
"- set environment variable to filesystem type\n"
 );
+
+static int do_fstypes_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+   return do_fs_types(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(
+   fstypes, 1, 1, do_fstypes_wrapper,
+   "List supported filesystem types", ""
+);
diff --git a/fs/fs.c b/fs/fs.c
index 0c66d60477..3e38b2e27a 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -900,3 +900,23 @@ int do_ln(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[],
 
return 0;
 }
+
+int do_fs_types(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   struct fstype_info *drv = fstypes;
+   const int n_ents = ARRAY_SIZE(fstypes);
+   struct fstype_info *entry;
+   int i = 0;
+
+   puts("Supported filesystems");
+   for (entry = drv; entry != drv + n_ents; entry++) {
+   if (entry->fstype != FS_TYPE_ANY) {
+   printf("%c %s", i ? ',' : ':', entry->name);
+   i++;
+   }
+   }
+   if (!i)
+   puts(": ");
+   puts("\n");
+   return CMD_RET_SUCCESS;
+}
diff --git a/include/fs.h b/include/fs.h
index 37e35c2120..b3fd0b179d 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -254,4 +254,9 @@ int do_fs_uuid(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[],
  */
 int do_fs_type(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 
+/*
+ * List supported filesystems.
+ */
+int do_fs_types(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+
 #endif /* _FS_H */
diff --git a/test/py/tests/test_fs/test_fs_cmd.py 
b/test/py/tests/test_fs/test_fs_cmd.py
new file mode 100644
index 00..86ba92e025
--- /dev/null
+++ b/test/py/tests/test_fs/test_fs_cmd.py
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (C) 2020
+# Niel Fourie, DENX Software Engineering, lu...@denx.de
+
+import pytest
+
+@pytest.mark.buildconfigspec('cmd_fs_generic')
+def test_dm_compat(u_boot_console):
+"""Test that `fstypes` prints a result which includes `sandbox`."""
+output = u_boot_console.run_command('fstypes')
+assert "Supported filesystems:" in output
+assert "sandbox" in output
-- 
2.25.1

[PATCH v2 0/3] cmd: add driver, fs and part type listing commands

[Niel Fourie]

This series adds commands for listing the supported partition tables,
listing supported filesystems and expands Driver Model listing commands.

The existing "dm drivers" command, which lists the DM drivers and their
compatibility strings, segmentation faulted on drivers for which of_match
was unpopulated (which appears to not be uncommon). This was fixed, and
the command was renamed "dm compat", and a new more extensive "dm drivers"
command was added, which list all DM drivers and for each, their uclass
id, uclass driver and the device names for active driver instances. The
purpose is show available drivers, but also to highlight unused drivers
or drivers with uclass ids without uclass drivers, etc.

The following commands were added:
-"part types", lists partition tables supported
-"fstypes", lists filesystem types supported
-"dm compat", lists drivers and their compatibility strings (equivalent
  to existing "dm drivers" command)
-"dm drivers", lists all DM drivers, and for each their uclass id,
  uclass driver and the device names for active driver instances.
-"dm static", lists all DM drivers which use static platform data
  (instead of the device tree).

These patches were tested in the Sandbox and on the Wandboard
i.MX6Quad Board rev B1.

Changes in v2:
- Rebased on https://patchwork.ozlabs.org/patch/1234460/
- Added Python tests
- Fixed minor typographical errors

Niel Fourie (3):
  cmd: part: Add subcommand to list supported partition tables
  cmd: fs: Add command to list supported fs types
  cmd: dm: Fixed/Added DM driver listing subcommands

 cmd/dm.c | 22 ++-
 cmd/fs.c | 11 ++
 cmd/part.c   | 27 +-
 drivers/core/dump.c  | 55 +++-
 fs/fs.c  | 20 ++
 include/dm/util.h|  6 +++
 include/fs.h |  5 +++
 test/py/tests/test_dm.py | 22 ++-
 test/py/tests/test_fs/test_fs_cmd.py | 12 ++
 test/py/tests/test_part.py   | 14 +++
 10 files changed, 188 insertions(+), 6 deletions(-)
 create mode 100644 test/py/tests/test_fs/test_fs_cmd.py
 create mode 100644 test/py/tests/test_part.py

-- 
2.25.1

RE: [PATCH 1/2] net: rt8169: WAR for DHCP not getting IP after kernel boot/reboot

[Tom Warren]

-Original Message-
From: Thierry Reding  
Sent: Thursday, March 19, 2020 1:04 AM
To: Tom Warren 
Cc: u-boot@lists.denx.de; Stephen Warren ; Jonathan Hunter 
; tomcwarren3...@gmail.com
Subject: Re: [PATCH 1/2] net: rt8169: WAR for DHCP not getting IP after kernel 
boot/reboot

On Tue, Mar 17, 2020 at 01:07:15PM -0700, twar...@nvidia.com wrote:
> From: Tom Warren 
> 
> This is a WAR for DHCP failure after rebooting from the L4T kernel. 
> The r8169.c kernel driver is setting bit 19 of the rt816x HW register 
> 0xF0, which goes by FuncEvent and MISC in various driver source/datasheets.
> That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear 
> it here at the end of probe to ensure that U-Boot can get an IP 
> assigned via DHCP.
> 
> Signed-off-by: Tom Warren 
> ---
>  drivers/net/rtl8169.c | 16 
>  1 file changed, 16 insertions(+)

Is this still needed? In my old p3450 branch that I worked on to get Porg up 
and running I don't have this patch. It's also not in my local development tree 
that I typically use to boot Tegra186 and earlier boards. That branch works 
fine on the Jetson Nano, so I don't think this is needed anymore. I vaguely 
recall that I determined that this was fixed some other way, but unfortunately 
I don't remember the exact details.

Thierry
[Tom] I'll retest as part of my Nano rework of your original patch, Thierry. So 
you've done network boot, then rebooted from the kernel (sudo reboot), and 
attempted net boot again and seen it work OK, w/an IP assigned by DHCP, etc.? 
(not static IP).  It's also possible that something in the kernel RT8169 driver 
has changed, and it's not setting the bit anymore.

---
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contain
confidential information.  Any unauthorized review, use, disclosure or 
distribution
is prohibited.  If you are not the intended recipient, please contact the 
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---

[RFC PATCH] arch: Add explicit linker script for u-boot-elf

[Michal Simek]

Commit f4dc714aaa2d ("arm64: Turn u-boot.bin back into an ELF file after
relocate-rela")
introduce REMAKE_ELF option to recreate u-boot.elf from u-boot ->
u-boot.bin + DT -> u-boot.elf.

The best is to ilustrate it from make V=1 output
  cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin
  cp u-boot-dtb.bin u-boot.bin
aarch64-linux-gnu-objcopy -I binary -B aarch64 -O elf64-littleaarch64  
u-boot.bin u-boot-elf.o
  aarch64-linux-gnu-ld.bfd u-boot-elf.o -o u-boot.elf 
--defsym="_start"=0x800 -Ttext=0x800

Last command has no explicit linker script passed that's why toolchain
internal linker script is used.
In Binutils 2.32 case it contains SIZEOF_HEADERS symbol which has changed
behavior by commit
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=64029e93683a266c38d19789e780f3748bd6a188
which result in situation that program headers has changed from
(xilinx_zynqmp_mini_defconfig)

Program Headers:
  Type   Offset VirtAddr   PhysAddr
 FileSizMemSiz  Flags  Align
  LOAD   0x0001 0xfffc 0xfffc
 0x00018918 0x00018918  RW 0x1

to

Program Headers:
  Type   Offset VirtAddr   PhysAddr
 FileSizMemSiz  Flags  Align
  LOAD   0x 0xfffb 0xfffb
 0x00028918 0x00028918  RW 0x1

Xilinx tools like XSDB or Bootgen are using program headers for loading ELF
to the right location and by above binutils change ELF is loaded to
incorrect location.

The patch is explicitly use u-boot-elf.lds (just cat now) for u-boot.elf
recreation which is called when REMAKE_ELF is setup.
By purpose u-boot-elf.lds doesn't contain OUTPUT_FORMAT/OUTPUT_ARCH to be
able to use by all archs.

Signed-off-by: Michal Simek 
---

Sadanand, Mahesh: Please correct my description if I am wrong based on our
internal discussion about this issue.

Tom: I have been told that it is GCC issue but I found that commit in
binutils.
I am not doing these makefile stuff that's why I expect this should be
changed a little bit. Also arch/u-boot-elf.lds is likely incorrect location
but didn't find any better.

---
 Makefile| 7 +--
 arch/u-boot-elf.lds | 9 +
 2 files changed, 14 insertions(+), 2 deletions(-)
 create mode 100644 arch/u-boot-elf.lds

diff --git a/Makefile b/Makefile
index be1513227361..410cfb3fcb2e 100644
--- a/Makefile
+++ b/Makefile
@@ -1654,12 +1654,15 @@ ifndef PLATFORM_ELFENTRY
 endif
 quiet_cmd_u-boot-elf ?= LD  $@
cmd_u-boot-elf ?= $(LD) u-boot-elf.o -o $@ \
-   --defsym=$(PLATFORM_ELFENTRY)=$(CONFIG_SYS_TEXT_BASE) \
+   -T u-boot-elf.lds --defsym=$(PLATFORM_ELFENTRY)=$(CONFIG_SYS_TEXT_BASE) 
\
-Ttext=$(CONFIG_SYS_TEXT_BASE)
-u-boot.elf: u-boot.bin
+u-boot.elf: u-boot.bin u-boot-elf.lds
$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
$(call if_changed,u-boot-elf)
 
+u-boot-elf.lds: arch/u-boot-elf.lds prepare FORCE
+   $(call if_changed,cat)
+
 # MediaTek's ARM-based u-boot needs a header to contains its load address
 # which is parsed by the BootROM.
 # If the SPL build is enabled, the header will be added to the spl binary,
diff --git a/arch/u-boot-elf.lds b/arch/u-boot-elf.lds
new file mode 100644
index ..1939d7f81c25
--- /dev/null
+++ b/arch/u-boot-elf.lds
@@ -0,0 +1,9 @@
+ENTRY(_start)
+SECTIONS
+{
+   . = _start;
+
+   .data : {
+   *(.data*)
+   }
+}
-- 
2.25.1

Re: [EXT] [PATCH] mtd: spi-nor-core: call WATCHDOG_RESET() in spi_nor_ready()

[Rasmus Villemoes]

On 19/03/2020 15.52, Kuldeep Singh wrote:
> Hi Vignesh,
> 

>> I have a board for which doing "sf erase 0x10 0x8"
>> consistently causes the external watchdog circuit to reset the board. Make
>> sure to pet the watchdog during slow operations such as erasing or writing
>> large areas of a spi nor flash.
> 
> I also stumbled with the same problem of board resetting but it was in order 
> of MBs and not in KBs.
> Board gets reset while performing burst erase/write(for 48M erase, resets at 
> 16M~) and read operation on 16M+.
> I provided fix [1] in driver itself(add 1us delay) assuming it to be soc 
> specific which solves problem for me and able to perform complete flash size 
> operations.

Eh, but is it the short delay that fixes the problem you saw, or the
implicit WATCHDOG_RESET() done inside the udelay() function?

Rasmus

RE: [EXT] [PATCH] mtd: spi-nor-core: call WATCHDOG_RESET() in spi_nor_ready()

[Kuldeep Singh]

Hi Vignesh,

> -Original Message-
> From: U-Boot  On Behalf Of Rasmus
> Villemoes
> Sent: Tuesday, March 17, 2020 1:49 AM
> To: u-boot@lists.denx.de
> Cc: Jagan Teki ; Vignesh R
> ; Rasmus Villemoes 
> Subject: [EXT] [PATCH] mtd: spi-nor-core: call WATCHDOG_RESET() in
> spi_nor_ready()
> 
> Caution: EXT Email
> 
> I have a board for which doing "sf erase 0x10 0x8"
> consistently causes the external watchdog circuit to reset the board. Make
> sure to pet the watchdog during slow operations such as erasing or writing
> large areas of a spi nor flash.

I also stumbled with the same problem of board resetting but it was in order of 
MBs and not in KBs.
Board gets reset while performing burst erase/write(for 48M erase, resets at 
16M~) and read operation on 16M+.
I provided fix [1] in driver itself(add 1us delay) assuming it to be soc 
specific which solves problem for me and able to perform complete flash size 
operations.

Thanks 
Kuldeep

[1] https://patchwork.ozlabs.org/patch/1243005/

[PATCH] efi_loader: simplify logical expression in efi_disk_add_dev()

[Heinrich Schuchardt]

To check if a variable is non-zero there is no need for '!= 0'.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_disk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 9563556691..fc0682bc48 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -367,7 +367,7 @@ static efi_status_t efi_disk_add_dev(
diskobj->media.block_size = desc->blksz;
diskobj->media.io_align = desc->blksz;
diskobj->media.last_block = desc->lba - offset;
-   if (part != 0)
+   if (part)
diskobj->media.logical_partition = 1;
diskobj->ops.media = >media;
if (disk)
--
2.25.1

[PATCH 1/1] efi_loader: fix function descriptions in efi_disk.c

[Heinrich Schuchardt]

Use Sphinx style for function descriptions.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_disk.c | 52 ++-
 1 file changed, 30 insertions(+), 22 deletions(-)

diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index ed7fb3f7d3..9563556691 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -222,15 +222,17 @@ static const struct efi_block_io block_io_disk_template = 
{
.flush_blocks = _disk_flush_blocks,
 };

-/*
- * Get the simple file system protocol for a file device path.
+/**
+ * efi_fs_from_path() - retrieve simple file system protocol
+ *
+ * Gets the simple file system protocol for a file device path.
  *
  * The full path provided is split into device part and into a file
  * part. The device part is used to find the handle on which the
  * simple file system protocol is installed.
  *
- * @full_path  device path including device and file
- * @return simple file system protocol
+ * @full_path: device path including device and file
+ * Return: simple file system protocol
  */
 struct efi_simple_file_system_protocol *
 efi_fs_from_path(struct efi_device_path *full_path)
@@ -285,15 +287,15 @@ static int efi_fs_exists(struct blk_desc *desc, int part)
 }

 /*
- * Create a handle for a partition or disk
+ * efi_disk_add_dev() - create a handle for a partition or disk
  *
- * @parent parent handle
- * @dp_parent  parent device path
- * @if_typename interface name for block device
- * @desc   internal block device
- * @dev_index   device index for block device
- * @offset offset into disk for simple partitions
- * @return disk object
+ * @parent:parent handle
+ * @dp_parent: parent device path
+ * @if_typename:   interface name for block device
+ * @desc:  internal block device
+ * @dev_index: device index for block device
+ * @offset:offset into disk for simple partitions
+ * Return: disk object
  */
 static efi_status_t efi_disk_add_dev(
efi_handle_t parent,
@@ -373,15 +375,17 @@ static efi_status_t efi_disk_add_dev(
return EFI_SUCCESS;
 }

-/*
- * Create handles and protocols for the partitions of a block device
+/**
+ * efi_disk_create_partitions() - create handles and protocols for partitions
  *
- * @parent handle of the parent disk
- * @blk_desc   block device
- * @if_typenameinterface type
- * @diskid device number
- * @pdevname   device name
- * @return number of partitions created
+ * Create handles and protocols for the partitions of a block device.
+ *
+ * @parent:handle of the parent disk
+ * @blk_desc:  block device
+ * @if_typename:   interface type
+ * @diskid:device number
+ * @pdevname:  device name
+ * Return: number of partitions created
  */
 int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc,
   const char *if_typename, int diskid,
@@ -418,16 +422,20 @@ int efi_disk_create_partitions(efi_handle_t parent, 
struct blk_desc *desc,
return disks;
 }

-/*
+/**
+ * efi_disk_register() - register block devices
+ *
  * U-Boot doesn't have a list of all online disk devices. So when running our
  * EFI payload, we scan through all of the potentially available ones and
  * store them in our object pool.
  *
+ * This function is called in efi_init_obj_list().
+ *
  * TODO(s...@chromium.org): Actually with CONFIG_BLK, U-Boot does have this.
  * Consider converting the code to look up devices as needed. The EFI device
  * could be a child of the UCLASS_BLK block device, perhaps.
  *
- * This gets called from do_bootefi_exec().
+ * Return: status code
  */
 efi_status_t efi_disk_register(void)
 {
--
2.25.1

Re: [PATCH 2/2] uboot: fs/btrfs: Fix LZO false decompression error caused by pending zero

[Matthias Brugger]

On 19/03/2020 14:56, David Sterba wrote:
> On Thu, Mar 19, 2020 at 02:33:28PM +0100, Matthias Brugger wrote:
>>> dlen -= out_len;
>>>  
>>> res += out_len;
>>> +
>>> +   /*
>>> +* If the 4 bytes header does not fit to the rest of the page we
>>> +* have to move to next one, or we read some garbage.
>>> +*/
>>> +   mod_page = tot_in % PAGE_SIZE;
>>
>> in U-Boot we use 4K page sizes, but the OS could use another page size (16K 
>> or
>> 64k). Would we need to adapt that code to reflect which page size is used on 
>> the
>> medium we want to access?
> 
> Yes, it is the 'sectorsize' as it's set up in fs_info or it's equivalent
> in uboot. For kernel the page size == sectorsize is kind of implicit and
> verified at mount time.
> 

Does this mean we would need to add a Kconfig option to set the sectorsize in
U-Boot?

Regards,
Matthias

Re: [PATCH v3 4/5] riscv: Setup reserved-memory node for FU540

[Bin Meng]

On Wed, Mar 18, 2020 at 5:19 AM Atish Patra  wrote:
>
> FU540 uses OF_SEPARATE instead of OF_PRIOR.
>
> Enable OF_BOARD_FIXUP to update the DT with reserved-memory node.
>
> Signed-off-by: Atish Patra 
> ---
>  board/sifive/fu540/fu540.c | 15 +++
>  configs/sifive_fu540_defconfig |  1 +
>  2 files changed, 16 insertions(+)
>
> diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
> index 47a20902517c..82b3a9c8e729 100644
> --- a/board/sifive/fu540/fu540.c
> +++ b/board/sifive/fu540/fu540.c
> @@ -141,6 +141,21 @@ int misc_init_r(void)
>
>  #endif
>
> +#ifdef CONFIG_OF_BOARD_FIXUP
> +int board_fix_fdt(void *fdt)

This routine should be put in a more generic file, as this could
potentially apply to all RISC-V platforms that need OF_BOARD_FIXUP
(e.g.: U-Boot itself is built with OF_SEPARATE).

In case other platform wants to override this, we can define it as a __weak.

> +{
> +   int err;
> +
> +   err = riscv_board_reserved_mem_fixup(fdt);
> +   if (err < 0) {
> +   printf("failed to fixup DT for reserved memory: %d\n", err);
> +   return err;
> +   }
> +
> +   return 0;
> +}
> +#endif
> +
>  int board_init(void)
>  {
> /* For now nothing to do here. */
> diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
> index 6d61e6c960ee..8fb3794cd578 100644
> --- a/configs/sifive_fu540_defconfig
> +++ b/configs/sifive_fu540_defconfig
> @@ -12,3 +12,4 @@ CONFIG_DISPLAY_BOARDINFO=y
>  CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_DM_MTD=y
> +CONFIG_OF_BOARD_FIXUP=y

This line should be inserted after CONFIG_DISPLAY_BOARDINFO=y

Please ensure defconfig file is updated like this:

$ make sifive_fu540_defconfig
$ make savedefconfig
$ cp defconfig configs/sifive_fu540_defconfig

Regards,
Bin

Re: [PATCH v3 5/5] riscv: Copy the reserved-memory nodes to final DT

[Bin Meng]

On Wed, Mar 18, 2020 at 5:19 AM Atish Patra  wrote:
>
> The DT used by U-Boot may be different from the DT being passed to
> the OS if the DT is loaded from external media such as network or
> mmc. In that case, the reserved-memory node needs to be copied to
> the DT passed to the OS.
>
> Signed-off-by: Atish Patra 
> ---
>  arch/riscv/lib/bootm.c | 5 +
>  1 file changed, 5 insertions(+)
>

Reviewed-by: Bin Meng 

Re: [PATCH v3 3/5] riscv: Provide a mechanism to fix DT for reserved memory

[Bin Meng]

On Wed, Mar 18, 2020 at 5:19 AM Atish Patra  wrote:
>
> In RISC-V, M-mode software can reserve physical memory regions
> by setting appropriate physical memory protection (PMP) csr. As the
> PMP csr are accessible only in M-mode, S-mode U-Boot can not read
> this configuration directly. However, M-mode software can pass this
> information via reserved-memory node in device tree so that S-mode
> software can access this information.
>
> This patch provides a framework to copy to the reserved-memory node
> from one DT to another. This will be used to update the DT used by
> U-Boot and the DT passed to the next stage OS.
>
> Signed-off-by: Atish Patra 
> ---
>  arch/riscv/cpu/start.S|  1 +
>  arch/riscv/include/asm/global_data.h  |  1 +
>  arch/riscv/include/asm/u-boot-riscv.h |  1 +
>  arch/riscv/lib/asm-offsets.c  |  1 +
>  arch/riscv/lib/bootm.c| 68 +++
>  5 files changed, 72 insertions(+)
>
> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> index 6b3ff99c3882..0282685c2906 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -121,6 +121,7 @@ call_board_init_f_0:
>
> jal board_init_f_init_reserve
>
> +   SREGs1, GD_FIRMWARE_FDT_ADDR(gp)
> /* save the boot hart id to global_data */
> SREGtp, GD_BOOT_HART(gp)
>
> diff --git a/arch/riscv/include/asm/global_data.h 
> b/arch/riscv/include/asm/global_data.h
> index b74bd7e738bb..51ac8d1c98e2 100644
> --- a/arch/riscv/include/asm/global_data.h
> +++ b/arch/riscv/include/asm/global_data.h
> @@ -15,6 +15,7 @@
>  /* Architecture-specific global data */
>  struct arch_global_data {
> long boot_hart; /* boot hart id */
> +   phys_addr_t firmware_fdt_addr;
>  #ifdef CONFIG_SIFIVE_CLINT
> void __iomem *clint;/* clint base address */
>  #endif
> diff --git a/arch/riscv/include/asm/u-boot-riscv.h 
> b/arch/riscv/include/asm/u-boot-riscv.h
> index 49febd588102..b7bea0ba184d 100644
> --- a/arch/riscv/include/asm/u-boot-riscv.h
> +++ b/arch/riscv/include/asm/u-boot-riscv.h
> @@ -17,5 +17,6 @@ int cleanup_before_linux(void);
>  /* board/.../... */
>  int board_init(void);
>  void board_quiesce_devices(void);
> +int riscv_board_reserved_mem_fixup(void *fdt);
>
>  #endif /* _U_BOOT_RISCV_H_ */
> diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
> index 4fa4fd371473..7301c1b98e23 100644
> --- a/arch/riscv/lib/asm-offsets.c
> +++ b/arch/riscv/lib/asm-offsets.c
> @@ -14,6 +14,7 @@
>  int main(void)
>  {
> DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart));
> +   DEFINE(GD_FIRMWARE_FDT_ADDR, offsetof(gd_t, arch.firmware_fdt_addr));
>  #ifndef CONFIG_XIP
> DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts));
>  #endif
> diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
> index f927694ae32f..5e907e96701c 100644
> --- a/arch/riscv/lib/bootm.c
> +++ b/arch/riscv/lib/bootm.c
> @@ -19,6 +19,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> @@ -26,6 +27,73 @@ __weak void board_quiesce_devices(void)
>  {
>  }
>
> +int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)

We probably need find a better place for this routine, see below
comments for riscv_board_reserved_mem_fixup().

We need make this routine public in u-boot-riscv.h as well.

> +{
> +   uint32_t phandle;
> +   struct fdt_memory pmp_mem;
> +   fdt_addr_t addr;
> +   fdt_size_t size;
> +   int offset, node, err, rmem_offset;
> +   bool nomap = false;
> +   char basename[32] = {0};
> +   int bname_len;
> +   int max_len = sizeof(basename);
> +   const char *name;
> +   char *temp;
> +
> +   offset = fdt_path_offset(src, "/reserved-memory");
> +   if (offset < 0) {
> +   printf("No reserved memory region found in source FDT\n");
> +   return 0;
> +   }
> +
> +   fdt_for_each_subnode(node, src, offset) {
> +   name = fdt_get_name(src, node, NULL);
> +
> +   addr = fdtdec_get_addr_size_auto_noparent(src, node,
> + "reg", 0, ,
> + true);
> +   if (addr == FDT_ADDR_T_NONE) {
> +   debug("failed to read address/size for %s\n", name);
> +   continue;
> +   }
> +   strncpy(basename, name, max_len);
> +   temp = strchr(basename, '@');
> +   if (temp) {
> +   bname_len = strnlen(basename, max_len) - strnlen(temp,
> +  
> max_len);
> +   *(basename+bname_len) = '\0';

nits: need space around +

> +   }
> +   pmp_mem.start = addr;
> +   pmp_mem.end = addr + size;
> +   err = 

[PATCH 1/2] uboot: fs/btrfs: Use LZO_LEN to replace immediate number

[Qu Wenruo]

Just a cleanup. The immediate number makes my eye hurt.

Signed-off-by: Qu Wenruo 
---
 fs/btrfs/compression.c | 22 --
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c
index 346875d45a1b..4ef44ce11485 100644
--- a/fs/btrfs/compression.c
+++ b/fs/btrfs/compression.c
@@ -12,36 +12,38 @@
 #include 
 #include 
 
+/* Header for each segment, LE32, recording the compressed size */
+#define LZO_LEN4
 static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, u32 dlen)
 {
u32 tot_len, in_len, res;
size_t out_len;
int ret;
 
-   if (clen < 4)
+   if (clen < LZO_LEN)
return -1;
 
tot_len = le32_to_cpu(get_unaligned((u32 *)cbuf));
-   cbuf += 4;
-   clen -= 4;
-   tot_len -= 4;
+   cbuf += LZO_LEN;
+   clen -= LZO_LEN;
+   tot_len -= LZO_LEN;
 
if (tot_len == 0 && dlen)
return -1;
-   if (tot_len < 4)
+   if (tot_len < LZO_LEN)
return -1;
 
res = 0;
 
-   while (tot_len > 4) {
+   while (tot_len > LZO_LEN) {
in_len = le32_to_cpu(get_unaligned((u32 *)cbuf));
-   cbuf += 4;
-   clen -= 4;
+   cbuf += LZO_LEN;
+   clen -= LZO_LEN;
 
-   if (in_len > clen || tot_len < 4 + in_len)
+   if (in_len > clen || tot_len < LZO_LEN + in_len)
return -1;
 
-   tot_len -= 4 + in_len;
+   tot_len -= (LZO_LEN + in_len);
 
out_len = dlen;
ret = lzo1x_decompress_safe(cbuf, in_len, dbuf, _len);
-- 
2.25.1

[PATCH 2/2] uboot: fs/btrfs: Fix LZO false decompression error caused by pending zero

[Qu Wenruo]

[BUG]
For certain btrfs files with compressed file extent, uboot will fail to
load it:

  btrfs_read_extent_reg: disk_bytenr=14229504 disk_len=73728 offset=0 
nr_bytes=131
  072
  decompress_lzo: tot_len=70770
  decompress_lzo: in_len=1389
  decompress_lzo: in_len=2400
  decompress_lzo: in_len=3002
  decompress_lzo: in_len=1379
  decompress_lzo: in_len=88539136
  decompress_lzo: header error, in_len=88539136 clen=65534 tot_len=62580

NOTE: except the last line, all other lines are debug output.

[CAUSE]
Btrfs lzo compression uses its own format to record compressed size
(segmant header, LE32).

However to make decompression easier, we never put such segment header
across page boundary.

In above case, the xxd dump of the lzo compressed data looks like this:

1fe0: 4cdc 02fc 0bfd 02c0 dc02 0d13 0100 0001  L...
1ff0:  0008 0300   0011 |  
2000: 4705  0001 cc02    1e01  G...

'|' is the "expected" segment header start position.

But in that page, there are only 2 bytes left, can't contain the 4 bytes
segment header.

So btrfs compression will skip that 2 bytes, put the segment header in
next page directly.

Uboot doesn't have such check, and read the header with 2 bytes offset,
result 0x0547 (88539136), other than the expected result
0x0547 (1351), resulting above error.

[FIX]
Follow the btrfs-progs restore implementation, by introducing tot_in to
record total processed bytes (including headers), and do proper page
boundary skip to fix it.

Signed-off-by: Qu Wenruo 
---
 fs/btrfs/compression.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c
index 4ef44ce11485..2a6ac8bb1029 100644
--- a/fs/btrfs/compression.c
+++ b/fs/btrfs/compression.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -17,6 +18,7 @@
 static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, u32 dlen)
 {
u32 tot_len, in_len, res;
+   u32 tot_in = 0;
size_t out_len;
int ret;
 
@@ -27,6 +29,7 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, 
u32 dlen)
cbuf += LZO_LEN;
clen -= LZO_LEN;
tot_len -= LZO_LEN;
+   tot_in += LZO_LEN;
 
if (tot_len == 0 && dlen)
return -1;
@@ -36,6 +39,9 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, 
u32 dlen)
res = 0;
 
while (tot_len > LZO_LEN) {
+   size_t mod_page;
+   size_t rem_page;
+
in_len = le32_to_cpu(get_unaligned((u32 *)cbuf));
cbuf += LZO_LEN;
clen -= LZO_LEN;
@@ -44,6 +50,7 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, 
u32 dlen)
return -1;
 
tot_len -= (LZO_LEN + in_len);
+   tot_in += (LZO_LEN + in_len);
 
out_len = dlen;
ret = lzo1x_decompress_safe(cbuf, in_len, dbuf, _len);
@@ -56,6 +63,19 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 
*dbuf, u32 dlen)
dlen -= out_len;
 
res += out_len;
+
+   /*
+* If the 4 bytes header does not fit to the rest of the page we
+* have to move to next one, or we read some garbage.
+*/
+   mod_page = tot_in % PAGE_SIZE;
+   rem_page = PAGE_SIZE - mod_page;
+   if (rem_page < LZO_LEN) {
+   cbuf += rem_page;
+   tot_in += rem_page;
+   clen -= rem_page;
+   tot_len -= rem_page;
+   }
}
 
return res;
-- 
2.25.1

Re: [PATCH 2/2] uboot: fs/btrfs: Fix LZO false decompression error caused by pending zero

[David Sterba]

On Thu, Mar 19, 2020 at 02:33:28PM +0100, Matthias Brugger wrote:
> > dlen -= out_len;
> >  
> > res += out_len;
> > +
> > +   /*
> > +* If the 4 bytes header does not fit to the rest of the page we
> > +* have to move to next one, or we read some garbage.
> > +*/
> > +   mod_page = tot_in % PAGE_SIZE;
> 
> in U-Boot we use 4K page sizes, but the OS could use another page size (16K or
> 64k). Would we need to adapt that code to reflect which page size is used on 
> the
> medium we want to access?

Yes, it is the 'sectorsize' as it's set up in fs_info or it's equivalent
in uboot. For kernel the page size == sectorsize is kind of implicit and
verified at mount time.

[PATCH 0/2] uboot: fs/btrfs: Fix read error on LZO compressed extents

[Qu Wenruo]

There is a bug that uboot can't load LZO compressed data extent while
kernel can handle it without any problem.

It turns out to be a page boundary case. The 2nd patch is the proper
fix, backported from btrfs-progs.

The first patch is just to make my eyes less hurt.

I guess it's time to backport proper code from btrfs-progs, other than
using tons of immediate numbers.

Qu Wenruo (2):
  uboot: fs/btrfs: Use LZO_LEN to replace immediate number
  uboot: fs/btrfs: Fix LZO false decompression error caused by pending
zero

 fs/btrfs/compression.c | 42 --
 1 file changed, 32 insertions(+), 10 deletions(-)

-- 
2.25.1

Re: [PATCH v6 11/12] arm: add Cubieboard7 board support

[André Przywara]

On 18/03/2020 18:25, Amit Singh Tomar wrote:
> The Cubieboard is a single board computer containing a
> Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores).
> 
> This patch adds respective defconfig alongwith .dts(copied
> from Linux v5.5-rc6 with hash "b3a987b0264d").
> 
> Signed-off-by: Amit Singh Tomar 
> ---
> Changes since v5:
>   * Trimmed of the cubieboard7_defconfig.

Thanks, that looks very good now!

Reviewed-by: Andre Przywara 

Cheers,
Andre

> Changes since v4:
> * No changes.
> Changes since v3:
> * added reviewed-by: tag.
> Changes since v2:
> * No changes.   
> Changes since v1:
> * No changes.   
> ---
>  arch/arm/dts/s700-cubieboard7.dts | 92 
> +++
>  configs/cubieboard7_defconfig |  9 
>  2 files changed, 101 insertions(+)
>  create mode 100644 arch/arm/dts/s700-cubieboard7.dts
>  create mode 100644 configs/cubieboard7_defconfig
> 
> diff --git a/arch/arm/dts/s700-cubieboard7.dts 
> b/arch/arm/dts/s700-cubieboard7.dts
> new file mode 100644
> index 000..63e375c
> --- /dev/null
> +++ b/arch/arm/dts/s700-cubieboard7.dts
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2017 Andreas Färber
> + */
> +
> +/dts-v1/;
> +
> +#include "s700.dtsi"
> +
> +/ {
> + compatible = "cubietech,cubieboard7", "actions,s700";
> + model = "CubieBoard7";
> +
> + aliases {
> + serial3 = 
> + };
> +
> + chosen {
> + stdout-path = "serial3:115200n8";
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x0 0x0 0x8000>;
> + };
> +
> + memory@1,e000 {
> + device_type = "memory";
> + reg = <0x1 0xe000 0x0 0x0>;
> + };
> +};
> +
> + {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <_default>;
> +};
> +
> + {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <_default>;
> +};
> +
> + {
> + status = "disabled";
> + pinctrl-names = "default";
> + pinctrl-0 = <_default>;
> +};
> +
> + {
> + i2c0_default: i2c0_default {
> + pinmux {
> + groups = "i2c0_mfp";
> + function = "i2c0";
> + };
> + pinconf {
> + pins = "i2c0_sclk", "i2c0_sdata";
> + bias-pull-up;
> + };
> + };
> +
> + i2c1_default: i2c1_default {
> + pinmux {
> + groups = "i2c1_dummy";
> + function = "i2c1";
> + };
> + pinconf {
> + pins = "i2c1_sclk", "i2c1_sdata";
> + bias-pull-up;
> + };
> + };
> +
> + i2c2_default: i2c2_default {
> + pinmux {
> + groups = "i2c2_dummy";
> + function = "i2c2";
> + };
> + pinconf {
> + pins = "i2c2_sclk", "i2c2_sdata";
> + bias-pull-up;
> + };
> + };
> +};
> +
> + {
> + clocks = <>;
> +};
> +
> + {
> + status = "okay";
> +};
> diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig
> new file mode 100644
> index 000..d12c293
> --- /dev/null
> +++ b/configs/cubieboard7_defconfig
> @@ -0,0 +1,9 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_OWL=y
> +CONFIG_MACH_S700=y
> +CONFIG_IDENT_STRING="\ncubieboard7"
> +CONFIG_BOOTDELAY=5
> +CONFIG_USE_BOOTARGS=y
> +CONFIG_BOOTARGS="console=ttyOWL3,115200n8"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7"
> 

Re: [PATCH v6 10/12] actions: Move defconfig options to Kconfig

[André Przywara]

On 18/03/2020 18:25, Amit Singh Tomar wrote:
> This patch moves some of the config options from bubblegum_96_defconfig
> to platform specific Kconfig file.
> 
> Signed-off-by: Amit Singh Tomar 
> ---
> Changes since v5:
>   * Newly added patch, was not there in earlier versions. 
> ---
>  arch/arm/mach-owl/Kconfig  | 16 
>  configs/bubblegum_96_defconfig |  5 -
>  2 files changed, 16 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig
> index 1d59d8f..0bd02e2 100644
> --- a/arch/arm/mach-owl/Kconfig
> +++ b/arch/arm/mach-owl/Kconfig
> @@ -25,4 +25,20 @@ config SYS_SOC
>  default "s900" if MACH_S900
>  default "s700" if MACH_S700
>  
> +config DISTRO_DEFAULTS
> + default y
> +
> +config NR_DRAM_BANKS
> + default 1
> +
> +config SYS_RELOC_GD_ENV_ADDR
> + default y
> +
> +config SYS_PROMPT
> + string "Shell prompt"

Do you need this line?

Rest looks fine, so with this line removed:

Reviewed-by: Andre Przywara 

Cheers,
Andre


> + default "U-Boot => "
> +
> +config DISPLAY_BOARDINFO
> + default n
> +
>  endif
> diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig
> index e76e9a2..0883167 100644
> --- a/configs/bubblegum_96_defconfig
> +++ b/configs/bubblegum_96_defconfig
> @@ -1,19 +1,14 @@
>  CONFIG_ARM=y
>  CONFIG_ARCH_OWL=y
>  CONFIG_ENV_SIZE=0x2000
> -CONFIG_NR_DRAM_BANKS=1
>  CONFIG_MACH_S900=y
>  CONFIG_IDENT_STRING="\nBubblegum-96"
> -CONFIG_DISTRO_DEFAULTS=y
>  CONFIG_BOOTDELAY=5
>  CONFIG_USE_BOOTARGS=y
>  CONFIG_BOOTARGS="console=ttyOWL5,115200n8"
>  # CONFIG_DISPLAY_CPUINFO is not set
> -# CONFIG_DISPLAY_BOARDINFO is not set
> -CONFIG_SYS_PROMPT="U-Boot => "
>  CONFIG_CMD_MD5SUM=y
>  CONFIG_CMD_MEMINFO=y
>  CONFIG_CMD_CACHE=y
>  CONFIG_CMD_TIMER=y
>  CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96"
> -CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> 

Re: [PATCH v6 06/12] clk: actions: Add common clock driver

[André Przywara]

On 18/03/2020 18:25, Amit Singh Tomar wrote:
> This patch converts S900 clock driver to something common that can
> be used for other SoCs, for instance S700(few of clk registers are same).
> 
> Signed-off-by: Amit Singh Tomar 

Compared clk_s900.h vs clk_owl.h, and checked the actual clock driver,
see the one bug below. Didn't check the S700 registers.

With that bug fixed:

Reviewed-by: Andre Przywara 

Cheers,
Andre



> ---
> Changes since v5:
>   * Removed the white space errors from "clk_owl.h".
> Changes since v4:
> * Removed parentheses from "regs_s700.h"
> * Moved this patch, from 03/11 to 05/11.
> * Merged owl_uart_clk_enable() into owl_clk_enable.
> Changes since v3:
> * Fixed register spelling.
> * Removed the ethernet related clocks.
> * Returned -EINVAL instead 0.
> Changes since v2:
> * Fixed the commit message.
> * Checked for the clk->id.
> * Added a .data member with SoC type.
> * Removed #ifdefs from few places.
> Changes since v1:
> * Moved CLK and CLK_OWL symbols from defconfig to arch/arm/Kconfig.
> ---
>  arch/arm/Kconfig  |   2 +
>  arch/arm/include/asm/arch-owl/clk_s900.h  |  57 ---
>  arch/arm/include/asm/arch-owl/regs_s700.h |  56 +++
>  configs/bubblegum_96_defconfig|   3 -
>  drivers/clk/owl/Kconfig   |   8 +-
>  drivers/clk/owl/Makefile  |   2 +-
>  drivers/clk/owl/clk_owl.c | 152 
> ++
>  drivers/clk/owl/clk_owl.h |  65 +
>  drivers/clk/owl/clk_s900.c| 137 ---
>  9 files changed, 278 insertions(+), 204 deletions(-)
>  delete mode 100644 arch/arm/include/asm/arch-owl/clk_s900.h
>  create mode 100644 arch/arm/include/asm/arch-owl/regs_s700.h
>  create mode 100644 drivers/clk/owl/clk_owl.c
>  create mode 100644 drivers/clk/owl/clk_owl.h
>  delete mode 100644 drivers/clk/owl/clk_s900.c
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 1cfdcb6..dba4d8c 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -876,6 +876,8 @@ config ARCH_OWL
>   select DM
>   select DM_SERIAL
>   select OWL_SERIAL
> + select CLK
> + select CLK_OWL
>   select OF_CONTROL
>   imply CMD_DM
>  
> diff --git a/arch/arm/include/asm/arch-owl/clk_s900.h 
> b/arch/arm/include/asm/arch-owl/clk_s900.h
> deleted file mode 100644
> index 88e88f7..000
> --- a/arch/arm/include/asm/arch-owl/clk_s900.h
> +++ /dev/null
> @@ -1,57 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * Actions Semi S900 Clock Definitions
> - *
> - * Copyright (C) 2015 Actions Semi Co., Ltd.
> - * Copyright (C) 2018 Manivannan Sadhasivam 
> 
> - *
> - */
> -
> -#ifndef _OWL_CLK_S900_H_
> -#define _OWL_CLK_S900_H_
> -
> -#include 
> -
> -struct owl_clk_priv {
> - phys_addr_t base;
> -};
> -
> -/* BUSCLK register definitions */
> -#define CMU_PDBGDIV_87
> -#define CMU_PDBGDIV_SHIFT26
> -#define CMU_PDBGDIV_DIV  (CMU_PDBGDIV_8 << CMU_PDBGDIV_SHIFT)
> -#define CMU_PERDIV_8 7
> -#define CMU_PERDIV_SHIFT 20
> -#define CMU_PERDIV_DIV   (CMU_PERDIV_8 << CMU_PERDIV_SHIFT)
> -#define CMU_NOCDIV_2 1
> -#define CMU_NOCDIV_SHIFT 19
> -#define CMU_NOCDIV_DIV   (CMU_NOCDIV_2 << CMU_NOCDIV_SHIFT)
> -#define CMU_DMMCLK_SRC_APLL  2
> -#define CMU_DMMCLK_SRC_SHIFT 10
> -#define CMU_DMMCLK_SRC   (CMU_DMMCLK_SRC_APLL << 
> CMU_DMMCLK_SRC_SHIFT)
> -#define CMU_APBCLK_DIV   BIT(8)
> -#define CMU_NOCCLK_SRC   BIT(7)
> -#define CMU_AHBCLK_DIV   BIT(4)
> -#define CMU_CORECLK_MASK 3
> -#define CMU_CORECLK_CPLL BIT(1)
> -#define CMU_CORECLK_HOSC BIT(0)
> -
> -/* COREPLL register definitions */
> -#define CMU_COREPLL_EN   BIT(9)
> -#define CMU_COREPLL_HOSC_EN  BIT(8)
> -#define CMU_COREPLL_OUT  (1104 / 24)
> -
> -/* DEVPLL register definitions */
> -#define CMU_DEVPLL_CLK   BIT(12)
> -#define CMU_DEVPLL_ENBIT(8)
> -#define CMU_DEVPLL_OUT   (660 / 6)
> -
> -/* UARTCLK register definitions */
> -#define CMU_UARTCLK_SRC_DEVPLL   BIT(16)
> -
> -/* DEVCLKEN1 register definitions */
> -#define CMU_DEVCLKEN1_UART5  BIT(21)
> -
> -#define PLL_STABILITY_WAIT_US50
> -
> -#endif
> diff --git a/arch/arm/include/asm/arch-owl/regs_s700.h 
> b/arch/arm/include/asm/arch-owl/regs_s700.h
> new file mode 100644
> index 000..2f21c15
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-owl/regs_s700.h
> @@ -0,0 +1,56 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Actions Semi S700 Register Definitions
> + *
> + */
> +
> +#ifndef _OWL_REGS_S700_H_
> +#define _OWL_REGS_S700_H_
> +
> +#define CMU_COREPLL  0x
> +#define CMU_DEVPLL   0x0004
> +#define CMU_DDRPLL   0x0008
> +#define 

Re: [PATCH v6 04/12] arm: dts: sync dts for Action Semi S900

[André Przywara]

On 18/03/2020 18:25, Amit Singh Tomar wrote:
> Synchronize device tree bindings with v5.5-rc6 tag with commit id
> "b3a987b0264d".
> 
> Also, it removes older clock binding defined for S900 along with undocumented
> compatible string "actions,s900-serial" from serial driver and adapts clock
> driver to cater to new bindings.
> 
> Signed-off-by: Amit Singh Tomar 

The new files are indeed identical with the versions from the Linux
kernel. Rest looks alright as well.

Reviewed-by: Andre Przywara 

Cheers,
Andre

> ---
> Changes since v5:
>   * Moved it 04/11 from 03/11.
>   * removed the undocumented compatible string "actions,s900-serial".
>   * removed the reviewed-by tag. 
> Changes since v4:
> * This patch is re-ordered, moved from 07/11 to 03/11.
> * Used the commit-id(12 chars long) in commit message.
> Changes since v3:
> * Added Reviewed-by: tag.
> Changes since v2:
> * Newly added patch, not there in v2/v1.
> ---
>  arch/arm/dts/s900.dtsi | 322 
> +++--
>  drivers/clk/owl/clk_s900.c |   6 +-
>  drivers/serial/serial_owl.c|   1 -
>  include/dt-bindings/clock/actions,s900-cmu.h   | 129 ++
>  include/dt-bindings/clock/s900_cmu.h   |  77 --
>  include/dt-bindings/reset/actions,s900-reset.h |  65 +
>  6 files changed, 498 insertions(+), 102 deletions(-)
>  create mode 100644 include/dt-bindings/clock/actions,s900-cmu.h
>  delete mode 100644 include/dt-bindings/clock/s900_cmu.h
>  create mode 100644 include/dt-bindings/reset/actions,s900-reset.h
> 
> diff --git a/arch/arm/dts/s900.dtsi b/arch/arm/dts/s900.dtsi
> index 2bbb30a..eb35cf7 100644
> --- a/arch/arm/dts/s900.dtsi
> +++ b/arch/arm/dts/s900.dtsi
> @@ -1,17 +1,94 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -//
> -// Device Tree Source for Actions Semi S900 SoC
> -//
> -// Copyright (C) 2015 Actions Semi Co., Ltd.
> -// Copyright (C) 2018 Manivannan Sadhasivam 
> 
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2017 Andreas Färber
> + */
>  
> -/dts-v1/;
> -#include 
> +#include 
> +#include 
> +#include 
> +#include 
>  
>  / {
>   compatible = "actions,s900";
> - #address-cells = <0x2>;
> - #size-cells = <0x2>;
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + secmon@1f00 {
> + reg = <0x0 0x1f00 0x0 0x100>;
> + no-map;
> + };
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + arm-pmu {
> + compatible = "arm,cortex-a53-pmu";
> + interrupts = ,
> +  ,
> +  ,
> +  ;
> + interrupt-affinity = <>, <>, <>, <>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts =  + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +   + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +   + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +   + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + hosc: hosc {
> + compatible = "fixed-clock";
> + clock-frequency = <2400>;
> + #clock-cells = <0>;
> + };
>  
>   losc: losc {
>   compatible = "fixed-clock";
> @@ -26,28 +103,231 @@
>   };
>  
>   soc {
> - u-boot,dm-pre-reloc;
>   compatible = "simple-bus";
> - #address-cells = <0x2>;
> 

Re: [PATCH] mtd: spi-nor-core: call WATCHDOG_RESET() in spi_nor_ready()

[Rasmus Villemoes]

On 19/03/2020 14.23, Vignesh Raghavendra wrote:
> 

>> For the read side, it seems that just replacing the UINT_MAX in the two
>> copies of spi_nor_read_data with some smaller constant should suffice.
>> But I don't know if I should make that smaller constant a CONFIG_*
>> option or just pick something like 256K. Thoughts?
> 
> Breaking reads into smaller units unconditionally will cause performance
> regressions. But I would like to avoid adding new CONFIG option as well.

Hm, but how much are we talking about? I can't imagine WATCHDOG_RESET()
taking much more than 10us - especially the rate-limited one that has an
early return just based on reading the current time will be practically
free to call. For me, reading 256K takes about 200ms, which I assume is
a rather typical value. Even if I'm off by an order of magnitude on both
numbers, we're talking about adding an extra 100us for every 20ms, i.e.
0.5%. And that's extremely pessimistic.

> How about resetting the watchdog in the SPI driver's read
> implementation? 

I'd prefer something done in the generic layer, not something specific
to this SOC (because next month I'll have another customer with another
board based on some ARM SOC that also decided to put on an aggressive
gpio watchdog, and next month yet another...).

Or setting max_read_size (in struct spi_slave) to
> smaller value in the SPI controller driver to force fragmentation of reads?

Even if one forces fragmentation in that way, the generic layer would
still need to grow a WATCHDOG_RESET() call in the read loop, no? It also
seems to be an abuse of max_read_size.

Rasmus

Re: [PATCH v6 03/12] serial: actions: add compatible string

[André Przywara]

On 18/03/2020 18:25, Amit Singh Tomar wrote:
> This patch adds "actions,owl-uart" string to the owl uart driver. It
> is also defined in Linux kernel.
> 
> Signed-off-by: Amit Singh Tomar 

Reviewed-by: Andre Przywara 

Thanks,
Andre

> ---
> Changes since v5:
>   * Moved it to from 06/11 to 03/11.
>   * Used appropriate commit message.
>   * Removed the reviwed-by tag.
> Changes since v4:
> * Moved it to from 09/11 to 06/11.
> Changes since v3:
> * Used only owl-uart for compatible string.
> Changes since v2:
> * No changes.   
> Changes since v1:
> * No changes.
> ---
>  drivers/serial/serial_owl.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/serial/serial_owl.c b/drivers/serial/serial_owl.c
> index 7ead73e..539acdc 100644
> --- a/drivers/serial/serial_owl.c
> +++ b/drivers/serial/serial_owl.c
> @@ -121,6 +121,7 @@ static const struct dm_serial_ops owl_serial_ops = {
>  
>  static const struct udevice_id owl_serial_ids[] = {
>   { .compatible = "actions,s900-serial" },
> + { .compatible = "actions,owl-uart" },
>   { }
>  };
>  
> 

[PATCH] arm64: zynqmp Add support for zcu111 revA

[Michal Simek]

Add low level configuration for zcu111 for easier SPL run.

Signed-off-by: Michal Simek 
---

 .../zynqmp/zynqmp-zcu111-revA/psu_init_gpl.c  | 978 ++
 1 file changed, 978 insertions(+)
 create mode 100644 board/xilinx/zynqmp/zynqmp-zcu111-revA/psu_init_gpl.c

diff --git a/board/xilinx/zynqmp/zynqmp-zcu111-revA/psu_init_gpl.c 
b/board/xilinx/zynqmp/zynqmp-zcu111-revA/psu_init_gpl.c
new file mode 100644
index ..7c6664dc988c
--- /dev/null
+++ b/board/xilinx/zynqmp/zynqmp-zcu111-revA/psu_init_gpl.c
@@ -0,0 +1,978 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (c) Copyright 2015 Xilinx, Inc. All rights reserved.
+ */
+
+#include 
+#include 
+
+static unsigned long psu_pll_init_data(void)
+{
+   psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E672C6CU);
+   psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00012D00U);
+   psu_mask_write(0xFF5E0030, 0x0008U, 0x0008U);
+   psu_mask_write(0xFF5E0030, 0x0001U, 0x0001U);
+   psu_mask_write(0xFF5E0030, 0x0001U, 0xU);
+   mask_poll(0xFF5E0040, 0x0002U);
+   psu_mask_write(0xFF5E0030, 0x0008U, 0xU);
+   psu_mask_write(0xFF5E0048, 0x3F00U, 0x0200U);
+   psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01012300U);
+   psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U);
+   psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U);
+   psu_mask_write(0xFF5E0020, 0x0008U, 0x0008U);
+   psu_mask_write(0xFF5E0020, 0x0001U, 0x0001U);
+   psu_mask_write(0xFF5E0020, 0x0001U, 0xU);
+   mask_poll(0xFF5E0040, 0x0001U);
+   psu_mask_write(0xFF5E0020, 0x0008U, 0xU);
+   psu_mask_write(0xFF5E0044, 0x3F00U, 0x0300U);
+   psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
+   psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
+   psu_mask_write(0xFD1A0020, 0x0008U, 0x0008U);
+   psu_mask_write(0xFD1A0020, 0x0001U, 0x0001U);
+   psu_mask_write(0xFD1A0020, 0x0001U, 0xU);
+   mask_poll(0xFD1A0044, 0x0001U);
+   psu_mask_write(0xFD1A0020, 0x0008U, 0xU);
+   psu_mask_write(0xFD1A0048, 0x3F00U, 0x0300U);
+   psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
+   psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
+   psu_mask_write(0xFD1A002C, 0x0008U, 0x0008U);
+   psu_mask_write(0xFD1A002C, 0x0001U, 0x0001U);
+   psu_mask_write(0xFD1A002C, 0x0001U, 0xU);
+   mask_poll(0xFD1A0044, 0x0002U);
+   psu_mask_write(0xFD1A002C, 0x0008U, 0xU);
+   psu_mask_write(0xFD1A004C, 0x3F00U, 0x0200U);
+   psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U);
+   psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015A00U);
+   psu_mask_write(0xFD1A0038, 0x0008U, 0x0008U);
+   psu_mask_write(0xFD1A0038, 0x0001U, 0x0001U);
+   psu_mask_write(0xFD1A0038, 0x0001U, 0xU);
+   mask_poll(0xFD1A0044, 0x0004U);
+   psu_mask_write(0xFD1A0038, 0x0008U, 0xU);
+   psu_mask_write(0xFD1A0050, 0x3F00U, 0x0300U);
+
+   return 1;
+}
+
+static unsigned long psu_clock_init_data(void)
+{
+   psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U);
+   psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
+   psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
+   psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U);
+   psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U);
+   psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U);
+   psu_mask_write(0xFF18030C, 0x0002U, 0xU);
+   psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
+   psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
+   psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
+   psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
+   psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
+   psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
+   psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
+   psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011E02U);
+   psu_mask_write(0xFF5E0104, 0x0007U, 0xU);
+   psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
+   psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);
+   psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010500U);
+   psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01010F03U);
+   psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010E03U);
+   psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
+   psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
+   

Re: [PATCH 2/2] uboot: fs/btrfs: Fix LZO false decompression error caused by pending zero

[Matthias Brugger]

Hi Qu,

On 19/03/2020 13:30, Qu Wenruo wrote:
> [BUG]
> For certain btrfs files with compressed file extent, uboot will fail to
> load it:
> 
>   btrfs_read_extent_reg: disk_bytenr=14229504 disk_len=73728 offset=0 
> nr_bytes=131
>   072
>   decompress_lzo: tot_len=70770
>   decompress_lzo: in_len=1389
>   decompress_lzo: in_len=2400
>   decompress_lzo: in_len=3002
>   decompress_lzo: in_len=1379
>   decompress_lzo: in_len=88539136
>   decompress_lzo: header error, in_len=88539136 clen=65534 tot_len=62580
> 
> NOTE: except the last line, all other lines are debug output.
> 
> [CAUSE]
> Btrfs lzo compression uses its own format to record compressed size
> (segmant header, LE32).
> 
> However to make decompression easier, we never put such segment header
> across page boundary.
> 
> In above case, the xxd dump of the lzo compressed data looks like this:
> 
> 1fe0: 4cdc 02fc 0bfd 02c0 dc02 0d13 0100 0001  L...
> 1ff0:  0008 0300   0011 |  
> 2000: 4705  0001 cc02    1e01  G...
> 
> '|' is the "expected" segment header start position.
> 
> But in that page, there are only 2 bytes left, can't contain the 4 bytes
> segment header.
> 
> So btrfs compression will skip that 2 bytes, put the segment header in
> next page directly.
> 
> Uboot doesn't have such check, and read the header with 2 bytes offset,
> result 0x0547 (88539136), other than the expected result
> 0x0547 (1351), resulting above error.
> 
> [FIX]
> Follow the btrfs-progs restore implementation, by introducing tot_in to
> record total processed bytes (including headers), and do proper page
> boundary skip to fix it.
> 
> Signed-off-by: Qu Wenruo 
> ---
>  fs/btrfs/compression.c | 20 
>  1 file changed, 20 insertions(+)
> 
> diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c
> index 4ef44ce11485..2a6ac8bb1029 100644
> --- a/fs/btrfs/compression.c
> +++ b/fs/btrfs/compression.c
> @@ -9,6 +9,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> @@ -17,6 +18,7 @@
>  static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, u32 dlen)
>  {
>   u32 tot_len, in_len, res;
> + u32 tot_in = 0;
>   size_t out_len;
>   int ret;
>  
> @@ -27,6 +29,7 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 
> *dbuf, u32 dlen)
>   cbuf += LZO_LEN;
>   clen -= LZO_LEN;
>   tot_len -= LZO_LEN;
> + tot_in += LZO_LEN;
>  
>   if (tot_len == 0 && dlen)
>   return -1;
> @@ -36,6 +39,9 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 
> *dbuf, u32 dlen)
>   res = 0;
>  
>   while (tot_len > LZO_LEN) {
> + size_t mod_page;
> + size_t rem_page;
> +
>   in_len = le32_to_cpu(get_unaligned((u32 *)cbuf));
>   cbuf += LZO_LEN;
>   clen -= LZO_LEN;
> @@ -44,6 +50,7 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 
> *dbuf, u32 dlen)
>   return -1;
>  
>   tot_len -= (LZO_LEN + in_len);
> + tot_in += (LZO_LEN + in_len);
>  
>   out_len = dlen;
>   ret = lzo1x_decompress_safe(cbuf, in_len, dbuf, _len);
> @@ -56,6 +63,19 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 
> *dbuf, u32 dlen)
>   dlen -= out_len;
>  
>   res += out_len;
> +
> + /*
> +  * If the 4 bytes header does not fit to the rest of the page we
> +  * have to move to next one, or we read some garbage.
> +  */
> + mod_page = tot_in % PAGE_SIZE;

in U-Boot we use 4K page sizes, but the OS could use another page size (16K or
64k). Would we need to adapt that code to reflect which page size is used on the
medium we want to access?

Regards,
Matthias

> + rem_page = PAGE_SIZE - mod_page;
> + if (rem_page < LZO_LEN) {
> + cbuf += rem_page;
> + tot_in += rem_page;
> + clen -= rem_page;
> + tot_len -= rem_page;
> + }
>   }
>  
>   return res;
> 

Re: [PATCH] mtd: spi-nor-core: call WATCHDOG_RESET() in spi_nor_ready()

[Vignesh Raghavendra]

On 19/03/20 6:14 pm, Rasmus Villemoes wrote:
>> Hmm, Watchdog seems to be set to trigger after ~2s of inactivity. Isn't
>> that too small? WATCHDOG_RESET() resets only once per second, so 2
>> second timeout is too close IMO.
>>
>> Typical watchdog timeouts are usually in tens of seconds
> Nope, not with this external gpio-triggered one. The data sheet says
> 
> Watchdog timeout period 1.12/1.60/2.24 (min/typ/max)
> 
> so ~2 seconds sounds about right - and I have to account for other
> instances of the board that may be a lot closer to the minimum. The
> timeout is fixed, nothing in software can affect it. So you see why I
> cannot afford to let spi flash operations take several seconds to
> complete without a WATCHDOG_RESET().
> 
> And yes, I'm very well aware of the rate-limiting imposed by the
> wdt-provided watchdog_reset() function - that's mostly a solved problem:
> https://patchwork.ozlabs.org/project/uboot/list/?series=164254
> 

Understood.

> For the read side, it seems that just replacing the UINT_MAX in the two
> copies of spi_nor_read_data with some smaller constant should suffice.
> But I don't know if I should make that smaller constant a CONFIG_*
> option or just pick something like 256K. Thoughts?

Breaking reads into smaller units unconditionally will cause performance
regressions. But I would like to avoid adding new CONFIG option as well.

How about resetting the watchdog in the SPI driver's read
implementation? Or setting max_read_size (in struct spi_slave) to
smaller value in the SPI controller driver to force fragmentation of reads?

Re: [PATCH] mtd: spi-nor-core: call WATCHDOG_RESET() in spi_nor_ready()

[Rasmus Villemoes]

On 19/03/2020 13.28, Vignesh Raghavendra wrote:
> 
> 
> On 19/03/20 5:09 pm, Rasmus Villemoes wrote:
>> On 19/03/2020 12.25, Vignesh Raghavendra wrote:
>>> Hi,
> [...]
 @@ -399,6 +400,7 @@ static int spi_nor_ready(struct spi_nor *nor)
  {
int sr, fsr;
  
 +  WATCHDOG_RESET();
>>>
>>> Is it necessary to reset watchdog for every status register read? How
>>> small is the timeout? Resetting too often will impact performance
>>> depending on overhead of this call.
>>>
>>> Is it not sufficient to reset watchdog once per page write (in
>>> spi_nor_write()) and once per sector erase (in spi_nor_erase())?
>>>
>>
>> Probably, yes. I was a bit torn between putting the call here or in
>> spi_nor_wait_till_ready(). That should do it once per erase/page write
>> which should be fine (well, if the busy-looping for spi_nor_ready takes
>> more than the watchdog timeout, the board will reset, but I don't think
>> the flash is that bad).>
>> I'll test that, but I just found out I'll need something in the read
>> path as well. Reading 1MB works fine, reading 2MB resets:
>>
>> [2020-03-19 12:31:11.923] => echo a ; sf read $loadaddr 0 0x10 ; echo b
>> [2020-03-19 12:31:32.724] a
>> [2020-03-19 12:31:32.724] device 0 offset 0x0, size 0x10
>> [2020-03-19 12:31:33.586] SF: 1048576 bytes @ 0x0 Read: OK
>> [2020-03-19 12:31:33.586] b
>> [2020-03-19 12:31:33.586] => echo a ; sf read $loadaddr 0 0x20 ; echo b
>> [2020-03-19 12:31:40.771] a
>> [2020-03-19 12:31:40.771] device 0 offset 0x0, size 0x20
>> [2020-03-19 12:31:42.666]
>> [2020-03-19 12:31:42.666] U-Boot SPL 2020.01-00078-g058da1a-dirty (Mar
>> 17 2020 - 16:27:58 +)
>>
> 
> Hmm, Watchdog seems to be set to trigger after ~2s of inactivity. Isn't
> that too small? WATCHDOG_RESET() resets only once per second, so 2
> second timeout is too close IMO.
> 
> Typical watchdog timeouts are usually in tens of seconds

Nope, not with this external gpio-triggered one. The data sheet says

Watchdog timeout period 1.12/1.60/2.24 (min/typ/max)

so ~2 seconds sounds about right - and I have to account for other
instances of the board that may be a lot closer to the minimum. The
timeout is fixed, nothing in software can affect it. So you see why I
cannot afford to let spi flash operations take several seconds to
complete without a WATCHDOG_RESET().

And yes, I'm very well aware of the rate-limiting imposed by the
wdt-provided watchdog_reset() function - that's mostly a solved problem:
https://patchwork.ozlabs.org/project/uboot/list/?series=164254

For the read side, it seems that just replacing the UINT_MAX in the two
copies of spi_nor_read_data with some smaller constant should suffice.
But I don't know if I should make that smaller constant a CONFIG_*
option or just pick something like 256K. Thoughts?

Rasmus

[PATCH 2/2] uboot: fs/btrfs: Fix LZO false decompression error caused by pending zero

[Qu Wenruo]

[BUG]
For certain btrfs files with compressed file extent, uboot will fail to
load it:

  btrfs_read_extent_reg: disk_bytenr=14229504 disk_len=73728 offset=0 
nr_bytes=131
  072
  decompress_lzo: tot_len=70770
  decompress_lzo: in_len=1389
  decompress_lzo: in_len=2400
  decompress_lzo: in_len=3002
  decompress_lzo: in_len=1379
  decompress_lzo: in_len=88539136
  decompress_lzo: header error, in_len=88539136 clen=65534 tot_len=62580

NOTE: except the last line, all other lines are debug output.

[CAUSE]
Btrfs lzo compression uses its own format to record compressed size
(segmant header, LE32).

However to make decompression easier, we never put such segment header
across page boundary.

In above case, the xxd dump of the lzo compressed data looks like this:

1fe0: 4cdc 02fc 0bfd 02c0 dc02 0d13 0100 0001  L...
1ff0:  0008 0300   0011 |  
2000: 4705  0001 cc02    1e01  G...

'|' is the "expected" segment header start position.

But in that page, there are only 2 bytes left, can't contain the 4 bytes
segment header.

So btrfs compression will skip that 2 bytes, put the segment header in
next page directly.

Uboot doesn't have such check, and read the header with 2 bytes offset,
result 0x0547 (88539136), other than the expected result
0x0547 (1351), resulting above error.

[FIX]
Follow the btrfs-progs restore implementation, by introducing tot_in to
record total processed bytes (including headers), and do proper page
boundary skip to fix it.

Signed-off-by: Qu Wenruo 
---
 fs/btrfs/compression.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c
index 4ef44ce11485..2a6ac8bb1029 100644
--- a/fs/btrfs/compression.c
+++ b/fs/btrfs/compression.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -17,6 +18,7 @@
 static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, u32 dlen)
 {
u32 tot_len, in_len, res;
+   u32 tot_in = 0;
size_t out_len;
int ret;
 
@@ -27,6 +29,7 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, 
u32 dlen)
cbuf += LZO_LEN;
clen -= LZO_LEN;
tot_len -= LZO_LEN;
+   tot_in += LZO_LEN;
 
if (tot_len == 0 && dlen)
return -1;
@@ -36,6 +39,9 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, 
u32 dlen)
res = 0;
 
while (tot_len > LZO_LEN) {
+   size_t mod_page;
+   size_t rem_page;
+
in_len = le32_to_cpu(get_unaligned((u32 *)cbuf));
cbuf += LZO_LEN;
clen -= LZO_LEN;
@@ -44,6 +50,7 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, 
u32 dlen)
return -1;
 
tot_len -= (LZO_LEN + in_len);
+   tot_in += (LZO_LEN + in_len);
 
out_len = dlen;
ret = lzo1x_decompress_safe(cbuf, in_len, dbuf, _len);
@@ -56,6 +63,19 @@ static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 
*dbuf, u32 dlen)
dlen -= out_len;
 
res += out_len;
+
+   /*
+* If the 4 bytes header does not fit to the rest of the page we
+* have to move to next one, or we read some garbage.
+*/
+   mod_page = tot_in % PAGE_SIZE;
+   rem_page = PAGE_SIZE - mod_page;
+   if (rem_page < LZO_LEN) {
+   cbuf += rem_page;
+   tot_in += rem_page;
+   clen -= rem_page;
+   tot_len -= rem_page;
+   }
}
 
return res;
-- 
2.25.1

[PATCH 1/2] uboot: fs/btrfs: Use LZO_LEN to replace immediate number

[Qu Wenruo]

Just a cleanup. The immediate number makes my eye hurt.

Signed-off-by: Qu Wenruo 
---
 fs/btrfs/compression.c | 22 --
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c
index 346875d45a1b..4ef44ce11485 100644
--- a/fs/btrfs/compression.c
+++ b/fs/btrfs/compression.c
@@ -12,36 +12,38 @@
 #include 
 #include 
 
+/* Header for each segment, LE32, recording the compressed size */
+#define LZO_LEN4
 static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, u32 dlen)
 {
u32 tot_len, in_len, res;
size_t out_len;
int ret;
 
-   if (clen < 4)
+   if (clen < LZO_LEN)
return -1;
 
tot_len = le32_to_cpu(get_unaligned((u32 *)cbuf));
-   cbuf += 4;
-   clen -= 4;
-   tot_len -= 4;
+   cbuf += LZO_LEN;
+   clen -= LZO_LEN;
+   tot_len -= LZO_LEN;
 
if (tot_len == 0 && dlen)
return -1;
-   if (tot_len < 4)
+   if (tot_len < LZO_LEN)
return -1;
 
res = 0;
 
-   while (tot_len > 4) {
+   while (tot_len > LZO_LEN) {
in_len = le32_to_cpu(get_unaligned((u32 *)cbuf));
-   cbuf += 4;
-   clen -= 4;
+   cbuf += LZO_LEN;
+   clen -= LZO_LEN;
 
-   if (in_len > clen || tot_len < 4 + in_len)
+   if (in_len > clen || tot_len < LZO_LEN + in_len)
return -1;
 
-   tot_len -= 4 + in_len;
+   tot_len -= (LZO_LEN + in_len);
 
out_len = dlen;
ret = lzo1x_decompress_safe(cbuf, in_len, dbuf, _len);
-- 
2.25.1