[PATCH] imx6: aristainetos: sync defconfig with 2020.10
as patch gpio: search for gpio label if gpio is not found through bank name is now in mainline, but functionality is disabled, we need to enable CONFIG_DM_GPIO_LOOKUP_LABEL for the aristainetos boards. Signed-off-by: Heiko Schocher --- I did not trigger a travis build as this patch only changes aristainetos defconfigs, which now work again with my automated tbot build: http://xeidos.ddns.net/ubtestresults/result/224 configs/aristainetos2_defconfig | 3 ++- configs/aristainetos2b_defconfig| 3 ++- configs/aristainetos2bcsl_defconfig | 3 ++- configs/aristainetos2c_defconfig| 3 ++- 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index 6befc89a4c..07b7b4d46f 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET_REDUND=0xE CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set # CONFIG_CMD_NANDBCB is not set +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2_4" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg" CONFIG_BOOTDELAY=3 @@ -53,7 +54,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2_4" CONFIG_OF_LIST="imx6dl-aristainetos2_4 imx6dl-aristainetos2_7" CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y @@ -62,6 +62,7 @@ CONFIG_ENV_SPI_EARLY=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_GPIO_HOG=y +CONFIG_DM_GPIO_LOOKUP_LABEL=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_LED=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index 1dbf432c7c..3bb1f6c681 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0xE CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2b_4" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg" CONFIG_BOOTDELAY=3 @@ -51,7 +52,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2b_4" CONFIG_OF_LIST="imx6dl-aristainetos2b_4 imx6dl-aristainetos2b_7" CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y @@ -60,6 +60,7 @@ CONFIG_ENV_SPI_EARLY=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_GPIO_HOG=y +CONFIG_DM_GPIO_LOOKUP_LABEL=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_LED=y diff --git a/configs/aristainetos2bcsl_defconfig b/configs/aristainetos2bcsl_defconfig index 010988452b..33af6ffaec 100644 --- a/configs/aristainetos2bcsl_defconfig +++ b/configs/aristainetos2bcsl_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0xE CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2b_csl_4" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg" CONFIG_BOOTDELAY=3 @@ -51,7 +52,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2b_csl_4" CONFIG_OF_LIST="imx6dl-aristainetos2b_csl_4 imx6dl-aristainetos2b_csl_7" CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y @@ -60,6 +60,7 @@ CONFIG_ENV_SPI_EARLY=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_GPIO_HOG=y +CONFIG_DM_GPIO_LOOKUP_LABEL=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_LED=y diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index 677c2ed00b..a69c9635a7 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0xE CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_4" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg" CONFIG_BOOTDELAY=3 @@ -51,7 +52,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_4" CONFIG_OF_LIST="imx6dl-aristainetos2c_4 imx6dl-aristainetos2c_7" CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y @@ -63,6 +63,7 @@ CONFIG_APBH_DMA=y CONFIG_APBH_DMA_BURST=y CONFIG_APBH_DMA_BURST8=y CONFIG_GPIO_HOG=y +CONFIG_DM_GPIO_LOOKUP_LABEL=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_LED=y -- 2.24.1
Re: [PATCH 6/6] mmc_spi: generate R1b response for erase and stop transmission command
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel wrote: > > As per the SD physical layer specification version 7.10, erase > command (CMD38) and stop transmission command (CMD12) will generate > R1b response. > > R1b = R1 + busy signal > > A non-zero value after the R1 response indicates card is ready for > next command. > > Signed-off-by: Pragnesh Patel > --- > drivers/mmc/mmc_spi.c | 32 > 1 file changed, 28 insertions(+), 4 deletions(-) > Reviewed-by: Bin Meng Tested-by: Bin Meng
Re: [PATCH 5/6] mmc: mmc_spi: Generate R1 response for erase block start and end address
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel wrote: > > Erase block start address (CMD32) and erase block end address (CMD33) > command will generate R1 response for mmc SPI mode. > > R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response > for this commands. > > Signed-off-by: Pragnesh Patel > --- > drivers/mmc/mmc_spi.c | 2 ++ > 1 file changed, 2 insertions(+) > Reviewed-by: Bin Meng Tested-by: Bin Meng
Re: [PATCH 2/6] mmc: mmc_spi: generate R1 response for different mmc SPI commands
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel wrote: > > R1 response is 1 byte long for mmc SPI commands as per the updated > physical layer specification version 7.10. > > So correct the resp and resp_size for existing commands > > Signed-off-by: Pragnesh Patel > --- > drivers/mmc/mmc_spi.c | 2 ++ > 1 file changed, 2 insertions(+) > Reviewed-by: Bin Meng Tested-by: Bin Meng
Re: [PATCH 3/6] mmc: read ssr for SD spi
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel wrote: > > The content of ssr is useful only for erase operations. > This saves erase time. > > Signed-off-by: Pragnesh Patel > Reviewed-by: Bin Meng > --- > drivers/mmc/mmc.c | 5 + > drivers/mmc/mmc_spi.c | 1 + > 2 files changed, 6 insertions(+) > Tested-by: Bin Meng
Re: [PATCH 1/6] mmc: mmc_spi: correct the while condition
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel wrote: > > When variable i will become 0, while(i--) loop breaks but variable i will > again decrement to -1 because of i-- and that's why below condition > "if (!i && (r != resp_match_value)" will never execute, So doing "i--" > inside of while() loop solves this problem. > > Signed-off-by: Pragnesh Patel > Reviewed-by: Bin Meng > --- > drivers/mmc/mmc_spi.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > Tested-by: Bin Meng
Re: [PATCH 4/6] mmc: mmc_spi: Read R2 response for send status command - CMD13
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel wrote: > > Send status command (CMD13) will send R1 response under SD mode > but R2 response under SPI mode. > > R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode > > Signed-off-by: Pragnesh Patel > --- > drivers/mmc/mmc_spi.c | 11 --- > 1 file changed, 8 insertions(+), 3 deletions(-) > Reviewed-by: Bin Meng Tested-by: Bin Meng
Re: [PATCH v9 1/2] i2c: i2c-cortina: added CAxxxx I2C support
Ok with us. Thanks > On Jul 7, 2020, at 9:21 PM, Heiko Schocher wrote: > > Hello Alex, Arthur, > >> Am 06.07.2020 um 11:22 schrieb Heiko Schocher: >> Hello Alex, Arthur, >>> Am 01.06.2020 um 21:56 schrieb Alex Nemirovsky: >>> From: Arthur Li >>> >>> Add I2C controller support for Cortina Access CA SoCs >>> >>> Signed-off-by: Arthur Li >>> Signed-off-by: Alex Nemirovsky >>> CC: Heiko Schocher >>> Reviewed-by: Heiko Schocher >>> >>> --- >>> >>> Changes in v9: >>> - specially include bitops.h and delay.h which >>> were removed from common.h >>> >>> Changes in v8: >>> - No code change >>> - Split out individual driver from Cortina Package 2 patch series >>> to help streamline acceptence into master >>> >>> Changes in v7: >>> - Added additional description info in I2C KConfig >>> >>> Changes in v6: >>> - Add I2C DT binding document >>> >>> Changes in v4: >>> - Utilize standard I2C macros from >>> - Return ETIMEDOUT in funcs that can timeout >>> - Return i2c_xfer_init() result to caller of i2c_read() if it >>> fails within i2c_read() execution >>> - Fix misc. style guide conformance issues >>> - Use printf() to report i2c_xfer() runtime errors >>> instead of debug() >>> >>> MAINTAINERS | 4 + >>> doc/device-tree-bindings/i2c/i2c-cortina.txt | 18 ++ >>> drivers/i2c/Kconfig | 8 + >>> drivers/i2c/Makefile | 1 + >>> drivers/i2c/i2c-cortina.c| 346 >>> +++ >>> drivers/i2c/i2c-cortina.h| 87 +++ >>> 6 files changed, 464 insertions(+) >>> create mode 100644 doc/device-tree-bindings/i2c/i2c-cortina.txt >>> create mode 100644 drivers/i2c/i2c-cortina.c >>> create mode 100644 drivers/i2c/i2c-cortina.h >> travis build fails: >> https://travis-ci.org/github/hsdenx/u-boot-i2c/jobs/705286814#L1358 >> seems you need to add: >> #include > > Fixed this and travis builds now fine, so no need for any action. > > https://github.com/hsdenx/u-boot-i2c/commits/work > https://github.com/hsdenx/u-boot-i2c/commit/231d2c0eb38d74761eb6a43a08240e84e9ee397a > > I just started a new travis build as I did a rebase to latest mainline, > if this works I send pull request to Tom. > > bye, > Heiko > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
[PATCH v3 13/13] test/py: efi_secboot: add a test for verifying with digest of signed image
Signature database (db or dbx) may have not only certificates that contain
a public key for RSA decryption, but also digests of signed images.
In this test case, if database has an image's digest (EFI_CERT_SHA256_GUID)
and if the value matches to a hash value calculated from image's binary,
authentication should pass in case of db, and fail in case of dbx.
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_secboot/conftest.py| 10
test/py/tests/test_efi_secboot/test_signed.py | 49 +++
2 files changed, 59 insertions(+)
diff --git a/test/py/tests/test_efi_secboot/conftest.py
b/test/py/tests/test_efi_secboot/conftest.py
index c7da1a6e29a3..553550ee02b1 100644
--- a/test/py/tests/test_efi_secboot/conftest.py
+++ b/test/py/tests/test_efi_secboot/conftest.py
@@ -120,6 +120,10 @@ def efi_boot_env(request, u_boot_config):
check_call('cd %s; %scert-to-efi-hash-list -g %s -t 0 -s 256 db1.crt
dbx_hash1.crl; %ssign-efi-sig-list -c KEK.crt -k KEK.key dbx dbx_hash1.crl
dbx_hash1.auth'
% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
shell=True)
+## dbx_db (with TEST_db certificate)
+check_call('cd %s; %ssign-efi-sig-list -c KEK.crt -k KEK.key dbx
db.esl dbx_db.auth'
+ % (mnt_point, EFITOOLS_PATH),
+ shell=True)
# Copy image
check_call('cp %s %s' % (HELLO_PATH, mnt_point), shell=True)
@@ -134,6 +138,12 @@ def efi_boot_env(request, u_boot_config):
check_call('cd %s; %shash-to-efi-sig-list helloworld.efi
db_hello.hash; %ssign-efi-sig-list -t "2020-04-07" -c KEK.crt -k KEK.key db
db_hello.hash db_hello.auth'
% (mnt_point, EFITOOLS_PATH, EFITOOLS_PATH),
shell=True)
+check_call('cd %s; %shash-to-efi-sig-list helloworld.efi.signed
db_hello_signed.hash; %ssign-efi-sig-list -c KEK.crt -k KEK.key db
db_hello_signed.hash db_hello_signed.auth'
+ % (mnt_point, EFITOOLS_PATH, EFITOOLS_PATH),
+ shell=True)
+check_call('cd %s; %ssign-efi-sig-list -c KEK.crt -k KEK.key dbx
db_hello_signed.hash dbx_hello_signed.auth'
+ % (mnt_point, EFITOOLS_PATH),
+ shell=True)
check_call('sudo umount %s' % loop_dev, shell=True)
check_call('sudo losetup -d %s' % loop_dev, shell=True)
diff --git a/test/py/tests/test_efi_secboot/test_signed.py
b/test/py/tests/test_efi_secboot/test_signed.py
index 1a31a57e12c2..7531bbac6a5f 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -198,3 +198,52 @@ class TestEfiSignedImage(object):
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
+
+def test_efi_signed_image_auth6(self, u_boot_console, efi_boot_env):
+"""
+Test Case 6 - using digest of signed image in database
+"""
+u_boot_console.restart_uboot()
+disk_img = efi_boot_env
+with u_boot_console.log.section('Test Case 6a'):
+# Test Case 6a, verified by image's digest in db
+output = u_boot_console.run_command_list([
+'host bind 0 %s' % disk_img,
+'fatload host 0:1 400 db_hello_signed.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize db',
+'fatload host 0:1 400 KEK.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize KEK',
+'fatload host 0:1 400 PK.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize PK'])
+assert 'Failed to set EFI variable' not in ''.join(output)
+output = u_boot_console.run_command_list([
+'efidebug boot add 1 HELLO host 0:1 /helloworld.efi.signed ""',
+'efidebug boot next 1',
+'bootefi bootmgr'])
+assert 'Hello, world!' in ''.join(output)
+
+with u_boot_console.log.section('Test Case 6b'):
+# Test Case 6b, rejected by TEST_db certificate in dbx
+output = u_boot_console.run_command_list([
+'fatload host 0:1 400 dbx_db.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize dbx'])
+assert 'Failed to set EFI variable' not in ''.join(output)
+output = u_boot_console.run_command_list([
+'efidebug boot next 1',
+'efidebug test bootmgr'])
+assert '\'HELLO\' failed' in ''.join(output)
+assert 'efi_start_image() returned: 26' in ''.join(output)
+
+with u_boot_console.log.section('Test Case 6c'):
+# Test Case 6c, rejected by image's digest in dbx
+output = u_boot_console.run_command_list([
+'fatload host 0:1 400 db.auth',
+'setenv -e -nv -bs -rt -at
[PATCH] Revert "riscv: Clean up IPI initialization code"
From: Bin Meng
This reverts commit 40686c394e533fec765fe237936e353c84e73fff.
Commit 40686c394e53 ("riscv: Clean up IPI initialization code")
caused U-Boot failed to boot on SiFive HiFive Unleashed board.
The codes inside arch_cpu_init_dm() may call U-Boot timer APIs
before the call to riscv_init_ipi(). At that time the timer register
base (e.g.: the SiFive CLINT device in this case) is unknown yet.
It might be the name riscv_init_ipi() that misleads people to only
consider it is related to IPI, but in fact the timer capability is
provided by the same SiFive CLINT device that provides the IPI.
Timer capability is needed for both UP and SMP.
As the commit was a clean up attempt which did not bring in any
other benefits than to break the SiFive HiFive Unleashed board,
revert it.
Signed-off-by: Bin Meng
---
arch/riscv/cpu/cpu.c | 6 --
arch/riscv/include/asm/smp.h | 43 -
arch/riscv/lib/andes_plic.c | 34 +++---
arch/riscv/lib/sbi_ipi.c | 5 -
arch/riscv/lib/sifive_clint.c | 33 +++--
arch/riscv/lib/smp.c | 49 ---
common/spl/spl_opensbi.c | 5 -
7 files changed, 86 insertions(+), 89 deletions(-)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index bbd6c15..d8b98ad 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -107,12 +107,6 @@ int arch_cpu_init_dm(void)
#endif
}
-#ifdef CONFIG_SMP
- ret = riscv_init_ipi();
- if (ret)
- return ret;
-#endif
-
return 0;
}
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 1b42885..74de92e 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -51,47 +51,4 @@ void handle_ipi(ulong hart);
*/
int smp_call_function(ulong addr, ulong arg0, ulong arg1, int wait);
-/**
- * riscv_init_ipi() - Initialize inter-process interrupt (IPI) driver
- *
- * Platform code must provide this function. This function is called once after
- * the cpu driver is initialized. No other riscv_*_ipi() calls will be made
- * before this function is called.
- *
- * @return 0 if OK, -ve on error
- */
-int riscv_init_ipi(void);
-
-/**
- * riscv_send_ipi() - Send inter-processor interrupt (IPI)
- *
- * Platform code must provide this function.
- *
- * @hart: Hart ID of receiving hart
- * @return 0 if OK, -ve on error
- */
-int riscv_send_ipi(int hart);
-
-/**
- * riscv_clear_ipi() - Clear inter-processor interrupt (IPI)
- *
- * Platform code must provide this function.
- *
- * @hart: Hart ID of hart to be cleared
- * @return 0 if OK, -ve on error
- */
-int riscv_clear_ipi(int hart);
-
-/**
- * riscv_get_ipi() - Get status of inter-processor interrupt (IPI)
- *
- * Platform code must provide this function.
- *
- * @hart: Hart ID of hart to be checked
- * @pending: Pointer to variable with result of the check,
- * 1 if IPI is pending, 0 otherwise
- * @return 0 if OK, -ve on error
- */
-int riscv_get_ipi(int hart, int *pending);
-
#endif
diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c
index 5cf29df..20529ab 100644
--- a/arch/riscv/lib/andes_plic.c
+++ b/arch/riscv/lib/andes_plic.c
@@ -30,6 +30,20 @@
#define SEND_IPI_TO_HART(hart) (0x80 >> (hart))
DECLARE_GLOBAL_DATA_PTR;
+static int init_plic(void);
+
+#define PLIC_BASE_GET(void)\
+ do {\
+ long *ret; \
+ \
+ if (!gd->arch.plic) { \
+ ret = syscon_get_first_range(RISCV_SYSCON_PLIC); \
+ if (IS_ERR(ret))\
+ return PTR_ERR(ret);\
+ gd->arch.plic = ret;\
+ init_plic();\
+ } \
+ } while (0)
static int enable_ipi(int hart)
{
@@ -79,21 +93,13 @@ static int init_plic(void)
return -ENODEV;
}
-int riscv_init_ipi(void)
-{
- long *ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
-
- if (IS_ERR(ret))
- return PTR_ERR(ret);
- gd->arch.plic = ret;
-
- return init_plic();
-}
-
int riscv_send_ipi(int hart)
{
- unsigned int ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart));
+ unsigned int ipi;
+
+ PLIC_BASE_GET();
+ ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart));
writel(ipi, (void __iomem *)PENDING_REG(gd->arch.plic,
gd->arch.boot_hart));
@@ -104,6 +110,8 @@ int riscv_clear_ipi(int hart)
{
u32
[PATCH v3 09/13] test/py: efi_secboot: more fixes against pylint
More fixes against pylint warnings that autopep8 didn't handle
in the previous commit.
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_secboot/conftest.py| 11 +--
.../py/tests/test_efi_secboot/test_authvar.py | 91 +--
test/py/tests/test_efi_secboot/test_signed.py | 31 +++
.../tests/test_efi_secboot/test_unsigned.py | 29 +++---
4 files changed, 79 insertions(+), 83 deletions(-)
diff --git a/test/py/tests/test_efi_secboot/conftest.py
b/test/py/tests/test_efi_secboot/conftest.py
index 82bc8886c4da..c0ee8be9f7c7 100644
--- a/test/py/tests/test_efi_secboot/conftest.py
+++ b/test/py/tests/test_efi_secboot/conftest.py
@@ -4,9 +4,8 @@
import os
import os.path
-import pytest
-import re
from subprocess import call, check_call, check_output, CalledProcessError
+import pytest
from defs import *
# from test/py/conftest.py
@@ -14,8 +13,8 @@ from defs import *
def tool_is_in_path(tool):
for path in os.environ["PATH"].split(os.pathsep):
-fn = os.path.join(path, tool)
-if os.path.isfile(fn) and os.access(fn, os.X_OK):
+full_path = os.path.join(path, tool)
+if os.path.isfile(full_path) and os.access(full_path, os.X_OK):
return True
return False
@@ -128,8 +127,8 @@ def efi_boot_env(request, u_boot_config):
check_call('sudo umount %s' % loop_dev, shell=True)
check_call('sudo losetup -d %s' % loop_dev, shell=True)
-except CalledProcessError as e:
-pytest.skip('Setup failed: %s' % e.cmd)
+except CalledProcessError as exception:
+pytest.skip('Setup failed: %s' % exception.cmd)
return
else:
yield image_path
diff --git a/test/py/tests/test_efi_secboot/test_authvar.py
b/test/py/tests/test_efi_secboot/test_authvar.py
index 359adba4b4b7..d0c6b9035b1b 100644
--- a/test/py/tests/test_efi_secboot/test_authvar.py
+++ b/test/py/tests/test_efi_secboot/test_authvar.py
@@ -9,7 +9,6 @@ This test verifies variable authentication
"""
import pytest
-from defs import *
@pytest.mark.boardspec('sandbox')
@@ -29,18 +28,18 @@ class TestEfiAuthVar(object):
output = u_boot_console.run_command_list([
'host bind 0 %s' % disk_img,
'printenv -e SecureBoot'])
-assert(': 00' in ''.join(output))
+assert ': 00' in ''.join(output)
output = u_boot_console.run_command(
'printenv -e SetupMode')
-assert(': 01' in output)
+assert ': 01' in output
with u_boot_console.log.section('Test Case 1b'):
# Test Case 1b, PK without AUTHENTICATED_WRITE_ACCESS
output = u_boot_console.run_command_list([
'fatload host 0:1 400 PK.auth',
'setenv -e -nv -bs -rt -i 400,$filesize PK'])
-assert('Failed to set EFI variable' in ''.join(output))
+assert 'Failed to set EFI variable' in ''.join(output)
with u_boot_console.log.section('Test Case 1c'):
# Test Case 1c, install PK
@@ -48,79 +47,79 @@ class TestEfiAuthVar(object):
'fatload host 0:1 400 PK.auth',
'setenv -e -nv -bs -rt -at -i 400,$filesize PK',
'printenv -e -n PK'])
-assert('PK:' in ''.join(output))
+assert 'PK:' in ''.join(output)
output = u_boot_console.run_command(
'printenv -e SecureBoot')
-assert(': 01' in output)
+assert ': 01' in output
output = u_boot_console.run_command(
'printenv -e SetupMode')
-assert(': 00' in output)
+assert ': 00' in output
with u_boot_console.log.section('Test Case 1d'):
# Test Case 1d, db/dbx without KEK
output = u_boot_console.run_command_list([
'fatload host 0:1 400 db.auth',
'setenv -e -nv -bs -rt -at -i 400,$filesize db'])
-assert('Failed to set EFI variable' in ''.join(output))
+assert 'Failed to set EFI variable' in ''.join(output)
output = u_boot_console.run_command_list([
'fatload host 0:1 400 db.auth',
'setenv -e -nv -bs -rt -at -i 400,$filesize dbx'])
-assert('Failed to set EFI variable' in ''.join(output))
+assert 'Failed to set EFI variable' in ''.join(output)
with u_boot_console.log.section('Test Case 1e'):
# Test Case 1e, install KEK
output = u_boot_console.run_command_list([
'fatload host 0:1 400 KEK.auth',
'setenv -e -nv -bs -rt -i 400,$filesize KEK'])
-assert('Failed to set EFI variable' in ''.join(output))
+assert 'Failed to set EFI variable' in ''.join(output)
output =
[PATCH v3 08/13] test/py: efi_secboot: apply autopep8
Python's autopep8 can automatically correct some of warnings from pylint
and rewrite the code in a pretty print format. So just do it.
Signed-off-by: AKASHI Takahiro
Suggested-by: Heinrich Schuchardt
---
test/py/tests/test_efi_secboot/conftest.py| 74 ++-
test/py/tests/test_efi_secboot/defs.py| 14 ++--
.../py/tests/test_efi_secboot/test_authvar.py | 1 +
test/py/tests/test_efi_secboot/test_signed.py | 1 +
.../tests/test_efi_secboot/test_unsigned.py | 37 +-
5 files changed, 67 insertions(+), 60 deletions(-)
diff --git a/test/py/tests/test_efi_secboot/conftest.py
b/test/py/tests/test_efi_secboot/conftest.py
index ac5a780fdb70..82bc8886c4da 100644
--- a/test/py/tests/test_efi_secboot/conftest.py
+++ b/test/py/tests/test_efi_secboot/conftest.py
@@ -10,6 +10,8 @@ from subprocess import call, check_call, check_output,
CalledProcessError
from defs import *
# from test/py/conftest.py
+
+
def tool_is_in_path(tool):
for path in os.environ["PATH"].split(os.pathsep):
fn = os.path.join(path, tool)
@@ -20,13 +22,15 @@ def tool_is_in_path(tool):
#
# Fixture for UEFI secure boot test
#
+
+
@pytest.fixture(scope='session')
def efi_boot_env(request, u_boot_config):
"""Set up a file system to be used in UEFI secure boot test.
Args:
request: Pytest request object.
- u_boot_config: U-boot configuration.
+u_boot_config: U-boot configuration.
Return:
A path to disk image to be used for testing
@@ -48,20 +52,20 @@ def efi_boot_env(request, u_boot_config):
# create a disk/partition
check_call('dd if=/dev/zero of=%s bs=1MiB count=%d'
-% (image_path, image_size), shell=True)
+ % (image_path, image_size), shell=True)
check_call('sgdisk %s -n 1:0:+%dMiB'
-% (image_path, part_size), shell=True)
+ % (image_path, part_size), shell=True)
# create a file system
check_call('dd if=/dev/zero of=%s.tmp bs=1MiB count=%d'
-% (image_path, part_size), shell=True)
+ % (image_path, part_size), shell=True)
check_call('mkfs -t %s %s.tmp' % (fs_type, image_path), shell=True)
check_call('dd if=%s.tmp of=%s bs=1MiB seek=1 count=%d conv=notrunc'
-% (image_path, image_path, 1), shell=True)
+ % (image_path, image_path, 1), shell=True)
check_call('rm %s.tmp' % image_path, shell=True)
loop_dev = check_output('sudo losetup -o 1MiB --sizelimit %dMiB --show
-f %s | tr -d "\n"'
% (part_size, image_path), shell=True).decode()
check_output('sudo mount -t %s -o umask=000 %s %s'
-% (fs_type, loop_dev, mnt_point), shell=True)
+ % (fs_type, loop_dev, mnt_point), shell=True)
# suffix
# *.key: RSA private key in PEM
@@ -73,53 +77,53 @@ def efi_boot_env(request, u_boot_config):
# *.efi.signed: signed UEFI image
# Create signature database
-## PK
+# PK
check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj
/CN=TEST_PK/ -keyout PK.key -out PK.crt -nodes -days 365'
-% mnt_point, shell=True)
+ % mnt_point, shell=True)
check_call('cd %s; %scert-to-efi-sig-list -g %s PK.crt PK.esl;
%ssign-efi-sig-list -t "2020-04-01" -c PK.crt -k PK.key PK PK.esl PK.auth'
-% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
-shell=True)
-## PK_null for deletion
+ % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
+ shell=True)
+# PK_null for deletion
check_call('cd %s; touch PK_null.esl; %ssign-efi-sig-list -t
"2020-04-02" -c PK.crt -k PK.key PK PK_null.esl PK_null.auth'
-% (mnt_point, EFITOOLS_PATH), shell=True)
-## KEK
+ % (mnt_point, EFITOOLS_PATH), shell=True)
+# KEK
check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj
/CN=TEST_KEK/ -keyout KEK.key -out KEK.crt -nodes -days 365'
-% mnt_point, shell=True)
+ % mnt_point, shell=True)
check_call('cd %s; %scert-to-efi-sig-list -g %s KEK.crt KEK.esl;
%ssign-efi-sig-list -t "2020-04-03" -c PK.crt -k PK.key KEK KEK.esl KEK.auth'
-% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
-shell=True)
-## db
+ % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
+ shell=True)
+# db
check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj
/CN=TEST_db/ -keyout db.key -out db.crt -nodes -days 365'
-% mnt_point, shell=True)
+
[PATCH v3 10/13] test/py: efi_secboot: split "signed image" test case-1 into two cases
Split the existing test case-1 into case1 and a new case-2:
case-1 for non-SecureBoot mode; case-2 for SecureBoot mode.
In addition, one corner case is added to case-2; a image is signed
but a corresponding certificate is not yet installed in "db."
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_secboot/test_signed.py | 66 +++
1 file changed, 38 insertions(+), 28 deletions(-)
diff --git a/test/py/tests/test_efi_secboot/test_signed.py
b/test/py/tests/test_efi_secboot/test_signed.py
index 4e6f129b7faf..8ea45c848612 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -20,12 +20,12 @@ import pytest
class TestEfiSignedImage(object):
def test_efi_signed_image_auth1(self, u_boot_console, efi_boot_env):
"""
-Test Case 1 - authenticated by db
+Test Case 1 - Secure boot is not in force
"""
u_boot_console.restart_uboot()
disk_img = efi_boot_env
with u_boot_console.log.section('Test Case 1a'):
-# Test Case 1a, run signed image if no db/dbx
+# Test Case 1a, run signed image if no PK
output = u_boot_console.run_command_list([
'host bind 0 %s' % disk_img,
'efidebug boot add 1 HELLO1 host 0:1 /helloworld.efi.signed
""',
@@ -34,48 +34,66 @@ class TestEfiSignedImage(object):
assert 'Hello, world!' in ''.join(output)
with u_boot_console.log.section('Test Case 1b'):
-# Test Case 1b, run unsigned image if no db/dbx
+# Test Case 1b, run unsigned image if no PK
output = u_boot_console.run_command_list([
'efidebug boot add 2 HELLO2 host 0:1 /helloworld.efi ""',
'efidebug boot next 2',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
-with u_boot_console.log.section('Test Case 1c'):
-# Test Case 1c, not authenticated by db
+def test_efi_signed_image_auth2(self, u_boot_console, efi_boot_env):
+"""
+Test Case 2 - Secure boot is in force,
+ authenticated by db (TEST_db certificate in db)
+"""
+u_boot_console.restart_uboot()
+disk_img = efi_boot_env
+with u_boot_console.log.section('Test Case 2a'):
+# Test Case 2a, db is not yet installed
output = u_boot_console.run_command_list([
-'fatload host 0:1 400 db.auth',
-'setenv -e -nv -bs -rt -at -i 400,$filesize db',
+'host bind 0 %s' % disk_img,
'fatload host 0:1 400 KEK.auth',
'setenv -e -nv -bs -rt -at -i 400,$filesize KEK',
'fatload host 0:1 400 PK.auth',
'setenv -e -nv -bs -rt -at -i 400,$filesize PK'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
+'efidebug boot add 1 HELLO1 host 0:1 /helloworld.efi.signed
""',
+'efidebug boot next 1',
+'efidebug test bootmgr'])
+assert('\'HELLO1\' failed' in ''.join(output))
+assert('efi_start_image() returned: 26' in ''.join(output))
+output = u_boot_console.run_command_list([
+'efidebug boot add 2 HELLO2 host 0:1 /helloworld.efi ""',
'efidebug boot next 2',
-'bootefi bootmgr'])
+'efidebug test bootmgr'])
assert '\'HELLO2\' failed' in ''.join(output)
+assert 'efi_start_image() returned: 26' in ''.join(output)
+
+with u_boot_console.log.section('Test Case 2b'):
+# Test Case 2b, authenticated by db
+output = u_boot_console.run_command_list([
+'fatload host 0:1 400 db.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize db'])
+assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot next 2',
'efidebug test bootmgr'])
+assert '\'HELLO2\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
-assert 'Hello, world!' not in ''.join(output)
-
-with u_boot_console.log.section('Test Case 1d'):
-# Test Case 1d, authenticated by db
output = u_boot_console.run_command_list([
'efidebug boot next 1',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
-def test_efi_signed_image_auth2(self, u_boot_console, efi_boot_env):
+def test_efi_signed_image_auth3(self, u_boot_console, efi_boot_env):
"""
-Test Case 2 - rejected by dbx
+Test Case 3 - rejected by dbx (TEST_db certificate in dbx)
"""
[PATCH v3 12/13] test/py: efi_secboot: add a test for multiple signatures
In this test case, an image is signed multiple times with different
keys. If any of signatures contained is not verified, the whole
authentication check should fail.
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_secboot/conftest.py| 9 +++-
test/py/tests/test_efi_secboot/test_signed.py | 51 +++
2 files changed, 59 insertions(+), 1 deletion(-)
diff --git a/test/py/tests/test_efi_secboot/conftest.py
b/test/py/tests/test_efi_secboot/conftest.py
index e7e583bebc92..c7da1a6e29a3 100644
--- a/test/py/tests/test_efi_secboot/conftest.py
+++ b/test/py/tests/test_efi_secboot/conftest.py
@@ -116,6 +116,10 @@ def efi_boot_env(request, u_boot_config):
check_call('cd %s; %scert-to-efi-hash-list -g %s -t 0 -s 256 db.crt
dbx_hash.crl; %ssign-efi-sig-list -c KEK.crt -k KEK.key dbx dbx_hash.crl
dbx_hash.auth'
% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
shell=True)
+## dbx_hash1 (digest of TEST_db1 certificate)
+check_call('cd %s; %scert-to-efi-hash-list -g %s -t 0 -s 256 db1.crt
dbx_hash1.crl; %ssign-efi-sig-list -c KEK.crt -k KEK.key dbx dbx_hash1.crl
dbx_hash1.auth'
+ % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
+ shell=True)
# Copy image
check_call('cp %s %s' % (HELLO_PATH, mnt_point), shell=True)
@@ -123,7 +127,10 @@ def efi_boot_env(request, u_boot_config):
# Sign image
check_call('cd %s; sbsign --key db.key --cert db.crt helloworld.efi'
% mnt_point, shell=True)
-# Digest image
+## Sign already-signed image with another key
+check_call('cd %s; sbsign --key db1.key --cert db1.crt --output
helloworld.efi.signed_2sigs helloworld.efi.signed'
+ % mnt_point, shell=True)
+## Digest image
check_call('cd %s; %shash-to-efi-sig-list helloworld.efi
db_hello.hash; %ssign-efi-sig-list -t "2020-04-07" -c KEK.crt -k KEK.key db
db_hello.hash db_hello.auth'
% (mnt_point, EFITOOLS_PATH, EFITOOLS_PATH),
shell=True)
diff --git a/test/py/tests/test_efi_secboot/test_signed.py
b/test/py/tests/test_efi_secboot/test_signed.py
index 6dabecb6694f..1a31a57e12c2 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -147,3 +147,54 @@ class TestEfiSignedImage(object):
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
+
+def test_efi_signed_image_auth5(self, u_boot_console, efi_boot_env):
+"""
+Test Case 5 - multiple signatures
+one signed with TEST_db, and
+one signed with TEST_db1
+"""
+u_boot_console.restart_uboot()
+disk_img = efi_boot_env
+with u_boot_console.log.section('Test Case 5a'):
+# Test Case 5a, rejected if any of signatures is not verified
+output = u_boot_console.run_command_list([
+'host bind 0 %s' % disk_img,
+'fatload host 0:1 400 db.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize db',
+'fatload host 0:1 400 KEK.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize KEK',
+'fatload host 0:1 400 PK.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize PK'])
+assert 'Failed to set EFI variable' not in ''.join(output)
+output = u_boot_console.run_command_list([
+'efidebug boot add 1 HELLO host 0:1
/helloworld.efi.signed_2sigs ""',
+'efidebug boot next 1',
+'efidebug test bootmgr'])
+assert '\'HELLO\' failed' in ''.join(output)
+assert 'efi_start_image() returned: 26' in ''.join(output)
+
+with u_boot_console.log.section('Test Case 5b'):
+# Test Case 5b, authenticated if both signatures are verified
+output = u_boot_console.run_command_list([
+'fatload host 0:1 400 db1.auth',
+'setenv -e -nv -bs -rt -at -a -i 400,$filesize db'])
+assert 'Failed to set EFI variable' not in ''.join(output)
+output = u_boot_console.run_command_list([
+'efidebug boot add 1 HELLO host 0:1
/helloworld.efi.signed_2sigs ""',
+'efidebug boot next 1',
+'bootefi bootmgr'])
+assert 'Hello, world!' in ''.join(output)
+
+with u_boot_console.log.section('Test Case 5c'):
+# Test Case 5c, rejected if any of signatures is revoked
+output = u_boot_console.run_command_list([
+'fatload host 0:1 400 dbx_hash1.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize dbx'])
+assert 'Failed to set EFI
[PATCH v3 11/13] test/py: efi_secboot: add a test against certificate revocation
Revocation database (dbx) may have not only certificates, but also
message digests of certificates with revocation time
(EFI_CERT_X509_SHA256_GUILD).
In this test case, if the database has such a digest and if the value
matches to a certificate that created a given image's signature,
authentication should fail.
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_secboot/conftest.py| 6 -
test/py/tests/test_efi_secboot/test_signed.py | 26 +++
2 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/test/py/tests/test_efi_secboot/conftest.py
b/test/py/tests/test_efi_secboot/conftest.py
index c0ee8be9f7c7..e7e583bebc92 100644
--- a/test/py/tests/test_efi_secboot/conftest.py
+++ b/test/py/tests/test_efi_secboot/conftest.py
@@ -106,12 +106,16 @@ def efi_boot_env(request, u_boot_config):
# db1-update
check_call('cd %s; %ssign-efi-sig-list -t "2020-04-06" -a -c KEK.crt
-k KEK.key db db1.esl db1-update.auth'
% (mnt_point, EFITOOLS_PATH), shell=True)
-# dbx
+## dbx (TEST_dbx certificate)
check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj
/CN=TEST_dbx/ -keyout dbx.key -out dbx.crt -nodes -days 365'
% mnt_point, shell=True)
check_call('cd %s; %scert-to-efi-sig-list -g %s dbx.crt dbx.esl;
%ssign-efi-sig-list -t "2020-04-05" -c KEK.crt -k KEK.key dbx dbx.esl dbx.auth'
% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
shell=True)
+## dbx_hash (digest of TEST_db certificate)
+check_call('cd %s; %scert-to-efi-hash-list -g %s -t 0 -s 256 db.crt
dbx_hash.crl; %ssign-efi-sig-list -c KEK.crt -k KEK.key dbx dbx_hash.crl
dbx_hash.auth'
+ % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
+ shell=True)
# Copy image
check_call('cp %s %s' % (HELLO_PATH, mnt_point), shell=True)
diff --git a/test/py/tests/test_efi_secboot/test_signed.py
b/test/py/tests/test_efi_secboot/test_signed.py
index 8ea45c848612..6dabecb6694f 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -121,3 +121,29 @@ class TestEfiSignedImage(object):
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
+
+def test_efi_signed_image_auth4(self, u_boot_console, efi_boot_env):
+"""
+Test Case 4 - revoked by dbx (digest of TEST_db certificate in dbx)
+"""
+u_boot_console.restart_uboot()
+disk_img = efi_boot_env
+with u_boot_console.log.section('Test Case 4'):
+# Test Case 4, rejected by dbx
+output = u_boot_console.run_command_list([
+'host bind 0 %s' % disk_img,
+'fatload host 0:1 400 dbx_hash.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize dbx',
+'fatload host 0:1 400 db.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize db',
+'fatload host 0:1 400 KEK.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize KEK',
+'fatload host 0:1 400 PK.auth',
+'setenv -e -nv -bs -rt -at -i 400,$filesize PK'])
+assert 'Failed to set EFI variable' not in ''.join(output)
+output = u_boot_console.run_command_list([
+'efidebug boot add 1 HELLO host 0:1 /helloworld.efi.signed ""',
+'efidebug boot next 1',
+'efidebug test bootmgr'])
+assert '\'HELLO\' failed' in ''.join(output)
+assert 'efi_start_image() returned: 26' in ''.join(output)
--
2.27.0
[PATCH v3 07/13] efi_loader: image_loader: add digest-based verification for signed image
In case that a type of certificate in "db" or "dbx" is
EFI_CERT_X509_SHA256_GUID, it is actually not a certificate which contains
a public key for RSA decryption, but a digest of image to be loaded.
If the value matches to a value calculated from a given binary image, it is
granted for loading.
With this patch, common digest check code, which used to be used for
unsigned image verification, will be extracted from
efi_signature_verify_with_sigdb() into efi_signature_lookup_digest(), and
extra step for digest check will be added to efi_image_authenticate().
Signed-off-by: AKASHI Takahiro
---
include/efi_loader.h | 2 +
lib/efi_loader/efi_image_loader.c | 44 --
lib/efi_loader/efi_signature.c| 128 ++
3 files changed, 99 insertions(+), 75 deletions(-)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 2f9fb112b34a..ceabbaadd0f2 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -765,6 +765,8 @@ struct efi_signature_store {
struct x509_certificate;
struct pkcs7_message;
+bool efi_signature_lookup_digest(struct efi_image_regions *regs,
+struct efi_signature_store *db);
bool efi_signature_verify_one(struct efi_image_regions *regs,
struct pkcs7_message *msg,
struct efi_signature_store *db);
diff --git a/lib/efi_loader/efi_image_loader.c
b/lib/efi_loader/efi_image_loader.c
index 222396b49eda..584a841116df 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -449,16 +449,16 @@ static bool efi_image_unsigned_authenticate(struct
efi_image_regions *regs)
}
/* try black-list first */
- if (efi_signature_verify_one(regs, NULL, dbx)) {
- EFI_PRINT("Image is not signed and rejected by \"dbx\"\n");
+ if (efi_signature_lookup_digest(regs, dbx)) {
+ EFI_PRINT("Image is not signed and its digest found in
\"dbx\"\n");
goto out;
}
/* try white-list */
- if (efi_signature_verify_one(regs, NULL, db))
+ if (efi_signature_lookup_digest(regs, db))
ret = true;
else
- EFI_PRINT("Image is not signed and not found in \"db\" or
\"dbx\"\n");
+ EFI_PRINT("Image is not signed and its digest not found in
\"db\" or \"dbx\"\n");
out:
efi_sigstore_free(db);
@@ -606,6 +606,25 @@ static bool efi_image_authenticate(void *efi, size_t
efi_size)
continue;
}
+ /*
+* NOTE:
+* UEFI specification defines two signature types possible
+* in signature database:
+* a. x509 certificate, where a signature in image is
+*a message digest encrypted by RSA public key
+*(EFI_CERT_X509_GUID)
+* b. bare hash value of message digest
+*(EFI_CERT_SHAxxx_GUID)
+*
+* efi_signature_verify() handles case (a), while
+* efi_signature_lookup_digest() handles case (b).
+*
+* There is a third type:
+* c. message digest of a certificate
+*(EFI_CERT_X509_SHAAxxx_GUID)
+* This type of signature is used only in revocation list
+* (dbx) and handled as part of efi_signatgure_verify().
+*/
/* try black-list first */
if (efi_signature_verify_one(regs, msg, dbx)) {
EFI_PRINT("Signature was rejected by \"dbx\"\n");
@@ -617,11 +636,22 @@ static bool efi_image_authenticate(void *efi, size_t
efi_size)
goto err;
}
- /* try white-list */
- if (!efi_signature_verify_with_sigdb(regs, msg, db, dbx)) {
- EFI_PRINT("Signature was not verified by \"db\"\n");
+ if (efi_signature_lookup_digest(regs, dbx)) {
+ EFI_PRINT("Image's digest was found in \"dbx\"\n");
goto err;
}
+
+ /* try white-list */
+ if (efi_signature_verify_with_sigdb(regs, msg, db, dbx))
+ continue;
+
+ debug("Signature was not verified by \"db\"\n");
+
+ if (efi_signature_lookup_digest(regs, db))
+ continue;
+
+ debug("Image's digest was not found in \"db\" or \"dbx\"\n");
+ goto err;
}
ret = true;
diff --git a/lib/efi_loader/efi_signature.c b/lib/efi_loader/efi_signature.c
index 18736188556d..8413d83e343b 100644
--- a/lib/efi_loader/efi_signature.c
+++ b/lib/efi_loader/efi_signature.c
@@ -199,55 +199,43 @@ out:
}
/**
- * efi_signature_verify_with_list - verify a signature with signature list
- * @regs: List of
[PATCH v3 04/13] efi_loader: signature: fix a size check against revocation list
Since the size check against an entry in efi_search_siglist() is
incorrect, this function will never find out a to-be-matched certificate
and its associated revocation time in the signature list.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/efi_signature.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/efi_loader/efi_signature.c b/lib/efi_loader/efi_signature.c
index da3818ac62e2..f0282c8c3c05 100644
--- a/lib/efi_loader/efi_signature.c
+++ b/lib/efi_loader/efi_signature.c
@@ -434,10 +434,11 @@ static bool efi_search_siglist(struct x509_certificate
*cert,
* time64_t revocation_time;
* };
*/
- if ((sig_data->size == SHA256_SUM_LEN) &&
- !memcmp(sig_data->data, hash, SHA256_SUM_LEN)) {
+ if ((sig_data->size >= SHA256_SUM_LEN + sizeof(time64_t)) &&
+ !memcmp(sig_data->data, msg, SHA256_SUM_LEN)) {
memcpy(revoc_time, sig_data->data + SHA256_SUM_LEN,
sizeof(*revoc_time));
+ EFI_PRINT("revocation time: 0x%llx\n", *revoc_time);
found = true;
goto out;
}
--
2.27.0
[PATCH v3 03/13] efi_loader: image_loader: retrieve authenticode only if it exists
Since the certificate table, which is indexed by
IMAGE_DIRECTORY_ENTRY_SECURITY and contains authenticode in PE image,
doesn't always exist, we should make sure that we will retrieve its pointer
only if it exists.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/efi_image_loader.c | 29 +
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/lib/efi_loader/efi_image_loader.c
b/lib/efi_loader/efi_image_loader.c
index 38b2c24ab1d6..a617693fe651 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -268,6 +268,8 @@ bool efi_image_parse(void *efi, size_t len, struct
efi_image_regions **regp,
dos = (void *)efi;
nt = (void *)(efi + dos->e_lfanew);
+ authoff = 0;
+ authsz = 0;
/*
* Count maximum number of regions to be digested.
@@ -306,25 +308,36 @@ bool efi_image_parse(void *efi, size_t len, struct
efi_image_regions **regp,
efi_image_region_add(regs,
>DataDirectory[ctidx] + 1,
efi + opt->SizeOfHeaders, 0);
+
+ authoff = opt->DataDirectory[ctidx].VirtualAddress;
+ authsz = opt->DataDirectory[ctidx].Size;
}
bytes_hashed = opt->SizeOfHeaders;
align = opt->FileAlignment;
- authoff = opt->DataDirectory[ctidx].VirtualAddress;
- authsz = opt->DataDirectory[ctidx].Size;
} else if (nt->OptionalHeader.Magic == IMAGE_NT_OPTIONAL_HDR32_MAGIC) {
IMAGE_OPTIONAL_HEADER32 *opt = >OptionalHeader;
+ /* Skip CheckSum */
efi_image_region_add(regs, efi, >CheckSum, 0);
- efi_image_region_add(regs, >Subsystem,
->DataDirectory[ctidx], 0);
- efi_image_region_add(regs, >DataDirectory[ctidx] + 1,
-efi + opt->SizeOfHeaders, 0);
+ if (nt->OptionalHeader.NumberOfRvaAndSizes <= ctidx) {
+ efi_image_region_add(regs,
+>Subsystem,
+efi + opt->SizeOfHeaders, 0);
+ } else {
+ /* Skip Certificates Table */
+ efi_image_region_add(regs, >Subsystem,
+>DataDirectory[ctidx], 0);
+ efi_image_region_add(regs,
+>DataDirectory[ctidx] + 1,
+efi + opt->SizeOfHeaders, 0);
+
+ authoff = opt->DataDirectory[ctidx].VirtualAddress;
+ authsz = opt->DataDirectory[ctidx].Size;
+ }
bytes_hashed = opt->SizeOfHeaders;
align = opt->FileAlignment;
- authoff = opt->DataDirectory[ctidx].VirtualAddress;
- authsz = opt->DataDirectory[ctidx].Size;
} else {
EFI_PRINT("%s: Invalid optional header magic %x\n", __func__,
nt->OptionalHeader.Magic);
--
2.27.0
[PATCH v3 05/13] efi_loader: signature: make efi_hash_regions more generic
There are a couple of occurrences of hash calculations in which a new
efi_hash_regions will be commonly used.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/efi_signature.c | 46 +-
1 file changed, 17 insertions(+), 29 deletions(-)
diff --git a/lib/efi_loader/efi_signature.c b/lib/efi_loader/efi_signature.c
index f0282c8c3c05..8372a6d070f1 100644
--- a/lib/efi_loader/efi_signature.c
+++ b/lib/efi_loader/efi_signature.c
@@ -29,7 +29,8 @@ const efi_guid_t efi_guid_cert_type_pkcs7 =
EFI_CERT_TYPE_PKCS7_GUID;
/**
* efi_hash_regions - calculate a hash value
- * @regs: List of regions
+ * @regs: Array of regions
+ * @count: Number of regions
* @hash: Pointer to a pointer to buffer holding a hash value
* @size: Size of buffer to be returned
*
@@ -37,18 +38,20 @@ const efi_guid_t efi_guid_cert_type_pkcs7 =
EFI_CERT_TYPE_PKCS7_GUID;
*
* Return: true on success, false on error
*/
-static bool efi_hash_regions(struct efi_image_regions *regs, void **hash,
-size_t *size)
+static bool efi_hash_regions(struct image_region *regs, int count,
+void **hash, size_t *size)
{
- *size = 0;
- *hash = calloc(1, SHA256_SUM_LEN);
if (!*hash) {
- EFI_PRINT("Out of memory\n");
- return false;
+ *hash = calloc(1, SHA256_SUM_LEN);
+ if (!*hash) {
+ EFI_PRINT("Out of memory\n");
+ return false;
+ }
}
- *size = SHA256_SUM_LEN;
+ if (size)
+ *size = SHA256_SUM_LEN;
- hash_calculate("sha256", regs->reg, regs->num, *hash);
+ hash_calculate("sha256", regs, count, *hash);
#ifdef DEBUG
EFI_PRINT("hash calculated:\n");
print_hex_dump("", DUMP_PREFIX_OFFSET, 16, 1,
@@ -73,26 +76,10 @@ static bool efi_hash_msg_content(struct pkcs7_message *msg,
void **hash,
{
struct image_region regtmp;
- *size = 0;
- *hash = calloc(1, SHA256_SUM_LEN);
- if (!*hash) {
- EFI_PRINT("Out of memory\n");
- free(msg);
- return false;
- }
- *size = SHA256_SUM_LEN;
-
regtmp.data = msg->data;
regtmp.size = msg->data_len;
- hash_calculate("sha256", , 1, *hash);
-#ifdef DEBUG
- EFI_PRINT("hash calculated based on contentInfo:\n");
- print_hex_dump("", DUMP_PREFIX_OFFSET, 16, 1,
- *hash, SHA256_SUM_LEN, false);
-#endif
-
- return true;
+ return efi_hash_regions(, 1, hash, size);
}
/**
@@ -170,9 +157,10 @@ static bool efi_signature_verify(struct efi_image_regions
*regs,
false);
#endif
/* against contentInfo first */
+ hash = NULL;
if ((msg->data && efi_hash_msg_content(msg, , )) ||
/* for signed image */
- efi_hash_regions(regs, , )) {
+ efi_hash_regions(regs->reg, regs->num, , )) {
/* for authenticated variable */
if (ps_info->msgdigest_len != size ||
memcmp(hash, ps_info->msgdigest, size)) {
@@ -240,7 +228,7 @@ bool efi_signature_verify_with_list(struct
efi_image_regions *regs,
regs, signed_info, siglist, valid_cert);
if (!signed_info) {
- void *hash;
+ void *hash = NULL;
size_t size;
EFI_PRINT("%s: unsigned image\n", __func__);
@@ -254,7 +242,7 @@ bool efi_signature_verify_with_list(struct
efi_image_regions *regs,
goto out;
}
- if (!efi_hash_regions(regs, , )) {
+ if (!efi_hash_regions(regs->reg, regs->num, , )) {
EFI_PRINT("Digesting unsigned image failed\n");
goto out;
}
--
2.27.0
[PATCH v3 06/13] efi_loader: image_loader: verification for all signatures should pass
A signed image may have multiple signatures in
- each WIN_CERTIFICATE in authenticode, and/or
- each SignerInfo in pkcs7 SignedData (of WIN_CERTIFICATE)
In the initial implementation of efi_image_authenticate(), the criteria
of verification check for multiple signatures case is a bit ambiguous
and it may cause inconsistent result.
With this patch, we will make sure that verification check in
efi_image_authenticate() should pass against all the signatures.
The only exception would be
- the case where a digest algorithm used in signature is not supported by
U-Boot, or
- the case where parsing some portion of authenticode has failed
In those cases, we don't know how the signature be handled and should
just ignore them.
Please note that, due to this change, efi_signature_verify_with_sigdb()'s
function prototype will be modified, taking "dbx" as well as "db"
instead of outputing a "certificate." If "dbx" is null, the behavior would
be the exact same as before.
The function's name will be changed to efi_signature_verify() once
current efi_signature_verify() has gone due to further improvement
in intermediate certificates support.
Signed-off-by: AKASHI Takahiro
---
include/efi_loader.h | 13 +-
lib/efi_loader/efi_image_loader.c | 43 ++---
lib/efi_loader/efi_signature.c| 298 +-
3 files changed, 198 insertions(+), 156 deletions(-)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index fc9344c7428e..2f9fb112b34a 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -765,14 +765,15 @@ struct efi_signature_store {
struct x509_certificate;
struct pkcs7_message;
-bool efi_signature_verify_cert(struct x509_certificate *cert,
- struct efi_signature_store *dbx);
-bool efi_signature_verify_signers(struct pkcs7_message *msg,
- struct efi_signature_store *dbx);
+bool efi_signature_verify_one(struct efi_image_regions *regs,
+ struct pkcs7_message *msg,
+ struct efi_signature_store *db);
bool efi_signature_verify_with_sigdb(struct efi_image_regions *regs,
struct pkcs7_message *msg,
- struct efi_signature_store *db,
- struct x509_certificate **cert);
+struct efi_signature_store *db,
+struct efi_signature_store *dbx);
+bool efi_signature_check_signers(struct pkcs7_message *msg,
+struct efi_signature_store *dbx);
efi_status_t efi_image_region_add(struct efi_image_regions *regs,
const void *start, const void *end,
diff --git a/lib/efi_loader/efi_image_loader.c
b/lib/efi_loader/efi_image_loader.c
index a617693fe651..222396b49eda 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -449,13 +449,13 @@ static bool efi_image_unsigned_authenticate(struct
efi_image_regions *regs)
}
/* try black-list first */
- if (efi_signature_verify_with_sigdb(regs, NULL, dbx, NULL)) {
+ if (efi_signature_verify_one(regs, NULL, dbx)) {
EFI_PRINT("Image is not signed and rejected by \"dbx\"\n");
goto out;
}
/* try white-list */
- if (efi_signature_verify_with_sigdb(regs, NULL, db, NULL))
+ if (efi_signature_verify_one(regs, NULL, db))
ret = true;
else
EFI_PRINT("Image is not signed and not found in \"db\" or
\"dbx\"\n");
@@ -495,12 +495,13 @@ static bool efi_image_authenticate(void *efi, size_t
efi_size)
size_t wincerts_len;
struct pkcs7_message *msg = NULL;
struct efi_signature_store *db = NULL, *dbx = NULL;
- struct x509_certificate *cert = NULL;
void *new_efi = NULL;
u8 *auth, *wincerts_end;
size_t new_efi_size, auth_size;
bool ret = false;
+ debug("%s: Enter, %d\n", __func__, ret);
+
if (!efi_secure_boot_enabled())
return true;
@@ -546,7 +547,17 @@ static bool efi_image_authenticate(void *efi, size_t
efi_size)
goto err;
}
- /* go through WIN_CERTIFICATE list */
+ /*
+* go through WIN_CERTIFICATE list
+* NOTE:
+* We may have multiple signatures either as WIN_CERTIFICATE's
+* in PE header, or as pkcs7 SignerInfo's in SignedData.
+* So the verification policy here is:
+* - Success if, at least, one of signatures is verified
+* - unless
+* any of signatures is rejected explicitly, or
+* none of digest algorithms are supported
+*/
for (wincert = wincerts, wincerts_end = (u8 *)wincerts + wincerts_len;
(u8 *)wincert < wincerts_end;
wincert = (WIN_CERTIFICATE *)
@@ -596,42 +607,32 @@
[PATCH v3 02/13] efi_loader: image_loader: add a check against certificate type of authenticode
UEFI specification requires that we shall support three type of
certificates of authenticode in PE image:
WIN_CERT_TYPE_EFI_GUID with the guid, EFI_CERT_TYPE_PCKS7_GUID
WIN_CERT_TYPE_PKCS_SIGNED_DATA
WIN_CERT_TYPE_EFI_PKCS1_15
As EDK2 does, we will support the first two that are pkcs7 SignedData.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/efi_image_loader.c | 56 ---
1 file changed, 44 insertions(+), 12 deletions(-)
diff --git a/lib/efi_loader/efi_image_loader.c
b/lib/efi_loader/efi_image_loader.c
index 5b00fea2f113..38b2c24ab1d6 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -484,7 +484,8 @@ static bool efi_image_authenticate(void *efi, size_t
efi_size)
struct efi_signature_store *db = NULL, *dbx = NULL;
struct x509_certificate *cert = NULL;
void *new_efi = NULL;
- size_t new_efi_size;
+ u8 *auth, *wincerts_end;
+ size_t new_efi_size, auth_size;
bool ret = false;
if (!efi_secure_boot_enabled())
@@ -533,21 +534,52 @@ static bool efi_image_authenticate(void *efi, size_t
efi_size)
}
/* go through WIN_CERTIFICATE list */
- for (wincert = wincerts;
-(void *)wincert < (void *)wincerts + wincerts_len;
-wincert = (void *)wincert + ALIGN(wincert->dwLength, 8)) {
- if (wincert->dwLength < sizeof(*wincert)) {
- EFI_PRINT("%s: dwLength too small: %u < %zu\n",
- __func__, wincert->dwLength,
- sizeof(*wincert));
- goto err;
+ for (wincert = wincerts, wincerts_end = (u8 *)wincerts + wincerts_len;
+(u8 *)wincert < wincerts_end;
+wincert = (WIN_CERTIFICATE *)
+ ((u8 *)wincert + ALIGN(wincert->dwLength, 8))) {
+ if ((u8 *)wincert + sizeof(*wincert) >= wincerts_end)
+ break;
+
+ if (wincert->dwLength <= sizeof(*wincert)) {
+ EFI_PRINT("dwLength too small: %u < %zu\n",
+ wincert->dwLength, sizeof(*wincert));
+ continue;
+ }
+
+ EFI_PRINT("WIN_CERTIFICATE_TYPE: 0x%x\n",
+ wincert->wCertificateType);
+
+ auth = (u8 *)wincert + sizeof(*wincert);
+ auth_size = wincert->dwLength - sizeof(*wincert);
+ if (wincert->wCertificateType == WIN_CERT_TYPE_EFI_GUID) {
+ if (auth + sizeof(efi_guid_t) >= wincerts_end)
+ break;
+
+ if (auth_size <= sizeof(efi_guid_t)) {
+ EFI_PRINT("dwLength too small: %u < %zu\n",
+ wincert->dwLength, sizeof(*wincert));
+ continue;
+ }
+ if (guidcmp(auth, _guid_cert_type_pkcs7)) {
+ EFI_PRINT("Certificate type not supported:
%pUl\n",
+ auth);
+ continue;
+ }
+
+ auth += sizeof(efi_guid_t);
+ auth_size -= sizeof(efi_guid_t);
+ } else if (wincert->wCertificateType
+ != WIN_CERT_TYPE_PKCS_SIGNED_DATA) {
+ EFI_PRINT("Certificate type not supported\n");
+ continue;
}
- msg = pkcs7_parse_message((void *)wincert + sizeof(*wincert),
- wincert->dwLength - sizeof(*wincert));
+
+ msg = pkcs7_parse_message(auth, auth_size);
if (IS_ERR(msg)) {
EFI_PRINT("Parsing image's signature failed\n");
msg = NULL;
- goto err;
+ continue;
}
/* try black-list first */
--
2.27.0
[PATCH v3 00/13] efi_loader: rework/improve UEFI secure boot code
Summary === I'm currently working on reworking UEFI secure boot, aiming to add "intermediate certificates" support. In this effort, I found a couple of issues that should immediately be fixed or useful improvements even without intermediate certificates support. Each commit in this patch series has self-explained description of the issue to be addressed. While they are independent in terms of functionality, they are compiled in a set since the one may depend on the other in terms of code change overlap. All the changes can and should be merged at once for best convenience. Patch structure === Patch#1,#5: rather preparatory patches Patch#2-#4,#6-#7: main commits Patch#8-#13: pytests Patch#11-#12 for Patch#6 Patch#13 for Patch#7 Prerequisite The version of "sbsign" command must be 0.7 or higher to sign an image with multiple signatures. It is required here for testing. Test - The added new pytests in test_signed.py passed locally. - Travis CI passed, except Test Case 5 for signed image (test_efi_signed_image_auth5) because the version of "sbsign" command is old and it doesn't support multiple signatures. v3 (Jul 8, 2020) * rebased to Heinrich's (current) efi-2020-10-rc1 * removed already-merged commits * include pylint fixes (patch#8, #9 and #10-#13) * print time64_t in "0x%llx" format (patch#4) * make a small change on a description about efi_hash_regions() (patch#5) v2 (Jun 9, 2020) * on top of v2020.07-rc4 * add patch#1,#2 to remove unnecessary hacks in pytest * use EFI_PRINT() instead of debug() everywhere (patch#3-#5) * fix a verification logic so that we should reject an image if, at least, one of signaures be verified by dbx. New efi_signature_verify_one() has a main role. (patch#10) * use "llu" format instead of "llx" to print out the revocation time (patch#10) * add some description about verification logic against multiple signatures (patch#11) v1 (May 29, 2020) * initial release AKASHI Takahiro (13): lib/crypto, efi_loader: avoid multiple inclusions of header files efi_loader: image_loader: add a check against certificate type of authenticode efi_loader: image_loader: retrieve authenticode only if it exists efi_loader: signature: fix a size check against revocation list efi_loader: signature: make efi_hash_regions more generic efi_loader: image_loader: verification for all signatures should pass efi_loader: image_loader: add digest-based verification for signed image test/py: efi_secboot: apply autopep8 test/py: efi_secboot: more fixes against pylint test/py: efi_secboot: split "signed image" test case-1 into two cases test/py: efi_secboot: add a test against certificate revocation test/py: efi_secboot: add a test for multiple signatures test/py: efi_secboot: add a test for verifying with digest of signed image include/efi_loader.h | 15 +- lib/efi_loader/efi_image_loader.c | 163 +-- lib/efi_loader/efi_signature.c| 436 +- test/py/tests/test_efi_secboot/conftest.py| 104 +++-- test/py/tests/test_efi_secboot/defs.py| 14 +- .../py/tests/test_efi_secboot/test_authvar.py | 92 ++-- test/py/tests/test_efi_secboot/test_signed.py | 206 +++-- .../tests/test_efi_secboot/test_unsigned.py | 66 +-- 8 files changed, 679 insertions(+), 417 deletions(-) -- 2.27.0
[PATCH v3 01/13] lib/crypto, efi_loader: avoid multiple inclusions of header files
By adding extra symbols, we can now avoid including x509_parser and pkcs7_parser.h files multiple times. Signed-off-by: AKASHI Takahiro Suggested-by: Heinrich Schuchardt --- lib/efi_loader/efi_image_loader.c | 1 + lib/efi_loader/efi_signature.c| 1 + 2 files changed, 2 insertions(+) diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index 06a2ebdb9081..5b00fea2f113 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -14,6 +14,7 @@ #include #include #include +#include #include const efi_guid_t efi_global_variable_guid = EFI_GLOBAL_VARIABLE_GUID; diff --git a/lib/efi_loader/efi_signature.c b/lib/efi_loader/efi_signature.c index e05c471c61ce..da3818ac62e2 100644 --- a/lib/efi_loader/efi_signature.c +++ b/lib/efi_loader/efi_signature.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include -- 2.27.0
Re: U-boot Designware SPI driver issue
On 6/24/20 4:37 AM, Yakov Shmulevich wrote:
> Hello,
>
> We develop the system that based on MIPS that includes Synopsys SPI with
> NACRONIX SPI flash connected to it.
> For U-boot we are using version 2019.04-rc4.
> I want to save environment on SPI flash. For this I enabled the DesignWare
> SPI driver and MACRONIX SPI flash driver in U-boot .config and add
> corresponding definitions in our dts file.
> Following the .config relevant lines:
>
> CONFIG_CMD_SAVEENV=y
>
> CONFIG_DM_SPI_FLASH=y
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_MACRONIX=y
>
> CONFIG_SPI=y
> CONFIG_DM_SPI=y
> CONFIG_SPI_MEM=y
> CONFIG_DESIGNWARE_SPI=y
>
> Following the dts file relevant lines:
>
> ahb {
>compatible = "simple-bus";
>
>spi0: spi-master@1FCD {
>#address-cells = <1>;
>#size-cells = <0>;
>compatible = "snps,dw-apb-ssi";
>reg = <0x1FCD 0x40>;
>num-chipselect = <4>;
>bus-num = <0>;
>reg-io-width = <4>;
>reg-shift = <2>;
>spi-max-frequency = <1800>; /*
> input clock */
>
>status = "okay";
You are missing the "clocks" property.
>
> spi-flash@0 {
> compatible =
> "spi-flash";
>
> spi-max-frequency = <1800>; /* input clock */
> reg = <0>; /*
> CS0 */
> };
> };
> };
>
> In the U-boot startup I get the following error:
> Loading Environment from SPI Flash...
> Invalid bus 0 (err=-19)
> *** Warning - spi_flash_probe_bus_cs() failed, using default environment
> Also the "sf probe" command gives the similar error:
>
>
>
> # sf probe 0:0
>
> Invalid bus 0 (err=-19)
>
> Failed to initialize SPI flash at 0:0 (error -19) The error
> -19 is ENODEV error.
>
>
>
> After the problem evaluation I found that both "load environment" and "sf
> probe" failed in uclass_find_device_by_seq() function (drivers/core/uclass.c).
>
> This function failed to find device for uclass_id= UCLASS_SPI on bus 0
> (spi0). In main there are no devices on this bus.
>
>
>
> In both cases the flow is started from spi_flash_probe_bus_cs() function
> (drivers/mtd/spi/sf-uclass.c) for device "spi_flash@0:0".
>
> In the start of this flow uclass_get() function (drivers/core/uclass.c)) is
> executed to find UCLASS_SPI driver.
>
> This function returns uclass with driver "spi" and not "dw_spi" as I expected.
> Also I found that the DesignWare SPI driver probe (designware_spi.c) doesn't
> even executed.
I don't know about this part. Try enabling debug logging.
>
> Can somebody point me on my problem?
> Or maybe there is some example of working Synopsis SPI with flash definitions
> in U-boot.
>
> Thanks,
> Yakov
>
--Sean
RE: [PATCH 0/4] Move eSDHC adapter card code to board files
CC Xiaobo, Jiafei > -Original Message- > From: Y.b. Lu > Sent: Monday, July 6, 2020 10:47 AM > To: u-boot@lists.denx.de; Priyanka Jain ; Peng Fan > > Subject: RE: [PATCH 0/4] Move eSDHC adapter card code to board files > > Hi Priyanka, > > Any comments on this patch-set? > Thanks a lot. > > Best regards, > Yangbo Lu > > > -Original Message- > > From: Yangbo Lu > > Sent: Wednesday, June 17, 2020 6:09 PM > > To: u-boot@lists.denx.de; Priyanka Jain ; Peng Fan > > > > Cc: Y.b. Lu > > Subject: [PATCH 0/4] Move eSDHC adapter card code to board files > > > > The eSDHC adapter card identification and multiplexing configuration > > through FPGA had been implemented in both common mmc driver and > > fsl_esdhc driver. However it is proper to move these code to board > > files and do it during board initialization. The FPGA registers are > > also board specific. > > > > This patch-set is to move eSDHC adapter card identification and > > multiplexing configuration from mmc driver to specific board files. > > Add eSDHC adapter card identification for LX2 QDS. > > And the option CONFIG_FSL_ESDHC_ADAPTER_IDENT is no longer needed. > > > > CI build result > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftravis-ci > > .org%2Fgithub%2Fyangbolu1991%2Fu-boot-test%2Fbuilds%2F699180417& > a > > > mp;data=02%7C01%7Cyangbo.lu%40nxp.com%7C2351c69f76e142be1c4108d > > > 812a73fd6%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637279 > > > 856821151607sdata=doJR9jInaSGNQHqZlOar%2BKb3kY%2F7xuQzNgA > > 88ADf8B0%3Dreserved=0 > > > > Yangbo Lu (4): > > Drop global data sdhc_adapter for powerpc > > Move eSDHC adapter card identification to board files > > board: fsl: lx2160aqds: identify SDHC adapter during board init > > configs: lx2160aqds: enable CONFIG_BOARD_EARLY_INIT_R > > > > arch/powerpc/include/asm/global_data.h | 4 +-- > > board/freescale/common/qixis.h | 14 +++--- > > board/freescale/lx2160a/lx2160a.c| 36 > > +++-- > > board/freescale/t1040qds/t1040qds.c | 29 > > - > > board/freescale/t208xqds/t208xqds.c | 29 > > - > > configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + > > configs/lx2160aqds_tfa_defconfig | 1 + > > doc/README.fsl-esdhc | 14 -- > > drivers/mmc/fsl_esdhc.c | 39 > > > > drivers/mmc/mmc-uclass.c | 4 +-- > > drivers/mmc/mmc.c| 7 + > > drivers/mmc/mmc_legacy.c | 7 + > > drivers/mmc/mmc_private.h| 4 +-- > > include/configs/T1040QDS.h | 1 - > > include/configs/T208xQDS.h | 1 - > > include/fsl_esdhc.h | 4 --- > > scripts/config_whitelist.txt | 1 - > > 17 files changed, 108 insertions(+), 88 deletions(-) > > > > -- > > 2.7.4
Re: [PATCH v2 2/2] pwm: Add PWM driver for SiFive SoC
Hello Yash,
Am 23.04.2020 um 13:27 schrieb Yash Shah:
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC
This driver is simple port of Linux pwm sifive driver from Linux v5.6
commit: 9e37a53eb051 ("pwm: sifive: Add a driver for SiFive SoC PWM")
Signed-off-by: Yash Shah
---
drivers/pwm/Kconfig | 6 ++
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-sifive.c | 172 +++
3 files changed, 179 insertions(+)
create mode 100644 drivers/pwm/pwm-sifive.c
Reviewed-by: Heiko Schocher
@Tom: Do you want to pick up this patch, or I can take it into
u-boot-i2c tree (as I currently plan to send a pull request)?
bye,
Heiko
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH v2 1/2] pwm: Add DT documentation for SiFive PWM Controller
Hello Yash,
Am 23.04.2020 um 13:27 schrieb Yash Shah:
DT documentation for PWM controller added from Linux v5.6
commit: daa78cc3408e
("pwm: sifive: Add DT documentation for SiFive PWM Controller")
Signed-off-by: Yash Shah
---
doc/device-tree-bindings/pwm/pwm-sifive.txt | 31 +
1 file changed, 31 insertions(+)
create mode 100644 doc/device-tree-bindings/pwm/pwm-sifive.txt
Reviewed-by: Heiko Schocher
@Tom: Do you want to pick up this patch, or I can take it into
u-boot-i2c tree (as I currently plan to send a pull request)?
bye,
Heiko
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH 1/2] test/py: efi_secboot: apply autopep8
On Mon, Jul 06, 2020 at 12:45:54PM +0200, Heinrich Schuchardt wrote:
> On 16.06.20 01:16, AKASHI Takahiro wrote:
> > Python's autopep8 can automatically correct some of warnings from pylint
> > and rewrite the code in a pretty print format. So just do it.
> >
> > Signed-off-by: AKASHI Takahiro
> > Suggested-by: Heinrich Schuchardt
> > ---
> > test/py/tests/test_efi_secboot/conftest.py| 162 ++
> > test/py/tests/test_efi_secboot/defs.py| 14 +-
> > .../py/tests/test_efi_secboot/test_authvar.py | 1 +
> > test/py/tests/test_efi_secboot/test_signed.py | 1 +
> > .../tests/test_efi_secboot/test_unsigned.py | 37 ++--
> > 5 files changed, 118 insertions(+), 97 deletions(-)
> >
> > diff --git a/test/py/tests/test_efi_secboot/conftest.py
> > b/test/py/tests/test_efi_secboot/conftest.py
> > index 5ac0389064e8..f74b4b109a7b 100644
> > --- a/test/py/tests/test_efi_secboot/conftest.py
> > +++ b/test/py/tests/test_efi_secboot/conftest.py
> > @@ -10,6 +10,8 @@ from subprocess import call, check_call, check_output,
> > CalledProcessError
> > from defs import *
> >
> > # from test/py/conftest.py
> > +
> > +
> > def tool_is_in_path(tool):
> > for path in os.environ["PATH"].split(os.pathsep):
> > fn = os.path.join(path, tool)
> > @@ -20,13 +22,15 @@ def tool_is_in_path(tool):
> > #
> > # Fixture for UEFI secure boot test
> > #
> > +
> > +
> > @pytest.fixture(scope='session')
> > def efi_boot_env(request, u_boot_config):
> > """Set up a file system to be used in UEFI secure boot test.
> >
> > Args:
> > request: Pytest request object.
> > - u_boot_config: U-boot configuration.
> > +u_boot_config: U-boot configuration.
> >
> > Return:
> > A path to disk image to be used for testing
> > @@ -48,20 +52,21 @@ def efi_boot_env(request, u_boot_config):
> >
> > # create a disk/partition
> > check_call('dd if=/dev/zero of=%s bs=1MiB count=%d'
> > -% (image_path, image_size), shell=True)
> > + % (image_path, image_size), shell=True)
> > check_call('sgdisk %s -n 1:0:+%dMiB'
> > -% (image_path, part_size), shell=True)
> > + % (image_path, part_size), shell=True)
> > # create a file system
> > check_call('dd if=/dev/zero of=%s.tmp bs=1MiB count=%d'
> > -% (image_path, part_size), shell=True)
> > + % (image_path, part_size), shell=True)
> > check_call('mkfs -t %s %s.tmp' % (fs_type, image_path), shell=True)
> > check_call('dd if=%s.tmp of=%s bs=1MiB seek=1 count=%d
> > conv=notrunc'
> > -% (image_path, image_path, 1), shell=True)
> > + % (image_path, image_path, 1), shell=True)
> > check_call('rm %s.tmp' % image_path, shell=True)
> > -loop_dev = check_output('sudo losetup -o 1MiB --sizelimit %dMiB
> > --show -f %s | tr -d "\n"'
> > -% (part_size, image_path),
> > shell=True).decode()
> > +loop_dev = check_output(
> > +'sudo losetup -o 1MiB --sizelimit %dMiB --show -f %s | tr -d
> > "\n"' %
> > +(part_size, image_path), shell=True).decode()
> > check_output('sudo mount -t %s -o umask=000 %s %s'
> > -% (fs_type, loop_dev, mnt_point),
> > shell=True)
> > + % (fs_type, loop_dev, mnt_point), shell=True)
> >
> > # suffix
> > # *.key: RSA private key in PEM
> > @@ -73,75 +78,88 @@ def efi_boot_env(request, u_boot_config):
> > # *.efi.signed: signed UEFI image
> >
> > # Create signature database
> > -## PK
> > -check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048
> > -subj /CN=TEST_PK/ -keyout PK.key -out PK.crt -nodes -days 365'
> > -% mnt_point, shell=True)
> > -check_call('cd %s; %scert-to-efi-sig-list -g %s PK.crt PK.esl;
> > %ssign-efi-sig-list -c PK.crt -k PK.key PK PK.esl PK.auth'
> > -% (mnt_point, EFITOOLS_PATH, GUID,
> > EFITOOLS_PATH),
> > -shell=True)
> > -## PK_null for deletion
> > -check_call('cd %s; sleep 2; touch PK_null.esl; %ssign-efi-sig-list
> > -c PK.crt -k PK.key PK PK_null.esl PK_null.auth'
> > -% (mnt_point, EFITOOLS_PATH), shell=True)
> > -## KEK
> > -check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048
> > -subj /CN=TEST_KEK/ -keyout KEK.key -out KEK.crt -nodes -days 365'
> > -% mnt_point, shell=True)
> > -check_call('cd %s; %scert-to-efi-sig-list -g %s KEK.crt KEK.esl;
> > %ssign-efi-sig-list -c PK.crt -k PK.key KEK KEK.esl KEK.auth'
> > -% (mnt_point, EFITOOLS_PATH, GUID,
> > EFITOOLS_PATH),
> > -shell=True)
> >
Re: [PATCH v9 1/2] i2c: i2c-cortina: added CAxxxx I2C support
Hello Alex, Arthur, Am 06.07.2020 um 11:22 schrieb Heiko Schocher: Hello Alex, Arthur, Am 01.06.2020 um 21:56 schrieb Alex Nemirovsky: From: Arthur Li Add I2C controller support for Cortina Access CA SoCs Signed-off-by: Arthur Li Signed-off-by: Alex Nemirovsky CC: Heiko Schocher Reviewed-by: Heiko Schocher --- Changes in v9: - specially include bitops.h and delay.h which were removed from common.h Changes in v8: - No code change - Split out individual driver from Cortina Package 2 patch series to help streamline acceptence into master Changes in v7: - Added additional description info in I2C KConfig Changes in v6: - Add I2C DT binding document Changes in v4: - Utilize standard I2C macros from - Return ETIMEDOUT in funcs that can timeout - Return i2c_xfer_init() result to caller of i2c_read() if it fails within i2c_read() execution - Fix misc. style guide conformance issues - Use printf() to report i2c_xfer() runtime errors instead of debug() MAINTAINERS | 4 + doc/device-tree-bindings/i2c/i2c-cortina.txt | 18 ++ drivers/i2c/Kconfig | 8 + drivers/i2c/Makefile | 1 + drivers/i2c/i2c-cortina.c | 346 +++ drivers/i2c/i2c-cortina.h | 87 +++ 6 files changed, 464 insertions(+) create mode 100644 doc/device-tree-bindings/i2c/i2c-cortina.txt create mode 100644 drivers/i2c/i2c-cortina.c create mode 100644 drivers/i2c/i2c-cortina.h travis build fails: https://travis-ci.org/github/hsdenx/u-boot-i2c/jobs/705286814#L1358 seems you need to add: #include Fixed this and travis builds now fine, so no need for any action. https://github.com/hsdenx/u-boot-i2c/commits/work https://github.com/hsdenx/u-boot-i2c/commit/231d2c0eb38d74761eb6a43a08240e84e9ee397a I just started a new travis build as I did a rebase to latest mainline, if this works I send pull request to Tom. bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH 2/2] test/py: efi_secboot: more fixes against pylint
On Mon, Jul 06, 2020 at 12:59:16PM +0200, Heinrich Schuchardt wrote: > On 16.06.20 01:16, AKASHI Takahiro wrote: > > More fixes against pylint warnings that autopep8 didn't handle > > in the previous commit. > > > > Signed-off-by: AKASHI Takahiro > > This patch has to be rebased: This patch will be included in a next version (v3) of follow-up patches. -Takahiro Akashi > error: patch failed: test/py/tests/test_efi_secboot/conftest.py:14 > error: test/py/tests/test_efi_secboot/conftest.py: patch does not apply > error: patch failed: test/py/tests/test_efi_secboot/test_authvar.py:9 > error: test/py/tests/test_efi_secboot/test_authvar.py: patch does not apply > error: patch failed: test/py/tests/test_efi_secboot/test_signed.py:9 > error: test/py/tests/test_efi_secboot/test_signed.py: patch does not apply > error: patch failed: test/py/tests/test_efi_secboot/test_unsigned.py:9 > error: test/py/tests/test_efi_secboot/test_unsigned.py: patch does not apply > Patch failed at 0001 test/py: efi_secboot: more fixes against pylint > > Best regards > > Heinrich
Re: [PATCH v1 02/43] binman: Refactor binman_entry_find() to allow other nodes
+Tom,
On Wed, Jul 8, 2020 at 10:23 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Mon, 29 Jun 2020 at 20:33, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
> > >
> > > At present we can only read from a top-level binman node entry. Refactor
> > > this function to produce a second local function which supports reading
> > > from any node.
> > >
> > > Signed-off-by: Simon Glass
> > > ---
> > >
> > > lib/binman.c | 18 --
> > > 1 file changed, 12 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/lib/binman.c b/lib/binman.c
> > > index dc3a880882..79d01230dd 100644
> > > --- a/lib/binman.c
> > > +++ b/lib/binman.c
> > > @@ -29,25 +29,31 @@ struct binman_info {
> > >
> > > static struct binman_info *binman;
> > >
> > > -int binman_entry_find(const char *name, struct binman_entry *entry)
> > > +int binman_entry_find_(ofnode node, const char *name, struct
> > > binman_entry *entry)
> >
> > This one should be static. We really should agree on a naming
> > convention for such internal APIs. I would prefer adding _internal
> > suffix, or using __ prefix
>
> Well I think internal is too long and I like a trailing underscore.
>
The trailing underscore is easy to be misread.
> The trailing double underscore is reserved for the compiler.
>
What I prefer is the leading double underscore which I think is allowed.
> Another option is to drop the prefix, so:
>
> find_entry(...)
Regards,
Bin
[PATCH v2 42/44] x86: acpi: Correct the version of the MADT
Currently U-Boot implements version 2 but reports version 4. Correct it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Wolfgang Wallner --- Changes in v2: - Use ACPI_MADT_REV_ACPI_3_0 instead of the open-coded value arch/x86/lib/acpi_table.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index d2bc3386eb..3a93fedfc3 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -155,7 +155,7 @@ static void acpi_create_madt(struct acpi_madt *madt) /* Fill out header fields */ acpi_fill_header(header, "APIC"); header->length = sizeof(struct acpi_madt); - header->revision = 4; + header->revision = ACPI_MADT_REV_ACPI_3_0; madt->lapic_addr = LAPIC_DEFAULT_BASE; madt->flags = ACPI_MADT_PCAT_COMPAT; -- 2.27.0.383.g050319c2ae-goog
[PATCH v2 43/44] x86: Rename board_final_cleanup() to board_final_init()
This function sounds like something that is called when U-Boot is about to
jump to Linux. In fact it is an init function.
Rename it to reduce confusion.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/cpu/coreboot/coreboot.c | 4 ++--
arch/x86/cpu/cpu.c | 8
arch/x86/cpu/efi/app.c | 2 +-
arch/x86/cpu/quark/quark.c | 2 +-
arch/x86/lib/fsp/fsp_common.c| 2 +-
5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index d44db1347b..22a93254a9 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -42,7 +42,7 @@ int print_cpuinfo(void)
return default_print_cpuinfo();
}
-static void board_final_cleanup(void)
+static void board_final_init(void)
{
/*
* Un-cache the ROM so the kernel has one
@@ -80,7 +80,7 @@ int last_stage_init(void)
if (CONFIG_IS_ENABLED(USB_KEYBOARD))
usb_init();
- board_final_cleanup();
+ board_final_init();
return 0;
}
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 9bc243ebc8..69c14189d1 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -182,10 +182,10 @@ void show_boot_progress(int val)
#if !defined(CONFIG_SYS_COREBOOT) && !defined(CONFIG_EFI_STUB)
/*
- * Implement a weak default function for boards that optionally
- * need to clean up the system before jumping to the kernel.
+ * Implement a weak default function for boards that need to do some final init
+ * before the system is ready.
*/
-__weak void board_final_cleanup(void)
+__weak void board_final_init(void)
{
}
@@ -193,7 +193,7 @@ int last_stage_init(void)
{
struct acpi_fadt __maybe_unused *fadt;
- board_final_cleanup();
+ board_final_init();
if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
fadt = acpi_find_fadt();
diff --git a/arch/x86/cpu/efi/app.c b/arch/x86/cpu/efi/app.c
index 10677ecbc2..f754489784 100644
--- a/arch/x86/cpu/efi/app.c
+++ b/arch/x86/cpu/efi/app.c
@@ -24,7 +24,7 @@ int print_cpuinfo(void)
return default_print_cpuinfo();
}
-void board_final_cleanup(void)
+void board_final_init(void)
{
}
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index ddad02e375..30b4711b9a 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -363,7 +363,7 @@ int arch_misc_init(void)
return 0;
}
-void board_final_cleanup(void)
+void board_final_init(void)
{
struct quark_rcba *rcba;
u32 base, val;
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 8e3082d4c8..ea52954725 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -47,7 +47,7 @@ int fsp_init_phase_pci(void)
return status ? -EPERM : 0;
}
-void board_final_cleanup(void)
+void board_final_init(void)
{
u32 status;
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 40/44] x86: Update the comment about booting for FSP2
The comment here applies only to FSP1, so update it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Wolfgang Wallner --- (no changes since v1) arch/x86/cpu/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 01524635e9..4ad515ce08 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -124,6 +124,7 @@ car_init_ret: #endif #else /* +* Instructions for FSP1, but not FSP2: * U-Boot enters here twice. For the first time it comes from * car_init_done() with esp points to a temporary stack and esi * set to zero. For the second time it comes from fsp_init_done() -- 2.27.0.383.g050319c2ae-goog
[PATCH v2 44/44] acpi: Enable ACPI table generation by default on x86
This should ideally be used by all x86 boards in U-Boot. Enable it by default. If some boards don't use it, the cost is small. Signed-off-by: Simon Glass --- Changes in v2: - Don't enable this for qemu arch/Kconfig | 1 + drivers/core/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/Kconfig b/arch/Kconfig index a11f872938..9be02d1319 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -190,6 +190,7 @@ config X86 imply PCH imply RTC_MC146818 imply IRQ + imply ACPIGEN if !QEMU # Thing to enable for when SPL/TPL are enabled: SPL imply SPL_DM diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index a594899f37..00d1d80dc3 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -270,7 +270,7 @@ config DM_DEV_READ_INLINE config ACPIGEN bool "Support ACPI table generation in driver model" - default y if SANDBOX || GENERATE_ACPI_TABLE + default y if SANDBOX || (GENERATE_ACPI_TABLE && !QEMU) help This option enables generation of ACPI tables using driver-model devices. It adds a new operation struct to each driver, to support -- 2.27.0.383.g050319c2ae-goog
[PATCH v2 41/44] x86: Drop setup_pcat_compatibility()
This function does not exist anymore. Drop it from the header file.
Signed-off-by: Simon Glass
---
Changes in v2:
- Remove the function from zimage.c also
arch/x86/include/asm/u-boot-x86.h | 2 --
arch/x86/lib/zimage.c | 10 --
2 files changed, 12 deletions(-)
diff --git a/arch/x86/include/asm/u-boot-x86.h
b/arch/x86/include/asm/u-boot-x86.h
index bd3f44014c..d732661f6d 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -83,8 +83,6 @@ int default_print_cpuinfo(void);
/* Set up a UART which can be used with printch(), printhex8(), etc. */
int setup_internal_uart(int enable);
-void setup_pcat_compatibility(void);
-
void isa_unmap_rom(u32 addr);
u32 isa_map_rom(u32 bus_addr, int size);
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index 64d14e8911..d2b6002008 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -304,13 +304,6 @@ int setup_zimage(struct boot_params *setup_base, char
*cmd_line, int auto_boot,
return 0;
}
-void setup_pcat_compatibility(void)
- __attribute__((weak, alias("__setup_pcat_compatibility")));
-
-void __setup_pcat_compatibility(void)
-{
-}
-
int do_zboot(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
struct boot_params *base_ptr;
@@ -323,9 +316,6 @@ int do_zboot(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
disable_interrupts();
- /* Setup board for maximum PC/AT Compatibility */
- setup_pcat_compatibility();
-
if (argc >= 2) {
/* argv[1] holds the address of the bzImage */
s = argv[1];
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 39/44] x86: mp: Allow use of mp_run_on_cpus() without MP
At present if MP is not enabled (e.g. booting from coreboot) the 'mtrr'
command does not work correctly. It is not easy to make it work for all
CPUs, since coreboot has halted them and we would need to start them up
again, but it is easy enough to make them work on the boot CPU.
Update the code to avoid assuming that the MP init routine has completed,
so that this can work.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/mp_init.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 0f99a405bb..21fbe5bda5 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -558,7 +558,7 @@ static int get_bsp(struct udevice **devp, int *cpu_countp)
if (cpu_countp)
*cpu_countp = ret;
- return dev->req_seq;
+ return dev->req_seq >= 0 ? dev->req_seq : 0;
}
/**
@@ -718,9 +718,6 @@ int mp_run_on_cpus(int cpu_select, mp_run_func func, void
*arg)
int num_cpus;
int ret;
- if (!(gd->flags & GD_FLG_SMP_READY))
- return -ENXIO;
-
ret = get_bsp(, _cpus);
if (ret < 0)
return log_msg_ret("bsp", ret);
@@ -730,6 +727,13 @@ int mp_run_on_cpus(int cpu_select, mp_run_func func, void
*arg)
func(arg);
}
+ if (!(gd->flags & GD_FLG_SMP_READY)) {
+ /* Allow use of this function on the BSP only */
+ if (cpu_select == MP_SELECT_BSP || !cpu_select)
+ return 0;
+ return -ENXIO;
+ }
+
/* Allow up to 1 second for all APs to finish */
ret = run_ap_work(, dev, num_cpus, 1000 /* ms */);
if (ret)
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 38/44] x86: Store the coreboot table address in global_data
At present this information is used to locate and parse the tables but is
not stored. Store it so that we can display it to the user, e.g. with the
'bdinfo' command.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
arch/x86/cpu/coreboot/tables.c | 8 +++-
arch/x86/cpu/i386/cpu.c| 7 ++-
arch/x86/include/asm/global_data.h | 1 +
3 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/coreboot/tables.c b/arch/x86/cpu/coreboot/tables.c
index a5d31d1dea..1594b4a8b2 100644
--- a/arch/x86/cpu/coreboot/tables.c
+++ b/arch/x86/cpu/coreboot/tables.c
@@ -10,6 +10,8 @@
#include
#include
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* This needs to be in the .data section so that it's copied over during
* relocation. By default it's put in the .bss section which is simply filled
@@ -243,6 +245,10 @@ int get_coreboot_info(struct sysinfo_t *info)
if (addr < 0)
return addr;
ret = cb_parse_header((void *)addr, 0x1000, info);
+ if (!ret)
+ return -ENOENT;
+ gd->arch.coreboot_table = addr;
+ gd->flags |= GD_FLG_SKIP_LL_INIT;
- return ret == 1 ? 0 : -ENOENT;
+ return 0;
}
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index fca3f79b69..8f342dd06e 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -456,10 +456,15 @@ int x86_cpu_init_f(void)
int x86_cpu_reinit_f(void)
{
+ long addr;
+
setup_identity();
setup_pci_ram_top();
- if (locate_coreboot_table() >= 0)
+ addr = locate_coreboot_table();
+ if (addr >= 0) {
+ gd->arch.coreboot_table = addr;
gd->flags |= GD_FLG_SKIP_LL_INIT;
+ }
return 0;
}
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index 5bc251c0dd..3e4044593c 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -123,6 +123,7 @@ struct arch_global_data {
#endif
void *itss_priv;/* Private ITSS data pointer */
ulong acpi_start; /* Start address of ACPI tables */
+ ulong coreboot_table; /* Address of coreboot table */
};
#endif
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 35/44] x86: Add debugging to table writing
Writing tables is currently pretty opaque. Add a bit of debugging to the
process so we can see what tables are written and where they start/end in
memory.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/lib/tables.c | 38 --
1 file changed, 28 insertions(+), 10 deletions(-)
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 574d331d76..7bad5dd303 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#include
#include
@@ -20,21 +21,32 @@
*/
typedef ulong (*table_write)(ulong addr);
-static table_write table_write_funcs[] = {
+/**
+ * struct table_info - Information about each table to write
+ *
+ * @name: Name of table (for debugging)
+ * @write: Function to call to write this table
+ */
+struct table_info {
+ const char *name;
+ table_write write;
+};
+
+static struct table_info table_list[] = {
#ifdef CONFIG_GENERATE_PIRQ_TABLE
- write_pirq_routing_table,
+ { "pirq", write_pirq_routing_table },
#endif
#ifdef CONFIG_GENERATE_SFI_TABLE
- write_sfi_table,
+ { "sfi", write_sfi_table, },
#endif
#ifdef CONFIG_GENERATE_MP_TABLE
- write_mp_table,
+ { "mp", write_mp_table, },
#endif
#ifdef CONFIG_GENERATE_ACPI_TABLE
- write_acpi_tables,
+ { "acpi", write_acpi_tables, },
#endif
#ifdef CONFIG_GENERATE_SMBIOS_TABLE
- write_smbios_table,
+ { "smbios", write_smbios_table, },
#endif
};
@@ -58,19 +70,22 @@ void write_tables(void)
u32 rom_table_end;
#ifdef CONFIG_SEABIOS
u32 high_table, table_size;
- struct memory_area cfg_tables[ARRAY_SIZE(table_write_funcs) + 1];
+ struct memory_area cfg_tables[ARRAY_SIZE(table_list) + 1];
#endif
int i;
- for (i = 0; i < ARRAY_SIZE(table_write_funcs); i++) {
- rom_table_end = table_write_funcs[i](rom_table_start);
+ debug("Writing tables to %x:\n", rom_table_start);
+ for (i = 0; i < ARRAY_SIZE(table_list); i++) {
+ const struct table_info *table = _list[i];
+
+ rom_table_end = table->write(rom_table_start);
rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
#ifdef CONFIG_SEABIOS
table_size = rom_table_end - rom_table_start;
high_table = (u32)high_table_malloc(table_size);
if (high_table) {
- table_write_funcs[i](high_table);
+ table->write(high_table);
cfg_tables[i].start = high_table;
cfg_tables[i].size = table_size;
@@ -79,6 +94,8 @@ void write_tables(void)
}
#endif
+ debug("- wrote '%s' to %x, end %x\n", table->name,
+ rom_table_start, rom_table_end);
rom_table_start = rom_table_end;
}
@@ -87,4 +104,5 @@ void write_tables(void)
cfg_tables[i].size = 0;
write_coreboot_table(CB_TABLE_ADDR, cfg_tables);
#endif
+ debug("- done writing tables\n");
}
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 36/44] x86: apl: Set the correct boot mode in the FSP-M code
If there is MRC information we should run FSP-M with a different
boot_mode flag since it is supposed to do a 'fast path' through the
memory init. Fix this.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Add a new commit to handle the boot_mode fix
arch/x86/cpu/apollolake/fsp_m.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c
index 65461d85b8..e19a2b0826 100644
--- a/arch/x86/cpu/apollolake/fsp_m.c
+++ b/arch/x86/cpu/apollolake/fsp_m.c
@@ -26,7 +26,8 @@ int fspm_update_config(struct udevice *dev, struct fspm_upd
*upd)
return log_msg_ret("mrc", cache_ret);
arch->stack_base = (void *)0xfef96000;
arch->boot_loader_tolum_size = 0;
- arch->boot_mode = FSP_BOOT_WITH_FULL_CONFIGURATION;
+ arch->boot_mode = cache_ret ? FSP_BOOT_WITH_FULL_CONFIGURATION :
+ FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES;
node = dev_ofnode(dev);
if (!ofnode_valid(node))
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 37/44] x86: apl: Adjust FSP-M code to avoid hard-coded address
Update this code to calculate the address to use, rather than hard-coding
it. Obtain the requested stack size from the FSP.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Split out the boot_mode change into a separate patch
arch/x86/cpu/apollolake/fsp_m.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c
index e19a2b0826..cef937573b 100644
--- a/arch/x86/cpu/apollolake/fsp_m.c
+++ b/arch/x86/cpu/apollolake/fsp_m.c
@@ -24,7 +24,8 @@ int fspm_update_config(struct udevice *dev, struct fspm_upd
*upd)
cache_ret = prepare_mrc_cache(upd);
if (cache_ret && cache_ret != -ENOENT)
return log_msg_ret("mrc", cache_ret);
- arch->stack_base = (void *)0xfef96000;
+ arch->stack_base = (void *)(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE -
+arch->stack_size);
arch->boot_loader_tolum_size = 0;
arch->boot_mode = cache_ret ? FSP_BOOT_WITH_FULL_CONFIGURATION :
FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES;
--
2.27.0.383.g050319c2ae-goog
Re: [PATCH v1 34/43] x86: apl: Fix save/restore of ITSS priorities
Hi Bin,
On Tue, 30 Jun 2020 at 02:27, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
> >
> > The FSP-S changes the ITSS priorities. The code that tries to save it
> > before running FSP-S and restore it afterwards does not work as U-Boot
> > relocates in between the save and restore. This means that the driver
> > data saved before relocation is lost and the new driver just sees zeroes.
> >
> > Fix this by allocating space in the relocated memory for the ITSS data.
> > Save it there and access it from the driver after relocation.
> >
> > This fixes interrupt handling on coral.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/cpu/apollolake/fsp_s.c| 11 +--
> > arch/x86/cpu/cpu.c | 13 +
> > arch/x86/cpu/intel_common/itss.c | 25 +++--
> > arch/x86/include/asm/global_data.h | 1 +
> > arch/x86/include/asm/itss.h| 2 +-
> > drivers/misc/irq-uclass.c | 2 +-
> > 6 files changed, 44 insertions(+), 10 deletions(-)
> >
[..]
> > diff --git a/drivers/misc/irq-uclass.c b/drivers/misc/irq-uclass.c
> > index 98bc79eaba..6b32b451a6 100644
> > --- a/drivers/misc/irq-uclass.c
> > +++ b/drivers/misc/irq-uclass.c
> > @@ -170,7 +170,7 @@ int irq_first_device_type(enum irq_dev_t type, struct
> > udevice **devp)
> >
> > ret = uclass_first_device_drvdata(UCLASS_IRQ, type, devp);
> > if (ret)
> > - return log_msg_ret("find", ret);
> > + return ret;
>
> Is this change intended?
Yes but I forgot to mention it in the commit message. Will add it.
Regards,
Simon
[PATCH v2 33/44] x86: irq: Support flags for acpi_gpe
This binding currently has a flags cell but it is not used. Make use of it
to create ACPI tables for interrupts.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/cpu/acpi_gpe.c | 26 +++
.../interrupt-controller/x86-irq.h| 14 ++
2 files changed, 40 insertions(+)
create mode 100644 include/dt-bindings/interrupt-controller/x86-irq.h
diff --git a/arch/x86/cpu/acpi_gpe.c b/arch/x86/cpu/acpi_gpe.c
index 8aa2009bd6..70badb15a3 100644
--- a/arch/x86/cpu/acpi_gpe.c
+++ b/arch/x86/cpu/acpi_gpe.c
@@ -8,7 +8,10 @@
#include
#include
#include
+#include
#include
+#include
+#include
/**
* struct acpi_gpe_priv - private driver information
@@ -62,13 +65,36 @@ static int acpi_gpe_ofdata_to_platdata(struct udevice *dev)
static int acpi_gpe_of_xlate(struct irq *irq, struct ofnode_phandle_args *args)
{
irq->id = args->args[0];
+ irq->flags = args->args[1];
return 0;
}
+#if CONFIG_IS_ENABLED(ACPIGEN)
+static int acpi_gpe_get_acpi(const struct irq *irq, struct acpi_irq *acpi_irq)
+{
+ memset(acpi_irq, '\0', sizeof(*acpi_irq));
+ acpi_irq->pin = irq->id;
+ acpi_irq->mode = irq->flags & IRQ_TYPE_EDGE_BOTH ?
+ ACPI_IRQ_EDGE_TRIGGERED : ACPI_IRQ_LEVEL_TRIGGERED;
+ acpi_irq->polarity = irq->flags &
+(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW) ?
+ACPI_IRQ_ACTIVE_LOW : ACPI_IRQ_ACTIVE_HIGH;
+ acpi_irq->shared = irq->flags & X86_IRQ_TYPE_SHARED ?
+ ACPI_IRQ_SHARED : ACPI_IRQ_EXCLUSIVE;
+ acpi_irq->wake = irq->flags & X86_IRQ_TYPE_WAKE ? ACPI_IRQ_WAKE :
+ ACPI_IRQ_NO_WAKE;
+
+ return 0;
+}
+#endif
+
static const struct irq_ops acpi_gpe_ops = {
.read_and_clear = acpi_gpe_read_and_clear,
.of_xlate = acpi_gpe_of_xlate,
+#if CONFIG_IS_ENABLED(ACPIGEN)
+ .get_acpi = acpi_gpe_get_acpi,
+#endif
};
static const struct udevice_id acpi_gpe_ids[] = {
diff --git a/include/dt-bindings/interrupt-controller/x86-irq.h
b/include/dt-bindings/interrupt-controller/x86-irq.h
new file mode 100644
index 00..9e0b4612e1
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/x86-irq.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2019 Google LLC
+ *
+ * This provides additional flags used by x86.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_X86_IRQ_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_X86_IRQ_H
+
+#define X86_IRQ_TYPE_SHARED(1 << 4)
+#define X86_IRQ_TYPE_WAKE (1 << 5)
+
+#endif
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 28/44] i2c: designware_i2c: Support ACPI table generation
Update the PCI driver to generate ACPI information so that Linux has the
full information about each I2C bus.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
---
Changes in v2:
- Add a few blank lines
- Drop dead code behind if (0)
Changes in v1:
- Capitalise ACPI_OPS_PTR
drivers/i2c/designware_i2c.c | 26 +
drivers/i2c/designware_i2c.h | 15 +
drivers/i2c/designware_i2c_pci.c | 96 +++-
3 files changed, 136 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index 44a1f33398..cf892c69d9 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -333,6 +333,32 @@ static int _dw_i2c_set_bus_speed(struct dw_i2c *priv,
struct i2c_regs *i2c_base,
/* Restore back i2c now speed set */
if (ena == IC_ENABLE_0B)
dw_i2c_enable(i2c_base, true);
+ if (priv)
+ priv->config = config;
+
+ return 0;
+}
+
+int dw_i2c_gen_speed_config(const struct udevice *dev, int speed_hz,
+ struct dw_i2c_speed_config *config)
+{
+ struct dw_i2c *priv = dev_get_priv(dev);
+ ulong rate;
+ int ret;
+
+#if CONFIG_IS_ENABLED(CLK)
+ rate = clk_get_rate(>clk);
+ if (IS_ERR_VALUE(rate))
+ return log_msg_ret("clk", -EINVAL);
+#else
+ rate = IC_CLK;
+#endif
+
+ ret = calc_bus_speed(priv, priv->regs, speed_hz, rate, config);
+ if (ret)
+ printf("%s: ret=%d\n", __func__, ret);
+ if (ret)
+ return log_msg_ret("calc_bus_speed", ret);
return 0;
}
diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
index dc9a6ccb63..d87a3bff93 100644
--- a/drivers/i2c/designware_i2c.h
+++ b/drivers/i2c/designware_i2c.h
@@ -205,6 +205,7 @@ struct dw_i2c {
#if CONFIG_IS_ENABLED(CLK)
struct clk clk;
#endif
+ struct dw_i2c_speed_config config;
};
extern const struct dm_i2c_ops designware_i2c_ops;
@@ -213,4 +214,18 @@ int designware_i2c_probe(struct udevice *bus);
int designware_i2c_remove(struct udevice *dev);
int designware_i2c_ofdata_to_platdata(struct udevice *bus);
+/**
+ * dw_i2c_gen_speed_config() - Calculate config info from requested speed1
+ *
+ * Calculate the speed config from the given @speed_hz and return it so that
+ * it can be incorporated in ACPI tables
+ *
+ * @dev: I2C bus to check
+ * @speed_hz: Requested speed in Hz
+ * @config: Returns config to use for that speed
+ * @return 0 if OK, -ve on error
+ */
+int dw_i2c_gen_speed_config(const struct udevice *dev, int speed_hz,
+ struct dw_i2c_speed_config *config);
+
#endif /* __DW_I2C_H_ */
diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c
index bd34ec0b47..d0d869c81a 100644
--- a/drivers/i2c/designware_i2c_pci.c
+++ b/drivers/i2c/designware_i2c_pci.c
@@ -9,7 +9,12 @@
#include
#include
#include
+#include
+#include
#include
+#include
+#include
+#include
#include "designware_i2c.h"
enum {
@@ -87,6 +92,9 @@ static int designware_i2c_pci_bind(struct udevice *dev)
{
char name[20];
+ if (dev_of_valid(dev))
+ return 0;
+
/*
* Create a unique device name for PCI type devices
* ToDo:
@@ -100,13 +108,98 @@ static int designware_i2c_pci_bind(struct udevice *dev)
* be possible. We cannot use static data in drivers since they may be
* used in SPL or before relocation.
*/
- dev->req_seq = gd->arch.dw_i2c_num_cards++;
+ dev->req_seq = uclass_find_next_free_req_seq(UCLASS_I2C);
sprintf(name, "i2c_designware#%u", dev->req_seq);
device_set_name(dev, name);
return 0;
}
+/*
+ * Write ACPI object to describe speed configuration.
+ *
+ * ACPI Object: Name ("", Package () { scl_lcnt, scl_hcnt, sda_hold }
+ *
+ * SSCN: I2C_SPEED_STANDARD
+ * FMCN: I2C_SPEED_FAST
+ * FPCN: I2C_SPEED_FAST_PLUS
+ * HSCN: I2C_SPEED_HIGH
+ */
+static void dw_i2c_acpi_write_speed_config(struct acpi_ctx *ctx,
+ struct dw_i2c_speed_config *config)
+{
+ switch (config->speed_mode) {
+ case IC_SPEED_MODE_HIGH:
+ acpigen_write_name(ctx, "HSCN");
+ break;
+ case IC_SPEED_MODE_FAST_PLUS:
+ acpigen_write_name(ctx, "FPCN");
+ break;
+ case IC_SPEED_MODE_FAST:
+ acpigen_write_name(ctx, "FMCN");
+ break;
+ case IC_SPEED_MODE_STANDARD:
+ default:
+ acpigen_write_name(ctx, "SSCN");
+ }
+
+ /* Package () { scl_lcnt, scl_hcnt, sda_hold } */
+ acpigen_write_package(ctx, 3);
+ acpigen_write_word(ctx, config->scl_hcnt);
+ acpigen_write_word(ctx, config->scl_lcnt);
+ acpigen_write_dword(ctx, config->sda_hold);
+ acpigen_pop_len(ctx);
+}
+
+/*
+ * Generate I2C timing information into the SSDT
[PATCH v2 31/44] x86: apl: Hide the p2sb on exit from U-Boot
This confuses Linux's PCI probing so needs to be hidden when booting
Linux. Add a remove() method to handle this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Tested-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/cpu/intel_common/p2sb.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index db3d70d92a..361d4c90cb 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -153,6 +153,17 @@ static int intel_p2sb_set_hide(struct udevice *dev, bool
hide)
return 0;
}
+static int p2sb_remove(struct udevice *dev)
+{
+ int ret;
+
+ ret = intel_p2sb_set_hide(dev, true);
+ if (ret)
+ return log_msg_ret("hide", ret);
+
+ return 0;
+}
+
static int p2sb_child_post_bind(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -183,10 +194,12 @@ U_BOOT_DRIVER(p2sb_drv) = {
.id = UCLASS_P2SB,
.of_match = p2sb_ids,
.probe = p2sb_probe,
+ .remove = p2sb_remove,
.ops= _ops,
.ofdata_to_platdata = p2sb_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct p2sb_platdata),
.per_child_platdata_auto_alloc_size =
sizeof(struct p2sb_child_platdata),
.child_post_bind = p2sb_child_post_bind,
+ .flags = DM_FLAG_OS_PREPARE,
};
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 32/44] pmc: Move common registers to the header file
These registers need to be accesses from ACPI code, so move them to the
header file.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
drivers/power/acpi_pmc/acpi-pmc-uclass.c | 9 -
include/power/acpi_pmc.h | 14 ++
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/power/acpi_pmc/acpi-pmc-uclass.c
b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
index 1c79f835c6..828963d8a0 100644
--- a/drivers/power/acpi_pmc/acpi-pmc-uclass.c
+++ b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
@@ -15,15 +15,6 @@
#include
#include
-enum {
- PM1_STS = 0x00,
- PM1_EN = 0x02,
- PM1_CNT = 0x04,
-
- GPE0_STS= 0x20,
- GPE0_EN = 0x30,
-};
-
struct tco_regs {
u32 tco_rld;
u32 tco_sts;
diff --git a/include/power/acpi_pmc.h b/include/power/acpi_pmc.h
index 1f50c23f5f..5fbf745136 100644
--- a/include/power/acpi_pmc.h
+++ b/include/power/acpi_pmc.h
@@ -6,10 +6,22 @@
#ifndef __ACPI_PMC_H
#define __ACPI_PMC_H
+#ifndef __ACPI__
+
enum {
GPE0_REG_MAX= 4,
};
+enum {
+ PM1_STS = 0x00,
+ PM1_EN = 0x02,
+ PM1_CNT = 0x04,
+ PM1_TMR = 0x08,
+
+ GPE0_STS= 0x20,
+ GPE0_EN = 0x30,
+};
+
/**
* struct acpi_pmc_upriv - holds common data for the x86 PMC
*
@@ -182,4 +194,6 @@ void pmc_dump_info(struct udevice *dev);
*/
int pmc_gpe_init(struct udevice *dev);
+#endif /* !__ACPI__ */
+
#endif
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 34/44] x86: apl: Fix save/restore of ITSS priorities
The FSP-S changes the ITSS priorities. The code that tries to save it
before running FSP-S and restore it afterwards does not work as U-Boot
relocates in between the save and restore. This means that the driver
data saved before relocation is lost and the new driver just sees zeroes.
Fix this by allocating space in the relocated memory for the ITSS data.
Save it there and access it from the driver after relocation.
This fixes interrupt handling on coral.
Also drop the log_msg_ret() in irq_first_device_type() since this function
can be called speculatively in places where we are not sure if there is
an interrupt controller of that type. The resulting log errors are
confusing when there is no error.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add mention of why log_msg_ret() is dropped
arch/x86/cpu/apollolake/fsp_s.c| 11 +--
arch/x86/cpu/cpu.c | 13 +
arch/x86/cpu/intel_common/itss.c | 25 +++--
arch/x86/include/asm/global_data.h | 1 +
arch/x86/include/asm/itss.h| 2 +-
drivers/misc/irq-uclass.c | 2 +-
6 files changed, 44 insertions(+), 10 deletions(-)
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index 3a54297a28..e54b0ac104 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -160,11 +160,6 @@ int arch_fsps_preinit(void)
ret = irq_first_device_type(X86_IRQT_ITSS, );
if (ret)
return log_msg_ret("no itss", ret);
- /*
-* Snapshot the current GPIO IRQ polarities. FSP is setting a default
-* policy that doesn't honour boards' requirements
-*/
- irq_snapshot_polarities(itss);
/*
* Clear the GPI interrupt status and enable registers. These
@@ -203,7 +198,11 @@ int arch_fsp_init_r(void)
ret = irq_first_device_type(X86_IRQT_ITSS, );
if (ret)
return log_msg_ret("no itss", ret);
- /* Restore GPIO IRQ polarities back to previous settings */
+
+ /*
+* Restore GPIO IRQ polarities back to previous settings. This was
+* stored in reserve_arch() - see X86_IRQT_ITSS
+*/
irq_restore_polarities(itss);
/* soc_init() */
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index baa7dae172..9bc243ebc8 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -274,6 +275,9 @@ int cpu_init_r(void)
#ifndef CONFIG_EFI_STUB
int reserve_arch(void)
{
+ struct udevice *itss;
+ int ret;
+
if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE))
mrccache_reserve();
@@ -291,6 +295,15 @@ int reserve_arch(void)
fsp_save_s3_stack();
}
}
+ ret = irq_first_device_type(X86_IRQT_ITSS, );
+ if (!ret) {
+ /*
+* Snapshot the current GPIO IRQ polarities. FSP-S is about to
+* run and will set a default policy that doesn't honour boards'
+* requirements
+*/
+ irq_snapshot_polarities(itss);
+ }
return 0;
}
diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c
index 963afa8f5b..fe84ebe29f 100644
--- a/arch/x86/cpu/intel_common/itss.c
+++ b/arch/x86/cpu/intel_common/itss.c
@@ -65,14 +65,23 @@ static int snapshot_polarities(struct udevice *dev)
int i;
reg_start = start / IRQS_PER_IPC;
- reg_end = (end + IRQS_PER_IPC - 1) / IRQS_PER_IPC;
+ reg_end = DIV_ROUND_UP(end, IRQS_PER_IPC);
+ log_info("ITSS IRQ Polarities snapshot %p\n", priv->irq_snapshot);
for (i = reg_start; i < reg_end; i++) {
uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
priv->irq_snapshot[i] = pcr_read32(dev, reg);
+ log_debug(" - %d, reg %x: irq_snapshot[i] %x\n", i, reg,
+ priv->irq_snapshot[i]);
}
+ /* Save the snapshot for use after relocation */
+ gd->start_addr_sp -= sizeof(*priv);
+ gd->start_addr_sp &= ~0xf;
+ gd->arch.itss_priv = (void *)gd->start_addr_sp;
+ memcpy(gd->arch.itss_priv, priv, sizeof(*priv));
+
return 0;
}
@@ -91,16 +100,26 @@ static void show_polarities(struct udevice *dev, const
char *msg)
static int restore_polarities(struct udevice *dev)
{
struct itss_priv *priv = dev_get_priv(dev);
+ struct itss_priv *old_priv;
const int start = GPIO_IRQ_START;
const int end = GPIO_IRQ_END;
int reg_start;
int reg_end;
int i;
+ /* Get the snapshot which was stored by the pre-reloc device */
+ old_priv = gd->arch.itss_priv;
+ if (!old_priv)
+ return log_msg_ret("priv", -EFAULT);
+ memcpy(priv->irq_snapshot, old_priv->irq_snapshot,
+ sizeof(priv->irq_snapshot));
+
[PATCH v2 27/44] i2c: Add log_ret() on error
Add a few of these calls to make it easier to see where an error occurs,
if CONFIG_LOG_ERROR_RETURN is enabled.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Reviewed-by: Heiko Schocher
---
(no changes since v1)
drivers/i2c/i2c-uclass.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 8bc69e870f..2373aa2ea4 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -458,7 +458,7 @@ int i2c_set_chip_offset_len(struct udevice *dev, uint
offset_len)
struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
if (offset_len > I2C_MAX_OFFSET_LEN)
- return -EINVAL;
+ return log_ret(-EINVAL);
chip->offset_len = offset_len;
return 0;
@@ -625,7 +625,7 @@ int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct
dm_i2c_chip *chip)
if (addr == -1) {
debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__,
dev_read_name(dev), dev->name);
- return -EINVAL;
+ return log_ret(-EINVAL);
}
chip->chip_addr = addr;
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 30/44] x86: apl: Support set_hide() in p2sb driver
Add support for this new method in the driver and in the fsp-s setup.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Tested-by: Wolfgang Wallner
---
Changes in v2:
- Move .ops change from the next patch
arch/x86/cpu/apollolake/fsp_s.c | 26 +++---
arch/x86/cpu/intel_common/p2sb.c | 31 +++
2 files changed, 42 insertions(+), 15 deletions(-)
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index 0f5520fc7d..3a54297a28 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -21,10 +22,11 @@
#include
#include
#include
+#include
#include
#include
+#include
#include
-#include
#define PCH_P2SB_E00xe0
#define HIDE_BIT BIT(0)
@@ -59,12 +61,6 @@ int fsps_update_config(struct udevice *dev, ulong rom_offset,
return fsp_s_update_config_from_dtb(node, cfg);
}
-static void p2sb_set_hide_bit(pci_dev_t dev, int hide)
-{
- pci_x86_clrset_config(dev, PCH_P2SB_E0 + 1, HIDE_BIT,
- hide ? HIDE_BIT : 0, PCI_SIZE_8);
-}
-
/* Configure package power limits */
static int set_power_limits(struct udevice *dev)
{
@@ -137,15 +133,15 @@ static int set_power_limits(struct udevice *dev)
int p2sb_unhide(void)
{
- pci_dev_t dev = PCI_BDF(0, 0xd, 0);
- ulong val;
-
- p2sb_set_hide_bit(dev, 0);
-
- pci_x86_read_config(dev, PCI_VENDOR_ID, , PCI_SIZE_16);
+ struct udevice *dev;
+ int ret;
- if (val != PCI_VENDOR_ID_INTEL)
- return log_msg_ret("p2sb unhide", -EIO);
+ ret = uclass_find_first_device(UCLASS_P2SB, );
+ if (ret)
+ return log_msg_ret("p2sb", ret);
+ ret = p2sb_set_hide(dev, false);
+ if (ret)
+ return log_msg_ret("hide", ret);
return 0;
}
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index ec35d04ae5..db3d70d92a 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -16,6 +16,9 @@
#include
#include
+#define PCH_P2SB_E00xe0
+#define HIDE_BIT BIT(0)
+
struct p2sb_platdata {
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct dtd_intel_p2sb dtplat;
@@ -127,6 +130,29 @@ static int p2sb_probe(struct udevice *dev)
return 0;
}
+static void p2sb_set_hide_bit(struct udevice *dev, bool hide)
+{
+ dm_pci_clrset_config8(dev, PCH_P2SB_E0 + 1, HIDE_BIT,
+ hide ? HIDE_BIT : 0);
+}
+
+static int intel_p2sb_set_hide(struct udevice *dev, bool hide)
+{
+ u16 vendor;
+
+ if (!CONFIG_IS_ENABLED(PCI))
+ return -EPERM;
+ p2sb_set_hide_bit(dev, hide);
+
+ dm_pci_read_config16(dev, PCI_VENDOR_ID, );
+ if (hide && vendor != 0x)
+ return log_msg_ret("hide", -EEXIST);
+ else if (!hide && vendor != PCI_VENDOR_ID_INTEL)
+ return log_msg_ret("unhide", -ENOMEDIUM);
+
+ return 0;
+}
+
static int p2sb_child_post_bind(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -143,6 +169,10 @@ static int p2sb_child_post_bind(struct udevice *dev)
return 0;
}
+struct p2sb_ops p2sb_ops = {
+ .set_hide = intel_p2sb_set_hide,
+};
+
static const struct udevice_id p2sb_ids[] = {
{ .compatible = "intel,p2sb" },
{ }
@@ -153,6 +183,7 @@ U_BOOT_DRIVER(p2sb_drv) = {
.id = UCLASS_P2SB,
.of_match = p2sb_ids,
.probe = p2sb_probe,
+ .ops= _ops,
.ofdata_to_platdata = p2sb_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct p2sb_platdata),
.per_child_platdata_auto_alloc_size =
--
2.27.0.383.g050319c2ae-goog
Re: [PATCH v1 15/43] sound: Add an ACPI driver for Dialog Semicondutor da7219
Hi Bin, On Tue, 30 Jun 2020 at 00:06, Bin Meng wrote: > > Hi Simon, > > On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote: > > > > This chip is used on coral and we need to generate ACPI tables for sound > > to make it work. Add a driver that does just this (i.e. at present does > > not actually support playing sound). > > > > Signed-off-by: Simon Glass > > --- > > > > Changes in v1: > > - Use acpi,ddn instead of acpi,desc > > - Add a check for invalid node > > - Add NHLT support > > - Capitalise ACPI_OPS_PTR > > - Rebase to master > > > > configs/sandbox_defconfig | 1 + > > doc/device-tree-bindings/sound/da7219.txt | 113 + > > drivers/sound/Kconfig | 9 ++ > > drivers/sound/Makefile| 1 + > > drivers/sound/da7219.c| 189 ++ > > 5 files changed, 313 insertions(+) > > create mode 100644 doc/device-tree-bindings/sound/da7219.txt > > create mode 100644 drivers/sound/da7219.c > > > > diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig > > index cb6b4b0ee7..6368e278f2 100644 > > --- a/configs/sandbox_defconfig > > +++ b/configs/sandbox_defconfig > > @@ -202,6 +202,7 @@ CONFIG_SANDBOX_SERIAL=y > > CONFIG_SMEM=y > > CONFIG_SANDBOX_SMEM=y > > CONFIG_SOUND=y > > +CONFIG_SOUND_DA7219=y > > CONFIG_SOUND_SANDBOX=y > > CONFIG_SANDBOX_SPI=y > > CONFIG_SPMI=y > > diff --git a/doc/device-tree-bindings/sound/da7219.txt > > b/doc/device-tree-bindings/sound/da7219.txt > > new file mode 100644 > > index 00..5fd8a9f1e7 > > --- /dev/null > > +++ b/doc/device-tree-bindings/sound/da7219.txt > > @@ -0,0 +1,113 @@ > > +Dialog Semiconductor DA7219 Audio Codec bindings > > + > > +DA7219 is an audio codec with advanced accessory detect features. > > + > > +== > > + > > +Required properties: > > +- compatible : Should be "dlg,da7219" > > +- reg: Specifies the I2C slave address > > + > > +- interrupts : IRQ line info for DA7219. > > + (See > > Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for > > + further information relating to interrupt properties) > > + > > +- VDD-supply: VDD power supply for the device > > +- VDDMIC-supply: VDDMIC power supply for the device > > +- VDDIO-supply: VDDIO power supply for the device > > + (See Documentation/devicetree/bindings/regulator/regulator.txt for > > further > > + information relating to regulators) > > + > > +Optional properties: > > +- interrupt-names : Name associated with interrupt line. Should be > > "wakeup" if > > + interrupt is to be used to wake system, otherwise "irq" should be used. > > +- wakeup-source: Flag to indicate this device can wake system > > (suspend/resume). > > + > > +- #clock-cells : Should be set to '<0>', only one clock source provided; > > +- clock-output-names : Name given for DAI clocks output; > > + > > +- clocks : phandle and clock specifier for codec MCLK. > > +- clock-names : Clock name string for 'clocks' attribute, should be "mclk". > > + > > +- dlg,micbias-lvl : Voltage (mV) for Mic Bias > > + [<1600>, <1800>, <2000>, <2200>, <2400>, <2600>] > > +- dlg,mic-amp-in-sel : Mic input source type > > + ["diff", "se_p", "se_n"] > > +- dlg,mclk-name : String name of MCLK for ACPI > > + > > +Deprecated properties: > > +- dlg,ldo-lvl : Required internal LDO voltage (mV) level for digital engine > > + (LDO unavailable in production HW so property no longer required). > > + > > +== > > + > > +Child node - 'da7219_aad': > > + > > +Optional properties: > > +- dlg,micbias-pulse-lvl : Mic bias higher voltage pulse level (mV). > > + [<2800>, <2900>] > > +- dlg,micbias-pulse-time : Mic bias higher voltage pulse duration (ms) > > +- dlg,btn-cfg : Periodic button press measurements for 4-pole jack (ms) > > + [<2>, <5>, <10>, <50>, <100>, <200>, <500>] > > +- dlg,mic-det-thr : Impedance threshold for mic detection measurement > > (Ohms) > > + [<200>, <500>, <750>, <1000>] > > +- dlg,jack-ins-deb : Debounce time for jack insertion (ms) > > + [<5>, <10>, <20>, <50>, <100>, <200>, <500>, <1000>] > > +- dlg,jack-det-rate: Jack type detection latency (3/4 pole) > > + ["32ms_64ms", "64ms_128ms", "128ms_256ms", "256ms_512ms"] > > +- dlg,jack-rem-deb : Debounce time for jack removal (ms) > > + [<1>, <5>, <10>, <20>] > > +- dlg,a-d-btn-thr : Impedance threshold between buttons A and D > > + [0x0 - 0xFF] > > +- dlg,d-b-btn-thr : Impedance threshold between buttons D and B > > + [0x0 - 0xFF] > > +- dlg,b-c-btn-thr : Impedance threshold between buttons B and C > > + [0x0 - 0xFF] > > +- dlg,c-mic-btn-thr : Impedance threshold between button C and Mic > > + [0x0 - 0xFF] > > +- dlg,btn-avg : Number of 8-bit readings for averaged button measurement > > + [<1>, <2>, <4>, <8>] > > +- dlg,adc-1bit-rpt : Repeat count for 1-bit button measurement > > + [<1>, <2>, <4>, <8>] > > + > > +== > > + > > +Example: > > + > >
[PATCH v2 29/44] p2sb: Add a method to hide the bus
The P2SB bus needs to be hidden in some cases so that it does not get
auto-configured by Linux. Add a method for this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Tested-by: Wolfgang Wallner
---
(no changes since v1)
drivers/misc/p2sb-uclass.c | 10 ++
include/p2sb.h | 25 -
2 files changed, 34 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/p2sb-uclass.c b/drivers/misc/p2sb-uclass.c
index d5fe12ebd8..b5219df46b 100644
--- a/drivers/misc/p2sb-uclass.c
+++ b/drivers/misc/p2sb-uclass.c
@@ -18,6 +18,16 @@
#define PCR_COMMON_IOSF_1_01
+int p2sb_set_hide(struct udevice *dev, bool hide)
+{
+ struct p2sb_ops *ops = p2sb_get_ops(dev);
+
+ if (!ops->set_hide)
+ return -ENOSYS;
+
+ return ops->set_hide(dev, hide);
+}
+
void *pcr_reg_address(struct udevice *dev, uint offset)
{
struct p2sb_child_platdata *pplat = dev_get_parent_platdata(dev);
diff --git a/include/p2sb.h b/include/p2sb.h
index 74eb08b7ff..93e1155dca 100644
--- a/include/p2sb.h
+++ b/include/p2sb.h
@@ -31,13 +31,36 @@ struct p2sb_uc_priv {
};
/**
- * struct p2sb_ops - Operations for the P2SB (none at present)
+ * struct p2sb_ops - Operations for the P2SB
*/
struct p2sb_ops {
+ /**
+* set_hide() - Set/clear the 'hide' bit on the p2sb
+*
+* This device can be hidden from the PCI bus if needed. This method
+* can be called before the p2sb is probed.
+*
+* @dev: P2SB device
+* @hide: true to hide the device, false to show it
+* @return 0 if OK, -ve on error
+*/
+ int (*set_hide)(struct udevice *dev, bool hide);
};
#define p2sb_get_ops(dev)((struct p2sb_ops *)(dev)->driver->ops)
+/**
+ * p2sb_set_hide() - Set/clear the 'hide' bit on the p2sb
+ *
+ * This device can be hidden from the PCI bus if needed. This method
+ * can be called before the p2sb is probed.
+ *
+ * @dev: P2SB device
+ * @hide: true to hide the device, false to show it
+ * @return 0 if OK, -ve on error
+ */
+int p2sb_set_hide(struct udevice *dev, bool hide);
+
/**
* pcr_read32/16/8() - Read from a PCR device
*
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 26/44] i2c: designware_i2c: Add a little more debugging
Add debugging for a few more values and also use log to show return values
when something goes wrong. This makes it easier to see the root cause.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Reviewed-by: Heiko Schocher
---
(no changes since v1)
Changes in v1:
- Add new patch to improve designware_i2c debugging
drivers/i2c/designware_i2c.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index 3616e2105f..44a1f33398 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -160,9 +160,9 @@ static int dw_i2c_calc_timing(struct dw_i2c *priv, enum
i2c_speed_mode mode,
min_tlow_cnt = calc_counts(ic_clk, info->min_scl_lowtime_ns);
min_thigh_cnt = calc_counts(ic_clk, info->min_scl_hightime_ns);
- debug("dw_i2c: period %d rise %d fall %d tlow %d thigh %d spk %d\n",
- period_cnt, rise_cnt, fall_cnt, min_tlow_cnt, min_thigh_cnt,
- spk_cnt);
+ debug("dw_i2c: mode %d, ic_clk %d, speed %d, period %d rise %d fall %d
tlow %d thigh %d spk %d\n",
+ mode, ic_clk, info->speed, period_cnt, rise_cnt, fall_cnt,
+ min_tlow_cnt, min_thigh_cnt, spk_cnt);
/*
* Back-solve for hcnt and lcnt according to the following equations:
@@ -174,7 +174,7 @@ static int dw_i2c_calc_timing(struct dw_i2c *priv, enum
i2c_speed_mode mode,
if (hcnt < 0 || lcnt < 0) {
debug("dw_i2c: bad counts. hcnt = %d lcnt = %d\n", hcnt, lcnt);
- return -EINVAL;
+ return log_msg_ret("counts", -EINVAL);
}
/*
@@ -713,7 +713,7 @@ static int designware_i2c_set_bus_speed(struct udevice
*bus, unsigned int speed)
#if CONFIG_IS_ENABLED(CLK)
rate = clk_get_rate(>clk);
if (IS_ERR_VALUE(rate))
- return -EINVAL;
+ return log_ret(-EINVAL);
#else
rate = IC_CLK;
#endif
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 25/44] x86: gpio: Add support for obtaining ACPI info for a GPIO
Implement the method that converts a GPIO into the form used by ACPI, so
that GPIOs can be added to ACPI tables.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Use acpi_get_path() to get device path
drivers/gpio/intel_gpio.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c
index b4d5be97da..6a3a8c4cfa 100644
--- a/drivers/gpio/intel_gpio.c
+++ b/drivers/gpio/intel_gpio.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -19,6 +20,7 @@
#include
#include
#include
+#include
#include
static int intel_gpio_direction_input(struct udevice *dev, uint offset)
@@ -128,6 +130,35 @@ static int intel_gpio_xlate(struct udevice *orig_dev,
struct gpio_desc *desc,
return 0;
}
+#if CONFIG_IS_ENABLED(ACPIGEN)
+static int intel_gpio_get_acpi(const struct gpio_desc *desc,
+ struct acpi_gpio *gpio)
+{
+ struct udevice *pinctrl;
+ int ret;
+
+ if (!dm_gpio_is_valid(desc))
+ return -ENOENT;
+ pinctrl = dev_get_parent(desc->dev);
+
+ memset(gpio, '\0', sizeof(*gpio));
+
+ gpio->type = ACPI_GPIO_TYPE_IO;
+ gpio->pull = ACPI_GPIO_PULL_DEFAULT;
+ gpio->io_restrict = ACPI_GPIO_IO_RESTRICT_OUTPUT;
+ gpio->polarity = ACPI_GPIO_ACTIVE_HIGH;
+ gpio->pin_count = 1;
+ gpio->pins[0] = intel_pinctrl_get_acpi_pin(pinctrl, desc->offset);
+ gpio->pin0_addr = intel_pinctrl_get_config_reg_addr(pinctrl,
+ desc->offset);
+ ret = acpi_get_path(pinctrl, gpio->resource, sizeof(gpio->resource));
+ if (ret)
+ return log_msg_ret("resource", ret);
+
+ return 0;
+}
+#endif
+
static int intel_gpio_probe(struct udevice *dev)
{
return 0;
@@ -152,6 +183,9 @@ static const struct dm_gpio_ops gpio_intel_ops = {
.set_value = intel_gpio_set_value,
.get_function = intel_gpio_get_function,
.xlate = intel_gpio_xlate,
+#if CONFIG_IS_ENABLED(ACPIGEN)
+ .get_acpi = intel_gpio_get_acpi,
+#endif
};
static const struct udevice_id intel_intel_gpio_ids[] = {
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 24/44] x86: apl: Use memory-mapped access for VBT
Use the new binman memory-mapping function to access the VBT, to simplify
the code.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
arch/x86/cpu/apollolake/fsp_s.c | 19 +--
arch/x86/lib/fsp2/fsp_silicon_init.c | 1 +
2 files changed, 6 insertions(+), 14 deletions(-)
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index 13e6b20f08..0f5520fc7d 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -36,29 +36,20 @@ int fsps_update_config(struct udevice *dev, ulong
rom_offset,
ofnode node;
if (IS_ENABLED(CONFIG_HAVE_VBT)) {
- struct binman_entry vbt;
- void *vbt_buf;
+ void *buf;
int ret;
- ret = binman_entry_find("intel-vbt", );
+ ret = binman_entry_map(ofnode_null(), "intel-vbt", , NULL);
if (ret)
return log_msg_ret("Cannot find VBT", ret);
- vbt.image_pos += rom_offset;
- vbt_buf = malloc(vbt.size);
- if (!vbt_buf)
- return log_msg_ret("Alloc VBT", -ENOMEM);
+ if (*(u32 *)buf != VBT_SIGNATURE)
+ return log_msg_ret("VBT signature", -EINVAL);
/*
* Load VBT before devicetree-specific config. This only
* supports memory-mapped SPI at present.
*/
- bootstage_start(BOOTSTAGE_ID_ACCUM_MMAP_SPI, "mmap_spi");
- memcpy(vbt_buf, (void *)vbt.image_pos, vbt.size);
- bootstage_accum(BOOTSTAGE_ID_ACCUM_MMAP_SPI);
- if (*(u32 *)vbt_buf != VBT_SIGNATURE)
- return log_msg_ret("VBT signature", -EINVAL);
-
- cfg->graphics_config_ptr = (ulong)vbt_buf;
+ cfg->graphics_config_ptr = (ulong)buf;
}
node = dev_read_subnode(dev, "fsp-s");
diff --git a/arch/x86/lib/fsp2/fsp_silicon_init.c
b/arch/x86/lib/fsp2/fsp_silicon_init.c
index 45c0c7d90b..0f221a864f 100644
--- a/arch/x86/lib/fsp2/fsp_silicon_init.c
+++ b/arch/x86/lib/fsp2/fsp_silicon_init.c
@@ -32,6 +32,7 @@ int fsp_silicon_init(bool s3wake, bool use_spi_flash)
_offset);
if (ret)
return log_msg_ret("locate FSP", ret);
+ binman_set_rom_offset(rom_offset);
gd->arch.fsp_s_hdr = hdr;
/* Copy over the default config */
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 21/44] x86: pinctrl: Set up itss in the probe() method
At present the itss is probed in the ofdata_to_platdata() method. This is
incorrect since itss is a child of p2sb which itself needs to probe the
pinctrl device. This means that p2sb is effectively not probed when the
itss is probed, so we get the wrong register address from p2sb.
Fix this by moving the itss probe to the correct place.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
drivers/pinctrl/intel/pinctrl.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl.c b/drivers/pinctrl/intel/pinctrl.c
index 32ca303b27..ba21c9dcc2 100644
--- a/drivers/pinctrl/intel/pinctrl.c
+++ b/drivers/pinctrl/intel/pinctrl.c
@@ -619,15 +619,11 @@ int intel_pinctrl_ofdata_to_platdata(struct udevice *dev,
{
struct p2sb_child_platdata *pplat = dev_get_parent_platdata(dev);
struct intel_pinctrl_priv *priv = dev_get_priv(dev);
- int ret;
if (!comm) {
log_err("Cannot find community for pid %d\n", pplat->pid);
return -EDOM;
}
- ret = irq_first_device_type(X86_IRQT_ITSS, >itss);
- if (ret)
- return log_msg_ret("Cannot find ITSS", ret);
priv->comm = comm;
priv->num_cfgs = num_cfgs;
@@ -637,8 +633,12 @@ int intel_pinctrl_ofdata_to_platdata(struct udevice *dev,
int intel_pinctrl_probe(struct udevice *dev)
{
struct intel_pinctrl_priv *priv = dev_get_priv(dev);
+ int ret;
priv->itss_pol_cfg = true;
+ ret = irq_first_device_type(X86_IRQT_ITSS, >itss);
+ if (ret)
+ return log_msg_ret("Cannot find ITSS", ret);
return 0;
}
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 23/44] x86: Add error checking for csrt table generation
Generation of this table can fail, so update the function to return an
error code.
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Add new patch to add error checking for csrt table generation
arch/x86/lib/acpi_table.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 8219376e17..d2bc3386eb 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -212,13 +212,14 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
__weak u32 acpi_fill_csrt(u32 current)
{
- return current;
+ return 0;
}
-static void acpi_create_csrt(struct acpi_csrt *csrt)
+static int acpi_create_csrt(struct acpi_csrt *csrt)
{
struct acpi_table_header *header = &(csrt->header);
u32 current = (u32)csrt + sizeof(struct acpi_csrt);
+ uint ptr;
memset((void *)csrt, 0, sizeof(struct acpi_csrt));
@@ -227,11 +228,16 @@ static void acpi_create_csrt(struct acpi_csrt *csrt)
header->length = sizeof(struct acpi_csrt);
header->revision = 0;
- current = acpi_fill_csrt(current);
+ ptr = acpi_fill_csrt(current);
+ if (!ptr)
+ return -ENOENT;
+ current = ptr;
/* (Re)calculate length and checksum */
header->length = current - (u32)csrt;
header->checksum = table_compute_checksum((void *)csrt, header->length);
+
+ return 0;
}
static void acpi_create_spcr(struct acpi_spcr *spcr)
@@ -482,9 +488,10 @@ ulong write_acpi_tables(ulong start_addr)
debug("ACPI:* CSRT\n");
csrt = ctx->current;
- acpi_create_csrt(csrt);
- acpi_inc_align(ctx, csrt->header.length);
- acpi_add_table(ctx, csrt);
+ if (!acpi_create_csrt(csrt)) {
+ acpi_inc_align(ctx, csrt->header.length);
+ acpi_add_table(ctx, csrt);
+ }
debug("ACPI:* SPCR\n");
spcr = ctx->current;
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 22/44] x86: pinctrl: Drop the acpi_path member
This is in the device tree now, so drop the unnecessary field here.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Fix the commit subject to mention dropping acpi_path, not acpi_name
arch/x86/include/asm/intel_pinctrl.h | 2 --
drivers/pinctrl/intel/pinctrl_apl.c | 4
2 files changed, 6 deletions(-)
diff --git a/arch/x86/include/asm/intel_pinctrl.h
b/arch/x86/include/asm/intel_pinctrl.h
index a6a9edd0d4..00868d1725 100644
--- a/arch/x86/include/asm/intel_pinctrl.h
+++ b/arch/x86/include/asm/intel_pinctrl.h
@@ -99,7 +99,6 @@ struct pad_group {
* groups exist inside a community
*
* @name: Community name
- * @acpi_path: ACPI path
* @num_gpi_regs: number of gpi registers in community
* @max_pads_per_group: number of pads in each group; number of pads bit-mapped
* in each GPI status/en and Host Own Reg
@@ -120,7 +119,6 @@ struct pad_group {
*/
struct pad_community {
const char *name;
- const char *acpi_path;
size_t num_gpi_regs;
size_t max_pads_per_group;
uint first_pad;
diff --git a/drivers/pinctrl/intel/pinctrl_apl.c
b/drivers/pinctrl/intel/pinctrl_apl.c
index c14176d4a7..7624a9974f 100644
--- a/drivers/pinctrl/intel/pinctrl_apl.c
+++ b/drivers/pinctrl/intel/pinctrl_apl.c
@@ -75,7 +75,6 @@ static const struct pad_community apl_gpio_communities[] = {
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_GPE_N",
- .acpi_path = "\\_SB.GPO0",
.reset_map = rst_map,
.num_reset_vals = ARRAY_SIZE(rst_map),
.groups = apl_community_n_groups,
@@ -94,7 +93,6 @@ static const struct pad_community apl_gpio_communities[] = {
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_GPE_NW",
- .acpi_path = "\\_SB.GPO1",
.reset_map = rst_map,
.num_reset_vals = ARRAY_SIZE(rst_map),
.groups = apl_community_nw_groups,
@@ -113,7 +111,6 @@ static const struct pad_community apl_gpio_communities[] = {
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_GPE_W",
- .acpi_path = "\\_SB.GPO2",
.reset_map = rst_map,
.num_reset_vals = ARRAY_SIZE(rst_map),
.groups = apl_community_w_groups,
@@ -132,7 +129,6 @@ static const struct pad_community apl_gpio_communities[] = {
.gpi_smi_en_reg_0 = GPI_SMI_EN_0,
.max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
.name = "GPIO_GPE_SW",
- .acpi_path = "\\_SB.GPO3",
.reset_map = rst_map,
.num_reset_vals = ARRAY_SIZE(rst_map),
.groups = apl_community_sw_groups,
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 17/44] sound: Add an ACPI driver for Maxim MAX98357ac
This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).
Signed-off-by: Simon Glass
---
Changes in v2:
Add a comment about only x86 boards supporting NHLT
Changes in v1:
- Use acpi,ddn instead of acpi,desc
- Drop the unwanted acpi_device_write_gpio_desc()
- Rename max97357a to max98357a
- Add NHLT support
- Capitalise ACPI_OPS_PTR
- Rebase to master
configs/sandbox_defconfig| 1 +
doc/device-tree-bindings/sound/max98357a.txt | 22 +++
drivers/sound/Kconfig| 9 ++
drivers/sound/Makefile | 1 +
drivers/sound/max98357a.c| 161 +++
5 files changed, 194 insertions(+)
create mode 100644 doc/device-tree-bindings/sound/max98357a.txt
create mode 100644 drivers/sound/max98357a.c
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 3817091d02..0c9524ff6c 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -207,6 +207,7 @@ CONFIG_SMEM=y
CONFIG_SANDBOX_SMEM=y
CONFIG_SOUND=y
CONFIG_SOUND_DA7219=y
+CONFIG_SOUND_MAX98357A=y
CONFIG_SOUND_SANDBOX=y
CONFIG_SANDBOX_SPI=y
CONFIG_SPMI=y
diff --git a/doc/device-tree-bindings/sound/max98357a.txt
b/doc/device-tree-bindings/sound/max98357a.txt
new file mode 100644
index 00..4bce14ce80
--- /dev/null
+++ b/doc/device-tree-bindings/sound/max98357a.txt
@@ -0,0 +1,22 @@
+Maxim MAX98357A audio DAC
+
+This node models the Maxim MAX98357A DAC.
+
+Required properties:
+- compatible : "maxim,max98357a"
+
+Optional properties:
+- sdmode-gpios : GPIO specifier for the chip's SD_MODE pin.
+If this option is not specified then driver does not manage
+the pin state (e.g. chip is always on).
+- sdmode-delay : specify delay time for SD_MODE pin.
+If this option is specified, which means it's required i2s clocks
+ready before SD_MODE is unmuted in order to avoid the speaker pop
noise.
+It's observed that 5ms is sufficient.
+
+Example:
+
+max98357a {
+ compatible = "maxim,max98357a";
+ sdmode-gpios = <_pinmux 25 0>;
+};
diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig
index 7f214b97be..0948d8caab 100644
--- a/drivers/sound/Kconfig
+++ b/drivers/sound/Kconfig
@@ -113,6 +113,15 @@ config SOUND_MAX98095
audio data and I2C for codec control. At present it only works
with the Samsung I2S driver.
+config SOUND_MAX98357A
+ bool "Support Maxim max98357a audio codec"
+ depends on PCI
+ help
+ Enable the max98357a audio codec. This is connected on PCI for
+ audio data codec control. This is currently only capable of providing
+ ACPI information. A full driver (with sound in U-Boot) is currently
+ not available.
+
config SOUND_RT5677
bool "Support Realtek RT5677 audio codec"
depends on SOUND
diff --git a/drivers/sound/Makefile b/drivers/sound/Makefile
index 8c3933ad15..9b40c8012f 100644
--- a/drivers/sound/Makefile
+++ b/drivers/sound/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_SOUND_WM8994)+= wm8994.o
obj-$(CONFIG_SOUND_MAX98088) += max98088.o maxim_codec.o
obj-$(CONFIG_SOUND_MAX98090) += max98090.o maxim_codec.o
obj-$(CONFIG_SOUND_MAX98095) += max98095.o maxim_codec.o
+obj-$(CONFIG_SOUND_MAX98357A) += max98357a.o
obj-$(CONFIG_SOUND_INTEL_HDA) += hda_codec.o
obj-$(CONFIG_SOUND_I8254) += i8254_beep.o
obj-$(CONFIG_SOUND_RT5677) += rt5677.o
diff --git a/drivers/sound/max98357a.c b/drivers/sound/max98357a.c
new file mode 100644
index 00..827262d235
--- /dev/null
+++ b/drivers/sound/max98357a.c
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * max98357a.c -- MAX98357A Audio driver
+ *
+ * Copyright 2019 Google LLC
+ * Parts taken from coreboot
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#ifdef CONFIG_X86
+#include
+#endif
+#include
+#include
+
+struct max98357a_priv {
+ struct gpio_desc sdmode_gpio;
+};
+
+static int max98357a_ofdata_to_platdata(struct udevice *dev)
+{
+ struct max98357a_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = gpio_request_by_name(dev, "sdmode-gpios", 0, >sdmode_gpio,
+ GPIOD_IS_IN);
+ if (ret)
+ return log_msg_ret("gpio", ret);
+
+ return 0;
+}
+
+static int max98357a_acpi_fill_ssdt(const struct udevice *dev,
+ struct acpi_ctx *ctx)
+{
+ struct max98357a_priv *priv = dev_get_priv(dev);
+ char scope[ACPI_PATH_MAX];
+ char name[ACPI_NAME_MAX];
+ char path[ACPI_PATH_MAX];
+ struct acpi_dp *dp;
+ int ret;
+
+ ret = acpi_device_scope(dev, scope, sizeof(scope));
+ if (ret)
+ return log_msg_ret("scope", ret);
+ ret = acpi_get_name(dev, name);
+ if
[PATCH v2 18/44] x86: pinctrl: Add a way to get the pinctrl reg address
At present we can query the offset of a pinctrl register within the p2sb.
For ACPI we need to get the actual address of the register. Add a function
to handle this and rename the old one to more accurately reflect its
purpose.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Fix comment for intel_pinctrl_get_config_reg_addr()
arch/x86/include/asm/intel_pinctrl.h | 16 ++--
drivers/gpio/intel_gpio.c| 15 +++
drivers/misc/p2sb-uclass.c | 16
drivers/pinctrl/intel/pinctrl.c | 11 +--
include/p2sb.h | 9 +
5 files changed, 51 insertions(+), 16 deletions(-)
diff --git a/arch/x86/include/asm/intel_pinctrl.h
b/arch/x86/include/asm/intel_pinctrl.h
index e2524b089d..b5564b9ee1 100644
--- a/arch/x86/include/asm/intel_pinctrl.h
+++ b/arch/x86/include/asm/intel_pinctrl.h
@@ -263,11 +263,23 @@ int pinctrl_read_pads(struct udevice *dev, ofnode node,
const char *prop,
int pinctrl_count_pads(struct udevice *dev, u32 *pads, int size);
/**
- * intel_pinctrl_get_config_reg_addr() - Get address of the pin config
registers
+ * intel_pinctrl_get_config_reg_offset() - Get offset of pin config registers
*
+ * This works out the register offset of a pin within the p2sb region.
+ *
+ * @dev: Pinctrl device
+ * @offset: GPIO offset within this device
+ * @return register offset of first register within the GPIO p2sb region
+ */
+u32 intel_pinctrl_get_config_reg_offset(struct udevice *dev, uint offset);
+
+/**
+ * intel_pinctrl_get_config_reg_addr() - Get address of pin config registers
+ *
+ * This works out the absolute address of the registers for a pin
* @dev: Pinctrl device
* @offset: GPIO offset within this device
- * @return register offset within the GPIO p2sb region
+ * @return register address of first register within the GPIO p2sb region
*/
u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset);
diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c
index 711fea1b58..b4d5be97da 100644
--- a/drivers/gpio/intel_gpio.c
+++ b/drivers/gpio/intel_gpio.c
@@ -24,7 +24,9 @@
static int intel_gpio_direction_input(struct udevice *dev, uint offset)
{
struct udevice *pinctrl = dev_get_parent(dev);
- uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset);
+ uint config_offset;
+
+ config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
pcr_clrsetbits32(pinctrl, config_offset,
PAD_CFG0_MODE_MASK | PAD_CFG0_TX_STATE |
@@ -38,7 +40,9 @@ static int intel_gpio_direction_output(struct udevice *dev,
uint offset,
int value)
{
struct udevice *pinctrl = dev_get_parent(dev);
- uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset);
+ uint config_offset;
+
+ config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
pcr_clrsetbits32(pinctrl, config_offset,
PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE |
@@ -68,10 +72,13 @@ static int intel_gpio_get_value(struct udevice *dev, uint
offset)
return 0;
}
-static int intel_gpio_set_value(struct udevice *dev, unsigned offset, int
value)
+static int intel_gpio_set_value(struct udevice *dev, unsigned int offset,
+ int value)
{
struct udevice *pinctrl = dev_get_parent(dev);
- uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset);
+ uint config_offset;
+
+ config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
pcr_clrsetbits32(pinctrl, config_offset, PAD_CFG0_TX_STATE,
value ? PAD_CFG0_TX_STATE : 0);
diff --git a/drivers/misc/p2sb-uclass.c b/drivers/misc/p2sb-uclass.c
index 06b1e8d9ad..d5fe12ebd8 100644
--- a/drivers/misc/p2sb-uclass.c
+++ b/drivers/misc/p2sb-uclass.c
@@ -18,7 +18,7 @@
#define PCR_COMMON_IOSF_1_01
-static void *_pcr_reg_address(struct udevice *dev, uint offset)
+void *pcr_reg_address(struct udevice *dev, uint offset)
{
struct p2sb_child_platdata *pplat = dev_get_parent_platdata(dev);
struct udevice *p2sb = dev_get_parent(dev);
@@ -55,7 +55,7 @@ uint pcr_read32(struct udevice *dev, uint offset)
/* Ensure the PCR offset is correctly aligned */
assert(IS_ALIGNED(offset, sizeof(uint32_t)));
- ptr = _pcr_reg_address(dev, offset);
+ ptr = pcr_reg_address(dev, offset);
val = readl(ptr);
unmap_sysmem(ptr);
@@ -67,7 +67,7 @@ uint pcr_read16(struct udevice *dev, uint offset)
/* Ensure the PCR offset is correctly aligned */
check_pcr_offset_align(offset, sizeof(uint16_t));
- return readw(_pcr_reg_address(dev, offset));
+ return readw(pcr_reg_address(dev, offset));
}
uint pcr_read8(struct udevice *dev, uint offset)
@@ -75,7 +75,7 @@ uint
[PATCH v2 19/44] x86: pinctrl: Update comment for intel_pinctrl_get_pad()
Add information about what is returned on error. Signed-off-by: Simon Glass --- (no changes since v1) arch/x86/include/asm/intel_pinctrl.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/intel_pinctrl.h b/arch/x86/include/asm/intel_pinctrl.h index b5564b9ee1..a6a9edd0d4 100644 --- a/arch/x86/include/asm/intel_pinctrl.h +++ b/arch/x86/include/asm/intel_pinctrl.h @@ -300,6 +300,7 @@ u32 intel_pinctrl_get_config_reg(struct udevice *dev, uint offset); * @pad: Pad to check * @devp: Returns pinctrl device containing that pad * @offsetp: Returns offset of pad within that pinctrl device + * @return 0 if OK, -ENOTBLK if pad number is invalid */ int intel_pinctrl_get_pad(uint pad, struct udevice **devp, uint *offsetp); -- 2.27.0.383.g050319c2ae-goog
[PATCH v2 16/44] sound: Add an ACPI driver for Dialog Semicondutor da7219
This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).
Signed-off-by: Simon Glass
---
Changes in v2:
Add a comment about only x86 boards supporting NHLT
Changes in v1:
- Use acpi,ddn instead of acpi,desc
- Add a check for invalid node
- Add NHLT support
- Capitalise ACPI_OPS_PTR
- Rebase to master
configs/sandbox_defconfig | 1 +
doc/device-tree-bindings/sound/da7219.txt | 113 +
drivers/sound/Kconfig | 9 +
drivers/sound/Makefile| 1 +
drivers/sound/da7219.c| 190 ++
5 files changed, 314 insertions(+)
create mode 100644 doc/device-tree-bindings/sound/da7219.txt
create mode 100644 drivers/sound/da7219.c
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 43e03221ad..3817091d02 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -206,6 +206,7 @@ CONFIG_SANDBOX_SERIAL=y
CONFIG_SMEM=y
CONFIG_SANDBOX_SMEM=y
CONFIG_SOUND=y
+CONFIG_SOUND_DA7219=y
CONFIG_SOUND_SANDBOX=y
CONFIG_SANDBOX_SPI=y
CONFIG_SPMI=y
diff --git a/doc/device-tree-bindings/sound/da7219.txt
b/doc/device-tree-bindings/sound/da7219.txt
new file mode 100644
index 00..5fd8a9f1e7
--- /dev/null
+++ b/doc/device-tree-bindings/sound/da7219.txt
@@ -0,0 +1,113 @@
+Dialog Semiconductor DA7219 Audio Codec bindings
+
+DA7219 is an audio codec with advanced accessory detect features.
+
+==
+
+Required properties:
+- compatible : Should be "dlg,da7219"
+- reg: Specifies the I2C slave address
+
+- interrupts : IRQ line info for DA7219.
+ (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
for
+ further information relating to interrupt properties)
+
+- VDD-supply: VDD power supply for the device
+- VDDMIC-supply: VDDMIC power supply for the device
+- VDDIO-supply: VDDIO power supply for the device
+ (See Documentation/devicetree/bindings/regulator/regulator.txt for further
+ information relating to regulators)
+
+Optional properties:
+- interrupt-names : Name associated with interrupt line. Should be "wakeup" if
+ interrupt is to be used to wake system, otherwise "irq" should be used.
+- wakeup-source: Flag to indicate this device can wake system (suspend/resume).
+
+- #clock-cells : Should be set to '<0>', only one clock source provided;
+- clock-output-names : Name given for DAI clocks output;
+
+- clocks : phandle and clock specifier for codec MCLK.
+- clock-names : Clock name string for 'clocks' attribute, should be "mclk".
+
+- dlg,micbias-lvl : Voltage (mV) for Mic Bias
+ [<1600>, <1800>, <2000>, <2200>, <2400>, <2600>]
+- dlg,mic-amp-in-sel : Mic input source type
+ ["diff", "se_p", "se_n"]
+- dlg,mclk-name : String name of MCLK for ACPI
+
+Deprecated properties:
+- dlg,ldo-lvl : Required internal LDO voltage (mV) level for digital engine
+ (LDO unavailable in production HW so property no longer required).
+
+==
+
+Child node - 'da7219_aad':
+
+Optional properties:
+- dlg,micbias-pulse-lvl : Mic bias higher voltage pulse level (mV).
+ [<2800>, <2900>]
+- dlg,micbias-pulse-time : Mic bias higher voltage pulse duration (ms)
+- dlg,btn-cfg : Periodic button press measurements for 4-pole jack (ms)
+ [<2>, <5>, <10>, <50>, <100>, <200>, <500>]
+- dlg,mic-det-thr : Impedance threshold for mic detection measurement (Ohms)
+ [<200>, <500>, <750>, <1000>]
+- dlg,jack-ins-deb : Debounce time for jack insertion (ms)
+ [<5>, <10>, <20>, <50>, <100>, <200>, <500>, <1000>]
+- dlg,jack-det-rate: Jack type detection latency (3/4 pole)
+ ["32ms_64ms", "64ms_128ms", "128ms_256ms", "256ms_512ms"]
+- dlg,jack-rem-deb : Debounce time for jack removal (ms)
+ [<1>, <5>, <10>, <20>]
+- dlg,a-d-btn-thr : Impedance threshold between buttons A and D
+ [0x0 - 0xFF]
+- dlg,d-b-btn-thr : Impedance threshold between buttons D and B
+ [0x0 - 0xFF]
+- dlg,b-c-btn-thr : Impedance threshold between buttons B and C
+ [0x0 - 0xFF]
+- dlg,c-mic-btn-thr : Impedance threshold between button C and Mic
+ [0x0 - 0xFF]
+- dlg,btn-avg : Number of 8-bit readings for averaged button measurement
+ [<1>, <2>, <4>, <8>]
+- dlg,adc-1bit-rpt : Repeat count for 1-bit button measurement
+ [<1>, <2>, <4>, <8>]
+
+==
+
+Example:
+
+ codec: da7219@1a {
+ compatible = "dlg,da7219";
+ reg = <0x1a>;
+
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ VDD-supply = <_audio>;
+ VDDMIC-supply = <_audio>;
+ VDDIO-supply = <_audio>;
+
+ #clock-cells = <0>;
+ clock-output-names = "dai-clks";
+
+ clocks = < 201>;
+ clock-names = "mclk";
+
+ dlg,ldo-lvl = <1200>;
+ dlg,micbias-lvl =
[PATCH v2 20/44] x86: pinctrl: Add multi-ACPI control
Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Wolfgang Wallner --- Changes in v2: - Add help for CONFIG_INTEL_PINCTRL_MULTI_ACPI_DEVICES drivers/pinctrl/intel/Kconfig | 12 drivers/pinctrl/intel/pinctrl.c | 2 ++ 2 files changed, 14 insertions(+) diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig index e62a2e0349..1acc5dabb0 100644 --- a/drivers/pinctrl/intel/Kconfig +++ b/drivers/pinctrl/intel/Kconfig @@ -15,6 +15,18 @@ config INTEL_PINCTRL_IOSTANDBY bool default y +config INTEL_PINCTRL_MULTI_ACPI_DEVICES + bool + default y + help + Enable this if the pinctrl devices are modelled as multiple, + separate ACPI devices in the ACPI tables. If enabled, the ACPI + devices match the U-Boot pinctrl devices and the pin 'offset' is + relatove to a particular pinctrl device. If disabled, there is a + single ACPI pinctrl device which includes all U-Boot pinctrl devices + and the pin 'offset' is in effect a global pin number. + + config PINCTRL_INTEL_APL bool "Support Intel Apollo Lake (APL)" help diff --git a/drivers/pinctrl/intel/pinctrl.c b/drivers/pinctrl/intel/pinctrl.c index bf3989bf32..32ca303b27 100644 --- a/drivers/pinctrl/intel/pinctrl.c +++ b/drivers/pinctrl/intel/pinctrl.c @@ -427,6 +427,8 @@ int intel_pinctrl_get_acpi_pin(struct udevice *dev, uint offset) const struct pad_community *comm = priv->comm; int group; + if (IS_ENABLED(CONFIG_INTEL_PINCTRL_MULTI_ACPI_DEVICES)) + return offset; group = pinctrl_group_index(comm, offset); /* If pad base is not set then use GPIO number as ACPI pin number */ -- 2.27.0.383.g050319c2ae-goog
[PATCH v2 11/44] acpi: mmc: Generate ACPI info for the PCI SD Card
Write required information into the SSDT to describe the SD card
card-detect pin. Since the required GPIO properties are not present in
the device-tree binding, set them manually for now.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
Changes in v1:
- Capitalise ACPI_OPS_PTR
configs/sandbox_defconfig | 2 +
drivers/mmc/pci_mmc.c | 78 ++-
2 files changed, 79 insertions(+), 1 deletion(-)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 20c2694f4e..43e03221ad 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -145,7 +145,9 @@ CONFIG_P2SB=y
CONFIG_PWRSEQ=y
CONFIG_SPL_PWRSEQ=y
CONFIG_I2C_EEPROM=y
+CONFIG_MMC_PCI=y
CONFIG_MMC_SANDBOX=y
+CONFIG_MMC_SDHCI=y
CONFIG_MTD=y
CONFIG_SPI_FLASH_SANDBOX=y
CONFIG_SPI_FLASH_ATMEL=y
diff --git a/drivers/mmc/pci_mmc.c b/drivers/mmc/pci_mmc.c
index 404264a697..0c45e1b893 100644
--- a/drivers/mmc/pci_mmc.c
+++ b/drivers/mmc/pci_mmc.c
@@ -7,10 +7,15 @@
#include
#include
#include
+#include
#include
#include
#include
-#include
+#include
+#include
+#include
+#include
+#include
struct pci_mmc_plat {
struct mmc_config cfg;
@@ -20,6 +25,7 @@ struct pci_mmc_plat {
struct pci_mmc_priv {
struct sdhci_host host;
void *base;
+ struct gpio_desc cd_gpio;
};
static int pci_mmc_probe(struct udevice *dev)
@@ -44,6 +50,15 @@ static int pci_mmc_probe(struct udevice *dev)
return sdhci_probe(dev);
}
+static int pci_mmc_ofdata_to_platdata(struct udevice *dev)
+{
+ struct pci_mmc_priv *priv = dev_get_priv(dev);
+
+ gpio_request_by_name(dev, "cd-gpios", 0, >cd_gpio, GPIOD_IS_IN);
+
+ return 0;
+}
+
static int pci_mmc_bind(struct udevice *dev)
{
struct pci_mmc_plat *plat = dev_get_platdata(dev);
@@ -51,14 +66,75 @@ static int pci_mmc_bind(struct udevice *dev)
return sdhci_bind(dev, >mmc, >cfg);
}
+static int pci_mmc_acpi_fill_ssdt(const struct udevice *dev,
+ struct acpi_ctx *ctx)
+{
+ struct pci_mmc_priv *priv = dev_get_priv(dev);
+ char path[ACPI_PATH_MAX];
+ struct acpi_gpio gpio;
+ struct acpi_dp *dp;
+ int ret;
+
+ if (!dev_of_valid(dev))
+ return 0;
+
+ ret = gpio_get_acpi(>cd_gpio, );
+ if (ret)
+ return log_msg_ret("gpio", ret);
+ gpio.type = ACPI_GPIO_TYPE_INTERRUPT;
+ gpio.pull = ACPI_GPIO_PULL_NONE;
+ gpio.irq.mode = ACPI_IRQ_EDGE_TRIGGERED;
+ gpio.irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
+ gpio.irq.shared = ACPI_IRQ_SHARED;
+ gpio.irq.wake = ACPI_IRQ_WAKE;
+ gpio.interrupt_debounce_timeout = 1; /* 100ms */
+
+ /* Use device path as the Scope for the SSDT */
+ ret = acpi_device_path(dev, path, sizeof(path));
+ if (ret)
+ return log_msg_ret("path", ret);
+ acpigen_write_scope(ctx, path);
+ acpigen_write_name(ctx, "_CRS");
+
+ /* Write GpioInt() as default (if set) or custom from devicetree */
+ acpigen_write_resourcetemplate_header(ctx);
+ acpi_device_write_gpio(ctx, );
+ acpigen_write_resourcetemplate_footer(ctx);
+
+ /* Bind the cd-gpio name to the GpioInt() resource */
+ dp = acpi_dp_new_table("_DSD");
+ if (!dp)
+ return -ENOMEM;
+ acpi_dp_add_gpio(dp, "cd-gpio", path, 0, 0, 1);
+ ret = acpi_dp_write(ctx, dp);
+ if (ret)
+ return log_msg_ret("cd", ret);
+
+ acpigen_pop_len(ctx);
+
+ return 0;
+}
+
+struct acpi_ops pci_mmc_acpi_ops = {
+ .fill_ssdt = pci_mmc_acpi_fill_ssdt,
+};
+
+static const struct udevice_id pci_mmc_match[] = {
+ { .compatible = "intel,apl-sd" },
+ { }
+};
+
U_BOOT_DRIVER(pci_mmc) = {
.name = "pci_mmc",
.id = UCLASS_MMC,
+ .of_match = pci_mmc_match,
.bind = pci_mmc_bind,
+ .ofdata_to_platdata = pci_mmc_ofdata_to_platdata,
.probe = pci_mmc_probe,
.ops= _ops,
.priv_auto_alloc_size = sizeof(struct pci_mmc_priv),
.platdata_auto_alloc_size = sizeof(struct pci_mmc_plat),
+ ACPI_OPS_PTR(_mmc_acpi_ops)
};
static struct pci_device_id mmc_supported[] = {
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 15/44] x86: Add support for building up an NHLT structure
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.
Add functions to allow adding to the structure that is eventually written
to the ACPI tables. Also add the device-tree bindings.
Signed-off-by: Simon Glass
---
Changes in v2:
- Move this patch before the audio-codec drivers
- Use BIT() for the SPEAKER enum
Changes in v1:
- Add a new patch to support building up an NHLT structure
arch/x86/include/asm/acpi_nhlt.h | 314
arch/x86/lib/Makefile| 1 +
arch/x86/lib/acpi_nhlt.c | 482 +++
3 files changed, 797 insertions(+)
create mode 100644 arch/x86/include/asm/acpi_nhlt.h
create mode 100644 arch/x86/lib/acpi_nhlt.c
diff --git a/arch/x86/include/asm/acpi_nhlt.h b/arch/x86/include/asm/acpi_nhlt.h
new file mode 100644
index 00..4720321381
--- /dev/null
+++ b/arch/x86/include/asm/acpi_nhlt.h
@@ -0,0 +1,314 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Google LLC
+ *
+ * Modified from coreboot nhlt.h
+ */
+
+#ifndef _NHLT_H_
+#define _NHLT_H_
+
+struct acpi_ctx;
+struct nhlt;
+struct nhlt_endpoint;
+struct nhlt_format;
+struct nhlt_format_config;
+
+/*
+ * Non HD Audio ACPI support. This table is typically used for Intel Smart
+ * Sound Technology DSP. It provides a way to encode opaque settings in
+ * the ACPI tables.
+ *
+ * While the structure fields of the NHLT structs are exposed below
+ * the SoC/chipset code should be the only other user manipulating the
+ * fields directly aside from the library itself.
+ *
+ * The NHLT table consists of endpoints which in turn contain different
+ * supporting stream formats. Each endpoint may contain a device specific
+ * configuration payload as well as each stream format.
+ *
+ * Most code should use the SoC variants of the functions because
+ * there is required logic needed to be performed by the SoC. The SoC
+ * code should be abstracting the inner details of these functions that
+ * specically apply to NHLT objects for that SoC.
+ *
+ * An example sequence:
+ *
+ * nhlt = nhlt_init()
+ * ep = nhlt_add_endpoint()
+ * nhlt_endpoint_append_config(ep)
+ * nhlt_endpoint_add_formats(ep)
+ * nhlt_soc_serialise()
+ */
+
+/* Obtain an nhlt object for adding endpoints. Returns NULL on error. */
+struct nhlt *nhlt_init(void);
+
+/* Return the size of the NHLT table including ACPI header. */
+size_t nhlt_current_size(struct nhlt *nhlt);
+
+/*
+ * Helper functions for adding NHLT devices utilizing an nhlt_endp_descriptor
+ * to drive the logic.
+ */
+
+struct nhlt_endp_descriptor {
+ /* NHLT endpoint types. */
+ int link;
+ int device;
+ int direction;
+ u16 vid;
+ u16 did;
+ /* Optional endpoint specific configuration data. */
+ const void *cfg;
+ size_t cfg_size;
+ /* Formats supported for endpoint. */
+ const struct nhlt_format_config *formats;
+ size_t num_formats;
+};
+
+/*
+ * Add the number of endpoints described by each descriptor. The virtual bus
+ * id for each descriptor is the default value of 0.
+ * Returns < 0 on error, 0 on success.
+ */
+int nhlt_add_endpoints(struct nhlt *nhlt,
+ const struct nhlt_endp_descriptor *epds,
+ size_t num_epds);
+
+/*
+ * Add the number of endpoints associated with a single NHLT SSP instance id.
+ * Each endpoint described in the endpoint descriptor array uses the provided
+ * virtual bus id. Returns < 0 on error, 0 on success.
+ */
+int nhlt_add_ssp_endpoints(struct nhlt *nhlt, int virtual_bus_id,
+ const struct nhlt_endp_descriptor *epds,
+ size_t num_epds);
+
+/*
+ * Add endpoint to NHLT object. Returns NULL on error.
+ *
+ * generic nhlt_add_endpoint() is called by the SoC code to provide
+ * the specific assumptions/uses for NHLT for that platform. All fields
+ * are the NHLT enumerations found within this header file.
+ */
+struct nhlt_endpoint *nhlt_add_endpoint(struct nhlt *nhlt, int link_type,
+ int device_type, int dir,
+ u16 vid, u16 did);
+
+/*
+ * Append blob of configuration to the endpoint proper. Returns 0 on
+ * success, < 0 on error. A copy of the configuration is made so any
+ * resources pointed to by config can be freed after the call.
+ */
+int nhlt_endpoint_append_config(struct nhlt_endpoint *endpoint,
+ const void *config, size_t config_sz);
+
+/* Add a format type to the provided endpoint. Returns NULL on error. */
+struct nhlt_format *nhlt_add_format(struct nhlt_endpoint *endpoint,
+ int num_channels, int sample_freq_khz,
+ int container_bits_per_sample,
+ int valid_bits_per_sample,
+
[PATCH v2 10/44] acpi: Support generation of a generic register
Allow writing out a generic register.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
include/acpi/acpi_device.h | 1 +
include/acpi/acpigen.h | 28 +++
lib/acpi/acpigen.c | 71 ++
test/dm/acpigen.c | 46
4 files changed, 146 insertions(+)
diff --git a/include/acpi/acpi_device.h b/include/acpi/acpi_device.h
index 0bb9a4eec1..15800b2e24 100644
--- a/include/acpi/acpi_device.h
+++ b/include/acpi/acpi_device.h
@@ -20,6 +20,7 @@ struct udevice;
/* ACPI descriptor values for common descriptors: SERIAL_BUS means I2C */
#define ACPI_DESCRIPTOR_LARGE BIT(7)
+#define ACPI_DESCRIPTOR_REGISTER (ACPI_DESCRIPTOR_LARGE | 2)
#define ACPI_DESCRIPTOR_INTERRUPT (ACPI_DESCRIPTOR_LARGE | 9)
#define ACPI_DESCRIPTOR_GPIO (ACPI_DESCRIPTOR_LARGE | 12)
#define ACPI_DESCRIPTOR_SERIAL_BUS (ACPI_DESCRIPTOR_LARGE | 14)
diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h
index 4a606125de..1f37c9c31c 100644
--- a/include/acpi/acpigen.h
+++ b/include/acpi/acpigen.h
@@ -13,6 +13,7 @@
#include
struct acpi_ctx;
+struct acpi_gen_regaddr;
struct acpi_gpio;
/* Top 4 bits of the value used to indicate a three-byte length value */
@@ -21,6 +22,8 @@ struct acpi_gpio;
#define ACPI_METHOD_NARGS_MASK 0x7
#define ACPI_METHOD_SERIALIZED_MASKBIT(3)
+#define ACPI_END_TAG 0x79
+
/* ACPI Op/Prefix codes */
enum {
ZERO_OP = 0x00,
@@ -318,6 +321,31 @@ void acpigen_write_method_serialized(struct acpi_ctx *ctx,
const char *name,
*/
void acpigen_write_sta(struct acpi_ctx *ctx, uint status);
+/**
+ * acpigen_write_resourcetemplate_header() - Write a ResourceTemplate header
+ *
+ * @ctx: ACPI context pointer
+ */
+void acpigen_write_resourcetemplate_header(struct acpi_ctx *ctx);
+
+/**
+ * acpigen_write_resourcetemplate_footer() - Write a ResourceTemplate footer
+ *
+ * @ctx: ACPI context pointer
+ */
+void acpigen_write_resourcetemplate_footer(struct acpi_ctx *ctx);
+
+/**
+ * acpigen_write_register_resource() - Write a register resource
+ *
+ * This writes a header, the address information and a footer
+ *
+ * @ctx: ACPI context pointer
+ * @addr: Address to write
+ */
+void acpigen_write_register_resource(struct acpi_ctx *ctx,
+const struct acpi_gen_regaddr *addr);
+
/**
* acpigen_write_sleep() - Write a sleep operation
*
diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c
index 1e0a489d7b..45691b7961 100644
--- a/lib/acpi/acpigen.c
+++ b/lib/acpi/acpigen.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
u8 *acpigen_get_current(struct acpi_ctx *ctx)
@@ -299,6 +300,76 @@ void acpigen_write_sta(struct acpi_ctx *ctx, uint status)
acpigen_pop_len(ctx);
}
+static void acpigen_write_register(struct acpi_ctx *ctx,
+ const struct acpi_gen_regaddr *addr)
+{
+ /* See ACPI v6.3 section 6.4.3.7: Generic Register Descriptor */
+ acpigen_emit_byte(ctx, ACPI_DESCRIPTOR_REGISTER);
+ acpigen_emit_byte(ctx, 0x0c); /* Register Length 7:0 */
+ acpigen_emit_byte(ctx, 0x00); /* Register Length 15:8 */
+ acpigen_emit_byte(ctx, addr->space_id);
+ acpigen_emit_byte(ctx, addr->bit_width);
+ acpigen_emit_byte(ctx, addr->bit_offset);
+ acpigen_emit_byte(ctx, addr->access_size);
+ acpigen_emit_dword(ctx, addr->addrl);
+ acpigen_emit_dword(ctx, addr->addrh);
+}
+
+void acpigen_write_resourcetemplate_header(struct acpi_ctx *ctx)
+{
+ /*
+* A ResourceTemplate() is a Buffer() with a
+* (Byte|Word|DWord) containing the length, followed by one or more
+* resource items, terminated by the end tag.
+* (small item 0xf, len 1)
+*/
+ acpigen_emit_byte(ctx, BUFFER_OP);
+ acpigen_write_len_f(ctx);
+ acpigen_emit_byte(ctx, WORD_PREFIX);
+ ctx->len_stack[ctx->ltop++] = ctx->current;
+
+ /*
+* Add two dummy bytes for the ACPI word (keep aligned with the
+* calculation in acpigen_write_resourcetemplate_footer() below)
+*/
+ acpigen_emit_byte(ctx, 0x00);
+ acpigen_emit_byte(ctx, 0x00);
+}
+
+void acpigen_write_resourcetemplate_footer(struct acpi_ctx *ctx)
+{
+ char *p = ctx->len_stack[--ctx->ltop];
+ int len;
+ /*
+* See ACPI v6.3 section 6.4.2.9: End Tag
+* 0x79
+* 0x00 is treated as a good checksum according to the spec
+* and is what iasl generates.
+*/
+ acpigen_emit_byte(ctx, ACPI_END_TAG);
+ acpigen_emit_byte(ctx, 0x00);
+
+ /*
+* Start counting past the 2-bytes length added in
+* acpigen_write_resourcetemplate_header() above
+*/
+ len = (char *)ctx->current - (p + 2);
+
+ /* patch len word */
+ p[0] =
[PATCH v2 13/44] acpi: Support generation of a device
Allow writing an ACPI device to the generated ACPI code.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
include/acpi/acpigen.h | 9 +
lib/acpi/acpigen.c | 7 +++
test/dm/acpigen.c | 27 +++
3 files changed, 43 insertions(+)
diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h
index 1f37c9c31c..59d7c2ff6f 100644
--- a/include/acpi/acpigen.h
+++ b/include/acpi/acpigen.h
@@ -56,6 +56,7 @@ enum {
AND_OP = 0x7b,
OR_OP = 0x7d,
NOT_OP = 0x80,
+ DEVICE_OP = 0x82,
POWER_RES_OP= 0x84,
RETURN_OP = 0xa4,
};
@@ -313,6 +314,14 @@ void acpigen_write_method(struct acpi_ctx *ctx, const char
*name, int nargs);
void acpigen_write_method_serialized(struct acpi_ctx *ctx, const char *name,
int nargs);
+/**
+ * acpigen_write_device() - Write an ACPI device
+ *
+ * @ctx: ACPI context pointer
+ * @name: Device name to write
+ */
+void acpigen_write_device(struct acpi_ctx *ctx, const char *name);
+
/**
* acpigen_write_sta() - Write a _STA method
*
diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c
index 45691b7961..a66601a138 100644
--- a/lib/acpi/acpigen.c
+++ b/lib/acpi/acpigen.c
@@ -291,6 +291,13 @@ void acpigen_write_method_serialized(struct acpi_ctx *ctx,
const char *name,
ACPI_METHOD_SERIALIZED_MASK);
}
+void acpigen_write_device(struct acpi_ctx *ctx, const char *name)
+{
+ acpigen_emit_ext_op(ctx, DEVICE_OP);
+ acpigen_write_len_f(ctx);
+ acpigen_emit_namestring(ctx, name);
+}
+
void acpigen_write_sta(struct acpi_ctx *ctx, uint status)
{
/* Method (_STA, 0, NotSerialized) { Return (status) } */
diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c
index d1bdd18ce5..8fbe30b152 100644
--- a/test/dm/acpigen.c
+++ b/test/dm/acpigen.c
@@ -993,3 +993,30 @@ static int dm_test_acpi_resource_template(struct
unit_test_state *uts)
return 0;
}
DM_TEST(dm_test_acpi_resource_template, 0);
+
+/* Test writing a device */
+static int dm_test_acpi_device(struct unit_test_state *uts)
+{
+ struct acpi_ctx *ctx;
+ u8 *ptr;
+
+ ut_assertok(alloc_context());
+ ptr = acpigen_get_current(ctx);
+
+ acpigen_write_device(ctx, "\\_SB." ACPI_TEST_DEV_NAME);
+ acpigen_pop_len(ctx);
+
+ ut_asserteq(EXT_OP_PREFIX, *ptr++);
+ ut_asserteq(DEVICE_OP, *ptr++);
+ ut_asserteq(0xd, get_length(ptr));
+ ptr += 3;
+ ut_asserteq(ROOT_PREFIX, *ptr++);
+ ut_asserteq(DUAL_NAME_PREFIX, *ptr++);
+ ptr += 8;
+ ut_asserteq_ptr(ptr, ctx->current);
+
+ free_context();
+
+ return 0;
+}
+DM_TEST(dm_test_acpi_device, 0);
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 12/44] x86: Add bindings for NHLT
Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table (NHLT). Signed-off-by: Simon Glass Reviewed-by: Wolfgang Wallner --- Changes in v2: - Add a comment pointing to the PCI spec include/dt-bindings/sound/nhlt.h | 24 1 file changed, 24 insertions(+) create mode 100644 include/dt-bindings/sound/nhlt.h diff --git a/include/dt-bindings/sound/nhlt.h b/include/dt-bindings/sound/nhlt.h new file mode 100644 index 00..dad69c24b4 --- /dev/null +++ b/include/dt-bindings/sound/nhlt.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2019 Google LLC + */ + +#ifndef _DT_BINDINGS_SOUND_NHLT_H +#define _DT_BINDINGS_SOUND_NHLT_H + +/* See Table 2-1. NHLT Endpoint Descriptor in the NHLT Specification (0.8.1) */ +#define NHLT_VID 0x8086 +#define NHLT_DID_DMIC 0xae20 +#define NHLT_DID_BT0xae30 +#define NHLT_DID_SSP 0xae34 + +/* Hardware links available to use for codecs */ +#define AUDIO_LINK_SSP00 +#define AUDIO_LINK_SSP11 +#define AUDIO_LINK_SSP22 +#define AUDIO_LINK_SSP33 +#define AUDIO_LINK_SSP44 +#define AUDIO_LINK_SSP55 +#define AUDIO_LINK_DMIC6 + +#endif /* _DT_BINDINGS_SOUND_NHLT_H */ -- 2.27.0.383.g050319c2ae-goog
[PATCH v2 14/44] acpi: Support writing named values
Allow writing named integers and strings to the generated ACPI code.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
include/acpi/acpigen.h | 72 ++
lib/acpi/acpigen.c | 49 ++
test/dm/acpigen.c | 78 ++
3 files changed, 199 insertions(+)
diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h
index 59d7c2ff6f..228ac9c404 100644
--- a/include/acpi/acpigen.h
+++ b/include/acpi/acpigen.h
@@ -234,6 +234,78 @@ void acpigen_write_one(struct acpi_ctx *ctx);
*/
void acpigen_write_integer(struct acpi_ctx *ctx, u64 data);
+/**
+ * acpigen_write_name_zero() - Write a named zero value
+ *
+ * @ctx: ACPI context pointer
+ * @name: Name of the value
+ */
+void acpigen_write_name_zero(struct acpi_ctx *ctx, const char *name);
+
+/**
+ * acpigen_write_name_one() - Write a named one value
+ *
+ * @ctx: ACPI context pointer
+ * @name: Name of the value
+ */
+void acpigen_write_name_one(struct acpi_ctx *ctx, const char *name);
+
+/**
+ * acpigen_write_name_byte() - Write a named byte value
+ *
+ * @ctx: ACPI context pointer
+ * @name: Name of the value
+ * @val: Value to write
+ */
+void acpigen_write_name_byte(struct acpi_ctx *ctx, const char *name, uint val);
+
+/**
+ * acpigen_write_name_word() - Write a named word value
+ *
+ * @ctx: ACPI context pointer
+ * @name: Name of the value
+ * @val: Value to write
+ */
+void acpigen_write_name_word(struct acpi_ctx *ctx, const char *name, uint val);
+
+/**
+ * acpigen_write_name_dword() - Write a named dword value
+ *
+ * @ctx: ACPI context pointer
+ * @name: Name of the value
+ * @val: Value to write
+ */
+void acpigen_write_name_dword(struct acpi_ctx *ctx, const char *name, uint
val);
+
+/**
+ * acpigen_write_name_qword() - Write a named qword value
+ *
+ * @ctx: ACPI context pointer
+ * @name: Name of the value
+ * @val: Value to write
+ */
+void acpigen_write_name_qword(struct acpi_ctx *ctx, const char *name, u64 val);
+
+/**
+ * acpigen_write_name_integer() - Write a named integer value
+ *
+ * @ctx: ACPI context pointer
+ * @name: Name of the value
+ * @val: Value to write
+ */
+void acpigen_write_name_integer(struct acpi_ctx *ctx, const char *name,
+ u64 val);
+
+/**
+ * acpigen_write_name_string() - Write a named string value
+ *
+ * @ctx: ACPI context pointer
+ * @name: Name of the value
+ * @string: String to write
+ */
+void acpigen_write_name_string(struct acpi_ctx *ctx, const char *name,
+ const char *string);
+
/**
* acpigen_write_string() - Write a string
*
diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c
index a66601a138..c609ef4daa 100644
--- a/lib/acpi/acpigen.c
+++ b/lib/acpi/acpigen.c
@@ -143,6 +143,55 @@ void acpigen_write_integer(struct acpi_ctx *ctx, u64 data)
acpigen_write_qword(ctx, data);
}
+void acpigen_write_name_zero(struct acpi_ctx *ctx, const char *name)
+{
+ acpigen_write_name(ctx, name);
+ acpigen_write_zero(ctx);
+}
+
+void acpigen_write_name_one(struct acpi_ctx *ctx, const char *name)
+{
+ acpigen_write_name(ctx, name);
+ acpigen_write_one(ctx);
+}
+
+void acpigen_write_name_byte(struct acpi_ctx *ctx, const char *name, uint val)
+{
+ acpigen_write_name(ctx, name);
+ acpigen_write_byte(ctx, val);
+}
+
+void acpigen_write_name_word(struct acpi_ctx *ctx, const char *name, uint val)
+{
+ acpigen_write_name(ctx, name);
+ acpigen_write_word(ctx, val);
+}
+
+void acpigen_write_name_dword(struct acpi_ctx *ctx, const char *name, uint val)
+{
+ acpigen_write_name(ctx, name);
+ acpigen_write_dword(ctx, val);
+}
+
+void acpigen_write_name_qword(struct acpi_ctx *ctx, const char *name, u64 val)
+{
+ acpigen_write_name(ctx, name);
+ acpigen_write_qword(ctx, val);
+}
+
+void acpigen_write_name_integer(struct acpi_ctx *ctx, const char *name, u64
val)
+{
+ acpigen_write_name(ctx, name);
+ acpigen_write_integer(ctx, val);
+}
+
+void acpigen_write_name_string(struct acpi_ctx *ctx, const char *name,
+ const char *string)
+{
+ acpigen_write_name(ctx, name);
+ acpigen_write_string(ctx, string);
+}
+
void acpigen_emit_stream(struct acpi_ctx *ctx, const char *data, int size)
{
int i;
diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c
index 8fbe30b152..c1fd9c3bfd 100644
--- a/test/dm/acpigen.c
+++ b/test/dm/acpigen.c
@@ -1020,3 +1020,81 @@ static int dm_test_acpi_device(struct unit_test_state
*uts)
return 0;
}
DM_TEST(dm_test_acpi_device, 0);
+
+/* Test writing named values */
+static int dm_test_acpi_write_name(struct unit_test_state *uts)
+{
+ const char *name = "\\_SB." ACPI_TEST_DEV_NAME;
+ struct acpi_ctx *ctx;
+ u8 *ptr;
+
+ ut_assertok(alloc_context());
+ ptr = acpigen_get_current(ctx);
+
+
[PATCH v2 07/44] dm: acpi: Add support for the NHLT table
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.
Add core support for this, based on a structure which is built up through
calls to the driver.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
drivers/core/acpi.c | 15 +++
include/dm/acpi.h | 26 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
index ae69258562..cdbc2c5cf5 100644
--- a/drivers/core/acpi.c
+++ b/drivers/core/acpi.c
@@ -31,6 +31,7 @@ enum method_t {
METHOD_WRITE_TABLES,
METHOD_FILL_SSDT,
METHOD_INJECT_DSDT,
+ METHOD_SETUP_NHLT,
};
/* Prototype for all methods */
@@ -248,6 +249,8 @@ acpi_method acpi_get_method(struct udevice *dev, enum
method_t method)
return aops->fill_ssdt;
case METHOD_INJECT_DSDT:
return aops->inject_dsdt;
+ case METHOD_SETUP_NHLT:
+ return aops->setup_nhlt;
}
}
@@ -334,3 +337,15 @@ int acpi_write_dev_tables(struct acpi_ctx *ctx)
return ret;
}
+
+int acpi_setup_nhlt(struct acpi_ctx *ctx, struct nhlt *nhlt)
+{
+ int ret;
+
+ log_debug("Setup NHLT\n");
+ ctx->nhlt = nhlt;
+ ret = acpi_recurse_method(ctx, dm_root(), METHOD_SETUP_NHLT, TYPE_NONE);
+ log_debug("Setup finished, err=%d\n", ret);
+
+ return ret;
+}
diff --git a/include/dm/acpi.h b/include/dm/acpi.h
index d8d2eb6130..be61620687 100644
--- a/include/dm/acpi.h
+++ b/include/dm/acpi.h
@@ -27,6 +27,8 @@
#if !defined(__ACPI__)
+struct nhlt;
+
/** enum acpi_dump_option - selects what ACPI information to dump */
enum acpi_dump_option {
ACPI_DUMP_LIST, /* Just the list of items */
@@ -44,6 +46,9 @@ enum acpi_dump_option {
* adding a new table. The RSDP holds pointers to the RSDT and XSDT.
* @rsdt: Pointer to the Root System Description Table
* @xsdt: Pointer to the Extended System Description Table
+ * @nhlt: Intel Non-High-Definition-Audio Link Table (NHLT) pointer, used to
+ * build up information that audio codecs need to provide in the NHLT ACPI
+ * table
* @len_stack: Stack of 'length' words to fix up later
* @ltop: Points to current top of stack (0 = empty)
*/
@@ -53,6 +58,7 @@ struct acpi_ctx {
struct acpi_rsdp *rsdp;
struct acpi_rsdt *rsdt;
struct acpi_xsdt *xsdt;
+ struct nhlt *nhlt;
char *len_stack[ACPIGEN_LENSTACK_SIZE];
int ltop;
};
@@ -113,6 +119,15 @@ struct acpi_ops {
* @return 0 if OK, -ve on error
*/
int (*inject_dsdt)(const struct udevice *dev, struct acpi_ctx *ctx);
+
+ /**
+* setup_nhlt() - Set up audio information for this device
+*
+* The method can add information to ctx->nhlt if it likes
+*
+* @return 0 if OK, -ENODATA if nothing to add, -ve on error
+*/
+ int (*setup_nhlt)(const struct udevice *dev, struct acpi_ctx *ctx);
};
#define device_get_acpi_ops(dev) ((dev)->driver->acpi_ops)
@@ -177,6 +192,17 @@ int acpi_fill_ssdt(struct acpi_ctx *ctx);
*/
int acpi_inject_dsdt(struct acpi_ctx *ctx);
+/**
+ * acpi_setup_nhlt() - Set up audio information
+ *
+ * This is called to set up the nhlt information for all devices.
+ *
+ * @ctx: ACPI context to use
+ * @nhlt: Pointer to nhlt information to add to
+ * @return 0 if OK, -ve on error
+ */
+int acpi_setup_nhlt(struct acpi_ctx *ctx, struct nhlt *nhlt);
+
/**
* acpi_dump_items() - Dump out the collected ACPI items
*
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 08/44] acpi: Export functions to write sized values
At present only acpigen_write_integer() is exported for use by other code.
But in some cases it is useful to call the specific function depending on
the size of the value.
Export these functions and add a test.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
include/acpi/acpigen.h | 46 ++
test/dm/acpigen.c | 45 -
2 files changed, 90 insertions(+), 1 deletion(-)
diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h
index d06d2c0c73..c6644bc2b2 100644
--- a/include/acpi/acpigen.h
+++ b/include/acpi/acpigen.h
@@ -172,6 +172,52 @@ void acpigen_pop_len(struct acpi_ctx *ctx);
*/
char *acpigen_write_package(struct acpi_ctx *ctx, int nr_el);
+/**
+ * acpigen_write_byte() - Write a byte
+ *
+ * @ctx: ACPI context pointer
+ * @data: Value to write
+ */
+void acpigen_write_byte(struct acpi_ctx *ctx, unsigned int data);
+
+/**
+ * acpigen_write_word() - Write a word
+ *
+ * @ctx: ACPI context pointer
+ * @data: Value to write
+ */
+void acpigen_write_word(struct acpi_ctx *ctx, unsigned int data);
+
+/**
+ * acpigen_write_dword() - Write a dword
+ *
+ * @ctx: ACPI context pointer
+ * @data: Value to write
+ */
+void acpigen_write_dword(struct acpi_ctx *ctx, unsigned int data);
+
+/**
+ * acpigen_write_qword() - Write a qword
+ *
+ * @ctx: ACPI context pointer
+ * @data: Value to write
+ */
+void acpigen_write_qword(struct acpi_ctx *ctx, u64 data);
+
+/**
+ * acpigen_write_zero() - Write zero
+ *
+ * @ctx: ACPI context pointer
+ */
+void acpigen_write_zero(struct acpi_ctx *ctx);
+
+/**
+ * acpigen_write_one() - Write one
+ *
+ * @ctx: ACPI context pointer
+ */
+void acpigen_write_one(struct acpi_ctx *ctx);
+
/**
* acpigen_write_integer() - Write an integer
*
diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c
index 9e7a928b24..167a014553 100644
--- a/test/dm/acpigen.c
+++ b/test/dm/acpigen.c
@@ -872,5 +872,48 @@ static int dm_test_acpi_power_seq(struct unit_test_state
*uts)
return 0;
}
-
DM_TEST(dm_test_acpi_power_seq, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test writing values */
+static int dm_test_acpi_write_values(struct unit_test_state *uts)
+{
+ struct acpi_ctx *ctx;
+ u8 *ptr;
+
+ ut_assertok(alloc_context());
+ ptr = acpigen_get_current(ctx);
+
+ acpigen_write_zero(ctx);
+ acpigen_write_one(ctx);
+ acpigen_write_byte(ctx, TEST_INT8);
+ acpigen_write_word(ctx, TEST_INT16);
+ acpigen_write_dword(ctx, TEST_INT32);
+ acpigen_write_qword(ctx, TEST_INT64);
+
+ ut_asserteq(ZERO_OP, *ptr++);
+
+ ut_asserteq(ONE_OP, *ptr++);
+
+ ut_asserteq(BYTE_PREFIX, *ptr++);
+ ut_asserteq(TEST_INT8, *ptr++);
+
+ ut_asserteq(WORD_PREFIX, *ptr++);
+ ut_asserteq(TEST_INT16, get_unaligned((u16 *)ptr));
+ ptr += 2;
+
+ ut_asserteq(DWORD_PREFIX, *ptr++);
+ ut_asserteq(TEST_INT32, get_unaligned((u32 *)ptr));
+ ptr += 4;
+
+ ut_asserteq(QWORD_PREFIX, *ptr++);
+ ut_asserteq_64(TEST_INT64, get_unaligned((u64 *)ptr));
+ ptr += 8;
+
+ ut_asserteq_ptr(ptr, ctx->current);
+
+ free_context();
+
+ return 0;
+}
+DM_TEST(dm_test_acpi_write_values, 0);
+
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 09/44] acpi: Support generation of a scope
Add a function to write a scope to the generated ACPI code.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Rename parameter from 'name' to 'scope'
include/acpi/acpigen.h | 9 +
lib/acpi/acpigen.c | 7 +++
test/dm/acpi.c | 3 +--
test/dm/acpigen.c | 30 ++
4 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h
index c6644bc2b2..4a606125de 100644
--- a/include/acpi/acpigen.h
+++ b/include/acpi/acpigen.h
@@ -31,6 +31,7 @@ enum {
DWORD_PREFIX= 0x0c,
STRING_PREFIX = 0x0d,
QWORD_PREFIX= 0x0e,
+ SCOPE_OP= 0x10,
BUFFER_OP = 0x11,
PACKAGE_OP = 0x12,
METHOD_OP = 0x14,
@@ -261,6 +262,14 @@ void acpigen_emit_namestring(struct acpi_ctx *ctx, const
char *namepath);
*/
void acpigen_write_name(struct acpi_ctx *ctx, const char *namepath);
+/**
+ * acpigen_write_scope() - Write a scope
+ *
+ * @ctx: ACPI context pointer
+ * @scope: Scope to write (e.g. "\\_SB.ABCD")
+ */
+void acpigen_write_scope(struct acpi_ctx *ctx, const char *scope);
+
/**
* acpigen_write_uuid() - Write a UUID
*
diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c
index 45216c1f9d..1e0a489d7b 100644
--- a/lib/acpi/acpigen.c
+++ b/lib/acpi/acpigen.c
@@ -258,6 +258,13 @@ void acpigen_write_name(struct acpi_ctx *ctx, const char
*namepath)
acpigen_emit_namestring(ctx, namepath);
}
+void acpigen_write_scope(struct acpi_ctx *ctx, const char *scope)
+{
+ acpigen_emit_byte(ctx, SCOPE_OP);
+ acpigen_write_len_f(ctx);
+ acpigen_emit_namestring(ctx, scope);
+}
+
static void acpigen_write_method_internal(struct acpi_ctx *ctx,
const char *name, uint flags)
{
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
index 7768f9514c..b94c4ba4d1 100644
--- a/test/dm/acpi.c
+++ b/test/dm/acpi.c
@@ -20,9 +20,8 @@
#include
#include
#include
+#include "acpi.h"
-#define ACPI_TEST_DEV_NAME "ABCD"
-#define ACPI_TEST_CHILD_NAME "EFGH"
#define BUF_SIZE 4096
/**
diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c
index 167a014553..1031185b96 100644
--- a/test/dm/acpigen.c
+++ b/test/dm/acpigen.c
@@ -917,3 +917,33 @@ static int dm_test_acpi_write_values(struct
unit_test_state *uts)
}
DM_TEST(dm_test_acpi_write_values, 0);
+/* Test writing a scope */
+static int dm_test_acpi_scope(struct unit_test_state *uts)
+{
+ char buf[ACPI_PATH_MAX];
+ struct acpi_ctx *ctx;
+ struct udevice *dev;
+ u8 *ptr;
+
+ ut_assertok(alloc_context());
+ ptr = acpigen_get_current(ctx);
+
+ ut_assertok(uclass_first_device_err(UCLASS_TEST_ACPI, ));
+ ut_assertok(acpi_device_path(dev, buf, sizeof(buf)));
+ acpigen_write_scope(ctx, buf);
+ acpigen_pop_len(ctx);
+
+ ut_asserteq(SCOPE_OP, *ptr++);
+ ut_asserteq(13, get_length(ptr));
+ ptr += 3;
+ ut_asserteq(ROOT_PREFIX, *ptr++);
+ ut_asserteq(DUAL_NAME_PREFIX, *ptr++);
+ ut_asserteq_strn("_SB_" ACPI_TEST_DEV_NAME, (char *)ptr);
+ ptr += 8;
+ ut_asserteq_ptr(ptr, ctx->current);
+
+ free_context();
+
+ return 0;
+}
+DM_TEST(dm_test_acpi_scope, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 06/44] dm: core: Add a way of overriding the ACPI device path
Some devices such as GPIO need to override the normal path that would be
generated by driver model. Add a device-tree property for this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
doc/device-tree-bindings/device.txt | 23 +++
drivers/core/acpi.c | 19 +++
include/dm/acpi.h | 13 +
3 files changed, 55 insertions(+)
diff --git a/doc/device-tree-bindings/device.txt
b/doc/device-tree-bindings/device.txt
index 7140339623..2a5736c598 100644
--- a/doc/device-tree-bindings/device.txt
+++ b/doc/device-tree-bindings/device.txt
@@ -17,6 +17,8 @@ the acpi,compatible property.
System) Device Name)
- acpi,hid : Contains the string to use as the HID (Hardware ID)
identifier _HID
+ - acpi,path : Specifies the full ACPI path for a device. This overrides the
+normal path built from the driver-model hierarchy
- acpi,name : Provides the ACPI name for a device, which is a string
consisting
of four alphanumeric character (upper case)
- acpi,uid : _UID value for device
@@ -47,3 +49,24 @@ pcie-a0@14,0 {
interrupts-extended = <_gpe 0x3c 0>;
};
};
+
+p2sb: p2sb@d,0 {
+ u-boot,dm-pre-reloc;
+ reg = <0x02006810 0 0 0 0>;
+ compatible = "intel,apl-p2sb";
+ early-regs = ;
+ pci,no-autoconfig;
+
+ n {
+ compatible = "intel,apl-pinctrl";
+ u-boot,dm-pre-reloc;
+ intel,p2sb-port-id = ;
+ acpi,path = "\\_SB.GPO0";
+ gpio_n: gpio-n {
+ compatible = "intel,gpio";
+ u-boot,dm-pre-reloc;
+ gpio-controller;
+ #gpio-cells = <2>;
+ linux-name = "INT3452:00";
+ };
+ };
diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
index b566f4f186..ae69258562 100644
--- a/drivers/core/acpi.c
+++ b/drivers/core/acpi.c
@@ -82,6 +82,25 @@ int acpi_get_name(const struct udevice *dev, char *out_name)
return 0;
}
+int acpi_get_path(const struct udevice *dev, char *out_path, int maxlen)
+{
+ const char *path;
+ int ret;
+
+ path = dev_read_string(dev, "acpi,path");
+ if (path) {
+ if (strlen(path) >= maxlen)
+ return -E2BIG;
+ strcpy(out_path, path);
+ return 0;
+ }
+ ret = acpi_device_path(dev, out_path, maxlen);
+ if (ret)
+ return log_msg_ret("dev", ret);
+
+ return 0;
+}
+
/**
* acpi_add_item() - Add a new item to the list of data collected
*
diff --git a/include/dm/acpi.h b/include/dm/acpi.h
index 8e9b9f75ba..d8d2eb6130 100644
--- a/include/dm/acpi.h
+++ b/include/dm/acpi.h
@@ -187,6 +187,19 @@ int acpi_inject_dsdt(struct acpi_ctx *ctx);
*/
void acpi_dump_items(enum acpi_dump_option option);
+/**
+ * acpi_get_path() - Get the full ACPI path for a device
+ *
+ * This checks for any override in the device tree and calls acpi_device_path()
+ * if not
+ *
+ * @dev: Device to check
+ * @out_path: Buffer to place the path in (should be ACPI_PATH_MAX long)
+ * @maxlen: Size of buffer (typically ACPI_PATH_MAX)
+ * @return 0 if OK, -ve on error
+ */
+int acpi_get_path(const struct udevice *dev, char *out_path, int maxlen);
+
#endif /* __ACPI__ */
#endif
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 05/44] dtoc: Support ACPI paths in of-platdata
The start of an ACPI path typically has backslashes in it. These are not
preserved during the translation from device tree to C code, since dtc
(correctly) uses the first backslash as an escape character, and dtoc
therefore leaves it out of the C string.
Fix this with special-case handling.
Signed-off-by: Simon Glass
---
(no changes since v1)
tools/dtoc/dtb_platdata.py | 4 +++-
tools/dtoc/dtoc_test_simple.dts | 1 +
tools/dtoc/test_dtoc.py | 3 +++
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 25ed7f50eb..bd6f082c21 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -104,7 +104,9 @@ def get_value(ftype, value):
elif ftype == fdt.TYPE_BYTE:
return '%#x' % tools.ToByte(value[0])
elif ftype == fdt.TYPE_STRING:
-return '"%s"' % value
+# Handle evil ACPI backslashes by adding another backslash before them.
+# So "\\_SB.GPO0" in the device tree effectively stays like that in C
+return '"%s"' % value.replace('\\', '')
elif ftype == fdt.TYPE_BOOL:
return 'true'
elif ftype == fdt.TYPE_INT64:
diff --git a/tools/dtoc/dtoc_test_simple.dts b/tools/dtoc/dtoc_test_simple.dts
index 165680bd4b..11bfc4c47a 100644
--- a/tools/dtoc/dtoc_test_simple.dts
+++ b/tools/dtoc/dtoc_test_simple.dts
@@ -34,6 +34,7 @@
longbytearray = [09 0a 0b 0c];
stringval = "message2";
stringarray = "another", "multi-word", "message";
+ acpi-name = "\\_SB.GPO0";
};
spl-test3 {
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 3c8e343b1f..08b02d4843 100755
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -72,6 +72,7 @@ class TestDtoc(unittest.TestCase):
@classmethod
def setUpClass(cls):
tools.PrepareOutputDir(None)
+cls.maxDiff = None
@classmethod
def tearDownClass(cls):
@@ -188,6 +189,7 @@ struct dtd_sandbox_pmic_test {
\tfdt64_t\t\treg[2];
};
struct dtd_sandbox_spl_test {
+\tconst char * acpi_name;
\tbool\t\tboolval;
\tunsigned char\tbytearray[3];
\tunsigned char\tbyteval;
@@ -225,6 +227,7 @@ U_BOOT_DEVICE(spl_test) = {
};
static struct dtd_sandbox_spl_test dtv_spl_test2 = {
+\t.acpi_name\t\t= "_SB.GPO0",
\t.bytearray\t\t= {0x1, 0x23, 0x34},
\t.byteval\t\t= 0x8,
\t.intarray\t\t= {0x5, 0x0, 0x0, 0x0},
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 04/44] acpi: Allow creating the GNVS to fail
In some cases an internal error may prevent this from working. Update the
function return value and report the error. At present the API for writing
tables does not easily support reporting errors, but once it is fully
updated to use a context pointer, this will be easier.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Fix 'Gailed' typo
Changes in v1:
- Add linux/err.h header
arch/x86/cpu/baytrail/acpi.c | 4 +++-
arch/x86/cpu/quark/acpi.c | 4 +++-
arch/x86/cpu/tangier/acpi.c | 4 +++-
arch/x86/include/asm/acpi_table.h | 10 +-
arch/x86/lib/acpi_table.c | 11 +--
5 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index b17bc62a2d..07757b88a3 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -139,7 +139,7 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct
acpi_facs *facs,
header->checksum = table_compute_checksum(fadt, header->length);
}
-void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
+int acpi_create_gnvs(struct acpi_global_nvs *gnvs)
{
struct udevice *dev;
int ret;
@@ -159,6 +159,8 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
gnvs->iuart_en = 1;
else
gnvs->iuart_en = 0;
+
+ return 0;
}
/*
diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c
index 26cda3b337..b0406a04e9 100644
--- a/arch/x86/cpu/quark/acpi.c
+++ b/arch/x86/cpu/quark/acpi.c
@@ -133,8 +133,10 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct
acpi_facs *facs,
header->checksum = table_compute_checksum(fadt, header->length);
}
-void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
+int acpi_create_gnvs(struct acpi_global_nvs *gnvs)
{
/* quark is a uni-processor */
gnvs->pcnt = 1;
+
+ return 0;
}
diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c
index 4ec8fdd6f8..41bd177e09 100644
--- a/arch/x86/cpu/tangier/acpi.c
+++ b/arch/x86/cpu/tangier/acpi.c
@@ -107,7 +107,7 @@ u32 acpi_fill_csrt(u32 current)
return current;
}
-void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
+int acpi_create_gnvs(struct acpi_global_nvs *gnvs)
{
struct udevice *dev;
int ret;
@@ -122,4 +122,6 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
if (ret > 0)
gnvs->pcnt = ret;
}
+
+ return 0;
}
diff --git a/arch/x86/include/asm/acpi_table.h
b/arch/x86/include/asm/acpi_table.h
index 928475cef4..733085c178 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -35,7 +35,15 @@ int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig
*mmconfig, u32 base,
u16 seg_nr, u8 start, u8 end);
u32 acpi_fill_mcfg(u32 current);
u32 acpi_fill_csrt(u32 current);
-void acpi_create_gnvs(struct acpi_global_nvs *gnvs);
+
+/**
+ * acpi_create_gnvs() - Create a GNVS (Global Non Volatile Storage) table
+ *
+ * @gnvs: Table to fill in
+ * @return 0 if OK, -ve on error
+ */
+int acpi_create_gnvs(struct acpi_global_nvs *gnvs);
+
ulong write_acpi_tables(ulong start);
/**
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index eeacfe9b06..8219376e17 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
/*
* IASL compiles the dsdt entries and writes the hex values
@@ -443,8 +444,14 @@ ulong write_acpi_tables(ulong start_addr)
dsdt->checksum = 0;
dsdt->checksum = table_compute_checksum((void *)dsdt, dsdt->length);
- /* Fill in platform-specific global NVS variables */
- acpi_create_gnvs(ctx->current);
+ /*
+* Fill in platform-specific global NVS variables. If this fails we
+* cannot return the error but this should only happen while debugging.
+*/
+ addr = acpi_create_gnvs(ctx->current);
+ if (IS_ERR_VALUE(addr))
+ printf("Error: Failed to create GNVS\n");
+
acpi_inc_align(ctx, sizeof(struct acpi_global_nvs));
debug("ACPI:* FADT\n");
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 02/44] binman: Refactor binman_entry_find() to allow other nodes
At present we can only read from a top-level binman node entry. Refactor
this function to produce a second local function which supports reading
from any node.
Signed-off-by: Simon Glass
---
Changes in v2:
- Rename binman_entry_find_()
lib/binman.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/lib/binman.c b/lib/binman.c
index dc3a880882..9098a1dffa 100644
--- a/lib/binman.c
+++ b/lib/binman.c
@@ -29,25 +29,32 @@ struct binman_info {
static struct binman_info *binman;
-int binman_entry_find(const char *name, struct binman_entry *entry)
+static int binman_entry_find_internal(ofnode node, const char *name,
+ struct binman_entry *entry)
{
- ofnode node;
int ret;
- node = ofnode_find_subnode(binman->image, name);
if (!ofnode_valid(node))
- return log_msg_ret("no binman node", -ENOENT);
+ node = binman->image;
+ node = ofnode_find_subnode(node, name);
+ if (!ofnode_valid(node))
+ return log_msg_ret("node", -ENOENT);
ret = ofnode_read_u32(node, "image-pos", >image_pos);
if (ret)
- return log_msg_ret("bad binman node1", ret);
+ return log_msg_ret("import-pos", ret);
ret = ofnode_read_u32(node, "size", >size);
if (ret)
- return log_msg_ret("bad binman node2", ret);
+ return log_msg_ret("size", ret);
return 0;
}
+int binman_entry_find(const char *name, struct binman_entry *entry)
+{
+ return binman_entry_find_internal(binman->image, name, entry);
+}
+
void binman_set_rom_offset(int rom_offset)
{
binman->rom_offset = rom_offset;
--
2.27.0.383.g050319c2ae-goog
[PATCH v2 03/44] binman: Add way to locate an entry in memory
Add support for accessing an entry's contents in memory-mapped SPI flash.
Signed-off-by: Simon Glass
---
(no changes since v1)
include/binman.h | 22 ++
lib/binman.c | 23 +++
2 files changed, 45 insertions(+)
diff --git a/include/binman.h b/include/binman.h
index baf49f7876..e0b92075e2 100644
--- a/include/binman.h
+++ b/include/binman.h
@@ -9,6 +9,8 @@
#ifndef _BINMAN_H_
#define _BINMAN_H_
+#include
+
/**
*struct binman_entry - information about a binman entry
*
@@ -20,6 +22,18 @@ struct binman_entry {
u32 size;
};
+/**
+ * binman_entry_map() - Look up the address of an entry in memory
+ *
+ * @parent: Parent binman node
+ * @name: Name of entry
+ * @bufp: Returns a pointer to the entry
+ * @sizep: Returns the size of the entry
+ * @return 0 on success, -EPERM if the ROM offset is not set, -ENOENT if the
+ * entry cannot be found, other error code other error
+ */
+int binman_entry_map(ofnode parent, const char *name, void **bufp, int *sizep);
+
/**
* binman_set_rom_offset() - Set the ROM memory-map offset
*
@@ -41,6 +55,14 @@ void binman_set_rom_offset(int rom_offset);
*/
int binman_entry_find(const char *name, struct binman_entry *entry);
+/**
+ * binman_section_find_node() - Find a binman node
+ *
+ * @name: Name of node to look for
+ * @return Node that was found, ofnode_null() if not found
+ */
+ofnode binman_section_find_node(const char *name);
+
/**
* binman_init() - Set up the binman symbol information
*
diff --git a/lib/binman.c b/lib/binman.c
index 9098a1dffa..7a8ad62c4a 100644
--- a/lib/binman.c
+++ b/lib/binman.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
/**
* struct binman_info - Information needed by the binman library
@@ -55,6 +56,28 @@ int binman_entry_find(const char *name, struct binman_entry
*entry)
return binman_entry_find_internal(binman->image, name, entry);
}
+int binman_entry_map(ofnode parent, const char *name, void **bufp, int *sizep)
+{
+ struct binman_entry entry;
+ int ret;
+
+ if (binman->rom_offset == ROM_OFFSET_NONE)
+ return -EPERM;
+ ret = binman_entry_find_internal(parent, name, );
+ if (ret)
+ return log_msg_ret("entry", ret);
+ if (sizep)
+ *sizep = entry.size;
+ *bufp = map_sysmem(entry.image_pos + binman->rom_offset, entry.size);
+
+ return 0;
+}
+
+ofnode binman_section_find_node(const char *name)
+{
+ return ofnode_find_subnode(binman->image, name);
+}
+
void binman_set_rom_offset(int rom_offset)
{
binman->rom_offset = rom_offset;
--
2.27.0.383.g050319c2ae-goog
Re: [PATCH v1 38/43] x86: mp: Allow use of mp_run_on_cpus() without MP
Hi Bin,
On Tue, 30 Jun 2020 at 02:40, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
> >
> > At present if MP is not enabled (e.g. booting from coreboot) the 'mtrr'
> > command does not work correctly. It is not easy to make it work for all
> > CPUs, since coreboot has halted them and we would need to start them up
> > again, but it is easy enough to make them work on the boot CPU.
> >
> > Update the code to avoid assuming that the MP init routine has completed,
> > so that this can work.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/cpu/mp_init.c | 12
> > 1 file changed, 8 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
> > index ef33a38017..c0ae24686e 100644
> > --- a/arch/x86/cpu/mp_init.c
> > +++ b/arch/x86/cpu/mp_init.c
> > @@ -454,7 +454,7 @@ static int get_bsp(struct udevice **devp, int
> > *cpu_countp)
> > if (cpu_countp)
> > *cpu_countp = ret;
> >
> > - return dev->req_seq;
> > + return dev->req_seq >= 0 ? dev->req_seq : 0;
> > }
> >
> > static struct mp_callback *read_callback(struct mp_callback **slot)
> > @@ -589,9 +589,6 @@ int mp_run_on_cpus(int cpu_select, mp_run_func func,
> > void *arg)
> > int num_cpus;
> > int ret;
> >
> > - if (!(gd->flags & GD_FLG_SMP_INIT))
> > - return -ENXIO;
> > -
> > ret = get_bsp(, _cpus);
> > if (ret < 0)
> > return log_msg_ret("bsp", ret);
> > @@ -601,6 +598,13 @@ int mp_run_on_cpus(int cpu_select, mp_run_func func,
> > void *arg)
> > func(arg);
> > }
> >
> > + if (!(gd->flags & GD_FLG_SMP_INIT)) {
> > + /* Allow use of this function on the BSP only */
> > + if (cpu_select == MP_SELECT_BSP || !cpu_select)
>
> This assumes 0 is the BSP cpu number?
We until i SMP is inited, then it is assumed to be CPU 0, yes.
I ended up pulling this fix into the MTRR series as I had to fix the
minnowmax bug.
Regards,
Simon
[PATCH v2 01/44] binman: Allow setting the ROM offset
On x86 the SPI ROM can be memory-mapped, at least most of it. Add a way
to tell binman the offset from a ROM address to a RAM address.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Add a way to set the binman ROM offset
include/binman.h | 8
lib/binman.c | 17 +
2 files changed, 25 insertions(+)
diff --git a/include/binman.h b/include/binman.h
index b462dc8542..baf49f7876 100644
--- a/include/binman.h
+++ b/include/binman.h
@@ -20,6 +20,14 @@ struct binman_entry {
u32 size;
};
+/**
+ * binman_set_rom_offset() - Set the ROM memory-map offset
+ *
+ * @rom_offset: Offset from an image_pos to the memory-mapped address. This
+ * tells binman that ROM image_pos x can be addressed at rom_offset + x
+ */
+void binman_set_rom_offset(int rom_offset);
+
/**
* binman_entry_find() - Find a binman symbol
*
diff --git a/lib/binman.c b/lib/binman.c
index fd7de24bd2..dc3a880882 100644
--- a/lib/binman.c
+++ b/lib/binman.c
@@ -12,10 +12,21 @@
#include
#include
+/**
+ * struct binman_info - Information needed by the binman library
+ *
+ * @image: Node describing the image we are running from
+ * @rom_offset: Offset from an image_pos to the memory-mapped address, or
+ * ROM_OFFSET_NONE if the ROM is not memory-mapped. Can be positive or
+ * negative
+ */
struct binman_info {
ofnode image;
+ int rom_offset;
};
+#define ROM_OFFSET_NONE(-1)
+
static struct binman_info *binman;
int binman_entry_find(const char *name, struct binman_entry *entry)
@@ -37,6 +48,11 @@ int binman_entry_find(const char *name, struct binman_entry
*entry)
return 0;
}
+void binman_set_rom_offset(int rom_offset)
+{
+ binman->rom_offset = rom_offset;
+}
+
int binman_init(void)
{
binman = malloc(sizeof(struct binman_info));
@@ -45,6 +61,7 @@ int binman_init(void)
binman->image = ofnode_path("/binman");
if (!ofnode_valid(binman->image))
return log_msg_ret("binman node", -EINVAL);
+ binman->rom_offset = ROM_OFFSET_NONE;
return 0;
}
--
2.27.0.383.g050319c2ae-goog
Re: [PATCH v1 40/43] x86: Drop setup_pcat_compatibility()
Hi Bin,
On Tue, 30 Jun 2020 at 02:40, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
> >
> > This function does not exist anymore. Drop it from the header file.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/include/asm/u-boot-x86.h | 2 --
> > 1 file changed, 2 deletions(-)
> >
>
> The function is in zimage.c
>
> ./arch/x86/lib/zimage.c:307:void setup_pcat_compatibility(void)
> ./arch/x86/lib/zimage.c:308:__attribute__((weak,
> alias("__setup_pcat_compatibility")));
> ./arch/x86/lib/zimage.c:310:void __setup_pcat_compatibility(void)
> ./arch/x86/lib/zimage.c:327:setup_pcat_compatibility();
Ooops I meant to remove it from there also. Will do.
Regards,
SImon
[PATCH v2 00/44] x86: Programmatic generation of ACPI tables (Part C)
This series is split off from the original ACPI series and renumbered to version 1. It includes functions for generating more ACPI constructs as well as I2C, GPIO and sound support. There are also quite a few patches related to getting coral to work correctly with ACPI. Changes in v2: - Rename binman_entry_find_() - Fix 'Gailed' typo - Rename parameter from 'name' to 'scope' - Add a comment pointing to the PCI spec - Move this patch before the audio-codec drivers - Use BIT() for the SPEAKER enum Add a comment about only x86 boards supporting NHLT Add a comment about only x86 boards supporting NHLT - Fix comment for intel_pinctrl_get_config_reg_addr() - Add help for CONFIG_INTEL_PINCTRL_MULTI_ACPI_DEVICES - Fix the commit subject to mention dropping acpi_path, not acpi_name - Add a few blank lines - Drop dead code behind if (0) - Move .ops change from the next patch - Add mention of why log_msg_ret() is dropped - Add a new commit to handle the boot_mode fix - Split out the boot_mode change into a separate patch - Remove the function from zimage.c also - Use ACPI_MADT_REV_ACPI_3_0 instead of the open-coded value - Don't enable this for qemu Changes in v1: - Add a way to set the binman ROM offset - Add linux/err.h header - Capitalise ACPI_OPS_PTR - Add a new patch to support building up an NHLT structure - Use acpi,ddn instead of acpi,desc - Add a check for invalid node - Add NHLT support - Capitalise ACPI_OPS_PTR - Rebase to master - Use acpi,ddn instead of acpi,desc - Drop the unwanted acpi_device_write_gpio_desc() - Rename max97357a to max98357a - Add NHLT support - Capitalise ACPI_OPS_PTR - Rebase to master - Add new patch to add error checking for csrt table generation - Use acpi_get_path() to get device path - Add new patch to improve designware_i2c debugging - Capitalise ACPI_OPS_PTR Simon Glass (44): binman: Allow setting the ROM offset binman: Refactor binman_entry_find() to allow other nodes binman: Add way to locate an entry in memory acpi: Allow creating the GNVS to fail dtoc: Support ACPI paths in of-platdata dm: core: Add a way of overriding the ACPI device path dm: acpi: Add support for the NHLT table acpi: Export functions to write sized values acpi: Support generation of a scope acpi: Support generation of a generic register acpi: mmc: Generate ACPI info for the PCI SD Card x86: Add bindings for NHLT acpi: Support generation of a device acpi: Support writing named values x86: Add support for building up an NHLT structure sound: Add an ACPI driver for Dialog Semicondutor da7219 sound: Add an ACPI driver for Maxim MAX98357ac x86: pinctrl: Add a way to get the pinctrl reg address x86: pinctrl: Update comment for intel_pinctrl_get_pad() x86: pinctrl: Add multi-ACPI control x86: pinctrl: Set up itss in the probe() method x86: pinctrl: Drop the acpi_path member x86: Add error checking for csrt table generation x86: apl: Use memory-mapped access for VBT x86: gpio: Add support for obtaining ACPI info for a GPIO i2c: designware_i2c: Add a little more debugging i2c: Add log_ret() on error i2c: designware_i2c: Support ACPI table generation p2sb: Add a method to hide the bus x86: apl: Support set_hide() in p2sb driver x86: apl: Hide the p2sb on exit from U-Boot pmc: Move common registers to the header file x86: irq: Support flags for acpi_gpe x86: apl: Fix save/restore of ITSS priorities x86: Add debugging to table writing x86: apl: Set the correct boot mode in the FSP-M code x86: apl: Adjust FSP-M code to avoid hard-coded address x86: Store the coreboot table address in global_data x86: mp: Allow use of mp_run_on_cpus() without MP x86: Update the comment about booting for FSP2 x86: Drop setup_pcat_compatibility() x86: acpi: Correct the version of the MADT x86: Rename board_final_cleanup() to board_final_init() acpi: Enable ACPI table generation by default on x86 arch/Kconfig | 1 + arch/x86/cpu/acpi_gpe.c | 26 + arch/x86/cpu/apollolake/fsp_m.c | 6 +- arch/x86/cpu/apollolake/fsp_s.c | 56 +- arch/x86/cpu/baytrail/acpi.c | 4 +- arch/x86/cpu/coreboot/coreboot.c | 4 +- arch/x86/cpu/coreboot/tables.c| 8 +- arch/x86/cpu/cpu.c| 21 +- arch/x86/cpu/efi/app.c| 2 +- arch/x86/cpu/i386/cpu.c | 7 +- arch/x86/cpu/intel_common/itss.c | 25 +- arch/x86/cpu/intel_common/p2sb.c | 44 ++ arch/x86/cpu/mp_init.c| 12 +- arch/x86/cpu/quark/acpi.c | 4 +- arch/x86/cpu/quark/quark.c| 2 +- arch/x86/cpu/start.S | 1 + arch/x86/cpu/tangier/acpi.c | 4 +- arch/x86/include/asm/acpi_nhlt.h | 314 arch/x86/include/asm/acpi_table.h | 10
Re: [PATCH v1 28/43] i2c: designware_i2c: Support ACPI table generation
Hi Wolfgang,
On Thu, 25 Jun 2020 at 06:46, Wolfgang Wallner
wrote:
>
> Hi Simon,
>
> -"Simon Glass" schrieb: -
> > Betreff: [PATCH v1 28/43] i2c: designware_i2c: Support ACPI table generation
> >
> > Update the PCI driver to generate ACPI information so that Linux has the
> > full information about each I2C bus.
> >
> > Signed-off-by: Simon Glass
> >
> > ---
> >
> > Changes in v1:
> > - Capitalise ACPI_OPS_PTR
> >
> > drivers/i2c/designware_i2c.c | 25
> > drivers/i2c/designware_i2c.h | 15 +
> > drivers/i2c/designware_i2c_pci.c | 104 ++-
> > 3 files changed, 143 insertions(+), 1 deletion(-)
> >
[.]
> > +/*
> > + * Write ACPI object to describe speed configuration.
> > + *
> > + * ACPI Object: Name ("", Package () { scl_lcnt, scl_hcnt, sda_hold }
> > + *
> > + * SSCN: I2C_SPEED_STANDARD
> > + * FMCN: I2C_SPEED_FAST
> > + * FPCN: I2C_SPEED_FAST_PLUS
> > + * HSCN: I2C_SPEED_HIGH
> > + */
> > +static void dw_i2c_acpi_write_speed_config(struct acpi_ctx *ctx,
> > +struct dw_i2c_speed_config *config)
> > +{
> > + switch (config->speed_mode) {
> > + case IC_SPEED_MODE_HIGH:
> > + acpigen_write_name(ctx, "HSCN");
> > + break;
> > + case IC_SPEED_MODE_FAST_PLUS:
> > + acpigen_write_name(ctx, "FPCN");
> > + break;
> > + case IC_SPEED_MODE_FAST:
> > + acpigen_write_name(ctx, "FMCN");
> > + break;
> > + case IC_SPEED_MODE_STANDARD:
> > + default:
> > + acpigen_write_name(ctx, "SSCN");
> > + }
> > +
> > + /* Package () { scl_lcnt, scl_hcnt, sda_hold } */
> > + acpigen_write_package(ctx, 3);
> > + acpigen_write_word(ctx, config->scl_hcnt);
> > + acpigen_write_word(ctx, config->scl_lcnt);
> > + acpigen_write_dword(ctx, config->sda_hold);
> > + acpigen_pop_len(ctx);
> > +}
>
> This function is rather generic, and probably the same for any I2C controller.
> Is the intention to implement it for Designware as a first step and move it to
> a generic place if the need arises, or should it stay here?
So far I have only not seen Intel SoCs use anything other than
designware I2C. If that happens then the encoding may well be the same
and we could end up with some common code. But I am not sure at
present. The kernel I2C driver that reads this is designware ony, from
what I can tell.
Regards,
Simon
Re: [PATCH v1 22/43] x86: Add support for building up an NHLT structure
Hi Wolfgang,
On Thu, 2 Jul 2020 at 02:11, Wolfgang Wallner
wrote:
>
> Hi Simon,
>
> I dont know NHLT well enough to actually review the code, but I did compare
> the files in this patch to the version in coreboot. Most of the changes are
> obvious (coding style, spelling, ...), but some things are not, see the
> remarks
> below.
>
> -"Simon Glass" schrieb: -
> > Betreff: [PATCH v1 22/43] x86: Add support for building up an NHLT structure
> >
> > The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
> > audio codecs and connections in a system. Various devices can contribute
> > information to produce the table.
> >
> > Add functions to allow adding to the structure that is eventually written
> > to the ACPI tables. Also add the device-tree bindings.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > Changes in v1:
> > - Add a new patch to support building up an NHLT structure
> >
> > arch/x86/include/asm/acpi_nhlt.h | 314
> > arch/x86/lib/Makefile| 1 +
> > arch/x86/lib/acpi_nhlt.c | 482 +++
> > 3 files changed, 797 insertions(+)
> > create mode 100644 arch/x86/include/asm/acpi_nhlt.h
> > create mode 100644 arch/x86/lib/acpi_nhlt.c
> >
> > diff --git a/arch/x86/include/asm/acpi_nhlt.h
> > b/arch/x86/include/asm/acpi_nhlt.h
> > new file mode 100644
> > index 00..4d2573d5ff
> > --- /dev/null
> > +++ b/arch/x86/include/asm/acpi_nhlt.h
> > @@ -0,0 +1,314 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright 2020 Google LLC
> > + *
> > + * Modified from coreboot nhlt.h
> > + */
> > +
> > +#ifndef _NHLT_H_
> > +#define _NHLT_H_
> > +
> > +struct acpi_ctx;
> > +struct nhlt;
> > +struct nhlt_endpoint;
> > +struct nhlt_format;
> > +struct nhlt_format_config;
> > +
> > +/*
> > + * Non HD Audio ACPI support. This table is typically used for Intel Smart
> > + * Sound Technology DSP. It provides a way to encode opaque settings in
> > + * the ACPI tables.
> > + *
> > + * While the structure fields of the NHLT structs are exposed below
> > + * the SoC/chipset code should be the only other user manipulating the
> > + * fields directly aside from the library itself.
> > + *
> > + * The NHLT table consists of endpoints which in turn contain different
> > + * supporting stream formats. Each endpoint may contain a device specific
> > + * configuration payload as well as each stream format.
> > + *
> > + * Most code should use the SoC variants of the functions because
> > + * there is required logic needed to be performed by the SoC. The SoC
> > + * code should be abstracting the inner details of these functions that
> > + * specically apply to NHLT objects for that SoC.
> > + *
> > + * An example sequence:
> > + *
> > + * nhlt = nhlt_init()
> > + * ep = nhlt_add_endpoint()
> > + * nhlt_endpoint_append_config(ep)
> > + * nhlt_endpoint_add_formats(ep)
> > + * nhlt_soc_serialise()
> > + */
> > +
> > +/* Obtain an nhlt object for adding endpoints. Returns NULL on error. */
> > +struct nhlt *nhlt_init(void);
> > +
> > +/* Return the size of the NHLT table including ACPI header. */
> > +size_t nhlt_current_size(struct nhlt *nhlt);
> > +
> > +/*
> > + * Helper functions for adding NHLT devices utilizing an
> > nhlt_endp_descriptor
> > + * to drive the logic.
> > + */
> > +
> > +struct nhlt_endp_descriptor {
> > + /* NHLT endpoint types. */
> > + int link;
> > + int device;
> > + int direction;
> > + u16 vid;
> > + u16 did;
> > + /* Optional endpoint specific configuration data. */
> > + const void *cfg;
> > + size_t cfg_size;
> > + /* Formats supported for endpoint. */
> > + const struct nhlt_format_config *formats;
> > + size_t num_formats;
> > +};
> > +
> > +/*
> > + * Add the number of endpoints described by each descriptor. The virtual
> > bus
> > + * id for each descriptor is the default value of 0.
> > + * Returns < 0 on error, 0 on success.
> > + */
> > +int nhlt_add_endpoints(struct nhlt *nhlt,
> > +const struct nhlt_endp_descriptor *epds,
> > +size_t num_epds);
> > +
> > +/*
> > + * Add the number of endpoints associated with a single NHLT SSP instance
> > id.
> > + * Each endpoint described in the endpoint descriptor array uses the
> > provided
> > + * virtual bus id. Returns < 0 on error, 0 on success.
> > + */
> > +int nhlt_add_ssp_endpoints(struct nhlt *nhlt, int virtual_bus_id,
> > +const struct nhlt_endp_descriptor *epds,
> > +size_t num_epds);
> > +
> > +/*
> > + * Add endpoint to NHLT object. Returns NULL on error.
> > + *
> > + * generic nhlt_add_endpoint() is called by the SoC code to provide
> > + * the specific assumptions/uses for NHLT for that platform. All fields
> > + * are the NHLT enumerations found within this header file.
> > + */
> > +struct nhlt_endpoint *nhlt_add_endpoint(struct nhlt *nhlt, int link_type,
> > +
Re: [PATCH v1 37/43] x86: Store the coreboot table address in global_data
Hi Wolfgang, On Wed, 1 Jul 2020 at 09:16, Wolfgang Wallner wrote: > > Hi Simon, > > -"Simon Glass" schrieb: - > > Betreff: [PATCH v1 37/43] x86: Store the coreboot table address in > > global_data > > > > At present this information is used to locate and parse the tables but is > > not stored. Store it so that we can display it to the user, e.g. with the > > 'bdinfo' command. > > > > Signed-off-by: Simon Glass > > --- > > > > arch/x86/cpu/coreboot/tables.c | 8 +++- > > arch/x86/cpu/i386/cpu.c| 7 ++- > > arch/x86/include/asm/global_data.h | 1 + > > 3 files changed, 14 insertions(+), 2 deletions(-) > > > > diff --git a/arch/x86/cpu/coreboot/tables.c b/arch/x86/cpu/coreboot/tables.c > > index a5d31d1dea..1594b4a8b2 100644 > > --- a/arch/x86/cpu/coreboot/tables.c > > +++ b/arch/x86/cpu/coreboot/tables.c > > @@ -10,6 +10,8 @@ > > #include > > #include > > > > +DECLARE_GLOBAL_DATA_PTR; > > + > > /* > > * This needs to be in the .data section so that it's copied over during > > * relocation. By default it's put in the .bss section which is simply > > filled > > @@ -243,6 +245,10 @@ int get_coreboot_info(struct sysinfo_t *info) > > if (addr < 0) > > return addr; > > ret = cb_parse_header((void *)addr, 0x1000, info); > > + if (!ret) > > + return -ENOENT; > > + gd->arch.coreboot_table = addr; > > + gd->flags |= GD_FLG_SKIP_LL_INIT; > > Why is GD_FLG_SKIP_LL_INIT now set in get_coreboot_info()? I found that we need to set it both when running the actual coreboot build and when running a bare-metal board. So this is the best place to do it. Regards, Simon
Re: [PATCH v1 33/43] x86: irq: Support flags for acpi_gpe
Hi Wolfgang, On Wed, 1 Jul 2020 at 09:15, Wolfgang Wallner wrote: > > Hi Simon, > > -"Simon Glass" schrieb: - > > > Betreff: [PATCH v1 33/43] x86: irq: Support flags for acpi_gpe > > > > This binding currently has a flags cell but it is not used. Make use of it > > to create ACPI tables for interrupts. > > > > Signed-off-by: Simon Glass > > --- > > > > arch/x86/cpu/acpi_gpe.c | 26 +++ > > .../interrupt-controller/x86-irq.h| 14 ++ > > 2 files changed, 40 insertions(+) > > create mode 100644 include/dt-bindings/interrupt-controller/x86-irq.h > > > > [snip] > > > diff --git a/include/dt-bindings/interrupt-controller/x86-irq.h > > b/include/dt-bindings/interrupt-controller/x86-irq.h > > new file mode 100644 > > index 00..9e0b4612e1 > > --- /dev/null > > +++ b/include/dt-bindings/interrupt-controller/x86-irq.h > > @@ -0,0 +1,14 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright 2019 Google LLC > > + * > > + * This provides additional flags used by x86. > > + */ > > + > > +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_X86_IRQ_H > > +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_X86_IRQ_H > > + > > +#define X86_IRQ_TYPE_SHARED (1 << 4) > > +#define X86_IRQ_TYPE_WAKE(1 << 5) > > Nit: BIT(4) and BIT(4) ? I can't use those in devicetree bindings unfortunately. Regards, SImon
Re: [PATCH v1 25/43] x86: gpio: Add support for obtaining ACPI info for a GPIO
Hi Bin,
On Tue, 30 Jun 2020 at 01:47, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
> >
> > Implement the method that converts a GPIO into the form used by ACPI, so
> > that GPIOs can be added to ACPI tables.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > Changes in v1:
> > - Use acpi_get_path() to get device path
> >
> > drivers/gpio/intel_gpio.c | 34 ++
> > 1 file changed, 34 insertions(+)
> >
> > diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c
> > index b4d5be97da..6a3a8c4cfa 100644
> > --- a/drivers/gpio/intel_gpio.c
> > +++ b/drivers/gpio/intel_gpio.c
> > @@ -12,6 +12,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -19,6 +20,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> >
> > static int intel_gpio_direction_input(struct udevice *dev, uint offset)
> > @@ -128,6 +130,35 @@ static int intel_gpio_xlate(struct udevice *orig_dev,
> > struct gpio_desc *desc,
> > return 0;
> > }
> >
> > +#if CONFIG_IS_ENABLED(ACPIGEN)
> > +static int intel_gpio_get_acpi(const struct gpio_desc *desc,
> > + struct acpi_gpio *gpio)
> > +{
> > + struct udevice *pinctrl;
> > + int ret;
> > +
> > + if (!dm_gpio_is_valid(desc))
> > + return -ENOENT;
> > + pinctrl = dev_get_parent(desc->dev);
> > +
> > + memset(gpio, '\0', sizeof(*gpio));
> > +
> > + gpio->type = ACPI_GPIO_TYPE_IO;
> > + gpio->pull = ACPI_GPIO_PULL_DEFAULT;
> > + gpio->io_restrict = ACPI_GPIO_IO_RESTRICT_OUTPUT;
> > + gpio->polarity = ACPI_GPIO_ACTIVE_HIGH;
>
> Is there a way to figure out these properties from DT, instead of hardcoding?
The answer is similar to your previous comment. But also, each pinctrl
driver has its own settings and limitations. If we want to support
different config for the pinctrl we would likely add it to the DT
binding for the pinctrl driver. So far I haven't seen a need but it
might happen with a future arch.
[..]
Regards,
Simon
Re: [PATCH v1 32/43] pmc: Move common registers to the header file
Hi Bin, On Tue, 30 Jun 2020 at 02:27, Bin Meng wrote: > > Hi Simon, > > On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote: > > > > These registers need to be accesses from ACPI code, so move them to the > > header file. > > > > I don't think these are common offset to every platform. That's right, but they are common to the boards that use this uclass and driver - I am only moving them. If we end up supporting more SoCs we may need a way to specify this in the DT or through a driver, but for now, I'm just moving from the uclass to the header. Regards, Simon
Re: [PATCH v1 12/43] x86: Add bindings for NHLT
Hi Bin, On Mon, 29 Jun 2020 at 23:58, Bin Meng wrote: > > Hi Simon, > > On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote: > > > > Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table > > (NHLT). > > > > Signed-off-by: Simon Glass > > --- > > > > include/dt-bindings/sound/nhlt.h | 23 +++ > > 1 file changed, 23 insertions(+) > > create mode 100644 include/dt-bindings/sound/nhlt.h > > > > diff --git a/include/dt-bindings/sound/nhlt.h > > b/include/dt-bindings/sound/nhlt.h > > new file mode 100644 > > index 00..c33f874966 > > --- /dev/null > > +++ b/include/dt-bindings/sound/nhlt.h > > @@ -0,0 +1,23 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright 2019 Google LLC > > + */ > > + > > +#ifndef _DT_BINDINGS_SOUND_NHLT_H > > +#define _DT_BINDINGS_SOUND_NHLT_H > > + > > +#define NHLT_VID 0x8086 > > +#define NHLT_DID_DMIC 0xae20 > > +#define NHLT_DID_BT0xae30 > > +#define NHLT_DID_SSP 0xae34 > > These look like PCI vendor ID (0x8086 for Intel) and device IDs. If > they are device IDs, how could they be fixed? The value of the 8086 one is the same. But according to the spec these are virtual devices. I am not sure that the values have anything to do with PCI. The spec doesn't even mention PCI and the PCI ID database does not list the DID values. So I think we should leave these as is unless we get new information. Regards, SImon
Re: [PATCH v1 07/43] dm: acpi: Add support for the NHLT table
Hi Bin,
On Mon, 6 Jul 2020 at 18:22, Bin Meng wrote:
>
> Hi Simon,
>
> On Tue, Jul 7, 2020 at 3:22 AM Simon Glass wrote:
> >
> > Hi Bin,
> >
> > On Thu, 2 Jul 2020 at 22:33, Bin Meng wrote:
> > >
> > > Hi Simon,
> > >
> > > On Fri, Jul 3, 2020 at 11:50 AM Simon Glass wrote:
> > > >
> > > > Hi Bin,
> > > >
> > > > On Thu, 2 Jul 2020 at 18:54, Bin Meng wrote:
> > > > >
> > > > > Hi Simon,
> > > > >
> > > > > On Fri, Jul 3, 2020 at 8:46 AM Simon Glass wrote:
> > > > > >
> > > > > > Hi Bin,
> > > > > >
> > > > > > On Mon, 29 Jun 2020 at 20:49, Bin Meng wrote:
> > > > > > >
> > > > > > > Hi Simon,
> > > > > > >
> > > > > > > On Mon, Jun 15, 2020 at 11:57 AM Simon Glass
> > > > > > > wrote:
> > > > > > > >
> > > > > > > > The Intel Non-High-Definition-Audio Link Table (NHLT) table
> > > > > > > > describes the
> > > > > > > > audio codecs and connections in a system. Various devices can
> > > > > > > > contribute
> > > > > > > > information to produce the table.
> > > > > > > >
> > > > > > > > Add core support for this, based on a structure which is built
> > > > > > > > up through
> > > > > > > > calls to the driver.
> > > > > > > >
> > > > > > > > Signed-off-by: Simon Glass
> > > > > > > > ---
> > > > > > > >
> > > > > > > > drivers/core/acpi.c | 15 +++
> > > > > > > > include/dm/acpi.h | 26 ++
> > > > > > > > 2 files changed, 41 insertions(+)
> > > > > > > >
> > > > > > > > diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
> > > > > > > > index ea304a3067..a5053fec6f 100644
> > > > > > > > --- a/drivers/core/acpi.c
> > > > > > > > +++ b/drivers/core/acpi.c
> > > > > > > > @@ -31,6 +31,7 @@ enum method_t {
> > > > > > > > METHOD_WRITE_TABLES,
> > > > > > > > METHOD_FILL_SSDT,
> > > > > > > > METHOD_INJECT_DSDT,
> > > > > > > > + METHOD_SETUP_NHLT,
> > > > > > >
> > > > > > > Do we really need to promote this to be an ACPI core method? Can
> > > > > > > we
> > > > > > > reuse the SSDT/DSDT one?
> > > > > >
> > > > > > I don't think so. Those two are for a particular purpose. In fact
> > > > > > NHLT
> > > > > > is generated while doing SSDT I think. The idea is that drivers that
> > > > > > want to contribute to NHLT can do so. But we cannot use the SSDT
> > > > > > mechanism since each driver contributes only a part of the info, and
> > > > > > we need something else to bring it all together.
> > > > >
> > > > > Will there be only one device that sets up the NHLT info?
> > > >
> > > > WIth coral it is two devices. I'm not sure of the maximum, but I
> > > > suppose it depends on the audio codecs present.
> > >
> > > Could we make this method to be provided by the codec device, instead
> > > of a generic ACPI core method?
> >
> > The codec device does implement this. See the drivers where they
> > actually implement the NHLT method.
> >
> > This is definitely an ACPI-specific thing, so I think we need core
> > support for iterating through drivers that want to provide this info.
>
> My concern is that this is not generic enough to promote this to ACPI core.
>
> I wanted to have something like this:
>
> Create a codec uclass driver, and in the code uclass driver, create an
> op that is used to set up the NHLT infor if ACPI_GEN is on.
We already have UCLASS_SOUND so could add it to sound_ops. But that
seems weird to me since this is not an operation to play a sound. We
do this with GIPOs and IRQs but in that case the operation returns
some data. Here we are asking the driver to add some data to a table.
I'm just not sure it makes sense.
What do you think?
Regards,
SImon
PPC440EPx Evaluation Board Schematic
I am wondering if anyone has a copy of the PPC440EPx evaluation board (Sequoia) schematic that was made by AMCC. The information is no longer easily available as the amcc.com and apm.com sites are no longer running and the schematic is not archived on the wayback machine. I figured that U-Boot might be a place to ask for this schematic but if this is not an appropriate topic I apologize. I am currently tasked with testing a PPC440EPx-NUA667T for a customer. One part of the testing will require me to boot the processor up to confirm it functions. I cannot use an evaluation board to do this testing because each processor I am testing cannot be soldered onto a board. The testing is being done with a socket on a test fixture which is interfaced with a high speed digital testing system. Due to this setup I have to input individual test vectors to the processor which is much at a lower level then the type of code that I have found on places like U-Boot. I am having trouble writing instructions to the device once it comes out of reset so I wanted to see the evaluation board schematic to understand how the PPC440EPx was interfaced to its boot rom. I can successfully get the device to come out of Reset (de-assert ExtReset) and the EBC is putting out addresses to the PerAddr pins (27-31) as I have configured the bootstrap pins to use condition C from the PP440EPx User Manual (EBC boot with a 16 bit boot width). However I have not had any luck putting in instructions during this phase. I believe I am incorrectly putting instructions into the PerData pins as the device does not respond to any commands. If anyone can help I can provide screenshots of the waveforms I get from the device else the PPC440EPx evaluation board schematic might shed more light on how to properly communicate with the EBC. Thank you Nicholas I
RE: [PATCH v2 0/2] Add support for PWM SiFive
Any comments or update on this series? - Yash > -Original Message- > From: Yash Shah > Sent: 23 April 2020 16:58 > To: martyn.we...@collabora.co.uk; h...@denx.de; u-boot@lists.denx.de; > Sachin Ghadi > Cc: Yash Shah > Subject: [PATCH v2 0/2] Add support for PWM SiFive > > The patch series adds support for PWM controller in SiFive SoCs > > Changes in v2: > - Introduce a new patch to add the DT documentation > - Change commit message to include reference of Linux ver and commit > - Remove unnecessary function "pwm_sifive_set_invert" > - Use "dev_read_addr_ptr" instead of "dev_read_addr" to avoid cast on > each readl/writel call > > Yash Shah (2): > pwm: Add DT documentation for SiFive PWM Controller > pwm: Add PWM driver for SiFive SoC > > doc/device-tree-bindings/pwm/pwm-sifive.txt | 31 + > drivers/pwm/Kconfig | 6 + > drivers/pwm/Makefile| 1 + > drivers/pwm/pwm-sifive.c| 172 > > 4 files changed, 210 insertions(+) > create mode 100644 doc/device-tree-bindings/pwm/pwm-sifive.txt > create mode 100644 drivers/pwm/pwm-sifive.c > > -- > 2.7.4
Re: [PATCH 7/7] arm: juno: Enable SATA controller
On Thu, Jun 11, 2020 at 12:03:21PM +0100, Andre Przywara wrote: > The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe > SATA controller soldered on the board, providing two SATA ports. > > Enable the driver and the sata command in the defconfig, to be able to > load images from SATA disks. > > Tested by loading kernels and Grub/EFI from an SSD and successfully > booting a Linux system (with and without using UEFI). > > Signed-off-by: Andre Przywara > Reviewed-by: Linus Walleij Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 6/7] arm: juno: Enable PCI
On Thu, Jun 11, 2020 at 12:03:20PM +0100, Andre Przywara wrote: > The ARM Juno boards in their -r1 and -r2 variants sport a PCIe > controller, which we configure already in board specific code to be ECAM > compliant. Hence we can just enable the generic ECAM driver to let > U-Boot use PCIe devices. > > Add the respective options to the Juno defconfig to enable the PCI > framework and the generic ECAM driver, and initialise the driver upon > loading U-Boot. > > Make some functions in the Juno PCIe init code static on the way. > > Signed-off-by: Andre Przywara > Reviewed-by: Linus Walleij Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 5/7] sata_sil: Enable DM_PCI operation
On Thu, Jun 11, 2020 at 12:03:19PM +0100, Andre Przywara wrote: > Even though the sata_sil driver was converted over to the driver model, > it still assumed that the PCI controller is using the legacy interface. > > Allow the "devno" member to be a struct udevice pointer and use > DM_PCI_COMPAT to covert the rest of the interface. > > Signed-off-by: Andre Przywara > Reviewed-by: Linus Walleij Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/7] net: smc911x: Properly handle EEPROM MAC address
On Thu, Jun 11, 2020 at 12:03:17PM +0100, Andre Przywara wrote: > When compiled as a DM_ETH driver, the scm911x driver was reading the MAC > address from the optional EEPROM storage, but failed to copy this to the > platdata struct. Since it was also missing a definition of the > read_rom_hwaddr() function, the generic Ethernet code was dismissing > this MAC address, falling back to a random address or denying to start > at all. > > Add an implementation of .read_rom_hwaddr, and refactor the function > reading the ROM address to be called by all interested parties. > > This fixes MAC address issues when using the driver in DM_ETH "mode". > > Signed-off-by: Andre Przywara > Reviewed-By: Ramon Fried > Reviewed-by: Linus Walleij Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address
On Thu, Jun 11, 2020 at 12:03:16PM +0100, Andre Przywara wrote:
> Similar to patch 821fec0ceb3e ("net: remove scary warning about EEPROM
> provided MAC address") this removes the somewhat awkward "warning" on
> boards using DM_ETH:
> In many parts of the computing world having a unique MAC address
> sitting in some on-NIC storage is considered the normal case.
>
> If there is a properly provided MAC address (either from ROM or from DT),
> remove the warning to not scare the user unnecessarily.
>
> Signed-off-by: Andre Przywara
> Reviewed-By: Ramon Fried
> Reviewed-by: Linus Walleij
Applied to u-boot/master, thanks!
--
Tom
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Re: [PATCH 4/7] arm: juno: Enable DM_ETH
On Thu, Jun 11, 2020 at 12:03:18PM +0100, Andre Przywara wrote: > The smc911X driver is now DM enabled, so we can switch the Juno board > over to use DM_ETH for the on-board Fast Ethernet device. > Works out of the box by using the DT. > > Signed-off-by: Andre Przywara > Reviewed-by: Linus Walleij Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 4/4] arm: use correct argument size of special registers
On Wed, May 27, 2020 at 08:04:24PM +0200, Heinrich Schuchardt wrote:
> Compiling with clang on ARMv8 shows errors like:
>
> ./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w"
> asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc");
> ^~
> %w0
>
> These errors are due to using an incorrect size for the variables used
> for writing to and reading from special registers which have 64 bits on
> ARMv8.
>
> Mask off reserved bits when reading the exception level.
>
> Signed-off-by: Heinrich Schuchardt
Applied to u-boot/master, thanks!
--
Tom
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Re: [PATCH 3/4] arm: remove outdated comment concerning -ffixed-x18
On Wed, May 27, 2020 at 08:04:23PM +0200, Heinrich Schuchardt wrote: > Clang 9 supports -ffixed-x18. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/4] trace: clang compatible handling of gd register
On Wed, May 27, 2020 at 08:04:22PM +0200, Heinrich Schuchardt wrote: > On ARM systems gd is stored in register r9 or x18. When compiling with > clang gd is defined as a macro calling function gd_ptr(). So we can not > make assignments to gd. > > Use function set_gd() for setting the register on ARM. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/7] arm: vexpress64: Fix counter frequency
On Thu, Jun 11, 2020 at 12:03:15PM +0100, Andre Przywara wrote: > The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz > crystal oscillator, so the frequency is not 25165824 MHz, as the current > code suggests. > > Signed-off-by: Andre Przywara > Reviewed-by: Linus Walleij Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
