test: py: CVE-2020-29651 Regular expression deinal of service in py
Hi Tom FYI, there is a CVE from the following file in U-Boot, CVE-2020-29651 Regular expression deinal of service in py. test/py/requirements.txt Regards Ley Foon
Re: [PATCH v2 11/13] board: synquacer: Add DeveloperBox 96boards EE support
Hi, I found that I need to enable CONFIG_CMD_FS_GENERIC for enabling distroboot support. I'll fix it in the next version. Thank you, 2021年4月17日(土) 8:39 Masami Hiramatsu : > > Add the DeveloperBox 96boards EE support. This board is also > known as Socionext SynQuacer E-Series. It contians one "SC2A11" > SoC, which has 24-cores of arm Cortex-A53, and 4 DDR3 slots, > 3 PCIe slots (1 4x port and 2 1x ports which are expanded via > PCIe bridge chip), 2 USB 3.0 ports and 2 USB 2.0 ports, 2 SATA > ports and 1 GbE, 64MB NOR flash and 8GB eMMC on standard > MicroATX Form Factor. > > For more information, see this page; > https://www.96boards.org/product/developerbox/ > > Signed-off-by: Masami Hiramatsu > --- > Changes in v2: > - Do not include arch/gpio.h and remove arch-sc2a11/gpio.h. > - Remove non-UEFI boot commands. > - Use Distro boot. > - Remove NOR-connected SPI node by path instead of alias. > - Rename configs/SynQuacer_defconfig to > configs/synquacer_developerbox_defconfig. > - Rename include/configs/SynQuacer.h to include/configs/synquacer.h. > - Move README under doc/board/socionext/ and make it .rst text. > --- > arch/arm/Kconfig| 15 +++ > board/socionext/developerbox/Kconfig| 36 +++ > board/socionext/developerbox/MAINTAINERS| 13 ++ > board/socionext/developerbox/Makefile |9 ++ > board/socionext/developerbox/developerbox.c | 145 > +++ > configs/synquacer_developerbox_defconfig| 93 + > doc/board/index.rst |1 > doc/board/socionext/developerbox.rst| 87 > doc/board/socionext/index.rst |9 ++ > include/configs/synquacer.h | 106 > 10 files changed, 514 insertions(+) > create mode 100644 board/socionext/developerbox/Kconfig > create mode 100644 board/socionext/developerbox/MAINTAINERS > create mode 100644 board/socionext/developerbox/Makefile > create mode 100644 board/socionext/developerbox/developerbox.c > create mode 100644 configs/synquacer_developerbox_defconfig > create mode 100644 doc/board/socionext/developerbox.rst > create mode 100644 doc/board/socionext/index.rst > create mode 100644 include/configs/synquacer.h > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index fba28323cd..1caea3ac58 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -1675,6 +1675,20 @@ config ARCH_UNIPHIER > Support for UniPhier SoC family developed by Socionext Inc. > (formerly, System LSI Business Division of Panasonic Corporation) > > +config ARCH_SYNQUACER > + bool "Socionext SynQuacer SoCs" > + select ARM64 > + select ONLY_GENERIC_GPIO > + select DM > + select GIC_V3 > + select PSCI_RESET > + select SYSRESET > + select SYSRESET_PSCI > + select OF_CONTROL > + help > + Support for SynQuacer SoC family developed by Socionext Inc. > + This SoC is used on 96boards EE DeveloperBox. > + > config ARCH_STM32 > bool "Support STMicroelectronics STM32 MCU with cortex M" > select CPU_V7M > @@ -2022,6 +2036,7 @@ source "board/hisilicon/poplar/Kconfig" > source "board/isee/igep003x/Kconfig" > source "board/kontron/sl28/Kconfig" > source "board/myir/mys_6ulx/Kconfig" > +source "board/socionext/developerbox/Kconfig" > source "board/spear/spear300/Kconfig" > source "board/spear/spear310/Kconfig" > source "board/spear/spear320/Kconfig" > diff --git a/board/socionext/developerbox/Kconfig > b/board/socionext/developerbox/Kconfig > new file mode 100644 > index 00..706b8dc0f1 > --- /dev/null > +++ b/board/socionext/developerbox/Kconfig > @@ -0,0 +1,36 @@ > +if ARCH_SYNQUACER > + > +choice > + prompt "SC2A11 Cortex-A53 MPCore 24cores" > + optional > + > +config TARGET_DEVELOPERBOX > + bool "Socionext DeveloperBox" > + select PCI > + select DM_PCI > + select PCIE_ECAM_SYNQUACER > + select SYS_DISABLE_DCACHE_OPS > + select OF_BOARD_SETUP > + help > +Choose this option if you build the U-Boot for the DeveloperBox > +96boards Enterprise Edition. > +This board will booted from SCP firmware and it enables SMMU, thus > +the dcache is updated automatically when DMA operation is executed. > +endchoice > + > +config SYS_SOC > + default "sc2a11" > + > +if TARGET_DEVELOPERBOX > + > +config SYS_BOARD > + default "developerbox" > + > +config SYS_VENDOR > + default "socionext" > + > +config SYS_CONFIG_NAME > + default "synquacer" > + > +endif > +endif > diff --git a/board/socionext/developerbox/MAINTAINERS > b/board/socionext/developerbox/MAINTAINERS > new file mode 100644 > index 00..d10ad3b8f7 > --- /dev/null > +++ b/board/socionext/developerbox/MAINTAINERS > @@ -0,0 +1,13 @@ > +DEVELOPER BOX > +M: Masami Hiramatsu > +M: Jassi Brar
Re: [PATCH v2 05/13] mtd: spi-nor-ids: add support for Macronix mx25u51245g and mx66u1g45g flash
Hello Pratyush,
2021年4月19日(月) 17:41 Pratyush Yadav :
>
> On 17/04/21 08:38AM, Masami Hiramatsu wrote:
> > From: Jassi Brar
> >
> > Signed-off-by: Jassi Brar
> > ---
> > drivers/mtd/spi/spi-nor-ids.c |2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> > index 2b57797954..30a18b4140 100644
> > --- a/drivers/mtd/spi/spi-nor-ids.c
> > +++ b/drivers/mtd/spi/spi-nor-ids.c
> > @@ -160,9 +160,11 @@ const struct flash_info spi_nor_ids[] = {
> > { INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
> > { INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ
> > | SPI_NOR_QUAD_READ) },
> > { INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K |
> > SPI_NOR_4B_OPCODES) },
> > + { INFO("mx25u51245g", 0xc2253a, 0, 64 * 1024, 1024, SECT_4K |
> > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>
> The flash ID is the same as that of mx66u51235f. Because the ID matching
> function searches through this array in linear fashion, mx66u51235f can
> never be detected. This is a regression.
OK
>
> I am seeing a lot of ID collisions on Macronix flashes recently [0]. Not
> sure how to handle them though. At least in this case both flashes use
> the same set of flags so it should just change the name of the flash
> detected.
Would you mean rename the entry as below?
{ INFO("mx66u51235f/mx25u51245g",...
Thank you,
>
> [0]
> https://lore.kernel.org/linux-mtd/caeymn7zep9f1sue6umrdwkr8bvt5hdri-4f3+g-gp9anugg...@mail.gmail.com/T/#u
>
> > { INFO("mx25l25655e", 0xc22619, 0, 64 * 1024, 512, 0) },
> > { INFO("mx66l51235l", 0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ
> > | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> > { INFO("mx66u51235f", 0xc2253a, 0, 64 * 1024, 1024, SECT_4K |
> > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> > + { INFO("mx66u1g45g", 0xc2253b, 0, 64 * 1024, 2048, SECT_4K |
> > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> > { INFO("mx66u2g45g", 0xc2253c, 0, 64 * 1024, 4096, SECT_4K |
> > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> > { INFO("mx66l1g45g", 0xc2201b, 0, 64 * 1024, 2048, SECT_4K |
> > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > { INFO("mx25l1633e", 0xc22415, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ
> > | SPI_NOR_4B_OPCODES | SECT_4K) },
> >
>
> --
> Regards,
> Pratyush Yadav
> Texas Instruments Inc.
--
Masami Hiramatsu
Re: [PATCH v2] Makefile: fix generating environment file
On 20/04/2021 23.10, Oleksandr Suvorov wrote: > Hi Rasmus, > > Thanks for your feedback! > Yes, I noted that there were no possible situations with the trailing > code != 0x00, but simply removing the additional trailing 0x00 > gives us an empty array default_environment[] for the empty defaultenv file. > I need to test whether this case is handled in u-boot properly and > then prepare the next patch version :P No, I'm not suggesting removing the trailing nul byte, it very much has to be there - the binary format of the environment is a sequence of nul-terminated C strings of the key=value form, concatenated back-to-back, terminated by an empty string. What I'm suggesting is to take the input file === foo=bar # Set our IP address ip=1.2.3.4 === do the comment- and empty-line stripping (the two first greps), and then after that add an extra empty line === foo=bar ip=1.2.3.4 === and then feed that to the 'replace \n by nul bytes' | 'delete backslash+nul+whitespace' | xxd pipe. That way there's always that trailing nul on the input to xxd, i.e. in the example above, we would feed foo=bar\0ip-1.2.3.4\0\0 into xxd, while with an initially empty file xxd would just receive that single nul byte. It's just that I think terminating the sequence of key=value lines by an empty line more exactly matches the binary format. Rasmus
Re: [PATCH v2] Makefile: fix generating environment file
Hi Rasmus,
Thanks for your feedback!
Yes, I noted that there were no possible situations with the trailing
code != 0x00, but simply removing the additional trailing 0x00
gives us an empty array default_environment[] for the empty defaultenv file.
I need to test whether this case is handled in u-boot properly and
then prepare the next patch version :P
On Tue, Apr 20, 2021 at 10:33 PM Rasmus Villemoes
wrote:
>
> On 20/04/2021 16.43, Oleksandr Suvorov wrote:
> > If the CONFIG_USE_DEFAULT_ENV_FILE=y and CONFIG_DEFAULT_ENV_FILE
> > points to the empty environment file, the auto-generated file has
> > the wrong syntax so it leads to the compilation failure:
> >
>
> Glad someone is using CONFIG_USE_DEFAULT_ENV_FILE :) And thanks for
> reporting this.
>
> >
> > Fix this issue conditionally adding the delimiter ", ".
>
> Hm, yeah, that should work. But I wonder if it would make more sense to
> ensure tr always gets a final newline (which then gets translated to a
> nul byte, which in turn gives the trailing 0x00). Something like (untested)
>
> define filechk_defaultenv.h
> ( { grep -v '^#' | grep -v '^$$' ; echo '' ; } | \
> tr '\n' '\0' | \
> sed -e 's/\\\x0\s*//g' | \
> xxd -i ; )
> endef
>
> Rasmus
--
Best regards
Oleksandr Suvorov
Toradex AG
Ebenaustrasse 10 | 6048 Horw | Switzerland | T: +41 41 500 48 00
Re: [PATCH v2] Makefile: fix generating environment file
On 20/04/2021 16.43, Oleksandr Suvorov wrote:
> If the CONFIG_USE_DEFAULT_ENV_FILE=y and CONFIG_DEFAULT_ENV_FILE
> points to the empty environment file, the auto-generated file has
> the wrong syntax so it leads to the compilation failure:
>
Glad someone is using CONFIG_USE_DEFAULT_ENV_FILE :) And thanks for
reporting this.
>
> Fix this issue conditionally adding the delimiter ", ".
Hm, yeah, that should work. But I wonder if it would make more sense to
ensure tr always gets a final newline (which then gets translated to a
nul byte, which in turn gives the trailing 0x00). Something like (untested)
define filechk_defaultenv.h
( { grep -v '^#' | grep -v '^$$' ; echo '' ; } | \
tr '\n' '\0' | \
sed -e 's/\\\x0\s*//g' | \
xxd -i ; )
endef
Rasmus
[PATCH] fit: Fix verification of images with external data
The "-E" option to mkimage generates a FIT with external data using the
data-size and data-offset properties which must both be ignored when
verifying a signature.
Add "data-offset" to the list of excluded properties for signature
verification; since the line is now too long, re-format the list to
one-per-line and make it static since the data is constant.
Signed-off-by: John Keeping
---
common/image-fit-sig.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/common/image-fit-sig.c b/common/image-fit-sig.c
index 55ddf1879e..b979cd2a4b 100644
--- a/common/image-fit-sig.c
+++ b/common/image-fit-sig.c
@@ -245,7 +245,13 @@ static int fit_config_check_sig(const void *fit, int
noffset,
int required_keynode, int conf_noffset,
char **err_msgp)
{
- char * const exc_prop[] = {"data", "data-size", "data-position"};
+ static char * const exc_prop[] = {
+ "data",
+ "data-size",
+ "data-position",
+ "data-offset"
+ };
+
const char *prop, *end, *name;
struct image_sign_info info;
const uint32_t *strings;
--
2.31.1
[PATCH] test: Alphabetize dm Makefile
Recently, tests have been added primarily to the end of the dm Makefile. This results in merge conflicts when two people add new tests at the same time. To reduce these conflicts, alphabetize the makefile. Signed-off-by: Sean Anderson --- test/dm/Makefile | 64 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/test/dm/Makefile b/test/dm/Makefile index 100e7701d2..52a8c932b8 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -21,26 +21,39 @@ ifneq ($(CONFIG_SANDBOX),) obj-$(CONFIG_ACPIGEN) += acpi.o obj-$(CONFIG_ACPIGEN) += acpigen.o obj-$(CONFIG_ACPIGEN) += acpi_dp.o +obj-$(CONFIG_ADC) += adc.o obj-$(CONFIG_SOUND) += audio.o +obj-$(CONFIG_AXI) += axi.o obj-$(CONFIG_BLK) += blk.o obj-$(CONFIG_BUTTON) += button.o obj-$(CONFIG_DM_BOOTCOUNT) += bootcount.o obj-$(CONFIG_CLK) += clk.o clk_ccf.o +obj-$(CONFIG_CPU) += cpu.o obj-$(CONFIG_CROS_EC) += cros_ec.o obj-$(CONFIG_DEVRES) += devres.o +obj-$(CONFIG_DMA) += dma.o obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi_host.o obj-$(CONFIG_DM_DSA) += dsa.o obj-$(CONFIG_DM_ETH) += eth.o +ifneq ($(CONFIG_EFI_PARTITION),) +obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fastboot.o +endif obj-$(CONFIG_FIRMWARE) += firmware.o obj-$(CONFIG_DM_GPIO) += gpio.o obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock.o obj-$(CONFIG_DM_I2C) += i2c.o obj-$(CONFIG_SOUND) += i2s.o obj-y += irq.o +obj-$(CONFIG_CLK_K210_SET_RATE) += k210_pll.o obj-$(CONFIG_LED) += led.o obj-$(CONFIG_DM_MAILBOX) += mailbox.o +obj-$(CONFIG_DM_MDIO) += mdio.o +obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o +obj-$(CONFIG_MISC) += misc.o obj-$(CONFIG_DM_MMC) += mmc.o obj-$(CONFIG_CMD_MUX) += mux-cmd.o +obj-$(CONFIG_MULTIPLEXER) += mux-emul.o +obj-$(CONFIG_MUX_MMIO) += mux-mmio.o obj-y += fdtdec.o obj-$(CONFIG_UT_DM) += nop.o obj-y += ofnode.o @@ -53,53 +66,40 @@ obj-$(CONFIG_P2SB) += p2sb.o obj-$(CONFIG_PCI_ENDPOINT) += pci_ep.o obj-$(CONFIG_PCH) += pch.o obj-$(CONFIG_PHY) += phy.o +ifneq ($(CONFIG_PINMUX),) +obj-$(CONFIG_PINCONF) += pinmux.o +endif obj-$(CONFIG_POWER_DOMAIN) += power-domain.o obj-$(CONFIG_ACPI_PMC) += pmc.o +obj-$(CONFIG_DM_PMIC) += pmic.o obj-$(CONFIG_DM_PWM) += pwm.o +obj-$(CONFIG_QFW) += qfw.o obj-$(CONFIG_RAM) += ram.o obj-y += regmap.o obj-$(CONFIG_REMOTEPROC) += remoteproc.o obj-$(CONFIG_DM_RESET) += reset.o obj-$(CONFIG_SYSRESET) += sysreset.o +obj-$(CONFIG_DM_REGULATOR) += regulator.o +obj-$(CONFIG_DM_RNG) += rng.o obj-$(CONFIG_DM_RTC) += rtc.o +obj-$(CONFIG_SCMI_FIRMWARE) += scmi.o +obj-$(CONFIG_DM_SERIAL) += serial.o obj-$(CONFIG_DM_SPI_FLASH) += sf.o +obj-$(CONFIG_SIMPLE_BUS) += simple-bus.o +obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o obj-$(CONFIG_SMEM) += smem.o -obj-$(CONFIG_DM_SPI) += spi.o -obj-y += syscon.o -obj-$(CONFIG_MUX_MMIO) += mux-mmio.o -obj-$(CONFIG_MULTIPLEXER) += mux-emul.o -obj-$(CONFIG_DM_USB) += usb.o -obj-$(CONFIG_DM_PMIC) += pmic.o -obj-$(CONFIG_DM_REGULATOR) += regulator.o -obj-$(CONFIG_TIMER) += timer.o -obj-$(CONFIG_DM_VIDEO) += video.o -obj-$(CONFIG_ADC) += adc.o -obj-$(CONFIG_SPMI) += spmi.o -obj-$(CONFIG_WDT) += wdt.o -obj-$(CONFIG_AXI) += axi.o -obj-$(CONFIG_MISC) += misc.o -obj-$(CONFIG_DM_SERIAL) += serial.o -obj-$(CONFIG_CPU) += cpu.o obj-$(CONFIG_SOC_DEVICE) += soc.o obj-$(CONFIG_SOUND) += sound.o +obj-$(CONFIG_DM_SPI) += spi.o +obj-$(CONFIG_SPMI) += spmi.o +obj-y += syscon.o +obj-$(CONFIG_RESET_SYSCON) += syscon-reset.o obj-$(CONFIG_SYSINFO) += sysinfo.o obj-$(CONFIG_TEE) += tee.o +obj-$(CONFIG_TIMER) += timer.o +obj-$(CONFIG_DM_USB) += usb.o +obj-$(CONFIG_DM_VIDEO) += video.o obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o -obj-$(CONFIG_DMA) += dma.o -obj-$(CONFIG_DM_MDIO) += mdio.o -obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o -obj-$(CONFIG_DM_RNG) += rng.o -obj-$(CONFIG_CLK_K210_SET_RATE) += k210_pll.o -obj-$(CONFIG_SIMPLE_BUS) += simple-bus.o -obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o -obj-$(CONFIG_RESET_SYSCON) += syscon-reset.o -obj-$(CONFIG_SCMI_FIRMWARE) += scmi.o -ifneq ($(CONFIG_PINMUX),) -obj-$(CONFIG_PINCONF) += pinmux.o -endif -ifneq ($(CONFIG_EFI_PARTITION),) -obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fastboot.o -endif -obj-$(CONFIG_QFW) += qfw.o +obj-$(CONFIG_WDT) += wdt.o endif endif # !SPL -- 2.25.1
[PATCH v4 4/5] sysinfo: Add gpio-sysinfo driver
This uses the newly-added dm_gpio_get_values_as_int_base3 function to
implement a sysinfo device. The revision map is stored in the device tree.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v3)
Changes in v3:
- Fix assuming nonzero return from dm_gpio_get_values_as_int_base3 is an
error.
- Use SYSINFO_ID_BOARD_MODEL instead of SYSINFO_ID_REVISION
Changes in v2:
- Document sysinfo_gpio_priv
- Fix unbalanced brace in sysinfo_gpio_get_int
- Refactor driver to take advantage of the uclass detect ordering
guarantee.
- Reorder includes
.../sysinfo/gpio-sysinfo.txt | 37 +
drivers/sysinfo/Kconfig | 8 +
drivers/sysinfo/Makefile | 1 +
drivers/sysinfo/gpio.c| 141 ++
4 files changed, 187 insertions(+)
create mode 100644 doc/device-tree-bindings/sysinfo/gpio-sysinfo.txt
create mode 100644 drivers/sysinfo/gpio.c
diff --git a/doc/device-tree-bindings/sysinfo/gpio-sysinfo.txt
b/doc/device-tree-bindings/sysinfo/gpio-sysinfo.txt
new file mode 100644
index 00..b5739d94e9
--- /dev/null
+++ b/doc/device-tree-bindings/sysinfo/gpio-sysinfo.txt
@@ -0,0 +1,37 @@
+GPIO-based Sysinfo device
+
+This binding describes several GPIOs which specify a board revision. Each GPIO
+forms a digit in a ternary revision number. This revision is then mapped to a
+name using the revisions and names properties.
+
+Each GPIO may be floating, pulled-up, or pulled-down, mapping to digits 2, 1,
+and 0, respectively. The first GPIO forms the least-significant digit of the
+revision. For example, consider the property
+
+ gpios = < 0>, < 1>, < 2>;
+
+If GPIO 0 is pulled-up, GPIO 1 is pulled-down, and GPIO 2 is floating, then the
+revision would be
+
+ 0t201 = 2*9 + 0*3 + 1*3 = 19
+
+If instead GPIO 0 is floating, GPIO 1 is pulled-up, and GPIO 2 is pulled-down,
+then the revision would be
+
+ 0t012 = 0*9 + 1*3 + 2*1 = 5
+
+Required properties:
+- compatible: should be "gpio-sysinfo".
+- gpios: should be a list of gpios forming the revision number,
+ least-significant-digit first
+- revisions: a list of known revisions; any revisions not present will have the
+ name "unknown"
+- names: the name of each revision in revisions
+
+Example:
+sysinfo {
+ compatible = "gpio-sysinfo";
+ gpios = <_a 15>, <_a 16>, <_a 17>;
+ revisions = <19>, <5>;
+ names = "rev_a", "foo";
+};
diff --git a/drivers/sysinfo/Kconfig b/drivers/sysinfo/Kconfig
index 85c1e81e41..381dcd8844 100644
--- a/drivers/sysinfo/Kconfig
+++ b/drivers/sysinfo/Kconfig
@@ -30,4 +30,12 @@ config SYSINFO_SMBIOS
one which provides a way to specify this SMBIOS information in the
devicetree, without needing any board-specific functionality.
+config SYSINFO_GPIO
+ bool "Enable gpio sysinfo driver"
+ help
+ Support querying gpios to determine board revision. This uses gpios to
+ form a ternary number (when they are pulled-up, -down, or floating).
+ This ternary number is then mapped to a board revision name using
+ device tree properties.
+
endif
diff --git a/drivers/sysinfo/Makefile b/drivers/sysinfo/Makefile
index 6d04fcba1d..d9f708b7ea 100644
--- a/drivers/sysinfo/Makefile
+++ b/drivers/sysinfo/Makefile
@@ -4,5 +4,6 @@
# Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
obj-y += sysinfo-uclass.o
obj-$(CONFIG_SYSINFO_GAZERBEAM) += gazerbeam.o
+obj-$(CONFIG_SYSINFO_GPIO) += gpio.o
obj-$(CONFIG_SYSINFO_SANDBOX) += sandbox.o
obj-$(CONFIG_SYSINFO_SMBIOS) += smbios.o
diff --git a/drivers/sysinfo/gpio.c b/drivers/sysinfo/gpio.c
new file mode 100644
index 00..1d7f050998
--- /dev/null
+++ b/drivers/sysinfo/gpio.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 Sean Anderson
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * struct sysinfo_gpio_priv - GPIO sysinfo private data
+ * @gpios: List of GPIOs used to detect the revision
+ * @gpio_num: The number of GPIOs in @gpios
+ * @revision: The revision as detected from the GPIOs.
+ */
+struct sysinfo_gpio_priv {
+ struct gpio_desc *gpios;
+ int gpio_num, revision;
+};
+
+static int sysinfo_gpio_detect(struct udevice *dev)
+{
+ int ret;
+ struct sysinfo_gpio_priv *priv = dev_get_priv(dev);
+
+ ret = dm_gpio_get_values_as_int_base3(priv->gpios, priv->gpio_num);
+ if (ret < 0)
+ return ret;
+
+ priv->revision = ret;
+ return 0;
+}
+
+static int sysinfo_gpio_get_int(struct udevice *dev, int id, int *val)
+{
+ struct sysinfo_gpio_priv *priv = dev_get_priv(dev);
+
+ switch (id) {
+ case SYSINFO_ID_BOARD_MODEL:
+ *val = priv->revision;
+ return 0;
+ default:
+ return -EINVAL;
+ };
+}
+
+static int sysinfo_gpio_get_str(struct udevice *dev, int id, size_t size, char
*val)
+{
+
[PATCH v4 5/5] test: Add gpio-sysinfo test
This adds a test for the gpio-sysinfo driver.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
Changes in v4:
- Enable sysinfo_gpio test for sandbox
Changes in v3:
- Use SYSINFO_ID_BOARD_MODEL instead of SYSINFO_ID_REVISION
Changes in v2:
- Reorder includes
arch/sandbox/dts/test.dts | 7 +++
configs/sandbox64_defconfig| 1 +
configs/sandbox_defconfig | 1 +
configs/sandbox_flattree_defconfig | 1 +
configs/sandbox_noinst_defconfig | 1 +
configs/sandbox_spl_defconfig | 1 +
test/dm/Makefile | 1 +
test/dm/sysinfo-gpio.c | 69 ++
8 files changed, 82 insertions(+)
create mode 100644 test/dm/sysinfo-gpio.c
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 48240aa26f..78a2fcbc56 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1526,6 +1526,13 @@
compatible = "sandbox,sysinfo-sandbox";
};
+ sysinfo-gpio {
+ compatible = "gpio-sysinfo";
+ gpios = <_a 15>, <_a 16>, <_a 17>;
+ revisions = <19>, <5>;
+ names = "rev_a", "foo";
+ };
+
some_regmapped-bus {
#address-cells = <0x1>;
#size-cells = <0x1>;
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 8a7e519847..80c5be2067 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -204,6 +204,7 @@ CONFIG_SPMI=y
CONFIG_SPMI_SANDBOX=y
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
+CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index d3de9c3155..48dfd194e2 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -247,6 +247,7 @@ CONFIG_SPMI=y
CONFIG_SPMI_SANDBOX=y
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
+CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
diff --git a/configs/sandbox_flattree_defconfig
b/configs/sandbox_flattree_defconfig
index 97ac46d21f..853c9440ea 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -178,6 +178,7 @@ CONFIG_SPMI=y
CONFIG_SPMI_SANDBOX=y
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
+CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index 01905900cb..e47e351e56 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -198,6 +198,7 @@ CONFIG_SPMI=y
CONFIG_SPMI_SANDBOX=y
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
+CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_TIMER=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 0fac3adba7..d463ee421c 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -200,6 +200,7 @@ CONFIG_SPMI=y
CONFIG_SPMI_SANDBOX=y
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
+CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_TIMER=y
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 100e7701d2..33a6fa9620 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -101,5 +101,6 @@ ifneq ($(CONFIG_EFI_PARTITION),)
obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fastboot.o
endif
obj-$(CONFIG_QFW) += qfw.o
+obj-$(CONFIG_SYSINFO_GPIO) += sysinfo-gpio.o
endif
endif # !SPL
diff --git a/test/dm/sysinfo-gpio.c b/test/dm/sysinfo-gpio.c
new file mode 100644
index 00..2e494b3f34
--- /dev/null
+++ b/test/dm/sysinfo-gpio.c
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 Sean Anderson
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int dm_test_sysinfo_gpio(struct unit_test_state *uts)
+{
+ char buf[64];
+ int val;
+ struct udevice *sysinfo, *gpio;
+
+ ut_assertok(uclass_get_device_by_name(UCLASS_SYSINFO, "sysinfo-gpio",
+ ));
+ ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios",
));
+
+ /*
+* Set up pins: pull-up (1), pull-down (0) and floating (2). This should
+* result in digits 2 0 1, i.e. 2 * 9 + 1 * 3 = 19
+*/
+ sandbox_gpio_set_flags(gpio, 15, GPIOD_EXT_PULL_UP);
+ sandbox_gpio_set_flags(gpio, 16, GPIOD_EXT_PULL_DOWN);
+ sandbox_gpio_set_flags(gpio, 17, 0);
+ ut_assertok(sysinfo_detect(sysinfo));
+ ut_assertok(sysinfo_get_int(sysinfo, SYSINFO_ID_BOARD_MODEL, ));
+ ut_asserteq(19, val);
+ ut_assertok(sysinfo_get_str(sysinfo, SYSINFO_ID_BOARD_MODEL,
sizeof(buf),
+ buf));
+ ut_asserteq_str("rev_a", buf);
+
+ /*
+* Set up pins: floating (2), pull-up (1) and pull-down (0). This should
+* result in digits 0 1 2, i.e. 1 * 3 + 2 = 5
+*/
+
[PATCH v4 3/5] sysinfo: Require that sysinfo_detect be called before other methods
This has the uclass enforce calling detect() before other methods. This
allows drivers to cache information in detect() and perform (cheaper)
retrieval in the other accessors. This also modifies the only instance
where this sequencing was not followed.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
Changes in v4:
- Fix test failure caused by uninitialized variable
Changes in v3:
- Move detected bool into sysinfo_priv struct
Changes in v2:
- Enforce sysinfo detect ordering in uclass. Users must still call
sysinfo_detect beforehand.
- Modify sysinfo test to check for detect() ordering.
common/spl/spl_fit.c | 4
drivers/sysinfo/sysinfo-uclass.c | 29 -
include/sysinfo.h| 26 +-
test/dm/sysinfo.c| 25 +++--
4 files changed, 64 insertions(+), 20 deletions(-)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 4288f571fc..caddf51196 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -110,6 +110,10 @@ static int spl_fit_get_image_name(const struct
spl_fit_info *ctx,
* no string in the property for this index. Check if the
* sysinfo-level code can supply one.
*/
+ rc = sysinfo_detect(sysinfo);
+ if (rc)
+ return rc;
+
rc = sysinfo_get_fit_loadable(sysinfo, index - i - 1, type,
);
if (rc && rc != -ENOENT)
diff --git a/drivers/sysinfo/sysinfo-uclass.c b/drivers/sysinfo/sysinfo-uclass.c
index 6df58fe160..4a660dfd15 100644
--- a/drivers/sysinfo/sysinfo-uclass.c
+++ b/drivers/sysinfo/sysinfo-uclass.c
@@ -8,6 +8,10 @@
#include
#include
+struct sysinfo_priv {
+ bool detected;
+};
+
int sysinfo_get(struct udevice **devp)
{
return uclass_first_device_err(UCLASS_SYSINFO, devp);
@@ -15,19 +19,29 @@ int sysinfo_get(struct udevice **devp)
int sysinfo_detect(struct udevice *dev)
{
+ int ret;
+ struct sysinfo_priv *priv = dev_get_uclass_priv(dev);
struct sysinfo_ops *ops = sysinfo_get_ops(dev);
if (!ops->detect)
return -ENOSYS;
- return ops->detect(dev);
+ ret = ops->detect(dev);
+ if (!ret)
+ priv->detected = true;
+
+ return ret;
}
int sysinfo_get_fit_loadable(struct udevice *dev, int index, const char *type,
const char **strp)
{
+ struct sysinfo_priv *priv = dev_get_uclass_priv(dev);
struct sysinfo_ops *ops = sysinfo_get_ops(dev);
+ if (!priv->detected)
+ return -EPERM;
+
if (!ops->get_fit_loadable)
return -ENOSYS;
@@ -36,8 +50,12 @@ int sysinfo_get_fit_loadable(struct udevice *dev, int index,
const char *type,
int sysinfo_get_bool(struct udevice *dev, int id, bool *val)
{
+ struct sysinfo_priv *priv = dev_get_uclass_priv(dev);
struct sysinfo_ops *ops = sysinfo_get_ops(dev);
+ if (!priv->detected)
+ return -EPERM;
+
if (!ops->get_bool)
return -ENOSYS;
@@ -46,8 +64,12 @@ int sysinfo_get_bool(struct udevice *dev, int id, bool *val)
int sysinfo_get_int(struct udevice *dev, int id, int *val)
{
+ struct sysinfo_priv *priv = dev_get_uclass_priv(dev);
struct sysinfo_ops *ops = sysinfo_get_ops(dev);
+ if (!priv->detected)
+ return -EPERM;
+
if (!ops->get_int)
return -ENOSYS;
@@ -56,8 +78,12 @@ int sysinfo_get_int(struct udevice *dev, int id, int *val)
int sysinfo_get_str(struct udevice *dev, int id, size_t size, char *val)
{
+ struct sysinfo_priv *priv = dev_get_uclass_priv(dev);
struct sysinfo_ops *ops = sysinfo_get_ops(dev);
+ if (!priv->detected)
+ return -EPERM;
+
if (!ops->get_str)
return -ENOSYS;
@@ -68,4 +94,5 @@ UCLASS_DRIVER(sysinfo) = {
.id = UCLASS_SYSINFO,
.name = "sysinfo",
.post_bind = dm_scan_fdt_dev,
+ .per_device_auto= sizeof(bool),
};
diff --git a/include/sysinfo.h b/include/sysinfo.h
index 8054d4d4a1..b140d742e9 100644
--- a/include/sysinfo.h
+++ b/include/sysinfo.h
@@ -60,7 +60,8 @@ struct sysinfo_ops {
* This operation might take a long time (e.g. read from EEPROM,
* check the presence of a device on a bus etc.), hence this is not
* done in the probe() method, but later during operation in this
-* dedicated method.
+* dedicated method. This method will be called before any other
+* methods.
*
* Return: 0 if OK, -ve on error.
*/
@@ -104,7 +105,7 @@ struct sysinfo_ops {
* get_fit_loadable - Get the name of an image to load from FIT
* This function can be used to provide the image names based on runtime
*
[PATCH v4 1/5] dm: gpio: Fix gpio_get_list_count failing with livetree
of_parse_phandle_with_args (called by dev_read_phandle_with_args) does not
support getting the length of a phandle list by using the index -1.
Instead, use dev_count_phandle_with_args which supports exactly this
use-case.
Fixes: 8558217153 ("gpio: Convert to use APIs which support live DT")
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v3)
Changes in v3:
- Fix assuming any nonzero return of dev_count_phandle_with_args was an error.
Changes in v2:
- Change Fixes tag to the most recent commit touching these lines
drivers/gpio/gpio-uclass.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
index e4e7f58c39..131099cc17 100644
--- a/drivers/gpio/gpio-uclass.c
+++ b/drivers/gpio/gpio-uclass.c
@@ -1215,9 +1215,9 @@ int gpio_get_list_count(struct udevice *dev, const char
*list_name)
{
int ret;
- ret = dev_read_phandle_with_args(dev, list_name, "#gpio-cells", 0, -1,
-NULL);
- if (ret) {
+ ret = dev_count_phandle_with_args(dev, list_name, "#gpio-cells",
+ -ENOENT);
+ if (ret < 0) {
debug("%s: Node '%s', property '%s', GPIO count failed: %d\n",
__func__, dev->name, list_name, ret);
}
--
2.25.1
[PATCH v4 0/5] sysinfo: Add gpio sysinfo driver
This series adds a GPIO sysinfo driver using the dm_gpio_get_values_as_int_base3 function. The board revision is mapped based in devicetree properties. This series is based on Simon's GPIO series [1]. [1] https://patchwork.ozlabs.org/project/uboot/list/?series=228126 Changes in v4: - Enable sysinfo_gpio test for sandbox - Fix test failure caused by uninitialized variable - Rebase onto u-boot/master Changes in v3: - Fix assuming any nonzero return of dev_count_phandle_with_args was an error. - Fix assuming nonzero return from dm_gpio_get_values_as_int_base3 is an error. - Move detected bool into sysinfo_priv struct - Rebase onto u-boot/next - Use SYSINFO_ID_BOARD_MODEL instead of SYSINFO_ID_REVISION Changes in v2: - Document sysinfo_gpio_priv - Enforce sysinfo detect ordering in uclass. Users must still call sysinfo_detect beforehand. - Fix unbalanced brace in sysinfo_gpio_get_int - Modify sysinfo test to check for detect() ordering. - Refactor driver to take advantage of the uclass detect ordering guarantee. - Reorder includes - Set BOARD_HWVERSION to SYSINFO_ID_REVISION, as they represent the same content. - Use enums instead of defines for sysinfo ids Sean Anderson (5): dm: gpio: Fix gpio_get_list_count failing with livetree sysinfo: Use global sysinfo IDs for existing sysinfo drivers sysinfo: Require that sysinfo_detect be called before other methods sysinfo: Add gpio-sysinfo driver test: Add gpio-sysinfo test arch/sandbox/dts/test.dts | 7 + common/spl/spl_fit.c | 4 + configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig| 1 + configs/sandbox_noinst_defconfig | 1 + configs/sandbox_spl_defconfig | 1 + .../sysinfo/gpio-sysinfo.txt | 37 + drivers/gpio/gpio-uclass.c| 6 +- drivers/sysinfo/Kconfig | 8 + drivers/sysinfo/Makefile | 1 + drivers/sysinfo/gazerbeam.h | 8 +- drivers/sysinfo/gpio.c| 141 ++ drivers/sysinfo/sandbox.h | 2 +- drivers/sysinfo/sysinfo-uclass.c | 29 +++- include/sysinfo.h | 26 ++-- test/dm/Makefile | 1 + test/dm/sysinfo-gpio.c| 69 + test/dm/sysinfo.c | 25 ++-- 19 files changed, 342 insertions(+), 27 deletions(-) create mode 100644 doc/device-tree-bindings/sysinfo/gpio-sysinfo.txt create mode 100644 drivers/sysinfo/gpio.c create mode 100644 test/dm/sysinfo-gpio.c -- 2.25.1
[PATCH v4 2/5] sysinfo: Use global sysinfo IDs for existing sysinfo drivers
Since 07c9e683a4 ("smbios: Allow a few values to come from sysinfo")
there are common global sysinfo IDs. This patch moved existing IDs above
SYSINFO_ID_USER.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v3)
Changes in v3:
- Rework patch to use sjg's sysinfo IDs
Changes in v2:
- Set BOARD_HWVERSION to SYSINFO_ID_REVISION, as they represent the same
content.
- Use enums instead of defines for sysinfo ids
drivers/sysinfo/gazerbeam.h | 8 +---
drivers/sysinfo/sandbox.h | 2 +-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/sysinfo/gazerbeam.h b/drivers/sysinfo/gazerbeam.h
index 171729d203..6bf3c0098d 100644
--- a/drivers/sysinfo/gazerbeam.h
+++ b/drivers/sysinfo/gazerbeam.h
@@ -5,10 +5,12 @@
*
*/
+#include
+
enum {
- BOARD_MULTICHANNEL,
- BOARD_VARIANT,
- BOARD_HWVERSION,
+ BOARD_HWVERSION = SYSINFO_ID_BOARD_MODEL,
+ BOARD_MULTICHANNEL = SYSINFO_ID_USER,
+ BOARD_VARIANT
};
enum {
diff --git a/drivers/sysinfo/sandbox.h b/drivers/sysinfo/sandbox.h
index 2cff494f56..d9c5804c26 100644
--- a/drivers/sysinfo/sandbox.h
+++ b/drivers/sysinfo/sandbox.h
@@ -5,7 +5,7 @@
*/
enum {
- BOOL_CALLED_DETECT,
+ BOOL_CALLED_DETECT = SYSINFO_ID_USER,
INT_TEST1,
INT_TEST2,
STR_VACATIONSPOT,
--
2.25.1
[PATCH v2] Makefile: fix generating environment file
If the CONFIG_USE_DEFAULT_ENV_FILE=y and CONFIG_DEFAULT_ENV_FILE points to the empty environment file, the auto-generated file has the wrong syntax so it leads to the compilation failure: In file included from include/env_default.h:115, from env/common.c:29: include/generated/defaultenv_autogenerated.h:1:1: error: expected expression before ‘,’ token 1 | , 0x00 | ^ make[1]: *** [scripts/Makefile.build:266: env/common.o] Error 1 make[1]: *** Waiting for unfinished jobs make: *** [Makefile:1744: env] Error 2 Fix this issue conditionally adding the delimiter ", ". Signed-off-by: Oleksandr Suvorov --- Changes in v2: - Fix the hex-decimal class matching. Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index e423f6de746..4e0a9b51cb7 100644 --- a/Makefile +++ b/Makefile @@ -1853,7 +1853,9 @@ define filechk_defaultenv.h grep -v '^$$' | \ tr '\n' '\0' | \ sed -e 's/\\\x0\s*//g' | \ -xxd -i ; echo ", 0x00" ; ) +xxd -i | \ +sed -r 's/([0-9a-f])$$/\1, /'; \ +echo "0x00" ; ) endef define filechk_dt.h -- 2.31.1
Re: [PATCH] sysinfo.h: Add re-inclusion guard
On Mon, Apr 19, 2021 at 04:19:40PM -0400, Tom Rini wrote: > Add #ifndef __SYSINFO_H__ ... #endif to prevent re-inclusion of this > file. > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v10 3/3] Add support for stack-protector
On Sun, Apr 11, 2021 at 11:21:58AM +0200, Heinrich Schuchardt wrote: > From: Joel Peshkin > > Add support for stack protector for UBOOT, SPL, and TPL > as well as new pytest for stackprotector > > Signed-off-by: Joel Peshkin > > Adjust UEFI build flags. > Signed-off-by: Heinrich Schuchardt Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v10 2/3] x86: correct usage of CFLAGS_NON_EFI
On Sun, Apr 11, 2021 at 11:21:57AM +0200, Heinrich Schuchardt wrote: > The current usage of the variable CFLAGS_NON_EFI on the x86 architecture > deviates from other architectures. > > Variable CFLAGS_NON_EFI is the list of compiler flags to be removed when > building UEFI applications. It is not a list of flags to be added anywhere. > > Signed-off-by: Heinrich Schuchardt Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v10 1/3] test: fix test/dm/regmap.c
On Sun, Apr 11, 2021 at 11:21:56AM +0200, Heinrich Schuchardt wrote: > regmap_read() only fills the first two bytes of val. The last two bytes are > random data from the stack. This means the test will fail randomly. > > For low endian systems we could simply initialize val to 0 and get correct > results. But tests should not depend on endianness. So let's use a pointer > conversion instead. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v4 4/5] sysreset: provide type of reset in do_reset cmd
On Thu, Apr 01, 2021 at 02:01:55AM +0300, Igor Opaniuk wrote: > From: Igor Opaniuk > > Add additional param for reset cmd, which provides type of reset. > > Signed-off-by: Igor Opaniuk Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] toradex: configblock: fix module revision in config block
On Wed, Apr 07, 2021 at 03:28:24PM +0300, denys.droz...@toradex.com wrote: > From: Denys Drozdov > > U-boot might display wrong module revision information > for modules with an assembly version 'K'. "cfgblock create" > does not takes into account all revision digits from PID8. > > This fix takes into account all digits of PID8 > to store module revision. > > Signed-off-by: Denys Drozdov > Reviewed-by: Oleksandr Suvorov Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v4 5/5] doc: usage: add usage details for reset cmd
On Thu, Apr 01, 2021 at 02:01:56AM +0300, Igor Opaniuk wrote: > From: Igor Opaniuk > > Add usage details for reset command. > > Signed-off-by: Igor Opaniuk Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v4 3/5] sysreset: psci: use psci driver exported functions
On Thu, Apr 01, 2021 at 02:01:54AM +0300, Igor Opaniuk wrote: > From: Igor Opaniuk > > Use psci driver exported functions for reset/poweroff, instead of > invoking directly invoke_psci_fn. > > Signed-off-by: Igor Opaniuk Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v4 2/5] psci: add features/reset2 support
On Thu, Apr 01, 2021 at 02:01:53AM +0300, Igor Opaniuk wrote: > From: Igor Opaniuk > > Adds support for: > * PSCI_FEATURES, which was introduced in PSCI 1.0. This provides API > that allows discovering whether a specific PSCI function is implemented > and its features. > * SYSTEM_RESET2, which was introduced in PSCI 1.1, which extends existing > SYSTEM_RESET. It provides support for vendor-specific resets, providing > reset_type as an additional param. > > For additional details visit [1]. > > Implementations of some functions were borrowed from Linux PSCI driver > code [2]. > > [1] https://developer.arm.com/documentation/den0022/latest/ > [2] drivers/firmware/psci/psci.c > > Signed-off-by: Igor Opaniuk Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v4 1/5] psci: add v1.0/v1.1 definitions from Linux
On Thu, Apr 01, 2021 at 02:01:52AM +0300, Igor Opaniuk wrote: > From: Igor Opaniuk > > Sync and add PSCI API versions 1.0/1.1 definitions from Linux. > > Signed-off-by: Igor Opaniuk Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/6] arm: highbank: Enable OF_CONTROL
On Mon, Apr 12, 2021 at 01:04:51AM +0100, Andre Przywara wrote: > All Calxeda machines are actually a poster book example of device tree > usage: the DT is loaded from flash by the management processor into > DRAM, the memory node is populated with the detected DRAM size and this > DT is then handed over to the kernel. > So it's a shame that U-Boot didn't participate in this chain, but > fortunately this is easy to fix: > > Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial > function to tell U-Boot about the (fixed) location of the DTB in DRAM. > Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform > data from the DT. Also define AHCI, to bring this driver into the driver > model world as well. > > Signed-off-by: Andre Przywara Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 5/6] arm: highbank: Do DRAM init from DT
On Mon, Apr 12, 2021 at 01:04:54AM +0100, Andre Przywara wrote: > So far U-Boot was hard coding a (surely sufficient) memory size of 512 > MB, even though all machines out there have at least 4GB of DRAM. > Since U-Boot uses its memory knowledge to populate the EFI memory map, > we are missing out here, at best losing everything beyond 4GB on Midway > boxes (which typically come with 8GB of DRAM). > > Since the management processor populated the DT memory node already with > the detected DRAM size and configuration, we use that to populate > U-Boot's memory bank information, which is the base for the UEFI memory > map. > This finally allows us to get rid of the NR_DRAM_BANKS=0 hack, that we > had in place to avoid U-Boot messing up the DT memory node before > loading the kernel. > > Also, to cover the whole of memory, we need to enable PHYS_64BIT. > > Signed-off-by: Andre Przywara Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/6] net: calxedagmac: Convert to DM_ETH
On Mon, Apr 12, 2021 at 01:04:52AM +0100, Andre Przywara wrote: > To squash that nasty warning message and make better use of the newly > gained OF_CONTROL feature, let's convert the calxedagmac driver to the > "new" driver model. > The conversion is pretty straight forward, mostly just adjusting the > use of the involved data structures. > The only actual change is the required split of the receive routine into > a receive and free_pkt part. > Also this allows us to get rid of the hardcoded platform information and > explicit init calls. > > This also uses the opportunity to wrap the code decoding the MMIO > register base address, to make it safe for using PHYS_64BIT later. > > Signed-off-by: Andre Przywara > Reviewed-by: Ramon Fried Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 4/6] arm: highbank: Remove artificial SDRAM size
On Mon, Apr 12, 2021 at 01:04:53AM +0100, Andre Przywara wrote: > So far we were defining a somewhat confusing PHYS_SDRAM_1_SIZE variable, > which originally was only used for setting the memtest boundaries. This > definition in highbank.h has been removed about a year ago (moved to > Kconfig), so we also don't need the hard-coded size definition any longer. > > Get rid of the misleading memory size definition, which was actually wrong > anyway (it's 4088 MB for those machines with just 4GB of DRAM). > > Signed-off-by: Andre Przywara Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/6] arm: octeontx: enable WDT_SBSA
On Thu, Mar 25, 2021 at 05:07:34PM -0700, Tim Harvey wrote: > The OcteonTX uses ARM's SBSA Watchdog device > > Signed-off-by: Tim Harvey > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 4/6] drivers: net: octeontx: fix QSGMII
On Thu, Mar 25, 2021 at 05:07:35PM -0700, Tim Harvey wrote: > Revert a change that occured between the Marvell SDK-10.1.1.0 > and SDK-10.3.1.1 which broke QSMII phy support. > > Signed-off-by: Tim Harvey Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 6/6] arm: highbank: Update maintainership
On Mon, Apr 12, 2021 at 01:04:55AM +0100, Andre Przywara wrote: > Rob does not have access to any Calxeda systems anymore, also has > expressed a lack of interest in those systems in the past. > > I have multiple working Midway nodes under my desk in the office, so > am happy to take over maintainership. > > Signed-off-by: Andre Przywara Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/6] arm: highbank: Limit FDT and initrd load addresses
On Mon, Apr 12, 2021 at 01:04:50AM +0100, Andre Przywara wrote:
> So far on Highbank/Midway machines U-Boot only ever uses 512MB of DRAM,
> even though the machines have typically 4GB and 8GB, respectively.
> That means that so far we didn't need an extra limit for placing the DTB
> and initrd, as the 512MB are lower than the kernel's limit ("lowmem",
> typically 768MB).
>
> With U-Boot now needing to learn about the actual memory size (to
> correctly populate the EFI memory map), it might relocate fdt and initrd
> to the end of DRAM, which is out of reach of the kernel.
>
> So add limiting values to the fdt_high and initrd_high environment
> variables, to prevent U-Boot from using too high addresses.
>
> Signed-off-by: Andre Przywara
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH v5 2/2] doc: device-tree-bindings: regulator: anatop regulator
On Sat, Mar 27, 2021 at 09:46:52PM +0800, Ying-Chun Liu wrote: > From: "Ying-Chun Liu (PaulLiu)" > > Document the bindings for fsl,anatop-regulator > > Signed-off-by: Ying-Chun Liu (PaulLiu) > Reviewed-by: Sean Anderson > Cc: Fabio Estevam > Cc: Jaehoon Chung > Cc: Peng Fan > Reviewed-by: Jaehoon Chung Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v5 1/2] power: regulator: add driver for ANATOP regulator
On Sat, Mar 27, 2021 at 09:46:51PM +0800, Ying-Chun Liu wrote: > From: "Ying-Chun Liu (PaulLiu)" > > Anatop is an integrated regulator inside i.MX6 SoC. > There are 3 digital regulators which controls PU, CORE (ARM), and SOC. > And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB). > This patch adds the Anatop regulator driver. > > Signed-off-by: Ying-Chun Liu (PaulLiu) > Reviewed-by: Sean Anderson > Cc: Fabio Estevam > Cc: Jaehoon Chung > Cc: Peng Fan > Reviewed-by: Jaehoon Chung Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] cmd: CONFIG_CMD_MMC depends on CONFIG_MMC
On Sat, Mar 27, 2021 at 11:43:54AM +0100, Heinrich Schuchardt wrote: > Trying to compile with CONFIG_CMD_MMC=y and CONFIG_MMC=n leads to errors: > > riscv64-linux-gnu-ld.bfd: cmd/built-in.o: in function `do_mmcops': > cmd/mmc.c:984: undefined reference to `get_mmc_num' > riscv64-linux-gnu-ld.bfd: cmd/built-in.o: in function `do_mmc_setdsr': > cmd/mmc.c:873: undefined reference to `find_mmc_device' > > Add missing dependency. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Bin Meng > Reviewed-by: Jaehoon Chung Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 6/6] net: octeontx: smi: fix mii probe
On Thu, Mar 25, 2021 at 05:07:37PM -0700, Tim Harvey wrote: > The fdt node offset is apparently not set properly when probed > causing no MDIO busses to be found. Fix this by obtaining the > offset. > > Signed-off-by: Tim Harvey > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 5/6] drivers: ata: ahci: update max id if it is more than available ports
On Thu, Mar 25, 2021 at 05:07:36PM -0700, Tim Harvey wrote: > From: Suneel Garapati > > After check for maximum between max id and available ports, also check > if available port count is less than max id and update. > > In the case of the CN8030 OcteonTX SoC max_id needs to be reduced to > the number of ports found otherwise the following occurs on a scan: > > GW6404-B> scsi scan > scanning bus for devices... > Target spinup took 0 ms. > AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode > flags: 64bit ncq ilck stag pm led clo only pmp fbss pio slum part ccc > apst > Device 0: (0:0) Vendor: ATA Prod.: SanDisk SD8SFAT0 Rev: Z233 > Type: Hard Disk > Capacity: 61057.3 MB = 59.6 GB (125045424 x 512) > "Synchronous Abort" handler, esr 0x9606 > elr: 0052f824 lr : 0052fa10 (reloc) > elr: 7fee9824 lr : 7fee9a10 > x0 : 0001 x1 : 0001 > x2 : 7bea3528 x3 : 7bea3580 > x4 : 0200 x5 : > x6 : 0002 x7 : 7bea3540 > x8 : fff8 x9 : 0008 > x10: 000186a0 x11: 000d > x12: 0006 x13: 0001869f > x14: 0007 x15: > x16: 7ff439a5 x17: 7ff5730c > x18: 7bea9de0 x19: 7ff7a580 > x20: 7bec79f8 x21: > x22: 7bea3580 x23: > x24: x25: 7bec7a00 > x26: ffc0 x27: 7bec79d0 > x28: 7beb51c0 x29: 7bea3480 > > Code: 91246800 940130c2 1280 144f (b9402ae0) > Resetting CPU ... > > Signed-off-by: Suneel Garapati > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/6] arm: octeontx: support generic distro config
On Thu, Mar 25, 2021 at 05:07:33PM -0700, Tim Harvey wrote: > Support Generic Distro Default config > > Signed-off-by: Tim Harvey > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/6] arm: octeontx: move CONFIG_SUPPORT_RAW_INITRD to configs
On Thu, Mar 25, 2021 at 05:07:32PM -0700, Tim Harvey wrote: > Move CONFIG_SUPPORT_RAW_INITRD out of the octeontx_common header > and into the defconfig files. > > Signed-off-by: Tim Harvey > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] lz4: Fix unaligned accesses
On Wed, Mar 17, 2021 at 10:31:58PM +, karl.bel...@gmail.com wrote: > From: Karl Beldan > > Signed-off-by: Karl Beldan Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] Fix IDE commands issued, fix endian issues, fix non MMIO
On Wed, Feb 24, 2021 at 05:44:42PM +0100, Reinoud Zandijk wrote: > Fixes IDE issues found on the Malta board under Qemu: > > 1) DMA implied commands were sent to the controller in stead of the PIO > variants. The rest of the code is DMA free and written for PIO operation. > > 2) direct pointer access was used to read and write the registers instead > of the inb/inw/outb/outw functions/macros. Registers don't have to be > memory mapped and ATA_CURR_BASE() does not have to return an offset from > address zero. > > 3) Endian isues in ide_ident() and reading/writing data in general. Names > were corrupted and sizes misreported. > > Tested malta_defconfig and maltael_defconfig to work again in Qemu. > > > Signed-off-by: Reinoud Zandijk > Tested-by: Heinrich Schuchardt Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 4/4] sandbox: enable IRQ using select for sandbox architecture
On Mon, Mar 08, 2021 at 04:48:16PM +0100, Wasim Khan wrote: > From: Wasim Khan > > Enable IRQ using select for sandbox architecture. > > Signed-off-by: Wasim Khan > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 3/4] arch: Kconfig: enable IRQ using select for x86 architecture
On Mon, Mar 08, 2021 at 04:48:15PM +0100, Wasim Khan wrote: > From: Wasim Khan > > use 'select' to enable IRQ as it does not have architecture > specific dependency. > > Signed-off-by: Wasim Khan > Reviewed-by: Hou Zhiqiang > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 2/4] arch: arm: update Kconfig to select IRQ when GIC_V3_ITS is enabled
On Mon, Mar 08, 2021 at 04:48:14PM +0100, Wasim Khan wrote: > From: Wasim Khan > > GIC_V3_ITS uses UCLASS_IRQ driver. Update Kconfig to select > IRQ when GIC_V3_ITS is enabled. > > Signed-off-by: Wasim Khan > Reviewed-by: Hou Zhiqiang > Reviewed-by: Simon Glass > Tested-by: Vladimir Oltean Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 1/4] misc: make CONFIG_IRQ selectable for all platforms
On Mon, Mar 08, 2021 at 04:48:13PM +0100, Wasim Khan wrote: > From: Wasim Khan > > UCLASS_IRQ driver is not Intel specific. Make CONFIG_IRQ > selectable for all platforms. > > Signed-off-by: Wasim Khan > Tested-by: Vladimir Oltean > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCHv3] arm64: gic-v3-its: Clear the Pending table before enabling LPIs
On Fri, Mar 05, 2021 at 03:02:35PM +0800, Zhiqiang Hou wrote: > From: Hou Zhiqiang > > The GICv3 RM requires "The first 1KB of memory for the LPI Pending tables > must contain only zeros on initial allocation, and this must be visible > to the Redistributors, or else the effect is UNPREDICTABLE". > > And as the following statement, we here clear the whole Pending tables > instead of the first 1KB. > "An LPI Pending table that contains only zeros, including in the first 1KB, > indicates that there are no pending LPIs. > The first 1KB of the LPI Pending table is IMPLEMENTATION DEFINED. However, > if the first 1KB of the LPI Pending table and the rest of the table contain > only zeros, this must indicate that there are no pending LPIs." > > And there isn't any pending LPI under U-Boot, so it's unnecessary to > load the contents of the Pending table during the enablement, then set > the GICR_PENDBASER.PTZ flag. > > Signed-off-by: Hou Zhiqiang > Tested-by: Vladimir Oltean # NXP LS1028A > Reviewed-by: Wasim Khan Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PULL u-boot] Please pull u-boot-amlogic-20210419
On Mon, Apr 19, 2021 at 05:35:01PM +0200, Neil Armstrong wrote: > Hi Tom, > > This serie fixes Ethernet on Odroid-C2 and enables support for PCIe on the > Khadas VIM3 & VIM3L > with all the necessary bits after Bin merged the PCIe driver. > > The CI job is at > https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic/pipelines/7216 > > Thanks, > Neil > > The following changes since commit 3a9aaefcaa3efc2a1cef86fbe0bf229a1bff9902: > > Merge tag 'efi-2021-07-rc1-2' of > https://source.denx.de/u-boot/custodians/u-boot-efi (2021-04-18 08:47:27 > -0400) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-amlogic.git > tags/u-boot-amlogic-20210419 > > for you to fetch changes up to fcf3c9deae1acfda81051c8c211fcbefd4217e1d: > > boards: amlogic: update documentation for PCIe support (2021-04-19 16:59:33 > +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
[PATCH] Revert "spl: Drop bd_info in the data section"
From: Alexandru Gagniuc
This reverts commit 38d6b7ebdaee3e0e8426ef1b9df88bdce8ae2e75.
struct global_data contains a pointer to the bd_info structure. This
pointer was populated spl_set_bd() to a pre-allocated bd_info in the
".data" section. The referenced commit replaced this mechanism to one
that uses malloc(). That new mechanism is only used if SPL_ALLOC_BD=y.
which very few boards do.
The result is that (struct global_data)->bd is NULL in SPL on most
platforms. This breaks falcon mode, since arch_fixup_fdt() tries to
access (struct global_data)->bd and set the "/memory" node in the
devicetree. The result is that the "/memory" node contains garbage
values, causing linux to panic() as it sets up the page table.
Instead of trying to fix the mess, potentially causing other issues,
revert to the code that worked, while this change is reworked.
Signed-off-by: Alexandru Gagniuc
---
arch/arm/cpu/armv8/fsl-layerscape/spl.c | 5 +
common/spl/Kconfig | 9 -
common/spl/spl.c| 20
include/spl.h | 10 +-
4 files changed, 10 insertions(+), 34 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 5b43a2a231..b3f1148f9d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -41,9 +41,6 @@ u32 spl_boot_device(void)
#ifdef CONFIG_SPL_BUILD
-/* Define board data structure */
-static struct bd_info bdata __attribute__ ((section(".data")));
-
void spl_board_init(void)
{
#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2)
@@ -89,7 +86,7 @@ void board_init_f(ulong dummy)
get_clocks();
preloader_console_init();
- gd->bd =
+ spl_set_bd();
#ifdef CONFIG_SYS_I2C
#ifdef CONFIG_SPL_I2C_SUPPORT
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0f528f346f..df5468f1ac 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -113,15 +113,6 @@ config SPL_FSL_PBL
Create boot binary having SPL binary in PBI format concatenated with
u-boot binary.
-config SPL_ALLOC_BD
- bool "Allocate memory for bd_info"
- default y if X86 || SANDBOX
- help
- Some boards don't allocate space for this in their board_init_f()
- code. In this case U-Boot can allocate space for gd->bd in the
- standard SPL flow (board_init_r()). Enable this option to support
- this feature.
-
endmenu
config HANDOFF
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 8c4cd933cf..a0a608fd77 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -55,6 +55,9 @@ binman_sym_declare(ulong, spl, image_pos);
binman_sym_declare(ulong, spl, size);
#endif
+/* Define board data structure */
+static struct bd_info bdata __attribute__ ((section(".data")));
+
/*
* Board-specific Platform code can reimplement show_boot_progress () if needed
*/
@@ -490,19 +493,14 @@ static int spl_common_init(bool setup_malloc)
return 0;
}
-int spl_alloc_bd(void)
+void spl_set_bd(void)
{
/*
* NOTE: On some platforms (e.g. x86) bdata may be in flash and not
* writeable.
*/
- if (!gd->bd) {
- gd->bd = malloc(sizeof(*gd->bd));
- if (!gd->bd)
- return -ENOMEM;
- }
-
- return 0;
+ if (!gd->bd)
+ gd->bd =
}
int spl_early_init(void)
@@ -652,6 +650,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
debug(">>" SPL_TPL_PROMPT "board_init_r()\n");
+ spl_set_bd();
+
#if defined(CONFIG_SYS_SPL_MALLOC_START)
mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
CONFIG_SYS_SPL_MALLOC_SIZE);
@@ -661,10 +661,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
if (spl_init())
hang();
}
- if (IS_ENABLED(CONFIG_SPL_ALLOC_BD) && spl_alloc_bd()) {
- puts("Cannot alloc bd\n");
- hang();
- }
#if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6)
/*
* timer_init() does not exist on PPC systems. The timer is initialized
diff --git a/include/spl.h b/include/spl.h
index 4f6e0e53f5..cee9a42ddb 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -357,15 +357,7 @@ u32 spl_mmc_boot_mode(const u32 boot_device);
* If not overridden, it is weakly defined in common/spl/spl_mmc.c.
*/
int spl_mmc_boot_partition(const u32 boot_device);
-
-/**
- * spl_alloc_bd() - Allocate space for bd_info
- *
- * This sets up the gd->bd pointer by allocating memory for it
- *
- * @return 0 if OK, -ENOMEM if out of memory
- */
-int spl_alloc_bd(void);
+void spl_set_bd(void);
/**
* spl_set_header_raw_uboot() - Set up a standard SPL image structure
--
2.31.1
Re: [PATCH v3 5/5] test: Add gpio-sysinfo test
On Tue, Apr 20, 2021 at 10:08:07AM -0400, Sean Anderson wrote: > > On 4/20/21 7:29 AM, Tom Rini wrote: > > On Wed, Mar 31, 2021 at 01:50:40PM -0400, Sean Anderson wrote: > > > >> This adds a test for the gpio-sysinfo driver. > >> > >> Signed-off-by: Sean Anderson > >> Reviewed-by: Simon Glass > > > > This test no longer passes. Can you please rebase the series and > > retest? Thanks. > > > > I rebased onto u-boot/master and the test passes on sandbox and > sandbox64. Do you have a specific configuration I can try out? Or a log > of the failing test? https://source.denx.de/u-boot/u-boot/-/jobs/257499 -- Tom signature.asc Description: PGP signature
Re: Possible USB Mass Storage bug on Xilinx's Zynq
Hi, On 4/20/21 3:53 PM, Bruno L. Albrecht wrote: > The EP1/in fails are on drivers/usb/gadget/ci_udc.c @ line 628. They happen > during enumeration (I'm able to check even exactly which package fails > using Wireshark + USB PCAP), but I couldn't find out more. I was hoping > someone had been through that and had an idea of could be happening before > I dive into the wonders of USB drivers. > The CACHE fails are from arch/arm/lib/cache.c @ line 64. There shouldn't be anything xilinx specific in this code but clearly that start/stop address are not aligned. Thanks, Michal
Re: [PATCH v3 5/5] test: Add gpio-sysinfo test
On 4/20/21 7:29 AM, Tom Rini wrote: > On Wed, Mar 31, 2021 at 01:50:40PM -0400, Sean Anderson wrote: > >> This adds a test for the gpio-sysinfo driver. >> >> Signed-off-by: Sean Anderson >> Reviewed-by: Simon Glass > > This test no longer passes. Can you please rebase the series and > retest? Thanks. > I rebased onto u-boot/master and the test passes on sandbox and sandbox64. Do you have a specific configuration I can try out? Or a log of the failing test? --Sean
[PATCH] Makefile: fix generating environment file
If the CONFIG_USE_DEFAULT_ENV_FILE=y and CONFIG_DEFAULT_ENV_FILE points to the empty environment file, the auto-generated file has wrong syntax so it leads to the compilation failure: In file included from include/env_default.h:115, from env/common.c:29: include/generated/defaultenv_autogenerated.h:1:1: error: expected expression before ‘,’ token 1 | , 0x00 | ^ make[1]: *** [scripts/Makefile.build:266: env/common.o] Error 1 make[1]: *** Waiting for unfinished jobs make: *** [Makefile:1744: env] Error 2 Fix this issue conditionally adding the delimiter ", ". Signed-off-by: Oleksandr Suvorov --- Makefile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index e423f6de746..d42168661b3 100644 --- a/Makefile +++ b/Makefile @@ -1853,7 +1853,9 @@ define filechk_defaultenv.h grep -v '^$$' | \ tr '\n' '\0' | \ sed -e 's/\\\x0\s*//g' | \ -xxd -i ; echo ", 0x00" ; ) +xxd -i | \ +sed -r 's/([0-9])$$/\1, /'; \ +echo "0x00" ; ) endef define filechk_dt.h -- 2.31.1
Re: Possible USB Mass Storage bug on Xilinx's Zynq
The EP1/in fails are on drivers/usb/gadget/ci_udc.c @ line 628. They happen
during enumeration (I'm able to check even exactly which package fails
using Wireshark + USB PCAP), but I couldn't find out more. I was hoping
someone had been through that and had an idea of could be happening before
I dive into the wonders of USB drivers.
The CACHE fails are from arch/arm/lib/cache.c @ line 64.
On Tue, 20 Apr 2021 at 06:15, Sean Anderson wrote:
> On 4/19/21 9:05 AM, Bruno L. Albrecht wrote:
> > Hello people,
> > it's my first post here, so forgive me if I do something wrong. I'll try
> to
> > be short and clear.
> >
> > I'm developing on an Avnet PicoZed (based on a Xilinx Zynq SoC) and my
> > objective is to expose the eMMC as a Mass Storage Device over an USB
> > Connection.
> >
> > I used the following config flag on defconfig file (
> >
> https://github.com/Xilinx/u-boot-xlnx/blob/master/configs/xilinx_zynq_virt_defconfig
> > ):
> >
> > CONFIG_CMD_USB_MASS_STORAGE=y
> >
> >
> > To the Device Tree (
> >
> https://github.com/Xilinx/u-boot-xlnx/blob/master/arch/arm/dts/zynq-picozed.dts
> )
> > I added the usb configuration:
> >
> > aliases {
> >> <...>
> >> usb0 =
> >> };
> >> {
> >> u-boot,dm-pre-reloc;
> >> status = "okay";
> >> dr_mode = "peripheral";
> >> };
> >
> >
> > Compilation goes fine and U-Boot boots fine. The eMMC is correctly
> > recognized.
> > Then I use the following command to initiate the USB Mass Storage:
> >
> > ums 0 mmc 0
> >
> >
> > When on *Windows*, the command is successful for a brief moment and then
> > the board resets with the following error:
> >
> > Zynq> ums 0 mmc 0
> >> UMS: LUN 0, dev 0, hwpart 0, sector 0x0, count 0xe3
> >> \EP1/in FAIL info=4080 pg0=3eb393c0
> >> EP1/in FAIL info=40008080 pg0=3eb3d3c0
> >> EP1/in FAIL info=d8080 pg0=3eaebdc0
> >> CACHE: Misaligned operation at range [0001, 0041]
> >> CACHE: Misaligned operation at range [0001, 0041]
> >> data abort
> >> pc : [<3ff67dec>] lr : [<3ff67dec>]
> >> reloc pc : [<0405cdec>]lr : [<0405cdec>]
>
> I don't know anything about this platform, but I'd start with figuring
> out what function/line these are from. You can find out by grepping
> through objdump -S.
>
> --Sean
>
> >> sp : 3eae81f0 ip : 0031 fp : 3ffd957c
> >> r10: 0001 r9 : 3eaeaed0 r8 : 0001
> >> r7 : 3ffd9524 r6 : 0001 r5 : 3ffd94ec r4 : 3ffd95a4
> >> r3 : e0001000 r2 : 0001 r1 : 0041 r0 : 0001
> >> Flags: nZCv IRQs off FIQs off Mode SVC_32
> >> Code: ea7e e2861040 e1a6 ebfe91a6 (e5963004)
> >> Resetting CPU ...
> >>
> >
> > Since I'm working on a Windows machine, I have a Ubuntu running on a
> > Virtual Machine (VirtualBox). So I made a rule to bypass the USB device
> > that would be created on Windows directly to the Virtual Machine
> (virtually
> > connected the USB device to my Ubuntu).
> >
> > When I do this, the command works. I can access the eMMC and format it
> and
> > do whatever I want. If I remove the filter and let Windows enumerate the
> > device, the board resets again.
> >
> > I took a look at the dmesg messages on Ubuntu and found the following
> (the
> > only unusual messages are in bold):
> >
> > [101436.784042] usb 1-2: new full-speed USB device number 25 using
> ohci-pci
> >>
> >> *[101437.232208] usb 1-2: config 1 interface 0 altsetting 0 endpoint
> 0x81
> >> has invalid maxpacket 512, setting to 64[101437.232210] usb 1-2: config
> 1
> >> interface 0 altsetting 0 endpoint 0x2 has invalid maxpacket 512,
> setting to
> >> 64*
> >> [101437.477816] usb 1-2: New USB device found, idVendor=,
> >> idProduct=, bcdDevice= 2.21
> >> [101437.477818] usb 1-2: New USB device strings: Mfr=1, Product=2,
> >> SerialNumber=0
> >> [101437.477820] usb 1-2: Product: my product name
> >> [101437.477821] usb 1-2: Manufacturer: my manufacturer
> >> [101437.702297] usb-storage 1-2:1.0: USB Mass Storage device detected
> >> [101437.713954] scsi host3: usb-storage 1-2:1.0
> >> [101438.976664] scsi 3:0:0:0: Direct-Access LinuxUMS disk 0
> >> PQ: 0 ANSI: 2
> >> [101438.979158] sd 3:0:0:0: Attached scsi generic sg2 type 0
> >> [101439.284100] sd 3:0:0:0: [sdb] 14876672 512-byte logical blocks:
> (7.62
> >> GB/7.09 GiB)
> >> [101439.468523] sd 3:0:0:0: [sdb] Write Protect is off
> >> [101439.468526] sd 3:0:0:0: [sdb] Mode Sense: 0f 00 00 00
> >> [101439.653020] sd 3:0:0:0: [sdb] Write cache: enabled, read cache:
> >> enabled, doesn't support DPO or FUA
> >> [101440.759756] sdb: sdb1
> >> [101441.559083] sd 3:0:0:0: [sdb] Attached SCSI removable disk
> >>
> >
> > Not that it sounds like it would interfere, but the USB from the SoC is
> > connected to an USB Hub (USB2514B), to which other devices are connected
> > and work correctly on both Windows and Linux.
> >
> > Any ideas of what might be happening?
> >
> >
> > Cheers
> > Bruno
> >
> >
>
>
--
Eng. Bruno Landau Albrecht
e-mail:
Re: [PATCH] Add support for Raspberry Pi 3B+(32bit)
> The both the network cards are included in both configs, surely it > would be less confusing for users to detect the variant and load the > correct DT to ensure the network card does work, there's numerous > examples of this in U-Boot already I think it would be less confusing for users to add a defconfig for 3B+(32bit) for the following reasons. - 3B has defconfig for 32bit and 64bit - The defconfig for 3B and 3B+ is the same except for CONFIG_DEFAULT_DEVICE_TREE, but both are provided Alternatively, I suggest deleting rpi_3_b_plus_defconfig. 2021年4月20日(火) 21:18 Peter Robinson : > > On Tue, Apr 20, 2021 at 11:57 AM Toshifumi NISHINAGA > wrote: > > > > Hello Peter. > > > > > As that config works > > > just fine on all variants of the RPi3 inc the B, B+, A+ and CM3 > > > > Yes. It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, > > but only the network card doesn't work. > > Because the network cards used in the 3B and 3B+ are different. > > The both the network cards are included in both configs, surely it > would be less confusing for users to detect the variant and load the > correct DT to ensure the network card does work, there's numerous > examples of this in U-Boot already > > > This difference is hard to notice, > > so I want to add a new defconfig for Raspberry Pi 3B+. > > > > > > Regards, > > Toshifumi NISHINAGA > > > > 2021年4月20日(火) 19:28 Peter Robinson : > > > > > > On Tue, Apr 20, 2021 at 7:05 AM Toshifumi NISHINAGA > > > wrote: > > > > > > > > Hello all. > > > > > > > > I will add rpi_3_32b_plus_defconfig to easy to build u-boot for > > > > Raspberry Pi 3B+(32bit). > > > > > > What does this provide over rpi_3_32b_defconfig? As that config works > > > just fine on all variants of the RPi3 inc the B, B+, A+ and CM3 I > > > don't see the point in confusing things with an unnecessary config. > > > > > > > Could you merge this patch? > > > > > > > > Thanks, > > > > Toshifumi NISHINAGA > > > > > > > > > > > > From 28d13f48761ab7c137a5fdf07c76a857967e3590 Mon Sep 17 00:00:00 2001 > > > > From: Toshifumi NISHINAGA > > > > Date: Thu, 15 Apr 2021 16:53:33 +0900 > > > > Subject: [PATCH] Add support for Raspberry Pi 3B+(32bit) > > > > MIME-Version: 1.0 > > > > Content-Type: text/plain; charset=UTF-8 > > > > Content-Transfer-Encoding: 8bit > > > > > > > > It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, > > > > but the network card doesn't work. > > > > > > > > This defconfig is based on rpi_3_32b_defconfig. > > > > > > > > Signed-off-by: Toshifumi NISHINAGA > > > > --- > > > > > > > > configs/rpi_3_32b_plus_defconfig | 46 > > > > 1 file changed, 46 insertions(+) > > > > create mode 100644 configs/rpi_3_32b_plus_defconfig > > > > > > > > diff --git a/configs/rpi_3_32b_plus_defconfig > > > > b/configs/rpi_3_32b_plus_defconfig > > > > new file mode 100644 > > > > index 00..d147a46ae7 > > > > --- /dev/null > > > > +++ b/configs/rpi_3_32b_plus_defconfig > > > > @@ -0,0 +1,46 @@ > > > > +CONFIG_ARM=y > > > > +CONFIG_ARCH_CPU_INIT=y > > > > +CONFIG_ARCH_BCM283X=y > > > > +CONFIG_SYS_TEXT_BASE=0x8000 > > > > +CONFIG_TARGET_RPI_3_32B=y > > > > +CONFIG_SYS_MALLOC_F_LEN=0x2000 > > > > +CONFIG_NR_DRAM_BANKS=1 > > > > +CONFIG_ENV_SIZE=0x4000 > > > > +CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" > > > > +CONFIG_DISTRO_DEFAULTS=y > > > > +CONFIG_OF_BOARD_SETUP=y > > > > +CONFIG_USE_PREBOOT=y > > > > +# CONFIG_DISPLAY_CPUINFO is not set > > > > +# CONFIG_DISPLAY_BOARDINFO is not set > > > > +CONFIG_MISC_INIT_R=y > > > > +CONFIG_SYS_PROMPT="U-Boot> " > > > > +CONFIG_CMD_GPIO=y > > > > +CONFIG_CMD_MMC=y > > > > +CONFIG_CMD_USB=y > > > > +CONFIG_CMD_FS_UUID=y > > > > +CONFIG_OF_EMBED=y > > > > +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" > > > > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > > > > +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y > > > > +CONFIG_DM_MMC=y > > > > +CONFIG_MMC_SDHCI=y > > > > +CONFIG_MMC_SDHCI_BCM2835=y > > > > +CONFIG_PHYLIB=y > > > > +CONFIG_DM_ETH=y > > > > +CONFIG_PINCTRL=y > > > > +# CONFIG_PINCTRL_GENERIC is not set > > > > +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set > > > > +CONFIG_USB=y > > > > +CONFIG_DM_USB=y > > > > +CONFIG_USB_DWC2=y > > > > +CONFIG_USB_KEYBOARD=y > > > > +CONFIG_USB_HOST_ETHER=y > > > > +CONFIG_USB_ETHER_LAN78XX=y > > > > +CONFIG_USB_ETHER_SMSC95XX=y > > > > +CONFIG_DM_VIDEO=y > > > > +# CONFIG_VIDEO_BPP8 is not set > > > > +# CONFIG_VIDEO_BPP16 is not set > > > > +CONFIG_SYS_WHITE_ON_BLACK=y > > > > +CONFIG_CONSOLE_SCROLL_LINES=10 > > > > +CONFIG_PHYS_TO_BUS=y > > > > +CONFIG_OF_LIBFDT_OVERLAY=y > > > > -- > > > > 2.24.3 (Apple Git-128) > > > > > > > > -- > > Toshifumi NISHINAGA -- Toshifumi NISHINAGA
Re: [PATCH] Add support for Raspberry Pi 3B+(32bit)
On Tue, Apr 20, 2021 at 11:57 AM Toshifumi NISHINAGA wrote: > > Hello Peter. > > > As that config works > > just fine on all variants of the RPi3 inc the B, B+, A+ and CM3 > > Yes. It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, > but only the network card doesn't work. > Because the network cards used in the 3B and 3B+ are different. The both the network cards are included in both configs, surely it would be less confusing for users to detect the variant and load the correct DT to ensure the network card does work, there's numerous examples of this in U-Boot already > This difference is hard to notice, > so I want to add a new defconfig for Raspberry Pi 3B+. > > > Regards, > Toshifumi NISHINAGA > > 2021年4月20日(火) 19:28 Peter Robinson : > > > > On Tue, Apr 20, 2021 at 7:05 AM Toshifumi NISHINAGA > > wrote: > > > > > > Hello all. > > > > > > I will add rpi_3_32b_plus_defconfig to easy to build u-boot for > > > Raspberry Pi 3B+(32bit). > > > > What does this provide over rpi_3_32b_defconfig? As that config works > > just fine on all variants of the RPi3 inc the B, B+, A+ and CM3 I > > don't see the point in confusing things with an unnecessary config. > > > > > Could you merge this patch? > > > > > > Thanks, > > > Toshifumi NISHINAGA > > > > > > > > > From 28d13f48761ab7c137a5fdf07c76a857967e3590 Mon Sep 17 00:00:00 2001 > > > From: Toshifumi NISHINAGA > > > Date: Thu, 15 Apr 2021 16:53:33 +0900 > > > Subject: [PATCH] Add support for Raspberry Pi 3B+(32bit) > > > MIME-Version: 1.0 > > > Content-Type: text/plain; charset=UTF-8 > > > Content-Transfer-Encoding: 8bit > > > > > > It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, > > > but the network card doesn't work. > > > > > > This defconfig is based on rpi_3_32b_defconfig. > > > > > > Signed-off-by: Toshifumi NISHINAGA > > > --- > > > > > > configs/rpi_3_32b_plus_defconfig | 46 > > > 1 file changed, 46 insertions(+) > > > create mode 100644 configs/rpi_3_32b_plus_defconfig > > > > > > diff --git a/configs/rpi_3_32b_plus_defconfig > > > b/configs/rpi_3_32b_plus_defconfig > > > new file mode 100644 > > > index 00..d147a46ae7 > > > --- /dev/null > > > +++ b/configs/rpi_3_32b_plus_defconfig > > > @@ -0,0 +1,46 @@ > > > +CONFIG_ARM=y > > > +CONFIG_ARCH_CPU_INIT=y > > > +CONFIG_ARCH_BCM283X=y > > > +CONFIG_SYS_TEXT_BASE=0x8000 > > > +CONFIG_TARGET_RPI_3_32B=y > > > +CONFIG_SYS_MALLOC_F_LEN=0x2000 > > > +CONFIG_NR_DRAM_BANKS=1 > > > +CONFIG_ENV_SIZE=0x4000 > > > +CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" > > > +CONFIG_DISTRO_DEFAULTS=y > > > +CONFIG_OF_BOARD_SETUP=y > > > +CONFIG_USE_PREBOOT=y > > > +# CONFIG_DISPLAY_CPUINFO is not set > > > +# CONFIG_DISPLAY_BOARDINFO is not set > > > +CONFIG_MISC_INIT_R=y > > > +CONFIG_SYS_PROMPT="U-Boot> " > > > +CONFIG_CMD_GPIO=y > > > +CONFIG_CMD_MMC=y > > > +CONFIG_CMD_USB=y > > > +CONFIG_CMD_FS_UUID=y > > > +CONFIG_OF_EMBED=y > > > +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" > > > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > > > +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y > > > +CONFIG_DM_MMC=y > > > +CONFIG_MMC_SDHCI=y > > > +CONFIG_MMC_SDHCI_BCM2835=y > > > +CONFIG_PHYLIB=y > > > +CONFIG_DM_ETH=y > > > +CONFIG_PINCTRL=y > > > +# CONFIG_PINCTRL_GENERIC is not set > > > +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set > > > +CONFIG_USB=y > > > +CONFIG_DM_USB=y > > > +CONFIG_USB_DWC2=y > > > +CONFIG_USB_KEYBOARD=y > > > +CONFIG_USB_HOST_ETHER=y > > > +CONFIG_USB_ETHER_LAN78XX=y > > > +CONFIG_USB_ETHER_SMSC95XX=y > > > +CONFIG_DM_VIDEO=y > > > +# CONFIG_VIDEO_BPP8 is not set > > > +# CONFIG_VIDEO_BPP16 is not set > > > +CONFIG_SYS_WHITE_ON_BLACK=y > > > +CONFIG_CONSOLE_SCROLL_LINES=10 > > > +CONFIG_PHYS_TO_BUS=y > > > +CONFIG_OF_LIBFDT_OVERLAY=y > > > -- > > > 2.24.3 (Apple Git-128) > > > > -- > Toshifumi NISHINAGA
RE: [Uboot-stm32] [PATCH 2/2] cmd: pinmux: support pin name in status command
Hi Patrick
-Original Message-
From: Uboot-stm32 On Behalf
Of Patrick DELAUNAY
Sent: mercredi 28 octobre 2020 11:07
To: u-boot@lists.denx.de
Cc: U-Boot STM32 ; Simon Glass
; Patrick DELAUNAY ; Sean Anderson
Subject: [Uboot-stm32] [PATCH 2/2] cmd: pinmux: support pin name in status
command
Allow pin name parameter for pimux staus command, as gpio command to get status
of one pin.
The possible usage of the command is:
> pinmux dev pinctrl
> pinmux status
> pinmux status -a
> pinmux status
Signed-off-by: Patrick Delaunay
---
cmd/pinmux.c | 41 +---
test/py/tests/test_pinmux.py | 29 +
2 files changed, 58 insertions(+), 12 deletions(-)
diff --git a/cmd/pinmux.c b/cmd/pinmux.c index af04c95a46..e096f16982 100644
--- a/cmd/pinmux.c
+++ b/cmd/pinmux.c
@@ -41,19 +41,20 @@ static int do_dev(struct cmd_tbl *cmdtp, int flag, int argc,
return CMD_RET_SUCCESS;
}
-static void show_pinmux(struct udevice *dev)
+static bool show_pinmux(struct udevice *dev, char *name)
{
char pin_name[PINNAME_SIZE];
char pin_mux[PINMUX_SIZE];
int pins_count;
int i;
int ret;
+ bool found = false;
pins_count = pinctrl_get_pins_count(dev);
if (pins_count < 0) {
printf("Ops get_pins_count not supported by %s\n", dev->name);
- return;
+ return found;
}
for (i = 0; i < pins_count; i++) {
@@ -61,43 +62,59 @@ static void show_pinmux(struct udevice *dev)
if (ret) {
printf("Ops get_pin_name error (%d) by %s\n",
ret, dev->name);
- return;
+ return found;
}
-
+ if (name && strcmp(name, pin_name))
+ continue;
+ found = true;
ret = pinctrl_get_pin_muxing(dev, i, pin_mux, PINMUX_SIZE);
if (ret) {
printf("Ops get_pin_muxing error (%d) by %s in %s\n",
ret, pin_name, dev->name);
- return;
+ return found;
}
printf("%-*s: %-*s\n", PINNAME_SIZE, pin_name,
PINMUX_SIZE, pin_mux);
}
+
+ return found;
}
static int do_status(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
struct udevice *dev;
+ char *name;
+ bool found = false;
if (argc < 2) {
if (!currdev) {
printf("pin-controller device not selected\n");
return CMD_RET_FAILURE;
}
- show_pinmux(currdev);
+ show_pinmux(currdev, NULL);
return CMD_RET_SUCCESS;
}
if (strcmp(argv[1], "-a"))
- return CMD_RET_USAGE;
+ name = argv[1];
+ else
+ name = NULL;
uclass_foreach_dev_probe(UCLASS_PINCTRL, dev) {
- /* insert a separator between each pin-controller display */
- printf("--\n");
- printf("%s:\n", dev->name);
- show_pinmux(dev);
+ if (!name) {
+ /* insert a separator between each pin-controller
display */
+ printf("--\n");
+ printf("%s:\n", dev->name);
+ }
+ if (show_pinmux(dev, name))
+ found = true;
+ }
+
+ if (name && !found) {
+ printf("%s not found\n", name);
+ return CMD_RET_FAILURE;
}
return CMD_RET_SUCCESS;
@@ -148,5 +165,5 @@ U_BOOT_CMD(pinmux, CONFIG_SYS_MAXARGS, 1, do_pinmux,
"show pin-controller muxing",
"list - list UCLASS_PINCTRL devices\n"
"pinmux dev [pincontroller-name] - select pin-controller device\n"
- "pinmux status [-a] - print pin-controller muxing [for
all]\n"
+ "pinmux status [-a | pin-name] - print pin-controller muxing [for
all | for pin-name]\n"
)
diff --git a/test/py/tests/test_pinmux.py b/test/py/tests/test_pinmux.py index
b3ae2ab024..fbde1d99b1 100644
--- a/test/py/tests/test_pinmux.py
+++ b/test/py/tests/test_pinmux.py
@@ -82,3 +82,32 @@ def test_pinmux_status(u_boot_console):
assert ('P6: GPIO1 drive-open-drain.' in output)
assert ('P7: GPIO2 bias-pull-down input-enable.' in output)
assert ('P8: GPIO3 bias-disable.' in output)
+
+@pytest.mark.buildconfigspec('cmd_pinmux')
+@pytest.mark.boardspec('sandbox')
+def test_pinmux_status_pinname(u_boot_console):
+"""Test that 'pinmux status ' displays selected pin."""
+
+output = u_boot_console.run_command('pinmux status a5')
+assert ('a5
RE: [Uboot-stm32] [PATCH 1/2] cmd: pinmux: update result of do_status
Hi Patrick
-Original Message-
From: Uboot-stm32 On Behalf
Of Patrick DELAUNAY
Sent: mercredi 28 octobre 2020 11:07
To: u-boot@lists.denx.de
Cc: U-Boot STM32 ; Simon Glass
; Patrick DELAUNAY ; Sean Anderson
Subject: [Uboot-stm32] [PATCH 1/2] cmd: pinmux: update result of do_status
Update the result of do_status and alway returns a CMD_RET_ value (-ENOSYS was
a possible result of show_pinmux).
This patch also adds pincontrol name in error messages (dev->name) and treats
correctly the status sub command when pin-controller device is not selected.
Signed-off-by: Patrick Delaunay
---
cmd/pinmux.c | 44 +++-
test/py/tests/test_pinmux.py | 4 ++--
2 files changed, 25 insertions(+), 23 deletions(-)
diff --git a/cmd/pinmux.c b/cmd/pinmux.c index 9942b15419..af04c95a46 100644
--- a/cmd/pinmux.c
+++ b/cmd/pinmux.c
@@ -41,7 +41,7 @@ static int do_dev(struct cmd_tbl *cmdtp, int flag, int argc,
return CMD_RET_SUCCESS;
}
-static int show_pinmux(struct udevice *dev)
+static void show_pinmux(struct udevice *dev)
{
char pin_name[PINNAME_SIZE];
char pin_mux[PINMUX_SIZE];
@@ -51,54 +51,56 @@ static int show_pinmux(struct udevice *dev)
pins_count = pinctrl_get_pins_count(dev);
- if (pins_count == -ENOSYS) {
- printf("Ops get_pins_count not supported\n");
- return pins_count;
+ if (pins_count < 0) {
+ printf("Ops get_pins_count not supported by %s\n", dev->name);
+ return;
}
for (i = 0; i < pins_count; i++) {
ret = pinctrl_get_pin_name(dev, i, pin_name, PINNAME_SIZE);
- if (ret == -ENOSYS) {
- printf("Ops get_pin_name not supported\n");
- return ret;
+ if (ret) {
+ printf("Ops get_pin_name error (%d) by %s\n",
+ ret, dev->name);
+ return;
}
ret = pinctrl_get_pin_muxing(dev, i, pin_mux, PINMUX_SIZE);
if (ret) {
- printf("Ops get_pin_muxing error (%d)\n", ret);
- return ret;
+ printf("Ops get_pin_muxing error (%d) by %s in %s\n",
+ ret, pin_name, dev->name);
+ return;
}
printf("%-*s: %-*s\n", PINNAME_SIZE, pin_name,
PINMUX_SIZE, pin_mux);
}
-
- return 0;
}
static int do_status(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
struct udevice *dev;
- int ret = CMD_RET_USAGE;
- if (currdev && (argc < 2 || strcmp(argv[1], "-a")))
- return show_pinmux(currdev);
+ if (argc < 2) {
+ if (!currdev) {
+ printf("pin-controller device not selected\n");
+ return CMD_RET_FAILURE;
+ }
+ show_pinmux(currdev);
+ return CMD_RET_SUCCESS;
+ }
- if (argc < 2 || strcmp(argv[1], "-a"))
- return ret;
+ if (strcmp(argv[1], "-a"))
+ return CMD_RET_USAGE;
uclass_foreach_dev_probe(UCLASS_PINCTRL, dev) {
/* insert a separator between each pin-controller display */
printf("--\n");
printf("%s:\n", dev->name);
- ret = show_pinmux(dev);
- if (ret < 0)
- printf("Can't display pin muxing for %s\n",
- dev->name);
+ show_pinmux(dev);
}
- return ret;
+ return CMD_RET_SUCCESS;
}
static int do_list(struct cmd_tbl *cmdtp, int flag, int argc, diff --git
a/test/py/tests/test_pinmux.py b/test/py/tests/test_pinmux.py index
0cbbae000c..b3ae2ab024 100644
--- a/test/py/tests/test_pinmux.py
+++ b/test/py/tests/test_pinmux.py
@@ -13,9 +13,9 @@ def test_pinmux_usage_1(u_boot_console):
@pytest.mark.buildconfigspec('cmd_pinmux')
def test_pinmux_usage_2(u_boot_console):
"""Test that 'pinmux status' executed without previous "pinmux dev"
-command displays pinmux usage."""
+command displays error message."""
output = u_boot_console.run_command('pinmux status')
-assert 'Usage:' in output
+assert 'pin-controller device not selected' in output
@pytest.mark.buildconfigspec('cmd_pinmux')
@pytest.mark.boardspec('sandbox')
Reviewed-by: Patrice Chotard
Thanks
Patrice
--
2.17.1
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Re: [PATCH v3 5/5] test: Add gpio-sysinfo test
On Wed, Mar 31, 2021 at 01:50:40PM -0400, Sean Anderson wrote: > This adds a test for the gpio-sysinfo driver. > > Signed-off-by: Sean Anderson > Reviewed-by: Simon Glass This test no longer passes. Can you please rebase the series and retest? Thanks. -- Tom signature.asc Description: PGP signature
Re: [PATCH] Add support for Raspberry Pi 3B+(32bit)
Hello Peter. > As that config works > just fine on all variants of the RPi3 inc the B, B+, A+ and CM3 Yes. It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, but only the network card doesn't work. Because the network cards used in the 3B and 3B+ are different. This difference is hard to notice, so I want to add a new defconfig for Raspberry Pi 3B+. Regards, Toshifumi NISHINAGA 2021年4月20日(火) 19:28 Peter Robinson : > > On Tue, Apr 20, 2021 at 7:05 AM Toshifumi NISHINAGA > wrote: > > > > Hello all. > > > > I will add rpi_3_32b_plus_defconfig to easy to build u-boot for > > Raspberry Pi 3B+(32bit). > > What does this provide over rpi_3_32b_defconfig? As that config works > just fine on all variants of the RPi3 inc the B, B+, A+ and CM3 I > don't see the point in confusing things with an unnecessary config. > > > Could you merge this patch? > > > > Thanks, > > Toshifumi NISHINAGA > > > > > > From 28d13f48761ab7c137a5fdf07c76a857967e3590 Mon Sep 17 00:00:00 2001 > > From: Toshifumi NISHINAGA > > Date: Thu, 15 Apr 2021 16:53:33 +0900 > > Subject: [PATCH] Add support for Raspberry Pi 3B+(32bit) > > MIME-Version: 1.0 > > Content-Type: text/plain; charset=UTF-8 > > Content-Transfer-Encoding: 8bit > > > > It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, > > but the network card doesn't work. > > > > This defconfig is based on rpi_3_32b_defconfig. > > > > Signed-off-by: Toshifumi NISHINAGA > > --- > > > > configs/rpi_3_32b_plus_defconfig | 46 > > 1 file changed, 46 insertions(+) > > create mode 100644 configs/rpi_3_32b_plus_defconfig > > > > diff --git a/configs/rpi_3_32b_plus_defconfig > > b/configs/rpi_3_32b_plus_defconfig > > new file mode 100644 > > index 00..d147a46ae7 > > --- /dev/null > > +++ b/configs/rpi_3_32b_plus_defconfig > > @@ -0,0 +1,46 @@ > > +CONFIG_ARM=y > > +CONFIG_ARCH_CPU_INIT=y > > +CONFIG_ARCH_BCM283X=y > > +CONFIG_SYS_TEXT_BASE=0x8000 > > +CONFIG_TARGET_RPI_3_32B=y > > +CONFIG_SYS_MALLOC_F_LEN=0x2000 > > +CONFIG_NR_DRAM_BANKS=1 > > +CONFIG_ENV_SIZE=0x4000 > > +CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" > > +CONFIG_DISTRO_DEFAULTS=y > > +CONFIG_OF_BOARD_SETUP=y > > +CONFIG_USE_PREBOOT=y > > +# CONFIG_DISPLAY_CPUINFO is not set > > +# CONFIG_DISPLAY_BOARDINFO is not set > > +CONFIG_MISC_INIT_R=y > > +CONFIG_SYS_PROMPT="U-Boot> " > > +CONFIG_CMD_GPIO=y > > +CONFIG_CMD_MMC=y > > +CONFIG_CMD_USB=y > > +CONFIG_CMD_FS_UUID=y > > +CONFIG_OF_EMBED=y > > +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" > > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > > +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y > > +CONFIG_DM_MMC=y > > +CONFIG_MMC_SDHCI=y > > +CONFIG_MMC_SDHCI_BCM2835=y > > +CONFIG_PHYLIB=y > > +CONFIG_DM_ETH=y > > +CONFIG_PINCTRL=y > > +# CONFIG_PINCTRL_GENERIC is not set > > +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set > > +CONFIG_USB=y > > +CONFIG_DM_USB=y > > +CONFIG_USB_DWC2=y > > +CONFIG_USB_KEYBOARD=y > > +CONFIG_USB_HOST_ETHER=y > > +CONFIG_USB_ETHER_LAN78XX=y > > +CONFIG_USB_ETHER_SMSC95XX=y > > +CONFIG_DM_VIDEO=y > > +# CONFIG_VIDEO_BPP8 is not set > > +# CONFIG_VIDEO_BPP16 is not set > > +CONFIG_SYS_WHITE_ON_BLACK=y > > +CONFIG_CONSOLE_SCROLL_LINES=10 > > +CONFIG_PHYS_TO_BUS=y > > +CONFIG_OF_LIBFDT_OVERLAY=y > > -- > > 2.24.3 (Apple Git-128) -- Toshifumi NISHINAGA
Re: [PATCH] Add support for Raspberry Pi 3B+(32bit)
On Tue, Apr 20, 2021 at 7:05 AM Toshifumi NISHINAGA wrote: > > Hello all. > > I will add rpi_3_32b_plus_defconfig to easy to build u-boot for > Raspberry Pi 3B+(32bit). What does this provide over rpi_3_32b_defconfig? As that config works just fine on all variants of the RPi3 inc the B, B+, A+ and CM3 I don't see the point in confusing things with an unnecessary config. > Could you merge this patch? > > Thanks, > Toshifumi NISHINAGA > > > From 28d13f48761ab7c137a5fdf07c76a857967e3590 Mon Sep 17 00:00:00 2001 > From: Toshifumi NISHINAGA > Date: Thu, 15 Apr 2021 16:53:33 +0900 > Subject: [PATCH] Add support for Raspberry Pi 3B+(32bit) > MIME-Version: 1.0 > Content-Type: text/plain; charset=UTF-8 > Content-Transfer-Encoding: 8bit > > It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, > but the network card doesn't work. > > This defconfig is based on rpi_3_32b_defconfig. > > Signed-off-by: Toshifumi NISHINAGA > --- > > configs/rpi_3_32b_plus_defconfig | 46 > 1 file changed, 46 insertions(+) > create mode 100644 configs/rpi_3_32b_plus_defconfig > > diff --git a/configs/rpi_3_32b_plus_defconfig > b/configs/rpi_3_32b_plus_defconfig > new file mode 100644 > index 00..d147a46ae7 > --- /dev/null > +++ b/configs/rpi_3_32b_plus_defconfig > @@ -0,0 +1,46 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_CPU_INIT=y > +CONFIG_ARCH_BCM283X=y > +CONFIG_SYS_TEXT_BASE=0x8000 > +CONFIG_TARGET_RPI_3_32B=y > +CONFIG_SYS_MALLOC_F_LEN=0x2000 > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_ENV_SIZE=0x4000 > +CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" > +CONFIG_DISTRO_DEFAULTS=y > +CONFIG_OF_BOARD_SETUP=y > +CONFIG_USE_PREBOOT=y > +# CONFIG_DISPLAY_CPUINFO is not set > +# CONFIG_DISPLAY_BOARDINFO is not set > +CONFIG_MISC_INIT_R=y > +CONFIG_SYS_PROMPT="U-Boot> " > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_USB=y > +CONFIG_CMD_FS_UUID=y > +CONFIG_OF_EMBED=y > +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y > +CONFIG_DM_MMC=y > +CONFIG_MMC_SDHCI=y > +CONFIG_MMC_SDHCI_BCM2835=y > +CONFIG_PHYLIB=y > +CONFIG_DM_ETH=y > +CONFIG_PINCTRL=y > +# CONFIG_PINCTRL_GENERIC is not set > +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set > +CONFIG_USB=y > +CONFIG_DM_USB=y > +CONFIG_USB_DWC2=y > +CONFIG_USB_KEYBOARD=y > +CONFIG_USB_HOST_ETHER=y > +CONFIG_USB_ETHER_LAN78XX=y > +CONFIG_USB_ETHER_SMSC95XX=y > +CONFIG_DM_VIDEO=y > +# CONFIG_VIDEO_BPP8 is not set > +# CONFIG_VIDEO_BPP16 is not set > +CONFIG_SYS_WHITE_ON_BLACK=y > +CONFIG_CONSOLE_SCROLL_LINES=10 > +CONFIG_PHYS_TO_BUS=y > +CONFIG_OF_LIBFDT_OVERLAY=y > -- > 2.24.3 (Apple Git-128)
Re: [Uboot-stm32] [PATCH] dfu: dfu_mtd: set max_buf_size to erasesize also for NOR devices
Hi Patrick
On 3/4/21 5:47 PM, Patrick Delaunay wrote:
> For NOR devices the logical DFU buffer size is the sector_size,
> as it is done in dfu_sf.c or in spi/sf_mtd.c
> (sf_mtd_info.erasesize = flash->sector_size)
>
> For NAND the DFU size was already limited to erasesize as
> has_pages = true.
>
> So the mtd dfu backend can use this erasesize for all the MTD devices,
> NOR and NAND with dfu->max_buf_size = mtd->erasesize
>
> This difference was initially copied from MTD command, where
> data is fully available in RAM without size limitation.
>
> This patch avoids to have many sector write in dfu_mtd.c at the end
> of the DFU transfer and avoids issues with USB timeout or WATCHDOG.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/dfu/dfu_mtd.c | 5 +
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/drivers/dfu/dfu_mtd.c b/drivers/dfu/dfu_mtd.c
> index ca67585a7e..7efb3cbd79 100644
> --- a/drivers/dfu/dfu_mtd.c
> +++ b/drivers/dfu/dfu_mtd.c
> @@ -252,7 +252,6 @@ int dfu_fill_entity_mtd(struct dfu_entity *dfu, char
> *devstr, char *s)
> {
> char *st;
> struct mtd_info *mtd;
> - bool has_pages;
> int ret, part;
>
> mtd = get_mtd_device_nm(devstr);
> @@ -262,9 +261,7 @@ int dfu_fill_entity_mtd(struct dfu_entity *dfu, char
> *devstr, char *s)
>
> dfu->dev_type = DFU_DEV_MTD;
> dfu->data.mtd.info = mtd;
> -
> - has_pages = mtd->type == MTD_NANDFLASH || mtd->type == MTD_MLCNANDFLASH;
> - dfu->max_buf_size = has_pages ? mtd->erasesize : 0;
> + dfu->max_buf_size = mtd->erasesize;
>
> st = strsep(, " ");
> if (!strcmp(st, "raw")) {
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH] Add support for Raspberry Pi 3B+(32bit)
Hello, Matthias. > This file is already present [1]. Please provide patches against the latest [1] is for the 64bit mode of Raspberry Pi 3B+, not for the 32bit mode. The Raspberry Pi 3B has 64bit [2] and 32bit [3] mode configs. [1]:https://source.denx.de/u-boot/u-boot/-/blob/master/configs/rpi_3_b_plus_defconfig [2]:https://source.denx.de/u-boot/u-boot/-/blob/master/configs/rpi_3_defconfig [3]: https://source.denx.de/u-boot/u-boot/-/blob/master/configs/rpi_3_32b_defconfig Regards, Toshifumi NISHINAGA 2021年4月20日(火) 18:45 Matthias Brugger : > > > > On 20/04/2021 08:05, Toshifumi NISHINAGA wrote: > > Hello all. > > > > I will add rpi_3_32b_plus_defconfig to easy to build u-boot for > > Raspberry Pi 3B+(32bit). > > Could you merge this patch? > > > > This file is already present [1]. Please provide patches against the latest > U-Boot tree. Is there anything missing in the config? > > Regards, > Matthias > > [1] > https://source.denx.de/u-boot/u-boot/-/blob/master/configs/rpi_3_b_plus_defconfig > > > > Thanks, > > Toshifumi NISHINAGA > > > > > > From 28d13f48761ab7c137a5fdf07c76a857967e3590 Mon Sep 17 00:00:00 2001 > > From: Toshifumi NISHINAGA > > Date: Thu, 15 Apr 2021 16:53:33 +0900 > > Subject: [PATCH] Add support for Raspberry Pi 3B+(32bit) > > MIME-Version: 1.0 > > Content-Type: text/plain; charset=UTF-8 > > Content-Transfer-Encoding: 8bit > > > > It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, > > but the network card doesn't work. > > > > This defconfig is based on rpi_3_32b_defconfig. > > > > Signed-off-by: Toshifumi NISHINAGA > > --- > > > > configs/rpi_3_32b_plus_defconfig | 46 > > 1 file changed, 46 insertions(+) > > create mode 100644 configs/rpi_3_32b_plus_defconfig > > > > diff --git a/configs/rpi_3_32b_plus_defconfig > > b/configs/rpi_3_32b_plus_defconfig > > new file mode 100644 > > index 00..d147a46ae7 > > --- /dev/null > > +++ b/configs/rpi_3_32b_plus_defconfig > > @@ -0,0 +1,46 @@ > > +CONFIG_ARM=y > > +CONFIG_ARCH_CPU_INIT=y > > +CONFIG_ARCH_BCM283X=y > > +CONFIG_SYS_TEXT_BASE=0x8000 > > +CONFIG_TARGET_RPI_3_32B=y > > +CONFIG_SYS_MALLOC_F_LEN=0x2000 > > +CONFIG_NR_DRAM_BANKS=1 > > +CONFIG_ENV_SIZE=0x4000 > > +CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" > > +CONFIG_DISTRO_DEFAULTS=y > > +CONFIG_OF_BOARD_SETUP=y > > +CONFIG_USE_PREBOOT=y > > +# CONFIG_DISPLAY_CPUINFO is not set > > +# CONFIG_DISPLAY_BOARDINFO is not set > > +CONFIG_MISC_INIT_R=y > > +CONFIG_SYS_PROMPT="U-Boot> " > > +CONFIG_CMD_GPIO=y > > +CONFIG_CMD_MMC=y > > +CONFIG_CMD_USB=y > > +CONFIG_CMD_FS_UUID=y > > +CONFIG_OF_EMBED=y > > +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" > > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > > +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y > > +CONFIG_DM_MMC=y > > +CONFIG_MMC_SDHCI=y > > +CONFIG_MMC_SDHCI_BCM2835=y > > +CONFIG_PHYLIB=y > > +CONFIG_DM_ETH=y > > +CONFIG_PINCTRL=y > > +# CONFIG_PINCTRL_GENERIC is not set > > +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set > > +CONFIG_USB=y > > +CONFIG_DM_USB=y > > +CONFIG_USB_DWC2=y > > +CONFIG_USB_KEYBOARD=y > > +CONFIG_USB_HOST_ETHER=y > > +CONFIG_USB_ETHER_LAN78XX=y > > +CONFIG_USB_ETHER_SMSC95XX=y > > +CONFIG_DM_VIDEO=y > > +# CONFIG_VIDEO_BPP8 is not set > > +# CONFIG_VIDEO_BPP16 is not set > > +CONFIG_SYS_WHITE_ON_BLACK=y > > +CONFIG_CONSOLE_SCROLL_LINES=10 > > +CONFIG_PHYS_TO_BUS=y > > +CONFIG_OF_LIBFDT_OVERLAY=y > > > -- Toshifumi NISHINAGA
RE: [PATCH 2/2] drivers: mmc: add OpenPiton MMC support
Hi Bin,
Thanks for the input, will fix as suggested.
Best regards,
Tianrui
> -Original Message-
> From: Bin Meng
> Sent: Tuesday, April 20, 2021 5:42 PM
> To: Tianrui Wei
> Cc: U-Boot Mailing List ; Leo Yu-Chi Liang
> ; Rick Chen ; Pantelis
> Antoniou
> Subject: Re: [PATCH 2/2] drivers: mmc: add OpenPiton MMC support
>
> On Tue, Apr 20, 2021 at 1:17 PM Tianrui Wei
> wrote:
> >
> > From b8736bf498afc0d250228b0c29f1b402d0d58361 Mon Sep 17
> 00:00:00 2001
> > From: Tianrui Wei
> > Date: Mon, 20 April 2021 13:03:25 +0800
> > Subject: [PATCH 2/2] drivers: mmc: add OpenPiton MMC support
> >
> > This patch enables support for OpenPiton MMC in u-boot
>
> nits: u-boot => U-Boot
>
> >
> > Signed-off-by: Tianrui Wei
> > Acked-by: Jonathan Balkind
> >
> > ---
> >
> > drivers/mmc/Kconfig | 5 +
> > drivers/mmc/Makefile| 1 +
> > drivers/mmc/piton_mmc.c | 184
> > 3 files changed, 190 insertions(+)
> > create mode 100644 drivers/mmc/piton_mmc.c
> >
> > diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> > index 14d79139..8cbcd082 100644
> > --- a/drivers/mmc/Kconfig
> > +++ b/drivers/mmc/Kconfig
> > @@ -707,6 +707,11 @@ config MMC_SUNXI_HAS_MODE_SWITCH
> > bool
> > depends on MMC_SUNXI
> >
> > +config MMC_PITON
> > + bool "MMC support for openpiton SoC"
> > + help
> > +This driver enables sd card support in uboot port for openpiton
>
> uboot => U-Boot
>
> > +
> > config GENERIC_ATMEL_MCI
> > bool "Atmel Multimedia Card Interface support"
> > depends on DM_MMC && BLK && ARCH_AT91
> > diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> > index 1c849cba..698dfe05 100644
> > --- a/drivers/mmc/Makefile
> > +++ b/drivers/mmc/Makefile
> > @@ -71,6 +71,7 @@ obj-$(CONFIG_MMC_SDHCI_XENON) +=
> xenon_sdhci.o
> > obj-$(CONFIG_MMC_SDHCI_ZYNQ) += zynq_sdhci.o
> >
> > obj-$(CONFIG_MMC_SUNXI)+= sunxi_mmc.o
> > +obj-$(CONFIG_MMC_PITON)+= piton_mmc.o
> > obj-$(CONFIG_MMC_UNIPHIER) += tmio-common.o uniphier-
> sd.o
> > obj-$(CONFIG_RENESAS_SDHI) += tmio-common.o renesas-
> sdhi.o
> > obj-$(CONFIG_MMC_BCM2835) += bcm2835_sdhost.o
> > diff --git a/drivers/mmc/piton_mmc.c b/drivers/mmc/piton_mmc.c
> > new file mode 100644
> > index ..a749f30a
> > --- /dev/null
> > +++ b/drivers/mmc/piton_mmc.c
> > @@ -0,0 +1,184 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * (C) Copyright 2009 SAMSUNG Electronics
> > + * Minkyu Kang
> > + * Jaehoon Chung
> > + * Portions Copyright 2011-2019 NVIDIA Corporation
> > + * Portions Copyright 2021 Tianrui Wei
> > + * Tianrui Wei
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +struct piton_mmc_plat {
> > + struct mmc_config cfg;
> > + struct mmc mmc;
> > +};
> > +
> > +struct piton_mmc_priv {
> > + u64 piton_mmc_base_addr; /* peripheral id */
> > +};
> > +
> > +// see mmc_read_blocks to see how it is used.
> > +// start block is hidden at cmd->arg
> > +// also, initialize the block size at init
>
> Don't use //
>
> > +static int piton_mmc_send_cmd(
> > + struct udevice *dev,
> > + struct mmc_cmd *cmd,
> > + struct mmc_data *data
> > +)
> > +{
> > + // check first if this is a pure command
> > + if (data == NULL) {
> > + return 0;
> > + }
> > +
> > + // byte count counts all the bytes required for this command
> > + u64 byte_cnt = data->blocks * data->blocksize;
> > + // get which block in mmc card to start from
> > + u64 start_block = cmd->cmdarg;
> > + // buff points to the address we store the data stored at mmc card
> > + unsigned *buff = (unsigned int *) data->dest;
> > +
> > + struct piton_mmc_priv *priv = dev_get_priv(dev);
> > + // start address denotes the absolute address where the
> transmission start
> > + u64 start_addr = priv->piton_mmc_base_addr + (start_block);
> > +
> > + /* if data is not empty*/
> > + if (data) {
> > +
> > + /* if there is a read */
> > + if (data->flags & MMC_DATA_READ) {
> > + for (u64 i = 0; i < byte_cnt; i += 4) {
> > + *(buff) = readl((void *)(start_addr + i));
> > + buff++;
> > + }
> > + } else {
> > + /* else there is a write
> > +* we don't handle write, so error right away
> > +*/
> > + return -ENODEV;
> > + }
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int piton_mmc_ofdata_to_platdata(struct udevice *dev)
>
RE: [PATCH 1/2] riscv: board: Support Openpiton Soc
Hi Bin,
Many thanks for taking you time to review our patch, will fix the things
you've mentioned.
> -Original Message-
> From: Bin Meng
> Sent: Tuesday, April 20, 2021 5:41 PM
> To: Tianrui Wei
> Cc: U-Boot Mailing List ; Leo Yu-Chi Liang
> ; Rick Chen ; Pantelis
> Antoniou
> Subject: Re: [PATCH 1/2] riscv: board: Support Openpiton Soc
>
> Hi Tianrui,
>
> On Tue, Apr 20, 2021 at 1:16 PM Tianrui Wei wrote:
> >
> > From b8736bf498afc0d250228b0c29f1b402d0d58361 Mon Sep 17 00:00:00
> 2001
> > From: Tianrui Wei
> > Date: Mon, 20 April 2021 13:03:25 +0800
> > Subject: [PATCH 1/2] riscv: board: Support Openpiton Soc
> >
> > This patch enables support for OpenPiton risc-v SoC on
>
> nits: risc-v => RISC-V
>
> > Digilent Genesys2 FPGA with dual cores configuration
> >
> > Signed-off-by: Tianrui Wei
> > Acked-by: Jonathan Balkind
> >
> > ---
> >
> > arch/riscv/Kconfig | 4 +
> > arch/riscv/dts/Makefile | 1 +
> > arch/riscv/dts/openpiton-riscv64.dts| 160 +
> > board/openpiton/riscv/Kconfig | 42 ++
> > board/openpiton/riscv/MAINTAINERS | 6 +
> > board/openpiton/riscv/Makefile | 5 +
> > board/openpiton/riscv/openpiton-riscv.c | 41 ++
> > configs/openpiton_riscv64_defconfig | 132 +
> > include/configs/openpiton-riscv.h | 58
> > 9 files changed, 449 insertions(+)
> > create mode 100644 arch/riscv/dts/openpiton-riscv64.dts
> > create mode 100644 board/openpiton/riscv/Kconfig create mode 100644
> > board/openpiton/riscv/MAINTAINERS create mode 100644
> > board/openpiton/riscv/Makefile create mode 100644
> > board/openpiton/riscv/openpiton-riscv.c
> > create mode 100644 configs/openpiton_riscv64_defconfig
> > create mode 100644 include/configs/openpiton-riscv.h
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index
> > 30b05408..79f2b0b9 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -23,6 +23,9 @@ config TARGET_SIFIVE_FU540 config
> > TARGET_SIPEED_MAIX
> > bool "Support Sipeed Maix Board"
> >
> > +config TARGET_OPENPITON_RISCV
> > +bool "Support riscv cores on openpiton SoC"
>
> What's the official board name for this?
Openpiton is an SoC generator targeting various FPGA dev boards, you
could see it at openpiton.org. So the official board name is OpenPiton.
>
> > +
> > endchoice
> >
> > config SYS_ICACHE_OFF
> > @@ -57,6 +60,7 @@ source "board/emulation/qemu-riscv/Kconfig"
> > source "board/microchip/mpfs_icicle/Kconfig"
> > source "board/sifive/fu540/Kconfig"
> > source "board/sipeed/maix/Kconfig"
> > +source "board/openpiton/riscv/Kconfig"
>
> nits: please keep it sorted
>
> >
> > # platform-specific options below
> > source "arch/riscv/cpu/ax25/Kconfig"
> > diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index
> > 3a6f96c6..0eb8014b 100644
> > --- a/arch/riscv/dts/Makefile
> > +++ b/arch/riscv/dts/Makefile
> > @@ -3,6 +3,7 @@
> > dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
> > dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
> > dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
> > +dtb-$(CONFIG_TARGET_OPENPITON_RISCV) += openpiton-riscv64.dtb
>
> ditto
>
> >
> > targets += $(dtb-y)
> >
> > diff --git a/arch/riscv/dts/openpiton-riscv64.dts
> > b/arch/riscv/dts/openpiton-riscv64.dts
> > new file mode 100644
> > index ..9ef8280e
> > --- /dev/null
> > +++ b/arch/riscv/dts/openpiton-riscv64.dts
> > @@ -0,0 +1,160 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/* Copyright (c) 2021 Tianrui Wei */
> > +
> > +// This dts is for a dual core instance of OpenPiton+Ariane built //
> > +to run on a Digilent Genesys 2 FPGA at 66.67MHz. These files // are
> > +automatically generated by the OpenPiton build system and // this
> > +configuration may not be what you need if your configuration // is
> > +different from the below.
>
> Please avoid using // for multi-line comment blocks
>
> > +
> > +/dts-v1/;
> > +
> > +/ {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + u-boot,dm-pre-reloc;
> > + compatible = "openpiton,ariane";
> > +
> > + chosen {
> > + u-boot,dm-pre-reloc;
> > + bootargs = "debug loglevel=9";
>
> Above two seem to be unnecessary
>
> > + stdout-path = "uart0:115200";
> > + };
> > +
> > + aliases {
> > + u-boot,dm-pre-reloc;
>
> This seems unnecessary
>
> > + console =
> > + serial0 =
> > + };
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + u-boot,dm-pre-reloc;
> > + timebase-frequency = <520835>;
> > +
> > + CPU0: cpu@0 {
> > + clock-frequency = <7000>;
> > + u-boot,dm-pre-reloc;
> > + device_type =
Re: [PATCH] Add support for Raspberry Pi 3B+(32bit)
On 20/04/2021 08:05, Toshifumi NISHINAGA wrote: > Hello all. > > I will add rpi_3_32b_plus_defconfig to easy to build u-boot for > Raspberry Pi 3B+(32bit). > Could you merge this patch? > This file is already present [1]. Please provide patches against the latest U-Boot tree. Is there anything missing in the config? Regards, Matthias [1] https://source.denx.de/u-boot/u-boot/-/blob/master/configs/rpi_3_b_plus_defconfig > Thanks, > Toshifumi NISHINAGA > > > From 28d13f48761ab7c137a5fdf07c76a857967e3590 Mon Sep 17 00:00:00 2001 > From: Toshifumi NISHINAGA > Date: Thu, 15 Apr 2021 16:53:33 +0900 > Subject: [PATCH] Add support for Raspberry Pi 3B+(32bit) > MIME-Version: 1.0 > Content-Type: text/plain; charset=UTF-8 > Content-Transfer-Encoding: 8bit > > It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, > but the network card doesn't work. > > This defconfig is based on rpi_3_32b_defconfig. > > Signed-off-by: Toshifumi NISHINAGA > --- > > configs/rpi_3_32b_plus_defconfig | 46 > 1 file changed, 46 insertions(+) > create mode 100644 configs/rpi_3_32b_plus_defconfig > > diff --git a/configs/rpi_3_32b_plus_defconfig > b/configs/rpi_3_32b_plus_defconfig > new file mode 100644 > index 00..d147a46ae7 > --- /dev/null > +++ b/configs/rpi_3_32b_plus_defconfig > @@ -0,0 +1,46 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_CPU_INIT=y > +CONFIG_ARCH_BCM283X=y > +CONFIG_SYS_TEXT_BASE=0x8000 > +CONFIG_TARGET_RPI_3_32B=y > +CONFIG_SYS_MALLOC_F_LEN=0x2000 > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_ENV_SIZE=0x4000 > +CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" > +CONFIG_DISTRO_DEFAULTS=y > +CONFIG_OF_BOARD_SETUP=y > +CONFIG_USE_PREBOOT=y > +# CONFIG_DISPLAY_CPUINFO is not set > +# CONFIG_DISPLAY_BOARDINFO is not set > +CONFIG_MISC_INIT_R=y > +CONFIG_SYS_PROMPT="U-Boot> " > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_USB=y > +CONFIG_CMD_FS_UUID=y > +CONFIG_OF_EMBED=y > +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y > +CONFIG_DM_MMC=y > +CONFIG_MMC_SDHCI=y > +CONFIG_MMC_SDHCI_BCM2835=y > +CONFIG_PHYLIB=y > +CONFIG_DM_ETH=y > +CONFIG_PINCTRL=y > +# CONFIG_PINCTRL_GENERIC is not set > +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set > +CONFIG_USB=y > +CONFIG_DM_USB=y > +CONFIG_USB_DWC2=y > +CONFIG_USB_KEYBOARD=y > +CONFIG_USB_HOST_ETHER=y > +CONFIG_USB_ETHER_LAN78XX=y > +CONFIG_USB_ETHER_SMSC95XX=y > +CONFIG_DM_VIDEO=y > +# CONFIG_VIDEO_BPP8 is not set > +# CONFIG_VIDEO_BPP16 is not set > +CONFIG_SYS_WHITE_ON_BLACK=y > +CONFIG_CONSOLE_SCROLL_LINES=10 > +CONFIG_PHYS_TO_BUS=y > +CONFIG_OF_LIBFDT_OVERLAY=y >
Re: [PATCH 2/2] drivers: mmc: add OpenPiton MMC support
On Tue, Apr 20, 2021 at 1:17 PM Tianrui Wei wrote:
>
> From b8736bf498afc0d250228b0c29f1b402d0d58361 Mon Sep 17 00:00:00 2001
> From: Tianrui Wei
> Date: Mon, 20 April 2021 13:03:25 +0800
> Subject: [PATCH 2/2] drivers: mmc: add OpenPiton MMC support
>
> This patch enables support for OpenPiton MMC in u-boot
nits: u-boot => U-Boot
>
> Signed-off-by: Tianrui Wei
> Acked-by: Jonathan Balkind
>
> ---
>
> drivers/mmc/Kconfig | 5 +
> drivers/mmc/Makefile| 1 +
> drivers/mmc/piton_mmc.c | 184
> 3 files changed, 190 insertions(+)
> create mode 100644 drivers/mmc/piton_mmc.c
>
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 14d79139..8cbcd082 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -707,6 +707,11 @@ config MMC_SUNXI_HAS_MODE_SWITCH
> bool
> depends on MMC_SUNXI
>
> +config MMC_PITON
> + bool "MMC support for openpiton SoC"
> + help
> +This driver enables sd card support in uboot port for openpiton
uboot => U-Boot
> +
> config GENERIC_ATMEL_MCI
> bool "Atmel Multimedia Card Interface support"
> depends on DM_MMC && BLK && ARCH_AT91
> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> index 1c849cba..698dfe05 100644
> --- a/drivers/mmc/Makefile
> +++ b/drivers/mmc/Makefile
> @@ -71,6 +71,7 @@ obj-$(CONFIG_MMC_SDHCI_XENON) += xenon_sdhci.o
> obj-$(CONFIG_MMC_SDHCI_ZYNQ) += zynq_sdhci.o
>
> obj-$(CONFIG_MMC_SUNXI)+= sunxi_mmc.o
> +obj-$(CONFIG_MMC_PITON)+= piton_mmc.o
> obj-$(CONFIG_MMC_UNIPHIER) += tmio-common.o uniphier-sd.o
> obj-$(CONFIG_RENESAS_SDHI) += tmio-common.o renesas-sdhi.o
> obj-$(CONFIG_MMC_BCM2835) += bcm2835_sdhost.o
> diff --git a/drivers/mmc/piton_mmc.c b/drivers/mmc/piton_mmc.c
> new file mode 100644
> index ..a749f30a
> --- /dev/null
> +++ b/drivers/mmc/piton_mmc.c
> @@ -0,0 +1,184 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2009 SAMSUNG Electronics
> + * Minkyu Kang
> + * Jaehoon Chung
> + * Portions Copyright 2011-2019 NVIDIA Corporation
> + * Portions Copyright 2021 Tianrui Wei
> + * Tianrui Wei
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +struct piton_mmc_plat {
> + struct mmc_config cfg;
> + struct mmc mmc;
> +};
> +
> +struct piton_mmc_priv {
> + u64 piton_mmc_base_addr; /* peripheral id */
> +};
> +
> +// see mmc_read_blocks to see how it is used.
> +// start block is hidden at cmd->arg
> +// also, initialize the block size at init
Don't use //
> +static int piton_mmc_send_cmd(
> + struct udevice *dev,
> + struct mmc_cmd *cmd,
> + struct mmc_data *data
> +)
> +{
> + // check first if this is a pure command
> + if (data == NULL) {
> + return 0;
> + }
> +
> + // byte count counts all the bytes required for this command
> + u64 byte_cnt = data->blocks * data->blocksize;
> + // get which block in mmc card to start from
> + u64 start_block = cmd->cmdarg;
> + // buff points to the address we store the data stored at mmc card
> + unsigned *buff = (unsigned int *) data->dest;
> +
> + struct piton_mmc_priv *priv = dev_get_priv(dev);
> + // start address denotes the absolute address where the transmission
> start
> + u64 start_addr = priv->piton_mmc_base_addr + (start_block);
> +
> + /* if data is not empty*/
> + if (data) {
> +
> + /* if there is a read */
> + if (data->flags & MMC_DATA_READ) {
> + for (u64 i = 0; i < byte_cnt; i += 4) {
> + *(buff) = readl((void *)(start_addr + i));
> + buff++;
> + }
> + } else {
> + /* else there is a write
> +* we don't handle write, so error right away
> +*/
> + return -ENODEV;
> + }
> + }
> +
> + return 0;
> +}
> +
> +static int piton_mmc_ofdata_to_platdata(struct udevice *dev)
> +{
> + struct piton_mmc_priv *priv = dev_get_priv(dev);
> + struct piton_mmc_plat *plat = dev_get_platdata(dev);
> + struct mmc_config *cfg;
> + struct mmc *mmc;
> +
> + priv->piton_mmc_base_addr = dev_read_addr(dev);
> + cfg = >cfg;
> + cfg->name = "PITON MMC";
> + cfg->host_caps = MMC_MODE_8BIT;
> + cfg->f_max = 10;
> + cfg->f_min = 40;
> + cfg->voltages = MMC_VDD_21_22;
> +
> + mmc = >mmc;
> + mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
> + mmc->capacity_user = 0x1;
> + mmc->capacity_user *= mmc->read_bl_len;
> +
Re: [PATCH 1/2] riscv: board: Support Openpiton Soc
Hi Tianrui,
On Tue, Apr 20, 2021 at 1:16 PM Tianrui Wei wrote:
>
> From b8736bf498afc0d250228b0c29f1b402d0d58361 Mon Sep 17 00:00:00 2001
> From: Tianrui Wei
> Date: Mon, 20 April 2021 13:03:25 +0800
> Subject: [PATCH 1/2] riscv: board: Support Openpiton Soc
>
> This patch enables support for OpenPiton risc-v SoC on
nits: risc-v => RISC-V
> Digilent Genesys2 FPGA with dual cores configuration
>
> Signed-off-by: Tianrui Wei
> Acked-by: Jonathan Balkind
>
> ---
>
> arch/riscv/Kconfig | 4 +
> arch/riscv/dts/Makefile | 1 +
> arch/riscv/dts/openpiton-riscv64.dts| 160 +
> board/openpiton/riscv/Kconfig | 42 ++
> board/openpiton/riscv/MAINTAINERS | 6 +
> board/openpiton/riscv/Makefile | 5 +
> board/openpiton/riscv/openpiton-riscv.c | 41 ++
> configs/openpiton_riscv64_defconfig | 132 +
> include/configs/openpiton-riscv.h | 58
> 9 files changed, 449 insertions(+)
> create mode 100644 arch/riscv/dts/openpiton-riscv64.dts
> create mode 100644 board/openpiton/riscv/Kconfig
> create mode 100644 board/openpiton/riscv/MAINTAINERS
> create mode 100644 board/openpiton/riscv/Makefile
> create mode 100644 board/openpiton/riscv/openpiton-riscv.c
> create mode 100644 configs/openpiton_riscv64_defconfig
> create mode 100644 include/configs/openpiton-riscv.h
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 30b05408..79f2b0b9 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -23,6 +23,9 @@ config TARGET_SIFIVE_FU540
> config TARGET_SIPEED_MAIX
> bool "Support Sipeed Maix Board"
>
> +config TARGET_OPENPITON_RISCV
> +bool "Support riscv cores on openpiton SoC"
What's the official board name for this?
> +
> endchoice
>
> config SYS_ICACHE_OFF
> @@ -57,6 +60,7 @@ source "board/emulation/qemu-riscv/Kconfig"
> source "board/microchip/mpfs_icicle/Kconfig"
> source "board/sifive/fu540/Kconfig"
> source "board/sipeed/maix/Kconfig"
> +source "board/openpiton/riscv/Kconfig"
nits: please keep it sorted
>
> # platform-specific options below
> source "arch/riscv/cpu/ax25/Kconfig"
> diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
> index 3a6f96c6..0eb8014b 100644
> --- a/arch/riscv/dts/Makefile
> +++ b/arch/riscv/dts/Makefile
> @@ -3,6 +3,7 @@
> dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
> dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
> dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
> +dtb-$(CONFIG_TARGET_OPENPITON_RISCV) += openpiton-riscv64.dtb
ditto
>
> targets += $(dtb-y)
>
> diff --git a/arch/riscv/dts/openpiton-riscv64.dts
> b/arch/riscv/dts/openpiton-riscv64.dts
> new file mode 100644
> index ..9ef8280e
> --- /dev/null
> +++ b/arch/riscv/dts/openpiton-riscv64.dts
> @@ -0,0 +1,160 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/* Copyright (c) 2021 Tianrui Wei */
> +
> +// This dts is for a dual core instance of OpenPiton+Ariane built
> +// to run on a Digilent Genesys 2 FPGA at 66.67MHz. These files
> +// are automatically generated by the OpenPiton build system and
> +// this configuration may not be what you need if your configuration
> +// is different from the below.
Please avoid using // for multi-line comment blocks
> +
> +/dts-v1/;
> +
> +/ {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + u-boot,dm-pre-reloc;
> + compatible = "openpiton,ariane";
> +
> + chosen {
> + u-boot,dm-pre-reloc;
> + bootargs = "debug loglevel=9";
Above two seem to be unnecessary
> + stdout-path = "uart0:115200";
> + };
> +
> + aliases {
> + u-boot,dm-pre-reloc;
This seems unnecessary
> + console =
> + serial0 =
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + u-boot,dm-pre-reloc;
> + timebase-frequency = <520835>;
> +
> + CPU0: cpu@0 {
> + clock-frequency = <7000>;
> + u-boot,dm-pre-reloc;
> + device_type = "cpu";
> + reg = <0>;
> + status = "okay";
> + compatible = "eth, ariane", "riscv";
> + riscv,isa = "rv64imafdc";
> + mmu-type = "riscv,sv39";
> + tlb-split;
> + // HLIC - hart local interrupt controller
> + CPU0_intc: interrupt-controller {
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + compatible = "riscv,cpu-intc";
> + };
> + };
> +
> + CPU1: cpu@1 {
> + clock-frequency = <7000>;
> +
Re: [PATCH] arm: allwinner: r40: update R40 DT files from linux 5.12-rc1
On Mon, 19 Apr 2021 12:30:57 +0300
Ivan Uvarov wrote:
> Update R40 .dts{,i} and dt-binding headers to current version from kernel.
>
> Files taken from Linux 5.12-rc1 release
> (commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8)
>
> Signed-off-by: Ivan Uvarov
Looks good to me, thanks for the work!
Can confirm the files are identical to the one from the latest kernel
(5.12-rc8).
Also boot tested my BananaPi M2 Berry and briefly tested SD card, SATA,
USB and network, both in U-Boot and Linux (using that DT).
Reviewed-by: Andre Przywara
Thanks,
Andre
> ---
> arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 23 +-
> arch/arm/dts/sun8i-r40.dtsi | 375
> -- arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts |
> 12 +- include/dt-bindings/clock/sun8i-r40-ccu.h | 6 +-
> .../interrupt-controller/arm-gic.h| 5 +-
> include/dt-bindings/thermal/thermal.h | 3 +-
> 6 files changed, 375 insertions(+), 49 deletions(-)
>
> diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts index
> c488aaacbd..a6a1087a0c 100644 ---
> a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts +++
> b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -129,7 +129,7 @@
> pinctrl-names = "default";
> pinctrl-0 = <_rgmii_pins>;
> phy-handle = <>;
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> phy-supply = <_dc1sw>;
> status = "okay";
> };
> @@ -164,6 +164,10 @@
>
> #include "axp22x.dtsi"
>
> + {
> + status = "okay";
> +};
> +
> {
> vmmc-supply = <_dcdc1>;
> bus-width = <4>;
> @@ -201,10 +205,15 @@
> {
> pinctrl-names = "default";
> pinctrl-0 = <_out_a_pin>;
> + vcc-pa-supply = <_aldo2>;
> + vcc-pc-supply = <_dcdc1>;
> + vcc-pd-supply = <_dcdc1>;
> + vcc-pe-supply = <_eldo1>;
> + vcc-pf-supply = <_dcdc1>;
> + vcc-pg-supply = <_dldo1>;
> };
>
> _aldo2 {
> - regulator-always-on;
> regulator-min-microvolt = <250>;
> regulator-max-microvolt = <250>;
> regulator-name = "vcc-pa";
> @@ -218,16 +227,16 @@
> };
>
> _dc1sw {
> - regulator-min-microvolt = <300>;
> - regulator-max-microvolt = <300>;
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> regulator-name = "vcc-gmac-phy";
> };
>
> _dcdc1 {
> regulator-always-on;
> - regulator-min-microvolt = <300>;
> - regulator-max-microvolt = <300>;
> - regulator-name = "vcc-3v0";
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + regulator-name = "vcc-3v3";
> };
>
> _dcdc2 {
> diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
> index 06b685869f..d5ad3b9efd 100644
> --- a/arch/arm/dts/sun8i-r40.dtsi
> +++ b/arch/arm/dts/sun8i-r40.dtsi
> @@ -44,8 +44,10 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> +#include
>
> / {
> #address-cells = <1>;
> @@ -78,25 +80,25 @@
> #address-cells = <1>;
> #size-cells = <0>;
>
> - cpu@0 {
> + cpu0: cpu@0 {
> compatible = "arm,cortex-a7";
> device_type = "cpu";
> reg = <0>;
> };
>
> - cpu@1 {
> + cpu1: cpu@1 {
> compatible = "arm,cortex-a7";
> device_type = "cpu";
> reg = <1>;
> };
>
> - cpu@2 {
> + cpu2: cpu@2 {
> compatible = "arm,cortex-a7";
> device_type = "cpu";
> reg = <2>;
> };
>
> - cpu@3 {
> + cpu3: cpu@3 {
> compatible = "arm,cortex-a7";
> device_type = "cpu";
> reg = <3>;
> @@ -109,6 +111,22 @@
> status = "disabled";
> };
>
> + thermal-zones {
> + cpu_thermal: cpu0-thermal {
> + /* milliseconds */
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 0>;
> + };
> +
> + gpu_thermal: gpu-thermal {
> + /* milliseconds */
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = < 1>;
> + };
> + };
> +
> soc {
> compatible = "simple-bus";
> #address-cells = <1>;
> @@ -118,11 +136,11 @@
> display_clocks: clock@100 {
> compatible = "allwinner,sun8i-r40-de2-clk",
>"allwinner,sun8i-h3-de2-clk";
> - reg = <0x0100 0x10>;
> - clocks = < CLK_DE>,
> -
[PATCH] ARM: dts: add missing -u-boot.dtsi to enable HDMI on Beelink GTKing/King-Pro
This lacks the right u-boot specific DT include to make HDMI work. Reported-by: B1oHazard Signed-off-by: Neil Armstrong --- arch/arm/dts/meson-g12b-gtking-pro-u-boot.dtsi | 7 +++ arch/arm/dts/meson-g12b-gtking-u-boot.dtsi | 7 +++ 2 files changed, 14 insertions(+) create mode 100644 arch/arm/dts/meson-g12b-gtking-pro-u-boot.dtsi create mode 100644 arch/arm/dts/meson-g12b-gtking-u-boot.dtsi diff --git a/arch/arm/dts/meson-g12b-gtking-pro-u-boot.dtsi b/arch/arm/dts/meson-g12b-gtking-pro-u-boot.dtsi new file mode 100644 index 00..236f2468dc --- /dev/null +++ b/arch/arm/dts/meson-g12b-gtking-pro-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Neil Armstrong + */ + +#include "meson-g12-common-u-boot.dtsi" diff --git a/arch/arm/dts/meson-g12b-gtking-u-boot.dtsi b/arch/arm/dts/meson-g12b-gtking-u-boot.dtsi new file mode 100644 index 00..236f2468dc --- /dev/null +++ b/arch/arm/dts/meson-g12b-gtking-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Neil Armstrong + */ + +#include "meson-g12-common-u-boot.dtsi" -- 2.25.1
[PATCH 2/2] reset: fix reset_get_by_index_nodev index handling
This fixes an issue getting resets index 1 and 3+, the spurius "> 0"
made it return the index 0 or 1, whatever index was passed.
The dm_test_reset_base() did not catch it, but the dm_test_reset_base()
extension
catches it and this fixes the regression.
This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was
disable
even when Linux was booting.
Fixes: ea9dc35aab ("reset: Get the RESET by index without device")
Reported-by: B1oHazard
Signed-off-by: Neil Armstrong
---
drivers/reset/reset-uclass.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index 071c389ca0..ac89eaf098 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -95,7 +95,7 @@ int reset_get_by_index_nodev(ofnode node, int index,
int ret;
ret = ofnode_parse_phandle_with_args(node, "resets", "#reset-cells", 0,
-index > 0, );
+index, );
return reset_get_by_index_tail(ret, node, , "resets",
index > 0, reset_ctl);
--
2.25.1
[PATCH 0/2] reset: fix reset_get_by_index_nodev index handling
A regression weas detected on Amlogic G12A/G12B SoCs, where HDMI output was
disable
even when Linux was booting.
Bisect reports 139e4a1cbe ("drivers: reset: Add a managed API to get reset
controllers from the DT")
as the offending commit.
But the error is in ea9dc35aab ("reset: Get the RESET by index without device")
where a spurius "> 0"
was added to the index handling.
But the dm_test_reset_base() test did not catch it.
The first commit extends the test to catch the regression, and the second patch
fixes the regression.
Neil Armstrong (2):
test: reset: Extend base reset test to catch error
reset: fix reset_get_by_index_nodev index handling
arch/sandbox/dts/test.dts| 4 ++--
drivers/reset/reset-uclass.c | 2 +-
test/dm/reset.c | 39 +++-
3 files changed, 37 insertions(+), 8 deletions(-)
--
2.25.1
[PATCH 1/2] test: reset: Extend base reset test to catch error
With this extended test, we get the following failure :
=> ut dm reset_base
Test: dm_test_reset_base: reset.c
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id ==
reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Test: dm_test_reset_base: reset.c (flat tree)
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id ==
reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Failures: 2
A fix is needed in reset_get_by_index_nodev() when introduced in [1].
[1] ea9dc35aab ("reset: Get the RESET by index without device")
Signed-off-by: Neil Armstrong
---
arch/sandbox/dts/test.dts | 4 ++--
test/dm/reset.c | 39 ++-
2 files changed, 36 insertions(+), 7 deletions(-)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 48240aa26f..4fde923e9a 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -997,8 +997,8 @@
reset-ctl-test {
compatible = "sandbox,reset-ctl-test";
- resets = < 100>, < 2>;
- reset-names = "other", "test";
+ resets = < 100>, < 2>, < 20>, < 40>;
+ reset-names = "other", "test", "test2", "test3";
};
rng {
diff --git a/test/dm/reset.c b/test/dm/reset.c
index fc8e9250b0..9c00452336 100644
--- a/test/dm/reset.c
+++ b/test/dm/reset.c
@@ -24,18 +24,47 @@
static int dm_test_reset_base(struct unit_test_state *uts)
{
struct udevice *dev;
- struct reset_ctl reset_method1;
- struct reset_ctl reset_method2;
+ struct reset_ctl reset_method1, reset_method1_1;
+ struct reset_ctl reset_method2, reset_method2_1;
+ struct reset_ctl reset_method3, reset_method3_1;
+ struct reset_ctl reset_method4, reset_method4_1;
/* Get the device using the reset device */
ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
));
/* Get the same reset port in 2 different ways and compare */
- ut_assertok(reset_get_by_index(dev, 1, _method1));
+ ut_assertok(reset_get_by_index(dev, 0, _method1));
+ ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 0,
+_method1_1));
+ ut_assertok(reset_get_by_index(dev, 1, _method2));
ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 1,
-_method2));
- ut_asserteq(reset_method1.id, reset_method2.id);
+_method2_1));
+ ut_assertok(reset_get_by_index(dev, 2, _method3));
+ ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 2,
+_method3_1));
+ ut_assertok(reset_get_by_index(dev, 3, _method4));
+ ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 3,
+_method4_1));
+
+ ut_asserteq(reset_method1.id, reset_method1_1.id);
+ ut_asserteq(reset_method2.id, reset_method2_1.id);
+ ut_asserteq(reset_method3.id, reset_method3_1.id);
+ ut_asserteq(reset_method4.id, reset_method4_1.id);
+
+ ut_asserteq(true, reset_method1.id != reset_method2.id);
+ ut_asserteq(true, reset_method1.id != reset_method3.id);
+ ut_asserteq(true, reset_method1.id != reset_method4.id);
+ ut_asserteq(true, reset_method2.id != reset_method3.id);
+ ut_asserteq(true, reset_method2.id != reset_method4.id);
+ ut_asserteq(true, reset_method3.id != reset_method4.id);
+
+ ut_asserteq(true, reset_method1_1.id != reset_method2_1.id);
+ ut_asserteq(true, reset_method1_1.id != reset_method3_1.id);
+ ut_asserteq(true, reset_method1_1.id != reset_method4_1.id);
+ ut_asserteq(true, reset_method2_1.id != reset_method3_1.id);
+ ut_asserteq(true, reset_method2_1.id != reset_method4_1.id);
+ ut_asserteq(true, reset_method3_1.id != reset_method4_1.id);
return 0;
}
--
2.25.1
[PATCH v2,RESEND] mmc: mtk-sd: increase the minimum bus frequency
With a 48MHz input clock, the lowest bus frequency can be as low as 4800 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause the mmc framework take seconds to finish the initialization. Limiting the minimum bus frequency to a slightly higher value can solve the issue without any side effects. Reviewed-by: Jaehoon Chung Signed-off-by: Weijie Gao --- drivers/mmc/mtk-sd.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 48a764be82..8599f095bc 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -232,6 +232,8 @@ #define SCLK_CYCLES_SHIFT 20 +#define MIN_BUS_CLK20 + #define CMD_INTS_MASK \ (MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO) @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev) else cfg->f_min = host->src_clk_freq / (4 * 4095); + if (cfg->f_min < MIN_BUS_CLK) + cfg->f_min = MIN_BUS_CLK; + if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq) cfg->f_max = host->src_clk_freq; -- 2.17.1
[PATCH v2,RESEND] mmc: mtk-sd: increase the minimum bus frequency
With a 48MHz input clock, the lowest bus frequency can be as low as 4800 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause the mmc framework take seconds to finish the initialization. Limiting the minimum bus frequency to a slightly higher value can solve the issue without any side effects. Signed-off-by: Weijie Gao --- drivers/mmc/mtk-sd.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 48a764be82..8599f095bc 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -232,6 +232,8 @@ #define SCLK_CYCLES_SHIFT 20 +#define MIN_BUS_CLK20 + #define CMD_INTS_MASK \ (MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO) @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev) else cfg->f_min = host->src_clk_freq / (4 * 4095); + if (cfg->f_min < MIN_BUS_CLK) + cfg->f_min = MIN_BUS_CLK; + if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq) cfg->f_max = host->src_clk_freq; -- 2.17.1
[PATCH v4 10/10] am335x: add support for cape detect functionality
Update the Kconfig and the board file to make the am335x board compatible with cape detection. Signed-off-by: Kory Maincent --- Change Since v1: - Remove CAPE_EEPROM_BUS_NUM from board header arch/arm/mach-omap2/am33xx/Kconfig | 1 + board/ti/am335x/board.c| 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 9a98e8a0a9..11e54cd293 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -34,6 +34,7 @@ config TARGET_AM335X_EVM select DM_GPIO select DM_SERIAL select TI_I2C_BOARD_DETECT + select SUPPORT_EXTENSION_SCAN imply CMD_DM imply SPL_DM imply SPL_DM_SEQ_ALIAS diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 56cdda856c..eb5cbd3b30 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -43,6 +43,7 @@ #include #include #include "../common/board_detect.h" +#include "../common/cape_detect.h" #include "board.h" DECLARE_GLOBAL_DATA_PTR; -- 2.17.1
[PATCH v4 06/10] w1: replace dt detection by automatic detection
This patch changes the functioning of the detection of w1 devices.
The old way was a comparison between detected w1 and the ones described in
the device tree. Now it will just look for the driver matching the family
id of the w1 detected.
The patch is inspired from Maxime Ripard code.
Signed-off-by: Kory Maincent
Reviewed-by: Maxime Ripard
---
Change since v2:
- drop the remove action of devicetree match in the W1 EEPROMs drivers.
- move the w1_device_register function to w1-uclass.
- update the w1_device_register function to be compatible with automatic
detection and devicetree detection. I will not bind the device if it as
been found in the devicetree.
- update the w1 device driver list to have only two parameters in the
U_BOOT_W1_DEVICE function.
drivers/w1-eeprom/ds24xxx.c | 7 +++
drivers/w1-eeprom/ds2502.c | 6 +++
drivers/w1-eeprom/w1-eeprom-uclass.c | 31
drivers/w1/w1-uclass.c | 76 +++-
include/w1-eeprom.h | 2 -
include/w1.h | 17 +++
6 files changed, 104 insertions(+), 35 deletions(-)
diff --git a/drivers/w1-eeprom/ds24xxx.c b/drivers/w1-eeprom/ds24xxx.c
index 0967accdf0..a43ace5a4f 100644
--- a/drivers/w1-eeprom/ds24xxx.c
+++ b/drivers/w1-eeprom/ds24xxx.c
@@ -53,3 +53,10 @@ U_BOOT_DRIVER(ds24xxx) = {
.ops= _ops,
.probe = ds24xxx_probe,
};
+
+u8 family_supported[] = {
+ W1_FAMILY_DS24B33,
+ W1_FAMILY_DS2431,
+};
+
+U_BOOT_W1_DEVICE(ds24xxx, family_supported);
diff --git a/drivers/w1-eeprom/ds2502.c b/drivers/w1-eeprom/ds2502.c
index 19ee4b17ea..b28db5a8eb 100644
--- a/drivers/w1-eeprom/ds2502.c
+++ b/drivers/w1-eeprom/ds2502.c
@@ -243,3 +243,9 @@ U_BOOT_DRIVER(ds2502) = {
.ops= _ops,
.probe = ds2502_probe,
};
+
+u8 family_supported[] = {
+ W1_FAMILY_DS2502,
+};
+
+U_BOOT_W1_DEVICE(ds2502, family_supported);
diff --git a/drivers/w1-eeprom/w1-eeprom-uclass.c
b/drivers/w1-eeprom/w1-eeprom-uclass.c
index d515b4c536..1e5cf3e1fb 100644
--- a/drivers/w1-eeprom/w1-eeprom-uclass.c
+++ b/drivers/w1-eeprom/w1-eeprom-uclass.c
@@ -37,37 +37,6 @@ int w1_eeprom_read_buf(struct udevice *dev, unsigned int
offset,
return ops->read_buf(dev, offset, buf, count);
}
-int w1_eeprom_register_new_device(u64 id)
-{
- u8 family = id & 0xff;
- int ret;
- struct udevice *dev;
-
- for (ret = uclass_first_device(UCLASS_W1_EEPROM, );
-!ret && dev;
-uclass_next_device()) {
- if (ret || !dev) {
- debug("cannot find w1 eeprom dev\n");
- return ret;
- }
- if (dev_get_driver_data(dev) == family) {
- struct w1_device *w1;
-
- w1 = dev_get_parent_platdata(dev);
- if (w1->id) /* device already in use */
- continue;
- w1->id = id;
- debug("%s: Match found: %s:%s %llx\n", __func__,
- dev->name, dev->driver->name, id);
- return 0;
- }
- }
-
- debug("%s: No matches found: error %d\n", __func__, ret);
-
- return ret;
-}
-
int w1_eeprom_get_id(struct udevice *dev, u64 *id)
{
struct w1_device *w1 = dev_get_parent_platdata(dev);
diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c
index 9478c93e9b..3355e4ac14 100644
--- a/drivers/w1/w1-uclass.c
+++ b/drivers/w1/w1-uclass.c
@@ -4,9 +4,11 @@
* Copyright (c) 2015 Free Electrons
* Copyright (c) 2015 NextThing Co.
* Copyright (c) 2018 Microchip Technology, Inc.
+ * Copyright (c) 2021 Bootlin
*
* Maxime Ripard
* Eugen Hristev
+ * Kory Maincent
*
*/
@@ -26,6 +28,76 @@ struct w1_bus {
u64 search_id;
};
+int w1_bus_find_dev(const struct udevice *bus, u64 id, struct udevice
+**devp)
+{
+ struct udevice *dev;
+ u8 family = id & 0xff;
+ int ret;
+
+ for (ret = uclass_first_device(UCLASS_W1_EEPROM, );
+ !ret && dev;
+ uclass_next_device()) {
+ if (ret || !dev) {
+ debug("cannot find w1 eeprom dev\n");
+ return -ENODEV;
+ }
+
+ if (dev_get_driver_data(dev) == family) {
+ *devp = dev;
+ return 0;
+ }
+ }
+
+ return -ENODEV;
+}
+
+int w1_register_new_device(u64 id, struct udevice *bus)
+{
+ u8 family = id & 0xff;
+ int n_ents, ret;
+ struct udevice *dev;
+
+ struct w1_driver_entry *start, *entry;
+
+ start = ll_entry_start(struct w1_driver_entry, w1_driver_entry);
+ n_ents = ll_entry_count(struct w1_driver_entry, w1_driver_entry);
+
+ for (entry = start; entry != start + n_ents; entry++) {
+ const u8
[PATCH v4 09/10] arm: am335x: add support for i2c2 bus
The am335x from BeagleBone use i2c EEPROM to detect capes.
The memory is wired to i2c bus 2 therefore it need to be enabled.
Add i2c2 clock, pinmux description and pinmux enable function.
Signed-off-by: Kory Maincent
---
arch/arm/mach-omap2/am33xx/clock_am33xx.c | 1 +
board/ti/am335x/board.c | 2 ++
board/ti/am335x/board.h | 1 +
board/ti/am335x/mux.c | 15 +++
4 files changed, 19 insertions(+)
diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c
b/arch/arm/mach-omap2/am33xx/clock_am33xx.c
index 2427933c8b..7c67444024 100644
--- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c
+++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c
@@ -220,6 +220,7 @@ void enable_basic_clocks(void)
>gpio2clkctrl,
>gpio3clkctrl,
>i2c1clkctrl,
+ >i2c2clkctrl,
>cpgmac0clkctrl,
>spi0clkctrl,
>rtcclkctrl,
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 984cc5e3ba..56cdda856c 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -76,8 +76,10 @@ static struct ctrl_dev *cdev = (struct ctrl_dev
*)CTRL_DEVICE_BASE;
void do_board_detect(void)
{
enable_i2c0_pin_mux();
+ enable_i2c2_pin_mux();
#ifndef CONFIG_DM_I2C
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED2, CONFIG_SYS_OMAP24_I2C_SLAVE2);
#endif
if (ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
CONFIG_EEPROM_CHIP_ADDRESS))
diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h
index 48df914af9..c2962111c1 100644
--- a/board/ti/am335x/board.h
+++ b/board/ti/am335x/board.h
@@ -93,5 +93,6 @@ void enable_uart3_pin_mux(void);
void enable_uart4_pin_mux(void);
void enable_uart5_pin_mux(void);
void enable_i2c0_pin_mux(void);
+void enable_i2c2_pin_mux(void);
void enable_board_pin_mux(void);
#endif
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 6fb2c009ba..78dc0cca42 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -124,6 +124,14 @@ static struct module_pin_mux i2c1_pin_mux[] = {
{-1},
};
+static struct module_pin_mux i2c2_pin_mux[] = {
+ {OFFSET(uart1_ctsn), (MODE(3) | RXACTIVE |
+ PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_DATA */
+ {OFFSET(uart1_rtsn), (MODE(3) | RXACTIVE |
+ PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_SCLK */
+ {-1},
+};
+
static struct module_pin_mux spi0_pin_mux[] = {
{OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_SCLK */
{OFFSET(spi0_d0), (MODE(0) | RXACTIVE |
@@ -308,6 +316,11 @@ void enable_i2c0_pin_mux(void)
configure_module_pin_mux(i2c0_pin_mux);
}
+void enable_i2c2_pin_mux(void)
+{
+ configure_module_pin_mux(i2c2_pin_mux);
+}
+
/*
* The AM335x GP EVM, if daughter card(s) are connected, can have 8
* different profiles. These profiles determine what peripherals are
@@ -367,6 +380,7 @@ void enable_board_pin_mux(void)
#else
configure_module_pin_mux(mmc1_pin_mux);
#endif
+ configure_module_pin_mux(i2c2_pin_mux);
} else if (board_is_gp_evm()) {
/* General Purpose EVM */
unsigned short profile = detect_daughter_board_profile();
@@ -411,6 +425,7 @@ void enable_board_pin_mux(void)
#else
configure_module_pin_mux(mmc1_pin_mux);
#endif
+ configure_module_pin_mux(i2c2_pin_mux);
} else if (board_is_pb()) {
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
--
2.17.1
[PATCH v4 08/10] configs: CHIP: add support for DIP detect functionality
This commit enables using the extension board detection mechanism on CHIP boards Signed-off-by: Kory Maincent Acked-by: Maxime Ripard --- configs/CHIP_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index a70ee31d40..8d40da090b 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL=y +CONFIG_CHIP_DIP_SCAN=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" -- 2.17.1
[PATCH v4 02/10] cmd: add support for a new "extension" command
This patch adds a new "extension" command, which aims at detecting
extension boards connected to the hardware platform, and apply the
Device Tree overlays that describe the hardware present on those
extension boards.
In order to enable this mechanism, board-specific code must implement
the extension_board_scan() function that fills in a linked list of
"struct extension", each describing one extension board. In addition,
the board-specific code must select the SUPPORT_EXTENSION_SCAN Kconfig
boolean.
Based on this:
- "extension scan" makes the generic code call the board-specific
extension_board_scan() function to retrieve the list of detected
extension boards.
- "extension list" allows to list the detected extension boards.
- "extension apply |all" allows to apply the Device Tree
overlay(s) corresponding to one, or all, extension boards
The latter requires two environment variables to exist and set one variable
to run:
- extension_overlay_addr: the RAM address where to load the Device
Tree overlays
- extension_overlay_cmd: the U-Boot command to load one overlay.
Indeed, the location and mechanism to load DT overlays is very setup
specific.
- extension_overlay_name: set by the command: the name of the DT which
will be load during the execution.
When calling the command described in the extension_overlay_cmd
variable, the variable extension_overlay_name will be defined. So a
typical extension_overlay_cmd will look like this:
extension_overlay_cmd=load mmc 0:1 $extension_overlay_addr
/boot/$extension_overlay_name
Here is an example on how to use it:
=> run loadfdt
=> fdt addr $fdtaddr
=> setenv extension_overlay_addr 0x1000
=> setenv extension_overlay_cmd 'load mmc 0:1 ${extension_overlay_addr}
/boot/${extension_overlay_name}'
=> extension scan
Found 1 extension board(s).
=> extension apply 0
519 bytes read in 3 ms (168.9 KiB/s)
Signed-off-by: Kory Maincent
Reviewed-by: Maxime Ripard
---
Change since v1:
- Add list_for_each_entry loop bracket
- Move doc location and update it to rST
Change since v3:
- Update commit message
cmd/Kconfig | 12 +++
cmd/Makefile | 1 +
cmd/extension_board.c | 167 ++
doc/usage/extension.rst | 111 +
include/extension_board.h | 31 +++
5 files changed, 322 insertions(+)
create mode 100644 cmd/extension_board.c
create mode 100644 doc/usage/extension.rst
create mode 100644 include/extension_board.h
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 1595de999b..90be5c260a 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -314,6 +314,18 @@ config CMD_FDT
help
Do FDT related setup before booting into the Operating System.
+config SUPPORT_EXTENSION_SCAN
+ bool
+
+config CMD_EXTENSION
+ bool "Extension board management command"
+ select CMD_FDT
+ depends on SUPPORT_EXTENSION_SCAN
+ help
+ Enables the "extension" command, which allows to detect
+ extension boards connected to the system, and apply
+ corresponding Device Tree overlays.
+
config CMD_GO
bool "go"
default y
diff --git a/cmd/Makefile b/cmd/Makefile
index dd86675bf2..87da67d27d 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_CMD_DIAG) += diag.o
endif
obj-$(CONFIG_CMD_ADTIMG) += adtimg.o
obj-$(CONFIG_CMD_ABOOTIMG) += abootimg.o
+obj-$(CONFIG_CMD_EXTENSION) += extension_board.o
obj-$(CONFIG_CMD_ECHO) += echo.o
obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
obj-$(CONFIG_CMD_EEPROM) += eeprom.o
diff --git a/cmd/extension_board.c b/cmd/extension_board.c
new file mode 100644
index 00..6ad9765d84
--- /dev/null
+++ b/cmd/extension_board.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021
+ * Köry Maincent, Bootlin,
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static LIST_HEAD(extension_list);
+
+static int extension_apply(struct extension *extension)
+{
+ char *overlay_cmd;
+ ulong extrasize, overlay_addr;
+ struct fdt_header *blob;
+
+ if (!working_fdt) {
+ printf("No FDT memory address configured. Please configure\n"
+ "the FDT address via \"fdt addr \" command.\n");
+ return CMD_RET_FAILURE;
+ }
+
+ overlay_cmd = env_get("extension_overlay_cmd");
+ if (!overlay_cmd) {
+ printf("Environment extension_overlay_cmd is missing\n");
+ return CMD_RET_FAILURE;
+ }
+
+ overlay_addr = env_get_hex("extension_overlay_addr", 0);
+ if (!overlay_addr) {
+ printf("Environment extension_overlay_addr is missing\n");
+ return CMD_RET_FAILURE;
+ }
+
+ env_set("extension_overlay_name", extension->overlay);
+ if (run_command(overlay_cmd, 0) != 0)
+ return CMD_RET_FAILURE;
+
+ extrasize =
[PATCH v4 07/10] arm: sunxi: add support for DIP detection to CHIP board
Add the extension_board_scan specific function to scan the information
of the EEPROM on one-wire and fill the extension struct.
Add the Kconfig symbol to enable the needs to detect DIPs.
Signed-off-by: Kory Maincent
Reviewed-by: Maxime Ripard
---
Need the following patches series to fix a one-wire gpio issue.
https://lists.denx.de/pipermail/u-boot/2021-February/440073.html
Change since v1:
- Replace TARGET_CHIP options by CHIP_DIP_SCAN
Change since v2:
- Fix typo
- Place the Kconfig symbol in that patch
Change since v3:
- Replace imply CMD_EXTENSION by select option. Remove the ifdef test on
CMD_EXTENSION in the chip.c file.
arch/arm/mach-sunxi/Kconfig | 9
board/sunxi/Makefile| 1 +
board/sunxi/chip.c | 100
3 files changed, 110 insertions(+)
create mode 100644 board/sunxi/chip.c
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 49ef217f08..ef114d60e8 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -1017,3 +1017,12 @@ config PINEPHONE_DT_SELECTION
correct PinePhone hardware revision during boot.
endif
+
+config CHIP_DIP_SCAN
+ bool "Enable DIPs detection for CHIP board"
+ select SUPPORT_EXTENSION_SCAN
+ select W1
+ select W1_GPIO
+ select W1_EEPROM
+ select W1_EEPROM_DS24XXX
+ select CMD_EXTENSION
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index c4e13f8c38..d96b7897b6 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_SUN7I_GMAC) += gmac.o
obj-$(CONFIG_MACH_SUN4I) += dram_sun4i_auto.o
obj-$(CONFIG_MACH_SUN5I) += dram_sun5i_auto.o
obj-$(CONFIG_MACH_SUN7I) += dram_sun5i_auto.o
+obj-$(CONFIG_CHIP_DIP_SCAN)+= chip.o
diff --git a/board/sunxi/chip.c b/board/sunxi/chip.c
new file mode 100644
index 00..cde04bebe9
--- /dev/null
+++ b/board/sunxi/chip.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021
+ * Köry Maincent, Bootlin,
+ * Based on initial code from Maxime Ripard
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include
+
+#define for_each_w1_device(b, d) \
+ for (device_find_first_child(b, d); *d; device_find_next_child(d))
+
+#define dip_convert(field) \
+ ( \
+ (sizeof(field) == 1) ? field : \
+ (sizeof(field) == 2) ? be16_to_cpu(field) : \
+ (sizeof(field) == 4) ? be32_to_cpu(field) : \
+ -1 \
+ )
+
+#define DIP_MAGIC 0x50494843 /* CHIP */
+
+struct dip_w1_header {
+ u32 magic; /* CHIP */
+ u8 version;/* spec version */
+ u32 vendor_id;
+ u16 product_id;
+ u8 product_version;
+ charvendor_name[32];
+ charproduct_name[32];
+ u8 rsvd[36]; /* rsvd for future spec versions */
+ u8 data[16]; /* user data, per-dip specific */
+} __packed;
+
+int extension_board_scan(struct list_head *extension_list)
+{
+ struct extension *dip;
+ struct dip_w1_header w1_header;
+ struct udevice *bus, *dev;
+ u32 vid;
+ u16 pid;
+ int ret;
+
+ int num_dip = 0;
+
+ sunxi_gpio_set_pull(SUNXI_GPD(2), SUNXI_GPIO_PULL_UP);
+
+ ret = w1_get_bus(0, );
+ if (ret) {
+ printf("one wire interface not found\n");
+ return 0;
+ }
+
+ for_each_w1_device(bus, ) {
+ if (w1_get_device_family(dev) != W1_FAMILY_DS2431)
+ continue;
+
+ ret = device_probe(dev);
+ if (ret) {
+ printf("Couldn't probe device %s: error %d",
+ dev->name, ret);
+ continue;
+ }
+
+ w1_eeprom_read_buf(dev, 0, (u8 *)_header, sizeof(w1_header));
+
+ if (w1_header.magic != DIP_MAGIC)
+ continue;
+
+ vid = dip_convert(w1_header.vendor_id);
+ pid = dip_convert(w1_header.product_id);
+
+ printf("DIP: %s (0x%x) from %s (0x%x)\n",
+ w1_header.product_name, pid,
+ w1_header.vendor_name, vid);
+
+ dip = calloc(1, sizeof(struct extension));
+ if (!dip) {
+ printf("Error in memory allocation\n");
+ return num_dip;
+ }
+
+ snprintf(dip->overlay, sizeof(dip->overlay), "dip-%x-%x.dtbo",
+vid, pid);
+ strncpy(dip->name, w1_header.product_name, 32);
+ strncpy(dip->owner,
[PATCH v4 05/10] am57xx: add support for cape detect functionality
This commit enables using the extension board detection mechanism on AM57xx based platforms. Signed-off-by: Kory Maincent --- Change Since v1: - Remove CAPE_EEPROM_BUS_NUM from the header arch/arm/mach-omap2/omap5/Kconfig | 1 + board/ti/am57xx/board.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/mach-omap2/omap5/Kconfig b/arch/arm/mach-omap2/omap5/Kconfig index a7132dae09..4c2f990b28 100644 --- a/arch/arm/mach-omap2/omap5/Kconfig +++ b/arch/arm/mach-omap2/omap5/Kconfig @@ -36,6 +36,7 @@ config TARGET_AM57XX_EVM select CMD_DDR3 select DRA7XX select TI_I2C_BOARD_DETECT + select SUPPORT_EXTENSION_SCAN imply DM_THERMAL imply SCSI imply SPL_THERMAL diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 7809875510..a2df4def78 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -42,6 +42,7 @@ #include #include "../common/board_detect.h" +#include "../common/cape_detect.h" #include "mux_data.h" #ifdef CONFIG_SUPPORT_EMMC_BOOT -- 2.17.1
[PATCH v4 04/10] ti/common: add support for extension_scan_board function
The BeagleBone platforms all use a common mechanism to discover and
identify extension boards (called "capes"): each extension board has an
I2C-connected EEPROM describing itself.
This patch implements a generic extension_scan_board() feature that can
be used by all BeagleBone platforms to read those I2C EEPROMs and fill
in the list of "extension" structures.
Following commits will enable this common logic on two BeagleBone
platforms.
Signed-off-by: Kory Maincent
---
Change Since v1:
- Use CAPE_EEPROM_BUS_NUM in Kconfig in place of the board header
board/ti/common/Kconfig | 6 +++
board/ti/common/Makefile | 1 +
board/ti/common/cape_detect.c | 96 +++
board/ti/common/cape_detect.h | 28 ++
4 files changed, 131 insertions(+)
create mode 100644 board/ti/common/cape_detect.c
create mode 100644 board/ti/common/cape_detect.h
diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig
index 9ead7ca038..49edd98014 100644
--- a/board/ti/common/Kconfig
+++ b/board/ti/common/Kconfig
@@ -16,6 +16,12 @@ config EEPROM_CHIP_ADDRESS
default 0x50
depends on TI_I2C_BOARD_DETECT
+config CAPE_EEPROM_BUS_NUM
+ int "Cape EEPROM's I2C bus address"
+ range 0 8
+ default 2
+ depends on CMD_EXTENSION
+
config TI_COMMON_CMD_OPTIONS
bool "Enable cmd options on TI platforms"
imply CMD_ASKENV
diff --git a/board/ti/common/Makefile b/board/ti/common/Makefile
index cb97f226ae..3172d87b46 100644
--- a/board/ti/common/Makefile
+++ b/board/ti/common/Makefile
@@ -2,3 +2,4 @@
# Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
obj-${CONFIG_TI_I2C_BOARD_DETECT} += board_detect.o
+obj-${CONFIG_CMD_EXTENSION} += cape_detect.o
diff --git a/board/ti/common/cape_detect.c b/board/ti/common/cape_detect.c
new file mode 100644
index 00..2e6105cfbf
--- /dev/null
+++ b/board/ti/common/cape_detect.c
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021
+ * Köry Maincent, Bootlin,
+ */
+
+#include
+#include
+#include
+#include
+
+#include "cape_detect.h"
+
+static void sanitize_field(char *text, size_t size)
+{
+ char *c = NULL;
+
+ for (c = text; c < text + (int)size; c++) {
+ if (*c == 0xFF)
+ *c = 0;
+ }
+}
+
+int extension_board_scan(struct list_head *extension_list)
+{
+ struct extension *cape;
+ struct am335x_cape_eeprom_id eeprom_header;
+
+ int num_capes = 0;
+ int ret, i;
+ struct udevice *dev;
+ unsigned char addr;
+
+ char process_cape_part_number[17] = {'0'};
+ char process_cape_version[5] = {'0'};
+ uint8_t cursor = 0;
+
+ for (addr = CAPE_EEPROM_FIRST_ADDR; addr <= CAPE_EEPROM_LAST_ADDR;
addr++) {
+ ret = i2c_get_chip_for_busnum(CONFIG_CAPE_EEPROM_BUS_NUM, addr,
1, );
+ if (ret)
+ continue;
+
+ /* Move the read cursor to the beginning of the EEPROM */
+ dm_i2c_write(dev, 0, , 1);
+ ret = dm_i2c_read(dev, 0, (uint8_t *)_header,
+ sizeof(struct am335x_cape_eeprom_id));
+ if (ret) {
+ printf("Cannot read i2c EEPROM\n");
+ continue;
+ }
+
+ if (eeprom_header.header != CAPE_MAGIC)
+ continue;
+
+ sanitize_field(eeprom_header.board_name,
sizeof(eeprom_header.board_name));
+ sanitize_field(eeprom_header.version,
sizeof(eeprom_header.version));
+ sanitize_field(eeprom_header.manufacturer,
sizeof(eeprom_header.manufacturer));
+ sanitize_field(eeprom_header.part_number,
sizeof(eeprom_header.part_number));
+
+ /* Process cape part_number */
+ memset(process_cape_part_number, 0,
sizeof(process_cape_part_number));
+ strncpy(process_cape_part_number, eeprom_header.part_number,
16);
+ /* Some capes end with '.' */
+ for (i = 15; i >= 0; i--) {
+ if (process_cape_part_number[i] == '.')
+ process_cape_part_number[i] = '\0';
+ else
+ break;
+ }
+
+ /* Process cape version */
+ memset(process_cape_version, 0, sizeof(process_cape_version));
+ strncpy(process_cape_version, eeprom_header.version, 4);
+ for (i = 0; i < 4; i++) {
+ if (process_cape_version[i] == 0)
+ process_cape_version[i] = '0';
+ }
+
+ printf("BeagleBone Cape: %s (0x%x)\n",
eeprom_header.board_name, addr);
+
+ cape = calloc(1, sizeof(struct extension));
+ if (!cape) {
+ printf("Error in memory allocation\n");
+
[PATCH v4 03/10] pytest: add sandbox test for "extension" command
This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.
Signed-off-by: Kory Maincent
---
arch/Kconfig| 2 ++
arch/sandbox/dts/Makefile | 1 +
arch/sandbox/dts/overlay0.dts | 9 ++
arch/sandbox/dts/overlay1.dts | 9 ++
board/sandbox/sandbox.c | 23 +++
test/py/tests/test_extension.py | 52 +
6 files changed, 96 insertions(+)
create mode 100644 arch/sandbox/dts/overlay0.dts
create mode 100644 arch/sandbox/dts/overlay1.dts
create mode 100644 test/py/tests/test_extension.py
diff --git a/arch/Kconfig b/arch/Kconfig
index 3aa99e08fc..fbe969cce0 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -109,6 +109,7 @@ config SANDBOX
select SPI
select SUPPORT_OF_CONTROL
select SYSRESET_CMD_POWEROFF
+ select SUPPORT_EXTENSION_SCAN
imply BITREVERSE
select BLOBLIST
imply CMD_DM
@@ -146,6 +147,7 @@ config SANDBOX
imply ACPI_PMC_SANDBOX
imply CMD_PMC
imply CMD_CLONE
+ imply CMD_EXTENSION
config SH
bool "SuperH architecture"
diff --git a/arch/sandbox/dts/Makefile b/arch/sandbox/dts/Makefile
index d231dc2877..3e5dc67d53 100644
--- a/arch/sandbox/dts/Makefile
+++ b/arch/sandbox/dts/Makefile
@@ -6,6 +6,7 @@ else
dtb-$(CONFIG_SANDBOX) += sandbox.dtb
endif
dtb-$(CONFIG_UT_DM) += test.dtb
+dtb-$(CONFIG_CMD_EXTENSION) += overlay0.dtbo overlay1.dtbo
targets += $(dtb-y)
diff --git a/arch/sandbox/dts/overlay0.dts b/arch/sandbox/dts/overlay0.dts
new file mode 100644
index 00..70c6cf77aa
--- /dev/null
+++ b/arch/sandbox/dts/overlay0.dts
@@ -0,0 +1,9 @@
+/dts-v1/;
+/plugin/;
+
+&{/buttons} {
+ btn3 {
+ gpios = <_a 5 0>;
+ label = "button3";
+ };
+};
diff --git a/arch/sandbox/dts/overlay1.dts b/arch/sandbox/dts/overlay1.dts
new file mode 100644
index 00..51621b3110
--- /dev/null
+++ b/arch/sandbox/dts/overlay1.dts
@@ -0,0 +1,9 @@
+/dts-v1/;
+/plugin/;
+
+&{/buttons} {
+ btn4 {
+ gpios = <_a 5 0>;
+ label = "button4";
+ };
+};
diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c
index 18a605de02..6ba1a7177d 100644
--- a/board/sandbox/sandbox.c
+++ b/board/sandbox/sandbox.c
@@ -13,6 +13,9 @@
#include
#include
#include
+#include
+
+#include
/*
* Pointer to initial global data area
@@ -81,6 +84,26 @@ int ft_board_setup(void *fdt, struct bd_info *bd)
return fdt_add_mem_rsv(fdt, 0x00d02000, 0x4000);
}
+#ifdef CONFIG_CMD_EXTENSION
+int extension_board_scan(struct list_head *extension_list)
+{
+ struct extension *extension;
+ int i;
+
+ for (i = 0; i < 2; i++) {
+ extension = calloc(1, sizeof(struct extension));
+ snprintf(extension->overlay, sizeof(extension->overlay),
"overlay%d.dtbo", i);
+ snprintf(extension->name, sizeof(extension->name), "extension
board %d", i);
+ snprintf(extension->owner, sizeof(extension->owner), "sandbox");
+ snprintf(extension->version, sizeof(extension->version), "1.1");
+ snprintf(extension->other, sizeof(extension->other),
"Fictionnal extension board");
+ list_add_tail(>list, extension_list);
+ }
+
+ return i;
+}
+#endif
+
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
diff --git a/test/py/tests/test_extension.py b/test/py/tests/test_extension.py
new file mode 100644
index 00..4712f9bfe3
--- /dev/null
+++ b/test/py/tests/test_extension.py
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (c) 2020
+# Author: Kory Maincent
+
+# Test U-Boot's "extension" commands.
+
+import os
+import pytest
+import u_boot_utils
+
+overlay_addr = 0x1000
+
+SANDBOX_DTB='arch/sandbox/dts/sandbox.dtb'
+OVERLAY_DIR='arch/sandbox/dts/'
+
+def load_dtb(u_boot_console):
+u_boot_console.log.action('Loading devicetree to RAM...')
+u_boot_console.run_command('host load hostfs - $fdt_addr_r %s' %
(os.path.join(u_boot_console.config.build_dir, SANDBOX_DTB)))
+u_boot_console.run_command('fdt addr $fdt_addr_r')
+
+@pytest.mark.buildconfigspec('cmd_fdt')
+def test_extension(u_boot_console):
+"""Test the 'extension' command."""
+
+load_dtb(u_boot_console)
+
+output = u_boot_console.run_command('extension list')
+assert('No extension' in output)
+
+output = u_boot_console.run_command('extension scan')
+assert output == 'Found 2 extension board(s).'
+
+output = u_boot_console.run_command('extension list')
+assert('overlay0.dtbo' in output)
+assert('overlay1.dtbo' in output)
+
+u_boot_console.run_command_list([
+'setenv extension_overlay_addr %s' % (overlay_addr),
[PATCH v4 00/10] Add support for extension boards detection and DT overlays application
This series of patches aims at proposing a generic U-Boot mechanism to
detect extension boards connected to the HW platform, and apply the
appropriate Device Tree overlays depending on the detected extension
boards.
Indeed, numerous popular platforms, such as the BeagleBone or the
RaspberryPi, feature some kind of extension board mechanism. These
extension boards are often discoverable through some kind of EEPROM
(connected on I2C, 1-wire, etc.) and require Device Tree overlays to be
applied at the U-Boot level to provide a complete HW description to the
Linux kernel. However, currently this logic is usually implemented
ad-hoc in downstream forks of U-Boot.
This series proposes to bring a HW-agnostic and generic solution to
this problem to upstream U-Boot. The series shows that it is generic
enough by implementing its usage for 2 different families of HW
platforms and expansion boards:
- The BeagleBone Black and BeagleBone AI, that use extension boards
where the EEPROM describing the extension boards is connected over
I2C.
- The CHIP, that uses extension boards where the EEPROM describing the
extension boards is connected over 1-wire.
The patch series implements a new command called "extension", with two
sub-commands:
- "extension scan" to detect available extension boards
- "extension list" will simply list the detected extension boards
- "extension apply" will allow to apply the Device Tree overlays
corresponding to one extension board or to all expansion boards
Note that the name "extension" has been chosen to not refer to any
particular board-specific terminology for extension boards ("cape" for
BeagleBone, "DIP" for CHIP, "hat" for RaspberryPi, etc.). However, we
welcome suggestions of other names and are definitely willing to use a
different naming.
The "extension apply" command requires two environment variables to be
defined so that it knows how to apply DT overlays. This is described
in more details in PATCH 1.
This generic code requires board-specific code for the detection and
enumeration of extension boards. This is simply implemented in the form
of a board-specific extension_board_scan() function, which fills in a
list of detected extension boards.
In detail:
- PATCH 1 move fdt_valid function to fdt_support file
- PATCH 2 implements the generic command and logic
- PATCH 3 implements the python test for the "extension" command
- PATCH 4 implements the board-specific code for the BeagleBone platforms
- PATCH 5 enables the mechanism for the BeagleBone AI
- PATCH 6 review the detection mechanism of one-wire devices
- PATCH 7 and 8 enable the mechanism for the CHIP
- PATCH 9 and 10 enable the mechanism for the BeagleBone Black
Thanks in advance for your review and feedback
Change since v1:
- remove the one wire devicetree description of the CHIP board
- rewrite the detection of w1 to makes it automatic and not devicetree
dependent
- replace Kconfig CHIP board target by Kconfig CHIP_DIP_SCAN simple option
- rewrite doc to rST syntax
- make few syntax update
Change since v2:
- review the detection of w1 to makes it compatible with automatic
detection alongside the devicetree description detection
- update the patch separation between the mechanism for the CHIP and the
configuration activation
Change since v3:
- Update commit messages on the extension command patch
- Remove a test on CMD_EXTENSION in the chip.c file.
Kory Maincent (10):
fdt_support: move fdt_valid from cmd_fdt.c to fdt_support.c
cmd: add support for a new "extension" command
pytest: add sandbox test for "extension" command
ti/common: add support for extension_scan_board function
am57xx: add support for cape detect functionality
w1: replace dt detection by automatic detection
arm: sunxi: add support for DIP detection to CHIP board
configs: CHIP: add support for DIP detect functionality
arm: am335x: add support for i2c2 bus
am335x: add support for cape detect functionality
arch/Kconfig | 2 +
arch/arm/mach-omap2/am33xx/Kconfig| 1 +
arch/arm/mach-omap2/am33xx/clock_am33xx.c | 1 +
arch/arm/mach-omap2/omap5/Kconfig | 1 +
arch/arm/mach-sunxi/Kconfig | 9 ++
arch/sandbox/dts/Makefile | 1 +
arch/sandbox/dts/overlay0.dts | 9 ++
arch/sandbox/dts/overlay1.dts | 9 ++
board/sandbox/sandbox.c | 23 +++
board/sunxi/Makefile | 1 +
board/sunxi/chip.c| 100 +
board/ti/am335x/board.c | 3 +
board/ti/am335x/board.h | 1 +
board/ti/am335x/mux.c | 15 ++
board/ti/am57xx/board.c | 1 +
board/ti/common/Kconfig | 6 +
board/ti/common/Makefile | 1 +
board/ti/common/cape_detect.c | 96 +
board/ti/common/cape_detect.h | 28
[PATCH v4 01/10] fdt_support: move fdt_valid from cmd_fdt.c to fdt_support.c
Move the fdt_valid function to fdt_support.
This changes allow to be able to test the validity of a devicetree in
other c files.
Update code syntax.
Signed-off-by: Kory Maincent
Reviewed-by: Tom Rini
Reviewed-by: Maxime Ripard
---
cmd/fdt.c | 49 ---
common/fdt_support.c | 46
include/fdt_support.h | 2 ++
3 files changed, 48 insertions(+), 49 deletions(-)
diff --git a/cmd/fdt.c b/cmd/fdt.c
index 89ab572d8d..f1e2fc2fd8 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -27,7 +27,6 @@
*/
DECLARE_GLOBAL_DATA_PTR;
-static int fdt_valid(struct fdt_header **blobp);
static int fdt_parse_prop(char *const*newval, int count, char *data, int *len);
static int fdt_print(const char *pathp, char *prop, int depth);
static int is_printable_string(const void *data, int len);
@@ -732,54 +731,6 @@ static int do_fdt(struct cmd_tbl *cmdtp, int flag, int
argc, char *const argv[])
//
-/**
- * fdt_valid() - Check if an FDT is valid. If not, change it to NULL
- *
- * @blobp: Pointer to FDT pointer
- * @return 1 if OK, 0 if bad (in which case *blobp is set to NULL)
- */
-static int fdt_valid(struct fdt_header **blobp)
-{
- const void *blob = *blobp;
- int err;
-
- if (blob == NULL) {
- printf ("The address of the fdt is invalid (NULL).\n");
- return 0;
- }
-
- err = fdt_check_header(blob);
- if (err == 0)
- return 1; /* valid */
-
- if (err < 0) {
- printf("libfdt fdt_check_header(): %s", fdt_strerror(err));
- /*
-* Be more informative on bad version.
-*/
- if (err == -FDT_ERR_BADVERSION) {
- if (fdt_version(blob) <
- FDT_FIRST_SUPPORTED_VERSION) {
- printf (" - too old, fdt %d < %d",
- fdt_version(blob),
- FDT_FIRST_SUPPORTED_VERSION);
- }
- if (fdt_last_comp_version(blob) >
- FDT_LAST_SUPPORTED_VERSION) {
- printf (" - too new, fdt %d > %d",
- fdt_version(blob),
- FDT_LAST_SUPPORTED_VERSION);
- }
- }
- printf("\n");
- *blobp = NULL;
- return 0;
- }
- return 1;
-}
-
-//
-
/*
* Parse the user's input, partially heuristic. Valid formats:
* <0x00112233 4 05> - an array of cells. Numbers follow standard
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 5ae75df3c6..84ee274c72 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -1814,3 +1814,49 @@ int fdt_overlay_apply_verbose(void *fdt, void *fdto)
return err;
}
#endif
+
+/**
+ * fdt_valid() - Check if an FDT is valid. If not, change it to NULL
+ *
+ * @blobp: Pointer to FDT pointer
+ * @return 1 if OK, 0 if bad (in which case *blobp is set to NULL)
+ */
+int fdt_valid(struct fdt_header **blobp)
+{
+ const void *blob = *blobp;
+ int err;
+
+ if (!blob) {
+ printf("The address of the fdt is invalid (NULL).\n");
+ return 0;
+ }
+
+ err = fdt_check_header(blob);
+ if (err == 0)
+ return 1; /* valid */
+
+ if (err < 0) {
+ printf("libfdt fdt_check_header(): %s", fdt_strerror(err));
+ /*
+* Be more informative on bad version.
+*/
+ if (err == -FDT_ERR_BADVERSION) {
+ if (fdt_version(blob) <
+ FDT_FIRST_SUPPORTED_VERSION) {
+ printf(" - too old, fdt %d < %d",
+ fdt_version(blob),
+ FDT_FIRST_SUPPORTED_VERSION);
+ }
+ if (fdt_last_comp_version(blob) >
+ FDT_LAST_SUPPORTED_VERSION) {
+ printf(" - too new, fdt %d > %d",
+ fdt_version(blob),
+ FDT_LAST_SUPPORTED_VERSION);
+ }
+ }
+ printf("\n");
+ *blobp = NULL;
+ return 0;
+ }
+ return 1;
+}
diff --git a/include/fdt_support.h b/include/fdt_support.h
index dbbac0fb6a..fab8df0bcb 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -328,6 +328,8 @@ int fdt_setup_simplefb_node(void *fdt, int node, u64
base_address, u32 width,
int fdt_overlay_apply_verbose(void *fdt, void *fdto);
+int
Re: [PATCH] efi_loader: capsule: return a corret error code at find_boot_device()
On 4/20/21 3:03 AM, AKASHI Takahiro wrote:
In case of failure at efi_get_variable_int("BootOrder"), we should
skip examining boot option variables and return an appropriate error
code which is the one the function returned.
Fixes: CID 331153 Code maintainability issues (UNUSED_VALUE)
Signed-off-by: AKASHI Takahiro
Reviewed-by: Heinrich Schuchardt
---
lib/efi_loader/efi_capsule.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
index 691eda5e0d14..2d10f47bff24 100644
--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
@@ -685,7 +685,6 @@ skip:
efi_free_pool(boot_dev);
boot_dev = NULL;
}
-out:
if (boot_dev) {
u16 *path_str;
@@ -703,6 +702,7 @@ out:
} else {
ret = EFI_NOT_FOUND;
}
+out:
free(boot_order);
return ret;
Re: [PATCH v2 12/13] doc: qemu: arm64: Fix the documentation of capsule update
Heinrich, Sughosh, On Mon, Apr 19, 2021 at 04:35:15AM +0200, Heinrich Schuchardt wrote: > Am 19. April 2021 04:24:37 MESZ schrieb Masami Hiramatsu > : > >Hi, > > > >2021年4月19日(月) 9:37 Takahiro Akashi : > >> > >> Sughosh, > >> > >> On Sun, Apr 18, 2021 at 01:37:58PM +0530, Sughosh Ganu wrote: > >> > On Sat, 17 Apr 2021 at 23:51, Heinrich Schuchardt > > > >> > wrote: > >> > > >> > > On 4/17/21 1:39 AM, Masami Hiramatsu wrote: > >> > > > Since the EDK2 GenerateCapsule script is out of date and it > >> > > > doesn't generate the supported version capsule file, the > >document > >> > > > should refer the mkeficapsule in tools. > >> > > > > >> > > > Signed-off-by: Masami Hiramatsu > >> > > > --- > >> > > > doc/board/emulation/qemu_capsule_update.rst | 11 > >++- > >> > > > 1 file changed, 2 insertions(+), 9 deletions(-) > >> > > > > >> > > > diff --git a/doc/board/emulation/qemu_capsule_update.rst > >> > > b/doc/board/emulation/qemu_capsule_update.rst > >> > > > index 9fec75f8f1..e2a9f0db71 100644 > >> > > > --- a/c > >> > > > +++ b/doc/board/emulation/qemu_capsule_update.rst > >> > > > @@ -39,16 +39,9 @@ In addition, the following config needs to > >be > >> > > disabled(QEMU ARM specific):: > >> > > > > >> > > > CONFIG_TFABOOT > >> > > > > >> > > > -The capsule file can be generated by using the > >GenerateCapsule.py > >> > > > -script in EDKII:: > >> > > > - > >> > > > -$ ./BaseTools/BinWrappers/PosixLike/GenerateCapsule -e -o > >\ > >> > > > - --fw-version --lsv --guid > >\ > >> > > > -e2bb9c06-70e9-4b14-97a3-5a7913176e3f --verbose > >--update-image-index > >> > > \ > >> > > > - --verbose > >> > > > +The capsule file can be generated by using the > >tools/mkeficapsule:: > >> > > > > >> > > > -The above is a wrapper script(GenerateCapsule) which > >eventually calls > >> > > > -the actual GenerateCapsule.py script. > >> > > > +$ mkeficapsule --raw --index 1 > > > >> > > > >> > > Thanks for the change. > >> > > > >> > > Could you, please, adjust the same in chapter "Enabling Capsule > >> > > Authentication" below. > > > >So as Sughosh said, since currently mkeficapsule doesn't support > >authentication, > >I only changed it for the normal capsule update. Without this change, > >the capsule > >update just failed. > > > > > >> > Currently, we do not have support for adding authentication header > >to the > >> > capsule. This is because I have been using the GenerateCapsule > >script in > >> > edk2 for generation of a capsule with authentication header. I > >think adding > >> > the signature to the capsule is easier when done through a python > >script > >> > rather than C code. > >> > >> Why do you think so? > >> At a quick glance at the script, it internally uses openssl command > >like: > >> openssl smime -sign -binary -outform DER -md sha256 \ > >> -signer <...> -certfile <...> > >> (See PayloadDescriptor.Encode in the script.) > >> > >> The output from the standard output is exactly what you want > >> to use to build a capsule file, that is "AuthInfo". > >> Then you can naturally extend mkeficapsule to insert this signature > >> between the header and the image itself in a capsule file. > > > >Hmm, if it can be done by just calling openssl, I think it is easier > >for me > >to run the tools/mkeficapsule, because I don't need to build EDK2 > >for U-Boot. > > > >If GenerateCapsule becomes a standard implementation and > >independent from the EDK2 project, from the interoperability point > >of view, it is better to use that. But it is a part of EDK2 and the > >GenerateCapsule seems out-of-date and not maintained well > >(why doesn't it support the latest version yet??) > > Sughosh told me that EDK II cannot create a signed capsule that is usable > with U-Boot due to an outdated header version used by EDK II. I decided to add a signing feature to mkeficapsule, and actually have finished the coding (half-a-day work). Yet I have to find some time to debug the command as I have never tried capsule authentication. (Hopefully Masami will help here.) The syntax will look like: mkeficapsule -m -P -C -r -Takahiro Akashi > It should be sufficient to describe the steps used by U-Boot's test script > here. > > Best regards > > Heinrich > > > > >Thank you, > > > >> Furthermore, I believe, it is fairly straightforward to add a native > >> 'signing' feature to mkeficapsule if you use openssl library. > >> > >> -Takahiro Akashi > >> > >> > >> > I am working on adding support for the latest version > >> > of the EFI_FIRMWARE_MANAGEMENT_CAPSULE_IMAGE_HEADER in the > >GenerateCapsule > >> > script in edk2. Meanwhile, would it be possible to have support for > >the > >> > version 2 of this header in the capsule driver -- it is a minor > >change and > >> > I already have a patch for it. If you are fine, I can submit a > >patch for > >> > the same. > >> > > >> > -sughosh > >> > > >> > > >> > > > >> > > Best regards > >> > > > >> > > Heinrich > >> > > > >>
Re: [scan-ad...@coverity.com: New Defects reported by Coverity Scan for Das U-Boot]
Hi Tom,
> Il 19/04/2021 14:20 Tom Rini ha scritto:
>
>
> Hey all,
>
> Here's the latest report.
>
> - Forwarded message from scan-ad...@coverity.com -
>
> Date: Mon, 19 Apr 2021 01:18:55 + (UTC)
> From: scan-ad...@coverity.com
> To: tom.r...@gmail.com
> Subject: New Defects reported by Coverity Scan for Das U-Boot
>
> Hi,
>
> Please find the latest report on new defect(s) introduced to Das U-Boot found
> with Coverity Scan.
>
> 13 new defect(s) introduced to Das U-Boot found with Coverity Scan.
> 5 defect(s), reported by Coverity Scan earlier, were marked fixed in the
> recent build analyzed by Coverity Scan.
>
> New defect(s) Reported-by: Coverity Scan
> Showing 13 of 13 defect(s)
>
>
> ** CID 331158: Control flow issues (NO_EFFECT)
> /drivers/pinctrl/pinctrl-single.c: 347 in single_configure_bits()
>
>
>
> *** CID 331158: Control flow issues (NO_EFFECT)
> /drivers/pinctrl/pinctrl-single.c: 347 in single_configure_bits()
> 341 return PTR_ERR(func);
> 342
> 343 func->name = fname;
> 344 func->npins = 0;
> 345 for (n = 0; n < count; n++, pins++) {
> 346 offset = fdt32_to_cpu(pins->reg);
> >>> CID 331158: Control flow issues (NO_EFFECT)
> >>> This less-than-zero comparison of an unsigned value is never true.
> >>> "offset < 0U".
> 347 if (offset < 0 || offset > pdata->offset) {
> 348 dev_dbg(dev, " invalid register offset 0x%x\n",
> 349 offset);
> 350 continue;
> 351 }
> 352
>
> ** CID 331157: Null pointer dereferences (NULL_RETURNS)
> /drivers/misc/cros_ec_sandbox.c: 229 in keyscan_read_fdt_matrix()
>
>
>
> *** CID 331157: Null pointer dereferences (NULL_RETURNS)
> /drivers/misc/cros_ec_sandbox.c: 229 in keyscan_read_fdt_matrix()
> 223
> 224 /* Now read the data */
> 225 for (upto = 0; upto < ec->matrix_count; upto++) {
> 226 struct ec_keymatrix_entry *matrix = >matrix[upto];
> 227 u32 word;
> 228
> >>> CID 331157: Null pointer dereferences (NULL_RETURNS)
> >>> Incrementing a pointer which might be null: "cell".
> 229 word = fdt32_to_cpu(*cell++);
> 230 matrix->row = word >> 24;
> 231 matrix->col = (word >> 16) & 0xff;
> 232 matrix->keycode = word & 0x;
> 233
> 234 /* Hard-code some sanity limits for now */
>
> ** CID 331156: Incorrect expression (UNUSED_VALUE)
> /cmd/qfw.c: 40 in qemu_fwcfg_cmd_setup_kernel()
>
>
>
> *** CID 331156: Incorrect expression (UNUSED_VALUE)
> /cmd/qfw.c: 40 in qemu_fwcfg_cmd_setup_kernel()
> 34qfw_read_entry(qfw_dev, FW_CFG_SETUP_DATA,
> 35 le32_to_cpu(setup_size), data_addr);
> 36data_addr += le32_to_cpu(setup_size);
> 37
> 38qfw_read_entry(qfw_dev, FW_CFG_KERNEL_DATA,
> 39 le32_to_cpu(kernel_size), data_addr);
> >>> CID 331156: Incorrect expression (UNUSED_VALUE)
> >>> Assigning value from "(__u32)(__le32)kernel_size" to "data_addr"
> >>> here, but that stored value is overwritten before it can be used.
> 40data_addr += le32_to_cpu(kernel_size);
> 41
> 42data_addr = initrd_addr;
> 43qfw_read_entry(qfw_dev, FW_CFG_INITRD_SIZE, 4, _size);
> 44if (initrd_size == 0) {
> 45printf("warning: no initrd available\n");
>
> ** CID 331155: Insecure data handling (TAINTED_SCALAR)
>
>
>
> *** CID 331155: Insecure data handling (TAINTED_SCALAR)
> /fs/cbfs/cbfs.c: 170 in file_cbfs_next_file()
> 164 size -= align;
> 165 start += align;
> 166 continue;
> 167 }
> 168
> 169 swap_file_header(, file_header);
> >>> CID 331155: Insecure data handling (TAINTED_SCALAR)
> >>> Passing tainted variable "header.offset" to a tainted sink.
> 170 ret = fill_node(node, start, );
> 171 if (ret) {
> 172 priv->result = CBFS_BAD_FILE;
> 173 return log_msg_ret("fill", ret);
> 174 }
> 175
>
> ** CID 331154: Integer handling issues (DIVIDE_BY_ZERO)
> /drivers/pinctrl/pinctrl-single.c: 473 in single_probe()
>
>
>
[PATCH] Add support for Raspberry Pi 3B+(32bit)
Hello all. I will add rpi_3_32b_plus_defconfig to easy to build u-boot for Raspberry Pi 3B+(32bit). Could you merge this patch? Thanks, Toshifumi NISHINAGA >From 28d13f48761ab7c137a5fdf07c76a857967e3590 Mon Sep 17 00:00:00 2001 From: Toshifumi NISHINAGA Date: Thu, 15 Apr 2021 16:53:33 +0900 Subject: [PATCH] Add support for Raspberry Pi 3B+(32bit) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It also boots on Raspberry Pi 3B+ using rpi_3_32b_defconfig, but the network card doesn't work. This defconfig is based on rpi_3_32b_defconfig. Signed-off-by: Toshifumi NISHINAGA --- configs/rpi_3_32b_plus_defconfig | 46 1 file changed, 46 insertions(+) create mode 100644 configs/rpi_3_32b_plus_defconfig diff --git a/configs/rpi_3_32b_plus_defconfig b/configs/rpi_3_32b_plus_defconfig new file mode 100644 index 00..d147a46ae7 --- /dev/null +++ b/configs/rpi_3_32b_plus_defconfig @@ -0,0 +1,46 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_BCM283X=y +CONFIG_SYS_TEXT_BASE=0x8000 +CONFIG_TARGET_RPI_3_32B=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_FS_UUID=y +CONFIG_OF_EMBED=y +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_BCM2835=y +CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_LAN78XX=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_CONSOLE_SCROLL_LINES=10 +CONFIG_PHYS_TO_BUS=y +CONFIG_OF_LIBFDT_OVERLAY=y -- 2.24.3 (Apple Git-128)
