Re: [PATCH] pci: pci_mvebu: Add support for Kirkwood PCIe controllers
Hi Pali, On Thu, Jan 13, 2022 at 3:35 PM Tony Dinh wrote: > > Hi Pali, > > On Thu, Jan 13, 2022 at 5:28 AM Pali Rohár wrote: > > > > Kirkwood uses macros KW_DEFADR_PCI_MEM and KW_DEFADR_PCI_IO for base > > address of PCIe mappings. Size of PCIe windows is not defined in any macro > > yet, so export them in new KW_DEFADR_PCI_MEM_SIZE and KW_DEFADR_PCI_IO_SIZE > > macros. > > > > Kirkwood arch code already maps mbus windows for io and mem, so avoid > > calling mvebu_mbus_add_window_by_id() function which would try to do > > duplicate window mapping. > > > > Kirkwood PCIe controllers already use "marvell,kirkwood-pcie" DT compatible > > string, so mark pci_mvebu.c driver as compatible for it. > > > > Signed-off-by: Pali Rohár > > --- > > This patch depends on series "mvebu: Move PCIe code from serdes to PCIe > > driver": > > https://patchwork.ozlabs.org/project/uboot/list/?series=277906=* > > > > Tony, could you please test it in Kirwood hardware? Everything seems to be working fine. I've run 2 tests. For the Pogoplug V4, tested with a USB 3.0 thumb drive (PCIe is the host bus), For the Iomega iConnect, I don't have the Wifi Card or mSATA card (could not found one in my pile yet), so the test is just for MVEBU PCIe framework. 1st Test: Pogoplug V4 (Kirkwood 88F6192) U-Boot 2022.01-00458-ge120ef9f5f-dirty (Jan 14 2022 - 15:59:48 -0800) Pogoplug V4 pcie0.0: Link up Net: eth0: ethernet-controller@72000 Hit any key to stop autoboot: 0 Pogo_V4> usb start starting USB... Bus ehci@5: USB EHCI 1.00 Bus xhci_pci: Register 400081f NbrPorts 4 Starting the controller USB XHCI 1.00 scanning bus ehci@5 for devices... 1 USB Device(s) found scanning bus xhci_pci for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Pogo_V4> pci info Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _ 00.00.00 0x11ab 0x6281 Bridge device 0x04 Pogo_V4> pci region # Bus start Phys start SizeFlags 0 0x9000 0x9000 0x0800 mem 1 0x9000 0x9000 0x0800 mem 2 0xc000 0xc000 0x0001 io io Pogo_V4> usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Mass Storage (5 Gb/s, 100mA) SanDisk Extreme AA010214142232182984 2nd test: Iomega iConnect (Kirkwood 88F6281) U-Boot 2022.01-00489-g9b72d934c2-dirty (Jan 14 2022 - 18:32:35 -0800) Iomega iConnect pcie0.0: Link down Net: egiga0 Error: egiga0 address not set. Hit any key to stop autoboot: 0 iconnect => pci init Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _ 00.00.00 0x11ab 0x6281 Bridge device 0x04 iconnect => pci region # Bus start Phys start SizeFlags 0 0x9000 0x9000 0x0800 mem 1 0x9000 0x9000 0x0800 mem 2 0xc000 0xc000 0x0001 io io Thanks for the great work! Tony Tested-by: Tony Dinh
[PATCH] MAINTAINERS: remove Alexander Graf from EFI PAYLOAD
The last review by Alex was in 2019. Signed-off-by: Heinrich Schuchardt --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 6ae81c5659..38c68ee87d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -737,7 +737,6 @@ F: test/dm/efi_media.c EFI PAYLOAD M: Heinrich Schuchardt -R: Alexander Graf S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-efi.git F: doc/api/efi.rst -- 2.33.1
[PATCH] efidebug: avoid 'dfu_alt_info not defined' message
If variable dfu_alt_info is not defined duplicate messages are displayed.
=> efidebug boot dump
Scanning disk mmc2.blk...
Scanning disk mmc1.blk...
Scanning disk mmc0.blk...
Found 3 disks
No EFI system partition
"dfu_alt_info" env variable not defined!
Probably dfu_alt_info not defined
"dfu_alt_info" env variable not defined!
Probably dfu_alt_info not defined
Remove the 'Probably dfu_alt_info not defined' message.
Instead write a warning if the variable contains no entities.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_firmware.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
index a1b88dbfc2..519a47267c 100644
--- a/lib/efi_loader/efi_firmware.c
+++ b/lib/efi_loader/efi_firmware.c
@@ -128,8 +128,11 @@ static efi_status_t efi_get_dfu_info(
size_t names_len, total_size;
int dfu_num, i;
u16 *name, *next;
+ int ret;
- dfu_init_env_entities(NULL, NULL);
+ ret = dfu_init_env_entities(NULL, NULL);
+ if (ret)
+ return EFI_SUCCESS;
names_len = 0;
dfu_num = 0;
@@ -138,7 +141,7 @@ static efi_status_t efi_get_dfu_info(
dfu_num++;
}
if (!dfu_num) {
- log_warning("Probably dfu_alt_info not defined\n");
+ log_warning("No entities in dfu_alt_info\n");
*image_info_size = 0;
dfu_free_entities();
--
2.33.1
[RFC 1/1] efi_loader: rename 'efidebug boot' 'bootefi'
The efidebug command was conceived for testing purposes.
The manipulation of boot options does better fit to the bootefi command
that is used to invoke the boot manager.
Signed-off-by: Heinrich Schuchardt
---
cmd/bootefi.c | 672 +-
cmd/efidebug.c| 662 +
doc/develop/uefi/uefi.rst | 4 +-
include/efi_loader.h | 2 -
lib/efi_selftest/efi_selftest_tcg2.c | 8 +-
.../test_efi_capsule/test_capsule_firmware.py | 12 +-
test/py/tests/test_efi_secboot/test_signed.py | 48 +-
.../test_efi_secboot/test_signed_intca.py | 22 +-
.../tests/test_efi_secboot/test_unsigned.py | 22 +-
9 files changed, 723 insertions(+), 729 deletions(-)
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 83eab0bd7f..003aa5265e 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -12,10 +12,13 @@
#include
#include
#include
+#include
#include
#include
+#include
#include
#include
+#include
#include
#include
#include
@@ -47,6 +50,620 @@ static void efi_clear_bootdev(void)
image_size = 0;
}
+/**
+ * create_initrd_dp() - Create a special device for our Boot### option
+ *
+ * @dev: Device
+ * @part: Disk partition
+ * @file: Filename
+ * Return: Pointer to the device path or ERR_PTR
+ *
+ */
+static
+struct efi_device_path *create_initrd_dp(const char *dev, const char *part,
+const char *file)
+
+{
+ struct efi_device_path *tmp_dp = NULL, *tmp_fp = NULL;
+ struct efi_device_path *initrd_dp = NULL;
+ efi_status_t ret;
+ const struct efi_initrd_dp id_dp = {
+ .vendor = {
+ {
+ DEVICE_PATH_TYPE_MEDIA_DEVICE,
+ DEVICE_PATH_SUB_TYPE_VENDOR_PATH,
+ sizeof(id_dp.vendor),
+ },
+ EFI_INITRD_MEDIA_GUID,
+ },
+ .end = {
+ DEVICE_PATH_TYPE_END,
+ DEVICE_PATH_SUB_TYPE_END,
+ sizeof(id_dp.end),
+ }
+ };
+
+ ret = efi_dp_from_name(dev, part, file, _dp, _fp);
+ if (ret != EFI_SUCCESS) {
+ printf("Cannot create device path for \"%s %s\"\n", part, file);
+ goto out;
+ }
+
+ initrd_dp = efi_dp_append((const struct efi_device_path *)_dp,
+ tmp_fp);
+
+out:
+ efi_free_pool(tmp_dp);
+ efi_free_pool(tmp_fp);
+ return initrd_dp;
+}
+
+/**
+ * do_efi_boot_add() - set UEFI load option
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ * Return: CMD_RET_SUCCESS on success,
+ * CMD_RET_USAGE or CMD_RET_RET_FAILURE on failure
+ *
+ * Implement "add" sub-command. Create or change UEFI load option.
+ *
+ * booteif add -b[:]
+ * -i [:]
+ * -s ''
+ */
+static int do_efi_boot_add(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[])
+{
+ int id;
+ char *endp;
+ u16 var_name16[9];
+ efi_guid_t guid;
+ size_t label_len, label_len16;
+ u16 *label;
+ struct efi_device_path *device_path = NULL, *file_path = NULL;
+ struct efi_device_path *final_fp = NULL;
+ struct efi_device_path *initrd_dp = NULL;
+ struct efi_load_option lo;
+ void *data = NULL;
+ efi_uintn_t size;
+ efi_uintn_t fp_size = 0;
+ efi_status_t ret;
+ int r = CMD_RET_SUCCESS;
+
+ guid = efi_global_variable_guid;
+
+ /* attributes */
+ lo.attributes = LOAD_OPTION_ACTIVE; /* always ACTIVE */
+ lo.optional_data = NULL;
+ lo.label = NULL;
+
+ argc--;
+ argv++; /* 'add' */
+ for (; argc > 0; argc--, argv++) {
+ if (!strcmp(argv[0], "-b")) {
+ if (argc < 5 || lo.label) {
+ r = CMD_RET_USAGE;
+ goto out;
+ }
+ id = (int)hextoul(argv[1], );
+ if (*endp != '\0' || id > 0x)
+ return CMD_RET_USAGE;
+
+ efi_create_indexed_name(var_name16, sizeof(var_name16),
+ "Boot", id);
+
+ /* label */
+ label_len = strlen(argv[2]);
+ label_len16 = utf8_utf16_strnlen(argv[2], label_len);
+ label = malloc((label_len16 + 1) * sizeof(u16));
+ if (!label)
+ return CMD_RET_FAILURE;
+ lo.label = label; /* label will be changed below */
+ utf8_utf16_strncpy(, argv[2], label_len);
+
Re: binman generator nodes break over read-back
Hi Jan, On Fri, 14 Jan 2022 at 06:40, Simon Glass wrote: > > Hi Jan, > > On Fri, 14 Jan 2022 at 02:40, Jan Kiszka wrote: > > > > Hi Simon, > > > > something is fishy with generator nodes: We are playing with replacing > > fdts and configs in [1] with generator nodes, and that works so far - > > until we want to read-back the image: > > > > $ binman ls -i flash.bin > > binman: Node '/fit@0x28': Generator node requires 'of-list' entry > > argument > > > > Same for "binman extract". I suspect that the embedded fdtmap still > > contains the generator node, rather than the unrolled entries. Am I > > right? How to check and fix that? > > You can check that by looking at the fdtmap in the resulting image. > > I suspect the problem is that in fit.py ReadEntries() tries to expand > the entries when this has already been done. I think we need a > separate case here, when reading the fdtmap, to say that the > generation is already done and should not be attempted. > > We have properties like orig-offset which get added to provide > information about the original state of the image description. Perhaps > we could add a property like 'generated' in the base Entry class that > we can check in entry types which do this sort of thing. When > generating, we add the property. When reading in an existing image, > the property would be present, so generation is skipped and the FIT is > used as is. > > As always the way to start is by adding a test which fails the new > situation. , perhaps based on testListCmd...() ? You probably figured this out already, but Image.FromFile() is called when the image is read in, and creates the Image with certain flags. So you can easily find out if the image was read in or is being generate, and probably don't need to add a property to the fdtmap. Regards, Simon > > Regards, > Simon > > > > > Jan > > > > [1] > > https://github.com/u-boot/u-boot/blob/master/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi > > > > -- > > Siemens AG, Technology > > Competence Center Embedded Linux
[PATCH 1/1] configs: disable UEFI for Colibri VF610
The size of the board file is limited to 520192 bytes. This conflicts with the size requirement for the UEFI code. Signed-off-by: Heinrich Schuchardt --- configs/colibri_vf_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 350e1cf30e..c0a7e11a62 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -106,4 +106,4 @@ CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_FDT_FIXUP_PARTITIONS=y -# CONFIG_EFI_UNICODE_CAPITALIZATION is not set +# CONFIG_EFI_LOADER is not set -- 2.33.1
[PATCH 1/1] efi_loader: fix SectionAlignment, FileAlignment
The alignment of sections in the EFI binaries generated by U-Boot is
incorrect.
According to the PE-COFF specification [1] the minimum value for
FileAlignment is 512. If the value of SectionAlignment is
less then the page size, it must equal FileAlignment.
Let's set both values to 512 for the ARM and RISC-V architectures.
[1] https://docs.microsoft.com/en-us/windows/win32/debug/pe-format
Signed-off-by: Heinrich Schuchardt
---
arch/arm/lib/crt0_aarch64_efi.S| 5 +++--
arch/arm/lib/crt0_arm_efi.S| 5 +++--
arch/arm/lib/elf_aarch64_efi.lds | 4 ++--
arch/arm/lib/elf_arm_efi.lds | 4 ++--
arch/riscv/lib/crt0_riscv_efi.S| 5 +++--
arch/riscv/lib/elf_riscv32_efi.lds | 4 ++--
arch/riscv/lib/elf_riscv64_efi.lds | 4 ++--
7 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/arch/arm/lib/crt0_aarch64_efi.S b/arch/arm/lib/crt0_aarch64_efi.S
index 492195f765..7f38465359 100644
--- a/arch/arm/lib/crt0_aarch64_efi.S
+++ b/arch/arm/lib/crt0_aarch64_efi.S
@@ -47,8 +47,8 @@ optional_header:
extra_header_fields:
.quad 0 /* ImageBase */
- .long 0x20/* SectionAlignment */
- .long 0x8 /* FileAlignment */
+ .long 0x200 /* SectionAlignment */
+ .long 0x200 /* FileAlignment */
.short 0 /* MajorOperatingSystemVersion
*/
.short 0 /* MinorOperatingSystemVersion
*/
.short 0 /* MajorImageVersion */
@@ -117,6 +117,7 @@ section_table:
.short 0 /* NumberOfLineNumbers (0 for executables) */
.long 0xe0500020 /* Characteristics (section flags) */
+ .align 9
_start:
stp x29, x30, [sp, #-32]!
mov x29, sp
diff --git a/arch/arm/lib/crt0_arm_efi.S b/arch/arm/lib/crt0_arm_efi.S
index cc8a115f31..75ee37b7d3 100644
--- a/arch/arm/lib/crt0_arm_efi.S
+++ b/arch/arm/lib/crt0_arm_efi.S
@@ -47,8 +47,8 @@ optional_header:
extra_header_fields:
.long 0 /* image_base */
- .long 0x20/* SectionAlignment */
- .long 0x8 /* FileAlignment */
+ .long 0x200 /* SectionAlignment */
+ .long 0x200 /* FileAlignment */
.short 0 /* MajorOperatingSystemVersion
*/
.short 0 /* MinorOperatingSystemVersion
*/
.short 0 /* MajorImageVersion */
@@ -115,6 +115,7 @@ section_table:
.short 0 /* NumberOfLineNumbers (0 for executables) */
.long 0xe0500020 /* Characteristics (section flags) */
+ .align 9
_start:
stmfd sp!, {r0-r2, lr}
diff --git a/arch/arm/lib/elf_aarch64_efi.lds b/arch/arm/lib/elf_aarch64_efi.lds
index 90af469f48..c0604dad46 100644
--- a/arch/arm/lib/elf_aarch64_efi.lds
+++ b/arch/arm/lib/elf_aarch64_efi.lds
@@ -18,7 +18,7 @@ SECTIONS
*(.gnu.linkonce.t.*)
*(.srodata)
*(.rodata*)
- . = ALIGN(16);
+ . = ALIGN(512);
}
_etext = .;
_text_size = . - _text;
@@ -44,7 +44,7 @@ SECTIONS
*(.bss)
*(.bss.*)
*(COMMON)
- . = ALIGN(16);
+ . = ALIGN(512);
_bss_end = .;
_edata = .;
}
diff --git a/arch/arm/lib/elf_arm_efi.lds b/arch/arm/lib/elf_arm_efi.lds
index d6d742e868..767ebda635 100644
--- a/arch/arm/lib/elf_arm_efi.lds
+++ b/arch/arm/lib/elf_arm_efi.lds
@@ -18,7 +18,7 @@ SECTIONS
*(.gnu.linkonce.t.*)
*(.srodata)
*(.rodata*)
- . = ALIGN(16);
+ . = ALIGN(512);
}
_etext = .;
_text_size = . - _text;
@@ -44,7 +44,7 @@ SECTIONS
*(.bss)
*(.bss.*)
*(COMMON)
- . = ALIGN(16);
+ . = ALIGN(512);
_bss_end = .;
_edata = .;
}
diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S
index b0a7a39a72..1d53358d2e 100644
--- a/arch/riscv/lib/crt0_riscv_efi.S
+++ b/arch/riscv/lib/crt0_riscv_efi.S
@@ -71,8 +71,8 @@ extra_header_fields:
#else
.quad 0 /* ImageBase */
#endif
- .long 0x20/* SectionAlignment */
- .long 0x8 /* FileAlignment */
+ .long 0x200 /* SectionAlignment */
+ .long 0x200 /* FileAlignment */
.short 0 /*
Re: imx8mm-evk does not boot kernel 5.16
Hi Fabio On Fri, 2022-01-14 at 16:44 -0300, Fabio Estevam wrote: > Hi Marcel, > > On Fri, Jan 14, 2022 at 3:10 PM Marcel Ziswiler > wrote: > > > Strange, remember, I am working on Verdin iMX8M Mini support [1] and run > > that stuff more or less daily. > > However, as you can see in that patch series, I build the imx-sdma driver > > now as a module just like already > > merged for imx_v6_v7_defconfig. As I also do have an imx8mm-evk laying > > around somewhere I can give that a > > try > > as well. I keep you posted... > > Just noticed that when using the TF-A from NXP: imx-atf branch: > imx_5.4.47_2.2.0 the 5.16 kernel boots fine. I am always using imx_5.4.47_2.3.0 resp. for our board our fork thereof which defaults to a different UART. > When using the mainline TF-A (v2.5 or v2.6) the board hangs with 5.16 I have to admit that I never tried mainline TF-A so far. > Thanks Thank you. Cheers Marcel
[PATCH v3 1/3] imx: Don't define __ASSEMBLY__ in C files
This is supposed to be a build-system flag. Move it there so we can define it before linux/kconfig.h is included. Signed-off-by: Simon Glass --- (no changes since v1) arch/arm/mach-imx/Makefile| 2 +- arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg | 1 - arch/arm/mach-imx/imx8m/imximage-8mn-ddr4.cfg | 1 - arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg | 1 - arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg | 1 - arch/arm/mach-imx/imx8m/imximage.cfg | 1 - arch/arm/mach-imx/spl_qspi.cfg| 1 - arch/arm/mach-imx/spl_sd.cfg | 1 - board/advantech/imx8qm_rom7720_a1/imximage.cfg| 1 - board/aristainetos/aristainetos2.cfg | 1 - board/beacon/imx8mm/imximage-8mm-lpddr4.cfg | 1 - board/beacon/imx8mn/imximage-8mn-lpddr4.cfg | 1 - board/boundary/nitrogen6x/nitrogen6dl.cfg | 1 - board/boundary/nitrogen6x/nitrogen6dl2g.cfg | 1 - board/boundary/nitrogen6x/nitrogen6q.cfg | 1 - board/boundary/nitrogen6x/nitrogen6q2g.cfg| 1 - board/boundary/nitrogen6x/nitrogen6s.cfg | 1 - board/boundary/nitrogen6x/nitrogen6s1g.cfg| 1 - board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg | 1 - board/congatec/cgtqmx8/imximage.cfg | 1 - board/ea/mx7ulp_com/imximage.cfg | 1 - board/freescale/imx8mm_evk/imximage-8mm-lpddr4.cfg| 1 - board/freescale/imx8mn_evk/imximage-8mn-ddr4.cfg | 1 - board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg| 1 - board/freescale/imx8qm_mek/imximage.cfg | 1 - board/freescale/imx8qm_mek/uboot-container.cfg| 1 - board/freescale/imx8qxp_mek/imximage.cfg | 1 - board/freescale/imx8qxp_mek/uboot-container.cfg | 1 - board/freescale/imxrt1020-evk/imximage.cfg| 1 - board/freescale/imxrt1050-evk/imximage.cfg| 1 - board/freescale/mx6slevk/imximage.cfg | 1 - board/freescale/mx6sllevk/imximage.cfg| 1 - board/freescale/mx6sxsabreauto/imximage.cfg | 1 - board/freescale/mx6sxsabresd/imximage.cfg | 1 - board/freescale/mx6ullevk/imximage.cfg| 1 - board/freescale/mx7dsabresd/imximage.cfg | 1 - board/freescale/mx7ulp_evk/imximage.cfg | 1 - board/gateworks/venice/imximage-8mm-lpddr4.cfg| 1 - board/ge/bx50v3/bx50v3.cfg| 1 - board/kontron/sl-mx8mm/imximage.cfg | 1 - board/novtech/meerkat96/imximage.cfg | 1 - board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg| 1 - board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg | 1 - board/phytec/phycore_imx8mm/imximage-8mm-sd.cfg | 1 - board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg | 1 - board/ronetix/imx8mq-cm/imximage-8mq-lpddr4.cfg | 1 - board/siemens/capricorn/imximage.cfg | 1 - board/siemens/capricorn/uboot-container.cfg | 1 - board/softing/vining_2000/imximage.cfg| 1 - board/somlabs/visionsom-6ull/imximage.cfg | 1 - board/storopack/smegw01/imximage.cfg | 1 - board/tbs/tbs2910/tbs2910.cfg | 1 - board/technexion/pico-imx6ul/imximage.cfg | 1 - board/toradex/apalis-imx8/apalis-imx8-imximage.cfg| 1 - board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg | 1 - board/toradex/colibri-imx6ull/imximage.cfg| 1 - board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg| 1 - board/toradex/colibri_imx7/imximage.cfg | 1 - board/toradex/verdin-imx8mm/imximage.cfg | 1 - board/tq/tqma6/tqma6dl.cfg| 1 - board/tq/tqma6/tqma6q.cfg | 1 - board/tq/tqma6/tqma6s.cfg | 1 - board/warp/imximage.cfg | 1 - board/warp7/imximage.cfg | 1 - 64 files changed, 1 insertion(+), 64 deletions(-) diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 07954bc2014..77e72702bba 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -91,7 +91,7 @@ $(PLUGIN).bin: endif quiet_cmd_cpp_cfg = CFGS$@ - cmd_cpp_cfg = $(CPP) $(cpp_flags) -x c -o $@ $< + cmd_cpp_cfg = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -x c -o $@ $< # mkimage source config file IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%) diff --git a/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg b/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg index 1a2e43e6718..e06d53ef417 100644 ---
[PATCH v3 3/3] bloblist: Update to use conditional value
Use the new IF_ENABLED_INT() feature to avoid needing our own inline
function to handle this case. Tidy up the logic to ensure that the value
is only used when present. Update the 'expected' comment also.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add new patch to update bloblist to use conditional value
common/bloblist.c | 15 +++
include/bloblist.h | 10 --
2 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/common/bloblist.c b/common/bloblist.c
index 056b50c2cb6..406073c8105 100644
--- a/common/bloblist.c
+++ b/common/bloblist.c
@@ -430,18 +430,23 @@ void bloblist_reloc(void *to, uint to_size, void *from,
uint from_size)
int bloblist_init(void)
{
+ bool fixed = IS_ENABLED(CONFIG_BLOBLIST_FIXED);
int ret = -ENOENT;
ulong addr, size;
bool expected;
/**
-* Wed expect to find an existing bloblist in the first phase of U-Boot
-* that runs
+* We don't expect to find an existing bloblist in the first phase of
+* U-Boot that runs. Also we have no way to receive the address of an
+* allocated bloblist from a previous stage, so it must be at a fixed
+* address.
*/
- expected = !u_boot_first_phase();
+ expected = fixed && !u_boot_first_phase();
if (spl_prev_phase() == PHASE_TPL && !IS_ENABLED(CONFIG_TPL_BLOBLIST))
expected = false;
- addr = bloblist_addr();
+ if (fixed)
+ addr = IF_ENABLED_INT(CONFIG_BLOBLIST_FIXED,
+ CONFIG_BLOBLIST_ADDR);
size = CONFIG_BLOBLIST_SIZE;
if (expected) {
ret = bloblist_check(addr, size);
@@ -460,6 +465,8 @@ int bloblist_init(void)
if (!ptr)
return log_msg_ret("alloc", -ENOMEM);
addr = map_to_sysmem(ptr);
+ } else if (!fixed) {
+ return log_msg_ret("!fixed", ret);
}
log_debug("Creating new bloblist size %lx at %lx\n", size,
addr);
diff --git a/include/bloblist.h b/include/bloblist.h
index 173129b0273..d0e128acf10 100644
--- a/include/bloblist.h
+++ b/include/bloblist.h
@@ -147,16 +147,6 @@ struct bloblist_rec {
u32 spare;
};
-/* access CONFIG_BLOBLIST_ADDR, dealing with it possibly not being defined */
-static inline ulong bloblist_addr(void)
-{
-#ifdef CONFIG_BLOBLIST_FIXED
- return CONFIG_BLOBLIST_ADDR;
-#else
- return 0;
-#endif
-}
-
/**
* bloblist_check_magic() - return a bloblist if the magic matches
*
--
2.34.1.703.g22d0c6ccf7-goog
[PATCH v3 2/3] kconfig: Add support for conditional values
At present if an optional Kconfig value needs to be used it must be
bracketed by #ifdef. For example, with this Kconfig setup:
config WIBBLE
bool "Support wibbles, the world needs more wibbles"
config WIBBLE_ADDR
hex "Address of the wibble"
depends on WIBBLE
then the following code must be used:
#ifdef CONFIG_WIBBLE
static void handle_wibble(void)
{
int val = CONFIG_WIBBLE_ADDR;
...
}
#endif
static void init_machine()
{
...
#ifdef CONFIG_WIBBLE
handle_wibble();
#endif
}
Add a new IF_ENABLED_INT() to help with this. So now it is possible to
write, without #ifdefs:
static void handle_wibble(void)
{
int val = IF_ENABLED_INT(CONFIG_WIBBLE, CONFIG_WIBBLE_ADDR);
...
}
static void init_machine()
{
...
if (IS_ENABLED(CONFIG_WIBBLE))
handle_wibble();
}
The value will be 0 if CONFIG_WIBBLE is not defined, and
CONFIG_WIBBLE_ADDR if it is. This allows us to reduce the use of #ifdef in
the code, ensuring that the compiler still checks the code even if it is
not ultimately used for a particular build.
Add a CONFIG_IF_ENABLED_INT() version as well.
If an attempt is made to use a value that does not exist (i.e. when the
conditional is not enabled), an error about a non-existing function is
generated, e.g.:
common/bloblist.c:447: undefined reference to `invalid_use_of_IF_ENABLED_INT'
Signed-off-by: Simon Glass
---
Changes in v3:
- Add a way to detect use of a non-existent value
include/linux/kconfig.h | 32
scripts/Makefile.autoconf | 2 +-
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h
index a1d1a298426..e59e920c108 100644
--- a/include/linux/kconfig.h
+++ b/include/linux/kconfig.h
@@ -59,6 +59,26 @@
*/
#define CONFIG_VAL(option) config_val(option)
+/*
+ * This uses a similar mechanism to config_enabled() above. If cfg is enabled,
+ * it resolves to the value of opt_cfg, otherwise it resolves to def_val
+ */
+#define config_opt_enabled(cfg, opt_cfg, def_val) _config_opt_enabled(cfg,
opt_cfg, def_val)
+#define _config_opt_enabled(cfg_val, opt_value, def_val) \
+ __config_opt_enabled(__ARG_PLACEHOLDER_##cfg_val, opt_value, def_val)
+#define __config_opt_enabled(arg1_or_junk, arg2, def_val) \
+ ___config_opt_enabled(arg1_or_junk arg2, def_val)
+#define ___config_opt_enabled(__ignored, val, ...) val
+
+#ifndef __ASSEMBLY__
+/* detect usage of a the value when the conditional is not enabled */
+long invalid_use_of_IF_ENABLED_INT(void);
+
+/* Evaluates to 0 if option is not defined, int_option if it is defined */
+#define IF_ENABLED_INT(option, int_option) \
+ config_opt_enabled(option, int_option, invalid_use_of_IF_ENABLED_INT())
+#endif
+
/*
* Count number of arguments to a variadic macro. Currently only need
* it for 1, 2 or 3 arguments.
@@ -113,5 +133,17 @@
#define CONFIG_IS_ENABLED(option, ...) \
__concat(__CONFIG_IS_ENABLED_, __count_args(option, ##__VA_ARGS__))
(option, ##__VA_ARGS__)
+#ifndef __ASSEMBLY__
+/* detect usage of a the value when the conditional is not enabled */
+long invalid_use_of_CONFIG_IF_ENABLED_INT(void);
+
+/*
+ * Evaluates to 0 if SPL_/TPL_/option is not defined, SPL_/TPL_int_option if it
+ * is defined
+ */
+#define CONFIG_IF_ENABLED_INT(option, int_option) \
+ CONFIG_IS_ENABLED(option, (CONFIG_VAL(int_option)), \
+ (invalid_use_of_CONFIG_IF_ENABLED_INT()))
+#endif
#endif /* __LINUX_KCONFIG_H */
diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf
index 5ed9abc8e14..0b3ffa08bfa 100644
--- a/scripts/Makefile.autoconf
+++ b/scripts/Makefile.autoconf
@@ -68,7 +68,7 @@ quiet_cmd_u_boot_cfg = CFG $@
cmd_u_boot_cfg = \
$(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM $(srctree)/include/common.h >
$@.tmp && { \
grep 'define CONFIG_' $@.tmp | \
- sed '/define CONFIG_IS_ENABLED(/d;/define
CONFIG_VAL(/d;' > $@; \
+ sed '/define CONFIG_IS_ENABLED(/d;/define
CONFIG_IF_ENABLED_INT(/d;/define CONFIG_VAL(/d;' > $@; \
rm $@.tmp; \
} || { \
rm $@.tmp; false; \
--
2.34.1.703.g22d0c6ccf7-goog
Re: [PATCH] phy: nop-phy: Enable reset-gpios support
On Fri, Jan 14, 2022 at 1:36 PM Tom Rini wrote:
>
> On Wed, Dec 22, 2021 at 08:04:30AM -0600, Adam Ford wrote:
>
> > Some usb-nop-xceiv devices use a gpio to put them in and
> > out of reset. Add a reset function to put them into that
> > state. This is similar to how Linux handles the
> > usb-nop-xceiv driver.
> >
> > Signed-off-by: Adam Ford
> >
> > diff --git a/drivers/phy/nop-phy.c b/drivers/phy/nop-phy.c
> > index 9f12ebc062..be993a764f 100644
> > --- a/drivers/phy/nop-phy.c
> > +++ b/drivers/phy/nop-phy.c
> > @@ -10,11 +10,24 @@
> > #include
> > #include
> > #include
> > +#include
> >
> > struct nop_phy_priv {
> > struct clk_bulk bulk;
> > + struct gpio_desc reset_gpio;
> > };
> >
> > +static int nop_phy_reset(struct phy *phy)
> > +{
> > + struct nop_phy_priv *priv = dev_get_priv(phy->dev);
> > +
> > + /* Return if there is no gpio since it's optional */
> > + if (!dm_gpio_is_valid(>reset_gpio))
> > + return 0;
> > +
> > + return dm_gpio_set_value(>reset_gpio, false);
> > +}
> > +
> > static int nop_phy_init(struct phy *phy)
> > {
> > struct nop_phy_priv *priv = dev_get_priv(phy->dev);
> > @@ -22,7 +35,12 @@ static int nop_phy_init(struct phy *phy)
> > if (CONFIG_IS_ENABLED(CLK))
> > return clk_enable_bulk(>bulk);
> >
> > - return 0;
> > + /* Return if there is no gpio since it's optional */
> > + if (!dm_gpio_is_valid(>reset_gpio))
> > + return 0;
> > +
> > + /* If there is a reset gpio, take it out of reset */
> > + return dm_gpio_set_value(>reset_gpio, true);
> > }
> >
> > static int nop_phy_probe(struct udevice *dev)
> > @@ -38,6 +56,12 @@ static int nop_phy_probe(struct udevice *dev)
> > }
> > }
> >
> > + ret = gpio_request_by_name(dev, "reset-gpios", 0,
> > +>reset_gpio,
> > +GPIOD_IS_OUT);
> > + if (ret != -ENOENT)
> > + return ret;
> > +
> > return 0;
> > }
> >
> > @@ -49,6 +73,7 @@ static const struct udevice_id nop_phy_ids[] = {
> >
> > static struct phy_ops nop_phy_ops = {
> > .init = nop_phy_init,
> > + .reset = nop_phy_reset,
> > };
> >
> > U_BOOT_DRIVER(nop_phy) = {
>
> This breaks:
> k2e_evm k2e_hs_evm k2g_evm k2g_hs_evm k2hk_evm k2hk_hs_evm k2l_evm
> k2l_hs_evm
> with:
>arm: + k2g_hs_evm
> +(k2g_hs_evm) arm-linux-gnueabi-ld.bfd: drivers/phy/nop-phy.o: in function
> `nop_phy_reset':
> +(k2g_hs_evm) drivers/phy/nop-phy.c:28: undefined reference to
> `dm_gpio_set_value'
> +(k2g_hs_evm) arm-linux-gnueabi-ld.bfd: drivers/phy/nop-phy.o: in function
> `nop_phy_init':
> +(k2g_hs_evm) drivers/phy/nop-phy.c:43: undefined reference to
> `dm_gpio_set_value'
> +(k2g_hs_evm) arm-linux-gnueabi-ld.bfd: drivers/phy/nop-phy.o: in function
> `nop_phy_probe':
> +(k2g_hs_evm) drivers/phy/nop-phy.c:59: undefined reference to
> `gpio_request_by_name'
> +(k2g_hs_evm) make[1]: *** [Makefile:1799: u-boot] Error 1
> +(k2g_hs_evm) make: *** [Makefile:177: sub-make] Error 2
>
> And yes, DM_GPIO is not set on these boards, so likely some of the
> above needs to be #ifdef'd. Thanks!
I'll do a V2 with the new functions encapsulated with an ifdef so it
hopefully won't break boards.
adam
>
> --
> Tom
Re: [PATCH] cmd: Add Kconfig option for multiprocessor cmds
On Fri, Jan 14, 2022 at 01:07:34PM +0100, Michal Simek wrote: > From: Ashok Reddy Soma > > Add Kconfig option(CONFIG_CMD_MP) to enable or disable multiprocessor > commands. Compile cmd/mp.c based on CONFIG_CMD_MP. > > Signed-off-by: Ashok Reddy Soma > Signed-off-by: Michal Simek > --- > > cmd/Kconfig | 8 > cmd/Makefile | 2 +- > 2 files changed, 9 insertions(+), 1 deletion(-) > > diff --git a/cmd/Kconfig b/cmd/Kconfig > index 5b30b13e438f..1e3eef4437b5 100644 > --- a/cmd/Kconfig > +++ b/cmd/Kconfig > @@ -1827,6 +1827,14 @@ config MP > different processors in multiprocessor > cases. > > +config CMD_MP > + bool "support for multiprocessor commands" > + depends on MP > + default y > + help > + This enables commands to bringup different processors > + in multiprocessor cases. > + > config CMD_TIMER > bool "timer" > help > diff --git a/cmd/Makefile b/cmd/Makefile > index 891819ae0f6b..9e8074bb7e49 100644 > --- a/cmd/Makefile > +++ b/cmd/Makefile > @@ -101,7 +101,7 @@ obj-$(CONFIG_CMD_MDIO) += mdio.o > obj-$(CONFIG_CMD_SLEEP) += sleep.o > obj-$(CONFIG_CMD_MMC) += mmc.o > obj-$(CONFIG_CMD_OPTEE_RPMB) += optee_rpmb.o > -obj-$(CONFIG_MP) += mp.o > +obj-$(CONFIG_CMD_MP) += mp.o > obj-$(CONFIG_CMD_MTD) += mtd.o > obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o > obj-$(CONFIG_CMD_CLONE) += clone.o The problem is that there's already an entry for MP in cmd/Kconfig. So yes, it should be fixed for consistency, but the current entry renamed/moved. Thanks! -- Tom signature.asc Description: PGP signature
Re: imx8mm-evk does not boot kernel 5.16
Hi Marcel, On Fri, Jan 14, 2022 at 3:10 PM Marcel Ziswiler wrote: > Strange, remember, I am working on Verdin iMX8M Mini support [1] and run that > stuff more or less daily. > However, as you can see in that patch series, I build the imx-sdma driver now > as a module just like already > merged for imx_v6_v7_defconfig. As I also do have an imx8mm-evk laying around > somewhere I can give that a try > as well. I keep you posted... Just noticed that when using the TF-A from NXP: imx-atf branch: imx_5.4.47_2.2.0 the 5.16 kernel boots fine. When using the mainline TF-A (v2.5 or v2.6) the board hangs with 5.16 Thanks
Re: [PATCH] phy: nop-phy: Enable reset-gpios support
On Wed, Dec 22, 2021 at 08:04:30AM -0600, Adam Ford wrote:
> Some usb-nop-xceiv devices use a gpio to put them in and
> out of reset. Add a reset function to put them into that
> state. This is similar to how Linux handles the
> usb-nop-xceiv driver.
>
> Signed-off-by: Adam Ford
>
> diff --git a/drivers/phy/nop-phy.c b/drivers/phy/nop-phy.c
> index 9f12ebc062..be993a764f 100644
> --- a/drivers/phy/nop-phy.c
> +++ b/drivers/phy/nop-phy.c
> @@ -10,11 +10,24 @@
> #include
> #include
> #include
> +#include
>
> struct nop_phy_priv {
> struct clk_bulk bulk;
> + struct gpio_desc reset_gpio;
> };
>
> +static int nop_phy_reset(struct phy *phy)
> +{
> + struct nop_phy_priv *priv = dev_get_priv(phy->dev);
> +
> + /* Return if there is no gpio since it's optional */
> + if (!dm_gpio_is_valid(>reset_gpio))
> + return 0;
> +
> + return dm_gpio_set_value(>reset_gpio, false);
> +}
> +
> static int nop_phy_init(struct phy *phy)
> {
> struct nop_phy_priv *priv = dev_get_priv(phy->dev);
> @@ -22,7 +35,12 @@ static int nop_phy_init(struct phy *phy)
> if (CONFIG_IS_ENABLED(CLK))
> return clk_enable_bulk(>bulk);
>
> - return 0;
> + /* Return if there is no gpio since it's optional */
> + if (!dm_gpio_is_valid(>reset_gpio))
> + return 0;
> +
> + /* If there is a reset gpio, take it out of reset */
> + return dm_gpio_set_value(>reset_gpio, true);
> }
>
> static int nop_phy_probe(struct udevice *dev)
> @@ -38,6 +56,12 @@ static int nop_phy_probe(struct udevice *dev)
> }
> }
>
> + ret = gpio_request_by_name(dev, "reset-gpios", 0,
> +>reset_gpio,
> +GPIOD_IS_OUT);
> + if (ret != -ENOENT)
> + return ret;
> +
> return 0;
> }
>
> @@ -49,6 +73,7 @@ static const struct udevice_id nop_phy_ids[] = {
>
> static struct phy_ops nop_phy_ops = {
> .init = nop_phy_init,
> + .reset = nop_phy_reset,
> };
>
> U_BOOT_DRIVER(nop_phy) = {
This breaks:
k2e_evm k2e_hs_evm k2g_evm k2g_hs_evm k2hk_evm k2hk_hs_evm k2l_evm
k2l_hs_evm
with:
arm: + k2g_hs_evm
+(k2g_hs_evm) arm-linux-gnueabi-ld.bfd: drivers/phy/nop-phy.o: in function
`nop_phy_reset':
+(k2g_hs_evm) drivers/phy/nop-phy.c:28: undefined reference to
`dm_gpio_set_value'
+(k2g_hs_evm) arm-linux-gnueabi-ld.bfd: drivers/phy/nop-phy.o: in function
`nop_phy_init':
+(k2g_hs_evm) drivers/phy/nop-phy.c:43: undefined reference to
`dm_gpio_set_value'
+(k2g_hs_evm) arm-linux-gnueabi-ld.bfd: drivers/phy/nop-phy.o: in function
`nop_phy_probe':
+(k2g_hs_evm) drivers/phy/nop-phy.c:59: undefined reference to
`gpio_request_by_name'
+(k2g_hs_evm) make[1]: *** [Makefile:1799: u-boot] Error 1
+(k2g_hs_evm) make: *** [Makefile:177: sub-make] Error 2
And yes, DM_GPIO is not set on these boards, so likely some of the
above needs to be #ifdef'd. Thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] arm: mach-k3: am642_init: Unlock MCU PADCFG regs
On 16:14-20211215, Christian Gmeiner wrote: > From: Michael Liebert > > Currently only the PADCFG registers of the main domain are unlocked. > Also unlock PADCFG registers of MCU domain, so MCU pin muxing can be > configured by u-boot or Linux. > > Signed-off-by: Michael Liebert > Tested-by: Christian Gmeiner > --- > arch/arm/mach-k3/am642_init.c | 3 +++ > arch/arm/mach-k3/include/mach/am64_hardware.h | 2 ++ > 2 files changed, 5 insertions(+) > > diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c > index 533905daeb..958fa05af4 100644 > --- a/arch/arm/mach-k3/am642_init.c > +++ b/arch/arm/mach-k3/am642_init.c > @@ -37,6 +37,9 @@ static void ctrl_mmr_unlock(void) > mmr_unlock(CTRL_MMR0_BASE, 3); > mmr_unlock(CTRL_MMR0_BASE, 5); > mmr_unlock(CTRL_MMR0_BASE, 6); > + > + /* Unlock all MCU_PADCFG_MMR1 module registers */ > + mmr_unlock(MCU_PADCFG_MMR1_BASE, 1); > } > > /* > diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h > b/arch/arm/mach-k3/include/mach/am64_hardware.h > index 96383437d5..e06e1f9532 100644 > --- a/arch/arm/mach-k3/include/mach/am64_hardware.h > +++ b/arch/arm/mach-k3/include/mach/am64_hardware.h > @@ -12,6 +12,8 @@ > > #define PADCFG_MMR1_BASE 0xf > > +#define MCU_PADCFG_MMR1_BASE 0x0408 > + > #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK 0x0078 > #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3 > Acked-by: Nishanth Menon -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Re: [PATCH] pinctrl: single: add support for pinctrl-single, pins when #pinctrl-cells = 2
On Fri, Dec 03, 2021 at 03:18:53PM +, AJ Bagwell wrote:
> Changes to the am33xx device (33e9021a) trees have been merged in from
> the upstream linux kernel which now means the device tree uses the new
> pins format (as of 5.10) where the confinguration can be stores as a
> separate configuration value and pin mux mode which are then OR'd
> together.
>
> This patch adds support for the new format to u-boot so that
> pinctrl-cells is now respected when reading in pinctrl-single,pins
> ---
> drivers/pinctrl/pinctrl-single.c | 55 +---
> 1 file changed, 29 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-single.c
> b/drivers/pinctrl/pinctrl-single.c
> index 8fc07e3498..bc9c17bce8 100644
> --- a/drivers/pinctrl/pinctrl-single.c
> +++ b/drivers/pinctrl/pinctrl-single.c
> @@ -28,6 +28,7 @@ struct single_pdata {
> int offset;
> u32 mask;
> u32 width;
> + u32 args_count;
> bool bits_per_mux;
> };
>
> @@ -78,20 +79,6 @@ struct single_priv {
> struct list_head gpiofuncs;
> };
>
> -/**
> - * struct single_fdt_pin_cfg - pin configuration
> - *
> - * This structure is used for the pin configuration parameters in case
> - * the register controls only one pin.
> - *
> - * @reg: configuration register offset
> - * @val: configuration register value
> - */
> -struct single_fdt_pin_cfg {
> - fdt32_t reg;
> - fdt32_t val;
> -};
> -
> /**
> * struct single_fdt_bits_cfg - pin configuration
> *
> @@ -314,25 +301,28 @@ static int single_pin_compare(const void *s1, const
> void *s2)
> * @dev: Pointer to single pin configuration device which is the parent of
> * the pins node holding the pin configuration data.
> * @pins: Pointer to the first element of an array of register/value pairs
> - *of type 'struct single_fdt_pin_cfg'. Each such pair describes the
> - *the pin to be configured and the value to be used for
> configuration.
> + *of type 'u32'. Each such pair describes the pin to be configured
> + *and the value to be used for configuration.
> + *The value can either be a simple value if #pinctrl-cells = 1
> + *or a configuration value and a pin mux mode value if it is 2
> *This pointer points to a 'pinctrl-single,pins' property in the
> *device-tree.
> * @size: Size of the 'pins' array in bytes.
> - *The number of register/value pairs in the 'pins' array therefore
> - *equals to 'size / sizeof(struct single_fdt_pin_cfg)'.
> + *The number of cells in the array therefore equals to
> + *'size / sizeof(u32)'.
> * @fname: Function name.
> */
> static int single_configure_pins(struct udevice *dev,
> - const struct single_fdt_pin_cfg *pins,
> + const u32 *pins,
>int size, const char *fname)
> {
> struct single_pdata *pdata = dev_get_plat(dev);
> struct single_priv *priv = dev_get_priv(dev);
> - int n, pin, count = size / sizeof(struct single_fdt_pin_cfg);
> + int stride = pdata->args_count + 1;
> + int n, pin, count = size / sizeof(u32);
> struct single_func *func;
> phys_addr_t reg;
> - u32 offset, val;
> + u32 offset, val, mux;
>
> /* If function mask is null, needn't enable it. */
> if (!pdata->mask)
> @@ -344,16 +334,22 @@ static int single_configure_pins(struct udevice *dev,
>
> func->name = fname;
> func->npins = 0;
> - for (n = 0; n < count; n++, pins++) {
> - offset = fdt32_to_cpu(pins->reg);
> + for (n = 0; n < count; n += stride) {
> + offset = fdt32_to_cpu(pins[n]);
> if (offset > pdata->offset) {
> dev_err(dev, " invalid register offset 0x%x\n",
> offset);
> continue;
> }
>
> + /* if the pinctrl-cells is 2 then the second cell contains the
> mux */
> + if (stride == 3)
> + mux = fdt32_to_cpu(pins[n + 2]);
> + else
> + mux = 0;
> +
> reg = pdata->base + offset;
> - val = fdt32_to_cpu(pins->val) & pdata->mask;
> + val = (fdt32_to_cpu(pins[n + 1]) | mux) & pdata->mask;
> pin = single_get_pin_by_offset(dev, offset);
> if (pin < 0) {
> dev_err(dev, " failed to get pin by offset %x\n",
> @@ -453,7 +449,7 @@ static int single_configure_bits(struct udevice *dev,
> static int single_set_state(struct udevice *dev,
> struct udevice *config)
> {
> - const struct single_fdt_pin_cfg *prop;
> + const u32 *prop;
> const struct single_fdt_bits_cfg *prop_bits;
> int len;
>
> @@ -461,7 +457,7 @@ static int single_set_state(struct udevice *dev,
>
> if (prop) {
> dev_dbg(dev,
Re: [PATCH v3 1/1] rsa: adds rsa3072 algorithm
On Fri, Dec 10, 2021 at 02:00:55PM +0800, Jamin Lin wrote:
> Add to support rsa 3072 bits algorithm in tools
> for image sign at host side and adds rsa 3072 bits
> verification in the image binary.
>
> Add test case in vboot for sha384 with rsa3072 algorithm testing.
>
> Signed-off-by: Jamin Lin
> ---
> include/u-boot/rsa.h| 1 +
> lib/rsa/rsa-verify.c| 6 +++
> test/py/tests/test_vboot.py | 12 +-
> test/py/tests/vboot/sign-configs-sha384.its | 45 +
> test/py/tests/vboot/sign-images-sha384.its | 42 +++
> tools/image-sig-host.c | 7
> 6 files changed, 111 insertions(+), 2 deletions(-)
> create mode 100644 test/py/tests/vboot/sign-configs-sha384.its
> create mode 100644 test/py/tests/vboot/sign-images-sha384.its
>
> diff --git a/include/u-boot/rsa.h b/include/u-boot/rsa.h
> index 7556aa5b4b..bb56c2243c 100644
> --- a/include/u-boot/rsa.h
> +++ b/include/u-boot/rsa.h
> @@ -110,6 +110,7 @@ int padding_pss_verify(struct image_sign_info *info,
> #define RSA_DEFAULT_PADDING_NAME "pkcs-1.5"
>
> #define RSA2048_BYTES(2048 / 8)
> +#define RSA3072_BYTES(3072 / 8)
> #define RSA4096_BYTES(4096 / 8)
>
> /* This is the minimum/maximum key size we support, in bits */
> diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
> index 83f7564101..4fe487d7e5 100644
> --- a/lib/rsa/rsa-verify.c
> +++ b/lib/rsa/rsa-verify.c
> @@ -588,6 +588,12 @@ U_BOOT_CRYPTO_ALGO(rsa2048) = {
> .verify = rsa_verify,
> };
>
> +U_BOOT_CRYPTO_ALGO(rsa3072) = {
> + .name = "rsa3072",
> + .key_len = RSA3072_BYTES,
> + .verify = rsa_verify,
> +};
> +
> U_BOOT_CRYPTO_ALGO(rsa4096) = {
> .name = "rsa4096",
> .key_len = RSA4096_BYTES,
> diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py
> index 095e00cce3..b080d482af 100644
> --- a/test/py/tests/test_vboot.py
> +++ b/test/py/tests/test_vboot.py
> @@ -45,6 +45,8 @@ TESTDATA = [
> ['sha256-pss-pad', 'sha256', '-pss', '-E -p 0x1', False, False],
> ['sha256-pss-required', 'sha256', '-pss', None, True, False],
> ['sha256-pss-pad-required', 'sha256', '-pss', '-E -p 0x1', True,
> True],
> +['sha384-basic', 'sha384', '', None, False, False],
> +['sha384-pad', 'sha384', '', '-E -p 0x1', False, False],
> ]
>
> @pytest.mark.boardspec('sandbox')
> @@ -180,10 +182,16 @@ def test_vboot(u_boot_console, name, sha_algo, padding,
> sign_options, required,
> name: Name of of the key (e.g. 'dev')
> """
> public_exponent = 65537
> +
> +if sha_algo == "sha384":
> +rsa_keygen_bits = 3072
> +else:
> +rsa_keygen_bits = 2048
> +
> util.run_and_log(cons, 'openssl genpkey -algorithm RSA -out %s%s.key
> '
> - '-pkeyopt rsa_keygen_bits:2048 '
> + '-pkeyopt rsa_keygen_bits:%d '
> '-pkeyopt rsa_keygen_pubexp:%d' %
> - (tmpdir, name, public_exponent))
> + (tmpdir, name, rsa_keygen_bits, public_exponent))
>
> # Create a certificate containing the public key
> util.run_and_log(cons, 'openssl req -batch -new -x509 -key %s%s.key '
> diff --git a/test/py/tests/vboot/sign-configs-sha384.its
> b/test/py/tests/vboot/sign-configs-sha384.its
> new file mode 100644
> index 00..2869401991
> --- /dev/null
> +++ b/test/py/tests/vboot/sign-configs-sha384.its
> @@ -0,0 +1,45 @@
> +/dts-v1/;
> +
> +/ {
> + description = "Chrome OS kernel image with one or more FDT blobs";
> + #address-cells = <1>;
> +
> + images {
> + kernel {
> + data = /incbin/("test-kernel.bin");
> + type = "kernel_noload";
> + arch = "sandbox";
> + os = "linux";
> + compression = "none";
> + load = <0x4>;
> + entry = <0x8>;
> + kernel-version = <1>;
> + hash-1 {
> + algo = "sha384";
> + };
> + };
> + fdt-1 {
> + description = "snow";
> + data = /incbin/("sandbox-kernel.dtb");
> + type = "flat_dt";
> + arch = "sandbox";
> + compression = "none";
> + fdt-version = <1>;
> + hash-1 {
> + algo = "sha384";
> + };
> + };
> + };
> + configurations {
> + default = "conf-1";
> + conf-1 {
> + kernel = "kernel";
> + fdt = "fdt-1";
> + signature {
> + algo = "sha384,rsa3072";
> +
Re: imx8mm-evk does not boot kernel 5.16
Hi Fabio On Fri, 2022-01-14 at 15:00 -0300, Fabio Estevam wrote: > Hi, > > I am able to boot Linux 5.15.14 on an imx8mm-evk running U-Boot > 2022.01 just fine. > > However, if I try to boot a 5.16 kernel, the boot fails in most of the > attempts (like in 80% of the boots. It does boot completely in some of > the attempts). > > Starting kernel ... > (hangs here) > > Using earlycon I see that it hangs around the imx-sdma driver load: > [ 0.681930] imx-sdma 302c.dma-controller: Direct firmware load > for imx/sdma/sdma-imx7d.bin failed with error -2 > [ 0.689628] imx-sdma 302c.dma-controller: external firmware not > found, using ROM firmware > [ 0.689635] imx-sdma 302b.dma-controller: external firmware not > found, using ROM firmware > > Tried to disable the imx-sdma driver and the hang also happens, so it > is something else that causes the hang. > > If I use U-Boot from NXP the problem does not happen. > > I tried to select the imx8m power domain options: > > --- a/configs/imx8mm_evk_defconfig > +++ b/configs/imx8mm_evk_defconfig > @@ -72,6 +72,8 @@ CONFIG_MII=y > CONFIG_PINCTRL=y > CONFIG_SPL_PINCTRL=y > CONFIG_PINCTRL_IMX8M=y > +CONFIG_POWER_DOMAIN=y > +CONFIG_IMX8M_POWER_DOMAIN=y > CONFIG_DM_PMIC=y > CONFIG_SPL_DM_PMIC_PCA9450=y > CONFIG_DM_REGULATOR=y > > but it did not help. > > The same behavior is seen with the top of tree U-Boot. > > Does anyone have any ideas as to what is missing? Strange, remember, I am working on Verdin iMX8M Mini support [1] and run that stuff more or less daily. However, as you can see in that patch series, I build the imx-sdma driver now as a module just like already merged for imx_v6_v7_defconfig. As I also do have an imx8mm-evk laying around somewhere I can give that a try as well. I keep you posted... [1] https://lore.kernel.org/lkml/20220114141507.395271-1-mar...@ziswiler.com/ > Thanks, > > Fabio Estevam Cheers Marcel
imx8mm-evk does not boot kernel 5.16
Hi, I am able to boot Linux 5.15.14 on an imx8mm-evk running U-Boot 2022.01 just fine. However, if I try to boot a 5.16 kernel, the boot fails in most of the attempts (like in 80% of the boots. It does boot completely in some of the attempts). Starting kernel ... (hangs here) Using earlycon I see that it hangs around the imx-sdma driver load: [0.681930] imx-sdma 302c.dma-controller: Direct firmware load for imx/sdma/sdma-imx7d.bin failed with error -2 [0.689628] imx-sdma 302c.dma-controller: external firmware not found, using ROM firmware [0.689635] imx-sdma 302b.dma-controller: external firmware not found, using ROM firmware Tried to disable the imx-sdma driver and the hang also happens, so it is something else that causes the hang. If I use U-Boot from NXP the problem does not happen. I tried to select the imx8m power domain options: --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -72,6 +72,8 @@ CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_DM_PMIC=y CONFIG_SPL_DM_PMIC_PCA9450=y CONFIG_DM_REGULATOR=y but it did not help. The same behavior is seen with the top of tree U-Boot. Does anyone have any ideas as to what is missing? Thanks, Fabio Estevam
[PATCH v2] tools: mkimage: Call verify_header after writing image to disk
If image backend provides verify_header callback then call it after writing
image to disk. This ensures that written image is correct.
Signed-off-by: Pali Rohár
---
tools/mkimage.c | 41 +
1 file changed, 41 insertions(+)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index fbe883ce3620..d5ad0925225c 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -336,6 +336,44 @@ static void process_args(int argc, char **argv)
usage("Missing output filename");
}
+static void verify_image(const struct image_type_params *tparams)
+{
+ struct stat sbuf;
+ void *ptr;
+ int ifd;
+
+ ifd = open(params.imagefile, O_RDONLY | O_BINARY);
+ if (ifd < 0) {
+ fprintf(stderr, "%s: Can't open %s: %s\n",
+ params.cmdname, params.imagefile,
+ strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+
+ if (fstat(ifd, ) < 0) {
+ fprintf(stderr, "%s: Can't stat %s: %s\n",
+ params.cmdname, params.imagefile, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+ params.file_size = sbuf.st_size;
+
+ ptr = mmap(0, params.file_size, PROT_READ, MAP_SHARED, ifd, 0);
+ if (ptr == MAP_FAILED) {
+ fprintf(stderr, "%s: Can't map %s: %s\n",
+ params.cmdname, params.imagefile, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+
+ if (tparams->verify_header((unsigned char *)ptr, params.file_size,
) != 0) {
+ fprintf(stderr, "%s: Failed to verify header of %s\n",
+ params.cmdname, params.imagefile);
+ exit(EXIT_FAILURE);
+ }
+
+ (void)munmap(ptr, params.file_size);
+ (void)close(ifd);
+}
+
int main(int argc, char **argv)
{
int ifd = -1;
@@ -698,6 +736,9 @@ int main(int argc, char **argv)
exit (EXIT_FAILURE);
}
+ if (tparams->verify_header)
+ verify_image(tparams);
+
exit (EXIT_SUCCESS);
}
--
2.20.1
Re: Please pull u-boot-marvell/master
On Fri, Jan 14, 2022 at 04:42:35PM +0100, Stefan Roese wrote: > Hi Tom, > > please pull the following Marvell MVEBU related patches: > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] introduce CONFIG_DEVICE_TREE_INCLUDES
Hi Rasmus,
On Tue, 26 Oct 2021 at 02:08, Rasmus Villemoes
wrote:
>
> On 26/10/2021 03.28, Simon Glass wrote:
> > Hi Rasmus,
> >
> > On Tue, 28 Sept 2021 at 02:57, Rasmus Villemoes
> > wrote:
> >>
> >> The build system already automatically looks for and includes an
> >> in-tree *-u-boot.dtsi when building the control .dtb. However, there
> >> are some things that are awkward to maintain in such an in-tree file,
> >> most notably the metadata associated to public keys used for verified
> >> boot.
> >>
> >> The only "official" API to get that metadata into the .dtb is via
> >> mkimage, as a side effect of building an actual signed image. But
> >> there are multiple problems with that. First of all, the final U-Boot
> >> (be it U-Boot proper or an SPL) image is built based on a binary
> >> image, the .dtb, and possibly some other binary artifacts. So
> >> modifying the .dtb after the build requires the meta-buildsystem
> >> (Yocto, buildroot, whatnot) to know about and repeat some of the steps
> >> that are already known to and handled by U-Boot's build system,
> >> resulting in needless duplication of code. It's also somewhat annoying
> >> and inconsistent to have a .dtb file in the build folder which is not
> >> generated by the command listed in the corresponding .cmd file (that
> >> of course applies to any generated file).
> >>
> >> So the contents of the /signature node really needs to be baked into
> >> the .dtb file when it is first created, which means providing the
> >> relevant data in the form of a .dtsi file. One could in theory put
> >> that data into the *-u-boot.dtsi file, but it's more convenient to be
> >> able to provide it externally: For example, when developing for a
> >> customer, it's common to use a set of dummy keys for development,
> >> while the consultants do not (and should not) have access to the
> >> actual keys used in production. For such a setup, it's easier if the
> >> keys used are chosen via the meta-buildsystem and the path(s) patched
> >> in during the configure step. And of course, nothing prevents anybody
> >> from having DEVICE_TREE_INCLUDES point at files maintained in git, or
> >> for that matter from including the public key metadata in the
> >> *-u-boot.dtsi directly and ignore this feature.
> >>
> >> There are other uses for this, e.g. in combination with ENV_IMPORT_FDT
> >> it can be used for providing the contents of the /config/environment
> >> node, so I don't want to tie this exclusively to use for verified
> >> boot.
> >>
> >> Signed-off-by: Rasmus Villemoes
> >> ---
> >>
> >> Getting the public key metadata into .dtsi form can be done with a
> >> little scripting (roughly 'mkimage -K' of a dummy image followed by
> >> 'dtc -I dtb -O dts'). I have a script that does that, along with
> >> options to set 'required' and 'required-mode' properties, include
> >> u-boot,dm-spl properties in case one wants to check U-Boot proper from
> >> SPL with the verified boot mechanism, etc. I'm happy to share that
> >> script if this gets accepted, but it's moot if this is rejected.
> >>
> >> I have previously tried to get an fdt_add_pubkey tool accepted [1,2]
> >> to disentangle the kernel and u-boot builds (or u-boot and SPL builds
> >> for that matter!), but as I've since realized, that isn't quite enough
> >> - the above points re modifying the .dtb after it is created but
> >> before that is used to create further build artifacts still
> >> stand. However, such a tool could still be useful for creating the
> >> .dtsi info without the private keys being present, and my key2dtsi.sh
> >> script could easily be modified to use a tool like that should it ever
> >> appear.
> >>
> >> [1]
> >> https://lore.kernel.org/u-boot/20200211094818.14219-3-rasmus.villem...@prevas.dk/
> >> [2]
> >> https://lore.kernel.org/u-boot/2184f1e6dd6247e48133c76205fee...@kaspersky.com/
> >>
> >> dts/Kconfig | 9 +
> >> scripts/Makefile.lib | 2 ++
> >> 2 files changed, 11 insertions(+)
> >
> > Reviewed-by: Simon Glass
> >
> > I suggest adding this to the documentation somewhere in
> > doc/develop/devicetree/
>
> Will do.
>
> > Getting the key into the U-Boot .dtb is normally done with mkimage, as
> > you say. I don't really understand why this approach is easier.
>
> I think I explained that in the commit message, but let me try with a
> more concrete example. I'm building, using Yocto as the umbrella build
> system, for a SOC that needs an SPL + U-Boot proper.
>
> So I have a U-Boot recipe that handles the configuration and
> compilation. That's mostly a matter of "make foo_defconfig" followed by
> "make ${UBOOT_TARGETS}" where UBOOT_TARGETS is something set in the
> machine config. That results in two artifacts, say SPL and u-boot.itb
> (the names don't really matter) that are almost ready to be written to
> whatever storage is used for them. Most likely, the SPL binary is built
> from a u-boot-spl-nodtb.bin and a spl.dtb and perhaps there's some
> SOC-specific header
Re: [PATCH v2] introduce CONFIG_DEVICE_TREE_INCLUDES
Hi Tom, On Fri, 14 Jan 2022 at 08:41, Tom Rini wrote: > > On Fri, Jan 14, 2022 at 09:30:29AM +0100, Rasmus Villemoes wrote: > > Ping > > > > On 21/11/2021 14.52, Rasmus Villemoes wrote: > > > The build system already automatically looks for and includes an > > > in-tree *-u-boot.dtsi when building the control .dtb. However, there > > > are some things that are awkward to maintain in such an in-tree file, > > > most notably the metadata associated to public keys used for verified > > > boot. > > > > > > The only "official" API to get that metadata into the .dtb is via > > > mkimage, as a side effect of building an actual signed image. But > > > there are multiple problems with that. First of all, the final U-Boot > > > (be it U-Boot proper or an SPL) image is built based on a binary > > > image, the .dtb, and possibly some other binary artifacts. So > > > modifying the .dtb after the build requires the meta-buildsystem > > > (Yocto, buildroot, whatnot) to know about and repeat some of the steps > > > that are already known to and handled by U-Boot's build system, > > > resulting in needless duplication of code. It's also somewhat annoying > > > and inconsistent to have a .dtb file in the build folder which is not > > > generated by the command listed in the corresponding .cmd file (that > > > of course applies to any generated file). > > > > > > So the contents of the /signature node really needs to be baked into > > > the .dtb file when it is first created, which means providing the > > > relevant data in the form of a .dtsi file. One could in theory put > > > that data into the *-u-boot.dtsi file, but it's more convenient to be > > > able to provide it externally: For example, when developing for a > > > customer, it's common to use a set of dummy keys for development, > > > while the consultants do not (and should not) have access to the > > > actual keys used in production. For such a setup, it's easier if the > > > keys used are chosen via the meta-buildsystem and the path(s) patched > > > in during the configure step. And of course, nothing prevents anybody > > > from having DEVICE_TREE_INCLUDES point at files maintained in git, or > > > for that matter from including the public key metadata in the > > > *-u-boot.dtsi directly and ignore this feature. > > > > > > There are other uses for this, e.g. in combination with ENV_IMPORT_FDT > > > it can be used for providing the contents of the /config/environment > > > node, so I don't want to tie this exclusively to use for verified > > > boot. > > > > > > Reviewed-by: Simon Glass > > > Signed-off-by: Rasmus Villemoes > > > --- > > > v2: rebase to current master, add paragraph to > > > doc/develop/devicetree/control.rst as suggested by Simon. I've taken > > > the liberty of keeping his R-b tag as this mostly just repeats what is > > > in the Kconfig help text and commit message. > > > > > > doc/develop/devicetree/control.rst | 18 ++ > > > dts/Kconfig| 9 + > > > scripts/Makefile.lib | 3 +++ > > > 3 files changed, 30 insertions(+) > > > > > > diff --git a/doc/develop/devicetree/control.rst > > > b/doc/develop/devicetree/control.rst > > > index 0e6f85d5af..ff008ba943 100644 > > > --- a/doc/develop/devicetree/control.rst > > > +++ b/doc/develop/devicetree/control.rst > > > @@ -182,6 +182,24 @@ main file, in this order:: > > > Only one of these is selected but of course you can #include another one > > > within > > > that file, to create a hierarchy of shared files. > > > > > > + > > > +External .dtsi fragments > > > + > > > + > > > +Apart from describing the hardware present, U-Boot also uses its > > > +control dtb for various configuration purposes. For example, the > > > +public key(s) used for Verified Boot are embedded in a specific format > > > +in a /signature node. > > > + > > > +As mentioned above, the U-Boot build system automatically includes a > > > +*-u-boot.dtsi file, if found, containing U-Boot specific > > > +quirks. However, some data, such as the mentioned public keys, are not > > > +appropriate for upstream U-Boot but are better kept and maintained > > > +outside the U-Boot repository. You can use CONFIG_DEVICE_TREE_INCLUDES > > > +to specify a list of .dtsi files that will also be included when > > > +building .dtb files. > > > + > > > + > > > Relocation, SPL and TPL > > > --- > > > > > > diff --git a/dts/Kconfig b/dts/Kconfig > > > index b7c4a2fec0..1f8debf1a8 100644 > > > --- a/dts/Kconfig > > > +++ b/dts/Kconfig > > > @@ -131,6 +131,15 @@ config DEFAULT_DEVICE_TREE > > > It can be overridden from the command line: > > > $ make DEVICE_TREE= > > > > > > +config DEVICE_TREE_INCLUDES > > > + string "Extra .dtsi files to include when building DT control" > > > + depends on OF_CONTROL > > > + help > > > + U-Boot's control .dtb is usually built from an in-tree .dts > > > + file, plus (if
[PATCH 3/3] riscv: qemu: Implement is_flash_available() for MTD NOR
Currently, if MTD NOR is enabled then U-Boot tries to issue flash
commands even when CFI flash DT node is not present. This causes
access fault on RISC-V emulators or ISS which do not emulate CFI
flash. To handle this issue, we implement is_flash_available() for
qemu-riscv board which will return 1 only if CFI flash DT node is
present.
Fixes: d248627f9d42 ("riscv: qemu: Enable MTD NOR flash support")
Signed-off-by: Anup Patel
---
board/emulation/qemu-riscv/qemu-riscv.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/board/emulation/qemu-riscv/qemu-riscv.c
b/board/emulation/qemu-riscv/qemu-riscv.c
index b0d9dd59b1..cd02dae1ab 100644
--- a/board/emulation/qemu-riscv/qemu-riscv.c
+++ b/board/emulation/qemu-riscv/qemu-riscv.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -16,6 +17,22 @@
DECLARE_GLOBAL_DATA_PTR;
+#if IS_ENABLED(CONFIG_MTD_NOR_FLASH)
+int is_flash_available(void)
+{
+ if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
+ const void *fdt =
+ (const void *)(uintptr_t)gd->arch.firmware_fdt_addr;
+ int rc = fdt_node_offset_by_compatible(fdt, -1, "cfi-flash");
+
+ if (rc >= 0)
+ return 1;
+ }
+
+ return 0;
+}
+#endif
+
int board_init(void)
{
/*
--
2.25.1
[PATCH 2/3] riscv: qemu: Enable HTIF console support
Enable support for HTIF console so that we can use QEMU RISC-V U-Boot on RISC-V emulators and ISS having it. Signed-off-by: Anup Patel Reviewed-by: Philipp Tomsich --- board/emulation/qemu-riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 1bbf1bc84a..f7538bc496 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -56,6 +56,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply DM_SCSI imply SYS_NS16550 imply SIFIVE_SERIAL + imply HTIF_CONSOLE if 64BIT imply SYSRESET imply SYSRESET_CMD_POWEROFF imply SYSRESET_SYSCON -- 2.25.1
[PATCH 1/3] serial: Add RISC-V HTIF console driver
Quite a few RISC-V emulators and ISS (including Spike) have host
transfer interface (HTIF) based console. This patch adds HTIF
based console driver for RISC-V platforms which depends totally
on DT node for HTIF register base address.
Signed-off-by: Anup Patel
Reviewed-by: Philipp Tomsich
---
drivers/serial/Kconfig | 8 ++
drivers/serial/Makefile | 1 +
drivers/serial/serial_htif.c | 178 +++
3 files changed, 187 insertions(+)
create mode 100644 drivers/serial/serial_htif.c
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 6c8fdda9a0..345d1881f5 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -866,6 +866,14 @@ config PXA_SERIAL
If you have a machine based on a Marvell XScale PXA2xx CPU you
can enable its onboard serial ports by enabling this option.
+config HTIF_CONSOLE
+ bool "RISC-V HTIF console support"
+ depends on DM_SERIAL && 64BIT
+ help
+ Select this to enable host transfer interface (HTIF) based serial
+ console. The HTIF device is quite common in RISC-V emulators and
+ RISC-V ISS so this driver allows using U-Boot on such platforms.
+
config SIFIVE_SERIAL
bool "SiFive UART support"
depends on DM_SERIAL
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8168af640f..52e70aa191 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -73,6 +73,7 @@ obj-$(CONFIG_OWL_SERIAL) += serial_owl.o
obj-$(CONFIG_OMAP_SERIAL) += serial_omap.o
obj-$(CONFIG_MTK_SERIAL) += serial_mtk.o
obj-$(CONFIG_MT7620_SERIAL) += serial_mt7620.o
+obj-$(CONFIG_HTIF_CONSOLE) += serial_htif.o
obj-$(CONFIG_SIFIVE_SERIAL) += serial_sifive.o
obj-$(CONFIG_XEN_SERIAL) += serial_xen.o
diff --git a/drivers/serial/serial_htif.c b/drivers/serial/serial_htif.c
new file mode 100644
index 00..5d2bf0aaeb
--- /dev/null
+++ b/drivers/serial/serial_htif.c
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Ventana Micro Systems Inc.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define HTIF_DATA_BITS 48
+#define HTIF_DATA_MASK ((1ULL << HTIF_DATA_BITS) - 1)
+#define HTIF_DATA_SHIFT0
+#define HTIF_CMD_BITS 8
+#define HTIF_CMD_MASK ((1ULL << HTIF_CMD_BITS) - 1)
+#define HTIF_CMD_SHIFT 48
+#define HTIF_DEV_BITS 8
+#define HTIF_DEV_MASK ((1ULL << HTIF_DEV_BITS) - 1)
+#define HTIF_DEV_SHIFT 56
+
+#define HTIF_DEV_SYSTEM0
+#define HTIF_DEV_CONSOLE 1
+
+#define HTIF_CONSOLE_CMD_GETC 0
+#define HTIF_CONSOLE_CMD_PUTC 1
+
+#if __riscv_xlen == 64
+# define TOHOST_CMD(dev, cmd, payload) \
+ (((u64)(dev) << HTIF_DEV_SHIFT) | \
+((u64)(cmd) << HTIF_CMD_SHIFT) | \
+(u64)(payload))
+#else
+# define TOHOST_CMD(dev, cmd, payload) ({ \
+ if ((dev) || (cmd)) \
+ __builtin_trap(); \
+ (payload); })
+#endif
+#define FROMHOST_DEV(fromhost_value) \
+ ((u64)((fromhost_value) >> HTIF_DEV_SHIFT) & HTIF_DEV_MASK)
+#define FROMHOST_CMD(fromhost_value) \
+ ((u64)((fromhost_value) >> HTIF_CMD_SHIFT) & HTIF_CMD_MASK)
+#define FROMHOST_DATA(fromhost_value) \
+ ((u64)((fromhost_value) >> HTIF_DATA_SHIFT) & HTIF_DATA_MASK)
+
+struct htif_plat {
+ void *fromhost;
+ void *tohost;
+ int console_char;
+};
+
+static void __check_fromhost(struct htif_plat *plat)
+{
+ u64 fh = readq(plat->fromhost);
+
+ if (!fh)
+ return;
+ writeq(0, plat->fromhost);
+
+ /* this should be from the console */
+ if (FROMHOST_DEV(fh) != HTIF_DEV_CONSOLE)
+ __builtin_trap();
+ switch (FROMHOST_CMD(fh)) {
+ case HTIF_CONSOLE_CMD_GETC:
+ plat->console_char = 1 + (u8)FROMHOST_DATA(fh);
+ break;
+ case HTIF_CONSOLE_CMD_PUTC:
+ break;
+ default:
+ __builtin_trap();
+ }
+}
+
+static void __set_tohost(struct htif_plat *plat,
+u64 dev, u64 cmd, u64 data)
+{
+ while (readq(plat->tohost))
+ __check_fromhost(plat);
+ writeq(TOHOST_CMD(dev, cmd, data), plat->tohost);
+}
+
+static int htif_serial_putc(struct udevice *dev, const char ch)
+{
+ struct htif_plat *plat = dev_get_plat(dev);
+
+ __set_tohost(plat, HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_PUTC, ch);
+ return 0;
+}
+
+static int htif_serial_getc(struct udevice *dev)
+{
+ int ch;
+ struct htif_plat *plat = dev_get_plat(dev);
+
+ if (plat->console_char < 0)
+ __check_fromhost(plat);
+
+ if (plat->console_char >= 0) {
+ ch = plat->console_char;
+ plat->console_char = -1;
+ __set_tohost(plat, HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_GETC, 0);
+
[PATCH 0/3] QEMU spike machine support for U-Boot
We can use same U-Boot binary compiled using qemu-riscv64_smode_defconfig on QEMU virt machine and QEMU spike machine. To achieve this, we need HTIF console support for U-Boot QEMU RISC-V board hence this series. To test this series with latest OpenSBI, we can use the following command: qemu-system-riscv64 -M spike -m 256M -display none -serial stdio \ -bios opensbi/build/platform/generic/firmware/fw_jump.bin -kernel \ ./u-boot/u-boot.bin These patch can be found in qemu_riscv_htif_v1 branch at: https://github.com/avpatel/u-boot.git Anup Patel (3): serial: Add RISC-V HTIF console driver riscv: qemu: Enable HTIF console support riscv: qemu: Implement is_flash_available() for MTD NOR board/emulation/qemu-riscv/Kconfig | 1 + board/emulation/qemu-riscv/qemu-riscv.c | 17 +++ drivers/serial/Kconfig | 8 ++ drivers/serial/Makefile | 1 + drivers/serial/serial_htif.c| 178 5 files changed, 205 insertions(+) create mode 100644 drivers/serial/serial_htif.c -- 2.25.1
Please pull u-boot-marvell/master
Hi Tom, please pull the following Marvell MVEBU related patches: - mvebu: Move PCIe code from serdes to PCIe driver (Pali) - mtd: nand: pxa3xx: use marvell, prefix for custom DT properties (Pierre) - Add PCIe support for Iomega iConnect board (Tony) - ddr: marvell: a38x: Misc improvements / fixes (Marek) - tools: kwbimage: Load address fixes (Pali) - mvebu: db-88f6720: Fix CONFIG_SPL_TEXT_BASE and remove wrong memory layout (Pali) - mvebu: Replace hardcoded values 0x0030/0x4030 by proper calculation (Pali) Here the Azure build, without any issues: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=147=results Thanks, Stefan The following changes since commit 25711b07ca1dcf73dc41b45ca040dadbcff0fa08: Merge tag 'dm-pull-13jan22' of https://source.denx.de/u-boot/custodians/u-boot-dm (2022-01-13 14:33:02 -0500) are available in the Git repository at: g...@source.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to 1dcbcc715e87da6d30b8ae22f1ef04c881cfea5b: arm: mvebu: Replace hardcoded values 0x0030/0x4030 by proper calculation (2022-01-14 11:39:16 +0100) Marek Behún (3): ddr: marvell: a38x: Fix Synchronous vs Asynchronous mode determination board: gdsys: Drop Dirk Eibach from MAINTAINERS ddr: marvell: a38x: fix SPLIT_OUT_MIX state decision Pali Rohár (31): arm: mvebu: Convert board_pex_config() to CONFIG_SPL_BOARD_INIT board: gdsys: a38x: Enable PCIe link 2 in spl_board_init() pci: pci_mvebu: Fix PCIe MEM and IO resources assignment and mbus mapping pci: pci_mvebu: Inline mvebu_pcie_port_parse_dt() function pci: pci_mvebu: Remove dependency on SOC_REGS_PHY_BASE macro pci: pci_mvebu: Split initialization of PCIe ports into 3 phases pci: pci_mvebu: Wait 100ms for Link Up in mvebu_pcie_probe() arm: mvebu: Implement simple mvebu-reset driver for enabling/disabling PCIe ports arm: mvebu: a38x: serdes: Move non-serdes PCIe code to pci_mvebu.c tools: kwbimage: Mark all local functions as static tools: kwbimage: Deduplicate v1 regtype header finishing tools: kwbimage: Fix generating image with multiple DATA_DELAY commands tools: kwbimage: Preserve order of BINARY, DATA and DATA_DELAY commands arm: mvebu: Generate kwbimage.cfg with $(call cmd, ...) tools: kwbimage: Add support for specifying CPU core tools: kwbimage: Add support for specifying LOAD_ADDRESS for BINARY command tools: kwbimage: Check the return value of image_headersz_v1() tools: kwbimage: Check for maximal kwbimage header size arm: mvebu: Set CPU for U-Boot SPL binary in kwbimage arm: mvebu: Correctly set LOAD_ADDRESS for U-Boot SPL binary in kwbimage tools: kwbimage: Enforce 128-bit boundary alignment only for Sheeva CPU arm: mvebu: Enable BootROM output on A38x tools: kwbimage: Add missing check for maximal value for DATA_DELAY tools: kwbimage: Show binary image offset in mkimage -l, in addition to size tools: kwbimage: Dump kwbimage config file on '-p -1' option tools: kwbimage: Do not cast const pointers to non-const pointers tools: kwbimage/kwboot: Check ext field for non-zero value tools: kwbimage: Extract main data image without -p arg for dumpimage tools: kwbimage: Fix mkimage/dumpimage -l argument arm: mvebu: db-88f6720: Fix CONFIG_SPL_TEXT_BASE and remove wrong memory layout arm: mvebu: Replace hardcoded values 0x0030/0x4030 by proper calculation Pierre Bourdon (1): mtd: nand: pxa3xx: use marvell, prefix for custom DT properties Tony Dinh (3): arm: kirkwood: iConnect : Add PCIe related configs arm: kirkwood: iConnect : Add PCIe late init arm: kirkwood: iConnect : Update board maintainer arch/arm/dts/armada-375.dtsi | 5 +- arch/arm/dts/armada-380.dtsi | 3 + arch/arm/dts/armada-385.dtsi | 4 + arch/arm/dts/armada-38x.dtsi | 1 + arch/arm/dts/armada-cp110.dtsi | 2 +- arch/arm/dts/armada-xp-98dx3236.dtsi | 2 + arch/arm/dts/armada-xp-mv78230.dtsi| 5 + arch/arm/dts/armada-xp-mv78260.dtsi| 9 + arch/arm/dts/armada-xp-mv78460.dtsi| 10 + arch/arm/dts/armada-xp-synology-ds414.dts | 1 + arch/arm/dts/armada-xp-theadorable.dts | 1 + arch/arm/dts/armada-xp.dtsi| 1 + arch/arm/mach-mvebu/Makefile | 26 +- arch/arm/mach-mvebu/include/mach/cpu.h | 5 +- arch/arm/mach-mvebu/kwbimage.cfg.in| 10 +- arch/arm/mach-mvebu/serdes/a38x/Makefile | 1 -
Re: [PATCH] arm: mvebu: Replace hardcoded values 0x0030/0x4030 by proper calculation
On 1/12/22 18:32, Pali Rohár wrote: These hardcoded values were calculated from CONFIG_SPL_TEXT_BASE macro. Now this macro is configurable via Kconfig, so calculate values 0x0030/0x4030 at compile time via CONFIG_SPL_TEXT_BASE option. Values 0x0030/0x4030 represents offset of CONFIG_SPL_TEXT_BASE from address 0x4000. Signed-off-by: Pali Rohár --- include/configs/clearfog.h | 2 +- include/configs/db-88f6720.h | 2 +- include/configs/db-88f6820-amc.h | 2 +- include/configs/db-88f6820-gp.h | 2 +- include/configs/db-mv784mp-gp.h | 2 +- include/configs/ds414.h | 2 +- include/configs/helios4.h| 2 +- include/configs/maxbcm.h | 2 +- include/configs/theadorable.h| 2 +- include/configs/turris_omnia.h | 2 +- include/configs/x530.h | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) Applied to u-boot-marvell/master Thanks, Stefan diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index a30bca5147a8..c9af5a40cec0 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -53,7 +53,7 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE(CONFIG_SPL_SIZE - 0x0030) +#define CONFIG_SPL_MAX_SIZE(CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x4000)) #define CONFIG_SPL_BSS_START_ADDR (0x4000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index cf9e44d17c32..16c83a88dace 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -34,7 +34,7 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE((128 << 10) - 0x0030) +#define CONFIG_SPL_MAX_SIZE((128 << 10) - (CONFIG_SPL_TEXT_BASE - 0x4000)) #define CONFIG_SPL_BSS_START_ADDR (0x4000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 1f70c609d234..6538e66052aa 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -41,7 +41,7 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE(CONFIG_SPL_SIZE - 0x0030) +#define CONFIG_SPL_MAX_SIZE(CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x4000)) #define CONFIG_SPL_BSS_START_ADDR (0x4000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 41dadfebb948..5f2611995d35 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -50,7 +50,7 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE(CONFIG_SPL_SIZE - 0x0030) +#define CONFIG_SPL_MAX_SIZE(CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x4000)) #define CONFIG_SPL_BSS_START_ADDR (0x4000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index dbbc33ebf9c3..449a56753b17 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -59,7 +59,7 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE((128 << 10) - 0x4030) +#define CONFIG_SPL_MAX_SIZE((128 << 10) - (CONFIG_SPL_TEXT_BASE - 0x4000)) #define CONFIG_SPL_BSS_START_ADDR (0x4000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 7fba2b4cc427..dbccd46bbdb1 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -45,7 +45,7 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE((128 << 10) - 0x4030) +#define CONFIG_SPL_MAX_SIZE((128 << 10) - (CONFIG_SPL_TEXT_BASE - 0x4000)) #define CONFIG_SPL_BSS_START_ADDR (0x4000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/helios4.h b/include/configs/helios4.h index 56d35d6fdbc6..de1ebbf37516 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -53,7 +53,7 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_MAX_SIZE(CONFIG_SPL_SIZE - 0x0030) +#define CONFIG_SPL_MAX_SIZE(CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x4000)) #define CONFIG_SPL_BSS_START_ADDR (0x4000 + CONFIG_SPL_SIZE) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 53ba64909e1f..073c5a57b2c9 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@
Re: [PATCH v2] introduce CONFIG_DEVICE_TREE_INCLUDES
On Fri, Jan 14, 2022 at 09:30:29AM +0100, Rasmus Villemoes wrote: > Ping > > On 21/11/2021 14.52, Rasmus Villemoes wrote: > > The build system already automatically looks for and includes an > > in-tree *-u-boot.dtsi when building the control .dtb. However, there > > are some things that are awkward to maintain in such an in-tree file, > > most notably the metadata associated to public keys used for verified > > boot. > > > > The only "official" API to get that metadata into the .dtb is via > > mkimage, as a side effect of building an actual signed image. But > > there are multiple problems with that. First of all, the final U-Boot > > (be it U-Boot proper or an SPL) image is built based on a binary > > image, the .dtb, and possibly some other binary artifacts. So > > modifying the .dtb after the build requires the meta-buildsystem > > (Yocto, buildroot, whatnot) to know about and repeat some of the steps > > that are already known to and handled by U-Boot's build system, > > resulting in needless duplication of code. It's also somewhat annoying > > and inconsistent to have a .dtb file in the build folder which is not > > generated by the command listed in the corresponding .cmd file (that > > of course applies to any generated file). > > > > So the contents of the /signature node really needs to be baked into > > the .dtb file when it is first created, which means providing the > > relevant data in the form of a .dtsi file. One could in theory put > > that data into the *-u-boot.dtsi file, but it's more convenient to be > > able to provide it externally: For example, when developing for a > > customer, it's common to use a set of dummy keys for development, > > while the consultants do not (and should not) have access to the > > actual keys used in production. For such a setup, it's easier if the > > keys used are chosen via the meta-buildsystem and the path(s) patched > > in during the configure step. And of course, nothing prevents anybody > > from having DEVICE_TREE_INCLUDES point at files maintained in git, or > > for that matter from including the public key metadata in the > > *-u-boot.dtsi directly and ignore this feature. > > > > There are other uses for this, e.g. in combination with ENV_IMPORT_FDT > > it can be used for providing the contents of the /config/environment > > node, so I don't want to tie this exclusively to use for verified > > boot. > > > > Reviewed-by: Simon Glass > > Signed-off-by: Rasmus Villemoes > > --- > > v2: rebase to current master, add paragraph to > > doc/develop/devicetree/control.rst as suggested by Simon. I've taken > > the liberty of keeping his R-b tag as this mostly just repeats what is > > in the Kconfig help text and commit message. > > > > doc/develop/devicetree/control.rst | 18 ++ > > dts/Kconfig| 9 + > > scripts/Makefile.lib | 3 +++ > > 3 files changed, 30 insertions(+) > > > > diff --git a/doc/develop/devicetree/control.rst > > b/doc/develop/devicetree/control.rst > > index 0e6f85d5af..ff008ba943 100644 > > --- a/doc/develop/devicetree/control.rst > > +++ b/doc/develop/devicetree/control.rst > > @@ -182,6 +182,24 @@ main file, in this order:: > > Only one of these is selected but of course you can #include another one > > within > > that file, to create a hierarchy of shared files. > > > > + > > +External .dtsi fragments > > + > > + > > +Apart from describing the hardware present, U-Boot also uses its > > +control dtb for various configuration purposes. For example, the > > +public key(s) used for Verified Boot are embedded in a specific format > > +in a /signature node. > > + > > +As mentioned above, the U-Boot build system automatically includes a > > +*-u-boot.dtsi file, if found, containing U-Boot specific > > +quirks. However, some data, such as the mentioned public keys, are not > > +appropriate for upstream U-Boot but are better kept and maintained > > +outside the U-Boot repository. You can use CONFIG_DEVICE_TREE_INCLUDES > > +to specify a list of .dtsi files that will also be included when > > +building .dtb files. > > + > > + > > Relocation, SPL and TPL > > --- > > > > diff --git a/dts/Kconfig b/dts/Kconfig > > index b7c4a2fec0..1f8debf1a8 100644 > > --- a/dts/Kconfig > > +++ b/dts/Kconfig > > @@ -131,6 +131,15 @@ config DEFAULT_DEVICE_TREE > > It can be overridden from the command line: > > $ make DEVICE_TREE= > > > > +config DEVICE_TREE_INCLUDES > > + string "Extra .dtsi files to include when building DT control" > > + depends on OF_CONTROL > > + help > > + U-Boot's control .dtb is usually built from an in-tree .dts > > + file, plus (if available) an in-tree U-Boot-specific .dtsi > > + file. This option specifies a space-separated list of extra > > + .dtsi files that will also be used. > > + > > config OF_LIST > > string "List of device tree files to include for DT
Re: [PATCH] arm: mvebu: db-88f6720: Fix CONFIG_SPL_TEXT_BASE and remove wrong memory layout
On 1/12/22 18:30, Pali Rohár wrote: Memory layout in the comment is from Armada XP platform which uses load address 0x40004030. DB-88f6720 is Armada 375 platform which uses same load address as Armada 38x which is 0x4030. Currently SPL support for Armada 375 is unfinished and does not work. There is missing Serdes initialization and DDR3 training code. So nobody noticed that CONFIG_SPL_* options are not correct. Fix at least CONFIG_SPL_TEXT_BASE constant and remove incorrect comments about memory layout. So it is not misleading. Signed-off-by: Pali Rohár Applied to u-boot-marvell/master Thanks, Stefan --- configs/db-88f6720_defconfig | 2 +- include/configs/db-88f6720.h | 15 +-- 2 files changed, 2 insertions(+), 15 deletions(-) diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 32a7349993ca..2e8f4c00de50 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -11,7 +11,7 @@ CONFIG_ENV_SIZE=0x1 CONFIG_ENV_OFFSET=0x10 CONFIG_ENV_SECT_SIZE=0x1 CONFIG_DEFAULT_DEVICE_TREE="armada-375-db" -CONFIG_SPL_TEXT_BASE=0x40004030 +CONFIG_SPL_TEXT_BASE=0x4030 CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index 19fc669f89d1..cf9e44d17c32 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -32,22 +32,9 @@ */ #include "mv-common.h" -/* - * Memory layout while starting into the bin_hdr via the - * BootROM: - * - * 0x4000.4000 - 0x4003.4000 headers space (192KiB) - * 0x4000.4030 bin_hdr start address - * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) - * 0x4007.fffc BootROM stack top - * - * The address space between 0x4007.fffc and 0x400f.fff is not locked in - * L2 cache thus cannot be used. - */ - /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_MAX_SIZE((128 << 10) - 0x4030) +#define CONFIG_SPL_MAX_SIZE((128 << 10) - 0x0030) #define CONFIG_SPL_BSS_START_ADDR (0x4000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH u-boot-marvell v2 00/20] tools: kwbimage: Load address fixes
On 1/12/22 18:20, Pali Rohár wrote: This patch series fixes generating images in kwbimage format, main fix is setting correct load address of U-Boot SPL. Also it adds support for generating kwbimage config file from existing kwbimage file via dumpimage tool. Changes in v2: * Fix base address for Sheeva CPUs (A370, AXP), it is 0x40004000 * Fix information about mapped area of load address (it is L2, not CESA) * Add new kwbimage config option CPU Pali Rohár (20): tools: kwbimage: Mark all local functions as static tools: kwbimage: Deduplicate v1 regtype header finishing tools: kwbimage: Fix generating image with multiple DATA_DELAY commands tools: kwbimage: Preserve order of BINARY, DATA and DATA_DELAY commands arm: mvebu: Generate kwbimage.cfg with $(call cmd, ...) tools: kwbimage: Add support for specifying CPU core tools: kwbimage: Add support for specifying LOAD_ADDRESS for BINARY command tools: kwbimage: Check the return value of image_headersz_v1() tools: kwbimage: Check for maximal kwbimage header size arm: mvebu: Set CPU for U-Boot SPL binary in kwbimage arm: mvebu: Correctly set LOAD_ADDRESS for U-Boot SPL binary in kwbimage tools: kwbimage: Enforce 128-bit boundary alignment only for Sheeva CPU arm: mvebu: Enable BootROM output on A38x tools: kwbimage: Add missing check for maximal value for DATA_DELAY tools: kwbimage: Show binary image offset in mkimage -l, in addition to size tools: kwbimage: Dump kwbimage config file on '-p -1' option tools: kwbimage: Do not cast const pointers to non-const pointers tools: kwbimage/kwboot: Check ext field for non-zero value tools: kwbimage: Extract main data image without -p arg for dumpimage tools: kwbimage: Fix mkimage/dumpimage -l argument arch/arm/mach-mvebu/Makefile| 25 +- arch/arm/mach-mvebu/kwbimage.cfg.in | 10 +- tools/kwbimage.c| 549 +++- tools/kwbimage.h| 10 +- tools/kwboot.c | 4 +- 5 files changed, 486 insertions(+), 112 deletions(-) Applied to u-boot-marvell/master Thanks, Stefan
Re: [PATCH u-boot-marvell] ddr: marvell: a38x: fix SPLIT_OUT_MIX state decision
On 1/12/22 17:06, Marek Behún wrote:
From: Marek Behún
This is a cleaned up and fixed version of a patch
mv_ddr: a380: fix SPLIT_OUT_MIX state decision
in each pattern cycle the bus state can be changed
in order to avoide it, need to back to the same bus state on each
pattern cycle
by
Moti Boskula
The original patch is not in Marvell's mv-ddr-marvell repository. It was
gives to us by Marvell to fix an issues with DDR training on some
boards, but it cannot be applied as is to mv-ddr-marvell, because it is
a very dirty draft patch that would certainly break other things, mainly
DDR4 training code in mv-ddr-marvell, since it changes common functions.
I have cleaned up the patch and removed stuff that seemed unnecessary
(when removed, it still fixed things). Note that I don't understand
completely what the code does exactly, since I haven't studied the DDR
training code extensively (and I suspect that no one besides some few
people in Marvell understand the code completely).
Anyway after the cleanup the patch still fixes isssues with DDR training
on the failing boards.
There was also a problem with the original patch on some of the Allied
Telesis' x530 boards, reported by Chris Packham. I have asked Chris to
send me some logs, and managed to fix it:
- if you look at the change, you'll notice that it introduces
subtraction of cur_start_win[] and cur_end_win[] members, depending on
a bit set in the current_byte_status variable
- the original patch subtracted cur_start_win[] if either
BYTE_SPLIT_OUT_MIX or BYTE_HOMOGENEOUS_SPLIT_OUT bits were set, but
subtracted cur_end_win[] only if the first one (BYTE_SPLIT_OUT_MIX)
was set
- from Chris Packham logs I discovered that the x530 board where the
original patch introduced DDR training failure, only the
BYTE_HOMOGENEOUS_SPLIT_OUT bit was set, and on our boards where the
patch is needed only the BYTE_SPLIT_OUT_MIX is set in the
current_byte_status variable
- this led me to the hypothesis that both cur_start_win[] and
cur_end_win[] should be subtracted only if BYTE_SPLIT_OUT_MIX bit is
set, the BYTE_HOMOGENEOUS_SPLIT_OUT bit shouldn't be considered at all
- this hypothesis also gains credibility when considering the commit
title ("fix SPLIT_OUT_MIX state decision")
Hopefully this will fix things without breaking anything else.
Signed-off-by: Marek Behún
Applied to u-boot-marvell/master
Thanks,
Stefan
---
.../a38x/ddr3_training_centralization.c | 26 +++
1 file changed, 26 insertions(+)
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
index 648b37ef6f..42308b6965 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
@@ -55,6 +55,7 @@ static int ddr3_tip_centralization(u32 dev_num, u32 mode)
enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM];
u32 if_id, pattern_id, bit_id;
u8 bus_id;
+ u8 current_byte_status;
u8 cur_start_win[BUS_WIDTH_IN_BITS];
u8 centralization_result[MAX_INTERFACE_NUM][BUS_WIDTH_IN_BITS];
u8 cur_end_win[BUS_WIDTH_IN_BITS];
@@ -166,6 +167,10 @@ static int ddr3_tip_centralization(u32 dev_num, u32 mode)
result[search_dir_id][7]));
}
+current_byte_status =
+
mv_ddr_tip_sub_phy_byte_status_get(if_id,
+
bus_id);
+
for (bit_id = 0; bit_id < BUS_WIDTH_IN_BITS;
bit_id++) {
/* check if this code is valid for 2
edge, probably not :( */
@@ -174,11 +179,32 @@ static int ddr3_tip_centralization(u32 dev_num, u32 mode)
[HWS_LOW2HIGH]
[bit_id],
EDGE_1);
+ if (current_byte_status &
+ BYTE_SPLIT_OUT_MIX) {
+ if (cur_start_win[bit_id] >= 64)
+ cur_start_win[bit_id]
-= 64;
+ else
+ cur_start_win[bit_id] =
0;
+ DEBUG_CENTRALIZATION_ENGINE
+ (DEBUG_LEVEL_INFO,
+("pattern %d IF %d pup %d
bit %d subtract 64 adll from start\n",
+ pattern_id, if_id,
bus_id, bit_id));
+
Re: [PATCH u-boot-marvell] board: gdsys: Drop Dirk Eibach from MAINTAINERS
On 1/4/22 16:14, Marek Behún wrote: From: Marek Behún I got an : host mxlb.ispgateway.de[80.67.18.126] said: 554 Sorry, no mailbox here by that name. (in reply to RCPT TO command) when sending e-mail to dirk.eib...@gdsys.cc. Drop Dirk Eibach from MAINTAINERS of board/gdsys/a38x and board/gdsys/mpc8308. The latter would be left maintainerless, add Mario Six (he is also maintainer of the former board). Signed-off-by: Marek Behún Applied to u-boot-marvell/master Thanks, Stefan --- board/gdsys/a38x/MAINTAINERS| 1 - board/gdsys/mpc8308/MAINTAINERS | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/board/gdsys/a38x/MAINTAINERS b/board/gdsys/a38x/MAINTAINERS index d31e675ddc..6492e79541 100644 --- a/board/gdsys/a38x/MAINTAINERS +++ b/board/gdsys/a38x/MAINTAINERS @@ -1,5 +1,4 @@ A38X BOARD -M: Dirk Eibach M:Mario Six S:Maintained F:board/gdsys/a38x/ diff --git a/board/gdsys/mpc8308/MAINTAINERS b/board/gdsys/mpc8308/MAINTAINERS index dc0b389f73..57faba4695 100644 --- a/board/gdsys/mpc8308/MAINTAINERS +++ b/board/gdsys/mpc8308/MAINTAINERS @@ -1,5 +1,5 @@ MPC8308 BOARD -M: Dirk Eibach +M: Mario Six S:Maintained F:board/gdsys/mpc8308/ F:include/configs/gazerbeam.h Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH u-boot-marvell] ddr: marvell: a38x: Fix Synchronous vs Asynchronous mode determination
On 1/4/22 15:57, Marek Behún wrote:
From: Marek Behún
Before commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
mode"), Asynchornous Mode was only used when the CPU Subsystem Clock
Options[4:0] field in the SAR1 register was set to value 0x13: CPU at
2 GHz and DDR at 933 MHz.
Then commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
mode") added support for Asynchornous Modes with frequencies other than
933 MHz (but at least 467 MHz), but the code it added to check for
whether Asynchornous Mode should be used is wrong: it checks whether the
frequency setting in board DDR topology map is set to value other than
MV_DDR_FREQ_SAR.
Thus boards which define a specific value, greater than 400 MHz, for DDR
frequency in their board topology (e.g. Turris Omnia defines
MV_DDR_FREQ_800), are incorrectly put into Asynchornous Mode after that
commit.
The A38x Functional Specification, section 10.12 DRAM Clocking, says:
In Synchornous mode, the DRAM and CPU clocks are edge aligned and run
in 1:2 or 1:3 CPU to DRAM frequency ratios.
Change the check for whether Asynchornous Mode should be used according
to this explanation in Functional Specification.
Signed-off-by: Marek Behún
Applied to u-boot-marvell/master
Thanks,
Stefan
---
A PR was also created for mv-ddr-marvell:
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/35
Please test this. It is possible this commit will fix DDR training
issues, since commit 4c289425752f in mv-ddr-marvell started using
Asynchronous Mode where Synchronous Mode was used previously.
---
drivers/ddr/marvell/a38x/mv_ddr_plat.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.c
b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
index faafc86ea2..7c7bce73a3 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_plat.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
@@ -167,8 +167,6 @@ static u16 a38x_vco_freq_per_sar_ref_clk_40_mhz[] = {
};
-static u32 async_mode_at_tf;
-
static u32 dq_bit_map_2_phy_pin[] = {
1, 0, 2, 6, 9, 8, 3, 7, /* 0 */
8, 9, 1, 7, 2, 6, 3, 0, /* 1 */
@@ -734,7 +732,8 @@ static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 if_id,
u32 divider = 0;
u32 sar_val, ref_clk_satr;
u32 async_val;
- u32 freq = mv_ddr_freq_get(frequency);
+ u32 cpu_freq;
+ u32 ddr_freq = mv_ddr_freq_get(frequency);
if (if_id != 0) {
DEBUG_TRAINING_ACCESS(DEBUG_LEVEL_ERROR,
@@ -751,11 +750,14 @@ static int ddr3_tip_a38x_set_divider(u8 dev_num, u32
if_id,
ref_clk_satr = reg_read(DEVICE_SAMPLE_AT_RESET2_REG);
if (((ref_clk_satr >> DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_OFFSET) & 0x1)
==
DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_25MHZ)
- divider = a38x_vco_freq_per_sar_ref_clk_25_mhz[sar_val] / freq;
+ cpu_freq = a38x_vco_freq_per_sar_ref_clk_25_mhz[sar_val];
else
- divider = a38x_vco_freq_per_sar_ref_clk_40_mhz[sar_val] / freq;
+ cpu_freq = a38x_vco_freq_per_sar_ref_clk_40_mhz[sar_val];
+
+ divider = cpu_freq / ddr_freq;
- if ((async_mode_at_tf == 1) && (freq > 400)) {
+ if (((cpu_freq % ddr_freq != 0) || (divider != 2 && divider != 3)) &&
+ (ddr_freq > 400)) {
/* Set async mode */
dunit_write(0x20220, 0x1000, 0x1000);
dunit_write(0xe42f4, 0x200, 0x200);
@@ -869,8 +871,6 @@ int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 reg_addr,
int mv_ddr_early_init(void)
{
- struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get();
-
/* FIXME: change this configuration per ddr type
* configure a380 and a390 to work with receiver odt timing
* the odt_config is defined:
@@ -882,9 +882,6 @@ int mv_ddr_early_init(void)
mv_ddr_sw_db_init(0, 0);
- if (tm->interface_params[0].memory_freq != MV_DDR_FREQ_SAR)
- async_mode_at_tf = 1;
-
return MV_OK;
}
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 0/3] Add PCIe support for Iomega iConnect board
On 1/2/22 05:57, Tony Dinh wrote: The Iomega iConnect board has an internal mPCIe slot. - Add PCIe support to enable the mPCIe slot to accept devices such as Wifi card or mSATA. - Add SYS_THUMB_BUILD to keep u-boot image size within 512K - Add myself as maintainer. Luka no longer has this board and wishes to see someone maintaining it actively Tony Dinh (3): arm: kirkwood: iConnect : Add PCIe related configs arm: kirkwood: iConnect : Add PCIe late init arm: kirkwood: iConnect : Update board maintainer board/iomega/iconnect/MAINTAINERS | 1 + board/iomega/iconnect/iconnect.c | 7 +++ configs/iconnect_defconfig| 5 + 3 files changed, 13 insertions(+) Applied to u-boot-marvell/master Thanks, Stefan
Re: [PATCH] mtd: nand: pxa3xx: use marvell, prefix for custom DT properties
On 12/25/21 05:46, Pierre Bourdon wrote:
The DT properties for the "enable-arbiter" and "keep-config" config
knobs were previously named inconsistently:
- The u-boot driver used "nand-enable-arbiter" and "nand-keep-config"
names, without Marvell prefixes.
- The Linux driver uses "marvell,nand-keep-config" ("enable-arbiter"
does not exist anymore in recent kernels, but it also used to be
"marvell,nand-enable-arbiter").
- The device trees almost all use "marvell," prefixed names, except for
one single instance of "nand-enable-arbiter" without vendor prefix.
This commit standardizes on the vendor prefixed version, making the
u-boot driver read from DT props "marvell,nand-enable-arbiter" and
"marvell,nand-keep-config". The one device tree using the unprefixed
version is also changed to use the new naming.
This has the side effect of making the previously no-op "marvell,"
config knobs already present in some DTs actually do something. This was
likely the original intention of the DT authors, but note that this
commit was not tested on every single impacted board.
Signed-off-by: Pierre Bourdon
Applied to u-boot-marvell/master
Thanks,
Stefan
---
arch/arm/dts/armada-cp110.dtsi | 2 +-
drivers/mtd/nand/raw/pxa3xx_nand.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/armada-cp110.dtsi b/arch/arm/dts/armada-cp110.dtsi
index abf1e4ea08..ddc10d2374 100644
--- a/arch/arm/dts/armada-cp110.dtsi
+++ b/arch/arm/dts/armada-cp110.dtsi
@@ -231,7 +231,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <_LABEL(syscon0) 1 2>;
- nand-enable-arbiter;
+ marvell,nand-enable-arbiter;
num-cs = <1>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c
b/drivers/mtd/nand/raw/pxa3xx_nand.c
index 8ff58a7038..3a9c9ca508 100644
--- a/drivers/mtd/nand/raw/pxa3xx_nand.c
+++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
@@ -1862,10 +1862,10 @@ static int pxa3xx_nand_probe_dt(struct udevice *dev,
struct pxa3xx_nand_info *in
return -EINVAL;
}
- if (dev_read_bool(dev, "nand-enable-arbiter"))
+ if (dev_read_bool(dev, "marvell,nand-enable-arbiter"))
pdata->enable_arbiter = 1;
- if (dev_read_bool(dev, "nand-keep-config"))
+ if (dev_read_bool(dev, "marvell,nand-keep-config"))
pdata->keep_config = 1;
/*
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH u-boot-marvell 0/9] mvebu: Move PCIe code from serdes to PCIe driver
On 12/21/21 12:20, Pali Rohár wrote: This patch series removes gdsys's board_pex_config() function by converting it to spl_board_init(), adds a new mvebu-reset driver for enabling / disabling PCIe ports and finally moves PCIe code from serdes driver to pci_mvebu.c driver. After all these changes, PCIe link is not initialized in serdes code anymore, but in pci_mvebu.c driver with help of mvebu-reset driver. I'm not sure if change for gdsys board is correct, so if somebody has this board, please test it. I tested this change on A385 board Turris Omnia and I verified that PCIe links are really enabled by pci_mvebu.c driver and not before. This patch series is based on u-boot-marvell/next branch. Pali Rohár (9): arm: mvebu: Convert board_pex_config() to CONFIG_SPL_BOARD_INIT board: gdsys: a38x: Enable PCIe link 2 in spl_board_init() pci: pci_mvebu: Fix PCIe MEM and IO resources assignment and mbus mapping pci: pci_mvebu: Inline mvebu_pcie_port_parse_dt() function pci: pci_mvebu: Remove dependency on SOC_REGS_PHY_BASE macro pci: pci_mvebu: Split initialization of PCIe ports into 3 phases pci: pci_mvebu: Wait 100ms for Link Up in mvebu_pcie_probe() arm: mvebu: Implement simple mvebu-reset driver for enabling/disabling PCIe ports arm: mvebu: a38x: serdes: Move non-serdes PCIe code to pci_mvebu.c arch/arm/dts/armada-375.dtsi | 5 +- arch/arm/dts/armada-380.dtsi | 3 + arch/arm/dts/armada-385.dtsi | 4 + arch/arm/dts/armada-38x.dtsi | 1 + arch/arm/dts/armada-xp-98dx3236.dtsi | 2 + arch/arm/dts/armada-xp-mv78230.dtsi | 5 + arch/arm/dts/armada-xp-mv78260.dtsi | 9 + arch/arm/dts/armada-xp-mv78460.dtsi | 10 + arch/arm/dts/armada-xp-synology-ds414.dts | 1 + arch/arm/dts/armada-xp-theadorable.dts| 1 + arch/arm/dts/armada-xp.dtsi | 1 + arch/arm/mach-mvebu/Makefile | 1 + arch/arm/mach-mvebu/include/mach/cpu.h| 5 +- arch/arm/mach-mvebu/serdes/a38x/Makefile | 1 - arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c| 64 arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h| 28 -- .../serdes/a38x/high_speed_env_spec.c | 19 -- arch/arm/mach-mvebu/system-controller.c | 105 +++ board/gdsys/a38x/controlcenterdc.c| 6 +- configs/controlcenterdc_defconfig | 1 + drivers/pci/Kconfig | 1 + drivers/pci/pci_mvebu.c | 275 ++ 22 files changed, 371 insertions(+), 177 deletions(-) delete mode 100644 arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c delete mode 100644 arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h create mode 100644 arch/arm/mach-mvebu/system-controller.c Applied to u-boot-marvell/master Thanks, Stefan
Re: [PATCH 2/2] cmd: fuse: Add a command to read fuses to memory
Are there any problems with this patch ?
Thanks
Angus
On 2021-11-28 08:02, Angus Ainslie wrote:
With the fuse values in memory we can use some of the other u-boot
shell
conditonal operators to do tests.
Signed-off-by: Angus Ainslie
---
cmd/fuse.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/cmd/fuse.c b/cmd/fuse.c
index 78b1065d99e..0676bb7a812 100644
--- a/cmd/fuse.c
+++ b/cmd/fuse.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
static int strtou32(const char *str, unsigned int base, u32 *result)
@@ -46,6 +47,8 @@ static int do_fuse(struct cmd_tbl *cmdtp, int flag,
int argc,
const char *op = argc >= 2 ? argv[1] : NULL;
int confirmed = argc >= 3 && !strcmp(argv[2], "-y");
u32 bank, word, cnt, val, cmp;
+ ulong addr;
+ void *buf, *start;
int ret, i;
argc -= 2 + confirmed;
@@ -73,6 +76,28 @@ static int do_fuse(struct cmd_tbl *cmdtp, int flag,
int argc,
printf(" %.8x", val);
}
putc('\n');
+ } else if (!strcmp(op, "readm")) {
+ if (argc == 3)
+ cnt = 1;
+ else if (argc != 4 || strtou32(argv[3], 0, ))
+ return CMD_RET_USAGE;
+
+ addr = simple_strtoul(argv[2], NULL, 16);
+
+ start = map_sysmem(addr, 4);
+ buf = start;
+
+ printf("Reading bank %u len %u to 0x%lx\n", bank, cnt, addr);
+ for (i = 0; i < cnt; i++, word++) {
+ ret = fuse_read(bank, word, );
+ if (ret)
+ goto err;
+
+ *((u32 *)buf) = val;
+ buf += 4;
+ }
+
+ unmap_sysmem(start);
} else if (!strcmp(op, "cmp")) {
if (argc != 3 || strtou32(argv[2], 0, ))
return CMD_RET_USAGE;
@@ -157,6 +182,8 @@ U_BOOT_CMD(
"starting at 'word'\n"
"fuse cmp- compare 'hexval' to fuse\n"
"at 'word'\n"
+ "fuse readm[] - read 1 or 'cnt' fuse
words,\n"
+ "starting at 'word' into memory at 'addr'\n"
"fuse sense [] - sense 1 or 'cnt' fuse words,\n"
"starting at 'word'\n"
"fuse prog [-y][...] - program 1
or\n"
Re: [PATCH 1/2] cmd: fuse: add a fuse comparison function
Are there any problems with this patch ?
Thanks
Angus
On 2021-11-28 08:02, Angus Ainslie wrote:
Compare a hexval to the fuse value and return pass or fail.
Signed-off-by: Angus Ainslie
---
cmd/fuse.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/cmd/fuse.c b/cmd/fuse.c
index e001619d172..78b1065d99e 100644
--- a/cmd/fuse.c
+++ b/cmd/fuse.c
@@ -45,7 +45,7 @@ static int do_fuse(struct cmd_tbl *cmdtp, int flag,
int argc,
{
const char *op = argc >= 2 ? argv[1] : NULL;
int confirmed = argc >= 3 && !strcmp(argv[2], "-y");
- u32 bank, word, cnt, val;
+ u32 bank, word, cnt, val, cmp;
int ret, i;
argc -= 2 + confirmed;
@@ -73,6 +73,24 @@ static int do_fuse(struct cmd_tbl *cmdtp, int flag,
int argc,
printf(" %.8x", val);
}
putc('\n');
+ } else if (!strcmp(op, "cmp")) {
+ if (argc != 3 || strtou32(argv[2], 0, ))
+ return CMD_RET_USAGE;
+
+ printf("Comparing bank %u:\n", bank);
+ printf("\nWord 0x%.8x:", word);
+ printf("\nValue 0x%.8x:", cmp);
+
+ ret = fuse_read(bank, word, );
+ if (ret)
+ goto err;
+
+ printf("0x%.8x\n", val);
+ if (val != cmp) {
+ printf("failed\n");
+ return CMD_RET_FAILURE;
+ }
+ printf("passed\n");
} else if (!strcmp(op, "sense")) {
if (argc == 2)
cnt = 1;
@@ -137,6 +155,8 @@ U_BOOT_CMD(
"Fuse sub-system",
"read [] - read 1 or 'cnt' fuse words,\n"
"starting at 'word'\n"
+ "fuse cmp- compare 'hexval' to fuse\n"
+ "at 'word'\n"
"fuse sense [] - sense 1 or 'cnt' fuse words,\n"
"starting at 'word'\n"
"fuse prog [-y][...] - program 1
or\n"
Re: converting IMX6 board to DM_ETH and DM_USB - usb_ether gadget support
Hello Tim, On 25.02.21 02:21, Tim Harvey wrote: > Greetings, > > I'm trying to convert the gwventana board support to DM_ETH and DM_USB > and one item I have not resolved yet is USB Ethernet gadget support. > > For non-dm a call to 'usb_eth_initialize' creates a usb_ether gadget > that can be used for ethernet communication between the IMX6 OTG > controller in device mode to a USB host. How is that accomplished via > dm? > > I find that drivers/usb/gadget/ether.c has dm support but it would > appear that a controller of UCLASS_USB_GADGET_GENERIC must bind for it > to work yet I don't see how this works with CI_UDC. > > Other IMX6 boards that have gone through dm conversion have simply > dropped the call to usb_eth_initialize and I don't see what else they > enable that provides this functionality. > > Any ideas? Late ... but I stumbled just over the same problem... do you have solved it? I just tried this on an imx6ull based board and get it not fully working, but usb ethernet with DM_ETH enabled at least starts for me... => setenv ethact usb_ether => setenv ipaddr 192.168.7.2 The magic call for me is: => bind usb 0 usb_ether After this I see in "dm tree" output: simple_bus5 [ + ] simple_bus| |-- aips-bus@210 usb 0 [ ] ehci_mx6 | | |-- usb@2184000 eth 1 [ ] usb_ether | | | `-- usb_ether And issuing a ping starts usb_ether with (some DBG are enabled) => ping 192.168.71. using ci_udc, OUT ep2out-bulk IN ep1in-bulk STATUS ep3in-int MAC 8e:79:6a:94:5f:09 HOST MAC 5a:d1:77:da:0e:7a RNDIS ready -- suspend -- -- reset -- -- portchange 2 High handle setup GET_DESCRIPTOR, 80, 6 index 0 value 100 length 40 handle_setup: Set ep0 to IN for Data Stage [...] -- reset -- -- portchange 2 High [...] ci_ep_enable: from 512 to 16 ci_ep_enable: num=3 maxpacket=16 ci_ep_enable: num=1 maxpacket=512 ci_ep_enable: num=2 maxpacket=512 high speed config #2: 2 mA, Ethernet Gadget, using RNDIS [...] [remark] until here same log as for the case with DM_ETH not enabled [...] ept0 out req 9bf78be0, complete 0 handle setup GET_STATUS, 21, 0 index 0 value 0 length 18 handle_setup: Set ep0 to OUT for Data Stage ept0 out pre-queue req 9bf78be0, buffer 9bf91e80 ept0 out queue len 18, req 9bf78be0, buffer 9bf91e80 handle_setup: end status: 0 ept0 out req 9bf78be0, complete 0 And than the board makes a reset (no crash dump) on the other side I see: [2114399.914244] usb 1-1.3.1.2: new high-speed USB device number 46 using dwc_otg [2114400.311239] usb 1-1.3.1.2: config 1 has 0 interfaces, different from the descriptor's value: 1 [2114400.436155] usb 1-1.3.1.2: New USB device found, idVendor=0525, idProduct=a4a5, bcdDevice= 3.21 [2114400.436175] usb 1-1.3.1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0 [2114400.436190] usb 1-1.3.1.2: Product: RNDIS/Ethernet Gadget [2114400.436204] usb 1-1.3.1.2: Manufacturer: U-Boot [2114400.569248] usb-storage 1-1.3.1.2:2.0: USB Mass Storage device detected [2114400.569721] usb-storage 1-1.3.1.2:2.0: Quirks match for vid 0525 pid a4a5: 1 [2114400.597702] rndis_host 1-1.3.1.2:2.0: RNDIS init failed, -71 [2114400.597799] rndis_host: probe of 1-1.3.1.2:2.0 failed with error -71 [2114400.598336] rndis_wlan 1-1.3.1.2:2.0: RNDIS init failed, -71 [2114400.598591] rndis_wlan: probe of 1-1.3.1.2:2.0 failed with error -71 [2114400.599839] usb-storage 1-1.3.1.2:2.1: USB Mass Storage device detected [2114400.600254] usb-storage 1-1.3.1.2:2.1: Quirks match for vid 0525 pid a4a5: 1 [2114400.656387] usb 1-1.3.1.2: USB disconnect, device number 46 If I disable DM_ETH... usb_ether works fine on the board ... Any ideas? bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH] board: stm32mp1: solve compilation issue when ENV_IS_IN_MMC is deactivated
Hi Patrick
On 1/11/22 4:37 PM, Patrick Delaunay wrote:
> Solve compilation issue on undefined CONFIG_SYS_MMC_ENV_DEV when
> CONFIG_ENV_IS_IN_MMC is deactivated on STMicroelectronics boards
> defconfig
>
> Fixes: 9f97193616f1 ("board: stm32mp1: use CONFIG_SYS_MMC_ENV_DEV when
> available")
> Signed-off-by: Patrick Delaunay
> ---
>
> board/st/stm32mp1/stm32mp1.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> index 45f2ca81a6..fff1880e5b 100644
> --- a/board/st/stm32mp1/stm32mp1.c
> +++ b/board/st/stm32mp1/stm32mp1.c
> @@ -890,8 +890,10 @@ const char *env_ext4_get_dev_part(void)
>
> int mmc_get_env_dev(void)
> {
> - if (CONFIG_SYS_MMC_ENV_DEV >= 0)
> - return CONFIG_SYS_MMC_ENV_DEV;
> + const int mmc_env_dev = CONFIG_IS_ENABLED(ENV_IS_IN_MMC,
> (CONFIG_SYS_MMC_ENV_DEV), (-1));
> +
> + if (mmc_env_dev >= 0)
> + return mmc_env_dev;
>
> /* use boot instance to select the correct mmc device identifier */
> return mmc_get_boot();
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 1/1] stm32mp: fix board_get_alt_info_mmc()
Hi Heinrich
On 1/11/22 3:58 PM, Heinrich Schuchardt wrote:
> MAX_SEARCH_PARTITIONS is the highest possible partition number.
> Do not skip the last partition in board_get_alt_info_mmc().
>
> Signed-off-by: Heinrich Schuchardt
> ---
> board/st/common/stm32mp_dfu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
> index a3f0da5b5b..fa48b2a35e 100644
> --- a/board/st/common/stm32mp_dfu.c
> +++ b/board/st/common/stm32mp_dfu.c
> @@ -57,7 +57,7 @@ static void board_get_alt_info_mmc(struct udevice *dev,
> char *buf)
> first = false;
> }
>
> - for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) {
> + for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
> if (part_get_info(desc, p, ))
> continue;
> if (!first)
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 2/2] stm32mp: correct the dependency for bootcount configs
Hi Patrick On 12/7/21 10:05 AM, Patrick Delaunay wrote: > Default value for CONFIG_SYS_BOOTCOUNT_SINGLEWORD and > CONFIG_SYS_BOOTCOUNT_ADDR are only needed when > CONFIG_BOOTCOUNT_GENERIC is used. > > This patch avoids to define these configs when an other bootcount backend > is activated, for example for CONFIG_BOOTCOUNT_ENV. > > Signed-off-by: Patrick Delaunay > --- > > arch/arm/mach-stm32mp/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig > index 2fa4ea4d5c..2819944df3 100644 > --- a/arch/arm/mach-stm32mp/Kconfig > +++ b/arch/arm/mach-stm32mp/Kconfig > @@ -194,7 +194,7 @@ config PRE_CON_BUF_SZ > config BOOTSTAGE_STASH_ADDR > default 0xC300 > > -if BOOTCOUNT_LIMIT > +if BOOTCOUNT_GENERIC > config SYS_BOOTCOUNT_SINGLEWORD > default y > > Reviewed-by: Patrice Chotard Thanks Patrice
Re: [PATCH 1/2] stm32mp: remove the bootcount activation
Hi Patrick On 12/7/21 10:05 AM, Patrick Delaunay wrote: > Today the bootcount is not managed by the Linux kernel for STM32MP15 as > we don't have driver to update the used backup register in TAMP and the > recovery command still executes the normal bootcmd with > 'altbootcmd=run bootcmd'. > > So the bootcount feature is never used, the config CONFIG_BOOTCOUNT_LIMIT > and the associated environment variable 'altbootcmd' can be removed to > reduce the U-Boot size. > > Each boards can re-enable this feature later in their defconfig, if it is > needed, with the expected backend, for example CONFIG_BOOTCOUNT_GENERIC > or CONFIG_BOOTCOUNT_ENV. > > CC: Marek Vasut > Signed-off-by: Patrick Delaunay > --- > > arch/arm/mach-stm32mp/Kconfig | 8 > include/configs/stm32mp15_common.h | 1 - > 2 files changed, 9 deletions(-) > > diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig > index a6c7fc5bfd..2fa4ea4d5c 100644 > --- a/arch/arm/mach-stm32mp/Kconfig > +++ b/arch/arm/mach-stm32mp/Kconfig > @@ -68,9 +68,7 @@ choice > config TARGET_ST_STM32MP15x > bool "STMicroelectronics STM32MP15x boards" > select STM32MP15x > - imply BOOTCOUNT_LIMIT > imply BOOTSTAGE > - imply CMD_BOOTCOUNT > imply CMD_BOOTSTAGE > imply CMD_CLS if CMD_BMP > imply DISABLE_CONSOLE > @@ -85,9 +83,7 @@ config TARGET_ST_STM32MP15x > config TARGET_MICROGEA_STM32MP1 > bool "Engicam MicroGEA STM32MP1 SOM" > select STM32MP15x > - imply BOOTCOUNT_LIMIT > imply BOOTSTAGE > - imply CMD_BOOTCOUNT > imply CMD_BOOTSTAGE > imply CMD_CLS if CMD_BMP > imply DISABLE_CONSOLE > @@ -112,9 +108,7 @@ config TARGET_MICROGEA_STM32MP1 > config TARGET_ICORE_STM32MP1 > bool "Engicam i.Core STM32MP1 SOM" > select STM32MP15x > - imply BOOTCOUNT_LIMIT > imply BOOTSTAGE > - imply CMD_BOOTCOUNT > imply CMD_BOOTSTAGE > imply CMD_CLS if CMD_BMP > imply DISABLE_CONSOLE > @@ -136,8 +130,6 @@ config TARGET_ICORE_STM32MP1 > config TARGET_DH_STM32MP1_PDK2 > bool "DH STM32MP1 PDK2" > select STM32MP15x > - imply BOOTCOUNT_LIMIT > - imply CMD_BOOTCOUNT > help > Target the DH PDK2 development kit with STM32MP15x SoM. > > diff --git a/include/configs/stm32mp15_common.h > b/include/configs/stm32mp15_common.h > index dab679f71e..8cf97d73ad 100644 > --- a/include/configs/stm32mp15_common.h > +++ b/include/configs/stm32mp15_common.h > @@ -138,7 +138,6 @@ > #endif > > #define STM32MP_EXTRA \ > - "altbootcmd=run bootcmd\0" \ > "env_check=if env info -p -d -q; then env save; fi\0" \ > "boot_net_usb_start=true\0" > > Reviewed-by: Patrice Chotard Thanks Patrice
Re: [PATCH v2 0/3] fs/erofs: new filesystem
在 2022/1/5 19:57, Gao Xiang 写道: Hi Jianan, On Wed, Aug 25, 2021 at 06:40:42PM -0400, Tom Rini wrote: On Mon, Aug 23, 2021 at 08:36:43PM +0800, Huang Jianan wrote: From: Huang Jianan Add erofs filesystem support. The code is adapted from erofs-utils in order to reduce maintenance burden and keep with the latest feature. Changes since v1: - fix the inconsistency between From and SoB (Bin Meng); - add missing license header; Huang Jianan (3): fs/erofs: add erofs filesystem support fs/erofs: add lz4 1.8.3 decompressor fs/erofs: add lz4 decompression support Aside from what I've just now sent, can you please extend the existing py/tests/ to cover basic functionality here, ensure they run on sandbox and in CI? Thanks. Any further progress on this work? At least sync it up with erofs-utils 1.4? I'm still working on this, the new version will be sent soon. Thanks, Jianan Thanks, Gao Xiang -- Tom
Re: [PATCH v2] drivers: spi-nor: Add JEDEC id for W25Q16JV
Hi Dhananjay , Jagan,
On 2022-01-13 10:30, Dhananjay Phadke wrote:
On 1/13/2022 9:17 AM, Angus Ainslie wrote:
Add a JEDEC id for the Winbond W25Q16JV 16M-BIT serial flash memory
with
DUAL/QUAD SPI
Changes since v1:
Updated the name for more suffixes
Signed-off-by: Angus Ainslie
---
drivers/mtd/spi/spi-nor-ids.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c
b/drivers/mtd/spi/spi-nor-ids.c
index b551ebd75e..3bd0ded443 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -314,6 +314,11 @@ const struct flash_info spi_nor_ids[] = {
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
+ {
+ INFO("w25q16jv-im/jm", 0xef7015, 0, 64 * 1024, 32,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ },
Shouldn't this be w25q16jvm, which seems to be unofficial convention
for
*-DTR parts? I was looking for naming convention for another Winbond
part -
https://lore.kernel.org/u-boot/0c3e4727-0997-a4c5-dab1-b09ea8781...@linux.microsoft.com/
Would you like a v3 using this naming convention ?
Thanks
Angus
{
INFO("w25q32jv", 0xef7016, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
Re: binman generator nodes break over read-back
Hi Jan, On Fri, 14 Jan 2022 at 02:40, Jan Kiszka wrote: > > Hi Simon, > > something is fishy with generator nodes: We are playing with replacing > fdts and configs in [1] with generator nodes, and that works so far - > until we want to read-back the image: > > $ binman ls -i flash.bin > binman: Node '/fit@0x28': Generator node requires 'of-list' entry > argument > > Same for "binman extract". I suspect that the embedded fdtmap still > contains the generator node, rather than the unrolled entries. Am I > right? How to check and fix that? You can check that by looking at the fdtmap in the resulting image. I suspect the problem is that in fit.py ReadEntries() tries to expand the entries when this has already been done. I think we need a separate case here, when reading the fdtmap, to say that the generation is already done and should not be attempted. We have properties like orig-offset which get added to provide information about the original state of the image description. Perhaps we could add a property like 'generated' in the base Entry class that we can check in entry types which do this sort of thing. When generating, we add the property. When reading in an existing image, the property would be present, so generation is skipped and the FIT is used as is. As always the way to start is by adding a test which fails the new situation. , perhaps based on testListCmd...() ? Regards, Simon > > Jan > > [1] > https://github.com/u-boot/u-boot/blob/master/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi > > -- > Siemens AG, Technology > Competence Center Embedded Linux
[PATCH u-boot-marvell v4 7/9] arm: mvebu: spl: Use preferred types u8/u16/u32 instead of uintN_t
From: Marek Behún
Checkpatch warns about using uint32/16/8_t instead of u32/16/8.
Use the preferred types.
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
---
arch/arm/mach-mvebu/spl.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index eacac776530c..103049b49b89 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -73,23 +73,23 @@
/* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
struct kwbimage_main_hdr_v1 {
- uint8_t blockid; /* 0x0 */
- uint8_t flags; /* 0x1 */
- uint16_t nandpagesize; /* 0x2-0x3 */
- uint32_t blocksize; /* 0x4-0x7 */
- uint8_t version; /* 0x8 */
- uint8_t headersz_msb; /* 0x9 */
- uint16_t headersz_lsb; /* 0xA-0xB */
- uint32_t srcaddr; /* 0xC-0xF */
- uint32_t destaddr; /* 0x10-0x13 */
- uint32_t execaddr; /* 0x14-0x17 */
- uint8_t options; /* 0x18 */
- uint8_t nandblocksize; /* 0x19 */
- uint8_t nandbadblklocation;/* 0x1A */
- uint8_t reserved4; /* 0x1B */
- uint16_t reserved5; /* 0x1C-0x1D */
- uint8_t ext; /* 0x1E */
- uint8_t checksum; /* 0x1F */
+ u8 blockid; /* 0x0 */
+ u8 flags; /* 0x1 */
+ u16 nandpagesize; /* 0x2-0x3 */
+ u32 blocksize; /* 0x4-0x7 */
+ u8 version; /* 0x8 */
+ u8 headersz_msb; /* 0x9 */
+ u16 headersz_lsb; /* 0xA-0xB */
+ u32 srcaddr; /* 0xC-0xF */
+ u32 destaddr; /* 0x10-0x13 */
+ u32 execaddr; /* 0x14-0x17 */
+ u8 options; /* 0x18 */
+ u8 nandblocksize; /* 0x19 */
+ u8 nandbadblklocation;/* 0x1A */
+ u8 reserved4; /* 0x1B */
+ u16 reserved5; /* 0x1C-0x1D */
+ u8 ext; /* 0x1E */
+ u8 checksum; /* 0x1F */
} __packed;
#ifdef CONFIG_SPL_MMC
--
2.20.1
[PATCH u-boot-marvell v4 8/9] arm: mvebu: spl: Use IS_ENABLED() instead of #ifdef where possible
From: Marek Behún
Use the preferred
if (IS_ENABLED(X))
instead of
#ifdef X
where possible.
There are still places where this is not possible or is more complicated
to convert in this file. Leave those be for now.
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
---
arch/arm/mach-mvebu/spl.c | 23 ---
1 file changed, 8 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 103049b49b89..5006f9e80bb0 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -149,26 +149,24 @@ int spl_parse_board_header(struct spl_image_info
*spl_image,
return -EINVAL;
}
-#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
- if (bootdev->boot_device == BOOT_DEVICE_SPI &&
+ if (IS_ENABLED(CONFIG_SPL_SPI_FLASH_SUPPORT) &&
+ bootdev->boot_device == BOOT_DEVICE_SPI &&
mhdr->blockid != IBR_HDR_SPI_ID) {
printf("ERROR: Wrong blockid (0x%x) in SPI kwbimage\n",
mhdr->blockid);
return -EINVAL;
}
-#endif
-#ifdef CONFIG_SPL_SATA
- if (bootdev->boot_device == BOOT_DEVICE_SATA &&
+ if (IS_ENABLED(CONFIG_SPL_SATA) &&
+ bootdev->boot_device == BOOT_DEVICE_SATA &&
mhdr->blockid != IBR_HDR_SATA_ID) {
printf("ERROR: Wrong blockid (0x%x) in SATA kwbimage\n",
mhdr->blockid);
return -EINVAL;
}
-#endif
-#ifdef CONFIG_SPL_MMC
- if ((bootdev->boot_device == BOOT_DEVICE_MMC1 ||
+ if (IS_ENABLED(CONFIG_SPL_MMC) &&
+ (bootdev->boot_device == BOOT_DEVICE_MMC1 ||
bootdev->boot_device == BOOT_DEVICE_MMC2 ||
bootdev->boot_device == BOOT_DEVICE_MMC2_2) &&
mhdr->blockid != IBR_HDR_SDIO_ID) {
@@ -176,18 +174,16 @@ int spl_parse_board_header(struct spl_image_info
*spl_image,
mhdr->blockid);
return -EINVAL;
}
-#endif
spl_image->offset = mhdr->srcaddr;
-#ifdef CONFIG_SPL_SATA
/*
* For SATA srcaddr is specified in number of sectors.
* The main header is must be stored at sector number 1.
* This expects that sector size is 512 bytes and recalculates
* data offset to bytes relative to the main header.
*/
- if (mhdr->blockid == IBR_HDR_SATA_ID) {
+ if (IS_ENABLED(CONFIG_SPL_SATA) && mhdr->blockid == IBR_HDR_SATA_ID) {
if (spl_image->offset < 1) {
printf("ERROR: Wrong srcaddr (0x%08x) in SATA
kwbimage\n",
spl_image->offset);
@@ -196,17 +192,14 @@ int spl_parse_board_header(struct spl_image_info
*spl_image,
spl_image->offset -= 1;
spl_image->offset *= 512;
}
-#endif
-#ifdef CONFIG_SPL_MMC
/*
* For SDIO (eMMC) srcaddr is specified in number of sectors.
* This expects that sector size is 512 bytes and recalculates
* data offset to bytes.
*/
- if (mhdr->blockid == IBR_HDR_SDIO_ID)
+ if (IS_ENABLED(CONFIG_SPL_MMC) && mhdr->blockid == IBR_HDR_SDIO_ID)
spl_image->offset *= 512;
-#endif
if (spl_image->offset % 4 != 0) {
printf("ERROR: Wrong srcaddr (0x%08x) in kwbimage\n",
--
2.20.1
[PATCH u-boot-marvell v4 9/9] arm: mvebu: spl: Fix 100 column exceeds
From: Marek Behún Fix 100 column exceeds in arch/arm/mach-mvebu/spl.c. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese --- arch/arm/mach-mvebu/spl.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 5006f9e80bb0..273ecb8bd6cf 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -46,7 +46,8 @@ #if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0 #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0 #endif -#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0 +#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && \ +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0 #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0 #endif #endif @@ -57,7 +58,8 @@ * set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper. */ #ifdef CONFIG_SPL_SATA -#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1 +#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || \ +!defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1 #error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1 #endif #endif -- 2.20.1
[PATCH u-boot-marvell v4 6/9] arm: mvebu: spl: Print srcaddr in error message
From: Marek Behún
Print the wrong srcaddr (spl_image->offset) in error message also for
SATA case.
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
---
arch/arm/mach-mvebu/spl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 72cc2f92f698..eacac776530c 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -189,7 +189,8 @@ int spl_parse_board_header(struct spl_image_info *spl_image,
*/
if (mhdr->blockid == IBR_HDR_SATA_ID) {
if (spl_image->offset < 1) {
- printf("ERROR: Wrong SATA srcaddr in kwbimage\n");
+ printf("ERROR: Wrong srcaddr (0x%08x) in SATA
kwbimage\n",
+ spl_image->offset);
return -EINVAL;
}
spl_image->offset -= 1;
--
2.20.1
[PATCH u-boot-marvell v4 5/9] arm: mvebu: Check for kwbimage data checksum
Last 4 bytes of kwbimage boot image is checksum. Verify it via the new
spl_check_board_image() function which is called by U-Boot SPL after
loading kwbimage.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
---
arch/arm/mach-mvebu/spl.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 62e4fe12d65c..72cc2f92f698 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -99,6 +99,33 @@ u32 spl_mmc_boot_mode(const u32 boot_device)
}
#endif
+static u32 checksum32(void *start, u32 len)
+{
+ u32 csum = 0;
+ u32 *p = start;
+
+ while (len > 0) {
+ csum += *p++;
+ len -= sizeof(u32);
+ };
+
+ return csum;
+}
+
+int spl_check_board_image(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev)
+{
+ u32 csum = *(u32 *)(spl_image->load_addr + spl_image->size - 4);
+
+ if (checksum32((void *)spl_image->load_addr,
+ spl_image->size - 4) != csum) {
+ printf("ERROR: Invalid data checksum in kwbimage\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
int spl_parse_board_header(struct spl_image_info *spl_image,
const struct spl_boot_device *bootdev,
const void *image_header, size_t size)
--
2.20.1
[PATCH u-boot-marvell v4 2/9] SPL: Add struct spl_boot_device parameter into spl_parse_board_header()
Add parameter spl_boot_device to spl_parse_board_header(), which allows
the implementations to see from which device we are booting and do
boot-device-specific checks of the image header.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
---
arch/arm/mach-mvebu/spl.c | 1 +
arch/arm/mach-sunxi/spl_spi_sunxi.c | 2 +-
common/spl/spl.c| 4 ++-
common/spl/spl_ext.c| 9 --
common/spl/spl_fat.c| 11 +---
common/spl/spl_legacy.c | 3 +-
common/spl/spl_mmc.c| 43 ++---
common/spl/spl_nand.c | 13 +
common/spl/spl_net.c| 2 +-
common/spl/spl_nor.c| 4 +--
common/spl/spl_onenand.c| 2 +-
common/spl/spl_ram.c| 2 +-
common/spl/spl_sata.c | 9 +++---
common/spl/spl_sdp.c| 2 +-
common/spl/spl_spi.c| 9 +++---
common/spl/spl_ubi.c| 4 +--
common/spl/spl_usb.c| 4 +--
common/spl/spl_xip.c| 4 +--
common/spl/spl_ymodem.c | 4 +--
drivers/usb/gadget/f_sdp.c | 13 +
include/sdp.h | 3 +-
include/spl.h | 7 +
22 files changed, 95 insertions(+), 60 deletions(-)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 47b64c14631b..fe22951e16c0 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -100,6 +100,7 @@ u32 spl_mmc_boot_mode(const u32 boot_device)
#endif
int spl_parse_board_header(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev,
const void *image_header, size_t size)
{
const struct kwbimage_main_hdr_v1 *mhdr = image_header;
diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c
b/arch/arm/mach-sunxi/spl_spi_sunxi.c
index 3499c4cc5f88..910e80501617 100644
--- a/arch/arm/mach-sunxi/spl_spi_sunxi.c
+++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c
@@ -348,7 +348,7 @@ static int spl_spi_load_image(struct spl_image_info
*spl_image,
ret = spl_load_simple_fit(spl_image, ,
load_offset, header);
} else {
- ret = spl_parse_image_header(spl_image, header);
+ ret = spl_parse_image_header(spl_image, bootdev, header);
if (ret)
return ret;
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 4c101ec5d34e..bf2139a05888 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -312,6 +312,7 @@ static int spl_load_fit_image(struct spl_image_info
*spl_image,
#endif
__weak int spl_parse_board_header(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev,
const void *image_header, size_t size)
{
return -EINVAL;
@@ -326,6 +327,7 @@ __weak int spl_parse_legacy_header(struct spl_image_info
*spl_image,
}
int spl_parse_image_header(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev,
const struct image_header *header)
{
#if CONFIG_IS_ENABLED(LOAD_FIT_FULL)
@@ -369,7 +371,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
}
#endif
- if (!spl_parse_board_header(spl_image, (const void *)header,
sizeof(*header)))
+ if (!spl_parse_board_header(spl_image, bootdev, (const void
*)header, sizeof(*header)))
return 0;
#ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT
diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
index 6a28fe9bdb50..ebd914c49267 100644
--- a/common/spl/spl_ext.c
+++ b/common/spl/spl_ext.c
@@ -10,6 +10,7 @@
#include
int spl_load_image_ext(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition,
const char *filename)
{
@@ -46,7 +47,7 @@ int spl_load_image_ext(struct spl_image_info *spl_image,
goto end;
}
- err = spl_parse_image_header(spl_image, header);
+ err = spl_parse_image_header(spl_image, bootdev, header);
if (err < 0) {
puts("spl: ext: failed to parse image header\n");
goto end;
@@ -66,6 +67,7 @@ end:
#if CONFIG_IS_ENABLED(OS_BOOT)
int spl_load_image_ext_os(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition)
{
int err;
@@ -103,7 +105,7 @@ int spl_load_image_ext_os(struct spl_image_info *spl_image,
}
file = env_get("falcon_image_file");
if (file) {
- err = spl_load_image_ext(spl_image, block_dev,
+
[PATCH u-boot-marvell v4 4/9] SPL: Add support for checking board / BootROM specific image types
Commit 9baab60b8054 ("SPL: Add support for parsing board / BootROM specific
image types") added support for loading board specific image types.
This commit adds support for a new weak function spl_parse_board_header()
which is called after loading boot image. Board may implement this function
for checking if loaded board specific image is valid.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
---
common/spl/spl.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index bf2139a05888..cc3b3b3438e2 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -589,6 +589,12 @@ static struct spl_image_loader *spl_ll_find_loader(uint
boot_device)
return NULL;
}
+__weak int spl_check_board_image(struct spl_image_info *spl_image,
+const struct spl_boot_device *bootdev)
+{
+ return 0;
+}
+
static int spl_load_image(struct spl_image_info *spl_image,
struct spl_image_loader *loader)
{
@@ -610,6 +616,9 @@ static int spl_load_image(struct spl_image_info *spl_image,
}
}
#endif
+ if (!ret)
+ ret = spl_check_board_image(spl_image, );
+
return ret;
}
--
2.20.1
[PATCH u-boot-marvell v4 1/9] arm: mvebu: Check that kwbimage offset and blocksize are valid
There are certain restrictions for kwbimage offset and blocksize.
Validate them.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
---
arch/arm/mach-mvebu/spl.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index aada83f1902a..47b64c14631b 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -162,6 +162,18 @@ int spl_parse_board_header(struct spl_image_info
*spl_image,
spl_image->offset *= 512;
#endif
+ if (spl_image->offset % 4 != 0) {
+ printf("ERROR: Wrong srcaddr (0x%08x) in kwbimage\n",
+ spl_image->offset);
+ return -EINVAL;
+ }
+
+ if (mhdr->blocksize <= 4 || mhdr->blocksize % 4 != 0) {
+ printf("ERROR: Wrong blocksize (0x%08x) in kwbimage\n",
+ mhdr->blocksize);
+ return -EINVAL;
+ }
+
spl_image->size = mhdr->blocksize;
spl_image->entry_point = mhdr->execaddr;
spl_image->load_addr = mhdr->destaddr;
--
2.20.1
[PATCH u-boot-marvell v4 3/9] arm: mvebu: Check that kwbimage blockid matches boot mode
Each boot mode has its own kwbimage specified by blockid. So check that
kwbimage is valid by blockid.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
---
arch/arm/mach-mvebu/spl.c | 35 ++-
1 file changed, 26 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index fe22951e16c0..62e4fe12d65c 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -117,22 +117,39 @@ int spl_parse_board_header(struct spl_image_info
*spl_image,
* (including SPL content) which is not included in U-Boot image_header.
*/
if (mhdr->version != 1 ||
- ((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr) ||
- (
+ ((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr)) {
+ printf("ERROR: Invalid kwbimage v1\n");
+ return -EINVAL;
+ }
+
#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
-mhdr->blockid != IBR_HDR_SPI_ID &&
+ if (bootdev->boot_device == BOOT_DEVICE_SPI &&
+ mhdr->blockid != IBR_HDR_SPI_ID) {
+ printf("ERROR: Wrong blockid (0x%x) in SPI kwbimage\n",
+ mhdr->blockid);
+ return -EINVAL;
+ }
#endif
+
#ifdef CONFIG_SPL_SATA
-mhdr->blockid != IBR_HDR_SATA_ID &&
+ if (bootdev->boot_device == BOOT_DEVICE_SATA &&
+ mhdr->blockid != IBR_HDR_SATA_ID) {
+ printf("ERROR: Wrong blockid (0x%x) in SATA kwbimage\n",
+ mhdr->blockid);
+ return -EINVAL;
+ }
#endif
+
#ifdef CONFIG_SPL_MMC
-mhdr->blockid != IBR_HDR_SDIO_ID &&
-#endif
-1
- )) {
- printf("ERROR: Not valid SPI/NAND/SATA/SDIO kwbimage v1\n");
+ if ((bootdev->boot_device == BOOT_DEVICE_MMC1 ||
+bootdev->boot_device == BOOT_DEVICE_MMC2 ||
+bootdev->boot_device == BOOT_DEVICE_MMC2_2) &&
+ mhdr->blockid != IBR_HDR_SDIO_ID) {
+ printf("ERROR: Wrong blockid (0x%x) in SDIO kwbimage\n",
+ mhdr->blockid);
return -EINVAL;
}
+#endif
spl_image->offset = mhdr->srcaddr;
--
2.20.1
[PATCH u-boot-marvell v4 0/9] More verifications for kwbimage in SPL
Hello Stefan, this is v4 of series that adds more checks for kwbimage validity and consistency to SPL, mainly checking image data checksum. Patches now passed Github CI testing: https://github.com/u-boot/u-boot/pull/106 Changes since v3: - fix compile erros detected by CI (patch 2) - print addresses in hex format instead of dec format (patch 1,3,6) - rebase on master branch as v3 does not apply (patch 8) Changes since v2: - changed the error message in patch 6 according to Pali's suggestion - added R-B tags Changes since v1: - updated error messages as requested by Stefan - fixed checkpatch warnings for uintN_t types (converted to preferred uN) - added more checkpatch fixes Marek Behún (4): arm: mvebu: spl: Print srcaddr in error message arm: mvebu: spl: Use preferred types u8/u16/u32 instead of uintN_t arm: mvebu: spl: Use IS_ENABLED() instead of #ifdef where possible arm: mvebu: spl: Fix 100 column exceeds Pali Rohár (5): arm: mvebu: Check that kwbimage offset and blocksize are valid SPL: Add struct spl_boot_device parameter into spl_parse_board_header() arm: mvebu: Check that kwbimage blockid matches boot mode SPL: Add support for checking board / BootROM specific image types arm: mvebu: Check for kwbimage data checksum arch/arm/mach-mvebu/spl.c | 133 +++- arch/arm/mach-sunxi/spl_spi_sunxi.c | 2 +- common/spl/spl.c| 13 ++- common/spl/spl_ext.c| 9 +- common/spl/spl_fat.c| 11 ++- common/spl/spl_legacy.c | 3 +- common/spl/spl_mmc.c| 43 + common/spl/spl_nand.c | 13 +-- common/spl/spl_net.c| 2 +- common/spl/spl_nor.c| 4 +- common/spl/spl_onenand.c| 2 +- common/spl/spl_ram.c| 2 +- common/spl/spl_sata.c | 9 +- common/spl/spl_sdp.c| 2 +- common/spl/spl_spi.c| 9 +- common/spl/spl_ubi.c| 4 +- common/spl/spl_usb.c| 4 +- common/spl/spl_xip.c| 4 +- common/spl/spl_ymodem.c | 4 +- drivers/usb/gadget/f_sdp.c | 13 +-- include/sdp.h | 3 +- include/spl.h | 7 ++ 22 files changed, 196 insertions(+), 100 deletions(-) -- 2.20.1
Re: [ANN] U-Boot v2022.01 released
Dear Tom, In message <20220110184720.GB2773246@bill-the-cat> you wrote: > > It is release day and here is v2022.01. With this release > we are now at the fourth of our 2 years past a number of DM migration > deadlines. We're now at the point where conversion to CONFIG_DM itself > must have been done, and I think nothing is tripping up on that deadline > anymore, which is good. > > Note that we're introducing now a migration deadline of v2022.10 for > using CONFIG_DM_KEYBOARD (and the warning will show up once next is > merged to master, this is the last release without a deadline enforced). > > I want to again call attention to in general is the number of CONFIG > symbols that need to be migrated to Kconfig still. If you maintain a > board or SoC, please check for symbols specific to your area of code > that aren't migrated yet and see how to move them. The > tools/moveconfig.py tool can handle a lot of cases. If it's tricky > please reach out. > > In terms of a changelog,=20 > git log --merges v2022.01-rc4..v2022.01 > contains what I've pulled since the last RC or: > git log --merges v2021.10..v2022.01 > for changes since the last full release. As always, more details in > pull requests (or the tags referenced by them) will result in more > details here. As always, the release statistics can be found here [1]. [1] http://www.denx.de/wiki/U-Boot/UbootStat_2022_01 Here the short version: * Processed 1417 csets from 164 developers * 28 employers found * A total of 69397 lines added, 45876 removed (delta 23521) Developers with the most changesets Tom Rini 179 (12.6%) Simon Glass141 (10.0%) Pali Rohár124 (8.8%) Marek Behún78 (5.5%) Heinrich Schuchardt 67 (4.7%) Marek Vasut 56 (4.0%) Vladimir Oltean 53 (3.7%) Samuel Holland 53 (3.7%) Michael Walle 45 (3.2%) Patrick Delaunay38 (2.7%) ... Developers with the most changed lines Tom Rini 29502 (31.2%) Simon Glass 7761 (8.2%) Frieder Schrempf 5561 (5.9%) Michal Simek 3516 (3.7%) Pali Rohár 3024 (3.2%) Masahisa Kojima 2724 (2.9%) Dzmitry Sankouski 2655 (2.8%) Neil Armstrong2449 (2.6%) Michael Walle 2312 (2.4%) Jan Kiszka2125 (2.2%) ... Developers with the most lines removed Tom Rini 11969 (26.1%) Anatolij Gustschin 917 (2.0%) Patrick Delaunay 813 (1.8%) Eugen Hristev 526 (1.1%) Marcel Ziswiler395 (0.9%) Thomas Huth256 (0.6%) Wolfgang Denk 238 (0.5%) Marek Behún 151 (0.3%) Andrey Zhizhikin 146 (0.3%) Adam Ford 142 (0.3%) ... Developers with the most signoffs (total 205) Andre Przywara 44 (21.5%) Marek Behún33 (16.1%) Tom Rini13 (6.3%) Oleksandr Suvorov 11 (5.4%) Neil Armstrong 11 (5.4%) Michal Simek10 (4.9%) Tom Warren 9 (4.4%) Marcel Ziswiler 8 (3.9%) Ilias Apalodimas 7 (3.4%) Priyanka Jain6 (2.9%) ... Developers with the most reviews (total 989) Stefan Roese 165 (16.7%) Simon Glass158 (16.0%) Ramon Fried 61 (6.2%) Priyanka Jain 56 (5.7%) Bin Meng50 (5.1%) Marek Behún48 (4.9%) Heinrich Schuchardt 36 (3.6%) Patrice Chotard 32 (3.2%) Fabio Estevam 32 (3.2%) Andre Przywara 30 (3.0%) ... Developers with the most test credits (total 66) Artem Lapkin16 (24.2%) Masami Hiramatsu 7 (10.6%) Michael Walle6 (9.1%) Simon Glass 2 (3.0%) Bin Meng 2 (3.0%) Marek Behún 2 (3.0%) Patrice Chotard 2 (3.0%) Ilias Apalodimas 2 (3.0%) Vladimir Oltean 2 (3.0%) Samuel Holland 2 (3.0%) ... Developers who gave the most tested-by credits (total 66) Simon Glass 17 (25.8%) Marek Behún 8 (12.1%) Vladimir Oltean 8 (12.1%) Patrick Delaunay 4 (6.1%) Ye Li3 (4.5%) Michael Walle2 (3.0%) Ilias Apalodimas 2 (3.0%) Stefan Roese 2 (3.0%) Heinrich Schuchardt 2 (3.0%) Fabio Estevam2 (3.0%) ... Developers with the most report credits (total 18) Eugen Hristev4 (22.2%) Alexandru Gagniuc3 (16.7%) Herbert Poetzl 2 (11.1%) Michael Walle1 (5.6%) Tom Rini 1 (5.6%) Neil Armstrong 1 (5.6%) Artem Lapkin 1 (5.6%) Masami Hiramatsu 1 (5.6%) Vyacheslav Bocharov 1 (5.6%) Xin Lin 1 (5.6%)
[PATCH 4/4] arm64: zynqmp: Add command for disabling loading other overlays
Add command "zynqmp pmufw node close" to disable permission to load
additional pmufw config overlays. This command will make sure that any
other sw will ask for changing permission.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/cmds.c | 16
drivers/firmware/firmware-zynqmp.c | 19 +++
include/zynqmp_firmware.h | 1 +
3 files changed, 36 insertions(+)
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index 5a277c712f60..2ab9596248c0 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -209,6 +209,19 @@ static int do_zynqmp_pmufw(struct cmd_tbl *cmdtp, int
flag, int argc,
if (argc != cmdtp->maxargs)
return CMD_RET_USAGE;
+ if (!strncmp(argv[2], "node", 4)) {
+ u32 id;
+
+ if (!strncmp(argv[3], "close", 5))
+ return zynqmp_pmufw_config_close();
+
+ id = dectoul(argv[3], NULL);
+
+ printf("Enable permission for node ID %d\n", id);
+
+ return zynqmp_pmufw_node(id);
+ }
+
addr = hextoul(argv[2], NULL);
size = hextoul(argv[3], NULL);
@@ -416,6 +429,9 @@ static char zynqmp_help_text[] =
" lock(0)/split(1)\n"
#endif
"zynqmp pmufw address size - load PMU FW configuration object\n"
+ "zynqmp pmufw node - load PMU FW configuration object\n"
+ "zynqmp pmufw node close - disable config object loading\n"
+ " node: keyword, id: NODE_ID in decimal format\n"
"zynqmp rsa srcaddr srclen mod exp rsaop -\n"
" Performs RSA encryption and RSA decryption on blob of data\n"
" at srcaddr and puts it back in srcaddr using modulus and\n"
diff --git a/drivers/firmware/firmware-zynqmp.c
b/drivers/firmware/firmware-zynqmp.c
index a80e73307982..2ba0b3a7c5c6 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -49,6 +49,25 @@ static unsigned int xpm_configobject[] = {
PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
};
+static unsigned int xpm_configobject_close[] = {
+ /**/
+ /* HEADER */
+ 2, /* Number of remaining words in the header */
+ 1, /* Number of sections included in config object */
+ PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay */
+ /**/
+ /* SET CONFIG SECTION */
+ PM_CONFIG_SET_CONFIG_SECTION_ID,
+ 0U, /* Loading permission to Overlay config object */
+};
+
+int zynqmp_pmufw_config_close(void)
+{
+ zynqmp_pmufw_load_config_object(xpm_configobject_close,
+ sizeof(xpm_configobject_close));
+ return 0;
+}
+
int zynqmp_pmufw_node(u32 id)
{
/* Record power domain id */
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index 76c161806a0d..50bf4ef39535 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -368,6 +368,7 @@ enum pm_ioctl_id {
unsigned int zynqmp_firmware_version(void);
int zynqmp_pmufw_node(u32 id);
+int zynqmp_pmufw_config_close(void);
void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size);
int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
u32 arg3, u32 *ret_payload);
--
2.34.1
[PATCH 3/4] firmware: zynqmp: Do not report error if node is already configured
Power domain driver sends PM fragment to PMUFW. It is sent for every node
which is listed in DT. But some nodes could be already enabled but driver
is not capable to find it out. That's why it blinly sents request for every
listed IP. When PMUFW response by XST_PM_ALREADY_CONFIGURED error code
there is no need to show any error message because node is already enabled.
That's why cover this case with message when DEBUG is enabled.
Signed-off-by: Michal Simek
---
drivers/firmware/firmware-zynqmp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/firmware/firmware-zynqmp.c
b/drivers/firmware/firmware-zynqmp.c
index d6dd5a394ee9..a80e73307982 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -21,6 +21,7 @@
#define PMUFW_PAYLOAD_ARG_CNT 8
#define XST_PM_NO_ACCESS 2002L
+#define XST_PM_ALREADY_CONFIGURED 2009L
struct zynqmp_power {
struct mbox_chan tx_chan;
@@ -143,6 +144,11 @@ void zynqmp_pmufw_load_config_object(const void *cfg_obj,
size_t size)
return;
}
+ if (err == XST_PM_ALREADY_CONFIGURED) {
+ debug("PMUFW Node is already configured\n");
+ return;
+ }
+
if (err)
printf("Cannot load PMUFW configuration object (%d)\n", err);
--
2.34.1
[PATCH 2/4] firmware: zynqmp: Move loading message to debug
Power domain driver is using this function for every IP which is PD listed.
This can end up with a lot of messages which end up in boot log. That's why
show it only in EL3 as was used in past.
Signed-off-by: Michal Simek
---
drivers/firmware/firmware-zynqmp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/firmware/firmware-zynqmp.c
b/drivers/firmware/firmware-zynqmp.c
index 10240ddccd3b..d6dd5a394ee9 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -131,7 +131,8 @@ void zynqmp_pmufw_load_config_object(const void *cfg_obj,
size_t size)
int err;
u32 ret_payload[PAYLOAD_ARG_CNT];
- printf("Loading new PMUFW cfg obj (%ld bytes)\n", size);
+ if (IS_ENABLED(CONFIG_SPL_BUILD))
+ printf("Loading new PMUFW cfg obj (%ld bytes)\n", size);
flush_dcache_range((ulong)cfg_obj, (ulong)(cfg_obj + size));
--
2.34.1
[PATCH 1/4] xilinx: firmware: Introduce zynqmp_pmufw_node() for loading PMU fragments
Introduce zynqmp_pmufw_node() for loading PMU configuration fragment for
enabling IPs. Firmware driver has small overlay where NODE id is added and
config fragment is sent to PMUFW. There is a need to build PMUFW with
fragment support.
Signed-off-by: Michal Simek
---
drivers/firmware/firmware-zynqmp.c | 32 ++
include/zynqmp_firmware.h | 1 +
2 files changed, 33 insertions(+)
diff --git a/drivers/firmware/firmware-zynqmp.c
b/drivers/firmware/firmware-zynqmp.c
index 342dbc13dfdf..10240ddccd3b 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -27,6 +27,38 @@ struct zynqmp_power {
struct mbox_chan rx_chan;
} zynqmp_power;
+#define NODE_ID_LOCATION 5
+
+static unsigned int xpm_configobject[] = {
+ /**/
+ /* HEADER */
+ 2, /* Number of remaining words in the header */
+ 1, /* Number of sections included in config object */
+ PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay */
+ /**/
+ /* SLAVE SECTION */
+
+ PM_CONFIG_SLAVE_SECTION_ID, /* Section ID */
+ 1, /* Number of slaves */
+
+ 0, /* Node ID which will be changed below */
+ PM_SLAVE_FLAG_IS_SHAREABLE,
+ PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK |
+ PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
+ PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
+};
+
+int zynqmp_pmufw_node(u32 id)
+{
+ /* Record power domain id */
+ xpm_configobject[NODE_ID_LOCATION] = id;
+
+ zynqmp_pmufw_load_config_object(xpm_configobject,
+ sizeof(xpm_configobject));
+
+ return 0;
+}
+
static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen)
{
struct zynqmp_ipi_msg msg;
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index 19c004e91993..76c161806a0d 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -367,6 +367,7 @@ enum pm_ioctl_id {
#define PAYLOAD_ARG_CNT5U
unsigned int zynqmp_firmware_version(void);
+int zynqmp_pmufw_node(u32 id);
void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size);
int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
u32 arg3, u32 *ret_payload);
--
2.34.1
[PATCH 0/4] zynqmp: Add support for sending pmufw config object overlay
Hi, this small series is extending firmware interface for sending pmufw configuration overlay with asking for access to certain device. This infrastructure can be used via command or via power domain driver. Thanks, Michal Michal Simek (4): xilinx: firmware: Introduce zynqmp_pmufw_node() for loading PMU fragments firmware: zynqmp: Move loading message to debug firmware: zynqmp: Do not report error if node is already configured arm64: zynqmp: Add command for disabling loading other overlays board/xilinx/zynqmp/cmds.c | 16 drivers/firmware/firmware-zynqmp.c | 60 +- include/zynqmp_firmware.h | 2 + 3 files changed, 77 insertions(+), 1 deletion(-) -- 2.34.1
[PATCH] zynqmp: Use the same style for macro definitions
Use the same coding style for all macros.
#defineNAMEVALUE
Signed-off-by: Michal Simek
---
include/zynqmp_firmware.h | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index 51ecbef63464..19c004e91993 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -342,20 +342,20 @@ enum pm_ioctl_id {
IOCTL_AIE_ISR_CLEAR = 24,
};
-#define PM_SIP_SVC 0xc200
+#define PM_SIP_SVC 0xc200
-#define ZYNQMP_PM_VERSION_MAJOR 1
-#define ZYNQMP_PM_VERSION_MINOR 0
-#define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16
-#define ZYNQMP_PM_VERSION_MINOR_MASK0x
+#define ZYNQMP_PM_VERSION_MAJOR1
+#define ZYNQMP_PM_VERSION_MINOR0
+#define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16
+#define ZYNQMP_PM_VERSION_MINOR_MASK 0x
#define ZYNQMP_PM_VERSION \
((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \
ZYNQMP_PM_VERSION_MINOR)
-#define ZYNQMP_PM_VERSION_INVALID ~0
+#define ZYNQMP_PM_VERSION_INVALID ~0
-#define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
+#define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
/*
* Return payload size
@@ -384,9 +384,9 @@ int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32
arg2,
#define PM_MASTER_USING_SLAVE_MASK 0x2U
/* IPI Mask for Master */
-#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK 0x0001
-#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK0x0100
-#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK0x0200
+#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK 0x0001
+#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK 0x0100
+#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK 0x0200
enum zynqmp_pm_request_ack {
ZYNQMP_PM_REQUEST_ACK_NO = 1,
--
2.34.1
[PATCH] Revert "net: gem: Disable broadcast setting"
This reverts commit eafdcda4a854932c0319656de7bf3f017f17ae67. The main reason is that QEMU is using BOOTP protocol which is sending DHCP Offer to a broadcast address that's why it can't be disabled. DHCP protocol has no issue because it returns directly to client MAC address. Both of these options are described in RFC951 (https://datatracker.ietf.org/doc/html/rfc951#section-4) Signed-off-by: Michal Simek --- drivers/net/zynq_gem.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index f238811786c6..3118d1472669 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -62,7 +62,6 @@ #define ZYNQ_GEM_NWCFG_SPEED1000x0001 /* 100 Mbps operation */ #define ZYNQ_GEM_NWCFG_SPEED1000 0x0400 /* 1Gbps operation */ #define ZYNQ_GEM_NWCFG_FDEN0x0002 /* Full Duplex mode */ -#define ZYNQ_GEM_NWCFG_NO_BRDC BIT(5) /* No broadcast */ #define ZYNQ_GEM_NWCFG_FSREM 0x0002 /* FCS removal */ #define ZYNQ_GEM_NWCFG_SGMII_ENBL 0x0800 /* SGMII Enable */ #define ZYNQ_GEM_NWCFG_PCS_SEL 0x0800 /* PCS select */ @@ -80,7 +79,6 @@ #define ZYNQ_GEM_NWCFG_INIT(ZYNQ_GEM_DBUS_WIDTH | \ ZYNQ_GEM_NWCFG_FDEN | \ - ZYNQ_GEM_NWCFG_NO_BRDC | \ ZYNQ_GEM_NWCFG_FSREM | \ ZYNQ_GEM_NWCFG_MDCCLKDIV) -- 2.34.1
[PATCH 2/2] zynqmp: Run board_get_usable_ram_top() only on main U-Boot
From: Ashok Reddy Soma
With commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory
location"), the function board_get_usable_ram_top() is allocating
MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this
much memory in case of mini U-Boot.
Keep these functions which use lmb under CONFIG_LMB so that they are
compiled and used only when LMB is enabled.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 3 +++
boot/image-board.c | 4
2 files changed, 7 insertions(+)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 2b5239ccb475..c69fb939a83e 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -483,6 +483,7 @@ int dram_init(void)
return 0;
}
+#if defined(CONFIG_LMB)
ulong board_get_usable_ram_top(ulong total_size)
{
phys_size_t size;
@@ -504,6 +505,8 @@ ulong board_get_usable_ram_top(ulong total_size)
return reg + size;
}
+#endif
+
#else
int dram_init_banksize(void)
{
diff --git a/boot/image-board.c b/boot/image-board.c
index bf8817165cab..9cdfbc44154c 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -546,6 +546,7 @@ int boot_get_ramdisk(int argc, char *const argv[],
bootm_headers_t *images,
return 0;
}
+#if defined(CONFIG_LMB)
/**
* boot_ramdisk_high - relocate init ramdisk
* @lmb: pointer to lmb handle, will be used for memory mgmt
@@ -639,6 +640,7 @@ int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong
rd_len,
error:
return -1;
}
+#endif
int boot_get_setup(bootm_headers_t *images, u8 arch,
ulong *setup_start, ulong *setup_len)
@@ -832,6 +834,7 @@ int boot_get_loadable(int argc, char *const argv[],
bootm_headers_t *images,
return 0;
}
+#if defined(CONFIG_LMB)
/**
* boot_get_cmdline - allocate and initialize kernel cmdline
* @lmb: pointer to lmb handle, will be used for memory mgmt
@@ -939,6 +942,7 @@ int image_setup_linux(bootm_headers_t *images)
return 0;
}
+#endif
void genimg_print_size(uint32_t size)
{
--
2.34.1
[PATCH 1/2] lmb: Fix lmb property's defination under struct lmb
From: Ashok Reddy Soma
Under struct lmb {} the lmb property's should be defined only if
CONFIG_LMB_MEMORY_REGIONS is defined.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
include/lmb.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/lmb.h b/include/lmb.h
index ab277ca80004..1476d78c2823 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -68,7 +68,7 @@ struct lmb_region {
struct lmb {
struct lmb_region memory;
struct lmb_region reserved;
-#if !IS_ENABLED(CONFIG_LMB_USE_MAX_REGIONS)
+#if IS_ENABLED(CONFIG_LMB_MEMORY_REGIONS)
struct lmb_property memory_regions[CONFIG_LMB_MEMORY_REGIONS];
struct lmb_property reserved_regions[CONFIG_LMB_RESERVED_REGIONS];
#endif
--
2.34.1
[PATCH] arm64: zynqmp: Change firmware dependency
In case of mini U-Boot configurations there is no need to enable firmware driver which just consume space for nothing. That's why add an option to disable it. Signed-off-by: Michal Simek --- arch/arm/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 23d57ca10c51..635cea6131a8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1193,7 +1193,7 @@ config ARCH_ZYNQMP select DM_SERIAL select DM_SPI if SPI select DM_SPI_FLASH if DM_SPI - select FIRMWARE + imply FIRMWARE select GICV2 select GPIO_EXTRA_HEADER select OF_CONTROL @@ -1203,7 +1203,7 @@ config ARCH_ZYNQMP select SPL_DM_SPI if SPI && SPL_DM select SPL_DM_SPI_FLASH if SPL_DM_SPI select SPL_DM_MAILBOX if SPL - select SPL_FIRMWARE if SPL + imply SPL_FIRMWARE if SPL select SPL_SEPARATE_BSS if SPL select SUPPORT_SPL select ZYNQMP_IPI -- 2.34.1
[PATCH] net: gem: Workaround gmii2rgmii bridge DT node issue
From: Ashok Reddy Soma
For configurations with gmii2rgmii and external phy the DT nodes link
should be gem->gmii2rgmii->phy. But due to limitation in Linux driver
the DT is mentioned as gem->phy and gmii2rgmii->phy as shown in below DT.
ethernet@ff0c {
compatible = "cdns,zynqmp-gem\0cdns,gem";
status = "okay";
interrupt-parent = <0x04>;
interrupts = <0x00 0x3b 0x04 0x00 0x3b 0x04>;
reg = <0x00 0xff0c 0x00 0x1000>;
clock-names = "pclk\0hclk\0tx_clk\0rx_clk\0tsu_clk";
#address-cells = <0x01>;
#size-cells = <0x00>;
#stream-id-cells = <0x01>;
iommus = <0x0d 0x875>;
power-domains = <0x0c 0x1e>;
clocks = <0x03 0x1f 0x03 0x69 0x03 0x2e 0x03 0x32 0x03 0x2c>;
phy-handle = <0x0e>;
phy-mode = "gmii";
xlnx,ptp-enet-clock = <0x00>;
local-mac-address = [ff ff ff ff ff ff];
phandle = <0x4d>;
mdio {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x4e>;
ethernet-phy@1 {
reg = <0x01>;
rxc-skew-ps = <0x708>;
txc-skew-ps = <0x708>;
phandle = <0x0e>;
};
gmii_to_rgmii_0@8 {
compatible = "xlnx,gmii-to-rgmii-1.0";
phy-handle = <0x0e>;
reg = <0x08>;
phandle = <0x4f>;
};
};
};
Since same DT is used in Linux and U-Boot we need to workaround this
issue by using the gmii2rgmii node which points to phy and we should
ignore the gem pointing to phy directly.
Do this workaround by updating priv->phydev->node value with
priv->phy_of_node only if it is not valid node.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
drivers/net/zynq_gem.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index b751d28e611f..f238811786c6 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -338,7 +338,8 @@ static int zynq_phy_init(struct udevice *dev)
ADVERTISED_Asym_Pause;
priv->phydev->advertising = priv->phydev->supported;
- priv->phydev->node = priv->phy_of_node;
+ if (!ofnode_valid(priv->phydev->node))
+ priv->phydev->node = priv->phy_of_node;
return phy_config(priv->phydev);
}
--
2.34.1
[PATCH] cmd: Add Kconfig option for multiprocessor cmds
From: Ashok Reddy Soma Add Kconfig option(CONFIG_CMD_MP) to enable or disable multiprocessor commands. Compile cmd/mp.c based on CONFIG_CMD_MP. Signed-off-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- cmd/Kconfig | 8 cmd/Makefile | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index 5b30b13e438f..1e3eef4437b5 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1827,6 +1827,14 @@ config MP different processors in multiprocessor cases. +config CMD_MP + bool "support for multiprocessor commands" + depends on MP + default y + help + This enables commands to bringup different processors + in multiprocessor cases. + config CMD_TIMER bool "timer" help diff --git a/cmd/Makefile b/cmd/Makefile index 891819ae0f6b..9e8074bb7e49 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -101,7 +101,7 @@ obj-$(CONFIG_CMD_MDIO) += mdio.o obj-$(CONFIG_CMD_SLEEP) += sleep.o obj-$(CONFIG_CMD_MMC) += mmc.o obj-$(CONFIG_CMD_OPTEE_RPMB) += optee_rpmb.o -obj-$(CONFIG_MP) += mp.o +obj-$(CONFIG_CMD_MP) += mp.o obj-$(CONFIG_CMD_MTD) += mtd.o obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o obj-$(CONFIG_CMD_CLONE) += clone.o -- 2.34.1
[PATCH] arm64: xilinx: dts: Add dma properties to fix dtbs_check warnings
From: Shravya Kumbham
Update dma name and add #dma-cells properties to fix dtbs_check
warnings.
Signed-off-by: Shravya Kumbham
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 48 ++--
1 file changed, 32 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 1331cec36f34..755a4ed2e515 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -265,7 +265,7 @@
};
/* GDMA */
- fpd_dma_chan1: dma@fd50 {
+ fpd_dma_chan1: dma-controller@fd50 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd50 0x0 0x1000>;
@@ -276,9 +276,10 @@
#stream-id-cells = <1>;
iommus = < 0x14e8>;
power-domains = <_firmware PD_GDMA>;
+ #dma-cells = <1>;
};
- fpd_dma_chan2: dma@fd51 {
+ fpd_dma_chan2: dma-controller@fd51 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd51 0x0 0x1000>;
@@ -289,9 +290,10 @@
#stream-id-cells = <1>;
iommus = < 0x14e9>;
power-domains = <_firmware PD_GDMA>;
+ #dma-cells = <1>;
};
- fpd_dma_chan3: dma@fd52 {
+ fpd_dma_chan3: dma-controller@fd52 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd52 0x0 0x1000>;
@@ -302,9 +304,10 @@
#stream-id-cells = <1>;
iommus = < 0x14ea>;
power-domains = <_firmware PD_GDMA>;
+ #dma-cells = <1>;
};
- fpd_dma_chan4: dma@fd53 {
+ fpd_dma_chan4: dma-controller@fd53 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd53 0x0 0x1000>;
@@ -315,9 +318,10 @@
#stream-id-cells = <1>;
iommus = < 0x14eb>;
power-domains = <_firmware PD_GDMA>;
+ #dma-cells = <1>;
};
- fpd_dma_chan5: dma@fd54 {
+ fpd_dma_chan5: dma-controller@fd54 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd54 0x0 0x1000>;
@@ -328,9 +332,10 @@
#stream-id-cells = <1>;
iommus = < 0x14ec>;
power-domains = <_firmware PD_GDMA>;
+ #dma-cells = <1>;
};
- fpd_dma_chan6: dma@fd55 {
+ fpd_dma_chan6: dma-controller@fd55 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd55 0x0 0x1000>;
@@ -341,9 +346,10 @@
#stream-id-cells = <1>;
iommus = < 0x14ed>;
power-domains = <_firmware PD_GDMA>;
+ #dma-cells = <1>;
};
- fpd_dma_chan7: dma@fd56 {
+ fpd_dma_chan7: dma-controller@fd56 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd56 0x0 0x1000>;
@@ -354,9 +360,10 @@
#stream-id-cells = <1>;
iommus = < 0x14ee>;
power-domains = <_firmware PD_GDMA>;
+ #dma-cells = <1>;
};
- fpd_dma_chan8: dma@fd57 {
+ fpd_dma_chan8: dma-controller@fd57 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd57 0x0 0x1000>;
@@ -367,6 +374,7 @@
#stream-id-cells = <1>;
iommus = < 0x14ef>;
power-domains = <_firmware PD_GDMA>;
+ #dma-cells = <1>;
};
gic: interrupt-controller@f901 {
@@ -396,7 +404,7 @@
* These dma channels, Users should ensure that these dma
* Channels are allowed for non secure access.
*/
- lpd_dma_chan1: dma@ffa8 {
+ lpd_dma_chan1: dma-controller@ffa8 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
[PATCH] arm64: zynqmp: Update USB node handle from dwc3 to usb
From: Manish Narani
The DWC3 bindings require all USB node handles to be '^usb@[0-9a-f]+$'.
Update the same in ZynqMP device tree.
Signed-off-by: Manish Narani
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 300a2189f6eb..1331cec36f34 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -858,7 +858,7 @@
reset-names = "usb_crst", "usb_hibrst", "usb_apbrst";
ranges;
- dwc3_0: dwc3@fe20 {
+ dwc3_0: usb@fe20 {
compatible = "snps,dwc3";
status = "disabled";
reg = <0x0 0xfe20 0x0 0x4>;
@@ -890,7 +890,7 @@
reset-names = "usb_crst", "usb_hibrst", "usb_apbrst";
ranges;
- dwc3_1: dwc3@fe30 {
+ dwc3_1: usb@fe30 {
compatible = "snps,dwc3";
status = "disabled";
reg = <0x0 0xfe30 0x0 0x4>;
--
2.34.1
[PATCH] arm64: zynqmp: Change compatible strings for cadence uart
Based on Linux kernel DT binding there should be different compatible
strings used that's why align zynqmp.dtsi with it.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 015a582d7a79..300a2189f6eb 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -824,7 +824,7 @@
uart0: serial@ff00 {
u-boot,dm-pre-reloc;
- compatible = "cdns,uart-r1p12", "xlnx,xuartps";
+ compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <>;
interrupts = <0 21 4>;
@@ -835,7 +835,7 @@
uart1: serial@ff01 {
u-boot,dm-pre-reloc;
- compatible = "cdns,uart-r1p12", "xlnx,xuartps";
+ compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <>;
interrupts = <0 22 4>;
--
2.34.1
[PATCH 7/8] nvme: apple: Add driver for Apple NVMe storage controller
Add a driver for the NVMe storage controller integrated on
Apple SoCs. This NVMe controller isn't PCI based and deviates
from the NVMe standard in its implementation of the command
submission queue and the integration of an NVMMU that needs
to be managed. This commit tweaks the core NVMe code to
support the linear command submission queue implemented by
this controller. But setting up the submission queue and
managing the NVMMU controller is handled by implementing
the driver ops that were added in an earlier commit.
Signed-off-by: Mark Kettenis
Tested-on: firefly-rk3399
Tested-by: Mark Kettenis
---
configs/apple_m1_defconfig | 1 +
drivers/nvme/Kconfig | 11 ++
drivers/nvme/Makefile | 1 +
drivers/nvme/nvme_apple.c | 233 +
4 files changed, 246 insertions(+)
create mode 100644 drivers/nvme/nvme_apple.c
diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig
index cb235e4e7d..1528217b17 100644
--- a/configs/apple_m1_defconfig
+++ b/configs/apple_m1_defconfig
@@ -11,6 +11,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_NET is not set
# CONFIG_MMC is not set
CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_NVME_APPLE=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_KEYBOARD=y
diff --git a/drivers/nvme/Kconfig b/drivers/nvme/Kconfig
index 78da444c8b..0cb465160b 100644
--- a/drivers/nvme/Kconfig
+++ b/drivers/nvme/Kconfig
@@ -10,6 +10,17 @@ config NVME
This option enables support for NVM Express devices.
It supports basic functions of NVMe (read/write).
+config NVME_APPLE
+ bool "Apple NVMe controller support"
+ select NVME
+ help
+ This option enables support for the NVMe storage
+ controller integrated on Apple SoCs. This controller
+ isn't PCI-based based and deviates from the NVMe
+ standard implementation in its implementation of
+ the command submission queue and the integration
+ of an NVMMU that needs to be managed.
+
config NVME_PCI
bool "NVM Express PCI device support"
depends on PCI
diff --git a/drivers/nvme/Makefile b/drivers/nvme/Makefile
index fad9724e17..fa7b619446 100644
--- a/drivers/nvme/Makefile
+++ b/drivers/nvme/Makefile
@@ -3,4 +3,5 @@
# Copyright (C) 2017, Bin Meng
obj-y += nvme-uclass.o nvme.o nvme_show.o
+obj-$(CONFIG_NVME_APPLE) += nvme_apple.o
obj-$(CONFIG_NVME_PCI) += nvme_pci.o
diff --git a/drivers/nvme/nvme_apple.c b/drivers/nvme/nvme_apple.c
new file mode 100644
index 00..b0dc8492f0
--- /dev/null
+++ b/drivers/nvme/nvme_apple.c
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Mark Kettenis
+ */
+
+#include
+#include
+#include
+#include
+#include "nvme.h"
+#include
+
+#include
+#include
+#include
+
+#undef readl_poll_timeout
+#define readl_poll_timeout readl_poll_sleep_timeout
+
+#define REG_CPU_CTRL 0x0044
+#define REG_CPU_CTRL_RUN BIT(4)
+
+#define ANS_MAX_PEND_CMDS_CTRL 0x01210
+#define ANS_MAX_QUEUE_DEPTH 64
+#define ANS_BOOT_STATUS0x01300
+#define ANS_BOOT_STATUS_OK0xde71ce55
+#define ANS_MODESEL0x01304
+#define ANS_UNKNOWN_CTRL 0x24008
+#define ANS_PRP_NULL_CHECK(1 << 11)
+#define ANS_LINEAR_SQ_CTRL 0x24908
+#define ANS_LINEAR_SQ_CTRL_EN (1 << 0)
+#define ANS_ASQ_DB 0x2490c
+#define ANS_IOSQ_DB0x24910
+#define ANS_NVMMU_NUM 0x28100
+#define ANS_NVMMU_BASE_ASQ 0x28108
+#define ANS_NVMMU_BASE_IOSQ0x28110
+#define ANS_NVMMU_TCB_INVAL0x28118
+#define ANS_NVMMU_TCB_STAT 0x28120
+
+#define ANS_NVMMU_TCB_SIZE 0x4000
+#define ANS_NVMMU_TCB_PITCH0x80
+
+struct ans_nvmmu_tcb {
+ u8 opcode;
+ u8 flags;
+ u8 command_id;
+ u8 pad0;
+ u32 prpl_len;
+ u8 pad1[16];
+ u64 prp1;
+ u64 prp2;
+};
+
+#define ANS_NVMMU_TCB_WRITEBIT(0)
+#define ANS_NVMMU_TCB_READ BIT(1)
+
+struct apple_nvme_priv {
+ struct nvme_dev ndev;
+ void *base;
+ void *asc;
+ struct reset_ctl_bulk resets;
+ struct mbox_chan chan;
+ struct ans_nvmmu_tcb *tcbs[NVME_Q_NUM];
+ u32 __iomem *q_db[NVME_Q_NUM];
+};
+
+static int apple_nvme_alloc_queue(struct nvme_queue *nvmeq)
+{
+ struct apple_nvme_priv *priv =
+ container_of(nvmeq->dev, struct apple_nvme_priv, ndev);
+ struct nvme_dev *dev = nvmeq->dev;
+
+ switch (nvmeq->qid) {
+ case NVME_ADMIN_Q:
+ case NVME_IO_Q:
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ priv->tcbs[nvmeq->qid] = (void *)memalign(4096, ANS_NVMMU_TCB_SIZE);
+ memset((void *)priv->tcbs[nvmeq->qid], 0, ANS_NVMMU_TCB_SIZE);
+
+ switch (nvmeq->qid) {
+ case NVME_ADMIN_Q:
+ priv->q_db[nvmeq->qid] =
+ ((void __iomem *)dev->bar) + ANS_ASQ_DB;
+ nvme_writeq((ulong)priv->tcbs[nvmeq->qid],
+
[PATCH 4/8] nvme: Introduce driver ops
The NVMe storage controller integrated on Apple SoCs deviates
from the NVMe standard in two aspects. It uses a "linear"
submission queue and it integrates an NVMMU that needs to be
programmed for each NVMe command. Introduce driver ops such
that we can set up the linear submission queue and program the
NVMMU in the driver for this strange beast.
Signed-off-by: Mark Kettenis
---
drivers/nvme/nvme.c | 45 ++---
drivers/nvme/nvme.h | 33 +
2 files changed, 51 insertions(+), 27 deletions(-)
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index be518ec20b..e2d0f9c668 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -27,33 +27,6 @@
#define IO_TIMEOUT 30
#define MAX_PRP_POOL 512
-enum nvme_queue_id {
- NVME_ADMIN_Q,
- NVME_IO_Q,
- NVME_Q_NUM,
-};
-
-/*
- * An NVM Express queue. Each device has at least two (one for admin
- * commands and one for I/O commands).
- */
-struct nvme_queue {
- struct nvme_dev *dev;
- struct nvme_command *sq_cmds;
- struct nvme_completion *cqes;
- wait_queue_head_t sq_full;
- u32 __iomem *q_db;
- u16 q_depth;
- s16 cq_vector;
- u16 sq_head;
- u16 sq_tail;
- u16 cq_head;
- u16 qid;
- u8 cq_phase;
- u8 cqe_seen;
- unsigned long cmdid_data[];
-};
-
static int nvme_wait_ready(struct nvme_dev *dev, bool enabled)
{
u32 bit = enabled ? NVME_CSTS_RDY : 0;
@@ -167,12 +140,19 @@ static u16 nvme_read_completion_status(struct nvme_queue
*nvmeq, u16 index)
*/
static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
{
+ struct nvme_ops *ops;
u16 tail = nvmeq->sq_tail;
memcpy(>sq_cmds[tail], cmd, sizeof(*cmd));
flush_dcache_range((ulong)>sq_cmds[tail],
(ulong)>sq_cmds[tail] + sizeof(*cmd));
+ ops = (struct nvme_ops *)nvmeq->dev->udev->driver->ops;
+ if (ops && ops->submit_cmd) {
+ ops->submit_cmd(nvmeq, cmd);
+ return;
+ }
+
if (++tail == nvmeq->q_depth)
tail = 0;
writel(tail, nvmeq->q_db);
@@ -183,6 +163,7 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,
struct nvme_command *cmd,
u32 *result, unsigned timeout)
{
+ struct nvme_ops *ops;
u16 head = nvmeq->cq_head;
u16 phase = nvmeq->cq_phase;
u16 status;
@@ -203,6 +184,10 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,
return -ETIMEDOUT;
}
+ ops = (struct nvme_ops *)nvmeq->dev->udev->driver->ops;
+ if (ops && ops->complete_cmd)
+ ops->complete_cmd(nvmeq, cmd);
+
status >>= 1;
if (status) {
printf("ERROR: status = %x, phase = %d, head = %d\n",
@@ -243,6 +228,7 @@ static int nvme_submit_admin_cmd(struct nvme_dev *dev,
struct nvme_command *cmd,
static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev,
int qid, int depth)
{
+ struct nvme_ops *ops;
struct nvme_queue *nvmeq = malloc(sizeof(*nvmeq));
if (!nvmeq)
return NULL;
@@ -268,6 +254,10 @@ static struct nvme_queue *nvme_alloc_queue(struct nvme_dev
*dev,
dev->queue_count++;
dev->queues[qid] = nvmeq;
+ ops = (struct nvme_ops *)dev->udev->driver->ops;
+ if (ops && ops->alloc_queue)
+ ops->alloc_queue(nvmeq);
+
return nvmeq;
free_queue:
@@ -821,6 +811,7 @@ int nvme_init(struct udevice *udev)
struct nvme_id_ns *id;
int ret;
+ ndev->udev = udev;
INIT_LIST_HEAD(>namespaces);
if (readl(>bar->csts) == -1) {
ret = -ENODEV;
diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
index 8e9ae3c7f6..57803b43fd 100644
--- a/drivers/nvme/nvme.h
+++ b/drivers/nvme/nvme.h
@@ -596,6 +596,7 @@ enum {
/* Represents an NVM Express device. Each nvme_dev is a PCI function. */
struct nvme_dev {
+ struct udevice *udev;
struct list_head node;
struct nvme_queue **queues;
u32 __iomem *dbs;
@@ -622,6 +623,32 @@ struct nvme_dev {
u32 nn;
};
+enum nvme_queue_id {
+ NVME_ADMIN_Q,
+ NVME_IO_Q,
+ NVME_Q_NUM,
+};
+
+/*
+ * An NVM Express queue. Each device has at least two (one for admin
+ * commands and one for I/O commands).
+ */
+struct nvme_queue {
+ struct nvme_dev *dev;
+ struct nvme_command *sq_cmds;
+ struct nvme_completion *cqes;
+ u32 __iomem *q_db;
+ u16 q_depth;
+ s16 cq_vector;
+ u16 sq_head;
+ u16 sq_tail;
+ u16 cq_head;
+ u16 qid;
+ u8 cq_phase;
+ u8 cqe_seen;
+ unsigned long cmdid_data[];
+};
+
/*
* An NVM Express namespace is equivalent to a SCSI LUN.
* Each namespace is
[PATCH 3/8] arm: apple: Add RTKit support
Most Apple IOPs run a firmware that is based on what Apple calls
RTKit. RTKit implements a common mailbox protocol. This code
provides an implementation of the AP side of this protocol,
providing a function to initialize RTKit-based firmwares as well
as a function to do a clean shutdown of this firmware.
Signed-off-by: Mark Kettenis
---
arch/arm/include/asm/arch-apple/rtkit.h | 11 ++
arch/arm/mach-apple/Makefile| 1 +
arch/arm/mach-apple/rtkit.c | 231
3 files changed, 243 insertions(+)
create mode 100644 arch/arm/include/asm/arch-apple/rtkit.h
create mode 100644 arch/arm/mach-apple/rtkit.c
diff --git a/arch/arm/include/asm/arch-apple/rtkit.h
b/arch/arm/include/asm/arch-apple/rtkit.h
new file mode 100644
index 00..51f77f298c
--- /dev/null
+++ b/arch/arm/include/asm/arch-apple/rtkit.h
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Mark Kettenis
+ */
+
+#define APPLE_RTKIT_PWR_STATE_SLEEP0x01
+#define APPLE_RTKIT_PWR_STATE_QUIESCED 0x10
+#define APPLE_RTKIT_PWR_STATE_ON 0x20
+
+int apple_rtkit_init(struct mbox_chan *);
+int apple_rtkit_shutdown(struct mbox_chan *, int);
diff --git a/arch/arm/mach-apple/Makefile b/arch/arm/mach-apple/Makefile
index e74a8c9df1..52f30a777b 100644
--- a/arch/arm/mach-apple/Makefile
+++ b/arch/arm/mach-apple/Makefile
@@ -2,3 +2,4 @@
obj-y += board.o
obj-y += lowlevel_init.o
+obj-y += rtkit.o
diff --git a/arch/arm/mach-apple/rtkit.c b/arch/arm/mach-apple/rtkit.c
new file mode 100644
index 00..79048a801f
--- /dev/null
+++ b/arch/arm/mach-apple/rtkit.c
@@ -0,0 +1,231 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Mark Kettenis
+ * (C) Copyright 2021 Copyright The Asahi Linux Contributors
+ */
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#define APPLE_RTKIT_EP_MGMT 0
+#define APPLE_RTKIT_EP_CRASHLOG1
+#define APPLE_RTKIT_EP_SYSLOG 2
+#define APPLE_RTKIT_EP_DEBUG 3
+#define APPLE_RTKIT_EP_IOREPORT 4
+
+/* Messages for management endpoint. */
+#define APPLE_RTKIT_MGMT_TYPE GENMASK(59, 52)
+
+#define APPLE_RTKIT_MGMT_PWR_STATE GENMASK(15, 0)
+
+#define APPLE_RTKIT_MGMT_HELLO 1
+#define APPLE_RTKIT_MGMT_HELLO_REPLY 2
+#define APPLE_RTKIT_MGMT_HELLO_MINVER GENMASK(15, 0)
+#define APPLE_RTKIT_MGMT_HELLO_MAXVER GENMASK(31, 16)
+
+#define APPLE_RTKIT_MGMT_STARTEP 5
+#define APPLE_RTKIT_MGMT_STARTEP_EP GENMASK(39, 32)
+#define APPLE_RTKIT_MGMT_STARTEP_FLAG BIT(1)
+
+#define APPLE_RTKIT_MGMT_SET_IOP_PWR_STATE 6
+#define APPLE_RTKIT_MGMT_SET_IOP_PWR_STATE_ACK 7
+
+#define APPLE_RTKIT_MGMT_EPMAP 8
+#define APPLE_RTKIT_MGMT_EPMAP_LAST BIT(51)
+#define APPLE_RTKIT_MGMT_EPMAP_BASE GENMASK(34, 32)
+#define APPLE_RTKIT_MGMT_EPMAP_BITMAP GENMASK(31, 0)
+
+#define APPLE_RTKIT_MGMT_EPMAP_REPLY 8
+#define APPLE_RTKIT_MGMT_EPMAP_REPLY_MORE BIT(0)
+
+#define APPLE_RTKIT_MIN_SUPPORTED_VERSION 11
+#define APPLE_RTKIT_MAX_SUPPORTED_VERSION 12
+
+/* Messages for internal endpoints. */
+#define APPLE_RTKIT_BUFFER_REQUEST 1
+#define APPLE_RTKIT_BUFFER_REQUEST_SIZE GENMASK(51, 44)
+#define APPLE_RTKIT_BUFFER_REQUEST_IOVA GENMASK(41, 0)
+
+int apple_rtkit_init(struct mbox_chan *chan)
+{
+ struct apple_mbox_msg msg;
+ int endpoints[256];
+ int nendpoints = 0;
+ int endpoint;
+ int min_ver, max_ver, want_ver;
+ int msgtype, pwrstate;
+ u64 reply;
+ u32 bitmap, base;
+ int i, ret;
+
+ /* Wakup the IOP. */
+ msg.msg0 = FIELD_PREP(APPLE_RTKIT_MGMT_TYPE,
APPLE_RTKIT_MGMT_SET_IOP_PWR_STATE) |
+ FIELD_PREP(APPLE_RTKIT_MGMT_PWR_STATE,
APPLE_RTKIT_PWR_STATE_ON);
+ msg.msg1 = APPLE_RTKIT_EP_MGMT;
+ ret = mbox_send(chan, );
+ if (ret < 0)
+ return ret;
+
+ /* Wait for protocol version negotiation message. */
+ ret = mbox_recv(chan, , 1);
+ if (ret < 0)
+ return ret;
+
+ endpoint = msg.msg1;
+ msgtype = FIELD_GET(APPLE_RTKIT_MGMT_TYPE, msg.msg0);
+ if (endpoint != APPLE_RTKIT_EP_MGMT) {
+ printf("%s: unexpected endpoint %d\n", __func__, endpoint);
+ return -EINVAL;
+ }
+ if (msgtype != APPLE_RTKIT_MGMT_HELLO) {
+ printf("%s: unexpected message type %d\n", __func__, msgtype);
+ return -EINVAL;
+ }
+
+ min_ver = FIELD_GET(APPLE_RTKIT_MGMT_HELLO_MINVER, msg.msg0);
+ max_ver = FIELD_GET(APPLE_RTKIT_MGMT_HELLO_MAXVER, msg.msg0);
+ want_ver = min(APPLE_RTKIT_MAX_SUPPORTED_VERSION, max_ver);
+
+ if (min_ver > APPLE_RTKIT_MAX_SUPPORTED_VERSION) {
+ printf("%s: firmware min version %d is too new\n",
+ __func__, min_ver);
+ return -ENOTSUPP;
+ }
+
+ if (max_ver < APPLE_RTKIT_MIN_SUPPORTED_VERSION) {
+ printf("%s: firmware max version %d is too old\n",
+ __func__, max_ver);
+ return
[PATCH 2/8] mailbox: apple: Add driver for Apple IOP mailbox
This mailbox driver provides a communication channel with the
Apple IOP controllers found on Apple SoCs. These IOP controllers
are used to implement various functions such as the System
Manegement Controller (SMC) and NVMe storage. It allows sending
and receiving a 96-bit message over a single channel.
The header file with the struct used for mailbox messages is taken
straight from Linux.
Signed-off-by: Mark Kettenis
Signed-off-by: Sven Peter
---
arch/arm/Kconfig | 1 +
drivers/mailbox/Kconfig | 11 +
drivers/mailbox/Makefile | 1 +
drivers/mailbox/apple-mbox.c | 92 +++
include/linux/apple-mailbox.h | 19
5 files changed, 124 insertions(+)
create mode 100644 drivers/mailbox/apple-mbox.c
create mode 100644 include/linux/apple-mailbox.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44954977b6..79eec3aa06 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -934,6 +934,7 @@ config ARCH_APPLE
select DM
select DM_GPIO
select DM_KEYBOARD
+ select DM_MAILBOX
select DM_SERIAL
select DM_USB
select DM_VIDEO
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index dd4b0ac0c3..73db2af0b8 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -10,6 +10,17 @@ config DM_MAILBOX
the basis of a variety of inter-process/inter-CPU communication
protocols.
+config APPLE_MBOX
+ bool "Enable Apple IOP controller support"
+ depends on DM_MAILBOX && ARCH_APPLE
+ default y
+ help
+ Enable support for the mailboxes that provide a comminucation
+ channel with Apple IOP controllers integrated on Apple SoCs.
+ These IOP controllers are used to implement various functions
+ such as the System Management Controller (SMC) and NVMe and this
+ driver is required to get that functionality up and running.
+
config SANDBOX_MBOX
bool "Enable the sandbox mailbox test driver"
depends on DM_MAILBOX && SANDBOX
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index d2ace8cd21..59e8d0de93 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox-uclass.o
+obj-$(CONFIG_APPLE_MBOX) += apple-mbox.o
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox.o
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox-test.o
obj-$(CONFIG_STM32_IPCC) += stm32-ipcc.o
diff --git a/drivers/mailbox/apple-mbox.c b/drivers/mailbox/apple-mbox.c
new file mode 100644
index 00..30c8e2f03f
--- /dev/null
+++ b/drivers/mailbox/apple-mbox.c
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 Mark Kettenis
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define REG_A2I_STAT 0x110
+#define REG_A2I_STAT_EMPTYBIT(17)
+#define REG_A2I_STAT_FULL BIT(16)
+#define REG_I2A_STAT 0x114
+#define REG_I2A_STAT_EMPTYBIT(17)
+#define REG_I2A_STAT_FULL BIT(16)
+#define REG_A2I_MSG0 0x800
+#define REG_A2I_MSG1 0x808
+#define REG_I2A_MSG0 0x830
+#define REG_I2A_MSG1 0x838
+
+struct apple_mbox_priv {
+ void *base;
+};
+
+static int apple_mbox_of_xlate(struct mbox_chan *chan,
+ struct ofnode_phandle_args *args)
+{
+ if (args->args_count != 0)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int apple_mbox_send(struct mbox_chan *chan, const void *data)
+{
+ struct apple_mbox_priv *priv = dev_get_priv(chan->dev);
+ const struct apple_mbox_msg *msg = data;
+
+ writeq(msg->msg0, priv->base + REG_A2I_MSG0);
+ writeq(msg->msg1, priv->base + REG_A2I_MSG1);
+ while (readl(priv->base + REG_A2I_STAT) & REG_A2I_STAT_FULL)
+ udelay(1);
+
+ return 0;
+}
+
+static int apple_mbox_recv(struct mbox_chan *chan, void *data)
+{
+ struct apple_mbox_priv *priv = dev_get_priv(chan->dev);
+ struct apple_mbox_msg *msg = data;
+
+ if (readl(priv->base + REG_I2A_STAT) & REG_I2A_STAT_EMPTY)
+ return -ENODATA;
+
+ msg->msg0 = readq(priv->base + REG_I2A_MSG0);
+ msg->msg1 = readq(priv->base + REG_I2A_MSG1);
+ return 0;
+}
+
+struct mbox_ops apple_mbox_ops = {
+ .of_xlate = apple_mbox_of_xlate,
+ .send = apple_mbox_send,
+ .recv = apple_mbox_recv,
+};
+
+static int apple_mbox_probe(struct udevice *dev)
+{
+ struct apple_mbox_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_read_addr_ptr(dev);
+ if (!priv->base)
+ return -EINVAL;
+
+ return 0;
+}
+
+static const struct udevice_id apple_mbox_of_match[] = {
+ { .compatible = "apple,asc-mailbox-v4" },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(apple_mbox) = {
+ .name = "apple-mbox",
+ .id = UCLASS_MAILBOX,
+ .of_match = apple_mbox_of_match,
+ .probe = apple_mbox_probe,
+ .priv_auto =
[PATCH 1/8] nvme: Split out PCI support
Apple SoCs have an integrated NVMe controller that isn't connected over a PCIe bus. In preparation for adding support for this NVMe controller, split out the PCI support into its own file. This file is selected through a new CONFIG_NVME_PCI Kconfig option, so do a wholesale replacement of CONFIG_NVME with CONFIG_NVME_PCI. Signed-off-by: Mark Kettenis --- configs/clearfog_gt_8k_defconfig | 2 +- configs/firefly-rk3399_defconfig | 2 +- configs/khadas-vim3_android_ab_defconfig | 2 +- configs/khadas-vim3_android_defconfig | 2 +- configs/khadas-vim3_defconfig | 2 +- configs/khadas-vim3l_android_ab_defconfig | 2 +- configs/khadas-vim3l_android_defconfig| 2 +- configs/khadas-vim3l_defconfig| 2 +- configs/kontron_sl28_defconfig| 2 +- configs/ls1012afrdm_qspi_defconfig| 2 +- configs/ls1012afrdm_tfa_defconfig | 2 +- .../ls1012afrwy_qspi_SECURE_BOOT_defconfig| 2 +- configs/ls1012afrwy_qspi_defconfig| 2 +- configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012afrwy_tfa_defconfig | 2 +- configs/ls1012aqds_qspi_defconfig | 2 +- configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012aqds_tfa_defconfig | 2 +- configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1012ardb_qspi_defconfig | 2 +- configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012ardb_tfa_defconfig | 2 +- configs/ls1021aiot_qspi_defconfig | 2 +- configs/ls1021aiot_sdcard_defconfig | 2 +- configs/ls1021aqds_ddr4_nor_defconfig | 2 +- configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 2 +- configs/ls1021aqds_nand_defconfig | 2 +- configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 2 +- configs/ls1021aqds_nor_defconfig | 2 +- configs/ls1021aqds_nor_lpuart_defconfig | 2 +- configs/ls1021aqds_qspi_defconfig | 2 +- configs/ls1021aqds_sdcard_ifc_defconfig | 2 +- configs/ls1021aqds_sdcard_qspi_defconfig | 2 +- configs/ls1021atsn_qspi_defconfig | 2 +- configs/ls1021atsn_sdcard_defconfig | 2 +- configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 2 +- configs/ls1021atwr_nor_defconfig | 2 +- configs/ls1021atwr_nor_lpuart_defconfig | 2 +- configs/ls1021atwr_qspi_defconfig | 2 +- configs/ls1021atwr_sdcard_ifc_defconfig | 2 +- configs/ls1021atwr_sdcard_qspi_defconfig | 2 +- configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1028aqds_tfa_defconfig | 2 +- configs/ls1028aqds_tfa_lpuart_defconfig | 2 +- configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1028ardb_tfa_defconfig | 2 +- configs/ls1043aqds_defconfig | 2 +- configs/ls1043aqds_lpuart_defconfig | 2 +- configs/ls1043aqds_nand_defconfig | 2 +- configs/ls1043aqds_nor_ddr3_defconfig | 2 +- configs/ls1043aqds_qspi_defconfig | 2 +- configs/ls1043aqds_sdcard_ifc_defconfig | 2 +- configs/ls1043aqds_sdcard_qspi_defconfig | 2 +- configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1043aqds_tfa_defconfig | 2 +- configs/ls1043ardb_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_defconfig | 2 +- configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_nand_defconfig | 2 +- configs/ls1043ardb_sdcard_defconfig | 2 +- configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_tfa_defconfig | 2 +- configs/ls1046afrwy_tfa_defconfig | 2 +- configs/ls1046aqds_SECURE_BOOT_defconfig | 2 +- configs/ls1046aqds_defconfig | 2 +- configs/ls1046aqds_lpuart_defconfig | 2 +- configs/ls1046aqds_nand_defconfig | 2 +- configs/ls1046aqds_qspi_defconfig | 2 +- configs/ls1046aqds_sdcard_ifc_defconfig | 2 +- configs/ls1046aqds_sdcard_qspi_defconfig | 2 +- configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1046aqds_tfa_defconfig | 2 +- configs/ls1046ardb_emmc_defconfig | 2 +- configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1046ardb_qspi_defconfig | 2 +- configs/ls1046ardb_qspi_spl_defconfig | 2 +- configs/ls1046ardb_sdcard_defconfig | 2 +- configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1046ardb_tfa_defconfig | 2 +- configs/ls1088aqds_defconfig | 2 +- configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1088aqds_qspi_defconfig | 2 +- configs/ls1088aqds_sdcard_ifc_defconfig | 2 +- configs/ls1088aqds_sdcard_qspi_defconfig | 2 +-
[PATCH 6/8] power: domain: apple: Add reset support
The power management controller found on Apple SoCs als provides
a way to reset all devices within a power domain. This is needed
to cleanly shutdown the NVMe controller before we hand over
control to the OS.
Signed-off-by: Mark Kettenis
---
arch/arm/Kconfig | 1 +
drivers/power/domain/apple-pmgr.c | 73 ++-
2 files changed, 73 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 79eec3aa06..04b4a20211 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -935,6 +935,7 @@ config ARCH_APPLE
select DM_GPIO
select DM_KEYBOARD
select DM_MAILBOX
+ select DM_RESET
select DM_SERIAL
select DM_USB
select DM_VIDEO
diff --git a/drivers/power/domain/apple-pmgr.c
b/drivers/power/domain/apple-pmgr.c
index d25f136b9d..4d06e76ff5 100644
--- a/drivers/power/domain/apple-pmgr.c
+++ b/drivers/power/domain/apple-pmgr.c
@@ -6,14 +6,22 @@
#include
#include
#include
+#include
#include
#include
#include
+#include
#include
#include
-#define APPLE_PMGR_PS_TARGET GENMASK(3, 0)
+#define APPLE_PMGR_RESET BIT(31)
+#define APPLE_PMGR_DEV_DISABLE BIT(10)
+#define APPLE_PMGR_WAS_CLKGATEDBIT(9)
+#define APPLE_PMGR_WAS_PWRGATED BIT(8)
#define APPLE_PMGR_PS_ACTUAL GENMASK(7, 4)
+#define APPLE_PMGR_PS_TARGET GENMASK(3, 0)
+
+#define APPLE_PMGR_FLAGS (APPLE_PMGR_WAS_CLKGATED |
APPLE_PMGR_WAS_PWRGATED)
#define APPLE_PMGR_PS_ACTIVE 0xf
#define APPLE_PMGR_PS_PWRGATE 0x0
@@ -25,6 +33,65 @@ struct apple_pmgr_priv {
u32 offset; /* offset within regmap for this domain */
};
+static int apple_reset_of_xlate(struct reset_ctl *reset_ctl,
+ struct ofnode_phandle_args *args)
+{
+ if (args->args_count != 0)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int apple_reset_request(struct reset_ctl *reset_ctl)
+{
+ return 0;
+}
+
+static int apple_reset_free(struct reset_ctl *reset_ctl)
+{
+ return 0;
+}
+
+static int apple_reset_assert(struct reset_ctl *reset_ctl)
+{
+ struct apple_pmgr_priv *priv = dev_get_priv(reset_ctl->dev->parent);
+
+ regmap_update_bits(priv->regmap, priv->offset,
+ APPLE_PMGR_FLAGS | APPLE_PMGR_DEV_DISABLE,
+ APPLE_PMGR_DEV_DISABLE);
+ regmap_update_bits(priv->regmap, priv->offset,
+ APPLE_PMGR_FLAGS | APPLE_PMGR_RESET,
+ APPLE_PMGR_RESET);
+
+ return 0;
+}
+
+static int apple_reset_deassert(struct reset_ctl *reset_ctl)
+{
+ struct apple_pmgr_priv *priv = dev_get_priv(reset_ctl->dev->parent);
+
+ regmap_update_bits(priv->regmap, priv->offset,
+ APPLE_PMGR_FLAGS | APPLE_PMGR_RESET, 0);
+ regmap_update_bits(priv->regmap, priv->offset,
+ APPLE_PMGR_FLAGS | APPLE_PMGR_DEV_DISABLE, 0);
+
+ return 0;
+}
+
+struct reset_ops apple_reset_ops = {
+ .of_xlate = apple_reset_of_xlate,
+ .request = apple_reset_request,
+ .rfree = apple_reset_free,
+ .rst_assert = apple_reset_assert,
+ .rst_deassert = apple_reset_deassert,
+};
+
+static struct driver apple_reset_driver = {
+ .name = "apple_reset",
+ .id = UCLASS_RESET,
+ .ops = _reset_ops,
+};
+
static int apple_pmgr_request(struct power_domain *power_domain)
{
return 0;
@@ -78,6 +145,7 @@ static const struct udevice_id apple_pmgr_ids[] = {
static int apple_pmgr_probe(struct udevice *dev)
{
struct apple_pmgr_priv *priv = dev_get_priv(dev);
+ struct udevice *child;
int ret;
ret = dev_power_domain_on(dev);
@@ -92,6 +160,9 @@ static int apple_pmgr_probe(struct udevice *dev)
if (ret < 0)
return ret;
+ device_bind(dev, _reset_driver, "apple_reset", NULL,
+ dev_ofnode(dev), );
+
return 0;
}
--
2.34.1
[PATCH 8/8] configs: apple: Add NVMe boot target
Add a boot target for NVMe such that we can boot from NVMe. Signed-off-by: Mark Kettenis --- include/configs/apple.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/apple.h b/include/configs/apple.h index 3e5fb495f1..47faad8150 100644 --- a/include/configs/apple.h +++ b/include/configs/apple.h @@ -13,6 +13,12 @@ "fdt_addr_r=0x96010\0" \ "kernel_addr_r=0x96020\0" +#if CONFIG_IS_ENABLED(CMD_NVME) + #define BOOT_TARGET_NVME(func) func(NVME, nvme, 0) +#else + #define BOOT_TARGET_NVME(func) +#endif + #if CONFIG_IS_ENABLED(CMD_USB) #define BOOT_TARGET_USB(func) func(USB, usb, 0) #else @@ -20,6 +26,7 @@ #endif #define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_NVME(func) \ BOOT_TARGET_USB(func) #include -- 2.34.1
[PATCH 5/8] nvme: Add shutdown function
Add a function to disable the NVMe controller. This will be used
to let the driver for the NVMe storage integrated on Apple SoCs
shutdown the NVMe controller such we can shutdown the NVMe
IOP controller in a clean way afterwards before handing control
to the OS.
Signed-off-by: Mark Kettenis
---
drivers/nvme/nvme.c | 7 +++
drivers/nvme/nvme.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index e2d0f9c668..3b1a5c718f 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -896,3 +896,10 @@ free_queue:
free_nvme:
return ret;
}
+
+int nvme_shutdown(struct udevice *udev)
+{
+ struct nvme_dev *ndev = dev_get_priv(udev);
+
+ return nvme_disable_ctrl(ndev);
+}
diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
index 57803b43fd..6e39af8831 100644
--- a/drivers/nvme/nvme.h
+++ b/drivers/nvme/nvme.h
@@ -670,5 +670,6 @@ struct nvme_ops {
};
int nvme_init(struct udevice *udev);
+int nvme_shutdown(struct udevice *udev);
#endif /* __DRIVER_NVME_H__ */
--
2.34.1
[PATCH 0/8] Apple M1 NVMe storage support
This adds support for the (rather quirky) NVMe storage controller integrated on Apple SoCs. This makes it possible to boot from the NVMe storage that is present on all the M1 machines that Apple has released so far. The series has been designed to have as little impact on the existing NVMe support as possible. It splits out the PCIe-specific bits in its own file/driver and adds a platform driver for the Apple controller. This platform driver handles all the quirkiness through driver ops. The existing logic is retained when the driver ops aren't set. I've tested this on a firefly-rk3399 board with: nvme0 at pci1 dev 0 function 0 "Silicon Motion SM2260 NVMe" rev 0x03: msix, NVMe 1.2 nvme0: ADATA SX8000NP, firmware C2.2.1, serial 2H1220011170 (for those not familliar with OpenBSD, that's an ADATA SX8000NP NVMe M.2 SSD with a Silicon Motion controller) This patch series depends on the Apple M1 power management controller support series: https://patchwork.ozlabs.org/project/uboot/list/?series=280359 Mark Kettenis (8): nvme: Split out PCI support mailbox: apple: Add driver for Apple IOP mailbox arm: apple: Add RTKit support nvme: Introduce driver ops nvme: Add shutdown function power: domain: apple: Add reset support nvme: apple: Add driver for Apple NVMe storage controller configs: apple: Add NVMe boot target arch/arm/Kconfig | 2 + arch/arm/include/asm/arch-apple/rtkit.h | 11 + arch/arm/mach-apple/Makefile | 1 + arch/arm/mach-apple/rtkit.c | 231 + configs/apple_m1_defconfig| 1 + configs/clearfog_gt_8k_defconfig | 2 +- configs/firefly-rk3399_defconfig | 2 +- configs/khadas-vim3_android_ab_defconfig | 2 +- configs/khadas-vim3_android_defconfig | 2 +- configs/khadas-vim3_defconfig | 2 +- configs/khadas-vim3l_android_ab_defconfig | 2 +- configs/khadas-vim3l_android_defconfig| 2 +- configs/khadas-vim3l_defconfig| 2 +- configs/kontron_sl28_defconfig| 2 +- configs/ls1012afrdm_qspi_defconfig| 2 +- configs/ls1012afrdm_tfa_defconfig | 2 +- .../ls1012afrwy_qspi_SECURE_BOOT_defconfig| 2 +- configs/ls1012afrwy_qspi_defconfig| 2 +- configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012afrwy_tfa_defconfig | 2 +- configs/ls1012aqds_qspi_defconfig | 2 +- configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012aqds_tfa_defconfig | 2 +- configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1012ardb_qspi_defconfig | 2 +- configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012ardb_tfa_defconfig | 2 +- configs/ls1021aiot_qspi_defconfig | 2 +- configs/ls1021aiot_sdcard_defconfig | 2 +- configs/ls1021aqds_ddr4_nor_defconfig | 2 +- configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 2 +- configs/ls1021aqds_nand_defconfig | 2 +- configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 2 +- configs/ls1021aqds_nor_defconfig | 2 +- configs/ls1021aqds_nor_lpuart_defconfig | 2 +- configs/ls1021aqds_qspi_defconfig | 2 +- configs/ls1021aqds_sdcard_ifc_defconfig | 2 +- configs/ls1021aqds_sdcard_qspi_defconfig | 2 +- configs/ls1021atsn_qspi_defconfig | 2 +- configs/ls1021atsn_sdcard_defconfig | 2 +- configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 2 +- configs/ls1021atwr_nor_defconfig | 2 +- configs/ls1021atwr_nor_lpuart_defconfig | 2 +- configs/ls1021atwr_qspi_defconfig | 2 +- configs/ls1021atwr_sdcard_ifc_defconfig | 2 +- configs/ls1021atwr_sdcard_qspi_defconfig | 2 +- configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1028aqds_tfa_defconfig | 2 +- configs/ls1028aqds_tfa_lpuart_defconfig | 2 +- configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1028ardb_tfa_defconfig | 2 +- configs/ls1043aqds_defconfig | 2 +- configs/ls1043aqds_lpuart_defconfig | 2 +- configs/ls1043aqds_nand_defconfig | 2 +- configs/ls1043aqds_nor_ddr3_defconfig | 2 +- configs/ls1043aqds_qspi_defconfig | 2 +- configs/ls1043aqds_sdcard_ifc_defconfig | 2 +- configs/ls1043aqds_sdcard_qspi_defconfig | 2 +- configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1043aqds_tfa_defconfig | 2 +- configs/ls1043ardb_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_defconfig | 2 +- configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_nand_defconfig | 2 +- configs/ls1043ardb_sdcard_defconfig |
Re: [PATCH] nvme: Do not allocate 8kB buffer on stack
Hello! Could you please review this patch?
On Thursday 09 December 2021 11:06:39 Pali Rohár wrote:
> Calling 'nvme scan' followed by 'nvme detail' crashes U-Boot on Turris
> Omnia with the following error:
>
> undefined instruction
> pc : [<0a00>] lr : [<7ff80bfc>]
> reloc pc : [<8a8c>]lr : [<00840bfc>]
> sp : 7fb2b908 ip : 002a fp : 0200
> r10: 0400 r9 : 7fb2fed0 r8 : e100
> r7 : 0c00 r6 : 0300 r5 : 0600 r4 : 0100
> r3 : 7fb30928 r2 : 7fb30928 r1 : r0 :
> Flags: nZCv IRQs off FIQs off Mode SVC_32
> Code: 0f0fb4f0 0f0fb4f0 0f0fb4f0 0f0fb4f0 (f0f04b0f)
> Resetting CPU ...
>
> This happens when nvme_print_info() tries to return to the caller. It
> looks like this error is caused by trying to allocate 8 KiB of memory
> on the stack by the two uses of ALLOC_CACHE_ALIGN_BUFFER().
>
> Use malloc_cache_aligned() to allocate this memory dynamically instead.
>
> This fixes 'nvme detail' on Turris Omnia.
>
> Note that similar change was applied to file drivers/nvme/nvme.c in past by
> commit 2f83481dff9c ("nvme: use page-aligned buffer for identify command").
>
> Signed-off-by: Pali Rohár
> Signed-off-by: Marek Behún
> ---
> drivers/nvme/nvme_show.c | 35 ++-
> 1 file changed, 26 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/nvme/nvme_show.c b/drivers/nvme/nvme_show.c
> index 15e459da1acd..72cbac82bcca 100644
> --- a/drivers/nvme/nvme_show.c
> +++ b/drivers/nvme/nvme_show.c
> @@ -106,24 +106,41 @@ int nvme_print_info(struct udevice *udev)
> {
> struct nvme_ns *ns = dev_get_priv(udev);
> struct nvme_dev *dev = ns->dev;
> - ALLOC_CACHE_ALIGN_BUFFER(char, buf_ns, sizeof(struct nvme_id_ns));
> - struct nvme_id_ns *id = (struct nvme_id_ns *)buf_ns;
> - ALLOC_CACHE_ALIGN_BUFFER(char, buf_ctrl, sizeof(struct nvme_id_ctrl));
> - struct nvme_id_ctrl *ctrl = (struct nvme_id_ctrl *)buf_ctrl;
> + struct nvme_id_ctrl *ctrl;
> + struct nvme_id_ns *id;
> + int ret = 0;
>
> - if (nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl))
> - return -EIO;
> + ctrl = memalign(dev->page_size, sizeof(struct nvme_id_ctrl));
> + if (!ctrl)
> + return -ENOMEM;
> +
> + if (nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl)) {
> + ret = -EIO;
> + goto free_ctrl;
> + }
>
> print_optional_admin_cmd(le16_to_cpu(ctrl->oacs), ns->devnum);
> print_optional_nvm_cmd(le16_to_cpu(ctrl->oncs), ns->devnum);
> print_format_nvme_attributes(ctrl->fna, ns->devnum);
>
> - if (nvme_identify(dev, ns->ns_id, 0, (dma_addr_t)(long)id))
> - return -EIO;
> + id = memalign(dev->page_size, sizeof(struct nvme_id_ns));
> + if (!id) {
> + ret = -ENOMEM;
> + goto free_ctrl;
> + }
> +
> + if (nvme_identify(dev, ns->ns_id, 0, (dma_addr_t)(long)id)) {
> + ret = -EIO;
> + goto free_id;
> + }
>
> print_formats(id, ns);
> print_data_protect_cap(id->dpc, ns->devnum);
> print_metadata_cap(id->mc, ns->devnum);
>
> - return 0;
> +free_id:
> + free(id);
> +free_ctrl:
> + free(ctrl);
> + return ret;
> }
> --
> 2.20.1
>
Re: [PATCH 1/1] disk: gpt: print all partitions
Hi Heinrich,
On Tue, Jan 11, 2022 at 3:48 PM Heinrich Schuchardt
wrote:
>
> For GPT partition tables the 'part list' command stops at the first invalid
> partition number. But Ubuntu has images with partitions number
>
> 1, 12, 13, 14, 15
>
> In this case only partition 1 was listed by 'part list'.
>
> Fixes: 38a3021edc54 ("disk: part_efi: remove indent level from loop")
> Reported-by: Alexandre Ghiti
> Signed-off-by: Heinrich Schuchardt
> ---
> disk/part_efi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/disk/part_efi.c b/disk/part_efi.c
> index 0ca7effc32..3809333078 100644
> --- a/disk/part_efi.c
> +++ b/disk/part_efi.c
> @@ -236,9 +236,9 @@ void part_print_efi(struct blk_desc *dev_desc)
> printf("\tPartition GUID\n");
>
> for (i = 0; i < le32_to_cpu(gpt_head->num_partition_entries); i++) {
> - /* Stop at the first non valid PTE */
> + /* Skip invalid PTE */
> if (!is_pte_valid(_pte[i]))
> - break;
> + continue;
>
> printf("%3d\t0x%08llx\t0x%08llx\t\"%s\"\n", (i + 1),
> le64_to_cpu(gpt_pte[i].starting_lba),
> --
> 2.33.1
>
This works great for me, you can add:
Tested-by: Alexandre Ghiti
Thanks!
Alex
binman generator nodes break over read-back
Hi Simon, something is fishy with generator nodes: We are playing with replacing fdts and configs in [1] with generator nodes, and that works so far - until we want to read-back the image: $ binman ls -i flash.bin binman: Node '/fit@0x28': Generator node requires 'of-list' entry argument Same for "binman extract". I suspect that the embedded fdtmap still contains the generator node, rather than the unrolled entries. Am I right? How to check and fix that? Jan [1] https://github.com/u-boot/u-boot/blob/master/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi -- Siemens AG, Technology Competence Center Embedded Linux
Re: [PATCH 0/3] mkimage: allow to specify signing algorithm
On 14.01.22 00:28, Dhananjay Phadke wrote: On 1/13/2022 4:38 AM, Jan Kiszka wrote: On 25.11.21 20:03, Jan Kiszka wrote: Another step to decouple the FIT image specification from the actual signing: With these changes, the signature nodes can leave out an algo property, mkimage will initialize that as well while signing. This way, in-tree FIT source files can be prepared for gaining signatures without defining the key type or size upfront, forcing users to patch the code to change that. [resend to the list] While encryption algo (rsa2048 vs rsa4096, etc) shouldn't need to be explicitly specified as you noted below, how does it help to add it to (already exhaustive) mkimage args? Parsing OID / length from keyfile would be real change. While rotating keys is common, how often algo is changed? The use case is decoupling of signature preparation from actual signing. Means, we would like to prepare binman image device trees for applying signature but without making the decision which key type and width should be used. That shall be up to the user (integrator) of the firmware image. This series will enable a patch like https://github.com/siemens/u-boot/commit/1215a357ec1f58acde56c8ca4085aa43f8fdbf5a and a signature workflow that does not require to patch the U-Boot source anymore. It still makes the decision of using hash algo SHA256, but that is acceptable. Jan -- Siemens AG, Technology Competence Center Embedded Linux
[resent][PATCH 2/3] mkimage: Drop unused OPT_STRING constant
From: Jan Kiszka
The actual opt string is inlined - and different. Seems this was a
left-over from older versions of 603e26f76346.
Signed-off-by: Jan Kiszka
---
tools/mkimage.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index fbe883ce36..a4844d0f18 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -146,7 +146,6 @@ static int add_content(int type, const char *fname)
return 0;
}
-#define OPT_STRING "a:A:b:B:c:C:d:D:e:Ef:Fk:i:K:ln:N:p:O:rR:qstT:vVx"
static void process_args(int argc, char **argv)
{
char *ptr;
--
2.31.1
[resent][PATCH 3/3] mkimage: Allow to specify the signature algorithm on the command line
From: Jan Kiszka
This permits to prepare FIT image description that do not hard-code the
final choice of the signature algorithm, possibly requiring the user to
patch the sources.
When -o is specified, this information is used in favor of the
'algo' property in the signature node. Furthermore, that property is set
accordingly when writing the image.
Signed-off-by: Jan Kiszka
---
doc/mkimage.1 | 5 +
include/image.h| 3 ++-
tools/fit_image.c | 3 ++-
tools/image-host.c | 48 +++---
tools/imagetool.h | 1 +
tools/mkimage.c| 5 -
6 files changed, 42 insertions(+), 23 deletions(-)
diff --git a/doc/mkimage.1 b/doc/mkimage.1
index fea5288784..0734bd36a1 100644
--- a/doc/mkimage.1
+++ b/doc/mkimage.1
@@ -155,6 +155,11 @@ the corresponding public key is written into this file for
for run-time
verification. Typically the file here is the device tree binary used by
CONFIG_OF_CONTROL in U-Boot.
+.TP
+.BI "\-o [" "signing algorithm" "]"
+Specifies the algorithm to be used for signing a FIT image. The default is
+taken from the target signature nodes 'algo' properties.
+
.TP
.BI "\-p [" "external position" "]"
Place external data at a static external position. See \-E. Instead of writing
diff --git a/include/image.h b/include/image.h
index 16ccc5b10f..4a7e9bc9a1 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1031,6 +1031,7 @@ int fit_cipher_data(const char *keydir, void *keydest,
void *fit,
* @require_keys: Mark all keys as 'required'
* @engine_id: Engine to use for signing
* @cmdname: Command name used when reporting errors
+ * @algo_name: Algorithm name, or NULL if to be read from FIT
*
* Adds hash values for all component images in the FIT blob.
* Hashes are calculated for all component images which have hash subnodes
@@ -1045,7 +1046,7 @@ int fit_cipher_data(const char *keydir, void *keydest,
void *fit,
int fit_add_verification_data(const char *keydir, const char *keyfile,
void *keydest, void *fit, const char *comment,
int require_keys, const char *engine_id,
- const char *cmdname);
+ const char *cmdname, const char *algo_name);
int fit_image_verify_with_data(const void *fit, int image_noffset,
const void *data, size_t size);
diff --git a/tools/fit_image.c b/tools/fit_image.c
index f4f372ba62..428ddcf881 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -73,7 +73,8 @@ static int fit_add_file_data(struct image_tool_params
*params, size_t size_inc,
params->comment,
params->require_keys,
params->engine_id,
- params->cmdname);
+ params->cmdname,
+ params->algo_name);
}
if (dest_blob) {
diff --git a/tools/image-host.c b/tools/image-host.c
index a027155f3c..d2e67a06aa 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -107,7 +107,7 @@ static int fit_image_process_hash(void *fit, const char
*image_name,
*/
static int fit_image_write_sig(void *fit, int noffset, uint8_t *value,
int value_len, const char *comment, const char *region_prop,
- int region_proplen, const char *cmdname)
+ int region_proplen, const char *cmdname, const char *algo_name)
{
int string_size;
int ret;
@@ -150,6 +150,8 @@ static int fit_image_write_sig(void *fit, int noffset,
uint8_t *value,
strdata, sizeof(strdata));
}
}
+ if (algo_name && !ret)
+ ret = fdt_setprop_string(fit, noffset, "algo", algo_name);
return ret;
}
@@ -157,17 +159,18 @@ static int fit_image_write_sig(void *fit, int noffset,
uint8_t *value,
static int fit_image_setup_sig(struct image_sign_info *info,
const char *keydir, const char *keyfile, void *fit,
const char *image_name, int noffset, const char *require_keys,
- const char *engine_id)
+ const char *engine_id, const char *algo_name)
{
const char *node_name;
- const char *algo_name;
const char *padding_name;
node_name = fit_get_name(fit, noffset, NULL);
- if (fit_image_hash_get_algo(fit, noffset, _name)) {
- printf("Can't get algo property for '%s' signature node in '%s'
image node\n",
- node_name, image_name);
- return -1;
+ if (!algo_name) {
+ if (fit_image_hash_get_algo(fit, noffset, _name)) {
+ printf("Can't get algo property for '%s' signature node
in '%s' image node\n",
+
[resent][PATCH 0/3] mkimage: allow to specify signing algorithm
[resent as requested by Simon] Another step to decouple the FIT image specification from the actual signing: With these changes, the signature nodes can leave out an algo property, mkimage will initialize that as well while signing. This way, in-tree FIT source files can be prepared for gaining signatures without defining the key type or size upfront, forcing users to patch the code to change that. Patch 1 is preparatory for this, patch 2 a drive-by cleanup. A better solution would actually be if the algorithm was derived from the provided key. But the underlying crypto layer seems to be rather unprepared for that. Jan Jan Kiszka (3): image-fit: Make string of algo parameter constant mkimage: Drop unused OPT_STRING constant mkimage: Allow to specify the signature algorithm on the command line boot/image-fit-sig.c | 2 +- boot/image-fit.c | 8 +++ doc/mkimage.1| 5 + include/image.h | 5 +++-- tools/fit_image.c| 3 ++- tools/image-host.c | 50 +--- tools/imagetool.h| 1 + tools/mkimage.c | 6 -- 8 files changed, 49 insertions(+), 31 deletions(-) -- 2.31.1
[resent][PATCH 1/3] image-fit: Make string of algo parameter constant
From: Jan Kiszka
Modifications would be invalid.
Signed-off-by: Jan Kiszka
---
boot/image-fit-sig.c | 2 +-
boot/image-fit.c | 8
include/image.h | 2 +-
tools/image-host.c | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/boot/image-fit-sig.c b/boot/image-fit-sig.c
index 63e5423c92..47d7633568 100644
--- a/boot/image-fit-sig.c
+++ b/boot/image-fit-sig.c
@@ -67,7 +67,7 @@ static int fit_image_setup_verify(struct image_sign_info
*info,
const void *fit, int noffset,
int required_keynode, char **err_msgp)
{
- char *algo_name;
+ const char *algo_name;
const char *padding_name;
if (fdt_totalsize(fit) > CONFIG_VAL(FIT_SIGNATURE_MAX_SIZE)) {
diff --git a/boot/image-fit.c b/boot/image-fit.c
index b629339f4e..d06a68c025 100644
--- a/boot/image-fit.c
+++ b/boot/image-fit.c
@@ -191,7 +191,7 @@ static void fit_image_print_data(const void *fit, int
noffset, const char *p,
const char *keyname;
uint8_t *value;
int value_len;
- char *algo;
+ const char *algo;
const char *padding;
bool required;
int ret, i;
@@ -1063,11 +1063,11 @@ int fit_image_get_data_and_size(const void *fit, int
noffset,
* 0, on success
* -1, on failure
*/
-int fit_image_hash_get_algo(const void *fit, int noffset, char **algo)
+int fit_image_hash_get_algo(const void *fit, int noffset, const char **algo)
{
int len;
- *algo = (char *)fdt_getprop(fit, noffset, FIT_ALGO_PROP, );
+ *algo = (const char *)fdt_getprop(fit, noffset, FIT_ALGO_PROP, );
if (*algo == NULL) {
fit_get_debug(fit, noffset, FIT_ALGO_PROP, len);
return -1;
@@ -1265,7 +1265,7 @@ static int fit_image_check_hash(const void *fit, int
noffset, const void *data,
{
uint8_t value[FIT_MAX_HASH_LEN];
int value_len;
- char *algo;
+ const char *algo;
uint8_t *fit_value;
int fit_value_len;
int ignore;
diff --git a/include/image.h b/include/image.h
index fd662e74b4..16ccc5b10f 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1011,7 +1011,7 @@ int fit_image_get_data_size_unciphered(const void *fit,
int noffset,
int fit_image_get_data_and_size(const void *fit, int noffset,
const void **data, size_t *size);
-int fit_image_hash_get_algo(const void *fit, int noffset, char **algo);
+int fit_image_hash_get_algo(const void *fit, int noffset, const char **algo);
int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value,
int *value_len);
diff --git a/tools/image-host.c b/tools/image-host.c
index a6b0a94420..a027155f3c 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -63,7 +63,7 @@ static int fit_image_process_hash(void *fit, const char
*image_name,
uint8_t value[FIT_MAX_HASH_LEN];
const char *node_name;
int value_len;
- char *algo;
+ const char *algo;
int ret;
node_name = fit_get_name(fit, noffset, NULL);
@@ -160,7 +160,7 @@ static int fit_image_setup_sig(struct image_sign_info *info,
const char *engine_id)
{
const char *node_name;
- char *algo_name;
+ const char *algo_name;
const char *padding_name;
node_name = fit_get_name(fit, noffset, NULL);
--
2.31.1
Re: [PATCH v2] introduce CONFIG_DEVICE_TREE_INCLUDES
Ping On 21/11/2021 14.52, Rasmus Villemoes wrote: > The build system already automatically looks for and includes an > in-tree *-u-boot.dtsi when building the control .dtb. However, there > are some things that are awkward to maintain in such an in-tree file, > most notably the metadata associated to public keys used for verified > boot. > > The only "official" API to get that metadata into the .dtb is via > mkimage, as a side effect of building an actual signed image. But > there are multiple problems with that. First of all, the final U-Boot > (be it U-Boot proper or an SPL) image is built based on a binary > image, the .dtb, and possibly some other binary artifacts. So > modifying the .dtb after the build requires the meta-buildsystem > (Yocto, buildroot, whatnot) to know about and repeat some of the steps > that are already known to and handled by U-Boot's build system, > resulting in needless duplication of code. It's also somewhat annoying > and inconsistent to have a .dtb file in the build folder which is not > generated by the command listed in the corresponding .cmd file (that > of course applies to any generated file). > > So the contents of the /signature node really needs to be baked into > the .dtb file when it is first created, which means providing the > relevant data in the form of a .dtsi file. One could in theory put > that data into the *-u-boot.dtsi file, but it's more convenient to be > able to provide it externally: For example, when developing for a > customer, it's common to use a set of dummy keys for development, > while the consultants do not (and should not) have access to the > actual keys used in production. For such a setup, it's easier if the > keys used are chosen via the meta-buildsystem and the path(s) patched > in during the configure step. And of course, nothing prevents anybody > from having DEVICE_TREE_INCLUDES point at files maintained in git, or > for that matter from including the public key metadata in the > *-u-boot.dtsi directly and ignore this feature. > > There are other uses for this, e.g. in combination with ENV_IMPORT_FDT > it can be used for providing the contents of the /config/environment > node, so I don't want to tie this exclusively to use for verified > boot. > > Reviewed-by: Simon Glass > Signed-off-by: Rasmus Villemoes > --- > v2: rebase to current master, add paragraph to > doc/develop/devicetree/control.rst as suggested by Simon. I've taken > the liberty of keeping his R-b tag as this mostly just repeats what is > in the Kconfig help text and commit message. > > doc/develop/devicetree/control.rst | 18 ++ > dts/Kconfig| 9 + > scripts/Makefile.lib | 3 +++ > 3 files changed, 30 insertions(+) > > diff --git a/doc/develop/devicetree/control.rst > b/doc/develop/devicetree/control.rst > index 0e6f85d5af..ff008ba943 100644 > --- a/doc/develop/devicetree/control.rst > +++ b/doc/develop/devicetree/control.rst > @@ -182,6 +182,24 @@ main file, in this order:: > Only one of these is selected but of course you can #include another one > within > that file, to create a hierarchy of shared files. > > + > +External .dtsi fragments > + > + > +Apart from describing the hardware present, U-Boot also uses its > +control dtb for various configuration purposes. For example, the > +public key(s) used for Verified Boot are embedded in a specific format > +in a /signature node. > + > +As mentioned above, the U-Boot build system automatically includes a > +*-u-boot.dtsi file, if found, containing U-Boot specific > +quirks. However, some data, such as the mentioned public keys, are not > +appropriate for upstream U-Boot but are better kept and maintained > +outside the U-Boot repository. You can use CONFIG_DEVICE_TREE_INCLUDES > +to specify a list of .dtsi files that will also be included when > +building .dtb files. > + > + > Relocation, SPL and TPL > --- > > diff --git a/dts/Kconfig b/dts/Kconfig > index b7c4a2fec0..1f8debf1a8 100644 > --- a/dts/Kconfig > +++ b/dts/Kconfig > @@ -131,6 +131,15 @@ config DEFAULT_DEVICE_TREE > It can be overridden from the command line: > $ make DEVICE_TREE= > > +config DEVICE_TREE_INCLUDES > + string "Extra .dtsi files to include when building DT control" > + depends on OF_CONTROL > + help > + U-Boot's control .dtb is usually built from an in-tree .dts > + file, plus (if available) an in-tree U-Boot-specific .dtsi > + file. This option specifies a space-separated list of extra > + .dtsi files that will also be used. > + > config OF_LIST > string "List of device tree files to include for DT control" > depends on SPL_LOAD_FIT || MULTI_DTB_FIT > diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib > index 39f03398ed..4ab422c231 100644 > --- a/scripts/Makefile.lib > +++ b/scripts/Makefile.lib > @@ -318,8 +318,11 @@ endif > quiet_cmd_dtc =
