[PATCH] efi_loader: Fix buffer underflow If the array index 'i' < 128, the 'codepage' array is accessed using [-128...-1] in efi_unicode_collation.c:262. This can lead to a buffer overflow. Negative i
Fixes: 0bc4b0da7b59 ("efi_loader: EFI_UNICODE_COLLATION_PROTOCOL")
Signed-off-by: Mikhail Ilin
---
lib/efi_loader/efi_unicode_collation.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_unicode_collation.c
b/lib/efi_loader/efi_unicode_collation.c
index c700be8756..282045b556 100644
--- a/lib/efi_loader/efi_unicode_collation.c
+++ b/lib/efi_loader/efi_unicode_collation.c
@@ -259,7 +259,7 @@ static void EFIAPI efi_fat_to_str(struct
efi_unicode_collation_protocol *this,
for (i = 0; i < fat_size; ++i) {
c = (unsigned char)fat[i];
if (c > 0x80)
- c = codepage[i - 0x80];
+ c = codepage[c - 0x80];
string[i] = c;
if (!c)
break;
--
2.17.1
Re: [PATCH] Subject: [patch]SPI: GD SPI: Add Gigadevice SPI NOR part numbers
Hi, On 11/21/22 23:11, Vlim wrote: Hi, Michal, Regarding the following item, drivers/mtd/spi/spi-nor-ids.c | 137 +++--- 3 files changed, 94 insertions(+), 45 deletions(-) diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..75014117f1 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y This is likely just appended and doesn't reflect Kconfig layout. Run make xilinx_zynqmp_mini_qspi_defconfig; make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig I have the following script for uboot compilation, should I add the following lines to my script? make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig up2you but symbol position should be correct when you add it based on current Kconfig layout. Thanks, Michal
RE: [PATCH] mtd: spi-nor-core: Invert logic to reflect sst26 flash unlocked
Hi Jan,
> -Original Message-
> From: Jan Kiszka
> Sent: Tuesday, November 22, 2022 12:05 PM
> To: Soma, Ashok Reddy ; u-
> b...@lists.denx.de
> Cc: ja...@amarulasolutions.com; vigne...@ti.com; Simek, Michal
> ; g...@xilinx.com; git (AMD-Xilinx)
> ; Algapally, Santosh Sagar
>
> Subject: Re: [PATCH] mtd: spi-nor-core: Invert logic to reflect sst26 flash
> unlocked
>
> On 22.11.22 06:18, Ashok Reddy Soma wrote:
> > From: Algapally Santosh Sagar
> >
> > flash_is_locked is changed to flash_is_unlocked with commit
> > 513c6071ce73
> > ("mtd: spi: Convert is_locked callback to is_unlocked").
> > sst26_is_locked() is also changed to sst26_is_unlocked() but the logic
> remained same.
> > Invert the logic for the flash lock/unlock to work properly.
> >
> > Signed-off-by: Algapally Santosh Sagar
> >
> > Signed-off-by: Ashok Reddy Soma
> > ---
> >
> > drivers/mtd/spi/spi-nor-core.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/spi/spi-nor-core.c
> > b/drivers/mtd/spi/spi-nor-core.c index 78de3c5281..1ea8363d9f 100644
> > --- a/drivers/mtd/spi/spi-nor-core.c
> > +++ b/drivers/mtd/spi/spi-nor-core.c
> > @@ -1600,7 +1600,7 @@ static int sst26_is_unlocked(struct spi_nor *nor,
> loff_t ofs, uint64_t len)
> > ofs -= ofs & (SZ_64K - 1);
> > len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len;
> >
> > - return sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK);
> > + return !sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK);
> > }
> >
> > static int sst_write_byteprogram(struct spi_nor *nor, loff_t to,
> > size_t len,
>
> Indeed...
>
> Reviewed-by: Jan Kiszka
>
> Hope you were also able to test this on real HW (which I wasn't).
Thanks for the review. Yes, we tested on ZynqMP platform.
Thanks,
Ashok
>
> Thanks,
> Jan
>
> --
> Siemens AG, Technology
> Competence Center Embedded Linux
<>
Re: [PATCH] mtd: spi-nor-core: Invert logic to reflect sst26 flash unlocked
On 22.11.22 06:18, Ashok Reddy Soma wrote:
> From: Algapally Santosh Sagar
>
> flash_is_locked is changed to flash_is_unlocked with commit 513c6071ce73
> ("mtd: spi: Convert is_locked callback to is_unlocked"). sst26_is_locked()
> is also changed to sst26_is_unlocked() but the logic remained same.
> Invert the logic for the flash lock/unlock to work properly.
>
> Signed-off-by: Algapally Santosh Sagar
> Signed-off-by: Ashok Reddy Soma
> ---
>
> drivers/mtd/spi/spi-nor-core.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index 78de3c5281..1ea8363d9f 100644
> --- a/drivers/mtd/spi/spi-nor-core.c
> +++ b/drivers/mtd/spi/spi-nor-core.c
> @@ -1600,7 +1600,7 @@ static int sst26_is_unlocked(struct spi_nor *nor,
> loff_t ofs, uint64_t len)
> ofs -= ofs & (SZ_64K - 1);
> len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len;
>
> - return sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK);
> + return !sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK);
> }
>
> static int sst_write_byteprogram(struct spi_nor *nor, loff_t to, size_t len,
Indeed...
Reviewed-by: Jan Kiszka
Hope you were also able to test this on real HW (which I wasn't).
Thanks,
Jan
--
Siemens AG, Technology
Competence Center Embedded Linux
Re: [PATCH] mtd: spi-nor-core: Invert logic to reflect sst26 flash unlocked
These changes make sense to me,
On 22/11/22 10:48, Ashok Reddy Soma wrote:
From: Algapally Santosh Sagar
flash_is_locked is changed to flash_is_unlocked with commit 513c6071ce73
("mtd: spi: Convert is_locked callback to is_unlocked"). sst26_is_locked()
is also changed to sst26_is_unlocked() but the logic remained same.
Invert the logic for the flash lock/unlock to work properly.
Signed-off-by: Algapally Santosh Sagar
Signed-off-by: Ashok Reddy Soma
---
Reviewed-by: Dhruva Gole
drivers/mtd/spi/spi-nor-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 78de3c5281..1ea8363d9f 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -1600,7 +1600,7 @@ static int sst26_is_unlocked(struct spi_nor *nor, loff_t
ofs, uint64_t len)
ofs -= ofs & (SZ_64K - 1);
len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len;
- return sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK);
+ return !sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK);
}
static int sst_write_byteprogram(struct spi_nor *nor, loff_t to, size_t len,
--
Thanks and Regards,
Dhruva Gole
[PATCH] mtd: spi-nor-core: Invert logic to reflect sst26 flash unlocked
From: Algapally Santosh Sagar
flash_is_locked is changed to flash_is_unlocked with commit 513c6071ce73
("mtd: spi: Convert is_locked callback to is_unlocked"). sst26_is_locked()
is also changed to sst26_is_unlocked() but the logic remained same.
Invert the logic for the flash lock/unlock to work properly.
Signed-off-by: Algapally Santosh Sagar
Signed-off-by: Ashok Reddy Soma
---
drivers/mtd/spi/spi-nor-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 78de3c5281..1ea8363d9f 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -1600,7 +1600,7 @@ static int sst26_is_unlocked(struct spi_nor *nor, loff_t
ofs, uint64_t len)
ofs -= ofs & (SZ_64K - 1);
len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len;
- return sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK);
+ return !sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK);
}
static int sst_write_byteprogram(struct spi_nor *nor, loff_t to, size_t len,
--
2.17.1
Re: [PATCH] SPI: GD SPI, enable GIGADEVICE in the config file
Hi Victor, One small suggestion, kindly follow the linux kernel guidelines on sending emails, > It’s also strongly recommended that you use plain text in your email body, for patches and other emails alike. https://useplaintext.email may be useful for information on how to configure your preferred email client, as well as listing recommended email clients should you not already have a preference source: https://www.kernel.org/doc/html/latest/process/email-clients.html On 22/11/22 03:30, Vlim wrote: Hi, Michal, With this patch, I have only changed the defconfig files. Please see if this is ok. Regards, Victor From: Victor Lim Sent: Monday, November 21, 2022 13:58 To: u-boot@lists.denx.de ; michal.si...@xilinx.com ; vikhyat.go...@amd.com ; ashok.reddy.s...@amd.com ; Vlim Subject: [PATCH] SPI: GD SPI, enable GIGADEVICE in the config file Also, it is my opinion that "xilinx: zynqmp: enable GIGADEVICE in the config file" would be a better suited title in this case. 此为外部邮件，谨防钓鱼邮件，请注意邮件是否涉及敏感信息 This does not seem to be plaintext, kindly remove these lines. This is an external email, beware of phishing emails. Please pay close attention to whether the email contains sensitive information This also should be removed as far as possible while sending to public mailing lists. [...] -- Thanks and Regards, Dhruva Gole
Re: [PATCH 05/12] clk: clk-k3: Add support for J784S4 SoC
On 11/19/22 13:59, Hari Nagalla wrote:
Add support for J784S4 SoC.
Signed-off-by: Hari Nagalla
Signed-off-by: Apurva Nandan
---
drivers/clk/ti/clk-k3.c | 6 ++
include/k3-clk.h| 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/clk/ti/clk-k3.c b/drivers/clk/ti/clk-k3.c
index 0dd65934b3..17e5b757f0 100644
--- a/drivers/clk/ti/clk-k3.c
+++ b/drivers/clk/ti/clk-k3.c
@@ -79,6 +79,12 @@ static const struct soc_attr ti_k3_soc_clk_data[] = {
.family = "AM62X",
.data = _clk_platdata,
},
+#endif
+#ifdef CONFIG_SOC_K3_J784S4
+ {
+ .family = "J784S4",
+ .data = _clk_platdata,
Please move the definition of this member from patch 3 to this patch. It
makes it easier to review.
--Sean
+ },
#endif
{ /* sentinel */ }
};
diff --git a/include/k3-clk.h b/include/k3-clk.h
index 371f077c44..42a0f25652 100644
--- a/include/k3-clk.h
+++ b/include/k3-clk.h
@@ -175,6 +175,7 @@ extern const struct ti_k3_clk_platdata j721e_clk_platdata;
extern const struct ti_k3_clk_platdata j7200_clk_platdata;
extern const struct ti_k3_clk_platdata j721s2_clk_platdata;
extern const struct ti_k3_clk_platdata am62x_clk_platdata;
+extern const struct ti_k3_clk_platdata j784s4_clk_platdata;
struct clk *clk_register_ti_pll(const char *name, const char *parent_name,
void __iomem *reg);
[PATCH] arm: socfpga: n5x: Remove invalid configuration for N5X
From: Tien Fong Chee These configurations no longer valid for N5X, remove them. Signed-off-by: Tien Fong Chee Signed-off-by: Jit Loon Lim --- arch/arm/mach-socfpga/Kconfig | 1 - arch/arm/mach-socfpga/Makefile | 11 +++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index df44530e83..4e366e5413 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -97,7 +97,6 @@ config TARGET_SOCFPGA_N5X select ARMV8_SET_SMPEN select BINMAN if SPL_ATF select CLK - select FPGA_INTEL_SDM_MAILBOX select NCORE_CACHE select SPL_ALTERA_SDRAM select SPL_CLK if SPL diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index ec38b64dd4..58a486f6de 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -64,11 +64,22 @@ obj-y += misc_soc64.o obj-y += mmu-arm64_s10.o obj-y += reset_manager_s10.o obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += secure_vab.o +obj-y += smmu_s10.o obj-y += system_manager_soc64.o obj-y += timer_s10.o obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += vab.o obj-y += wrap_handoff_soc64.o obj-y += wrap_pll_config_soc64.o +ifndef CONFIG_SPL_BUILD +obj-y += rsu.o +obj-y += rsu_ll_qspi.o +obj-y += rsu_misc.o +obj-y += rsu_s10.o +obj-$(CONFIG_ARMV8_PSCI) += psci.o +obj-$(CONFIG_ARMV8_PSCI) += smc_ecc_dbe_s10.o +obj-$(CONFIG_ARMV8_PSCI) += smc_registers_s10.o +obj-$(CONFIG_ARMV8_PSCI) += smc_rsu_s10.o +endif endif ifdef CONFIG_SPL_BUILD -- 2.26.2
[PATCH] ddr: altera: n5x: Enhance driver to support LPDDR4
From: Tien Fong Chee
Enhance driver to common DDR driver for supporting both DDR4 and LPDDR4.
Signed-off-by: Tien Fong Chee
Signed-off-by: Jit Loon Lim
---
arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi
b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi
index 502da36bd8..6c1d25fa05 100644
--- a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi
@@ -15,7 +15,11 @@
memory {
/*
+<<< HEAD
* Memory type: DDR4 (non-interleaving mode)
+===
+* Memory type: DDR4
+>>> ddr: altera: n5x: Enhance driver to support LPDDR4
* 16GB
* <0 0x 0 0x8000>,
* <4 0x8000 3 0x8000>;
--
2.26.2
[PATCH] ddr: altera: n5x: Remove all codes used for emulation
From: Tien Fong Chee
Remove all DDR4 codes used for emulation in preparation to run on
n5x device.
Signed-off-by: Tien Fong Chee
Signed-off-by: Jit Loon Lim
---
drivers/ddr/altera/sdram_n5x.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c
index 8dba6bb035..5a20a8d78d 100644
--- a/drivers/ddr/altera/sdram_n5x.c
+++ b/drivers/ddr/altera/sdram_n5x.c
@@ -322,13 +322,6 @@ enum region_size {
ONE_SIXTY_FOURTH
};
-enum ddr_type {
- DDRTYPE_LPDDR4_0,
- DDRTYPE_LPDDR4_1,
- DDRTYPE_DDR4,
- DDRTYPE_UNKNOWN
-};
-
/* Reset type */
enum reset_type {
POR_RESET,
--
2.26.2
[PATCH] ddr: altera: n5x: Restructure DDR driver in preparation to support LPDDR4
From: Tien Fong Chee
Restructure DDR driver so that driver has the ability to recognize the
DDR type by populating DDR handoff from bitstream. This is also in
preparation to improve driver for supporting additional LPDDR4.
Signed-off-by: Tien Fong Chee
Signed-off-by: Jit Loon Lim
---
drivers/ddr/altera/sdram_n5x.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c
index 737a4e2ff1..8dba6bb035 100644
--- a/drivers/ddr/altera/sdram_n5x.c
+++ b/drivers/ddr/altera/sdram_n5x.c
@@ -336,6 +336,13 @@ enum reset_type {
COLD_RESET
};
+enum ddr_type {
+ DDRTYPE_LPDDR4_0,
+ DDRTYPE_LPDDR4_1,
+ DDRTYPE_DDR4,
+ DDRTYPE_UNKNOWN
+};
+
/* DDR handoff structure */
struct ddr_handoff {
/* Memory reset manager base */
--
2.26.2
Re: [PATCH] SPI: GD SPI: added Gigadevice part #s in the ids.c file
On Mon, Nov 21, 2022 at 9:04 PM Victor Lim wrote:
>
> Updated the ids.c file with Gigadevice SPI NOR part #s.
What exactly was updated? Please describe it here.
> Signed-Off-by: Victor Lim
> ---
> drivers/mtd/spi/spi-nor-ids.c | 137 +++---
> 1 file changed, 92 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index 74e93d6209..662628b739 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -87,51 +87,98 @@ const struct flash_info spi_nor_ids[] = {
> { INFO("en25s64",0x1c3817, 0, 64 * 1024, 128, SECT_4K) },
> #endif
> #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
> - /* GigaDevice */
> - {
> - INFO("gd25q16", 0xc84015, 0, 64 * 1024, 32,
> - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> - },
> - {
> - INFO("gd25q32", 0xc84016, 0, 64 * 1024, 64,
> - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> - },
> - {
> - INFO("gd25lq32", 0xc86016, 0, 64 * 1024, 64,
> - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> - },
> - {
> - INFO("gd25q64", 0xc84017, 0, 64 * 1024, 128,
> - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> - },
> - {
> - INFO("gd25lq64c", 0xc86017, 0, 64 * 1024, 128,
> - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> - },
> - {
> - INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
> - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> - },
> - {
> - INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
> - SECT_4K | SPI_NOR_DUAL_READ |
> - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> - },
> - {
> - INFO("gd25lq256d", 0xc86019, 0, 64 * 1024, 512,
> - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> - },
> - {
> - INFO("gd25lx256e", 0xc86819, 0, 64 * 1024, 512,
> -SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)
> - },
> +/* GigaDevice - GD25Q or B series */
> + {INFO("gd25q16", 0xc84015, 0, 64 * 1024, 32, SECT_4K |
> + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
> SPI_NOR_HAS_TB)},
> + {INFO("gd25q32", 0xc84016, 0, 64 * 1024, 64, SECT_4K |
You are changing the format here, which makes it hard to review.
Re: [PATCH 37/38] post: Migrate to Kconfig
Hi Tom, On Mon, 21 Nov 2022 at 15:57, Tom Rini wrote: > > On Mon, Nov 21, 2022 at 03:51:10PM -0700, Simon Glass wrote: > > On Sat, 19 Nov 2022 at 16:53, Tom Rini wrote: > > > > > > We move the existing CONFIG_POST_* functionality over to CFG_POST and > > > then introduce CONFIG_POST to Kconfig. > > > > > > Signed-off-by: Tom Rini > > > --- > > > arch/powerpc/cpu/mpc85xx/cpu.c| 2 +- > > > configs/P2041RDB_NAND_defconfig | 1 + > > > configs/P2041RDB_SDCARD_defconfig | 1 + > > > configs/P2041RDB_SPIFLASH_defconfig | 1 + > > > configs/P2041RDB_defconfig| 1 + > > > configs/kmcent2_defconfig | 1 + > > > configs/kmcoge5ne_defconfig | 1 + > > > configs/pg_wcom_expu1_defconfig | 1 + > > > configs/pg_wcom_expu1_update_defconfig| 1 + > > > configs/pg_wcom_seli8_defconfig | 1 + > > > configs/pg_wcom_seli8_update_defconfig| 1 + > > > doc/README.POST | 6 +- > > > doc/README.fsl-ddr| 2 +- > > > drivers/serial/serial-uclass.c| 2 +- > > > drivers/serial/serial.c | 2 +- > > > include/configs/P2041RDB.h| 2 +- > > > include/configs/km/pg-wcom-ls102xa.h | 4 +- > > > include/configs/kmcent2.h | 2 +- > > > include/configs/kmcoge5ne.h | 4 +- > > > include/post.h| 4 +- > > > include/serial.h | 4 +- > > > post/cpu/mpc83xx/ecc.c| 2 +- > > > post/drivers/flash.c | 2 +- > > > post/drivers/i2c.c| 4 +- > > > post/drivers/memory.c | 4 +- > > > post/drivers/rtc.c| 4 +- > > > post/lib_powerpc/andi.c | 2 +- > > > post/lib_powerpc/asm.S| 2 +- > > > post/lib_powerpc/b.c | 2 +- > > > post/lib_powerpc/cmp.c| 2 +- > > > post/lib_powerpc/cmpi.c | 2 +- > > > post/lib_powerpc/complex.c| 2 +- > > > post/lib_powerpc/cpu.c| 4 +- > > > post/lib_powerpc/cr.c | 2 +- > > > post/lib_powerpc/fpu/20001122-1.c | 4 +- > > > post/lib_powerpc/fpu/20010114-2.c | 4 +- > > > post/lib_powerpc/fpu/20010226-1.c | 4 +- > > > post/lib_powerpc/fpu/980619-1.c | 4 +- > > > post/lib_powerpc/fpu/acc1.c | 4 +- > > > post/lib_powerpc/fpu/compare-fp-1.c | 4 +- > > > post/lib_powerpc/fpu/fpu.c| 4 +- > > > post/lib_powerpc/fpu/mul-subnormal-single-1.c | 4 +- > > > post/lib_powerpc/load.c | 2 +- > > > post/lib_powerpc/multi.c | 2 +- > > > post/lib_powerpc/rlwimi.c | 2 +- > > > post/lib_powerpc/rlwinm.c | 2 +- > > > post/lib_powerpc/rlwnm.c | 2 +- > > > post/lib_powerpc/srawi.c | 2 +- > > > post/lib_powerpc/store.c | 2 +- > > > post/lib_powerpc/string.c | 2 +- > > > post/lib_powerpc/three.c | 2 +- > > > post/lib_powerpc/threei.c | 2 +- > > > post/lib_powerpc/threex.c | 2 +- > > > post/lib_powerpc/two.c| 2 +- > > > post/lib_powerpc/twox.c | 2 +- > > > post/post.c | 4 +- > > > post/tests.c | 68 +-- > > > test/Kconfig | 5 ++ > > > 58 files changed, 114 insertions(+), 99 deletions(-) > > > > > > > Reviewed-by: Simon Glass > > > > but please see below > > > > > diff --git a/test/Kconfig b/test/Kconfig > > > index a6b463e4d06c..9f4641ae6bc5 100644 > > > --- a/test/Kconfig > > > +++ b/test/Kconfig > > > @@ -1,3 +1,8 @@ > > > +config POST > > > + bool "Power On Self Test support" > > > + help > > > + See doc/README.POST for more details > > > > Shouldn't this be in post/Kconfig ? > > It's non-trivial enough content that it really should be migrated to > doc/post/ and then expanded upon a bit further. > > > We use test/ for unit / functional tests. > > Yes, but post pre-dates all of that, keep in mind. It's also still in > active use (enabled on some semi-recent layerscape platforms for > example). This is an area that could use some attention and renovation, > yes, but the whole point of this and the huge follow-up are to get the > migrate to Kconfig part done already. OK, good to get all this over the line!! Regards, Simon
[PATCH] SPI: GD SPI: added Gigadevice part #s in the ids.c file
Updated the ids.c file with Gigadevice SPI NOR part #s.
Signed-Off-by: Victor Lim
---
drivers/mtd/spi/spi-nor-ids.c | 137 +++---
1 file changed, 92 insertions(+), 45 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 74e93d6209..662628b739 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -87,51 +87,98 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("en25s64",0x1c3817, 0, 64 * 1024, 128, SECT_4K) },
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- /* GigaDevice */
- {
- INFO("gd25q16", 0xc84015, 0, 64 * 1024, 32,
- SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- },
- {
- INFO("gd25q32", 0xc84016, 0, 64 * 1024, 64,
- SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- },
- {
- INFO("gd25lq32", 0xc86016, 0, 64 * 1024, 64,
- SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- },
- {
- INFO("gd25q64", 0xc84017, 0, 64 * 1024, 128,
- SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- },
- {
- INFO("gd25lq64c", 0xc86017, 0, 64 * 1024, 128,
- SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- },
- {
- INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
- SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- },
- {
- INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
- SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- },
- {
- INFO("gd25lq256d", 0xc86019, 0, 64 * 1024, 512,
- SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- },
- {
- INFO("gd25lx256e", 0xc86819, 0, 64 * 1024, 512,
-SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)
- },
+/* GigaDevice - GD25Q or B series */
+ {INFO("gd25q16", 0xc84015, 0, 64 * 1024, 32, SECT_4K |
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_HAS_TB)},
+ {INFO("gd25q32", 0xc84016, 0, 64 * 1024, 64, SECT_4K |
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_HAS_TB)},
+ {INFO("gd25q64", 0xc84017, 0, 64 * 1024, 128, SECT_4K |
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_HAS_TB)},
+ {INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256, SECT_4K |
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_HAS_TB)},
+ {INFO("gd25b series 256Mbit", 0xc84019, 0, 64 * 1024, 512, SECT_4K
|
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_4B_OPCODES) },
+ {INFO("gd25b series 512Mbit", 0xc8471A, 0, 64 * 1024, 1024, SECT_4K
|
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55b series 1Gbit", 0xc8471B, 0, 64 * 1024, 2048, SECT_4K
|
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55b series 2Gbit", 0xc8471C, 0, 64 * 1024, 4096, SECT_4K
|
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+/* GigaDevice - GD25F series */
+ {INFO("gd25f series 64Mbit", 0xc84317, 0, 64 * 1024, 128, SECT_4K
|
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)},
+ {INFO("gd25f series 128Mbit", 0xc84318, 0, 64 * 1024, 256, SECT_4K
|
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)},
+ {INFO("gd25f series 256Mbit", 0xc84319, 0, 64 * 1024, 512, SECT_4K
|
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_4B_OPCODES)},
+ {INFO("gd55f series 512Mbit", 0xc8431A, 0, 64 * 1024, 1024, SECT_4K
|
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_4B_OPCODES)},
+/* GigaDevice - GD25T series */
+ {INFO("gd25t series 512Mbit", 0xc8461A, 0, 64 * 1024, 1024, SECT_4K
|
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55t series 1Gbit", 0xc8461B, 0, 64 * 1024, 2048, SECT_4K
|
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55t02ge", 0xc8461C, 0, 64 * 1024, 4096, SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+/* GigaDevice - GD25X series */
+ {INFO("gd25x series
Re: [PATCH] Subject: [patch]SPI: GD SPI: Add Gigadevice SPI NOR part numbers
Hi, Michal, Regarding the following item, > drivers/mtd/spi/spi-nor-ids.c | 137 +++--- > 3 files changed, 94 insertions(+), 45 deletions(-) > > diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig > b/configs/xilinx_zynqmp_mini_qspi_defconfig > index c6401c2a54..75014117f1 100644 > --- a/configs/xilinx_zynqmp_mini_qspi_defconfig > +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig > @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y > CONFIG_PANIC_HANG=y > # CONFIG_GZIP is not set > # CONFIG_LMB is not set > +CONFIG_SPI_FLASH_GIGADEVICE=y This is likely just appended and doesn't reflect Kconfig layout. Run make xilinx_zynqmp_mini_qspi_defconfig; make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig I have the following script for uboot compilation, should I add the following lines to my script? make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig This is my script, source /tools/Xilinx/Vivado/2022.2/settings64.sh export CROSS_COMPILE=aarch64-linux-gnu- export ARCH=aarch64 make distclean make xilinx_zynqmp_mini_qspi_defconfig make -j8 DEVICE_TREE=zynqmp-mini-qspi-single cp u-boot.elf zynqmp_qspi_x4_single.bin Regards, Victor From: Michal Simek Sent: Monday, November 21, 2022 02:34 To: Victor lim ; u-boot@lists.denx.de ; michal.si...@xilinx.com ; ja...@amarulasolutions.com ; vigne...@ti.com Cc: vikhyat.go...@amd.com ; ashok.reddy.s...@amd.com ; Vlim Subject: Re: [PATCH] Subject: [patch]SPI: GD SPI: Add Gigadevice SPI NOR part numbers [You don't often get email from michal.si...@amd.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ] 此为外部邮件，谨防钓鱼邮件，请注意邮件是否涉及敏感信息 This is an external email, beware of phishing emails. Please pay close attention to whether the email contains sensitive information On 11/17/22 01:56, Victor lim wrote: > added gigadevice in the defconfig file and ID in the ids.c file > > Signed-off-by: Victor Lim > --- > configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + > configs/zynq_cse_qspi_defconfig | 1 + This should be done in separate patch. > drivers/mtd/spi/spi-nor-ids.c | 137 +++--- > 3 files changed, 94 insertions(+), 45 deletions(-) > > diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig > b/configs/xilinx_zynqmp_mini_qspi_defconfig > index c6401c2a54..75014117f1 100644 > --- a/configs/xilinx_zynqmp_mini_qspi_defconfig > +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig > @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y > CONFIG_PANIC_HANG=y > # CONFIG_GZIP is not set > # CONFIG_LMB is not set > +CONFIG_SPI_FLASH_GIGADEVICE=y This is likely just appended and doesn't reflect Kconfig layout. Run make xilinx_zynqmp_mini_qspi_defconfig; make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig > diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig > index 60f0d7cac4..cd245906ab 100644 > --- a/configs/zynq_cse_qspi_defconfig > +++ b/configs/zynq_cse_qspi_defconfig > @@ -76,3 +76,4 @@ CONFIG_ARM_DCC=y > CONFIG_ZYNQ_QSPI=y > # CONFIG_GZIP is not set > # CONFIG_LMB is not set > +CONFIG_SPI_FLASH_GIGADEVICE=y ditto. I am also fine with enabling these memories for zynqmp_virt/zynq_virt and versal_virt and versal_net_virt platforms. Hard to guess what you have changed below. But if you want to change style it is one patch. If you want to add new devices it is another patch. Thanks, Michal
Re: [PATCH] SPI: GD SPI, enable GIGADEVICE in the config file
Hi, Michal, With this patch, I have only changed the defconfig files. Please see if this is ok. Regards, Victor From: Victor Lim Sent: Monday, November 21, 2022 13:58 To: u-boot@lists.denx.de ; michal.si...@xilinx.com ; vikhyat.go...@amd.com ; ashok.reddy.s...@amd.com ; Vlim Subject: [PATCH] SPI: GD SPI, enable GIGADEVICE in the config file 此为外部邮件，谨防钓鱼邮件，请注意邮件是否涉及敏感信息 This is an external email, beware of phishing emails. Please pay close attention to whether the email contains sensitive information Added GIGADEVICE=y in the defconfig files Signed-off-by: Victor Lim --- configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..75014117f1 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 60f0d7cac4..cd245906ab 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -76,3 +76,4 @@ CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y -- 2.25.1
[PATCH] SPI: GD SPI, enable GIGADEVICE in the config file
Added GIGADEVICE=y in the defconfig files Signed-off-by: Victor Lim --- configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..75014117f1 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 60f0d7cac4..cd245906ab 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -76,3 +76,4 @@ CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y -- 2.25.1
Re: [PATCH 37/38] post: Migrate to Kconfig
On Mon, Nov 21, 2022 at 03:51:10PM -0700, Simon Glass wrote: > On Sat, 19 Nov 2022 at 16:53, Tom Rini wrote: > > > > We move the existing CONFIG_POST_* functionality over to CFG_POST and > > then introduce CONFIG_POST to Kconfig. > > > > Signed-off-by: Tom Rini > > --- > > arch/powerpc/cpu/mpc85xx/cpu.c| 2 +- > > configs/P2041RDB_NAND_defconfig | 1 + > > configs/P2041RDB_SDCARD_defconfig | 1 + > > configs/P2041RDB_SPIFLASH_defconfig | 1 + > > configs/P2041RDB_defconfig| 1 + > > configs/kmcent2_defconfig | 1 + > > configs/kmcoge5ne_defconfig | 1 + > > configs/pg_wcom_expu1_defconfig | 1 + > > configs/pg_wcom_expu1_update_defconfig| 1 + > > configs/pg_wcom_seli8_defconfig | 1 + > > configs/pg_wcom_seli8_update_defconfig| 1 + > > doc/README.POST | 6 +- > > doc/README.fsl-ddr| 2 +- > > drivers/serial/serial-uclass.c| 2 +- > > drivers/serial/serial.c | 2 +- > > include/configs/P2041RDB.h| 2 +- > > include/configs/km/pg-wcom-ls102xa.h | 4 +- > > include/configs/kmcent2.h | 2 +- > > include/configs/kmcoge5ne.h | 4 +- > > include/post.h| 4 +- > > include/serial.h | 4 +- > > post/cpu/mpc83xx/ecc.c| 2 +- > > post/drivers/flash.c | 2 +- > > post/drivers/i2c.c| 4 +- > > post/drivers/memory.c | 4 +- > > post/drivers/rtc.c| 4 +- > > post/lib_powerpc/andi.c | 2 +- > > post/lib_powerpc/asm.S| 2 +- > > post/lib_powerpc/b.c | 2 +- > > post/lib_powerpc/cmp.c| 2 +- > > post/lib_powerpc/cmpi.c | 2 +- > > post/lib_powerpc/complex.c| 2 +- > > post/lib_powerpc/cpu.c| 4 +- > > post/lib_powerpc/cr.c | 2 +- > > post/lib_powerpc/fpu/20001122-1.c | 4 +- > > post/lib_powerpc/fpu/20010114-2.c | 4 +- > > post/lib_powerpc/fpu/20010226-1.c | 4 +- > > post/lib_powerpc/fpu/980619-1.c | 4 +- > > post/lib_powerpc/fpu/acc1.c | 4 +- > > post/lib_powerpc/fpu/compare-fp-1.c | 4 +- > > post/lib_powerpc/fpu/fpu.c| 4 +- > > post/lib_powerpc/fpu/mul-subnormal-single-1.c | 4 +- > > post/lib_powerpc/load.c | 2 +- > > post/lib_powerpc/multi.c | 2 +- > > post/lib_powerpc/rlwimi.c | 2 +- > > post/lib_powerpc/rlwinm.c | 2 +- > > post/lib_powerpc/rlwnm.c | 2 +- > > post/lib_powerpc/srawi.c | 2 +- > > post/lib_powerpc/store.c | 2 +- > > post/lib_powerpc/string.c | 2 +- > > post/lib_powerpc/three.c | 2 +- > > post/lib_powerpc/threei.c | 2 +- > > post/lib_powerpc/threex.c | 2 +- > > post/lib_powerpc/two.c| 2 +- > > post/lib_powerpc/twox.c | 2 +- > > post/post.c | 4 +- > > post/tests.c | 68 +-- > > test/Kconfig | 5 ++ > > 58 files changed, 114 insertions(+), 99 deletions(-) > > > > Reviewed-by: Simon Glass > > but please see below > > > diff --git a/test/Kconfig b/test/Kconfig > > index a6b463e4d06c..9f4641ae6bc5 100644 > > --- a/test/Kconfig > > +++ b/test/Kconfig > > @@ -1,3 +1,8 @@ > > +config POST > > + bool "Power On Self Test support" > > + help > > + See doc/README.POST for more details > > Shouldn't this be in post/Kconfig ? It's non-trivial enough content that it really should be migrated to doc/post/ and then expanded upon a bit further. > We use test/ for unit / functional tests. Yes, but post pre-dates all of that, keep in mind. It's also still in active use (enabled on some semi-recent layerscape platforms for example). This is an area that could use some attention and renovation, yes, but the whole point of this and the huge follow-up are to get the migrate to Kconfig part done already. -- Tom signature.asc Description: PGP signature
Re: [000/241] Finish migration to Kconfig or CFG namespace
On Mon, Nov 21, 2022 at 03:51:06PM -0700, Simon Glass wrote: > Hi Tom, > > On Sun, 20 Nov 2022 at 06:34, Tom Rini wrote: > > > > Hey all, > > > > The intention of this series isn't to apply it just yet. This was a very > > quick scripted migration and so there's cases where we do more than one > > symbol, or we can see there's define but unused symbols. But it also > > shows that with the last few series I've posted, we're nearly done. With > > this series applied, everything builds still, and the resulting binaries > > seem to be the same (I'm doing a build where I keep before/after so I > > can check checksums now). > > It's great to see this? When will it be applied? Perhaps when -next opens up? Everything leading up to this will go in to -next. I have a handful of notes already on symbols that should get migrated to Kconfig or removed outright after skimming this series, and making that be real is the next step. Then re-running the scripted everything-else series and applying. -- Tom signature.asc Description: PGP signature
Re: [PATCH 36/38] sandbox: Rework how SDL is enabled / disabled
On Sat, 19 Nov 2022 at 16:46, Tom Rini wrote: > > Given that we can use Kconfig logic directly to see if we have a program > available on the host or not, change from passing NO_SDL to instead > controlling CONFIG_SANDBOX_SDL in Kconfig directly. Introduce > CONFIG_HOST_HAS_SDL as the way to test for sdl2-config and default > CONFIG_SANDBOX_SDL on if we have that, or not. > > Cc: Simon Glass > Signed-off-by: Tom Rini > --- > .azure-pipelines.yml | 4 ++-- > arch/sandbox/Kconfig | 7 +++ > arch/sandbox/config.mk | 4 +--- > doc/arch/sandbox/sandbox.rst | 9 +++-- > doc/build/tools.rst | 2 +- > drivers/video/Kconfig| 2 +- > include/configs/sandbox.h| 4 > 7 files changed, 15 insertions(+), 17 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH 16/38] sandbox: Move CONFIG_IO_TRACE to Kconfig
On Sat, 19 Nov 2022 at 16:45, Tom Rini wrote: > > This is only used on sandbox, so select it there. > > Cc: Simon Glass > Signed-off-by: Tom Rini > --- > arch/Kconfig | 1 + > common/Kconfig| 3 +++ > include/configs/sandbox.h | 2 -- > 3 files changed, 4 insertions(+), 2 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH] CI: Make more use of git safe.directory
On Mon, 21 Nov 2022 at 10:52, Tom Rini wrote: > > We have a number of jobs that will have git complain about needing to > set safe.directory and this being untrue as a fatal error, but then > complete. Set this flag correctly now as it should be used, and may > prevent a future failure. > > Signed-off-by: Tom Rini > --- > .azure-pipelines.yml | 2 ++ > .gitlab-ci.yml | 5 + > 2 files changed, 7 insertions(+) Reviewed-by: Simon Glass
Re: [PATCH 35/38] scripts/config_whitelist.txt: Remove more referenced symbols
On Sat, 19 Nov 2022 at 16:52, Tom Rini wrote: > > Perform some deeper investigation on the remaining symbols listed in > this file and remove more. > > Signed-off-by: Tom Rini > --- > include/configs/P1010RDB.h | 2 -- > scripts/config_whitelist.txt | 22 -- > 2 files changed, 24 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH 37/38] post: Migrate to Kconfig
On Sat, 19 Nov 2022 at 16:53, Tom Rini wrote: > > We move the existing CONFIG_POST_* functionality over to CFG_POST and > then introduce CONFIG_POST to Kconfig. > > Signed-off-by: Tom Rini > --- > arch/powerpc/cpu/mpc85xx/cpu.c| 2 +- > configs/P2041RDB_NAND_defconfig | 1 + > configs/P2041RDB_SDCARD_defconfig | 1 + > configs/P2041RDB_SPIFLASH_defconfig | 1 + > configs/P2041RDB_defconfig| 1 + > configs/kmcent2_defconfig | 1 + > configs/kmcoge5ne_defconfig | 1 + > configs/pg_wcom_expu1_defconfig | 1 + > configs/pg_wcom_expu1_update_defconfig| 1 + > configs/pg_wcom_seli8_defconfig | 1 + > configs/pg_wcom_seli8_update_defconfig| 1 + > doc/README.POST | 6 +- > doc/README.fsl-ddr| 2 +- > drivers/serial/serial-uclass.c| 2 +- > drivers/serial/serial.c | 2 +- > include/configs/P2041RDB.h| 2 +- > include/configs/km/pg-wcom-ls102xa.h | 4 +- > include/configs/kmcent2.h | 2 +- > include/configs/kmcoge5ne.h | 4 +- > include/post.h| 4 +- > include/serial.h | 4 +- > post/cpu/mpc83xx/ecc.c| 2 +- > post/drivers/flash.c | 2 +- > post/drivers/i2c.c| 4 +- > post/drivers/memory.c | 4 +- > post/drivers/rtc.c| 4 +- > post/lib_powerpc/andi.c | 2 +- > post/lib_powerpc/asm.S| 2 +- > post/lib_powerpc/b.c | 2 +- > post/lib_powerpc/cmp.c| 2 +- > post/lib_powerpc/cmpi.c | 2 +- > post/lib_powerpc/complex.c| 2 +- > post/lib_powerpc/cpu.c| 4 +- > post/lib_powerpc/cr.c | 2 +- > post/lib_powerpc/fpu/20001122-1.c | 4 +- > post/lib_powerpc/fpu/20010114-2.c | 4 +- > post/lib_powerpc/fpu/20010226-1.c | 4 +- > post/lib_powerpc/fpu/980619-1.c | 4 +- > post/lib_powerpc/fpu/acc1.c | 4 +- > post/lib_powerpc/fpu/compare-fp-1.c | 4 +- > post/lib_powerpc/fpu/fpu.c| 4 +- > post/lib_powerpc/fpu/mul-subnormal-single-1.c | 4 +- > post/lib_powerpc/load.c | 2 +- > post/lib_powerpc/multi.c | 2 +- > post/lib_powerpc/rlwimi.c | 2 +- > post/lib_powerpc/rlwinm.c | 2 +- > post/lib_powerpc/rlwnm.c | 2 +- > post/lib_powerpc/srawi.c | 2 +- > post/lib_powerpc/store.c | 2 +- > post/lib_powerpc/string.c | 2 +- > post/lib_powerpc/three.c | 2 +- > post/lib_powerpc/threei.c | 2 +- > post/lib_powerpc/threex.c | 2 +- > post/lib_powerpc/two.c| 2 +- > post/lib_powerpc/twox.c | 2 +- > post/post.c | 4 +- > post/tests.c | 68 +-- > test/Kconfig | 5 ++ > 58 files changed, 114 insertions(+), 99 deletions(-) > Reviewed-by: Simon Glass but please see below > diff --git a/test/Kconfig b/test/Kconfig > index a6b463e4d06c..9f4641ae6bc5 100644 > --- a/test/Kconfig > +++ b/test/Kconfig > @@ -1,3 +1,8 @@ > +config POST > + bool "Power On Self Test support" > + help > + See doc/README.POST for more details Shouldn't this be in post/Kconfig ? We use test/ for unit / functional tests. Regards, Simon
Re: [PATCH 19/38] arm: samsung: Move CONFIG_MISC_COMMON to Kconfig
On Sat, 19 Nov 2022 at 16:49, Tom Rini wrote: > > This option controls using board/samsung/common/misc.c, so add a Kconfig > file there as well and select it from the boards which use this > functionality. > > Signed-off-by: Tom Rini > --- > arch/arm/Kconfig| 1 + > arch/arm/mach-exynos/Kconfig| 5 + > arch/arm/mach-s5pc1xx/Kconfig | 1 + > board/samsung/common/Kconfig| 2 ++ > include/configs/odroid.h| 6 -- > include/configs/odroid_xu3.h| 1 - > include/configs/s5p_goni.h | 2 -- > include/configs/s5pc210_universal.h | 3 --- > include/configs/trats.h | 3 --- > include/configs/trats2.h| 3 --- > 10 files changed, 9 insertions(+), 18 deletions(-) > create mode 100644 board/samsung/common/Kconfig Reviewed-by: Simon Glass
Re: [PATCH 01/38] power: pmic: Guard non-DM_PMIC drivers with a check for POWER_LEGACY
On Sat, 19 Nov 2022 at 16:45, Tom Rini wrote: > > As we have more legacy PMIC drivers to move to Kconfig, guard them all > with POWER_LEGACY or SPL_POWER_LEGACY. Do the same kind of check for > building the drivers too. This also means that we need to resort the > list slightly in the Makefile. > > Cc: Jaehoon Chung > Signed-off-by: Tom Rini > --- > drivers/power/pmic/Kconfig | 5 - > drivers/power/pmic/Makefile | 10 ++ > 2 files changed, 10 insertions(+), 5 deletions(-) > Reviewed-by: Simon Glass
Re: [000/241] Finish migration to Kconfig or CFG namespace
Hi Tom, On Sun, 20 Nov 2022 at 06:34, Tom Rini wrote: > > Hey all, > > The intention of this series isn't to apply it just yet. This was a very > quick scripted migration and so there's cases where we do more than one > symbol, or we can see there's define but unused symbols. But it also > shows that with the last few series I've posted, we're nearly done. With > this series applied, everything builds still, and the resulting binaries > seem to be the same (I'm doing a build where I keep before/after so I > can check checksums now). It's great to see this? When will it be applied? Perhaps when -next opens up? Regards, Simon
Fwd: New Defects reported by Coverity Scan for Das U-Boot
Here's the latest report
-- Forwarded message -
From:
Date: Mon, Nov 21, 2022 at 12:44 PM
Subject: New Defects reported by Coverity Scan for Das U-Boot
To:
Hi,
Please find the latest report on new defect(s) introduced to Das
U-Boot found with Coverity Scan.
2 new defect(s) introduced to Das U-Boot found with Coverity Scan.
3 defect(s), reported by Coverity Scan earlier, were marked fixed in
the recent build analyzed by Coverity Scan.
New defect(s) Reported-by: Coverity Scan
Showing 2 of 2 defect(s)
** CID 376996: Error handling issues (CHECKED_RETURN)
/drivers/net/sandbox-raw-bus.c: 40 in eth_raw_bus_post_bind()
*** CID 376996: Error handling issues (CHECKED_RETURN)
/drivers/net/sandbox-raw-bus.c: 40 in eth_raw_bus_post_bind()
34 if (skip_localhost && local)
35 continue;
36
37 ub_ifname = calloc(IFNAMSIZ + sizeof(ub_ifname_pfx), 1);
38 strcpy(ub_ifname, ub_ifname_pfx);
39 strncat(ub_ifname, i->if_name, IFNAMSIZ);
>>> CID 376996: Error handling issues (CHECKED_RETURN)
>>> Calling "device_bind_driver" without checking return value (as is done
>>> elsewhere 12 out of 15 times).
40 device_bind_driver(dev, "eth_sandbox_raw", ub_ifname, );
41
42 device_set_name_alloced(child);
43 device_probe(child);
44 priv = dev_get_priv(child);
45 if (priv) {
** CID 376995: Null pointer dereferences (FORWARD_NULL)
/test/test-main.c: 518 in ut_run_tests()
*** CID 376995: Null pointer dereferences (FORWARD_NULL)
/test/test-main.c: 518 in ut_run_tests()
512 pos = dectoul(test_insert, NULL);
513 p = strchr(test_insert, ':');
514 if (p)
515 p++;
516
517 for (test = tests; test < tests + count; test++) {
>>> CID 376995: Null pointer dereferences (FORWARD_NULL)
>>> Passing null pointer "p" to "strcmp", which dereferences it. [Note: The
>>> source code implementation of the function has been overridden by a builtin
>>> model.]
518 if (!strcmp(p, test->name))
519 one = test;
520 }
521 }
522
523 for (upto = 0, test = tests; test < tests + count;
test++, upto++) {
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH v2] board_f: Add support for CONFIG_OF_BOARD_FIXUP for XIP images
On Mon, 21 Nov 2022 12:45:32 -0500 Tom Rini wrote: > On Mon, Nov 21, 2022 at 06:42:01PM +0100, Pali Roh_r wrote: > > + Tom > > > > On Wednesday 02 November 2022 00:23:03 Pali Roh_r wrote: > > > On Monday 10 October 2022 17:48:58 Simon Glass wrote: > > > > Hi, > > > > > > > > On Sun, 28 Aug 2022 at 09:19, Marek Beh_n wrote: > > > > > > > > > > From: Pali Roh_r > > > > > > > > > > When U-Boot is running from flash memory (execute in place) then > > > > > gd->fdt_blob before relocation points to read-only flash memory. > > > > > > > > > > So U-Boot calls board_fix_fdt() with read-only gd->fdt_blob pointer > > > > > which > > > > > cause immediate CPU crash when callback is trying to modify > > > > > gd->fdt_blob. > > > > > > > > > > Fix this issue by introducing a new config option > > > > > OF_DTB_READONLY_BEFORE_RELOC which moves fix_fdt callback after the > > > > > reloc_fdt callback. This makes CONFIG_OF_BOARD_FIXUP working also if > > > > > U-Boot before relocation is not running from read/write (S)RAM memory. > > > > > > > > > > This is required for mpc85xx boards when booting from flash NOR. > > > > > > > > > > Signed-off-by: Pali Roh_r > > > > > Signed-off-by: Marek Beh_n > > > > > --- > > > > > Changes since v1: > > > > > - just changed the new Kconfig option name and associated help string > > > > > --- > > > > > common/board_f.c | 8 +++- > > > > > dts/Kconfig | 6 ++ > > > > > 2 files changed, 13 insertions(+), 1 deletion(-) > > > > > > > > Can we just make this the normal behaviour? I think it makes more > > > > sense to change the FDT after we have relocated it. > > Can we? > Sorry, I didn't notice this thread. Do we know if there aren't boards that change fdt before reloc? Marek
Re: Broken commit de47ff536363289f92f85ed1e4901724d238432d
On Wednesday 02 November 2022 00:14:21 Pali Rohár wrote:
> On Monday 10 October 2022 14:20:20 Marek Behún wrote:
> > On Sun, 9 Oct 2022 12:32:02 -0400
> > Tom Rini wrote:
> >
> > > On Sun, Oct 09, 2022 at 03:10:45PM +0200, Pali Rohár wrote:
> > > > On Sunday 09 October 2022 08:45:03 Tom Rini wrote:
> > > > > On Sun, Oct 09, 2022 at 02:41:19PM +0200, Pali Rohár wrote:
> > > > > > On Friday 26 August 2022 10:53:58 Tom Rini wrote:
> > > > > > > On Wed, Aug 17, 2022 at 11:29:08AM +0200, Pali Rohár wrote:
> > > > > > > > On Monday 08 August 2022 09:37:22 Tom Rini wrote:
> > > > > > > > > On Mon, Aug 08, 2022 at 09:51:49AM +0200, Marek Behún wrote:
> > > > > > > > > > On Fri, 5 Aug 2022 18:20:19 -0400
> > > > > > > > > > Tom Rini wrote:
> > > > > > > > > >
> > > > > > > > > > > On Fri, Aug 05, 2022 at 10:17:01PM +0200, Pali Rohár
> > > > > > > > > > > wrote:
> > > > > > > > > > > > On Friday 05 August 2022 11:54:53 Tom Rini wrote:
> > > > > > > > > > > > > On Fri, Aug 05, 2022 at 05:51:35PM +0200, Pali Rohár
> > > > > > > > > > > > > wrote:
> > > > > > > > > > > > > > On Friday 05 August 2022 11:44:00 Tom Rini wrote:
> > > > > > > > > > > > > >
> > > > > > > > > > > > > > > On Fri, Aug 05, 2022 at 05:12:59PM +0200, Pali
> > > > > > > > > > > > > > > Rohár wrote:
> > > > > > > > > > > > > > > > On Friday 05 August 2022 11:03:40 Tom Rini
> > > > > > > > > > > > > > > > wrote:
> > > > > > > > > > > > > > > > > On Fri, Aug 05, 2022 at 04:59:35PM +0200,
> > > > > > > > > > > > > > > > > Pali Rohár wrote:
> > > > > > > > > > > > > > > > > > On Friday 05 August 2022 10:47:31 Tom Rini
> > > > > > > > > > > > > > > > > > wrote:
> > > > > > > > > > > > > > > > > > > On Fri, Aug 05, 2022 at 04:21:24PM +0200,
> > > > > > > > > > > > > > > > > > > Pali Rohár wrote:
> > > > > > > > > > > > > > > > > > > > On Wednesday 03 August 2022 12:13:18
> > > > > > > > > > > > > > > > > > > > Tom Rini wrote:
> > > > > > > > > > > > > > > > > > > > > On Wed, Aug 03, 2022 at 06:00:13PM
> > > > > > > > > > > > > > > > > > > > > +0200, Pali Rohár wrote:
> > > > > > > > > > > > > > > > > > > > > > On Tuesday 02 August 2022 06:58:26
> > > > > > > > > > > > > > > > > > > > > > Tom Rini wrote:
> > > > > > > > > > > > > > > > > > > > > > > On Tue, Aug 02, 2022 at
> > > > > > > > > > > > > > > > > > > > > > > 11:13:38AM +0200, Pali Rohár
> > > > > > > > > > > > > > > > > > > > > > > wrote:
> > > > > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > > > > > > Hello Tom!
> > > > > > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > > > > > > Your commit
> > > > > > > > > > > > > > > > > > > > > > > > de47ff536363289f92f85ed1e4901724d238432d
> > > > > > > > > > > > > > > > > > > > > > > > ("Convert
> > > > > > > > > > > > > > > > > > > > > > > > CONFIG_SYS_MPC85XX_NO_RESETVEC
> > > > > > > > > > > > > > > > > > > > > > > > to Kconfig") seems to be
> > > > > > > > > > > > > > > > > > > > > > > > broken.
> > > > > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > > > > > I thought I had managed to mirror
> > > > > > > > > > > > > > > > > > > > > > > the TPL/SPL/full usage that was
> > > > > > > > > > > > > > > > > > > > > > > there
> > > > > > > > > > > > > > > > > > > > > > > prior, but apparently some got
> > > > > > > > > > > > > > > > > > > > > > > missed.
> > > > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > > > > Yea, conversion to Kconfig seems
> > > > > > > > > > > > > > > > > > > > > > that was incorrect.
> > > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > > > As the config files were just
> > > > > > > > > > > > > > > > > > > > > unclear, but you seem to understand
> > > > > > > > > > > > > > > > > > > > > what
> > > > > > > > > > > > > > > > > > > > > it's supposed to be, a patch to clean
> > > > > > > > > > > > > > > > > > > > > it up would be most appreciated,
> > > > > > > > > > > > > > > > > > > > > thanks.
> > > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > > > --
> > > > > > > > > > > > > > > > > > > > > Tom
> > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > > Broken is also commit
> > > > > > > > > > > > > > > > > > > > d433c74eecdce1e4952ef4e8c712a9289c0dfcc2.
> > > > > > > > > > > > > > > > > > > > Seems
> > > > > > > > > > > > > > > > > > > > that all kconfig migration changes done
> > > > > > > > > > > > > > > > > > > > after that commit are broken.
> > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > > I really do not have energy to
> > > > > > > > > > > > > > > > > > > > investigate what and how was broken due
> > > > > > > > > > > > > > > > > > > > to incorrect kconfig migration.
> > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > > > > > > I
[PATCH] CI: Make more use of git safe.directory
We have a number of jobs that will have git complain about needing to
set safe.directory and this being untrue as a fatal error, but then
complete. Set this flag correctly now as it should be used, and may
prevent a future failure.
Signed-off-by: Tom Rini
---
.azure-pipelines.yml | 2 ++
.gitlab-ci.yml | 5 +
2 files changed, 7 insertions(+)
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 4928d3abac7d..80b0b2c5d003 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -362,6 +362,7 @@ stages:
cat << "EOF" >> test.sh
# the below corresponds to .gitlab-ci.yml "before_script"
cd ${WORK_DIR}
+ git config --global --add safe.directory ${WORK_DIR}
git clone --depth=1 https://source.denx.de/u-boot/u-boot-test-hooks
/tmp/uboot-test-hooks
ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
@@ -551,6 +552,7 @@ stages:
export BUILDMAN="${BUILDMAN}"
EOF
cat << "EOF" >> build.sh
+ git config --global --add safe.directory ${WORK_DIR}
if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -o /tmp -P -E -W ${BUILDMAN} ${OVERRIDE}
|| ret=$?;
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 36a274dac52f..dbb8990af50c 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -14,6 +14,7 @@ stages:
stage: test.py
before_script:
# Clone uboot-test-hooks
+- git config --global --add safe.directory "${CI_PROJECT_DIR}"
- git clone --depth=1 https://source.denx.de/u-boot/u-boot-test-hooks
/tmp/uboot-test-hooks
- ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
@@ -81,6 +82,7 @@ build all 32bit ARM platforms:
stage: world build
script:
- ret=0;
+ git config --global --add safe.directory "${CI_PROJECT_DIR}";
./tools/buildman/buildman -o /tmp -P -E -W arm -x aarch64 || ret=$?;
if [[ $ret -ne 0 ]]; then
./tools/buildman/buildman -o /tmp -seP;
@@ -93,6 +95,7 @@ build all 64bit ARM platforms:
- virtualenv -p /usr/bin/python3 /tmp/venv
- . /tmp/venv/bin/activate
- ret=0;
+ git config --global --add safe.directory "${CI_PROJECT_DIR}";
./tools/buildman/buildman -o /tmp -P -E -W aarch64 || ret=$?;
if [[ $ret -ne 0 ]]; then
./tools/buildman/buildman -o /tmp -seP;
@@ -103,6 +106,7 @@ build all PowerPC platforms:
stage: world build
script:
- ret=0;
+ git config --global --add safe.directory "${CI_PROJECT_DIR}";
./tools/buildman/buildman -o /tmp -P -E -W powerpc || ret=$?;
if [[ $ret -ne 0 ]]; then
./tools/buildman/buildman -o /tmp -seP;
@@ -113,6 +117,7 @@ build all other platforms:
stage: world build
script:
- ret=0;
+ git config --global --add safe.directory "${CI_PROJECT_DIR}";
./tools/buildman/buildman -o /tmp -P -E -W -x arm,powerpc || ret=$?;
if [[ $ret -ne 0 ]]; then
./tools/buildman/buildman -o /tmp -seP;
--
2.25.1
Re: [PATCH v2] board_f: Add support for CONFIG_OF_BOARD_FIXUP for XIP images
On Mon, Nov 21, 2022 at 06:42:01PM +0100, Pali Rohár wrote: > + Tom > > On Wednesday 02 November 2022 00:23:03 Pali Rohár wrote: > > On Monday 10 October 2022 17:48:58 Simon Glass wrote: > > > Hi, > > > > > > On Sun, 28 Aug 2022 at 09:19, Marek Behún wrote: > > > > > > > > From: Pali Rohár > > > > > > > > When U-Boot is running from flash memory (execute in place) then > > > > gd->fdt_blob before relocation points to read-only flash memory. > > > > > > > > So U-Boot calls board_fix_fdt() with read-only gd->fdt_blob pointer > > > > which > > > > cause immediate CPU crash when callback is trying to modify > > > > gd->fdt_blob. > > > > > > > > Fix this issue by introducing a new config option > > > > OF_DTB_READONLY_BEFORE_RELOC which moves fix_fdt callback after the > > > > reloc_fdt callback. This makes CONFIG_OF_BOARD_FIXUP working also if > > > > U-Boot before relocation is not running from read/write (S)RAM memory. > > > > > > > > This is required for mpc85xx boards when booting from flash NOR. > > > > > > > > Signed-off-by: Pali Rohár > > > > Signed-off-by: Marek Behún > > > > --- > > > > Changes since v1: > > > > - just changed the new Kconfig option name and associated help string > > > > --- > > > > common/board_f.c | 8 +++- > > > > dts/Kconfig | 6 ++ > > > > 2 files changed, 13 insertions(+), 1 deletion(-) > > > > > > Can we just make this the normal behaviour? I think it makes more > > > sense to change the FDT after we have relocated it. Can we? -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] board_f: Add support for CONFIG_OF_BOARD_FIXUP for XIP images
+ Tom On Wednesday 02 November 2022 00:23:03 Pali Rohár wrote: > On Monday 10 October 2022 17:48:58 Simon Glass wrote: > > Hi, > > > > On Sun, 28 Aug 2022 at 09:19, Marek Behún wrote: > > > > > > From: Pali Rohár > > > > > > When U-Boot is running from flash memory (execute in place) then > > > gd->fdt_blob before relocation points to read-only flash memory. > > > > > > So U-Boot calls board_fix_fdt() with read-only gd->fdt_blob pointer which > > > cause immediate CPU crash when callback is trying to modify gd->fdt_blob. > > > > > > Fix this issue by introducing a new config option > > > OF_DTB_READONLY_BEFORE_RELOC which moves fix_fdt callback after the > > > reloc_fdt callback. This makes CONFIG_OF_BOARD_FIXUP working also if > > > U-Boot before relocation is not running from read/write (S)RAM memory. > > > > > > This is required for mpc85xx boards when booting from flash NOR. > > > > > > Signed-off-by: Pali Rohár > > > Signed-off-by: Marek Behún > > > --- > > > Changes since v1: > > > - just changed the new Kconfig option name and associated help string > > > --- > > > common/board_f.c | 8 +++- > > > dts/Kconfig | 6 ++ > > > 2 files changed, 13 insertions(+), 1 deletion(-) > > > > Can we just make this the normal behaviour? I think it makes more > > sense to change the FDT after we have relocated it. > > > > Regards, > > Simon > > Marek? Any comments?
Re: [PATCH] powerpc: dts: keymile: Deduplicate binman code
+ Tom
On Tuesday 01 November 2022 23:57:08 Pali Rohár wrote:
> PING?
>
> On Sunday 09 October 2022 14:28:19 Pali Rohár wrote:
> > PING?
> >
> > On Wednesday 03 August 2022 13:20:49 Pali Rohár wrote:
> > > kmcent2-u-boot.dtsi file contains copy of powerpc u-boot.dtsi binman file.
> > > So remove code duplication and replace it by including u-boot.dtsi file.
> > >
> > > Signed-off-by: Pali Rohár
> > > ---
> > > arch/powerpc/dts/kmcent2-u-boot.dtsi | 22 ++
> > > 1 file changed, 2 insertions(+), 20 deletions(-)
> > >
> > > diff --git a/arch/powerpc/dts/kmcent2-u-boot.dtsi
> > > b/arch/powerpc/dts/kmcent2-u-boot.dtsi
> > > index ab76a9f1226c..d0277627644b 100644
> > > --- a/arch/powerpc/dts/kmcent2-u-boot.dtsi
> > > +++ b/arch/powerpc/dts/kmcent2-u-boot.dtsi
> > > @@ -74,24 +74,6 @@
> > > compatible = "fsl,pcie-t104x";
> > > law_trgt_if = <0>;
> > > };
> > > -
> > > - binman {
> > > - filename = "u-boot-with-dtb.bin";
> > > - skip-at-start = ;
> > > - sort-by-offset;
> > > - pad-byte = <0xff>;
> > > - size = ;
> > > -
> > > - u-boot-with-ucode-ptr {
> > > - offset = ;
> > > - optional-ucode;
> > > - };
> > > -
> > > - u-boot-dtb-with-ucode {
> > > - align = <256>;
> > > - };
> > > - powerpc-mpc85xx-bootpg-resetvec {
> > > - offset = <(CONFIG_RESET_VECTOR_ADDRESS - 0xffc)>;
> > > - };
> > > - };
> > > };
> > > +
> > > +#include "u-boot.dtsi"
> > > --
> > > 2.20.1
> > >
Re: [PATCH] gpio: renesas: Simplify .request/.rfree callbacks
+ Tom
On Wednesday 02 November 2022 09:58:10 Stefan Roese wrote:
> Hi Pali,
>
> added Marek to Cc
>
> On 01.11.22 23:57, Pali Rohár wrote:
> > On Sunday 09 October 2022 14:34:55 Pali Rohár wrote:
> > > On Friday 02 September 2022 21:56:07 Pali Rohár wrote:
> > > > On Wednesday 03 August 2022 08:48:39 Stefan Roese wrote:
> > > > > On 02.08.22 12:06, Pali Rohár wrote:
> > > > > > Remove identify wrapper functions.
> > > > > >
> > > > > > Signed-off-by: Pali Rohár
> > > > >
> > > > > Reviewed-by: Stefan Roese
> > > >
> > > > Any more comments? Or could it be merged?
> > >
> > > PING after another month?
> >
> > PING?
>
> Marek, could you please take a look? This patch is delegated to you
> in patchworks:
>
> http://patchwork.ozlabs.org/project/uboot/patch/20220802100655.17965-1-p...@kernel.org/
>
> Thanks,
> Stefan
>
> > > > > Thanks,
> > > > > Stefan
> > > > >
> > > > > > ---
> > > > > >drivers/gpio/gpio-rcar.c | 15 ++-
> > > > > >1 file changed, 2 insertions(+), 13 deletions(-)
> > > > > >
> > > > > > diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
> > > > > > index 138801850d3e..ba00bb459679 100644
> > > > > > --- a/drivers/gpio/gpio-rcar.c
> > > > > > +++ b/drivers/gpio/gpio-rcar.c
> > > > > > @@ -130,20 +130,9 @@ static int rcar_gpio_get_function(struct
> > > > > > udevice *dev, unsigned offset)
> > > > > > return GPIOF_INPUT;
> > > > > >}
> > > > > > -static int rcar_gpio_request(struct udevice *dev, unsigned offset,
> > > > > > -const char *label)
> > > > > > -{
> > > > > > - return pinctrl_gpio_request(dev, offset, label);
> > > > > > -}
> > > > > > -
> > > > > > -static int rcar_gpio_free(struct udevice *dev, unsigned offset)
> > > > > > -{
> > > > > > - return pinctrl_gpio_free(dev, offset);
> > > > > > -}
> > > > > > -
> > > > > >static const struct dm_gpio_ops rcar_gpio_ops = {
> > > > > > - .request= rcar_gpio_request,
> > > > > > - .rfree = rcar_gpio_free,
> > > > > > + .request= pinctrl_gpio_request,
> > > > > > + .rfree = pinctrl_gpio_free,
> > > > > > .direction_input= rcar_gpio_direction_input,
> > > > > > .direction_output = rcar_gpio_direction_output,
> > > > > > .get_value = rcar_gpio_get_value,
> > > > >
> > > > > Viele Grüße,
> > > > > Stefan Roese
> > > > >
> > > > > --
> > > > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> > > > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> > > > > Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email:
> > > > > s...@denx.de
>
> Viele Grüße,
> Stefan Roese
>
> --
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH] ubifs: Allow to silence debug dumps
+ Tom
On Tuesday 01 November 2022 23:26:37 Pali Rohár wrote:
> PING again
>
> On Sunday 09 October 2022 13:30:26 Pali Rohár wrote:
> > PING again after more than one month.
> >
> > On Thursday 25 August 2022 15:53:32 Pali Rohár wrote:
> > > PING? Who can review and take this patch? It is needed for more boards
> > > due to increasing size of u-boot binary.
> > >
> > > On Sunday 07 August 2022 21:27:09 Pali Rohár wrote:
> > > > Debug dump logs are not always required. Add a new config option
> > > > UBIFS_SILENCE_DEBUG_DUMP to silence all debug dumps. On powerpc/mpc85xx
> > > > when enabled this will decrease size of U-Boot binary by 11 kB.
> > > >
> > > > Signed-off-by: Pali Rohár
> > > > ---
> > > > fs/ubifs/Kconfig | 8
> > > > fs/ubifs/debug.c | 28
> > > > 2 files changed, 36 insertions(+)
> > > >
> > > > diff --git a/fs/ubifs/Kconfig b/fs/ubifs/Kconfig
> > > > index 9da35b8a3794..949b28841194 100644
> > > > --- a/fs/ubifs/Kconfig
> > > > +++ b/fs/ubifs/Kconfig
> > > > @@ -4,3 +4,11 @@ config UBIFS_SILENCE_MSG
> > > > help
> > > > Make the verbose messages from UBIFS stop printing. This
> > > > leaves
> > > > warnings and errors enabled.
> > > > +
> > > > +config UBIFS_SILENCE_DEBUG_DUMP
> > > > + bool "UBIFS silence debug dumps"
> > > > + default y if UBIFS_SILENCE_MSG
> > > > + default n
> > > > + help
> > > > + Make the debug dumps from UBIFS stop printing.
> > > > + This decreases size of U-Boot binary.
> > > > diff --git a/fs/ubifs/debug.c b/fs/ubifs/debug.c
> > > > index 2ff8f1a5f9b1..bede7d01cab0 100644
> > > > --- a/fs/ubifs/debug.c
> > > > +++ b/fs/ubifs/debug.c
> > > > @@ -35,6 +35,7 @@
> > > > static DEFINE_SPINLOCK(dbg_lock);
> > > > #endif
> > > >
> > > > +#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
> > > > static const char *get_key_fmt(int fmt)
> > > > {
> > > > switch (fmt) {
> > > > @@ -230,6 +231,7 @@ static void dump_ch(const struct ubifs_ch *ch)
> > > >(unsigned long long)le64_to_cpu(ch->sqnum));
> > > > pr_err("\tlen%u\n", le32_to_cpu(ch->len));
> > > > }
> > > > +#endif
> > > >
> > > > void ubifs_dump_inode(struct ubifs_info *c, const struct inode *inode)
> > > > {
> > > > @@ -303,6 +305,7 @@ void ubifs_dump_inode(struct ubifs_info *c, const
> > > > struct inode *inode)
> > > >
> > > > void ubifs_dump_node(const struct ubifs_info *c, const void *node)
> > > > {
> > > > +#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
> > > > int i, n;
> > > > union ubifs_key key;
> > > > const struct ubifs_ch *ch = node;
> > > > @@ -546,10 +549,12 @@ void ubifs_dump_node(const struct ubifs_info *c,
> > > > const void *node)
> > > >(int)ch->node_type);
> > > > }
> > > > spin_unlock(_lock);
> > > > +#endif
> > > > }
> > > >
> > > > void ubifs_dump_budget_req(const struct ubifs_budget_req *req)
> > > > {
> > > > +#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
> > > > spin_lock(_lock);
> > > > pr_err("Budgeting request: new_ino %d, dirtied_ino %d\n",
> > > >req->new_ino, req->dirtied_ino);
> > > > @@ -563,10 +568,12 @@ void ubifs_dump_budget_req(const struct
> > > > ubifs_budget_req *req)
> > > > pr_err("\tdata_growth %d dd_growth %d\n",
> > > >req->data_growth, req->dd_growth);
> > > > spin_unlock(_lock);
> > > > +#endif
> > > > }
> > > >
> > > > void ubifs_dump_lstats(const struct ubifs_lp_stats *lst)
> > > > {
> > > > +#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
> > > > spin_lock(_lock);
> > > > pr_err("(pid %d) Lprops statistics: empty_lebs %d, idx_lebs
> > > > %d\n",
> > > >current->pid, lst->empty_lebs, lst->idx_lebs);
> > > > @@ -575,6 +582,7 @@ void ubifs_dump_lstats(const struct ubifs_lp_stats
> > > > *lst)
> > > > pr_err("\ttotal_used %lld, total_dark %lld, total_dead %lld\n",
> > > >lst->total_used, lst->total_dark, lst->total_dead);
> > > > spin_unlock(_lock);
> > > > +#endif
> > > > }
> > > >
> > > > #ifndef __UBOOT__
> > > > @@ -653,6 +661,7 @@ void ubifs_dump_budg(struct ubifs_info *c, const
> > > > struct ubifs_budg_info *bi)
> > > >
> > > > void ubifs_dump_lprop(const struct ubifs_info *c, const struct
> > > > ubifs_lprops *lp)
> > > > {
> > > > +#ifndef CONFIG_UBIFS_SILENCE_DEBUG_DUMP
> > > > int i, spc, dark = 0, dead = 0;
> > > > struct rb_node *rb;
> > > > struct ubifs_bud *bud;
> > > > @@ -740,6 +749,7 @@ void ubifs_dump_lprop(const struct ubifs_info *c,
> > > > const struct ubifs_lprops *lp)
> > > > if (lp->lnum == c->gc_lnum)
> > > > pr_cont(", GC LEB");
> > > > pr_cont(")\n");
> > > > +#endif
> > > > }
> > > >
> > > > void ubifs_dump_lprops(struct ubifs_info *c)
> > > > @@ -766,6 +776,7 @@ void ubifs_dump_lprops(struct ubifs_info *c)
> > > >
> > >
Re: [PATCH] cmd: ubifs: Do not show usage when command fails
+ Tom
On Tuesday 01 November 2022 23:20:15 Pali Rohár wrote:
> ping?
>
> On Sunday 09 October 2022 13:18:47 Pali Rohár wrote:
> > PING?
> >
> > On Sunday 07 August 2022 21:58:56 Pali Rohár wrote:
> > > Return value -1 cause U-Boot to print usage message. Return value
> > > 1 (CMD_RET_FAILURE) indicates failure. So fix return value when ubifs
> > > command starts it execution and fails.
> > >
> > > Signed-off-by: Pali Rohár
> > > ---
> > > cmd/ubifs.c | 8
> > > 1 file changed, 4 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/cmd/ubifs.c b/cmd/ubifs.c
> > > index 7a620c5e21da..6a01d0988a2d 100644
> > > --- a/cmd/ubifs.c
> > > +++ b/cmd/ubifs.c
> > > @@ -33,7 +33,7 @@ int cmd_ubifs_mount(char *vol_name)
> > >
> > > ret = uboot_ubifs_mount(vol_name);
> > > if (ret)
> > > - return -1;
> > > + return CMD_RET_FAILURE;
> > >
> > > ubifs_mounted = 1;
> > >
> > > @@ -62,7 +62,7 @@ int cmd_ubifs_umount(void)
> > > {
> > > if (ubifs_initialized == 0) {
> > > printf("No UBIFS volume mounted!\n");
> > > - return -1;
> > > + return CMD_RET_FAILURE;
> > > }
> > >
> > > uboot_ubifs_umount();
> > > @@ -89,7 +89,7 @@ static int do_ubifs_ls(struct cmd_tbl *cmdtp, int flag,
> > > int argc,
> > >
> > > if (!ubifs_mounted) {
> > > printf("UBIFS not mounted, use ubifsmount to mount volume
> > > first!\n");
> > > - return -1;
> > > + return CMD_RET_FAILURE;
> > > }
> > >
> > > if (argc == 2)
> > > @@ -116,7 +116,7 @@ static int do_ubifs_load(struct cmd_tbl *cmdtp, int
> > > flag, int argc,
> > >
> > > if (!ubifs_mounted) {
> > > printf("UBIFS not mounted, use ubifs mount to mount volume
> > > first!\n");
> > > - return -1;
> > > + return CMD_RET_FAILURE;
> > > }
> > >
> > > if (argc < 3)
> > > --
> > > 2.20.1
> > >
[ANN] U-Boot v2023.01-rc2 released
Hey all, Getting back on schedule, here's -rc2. We're getting well in to the stabilization period now, but there's still some things I would like to see come in including a net PR. In terms of a changelog, git log --merges v2023.01-rc1..v2023.01-rc2 contains what I've pulled but as always, better PR messages and tags will provide better results here. Looking forward, the schedule is for now rcs every other Monday, and with final release on January 9th, 2023. Thanks all! -- Tom signature.asc Description: PGP signature
Re: [PATCH] Revert "imx: imx8: apalis: switch to binman"
On Tue, Nov 15, 2022 at 11:49:40AM +0100, Stefano Babic wrote: > This reverts commit b8072ae848b73e89a73ba5b535324e4dc2793f37. > > Signed-off-by: Stefano Babic > Reported-by: Marcel Ziswiler > Acked-by: Marcel Ziswiler I saw you had mentioned putting this in to the -imx tree, but given that I'm doing a -rc today I didn't want this to be missed, so I'm picking up up directly now. Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] Nokia RX-51: Do not overwrite standard $loadaddr variable
On Sun, Nov 20, 2022 at 05:56:28PM +0100, Pali Rohár wrote: > Instead of overwriting $loadaddr variable, use custom temporary > $fileloadaddr variable. So scripts can access default/original address > stored in $loadaddr at build time. > > Signed-off-by: Pali Rohár Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] Nokia RX-51: Document debugging options and compile command
On Sun, Nov 20, 2022 at 05:56:27PM +0100, Pali Rohár wrote: > Add example command how to compile U-Boot and add new documentation section > describing how to enable early debug UART and verbose log output for N900. > > Signed-off-by: Pali Rohár Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] arm32: Fix relocation of env_addr if POSITION_INDEPENDENT=y
On Sun, Nov 20, 2022 at 05:56:26PM +0100, Pali Rohár wrote:
> Apply commit 534f0fbd6520 ("arm64: Fix relocation of env_addr if
> POSITION_INDEPENDENT=y") also for 32-bit ARM.
>
> This change fixes crashing of U-Boot on ARMv7 (Omap3 / Cortex-A8) Nokia N900
> phone (real HW). Note that qemu emulator of this board with same u-boot.bin
> binary has not triggered this crash.
>
> Crash happened after U-Boot printed following debug lines to serial console:
>
> initcall: 0001ea8c (relocated to 8fe0aa8c)
> Loading Environment from ... Using default environment
> Destroy Hash Table: 8fe25a98 table =
> Create Hash Table: N=387
>
> Signed-off-by: Pali Rohár
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] usb: gadget: dfu: Fix the unchecked length field
On Thu, Nov 03, 2022 at 09:37:48AM +0530, Venkatesh Yadav Abbarapu wrote: > DFU implementation does not bound the length field in USB > DFU download setup packets, and it does not verify that > the transfer direction. Fixing the length and transfer > direction. > > CVE-2022-2347 > > Signed-off-by: Venkatesh Yadav Abbarapu > Reviewed-by: Marek Vasut Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] Revert "cli_readline: Only insert printable chars"
On Wed, Nov 02, 2022 at 12:40:46AM +0100, Pali Rohár wrote: > This reverts commit d2e64d29c44dee6d455f7705dd1cf1af8674ad9a. > > This commit broke support for pound sign (£) and euro sign (€) keys on > Nokia N900 keypad. > > Signed-off-by: Pali Rohár > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] spl: Fix SPL_ATF and SPL_OPENSBI dependencies
On Sun, Oct 30, 2022 at 11:26:19PM -0500, Samuel Holland wrote: > The code for these two options depends on having the FIT loadables > recorded in the FDT. Thus, these options require the full version of > the SPL_LOAD_FIT code. > > Signed-off-by: Samuel Holland Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] configs: mediatek: enable boot via extlinux
On Fri, Oct 28, 2022 at 10:28:27AM +0200, Julien STEPHAN wrote: > From: Alexandre Mergnat > > Enable FAT and SYSBOOT to use extlinux boot script > > Signed-off-by: Jerome Brunet > Signed-off-by: Alexandre Mergnat > Signed-off-by: Julien STEPHAN Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/2] Fix usage of CONFIG_PREBOOT
On Sun, Jul 10, 2022 at 01:42:55PM +0200, Pali Rohár wrote: > Due to usage of PREBOOT in Kconfig, macro CONFIG_PREBOOT is always defined > when CONFIG_USE_PREBOOT is enabled. In case CONFIG_PREBOOT is not > explicitly enabled it is set to empty C string and therefore > '#ifdef CONFIG_PREBOOT' guard does not work. Fix this issue by introducing > a new Kconfig symbol PREBOOT_DEFINED which cause to define new C macro > CONFIG_PREBOOT_DEFINED only when CONFIG_PREBOOT is really defined. > > Change usage of '#ifdef CONFIG_PREBOOT' by '#ifdef CONFIG_USE_PREBOOT' for > code which checks if preboot code would be called and by > '#ifdef CONFIG_PREBOOT_DEFINED' for defining preboot code. > > Signed-off-by: Pali Rohár For the record, we need to long term figure out a better solution to user configurable default environment stuff. Doing this via Kconfig is fragile / problematic. However, as this patch does solve a real problem, applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v1 0/3] Implement Tegra Timer with dependencies
пн, 21 лист. 2022 р. о 18:49 Peter Robinson пише: > > On Mon, Nov 21, 2022 at 4:29 PM Svyatoslav Ryhel wrote: > > > > This is re-send of v1 patches. Almost a month passed, I got no > > review and timer implementation deadline is approaching. > > > > - rework clock_osc_freq detection as it is needed for timer > > - implement timer for ARMv7 Tegra devices > > - set timer to be selected automatically > > What does this give us? You mention ARMv7 above but there's also > changes for at least 210 that I can see below. I can likely take a > pass at review, would be useful to know more what I should be looking > at. > > Peter Greetings! I would recommend checking per-commit descriptions and not just a title. Best regards, S. > > Svyatoslav Ryhel (3): > > ARM: tegra: remap clock_osc_freq for all Tegra family > > drivers: timer: add timer driver for ARMv7 based Tegra devices > > ARM: tegra: include timer as default option > > > > arch/arm/Kconfig| 1 + > > arch/arm/include/asm/arch-tegra/clock.h | 9 +- > > arch/arm/mach-tegra/Kconfig | 2 + > > arch/arm/mach-tegra/clock.c | 17 +++- > > arch/arm/mach-tegra/cpu.c | 70 ++--- > > arch/arm/mach-tegra/tegra114/clock.c| 13 +-- > > arch/arm/mach-tegra/tegra124/clock.c| 13 +-- > > arch/arm/mach-tegra/tegra20/clock.c | 4 +- > > arch/arm/mach-tegra/tegra210/clock.c| 22 + > > arch/arm/mach-tegra/tegra30/clock.c | 10 +- > > drivers/timer/Kconfig | 8 ++ > > drivers/timer/Makefile | 1 + > > drivers/timer/tegra-timer.c | 124 > > drivers/usb/host/ehci-tegra.c | 46 +++-- > > include/configs/tegra-common.h | 6 -- > > 15 files changed, 267 insertions(+), 79 deletions(-) > > create mode 100644 drivers/timer/tegra-timer.c > > > > -- > > 2.34.1 > >
Re: [PATCH v1 0/3] Implement Tegra Timer with dependencies
On Mon, Nov 21, 2022 at 4:29 PM Svyatoslav Ryhel wrote: > > This is re-send of v1 patches. Almost a month passed, I got no > review and timer implementation deadline is approaching. > > - rework clock_osc_freq detection as it is needed for timer > - implement timer for ARMv7 Tegra devices > - set timer to be selected automatically What does this give us? You mention ARMv7 above but there's also changes for at least 210 that I can see below. I can likely take a pass at review, would be useful to know more what I should be looking at. Peter > Svyatoslav Ryhel (3): > ARM: tegra: remap clock_osc_freq for all Tegra family > drivers: timer: add timer driver for ARMv7 based Tegra devices > ARM: tegra: include timer as default option > > arch/arm/Kconfig| 1 + > arch/arm/include/asm/arch-tegra/clock.h | 9 +- > arch/arm/mach-tegra/Kconfig | 2 + > arch/arm/mach-tegra/clock.c | 17 +++- > arch/arm/mach-tegra/cpu.c | 70 ++--- > arch/arm/mach-tegra/tegra114/clock.c| 13 +-- > arch/arm/mach-tegra/tegra124/clock.c| 13 +-- > arch/arm/mach-tegra/tegra20/clock.c | 4 +- > arch/arm/mach-tegra/tegra210/clock.c| 22 + > arch/arm/mach-tegra/tegra30/clock.c | 10 +- > drivers/timer/Kconfig | 8 ++ > drivers/timer/Makefile | 1 + > drivers/timer/tegra-timer.c | 124 > drivers/usb/host/ehci-tegra.c | 46 +++-- > include/configs/tegra-common.h | 6 -- > 15 files changed, 267 insertions(+), 79 deletions(-) > create mode 100644 drivers/timer/tegra-timer.c > > -- > 2.34.1 >
Re: [PATCH] cli_hush: fix 'exit' cmd that was not exiting scripts
On 11/21/22 09:55, Hector Palacios wrote:
Hi Marek,
On 11/19/22 15:12, Marek Vasut wrote:
On 11/18/22 12:19, Hector Palacios wrote:
Commit 8c4e3b79bd0bb76eea16869e9666e19047c0d005 supposedly
passed one-level up the argument passed to 'exit' but it also
broke 'exit' purpose of stopping a script.
In reality, even if 'do_exit()' is capable of returning any
integer, the cli only admits '1' or '0' as return values.
This commit respects the current implementation to allow 'exit'
to at least return '1' for future processing, but returns
when the command being run is 'exit'.
Before this:
=> setenv foo 'echo bar ; exit 3 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit 1 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit 0 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit -1 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit -2 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit ; echo should not see this'; run
foo; echo $?
bar
should not see this
0
After this:
=> setenv foo 'echo bar ; exit 3 ; echo should not see
this'; run foo; echo $?
bar
1
=> setenv foo 'echo bar ; exit 1 ; echo should not see
this'; run foo; echo $?
bar
1
=> setenv foo 'echo bar ; exit 0 ; echo should not see
this'; run foo; echo $?
bar
0
=> setenv foo 'echo bar ; exit -1 ; echo should not see
this'; run foo; echo $?
bar
0
=> setenv foo 'echo bar ; exit -2 ; echo should not see
this'; run foo; echo $?
bar
0
=> setenv foo 'echo bar ; exit ; echo should not see this';
run foo; echo $?
bar
0
Reported-by: Adrian Vovk
Signed-off-by: Hector Palacios
---
common/cli_hush.c | 4
1 file changed, 4 insertions(+)
diff --git a/common/cli_hush.c b/common/cli_hush.c
index 1467ff81b35b..9fe8b87e02d7 100644
--- a/common/cli_hush.c
+++ b/common/cli_hush.c
@@ -1902,6 +1902,10 @@ static int run_list_real(struct pipe *pi)
last_return_code = -rcode - 2;
return -2; /* exit */
}
+ if (!strcmp(pi->progs->argv[0], "exit")) {
+ last_return_code = rcode;
+ return rcode; /* exit */
+ }
last_return_code=(rcode == 0) ? 0 : 1;
#endif
#ifndef __U_BOOT__
Looking at the code just above this change 'if (rcode < -1)
last_return_code = -rcode - 2', that explains the odd 'return -r - 2' in
cmd/exit.c I think.
That's what I thought, too. The cli captures a -2 as the number to exit
a script, and with -rcode -2 was exiting and returning a 0.
Instead of capturing a magic number, I'm suggesting to capture 'exit'
command.
I wonder, can we somehow fix the return code handling in cmd/exit.c
instead, so that it would cover both this behavior listed in this patch,
and 8c4e3b79bd0 ("cmd: exit: Fix return value") ? The cmd/exit.c seems
like the right place to fix it.
I didn't revert or touched 8c4e3b79bd0 but if what you wanted to do with
that commit is to return any positive integer to the upper layers, I
must say that just doesn't work because the cli_hush only processes 1
(failure) or 0 (success), so there's no way for something such as 'exit
3' to produce a $? of 3.
I think the 'exit' command should only be used with this old U-Boot
standard of considering 1 a failure and 0 a success.
I could remove the 'if (rcode < -1) last_return_code = -rcode - 2',
which doesn't add much value now, but other than that I'm unsure of what
you have in mind as to fix cmd/exit.c.
I just saw my patch causes a data abort on if conditionals, when
accessing argv[0].
Maybe we'd rather simply revert 8c4e3b79bd0 ("cmd: exit: Fix return
value") and let the exit command return 0 in all cases, as it is
documented, at least until we find a proper solution.
--
Héctor Palacios
[PATCH v2 3/3] ARM: tegra: include timer as default option
Enable TIMER as default option for add Tegra devices and enable TEGRA_TIMER for TEGRA_ARMV7_COMMON. Additionally enable SPL_TIMER if build as SPL part and drop deprecated configs from common header. Signed-off-by: Svyatoslav Ryhel --- arch/arm/Kconfig | 1 + arch/arm/mach-tegra/Kconfig| 2 ++ include/configs/tegra-common.h | 6 -- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 453bef900e..95595ee2fd 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1334,6 +1334,7 @@ config ARCH_TEGRA select GPIO_EXTRA_HEADER imply DISTRO_DEFAULTS imply FAT_WRITE + imply SPL_TIMER if SPL config ARCH_VEXPRESS64 bool "Support ARMv8 Arm Ltd. VExpress based boards and models" diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index a8956dcdc8..d2224327e4 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -66,6 +66,7 @@ config TEGRA_COMMON select MISC select OF_CONTROL select SPI + select TIMER imply CMD_DM imply CRC32_VERIFY @@ -91,6 +92,7 @@ config TEGRA_ARMV7_COMMON select TEGRA_NO_BPMP select TEGRA_PINCTRL select TEGRA_PMC + select TEGRA_TIMER config TEGRA_ARMV8_COMMON bool "Tegra 64-bit common options" diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 159ba093f2..780441664f 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -15,12 +15,6 @@ #include /* get chip and board defs */ -/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ -#ifndef CONFIG_ARM64 -#define CONFIG_SYS_TIMER_RATE 100 -#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE -#endif - /* Environment */ /* -- 2.34.1
[PATCH v2 2/3] drivers: timer: add timer driver for ARMv7 based Tegra devices
Add timer support for T20/T30/T114 and T124 based devices.
Driver is based on DM, has device tree support and can be
used on SPL and early boot stage.
Tested-by: Andreas Westman Dorcsak # ASUS TF600T T30
Tested-by: Jonas Schwöbel # Surface RT T30
Tested-by: Robert Eckelmann # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel # LG P895 T30
Co-developed-by: Jonas Schwöbel
Signed-off-by: Jonas Schwöbel
Signed-off-by: Svyatoslav Ryhel
---
drivers/timer/Kconfig | 8 +++
drivers/timer/Makefile | 1 +
drivers/timer/tegra-timer.c | 124
3 files changed, 133 insertions(+)
create mode 100644 drivers/timer/tegra-timer.c
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 6d6665005c..f32bd16227 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -252,6 +252,14 @@ config STM32_TIMER
Select this to enable support for the timer found on
STM32 devices.
+config TEGRA_TIMER
+ bool "Tegra timer support"
+ depends on TIMER
+ select TIMER_EARLY
+ help
+ Select this to enable support for the timer found on
+ Tegra devices.
+
config X86_TSC_TIMER
bool "x86 Time-Stamp Counter (TSC) timer support"
depends on TIMER && X86
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index 6470fd5426..3c92113fc6 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_SP804_TIMER) += sp804_timer.o
obj-$(CONFIG_$(SPL_)SIFIVE_CLINT) += sifive_clint_timer.o
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
obj-$(CONFIG_STM32_TIMER) += stm32_timer.o
+obj-$(CONFIG_TEGRA_TIMER) += tegra-timer.o
obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
obj-$(CONFIG_MTK_TIMER)+= mtk_timer.o
obj-$(CONFIG_MCHP_PIT64B_TIMER)+= mchp-pit64b-timer.o
diff --git a/drivers/timer/tegra-timer.c b/drivers/timer/tegra-timer.c
new file mode 100644
index 00..cda460921f
--- /dev/null
+++ b/drivers/timer/tegra-timer.c
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Svyatoslav Ryhel
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#define TEGRA_OSC_CLK_ENB_L_SET(NV_PA_CLK_RST_BASE + 0x320)
+#define TEGRA_OSC_SET_CLK_ENB_TMR BIT(5)
+
+#define TEGRA_TIMER_USEC_CNTR (NV_PA_TMRUS_BASE + 0)
+#define TEGRA_TIMER_USEC_CFG (NV_PA_TMRUS_BASE + 4)
+
+#define TEGRA_TIMER_RATE 100 /* 1 MHz */
+
+u64 notrace timer_early_get_count(void)
+{
+ /* At this stage raw timer is used */
+ return readl(TEGRA_TIMER_USEC_CNTR);
+}
+
+unsigned long notrace timer_early_get_rate(void)
+{
+ return TEGRA_TIMER_RATE;
+}
+
+#if CONFIG_IS_ENABLED(BOOTSTAGE)
+ulong timer_get_boot_us(void)
+{
+ u64 ticks = 0;
+ int ret;
+
+ ret = dm_timer_init();
+ if (!ret)
+ timer_get_count(gd->timer, );
+ else
+ ticks = timer_early_get_count();
+
+ return ticks;
+}
+#endif
+
+static notrace u64 tegra_timer_get_count(struct udevice *dev)
+{
+ u32 val = timer_early_get_count();
+ return timer_conv_64(val);
+}
+
+static int tegra_timer_probe(struct udevice *dev)
+{
+ struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ u32 usec_config, value;
+
+ /* Timer rate has to be set unconditionally */
+ uc_priv->clock_rate = TEGRA_TIMER_RATE;
+
+ /*
+* Configure microsecond timers to have 1MHz clock
+* Config register is 0xqqww, where qq is "dividend", ww is "divisor"
+* Uses n+1 scheme
+*/
+ switch (clock_get_osc_freq()) {
+ case CLOCK_OSC_FREQ_13_0:
+ usec_config = 0x000c; /* (12+1)/(0+1) */
+ break;
+ case CLOCK_OSC_FREQ_19_2:
+ usec_config = 0x045f; /* (95+1)/(4+1) */
+ break;
+ case CLOCK_OSC_FREQ_12_0:
+ usec_config = 0x000b; /* (11+1)/(0+1) */
+ break;
+ case CLOCK_OSC_FREQ_26_0:
+ usec_config = 0x0019; /* (25+1)/(0+1) */
+ break;
+ case CLOCK_OSC_FREQ_16_8:
+ usec_config = 0x0453; /* (83+1)/(4+1) */
+ break;
+ case CLOCK_OSC_FREQ_38_4:
+ usec_config = 0x04bf; /* (191+1)/(4+1) */
+ break;
+ case CLOCK_OSC_FREQ_48_0:
+ usec_config = 0x002f; /* (47+1)/(0+1) */
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* Enable clock to timer hardware */
+ value = readl_relaxed(TEGRA_OSC_CLK_ENB_L_SET);
+ writel_relaxed(value | TEGRA_OSC_SET_CLK_ENB_TMR,
+ TEGRA_OSC_CLK_ENB_L_SET);
+
+ writel_relaxed(usec_config, TEGRA_TIMER_USEC_CFG);
+
+ return 0;
+}
+
+static const struct timer_ops tegra_timer_ops = {
+ .get_count = tegra_timer_get_count,
+};
+
+static const struct
[PATCH v2 1/3] ARM: tegra: remap clock_osc_freq for all Tegra family
Enum clock_osc_freq was designed to use only with T20.
This patch remaps it to use additional frequencies, added in
T30+ SoC while maintaining backwards compatibility with T20.
Tested-by: Andreas Westman Dorcsak # ASUS TF600T T30
Tested-by: Jonas Schwöbel # Surface RT T30
Tested-by: Robert Eckelmann # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel # LG P895 T30
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/include/asm/arch-tegra/clock.h | 9 ++--
arch/arm/mach-tegra/clock.c | 17 --
arch/arm/mach-tegra/cpu.c | 70 -
arch/arm/mach-tegra/tegra114/clock.c| 13 ++---
arch/arm/mach-tegra/tegra124/clock.c| 13 ++---
arch/arm/mach-tegra/tegra20/clock.c | 4 +-
arch/arm/mach-tegra/tegra210/clock.c| 22 ++--
arch/arm/mach-tegra/tegra30/clock.c | 10 +---
drivers/usb/host/ehci-tegra.c | 46
9 files changed, 131 insertions(+), 73 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra/clock.h
b/arch/arm/include/asm/arch-tegra/clock.h
index 6586015fd2..1dd5d0742c 100644
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -13,12 +13,13 @@ struct udevice;
/* Set of oscillator frequencies supported in the internal API. */
enum clock_osc_freq {
/* All in MHz, so 13_0 is 13.0MHz */
- CLOCK_OSC_FREQ_13_0,
- CLOCK_OSC_FREQ_19_2,
- CLOCK_OSC_FREQ_12_0,
- CLOCK_OSC_FREQ_26_0,
+ CLOCK_OSC_FREQ_13_0 = 0,
+ CLOCK_OSC_FREQ_16_8,
+ CLOCK_OSC_FREQ_19_2 = 4,
CLOCK_OSC_FREQ_38_4,
+ CLOCK_OSC_FREQ_12_0 = 8,
CLOCK_OSC_FREQ_48_0,
+ CLOCK_OSC_FREQ_26_0 = 12,
CLOCK_OSC_FREQ_COUNT,
};
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 77c8ad978e..11bffc1701 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -28,16 +28,23 @@
static unsigned pll_rate[CLOCK_ID_COUNT];
/*
- * The oscillator frequency is fixed to one of four set values. Based on this
+ * The oscillator frequency is fixed to one of seven set values. Based on this
* the other clocks are set up appropriately.
*/
static unsigned osc_freq[CLOCK_OSC_FREQ_COUNT] = {
1300,
+ 1680,
+ 0,
+ 0,
1920,
- 1200,
- 2600,
3840,
+ 0,
+ 0,
+ 1200,
4800,
+ 0,
+ 0,
+ 2600,
};
/* return 1 if a peripheral ID is in range */
@@ -766,6 +773,7 @@ void tegra30_set_up_pllp(void)
*/
switch (clock_get_osc_freq()) {
case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */
+ case CLOCK_OSC_FREQ_48_0: /* OSC is 48Mhz */
clock_set_rate(CLOCK_ID_PERIPH, 408, 12, 0, 8);
clock_set_rate(CLOCK_ID_CGENERAL, 456, 12, 1, 8);
break;
@@ -776,10 +784,13 @@ void tegra30_set_up_pllp(void)
break;
case CLOCK_OSC_FREQ_13_0: /* OSC is 13Mhz */
+ case CLOCK_OSC_FREQ_16_8: /* OSC is 16.8Mhz */
clock_set_rate(CLOCK_ID_PERIPH, 408, 13, 0, 8);
clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8);
break;
+
case CLOCK_OSC_FREQ_19_2:
+ case CLOCK_OSC_FREQ_38_4:
default:
/*
* These are not supported. It is too early to print a
diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c
index 65b15b79fe..59ca8aeaba 100644
--- a/arch/arm/mach-tegra/cpu.c
+++ b/arch/arm/mach-tegra/cpu.c
@@ -55,11 +55,18 @@ struct clk_pll_table
tegra_pll_x_table[TEGRA_SOC_CNT][CLOCK_OSC_FREQ_COUNT] = {
*/
{
{ .n = 1000, .m = 13, .p = 0, .cpcon = 12 }, /* OSC: 13.0 MHz */
+ { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* N/A */
+ { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* N/A */
+ { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* N/A */
{ .n = 625, .m = 12, .p = 0, .cpcon = 8 }, /* OSC: 19.2 MHz */
+ { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* N/A */
+ { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* N/A */
+ { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* N/A */
{ .n = 1000, .m = 12, .p = 0, .cpcon = 12 }, /* OSC: 12.0 MHz */
+ { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* N/A */
+ { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* N/A */
+ { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* N/A */
{ .n = 1000, .m = 26, .p = 0, .cpcon = 12 }, /* OSC: 26.0 MHz */
- { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* OSC: 38.4 MHz
(N/A) */
- { .n =0, .m = 0, .p = 0, .cpcon = 0 }, /* OSC: 48.0 MHz
(N/A) */
},
/*
* T25: 1.2 GHz
@@ -73,11 +80,18 @@ struct clk_pll_table
[PATCH v1 0/3] Implement Tegra Timer with dependencies
This is re-send of v1 patches. Almost a month passed, I got no review and timer implementation deadline is approaching. - rework clock_osc_freq detection as it is needed for timer - implement timer for ARMv7 Tegra devices - set timer to be selected automatically Svyatoslav Ryhel (3): ARM: tegra: remap clock_osc_freq for all Tegra family drivers: timer: add timer driver for ARMv7 based Tegra devices ARM: tegra: include timer as default option arch/arm/Kconfig| 1 + arch/arm/include/asm/arch-tegra/clock.h | 9 +- arch/arm/mach-tegra/Kconfig | 2 + arch/arm/mach-tegra/clock.c | 17 +++- arch/arm/mach-tegra/cpu.c | 70 ++--- arch/arm/mach-tegra/tegra114/clock.c| 13 +-- arch/arm/mach-tegra/tegra124/clock.c| 13 +-- arch/arm/mach-tegra/tegra20/clock.c | 4 +- arch/arm/mach-tegra/tegra210/clock.c| 22 + arch/arm/mach-tegra/tegra30/clock.c | 10 +- drivers/timer/Kconfig | 8 ++ drivers/timer/Makefile | 1 + drivers/timer/tegra-timer.c | 124 drivers/usb/host/ehci-tegra.c | 46 +++-- include/configs/tegra-common.h | 6 -- 15 files changed, 267 insertions(+), 79 deletions(-) create mode 100644 drivers/timer/tegra-timer.c -- 2.34.1
Re: [PATCH 09/12] board: ti: j784s4: Add board support for J784S4 SoC
On Sat, Nov 19, 2022 at 12:59:30PM -0600, Hari Nagalla wrote:
> Add board support for J784S4 SoC.
>
> Signed-off-by: Hari Nagalla
Patches 9, 11 and 12 should be folded together as it's all adding the
board itself.
[snip]
> diff --git a/board/ti/j784s4/evm.c b/board/ti/j784s4/evm.c
> new file mode 100644
> index 00..155abe53ca
> --- /dev/null
> +++ b/board/ti/j784s4/evm.c
[snip]
> +#ifdef CONFIG_SPL_LOAD_FIT
> +int board_fit_config_name_match(const char *name)
> +{
> + if (!strcmp(name, "J784S4X-EVM"))
> + return 0;
> +
> + return -1;
> +}
> +#endif
> +
> +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
> +int ft_board_setup(void *blob, struct bd_info *bd)
> +{
> + int ret;
> +
> + ret = fdt_fixup_msmc_ram(blob, "/bus@10", "sram@7000");
> + if (ret < 0)
> + ret = fdt_fixup_msmc_ram(blob, "/interconnect@10",
> + "sram@7000");
> + if (ret)
> + printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
> +
> + return ret;
> +}
> +#endif
> +
> +#ifdef CONFIG_TI_I2C_BOARD_DETECT
> +int do_board_detect(void)
> +{
> + int ret;
> +
> + ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
> + CONFIG_EEPROM_CHIP_ADDRESS);
> + if (ret)
> + pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
> +CONFIG_EEPROM_CHIP_ADDRESS, ret);
> +
> + return ret;
> +}
> +
> +int checkboard(void)
> +{
> + struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
> +
> + if (do_board_detect())
> + /* EEPROM not populated */
> + printf("Board: %s rev %s\n", "J784S4-EVM", "E1");
> + else
> + printf("Board: %s rev %s\n", ep->name, ep->version);
> +
> + return 0;
> +}
> +
> +static void setup_board_eeprom_env(void)
> +{
> + char *name = "j784s4";
> +
> + if (do_board_detect())
> + goto invalid_eeprom;
> +
> + if (board_is_j784s4_evm())
> + name = "j784s4";
> + else
> + printf("Unidentified board claims %s in eeprom header\n",
> +board_ti_get_name());
> +
> +invalid_eeprom:
> + set_board_info_env_am6(name);
> +}
> +
> +static void setup_serial(void)
> +{
> + struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
> + unsigned long board_serial;
> + char *endp;
> + char serial_string[17] = { 0 };
> +
> + if (env_get("serial#"))
> + return;
> +
> + board_serial = simple_strtoul(ep->serial, , 16);
> + if (*endp != '\0') {
> + pr_err("Error: Can't set serial# to %s\n", ep->serial);
> + return;
> + }
> +
> + snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
> + env_set("serial#", serial_string);
> +}
> +#endif
How much of all of this is required to get the system up and load the
OS/etc and go? We want to avoid the big nest of board code to find
daughtercards and so forth that makes custom platforms such a challenge.
As much of that logic that can be done in environment scripts (and to
repeat my just made in another thread comment, in the text based
environment instead, which should make writing it easier) should be done
that way instead.
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH 03/12] arm: K3: Add basic support for J784S4 SoC definition
On Sat, Nov 19, 2022 at 12:59:24PM -0600, Hari Nagalla wrote:
> Add basic support for J784S4 SoC definition
>
> Signed-off-by: Hari Nagalla
> Signed-off-by: Apurva Nandan
> Signed-off-by: Bryan Bratloff
> Signed-off-by: Nishant Menon
[snip]
> diff --git a/include/configs/j784s4_evm.h b/include/configs/j784s4_evm.h
> new file mode 100644
> index 00..c05c16bea1
> --- /dev/null
> +++ b/include/configs/j784s4_evm.h
> @@ -0,0 +1,146 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Configuration header file for K3 J784S4 EVM
> + *
> + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> + * Hari Nagalla
> + */
> +
> +#ifndef __CONFIG_J784S4_EVM_H
> +#define __CONFIG_J784S4_EVM_H
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
Note that while we do enable DISTRO_DEFAULTS later (and this file should
be in that patch), we don't use it. Which isn't great, but isn't a huge
problem.
> +/* U-Boot general configuration */
> +#define EXTRA_ENV_J784S4_BOARD_SETTINGS
> \
> + "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
> + "findfdt=" \
> + "setenv name_fdt ${default_device_tree};" \
> + "setenv fdtfile ${name_fdt}\0" \
> + "name_kern=Image\0" \
> + "console=ttyS2,115200n8\0" \
> + "args_all=setenv optargs earlycon=ns16550a,mmio32,0x0288 " \
> + "${mtdparts}\0" \
> + "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
> +
> +#define PARTS_DEFAULT \
> + /* Linux partitions */ \
> + "uuid_disk=${uuid_gpt_disk};" \
> + "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
> +
> +#ifdef CONFIG_SYS_K3_SPL_ATF
> +#if defined(CONFIG_TARGET_J784S4_R5_EVM)
> +#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
> + "addr_mcur5f0_0load=0x8900\0" \
> + "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"
> +#elif defined(CONFIG_TARGET_J7200_R5_EVM)
> +#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
> + "addr_mcur5f0_0load=0x8900\0" \
> + "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0"
> +#endif /* CONFIG_TARGET_J784S4_R5_EVM */
> +#else
> +#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC ""
> +#endif /* CONFIG_SYS_K3_SPL_ATF */
> +
> +/* U-Boot MMC-specific configuration */
> +#define EXTRA_ENV_J784S4_BOARD_SETTINGS_MMC \
> + "boot=mmc\0"\
> + "mmcdev=1\0"\
> + "bootpart=1:2\0"\
> + "bootdir=/boot\0" \
> + EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
> + "rd_spec=-\0" \
> + "init_mmc=run args_all args_mmc\0" \
> + "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
> + "get_overlay_mmc=" \
> + "fdt address ${fdtaddr};" \
> + "fdt resize 0x10;" \
> + "for overlay in $name_overlays;"\
> + "do;" \
> + "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && "
> \
> + "fdt apply ${dtboaddr};"\
> + "done;\0" \
> + "partitions=" PARTS_DEFAULT \
> + "get_kern_mmc=load mmc ${bootpart} ${loadaddr} "\
> + "${bootdir}/${name_kern}\0" \
> + "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
> + "${bootdir}/${name_fit}\0" \
> + "partitions=" PARTS_DEFAULT
> +
> +/* Set the default list of remote processors to boot */
> +#if defined(CONFIG_TARGET_J784S4_A72_EVM) ||
> defined(CONFIG_TARGET_J7200_A72_EVM)
> +#ifdef DEFAULT_RPROCS
> +#undef DEFAULT_RPROCS
> +#endif
> +#endif
> +
> +#ifdef CONFIG_TARGET_J784S4_A72_EVM
> +#define DEFAULT_RPROCS ""
> \
> + "2 /lib/firmware/j784s4-main-r5f0_0-fw "
> \
> + "3 /lib/firmware/j784s4-main-r5f0_1-fw "
> \
> + "4 /lib/firmware/j784s4-main-r5f1_0-fw "
> \
> + "5 /lib/firmware/j784s4-main-r5f1_1-fw "
[PATCH 2/2] include: configs: soc64: Update source command format
From: Yau Wai Gan
HSD #1509829545-2: U-boot script is in FIT image, this requires to update the
source command to
supply the FIT subimage name.
Signed-off-by: Yau Wai Gan
Signed-off-by: Jit Loon Lim
---
include/configs/socfpga_soc64_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/socfpga_soc64_common.h
b/include/configs/socfpga_soc64_common.h
index 552a922e39..5939f13231 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -91,7 +91,7 @@
"scriptaddr=0x0210\0" \
"scriptfile=u-boot.scr\0" \
"fatscript=if fatload mmc 0:1 ${scriptaddr} ${scriptfile};" \
- "then source ${scriptaddr}; fi\0" \
+ "then source ${scriptaddr}:script; fi\0" \
"nandfitboot=setenv bootargs " CONFIG_BOOTARGS \
" root=${nandroot} rw rootwait rootfstype=jffs2; " \
"bootm ${loadaddr}\0" \
--
2.26.2
[PATCH 1/2] arm: dts: soc64: Add U-boot script in FIT Image
From: Yau Wai Gan
HSD #1509829545-1: Build u-boot script in FIT image format to align with binman
usage.
Signed-off-by: Yau Wai Gan
Signed-off-by: Jit Loon Lim
---
arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi | 23 ++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi
b/arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi
index 84b91e8df0..d72855ea47 100644
--- a/arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi
@@ -14,6 +14,29 @@
};
{
+ u-boot-script {
+ filename = "u-boot.scr";
+ fit {
+ description = "FIT image for u-boot script";
+ #address-cells = <1>;
+
+ images {
+ script {
+ description = "U-Boot script";
+ type = "script";
+ compression = "none";
+ data: blob-ext {
+ filename = "u-boot.txt";
+ };
+
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+ };
+ };
+
u-boot {
filename = "u-boot.itb";
fit {
--
2.26.2
[PATCH] include: configs: soc64: Disable SPL load U-Boot image using raw method
From: Sin Hui Kho Since u-boot raw image is no longer supported, SPL will not use raw method to load u-boot raw image. This changes is applicable for all Intel SOC64 device for NAND boot. Signed-off-by: Sin Hui Kho Signed-off-by: Jit Loon Lim --- include/configs/socfpga_soc64_common.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 170b647826..552a922e39 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -37,9 +37,6 @@ * NAND support */ #ifdef CONFIG_NAND_DENALI -#ifndef CONFIG_SPL_FIT -#define CONFIG_SPL_NAND_RAW_ONLY -#endif #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 1 -- 2.26.2
Re: [PATCH] lib: zlib: Use post-increment only in inffast.c.
On Sun, Sep 11, 2022 at 04:46:37PM +0800, Jit Loon Lim wrote: > From: Chin Liang See > > An old inffast.c optimization turns out to not be optimal anymore > with modern compilers, and furthermore was not compliant with the > C standard, for which decrementing a pointer before its allocated > memory is undefined. Per the recommendation of a security audit of > the zlib code by Trail of Bits and TrustInSoft, in support of the > Mozilla Foundation, this "optimization" was removed, in order to > avoid the possibility of undefined behavior. > > This is a backport of commit 9aaec95e82117 from the upstream zlib > project. > > Signed-off-by: Mark Adler > Signed-off-by: Chin Liang See > Signed-off-by: Jit Loon Lim I was about to apply this with a slightly updated commit message and then I discovered that this causes at least the following tests to fail in CI on sandbox: FAILED test/py/tests/test_fit.py::test_fit - AssertionError: Kernel not loaded FAILED test/py/tests/test_ut.py::test_ut[ut_dm_dm_test_video_bmp16] - ValueError: U-Boot exi... FAILED test/py/tests/test_ut.py::test_ut[ut_dm_dm_test_video_bmp24] - ValueError: U-Boot exi... FAILED test/py/tests/test_ut.py::test_ut[ut_dm_dm_test_video_bmp24_32] - ValueError: U-Boot ... FAILED test/py/tests/test_fs/test_squashfs/test_sqfs_load.py::test_sqfs_load - AssertionError FAILED test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py::test_sqfs_ls - AssertionError Given that the sqfs ones are saying the data is corrupt, I'm unsure if the problem is the code or the patch here. -- Tom signature.asc Description: PGP signature
[PATCH] configs: socfpga: Wrapping up function ID for SMC register access
From: Tien Fong Chee
Wrapping up function ID for SMC register access, so that all details
such as write / read / update function ID can be wrapped up. User
can direct running SMC command with wrapped function ID into
environment variables without bothering respective register access
function ID.
Signed-off-by: Tien Fong Chee
Signed-off-by: Jit Loon Lim
---
include/configs/socfpga_soc64_common.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/configs/socfpga_soc64_common.h
b/include/configs/socfpga_soc64_common.h
index 7edffc3975..170b647826 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -99,7 +99,12 @@
" root=${nandroot} rw rootwait rootfstype=jffs2; " \
"bootm ${loadaddr}\0" \
"nandfitload=nand read ${loadaddr} kernel\0" \
- "socfpga_legacy_reset_compat=1\0"
+ "socfpga_legacy_reset_compat=1\0" \
+ "rsu_status=rsu dtb; rsu display_dcmf_version; "\
+ "rsu display_dcmf_status; rsu display_max_retry\0" \
+ "smc_fid_rd=0xC207\0" \
+ "smc_fid_wr=0xC208\0" \
+ "smc_fid_upd=0xC209\0 " \
/*
* External memory configurations
--
2.26.2
[PATCH] configs: socfpga: n5x: Enables required configs for DDR retention
From: Tien Fong Chee Enables required configs to support DDR retention. including generic firmware loader for loading backup calibration data, and SHA384 checking. Signed-off-by: Tien Fong Chee Signed-off-by: Jit Loon Lim --- configs/socfpga_n5x_atf_defconfig | 5 + configs/socfpga_n5x_defconfig | 6 ++ configs/socfpga_n5x_vab_defconfig | 5 + 3 files changed, 16 insertions(+) diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 577c13e297..d4e77f8147 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -95,3 +95,8 @@ CONFIG_DESIGNWARE_WATCHDOG=y CONFIG_WDT=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_PANIC_HANG=y +CONFIG_SHA512_ALGO=y +CONFIG_SHA384=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_FS_LOADER=y +CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 30747e389b..ede28f530e 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -83,3 +83,9 @@ CONFIG_CMD_WDT=y CONFIG_WDT=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_PANIC_HANG=y +CONFIG_SHA512_ALGO=y +CONFIG_SHA384=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_FS_LOADER=y +CONFIG_SPL_ENV_SUPPORT=y + diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index a98c87147f..d2de1eccf5 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -97,3 +97,8 @@ CONFIG_WDT=y CONFIG_CMD_WDT=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_PANIC_HANG=y +CONFIG_SHA512_ALGO=y +CONFIG_SHA384=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_FS_LOADER=y +CONFIG_SPL_ENV_SUPPORT=y -- 2.26.2
[PATCH] include: configs: soc64: Use CONFIG_SPL_ATF to differentiate bootfile
From: Siew Chin Lim Legacy boot flow (SPL->U-Boot Proper->OS) boot to OS via Kernel Image and dtb files using booti command. ATF boot flow (SPL->ATF->U-Boot Proper->OS) boot to OS via kernel.itb file using bootm command. Change to use CONFIG_SPL_ATF to differentiate the bootfile of default environment variable. We shouldn't use CONFIG_FIT because it is enabled by default for U-Boot Proper. Signed-off-by: Siew Chin Lim Signed-off-by: Jit Loon Lim --- include/configs/socfpga_soc64_common.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 12da770077..7edffc3975 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -50,6 +50,13 @@ /* * Environment variable */ + +#if IS_ENABLED(CONFIG_SPL_ATF) +#define CONFIG_BOOTFILE "kernel.itb" +#else +#define CONFIG_BOOTFILE "Image" +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ "qspibootimageaddr=0x020E\0" \ "qspifdtaddr=0x020D\0" \ -- 2.26.2
[PATCH] configs: defconfig: Boot to OS via FIT Image for N5X
From: Siew Chin Lim Update to boot OS via FIT image from N5X and enable FIT signature check via crc32 algorithm. And, remove CONFIGs for emulation only. Signed-off-by: Siew Chin Lim Signed-off-by: Jit Loon Lim --- configs/socfpga_n5x_atf_defconfig | 4 +++- configs/socfpga_n5x_vab_defconfig | 3 +++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index d2598b9fb3..577c13e297 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -18,6 +18,8 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_FIT_SIGNATURE_MAX_SIZE=0x1000 +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x0200 # CONFIG_USE_SPL_FIT_GENERATOR is not set @@ -25,7 +27,7 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" +CONFIG_BOOTCOMMAND="run fatscript;run mmcload;run linux_qspi_enable;run rsu_status;run mmcboot;run mmcfitboot" CONFIG_SPL_MAX_SIZE=0x4 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff0 diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 977a90d493..a98c87147f 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -19,6 +19,9 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_SIGNATURE_MAX_SIZE=0x1000 +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x0200 # CONFIG_USE_SPL_FIT_GENERATOR is not set -- 2.26.2
Re: [PATCH] Revert "lib: sparse: Make CHUNK_TYPE_RAW buffer aligned"
On 11/21/22 09:50, Gary Bisson wrote: > Hi, > > On Fri, Nov 18, 2022 at 10:36:58AM -0500, Sean Anderson wrote: >> On 11/18/22 07:13, Gary Bisson wrote: >> > This reverts commit 62649165cb02ab95b57360bb362886935f524f26. >> > >> > The patch decreased the write performance quite a bit. >> > Here is an example on an i.MX 8M Quad platform. >> > - Before the revert: >> > Sending sparse 'vendor' 1/2 (516436 KB)OKAY [ 5.113s] >> > Writing 'vendor' OKAY [128.335s] >> > Sending sparse 'vendor' 2/2 (76100 KB) OKAY [ 0.802s] >> > Writing 'vendor' OKAY [ 27.902s] >> > - After the revert: >> > Sending sparse 'vendor' 1/2 (516436 KB)OKAY [ 5.310s] >> > Writing 'vendor' OKAY [ 18.041s] >> > Sending sparse 'vendor' 2/2 (76100 KB) OKAY [ 1.244s] >> > Writing 'vendor' OKAY [ 2.663s] >> > >> > Considering that the patch only moves buffer around to avoid a warning >> > message about misaligned buffers, let's keep the best performances. >> >> So what is the point of this warning? > > Well the warning does say something true that the cache operation is not > aligned. Better ask Simon as he's the one who changed the print from a > debug to warn_non_spl one: > bcc53bf0958 arm: Show cache warnings in U-Boot proper only > > BTW, in my case I couldn't see the misaligned messages, yet I saw the > performance hit described above. Maybe it is better to keep this as a Kconfig? Some arches may support unaligned access but others may not. I wonder if we have something like this already. --Seam
Re: [PATCH] rtc: add ht1380 driver
On Mon, Nov 21, 2022 at 05:47:16PM +0300, Sergei Antonov wrote:
> On Wed, 26 Oct 2022 at 14:34, Sergei Antonov wrote:
> >
> > On Wed, 26 Oct 2022 at 02:35, Simon Glass wrote:
> >
> > > > +static void ht1380_half_period_delay(void)
> > > > +{
> > > > + /* Delay for half a period. 1 us complies with the 500 KHz
> > > > maximum
> > > > + input serial clock limit given by the datasheet. */
> > >
> > > /*
> > > * Delay for half...
> > > * second line
> > > */
> > >
> > > Please fix globally.
> >
> > OK. I was confused by doc/develop/codingstyle.rst:
> > * The exception for net files to the `multi-line comment
> > `_
> > applies only to Linux, not to U-Boot.
> > What is the U-Boot style of multi-line comments remains a mystery to me.
>
> Tom,
> could you please clarify what is U-Boot style for multi-line comments?
> I can not draw it from doc/develop/codingstyle.rst
I'll make an attempt at re-wording the line there, but, per:
https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting
/*
* It should be
* like this.
*/
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] Revert "lib: sparse: Make CHUNK_TYPE_RAW buffer aligned"
Hi, On Fri, Nov 18, 2022 at 10:36:58AM -0500, Sean Anderson wrote: > On 11/18/22 07:13, Gary Bisson wrote: > > This reverts commit 62649165cb02ab95b57360bb362886935f524f26. > > > > The patch decreased the write performance quite a bit. > > Here is an example on an i.MX 8M Quad platform. > > - Before the revert: > > Sending sparse 'vendor' 1/2 (516436 KB)OKAY [ 5.113s] > > Writing 'vendor' OKAY [128.335s] > > Sending sparse 'vendor' 2/2 (76100 KB) OKAY [ 0.802s] > > Writing 'vendor' OKAY [ 27.902s] > > - After the revert: > > Sending sparse 'vendor' 1/2 (516436 KB)OKAY [ 5.310s] > > Writing 'vendor' OKAY [ 18.041s] > > Sending sparse 'vendor' 2/2 (76100 KB) OKAY [ 1.244s] > > Writing 'vendor' OKAY [ 2.663s] > > > > Considering that the patch only moves buffer around to avoid a warning > > message about misaligned buffers, let's keep the best performances. > > So what is the point of this warning? Well the warning does say something true that the cache operation is not aligned. Better ask Simon as he's the one who changed the print from a debug to warn_non_spl one: bcc53bf0958 arm: Show cache warnings in U-Boot proper only BTW, in my case I couldn't see the misaligned messages, yet I saw the performance hit described above. Regards, Gary
Re: [PATCH] rtc: add ht1380 driver
On Wed, 26 Oct 2022 at 14:34, Sergei Antonov wrote:
>
> On Wed, 26 Oct 2022 at 02:35, Simon Glass wrote:
>
> > > +static void ht1380_half_period_delay(void)
> > > +{
> > > + /* Delay for half a period. 1 us complies with the 500 KHz maximum
> > > + input serial clock limit given by the datasheet. */
> >
> > /*
> > * Delay for half...
> > * second line
> > */
> >
> > Please fix globally.
>
> OK. I was confused by doc/develop/codingstyle.rst:
> * The exception for net files to the `multi-line comment
> `_
> applies only to Linux, not to U-Boot.
> What is the U-Boot style of multi-line comments remains a mystery to me.
Tom,
could you please clarify what is U-Boot style for multi-line comments?
I can not draw it from doc/develop/codingstyle.rst
[PATCH] arm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux function
From: Siew Chin Lim Move 'linux_qspi_enable' from bootcommand to board_prep_linux function when OS booted from FIT image for Stratix 10 and Agilex. This flow is common for all Intel SOC64 devices. U-Boot will update 'fdt_addr' environment value based on FIT image in board_prep_linux function, and 'linux_qspi_enable' will refer to 'fdt_addr' environment value to retrieve the device tree node. Signed-off-by: Siew Chin Lim Signed-off-by: Jit Loon Lim --- configs/socfpga_agilex_nand_atf_defconfig| 2 +- configs/socfpga_agilex_qspi_atf_defconfig| 2 +- configs/socfpga_stratix10_nand_atf_defconfig | 2 +- configs/socfpga_stratix10_qspi_atf_defconfig | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/configs/socfpga_agilex_nand_atf_defconfig b/configs/socfpga_agilex_nand_atf_defconfig index 558dda1a2e..fb92ff2514 100755 --- a/configs/socfpga_agilex_nand_atf_defconfig +++ b/configs/socfpga_agilex_nand_atf_defconfig @@ -26,7 +26,7 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1" CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run nandfitload; run linux_qspi_enable; run rsu_status; run nandfitboot" +CONFIG_BOOTCOMMAND="run nandfitload; run rsu_status; run nandfitboot" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_CACHE=y diff --git a/configs/socfpga_agilex_qspi_atf_defconfig b/configs/socfpga_agilex_qspi_atf_defconfig index 745aac3c5c..9d97d34c77 100755 --- a/configs/socfpga_agilex_qspi_atf_defconfig +++ b/configs/socfpga_agilex_qspi_atf_defconfig @@ -27,7 +27,7 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1" CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="sf probe;run qspifitload;run linux_qspi_enable;run rsu_status;run qspifitboot" +CONFIG_BOOTCOMMAND="sf probe;run qspifitload;run rsu_status;run qspifitboot" CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_ATF=y diff --git a/configs/socfpga_stratix10_nand_atf_defconfig b/configs/socfpga_stratix10_nand_atf_defconfig index 7eb956733c..a3fd9742e8 100755 --- a/configs/socfpga_stratix10_nand_atf_defconfig +++ b/configs/socfpga_stratix10_nand_atf_defconfig @@ -27,7 +27,7 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1" CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run nandfitload; run linux_qspi_enable; run rsu_status; run nandfitboot" +CONFIG_BOOTCOMMAND="run nandfitload; run rsu_status; run nandfitboot" CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/socfpga_stratix10_qspi_atf_defconfig b/configs/socfpga_stratix10_qspi_atf_defconfig index 5f42c17d47..d9e55de4dc 100755 --- a/configs/socfpga_stratix10_qspi_atf_defconfig +++ b/configs/socfpga_stratix10_qspi_atf_defconfig @@ -27,7 +27,7 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1" CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="sf probe;run qspifitload;run linux_qspi_enable;run rsu_status;run qspifitboot" +CONFIG_BOOTCOMMAND="sf probe;run qspifitload;run rsu_status;run qspifitboot" CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -- 2.26.2
[PATCH] configs: defconfig: Load OS via FIT image in QSPI ATF boot for Stratix 10 and Agilex
From: Siew Chin Lim
Update to load OS via FIT image in Stratix 10 and Agilex QSPI ATF boot flow.
And, enable FIT signature checking with crc32 algorithm.
Signed-off-by: Siew Chin Lim
Signed-off-by: Jit Loon Lim
---
configs/socfpga_agilex_qspi_atf_defconfig| 6 +-
configs/socfpga_stratix10_qspi_atf_defconfig | 6 +-
include/configs/socfpga_soc64_common.h | 3 +++
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/configs/socfpga_agilex_qspi_atf_defconfig
b/configs/socfpga_agilex_qspi_atf_defconfig
index 0e82873bc1..745aac3c5c 100755
--- a/configs/socfpga_agilex_qspi_atf_defconfig
+++ b/configs/socfpga_agilex_qspi_atf_defconfig
@@ -15,6 +15,10 @@ CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk_qspi"
CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x1000
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_CRC32_SUPPORT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x200
# CONFIG_USE_SPL_FIT_GENERATOR is not set
@@ -23,7 +27,7 @@ CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon panic=-1"
CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="sf probe;run qspiload;run linux_qspi_enable;rsu dtb;run
qspiboot"
+CONFIG_BOOTCOMMAND="sf probe;run qspifitload;run linux_qspi_enable;run
rsu_status;run qspifitboot"
CONFIG_SPL_CACHE=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SPL_ATF=y
diff --git a/configs/socfpga_stratix10_qspi_atf_defconfig
b/configs/socfpga_stratix10_qspi_atf_defconfig
index 16ee4896d0..5f42c17d47 100755
--- a/configs/socfpga_stratix10_qspi_atf_defconfig
+++ b/configs/socfpga_stratix10_qspi_atf_defconfig
@@ -15,6 +15,10 @@ CONFIG_IDENT_STRING="socfpga_stratix10"
CONFIG_SPL_FS_FAT=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk_qspi"
CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x1000
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_CRC32_SUPPORT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x200
# CONFIG_USE_SPL_FIT_GENERATOR is not set
@@ -23,7 +27,7 @@ CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon panic=-1"
CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="sf probe;run qspiload;run linux_qspi_enable;rsu dtb;run
qspiboot"
+CONFIG_BOOTCOMMAND="sf probe;run qspifitload;run linux_qspi_enable;run
rsu_status;run qspifitboot"
CONFIG_SPL_SPI_LOAD=y
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
diff --git a/include/configs/socfpga_soc64_common.h
b/include/configs/socfpga_soc64_common.h
index 2343a315b9..12da770077 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -59,6 +59,9 @@
"sf read ${fdt_addr} ${qspifdtaddr} ${fdtimagesize}\0" \
"qspiboot=setenv bootargs earlycon root=/dev/mtdblock1 rw " \
"rootfstype=jffs2 rootwait;booti ${loadaddr} - ${fdt_addr}\0" \
+ "qspifitload=sf read ${loadaddr} ${qspibootimageaddr}
${bootimagesize}\0" \
+ "qspifitboot=setenv bootargs earlycon root=/dev/mtdblock1 rw " \
+ "rootfstype=jffs2 rootwait;bootm ${loadaddr}\0" \
"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"bootfile=" CONFIG_BOOTFILE "\0" \
"fdt_addr=800\0" \
--
2.26.2
[PATCH] configs: defconfig: Remove duplicated CONFIG in socfpga_n5x_defconfig
From: Siew Chin Lim Remove duplicated CONFIG in socfpga_n5x_defconfig. Signed-off-by: Siew Chin Lim Signed-off-by: Jit Loon Lim --- configs/socfpga_n5x_defconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 4971acab8c..30747e389b 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -20,8 +20,6 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_BOOTCOMMAND="run fatscript;run mmcload;run linux_qspi_enable;run rsu_status;run mmcboot" CONFIG_SPL_MAX_SIZE=0x4 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -- 2.26.2
Re: [PATCH v2 2/3] clk: stm32mp13: introduce STM32MP13 RCC driver
On 11/21/22 08:00, Gabriel FERNANDEZ wrote:
On 11/8/22 02:59, Sean Anderson wrote:
On 10/26/22 12:44, Gabriel Fernandez wrote:
Introduce STM32MP13 RCC driver using Common Clock Framework.
Please augment this commit message with some of the explanations you sent last
time.
ok
Signed-off-by: Gabriel Fernandez
Reviewed-by: Patrick Delaunay
Tested-by: Patrick Delaunay
---
(no changes since v1)
drivers/clk/stm32/Kconfig | 15 +
drivers/clk/stm32/Makefile | 2 +
drivers/clk/stm32/clk-stm32-core.c | 271 ++
drivers/clk/stm32/clk-stm32-core.h | 223
drivers/clk/stm32/clk-stm32mp13.c | 841 +
drivers/clk/stm32/stm32mp13_rcc.h | 288 ++
6 files changed, 1640 insertions(+)
create mode 100644 drivers/clk/stm32/clk-stm32-core.c
create mode 100644 drivers/clk/stm32/clk-stm32-core.h
create mode 100644 drivers/clk/stm32/clk-stm32mp13.c
create mode 100644 drivers/clk/stm32/stm32mp13_rcc.h
diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig
index eac3fc1e9d..7a34ea23c3 100644
--- a/drivers/clk/stm32/Kconfig
+++ b/drivers/clk/stm32/Kconfig
@@ -14,6 +14,12 @@ config CLK_STM32H7
This clock driver adds support for RCC clock management
for STM32H7 SoCs.
+config CLK_STM32_CORE
+ bool "Enable RCC clock core driver for STM32MP"
+ depends on ARCH_STM32MP && CLK
+ select CLK_CCF
+ select CLK_COMPOSITE_CCF
+
config CLK_STM32MP1
bool "Enable RCC clock driver for STM32MP15"
depends on ARCH_STM32MP && CLK
@@ -21,3 +27,12 @@ config CLK_STM32MP1
help
Enable the STM32 clock (RCC) driver. Enable support for
manipulating STM32MP15's on-SoC clocks.
+
+config CLK_STM32MP13
+ bool "Enable RCC clock driver for STM32MP13"
+ depends on ARCH_STM32MP && CLK
+ default y if STM32MP13x
+ select CLK_STM32_CORE
+ help
+ Enable the STM32 clock (RCC) driver. Enable support for
+ manipulating STM32MP13's on-SoC clocks.
diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile
index f66f295403..20afbc3cfc 100644
--- a/drivers/clk/stm32/Makefile
+++ b/drivers/clk/stm32/Makefile
@@ -2,6 +2,8 @@
#
# Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+obj-$(CONFIG_CLK_STM32_CORE) += clk-stm32-core.o
obj-$(CONFIG_CLK_STM32F) += clk-stm32f.o
obj-$(CONFIG_CLK_STM32H7) += clk-stm32h7.o
obj-$(CONFIG_CLK_STM32MP1) += clk-stm32mp1.o
+obj-$(CONFIG_CLK_STM32MP13) += clk-stm32mp13.o
diff --git a/drivers/clk/stm32/clk-stm32-core.c
b/drivers/clk/stm32/clk-stm32-core.c
new file mode 100644
index 00..7b7de6389b
--- /dev/null
+++ b/drivers/clk/stm32/clk-stm32-core.c
@@ -0,0 +1,271 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+ * Author: Gabriel Fernandez for
STMicroelectronics.
+ */
+
+#define LOG_CATEGORY UCLASS_CLK
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "clk-stm32-core.h"
+
+int stm32_rcc_init(struct udevice *dev,
+ const struct stm32_clock_match_data *data)
+{
+ int i;
+ u8 *cpt;
+ struct stm32mp_rcc_priv *priv = dev_get_priv(dev);
+ fdt_addr_t base = dev_read_addr(dev->parent);
+ const struct clk_stm32_clock_data *clock_data = data->clock_data;
+
+ if (base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ priv->base = (void __iomem *)base;
+
+ /* allocate the counter of user for internal RCC gates, commun for several
user */
nit: common
ok
+ cpt = kzalloc(clock_data->num_gates, GFP_KERNEL);
+ if (!cpt)
+ return -ENOMEM;
+
+ priv->gate_cpt = cpt;
+
+ priv->data = clock_data;
+
+ for (i = 0; i < data->num_clocks; i++) {
+ const struct clock_config *cfg = >tab_clocks[i];
+ struct clk *clk = ERR_PTR(-ENOENT);
+
+ if (data->check_security && data->check_security(priv->base, cfg))
+ continue;
+
+ if (cfg->setup) {
+ clk = cfg->setup(dev, cfg);
+ clk->id = cfg->id;
+ } else {
+ dev_err(dev, "failed to register clock %s\n", cfg->name);
+
nit: no need for a blank line here
ok
+ return -ENOENT;
+ }
+ }
+
+ return 0;
+}
+
+ulong clk_stm32_get_rate_by_name(const char *name)
+{
+ struct udevice *dev;
+
+ if (!uclass_get_device_by_name(UCLASS_CLK, name, )) {
+ struct clk *clk = dev_get_clk_ptr(dev);
+
+ return clk_get_rate(clk);
+ }
+
+ return 0;
+}
+
+const struct clk_ops stm32_clk_ops = {
+ .enable = ccf_clk_enable,
+ .disable = ccf_clk_disable,
+ .get_rate = ccf_clk_get_rate,
+ .set_rate = ccf_clk_set_rate,
+};
+
+#define RCC_MP_ENCLRR_OFFSET 4
+
+static void clk_stm32_gate_set_state(void __iomem *base,
+ const struct clk_stm32_clock_data *data,
+ u8 *cpt,
+ u16 gate_id,
+ int enable)
These three can
[PATCH] configs: defconfig: Load OS via FIT image in Stratix 10 and Agilex NAND boot
From: Siew Chin Lim
Update to load OS via FIT image in Stratix 10 and Agilex NAND boot flow.
And, enable FIT signature checking with crc32 algorithm.
Signed-off-by: Siew Chin Lim
Signed-off-by: Jit Loon Lim
---
configs/socfpga_agilex_nand_atf_defconfig| 6 +-
configs/socfpga_stratix10_nand_atf_defconfig | 6 +-
include/configs/socfpga_soc64_common.h | 4
3 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/configs/socfpga_agilex_nand_atf_defconfig
b/configs/socfpga_agilex_nand_atf_defconfig
index 0beec3d8dd..558dda1a2e 100755
--- a/configs/socfpga_agilex_nand_atf_defconfig
+++ b/configs/socfpga_agilex_nand_atf_defconfig
@@ -14,6 +14,10 @@ CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk_nand"
CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x1000
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_CRC32_SUPPORT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x200
# CONFIG_USE_SPL_FIT_GENERATOR is not set
@@ -22,7 +26,7 @@ CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon panic=-1"
CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="run nandload; run linux_qspi_enable; run nandboot"
+CONFIG_BOOTCOMMAND="run nandfitload; run linux_qspi_enable; run rsu_status;
run nandfitboot"
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_CACHE=y
diff --git a/configs/socfpga_stratix10_nand_atf_defconfig
b/configs/socfpga_stratix10_nand_atf_defconfig
index cbb3f88ec2..7eb956733c 100755
--- a/configs/socfpga_stratix10_nand_atf_defconfig
+++ b/configs/socfpga_stratix10_nand_atf_defconfig
@@ -14,6 +14,10 @@ CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
CONFIG_IDENT_STRING="socfpga_stratix10"
CONFIG_SPL_FS_FAT=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk_nand"
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x1000
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_CRC32_SUPPORT=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x200
@@ -23,7 +27,7 @@ CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon panic=-1"
CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="run nandload; run linux_qspi_enable; rsu dtb; run nandboot"
+CONFIG_BOOTCOMMAND="run nandfitload; run linux_qspi_enable; run rsu_status;
run nandfitboot"
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
diff --git a/include/configs/socfpga_soc64_common.h
b/include/configs/socfpga_soc64_common.h
index 8a9f4dc4c9..2343a315b9 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -85,6 +85,10 @@
"scriptfile=u-boot.scr\0" \
"fatscript=if fatload mmc 0:1 ${scriptaddr} ${scriptfile};" \
"then source ${scriptaddr}; fi\0" \
+ "nandfitboot=setenv bootargs " CONFIG_BOOTARGS \
+ " root=${nandroot} rw rootwait rootfstype=jffs2; " \
+ "bootm ${loadaddr}\0" \
+ "nandfitload=nand read ${loadaddr} kernel\0" \
"socfpga_legacy_reset_compat=1\0"
/*
--
2.26.2
[PATCH] arm: socfpga: n5x: Enable all features as in exisiting devices
From: Tien Fong Chee Enable more configurations and features as in Agilex device since all these hardware peripherals no change in N5X compare with Agilex. Signed-off-by: Tien Fong Chee Signed-off-by: Jit Loon Lim --- configs/socfpga_n5x_atf_defconfig | 2 ++ configs/socfpga_n5x_defconfig | 7 +-- configs/socfpga_n5x_vab_defconfig | 4 +++- 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 37c8436318..d2598b9fb3 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -55,6 +55,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y +CONFIG_CMD_MTD=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -70,6 +71,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y +CONFIG_SPL_ALTERA_SDRAM=y CONFIG_MMC_DW=y CONFIG_MTD=y CONFIG_SF_DEFAULT_MODE=0x2003 diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 5f415b7ad4..4971acab8c 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -20,7 +20,9 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" +CONFIG_BOOTCOMMAND="run fatscript;run mmcload;run linux_qspi_enable;run rsu_status;run mmcboot" CONFIG_SPL_MAX_SIZE=0x4 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff0 @@ -44,9 +46,9 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -79,6 +81,7 @@ CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_DESIGNWARE_WATCHDOG=y +CONFIG_CMD_WDT=y CONFIG_WDT=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_PANIC_HANG=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index a57d54a7f2..977a90d493 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -55,7 +55,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -CONFIG_CMD_WDT=y +CONFIG_CMD_MTD=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -71,6 +71,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y +CONFIG_SPL_ALTERA_SDRAM=y CONFIG_MMC_DW=y CONFIG_MTD=y CONFIG_SF_DEFAULT_MODE=0x2003 @@ -90,5 +91,6 @@ CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_DESIGNWARE_WATCHDOG=y CONFIG_WDT=y +CONFIG_CMD_WDT=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_PANIC_HANG=y -- 2.26.2
Re: [Uboot-stm32] [PATCH v2 1/2] usb: hub: allow to increase HUB_DEBOUNCE_TIMEOUT
Hi, On 9/24/22 19:04, Marek Vasut wrote: On 9/12/22 15:37, Patrick DELAUNAY wrote: Hi, Hi, On 9/9/22 14:24, Marek Vasut wrote: On 9/9/22 11:45, Patrick Delaunay wrote: Add a new CONFIG_USB_HUB_DEBOUNCE_TIMEOUT to increase the HUB_DEBOUNCE_TIMEOUT value, for example to 2s because some usb device needs around 1.5s or more to make the hub port status to be connected steadily after being powered off and powered on. This 2s value is aligned with Linux driver and avoids to configure "usb_pgood_delay" as a workaround for connection timeout on some USB device; normally the env variable "usb_pgood_delay" is used to delay the first query after power ON and thus the device answer, but this variable not used to increase the connection timeout delay. I realized this has one problem -- what happens if you have multiple USB controllers in your system ? The answer is, all of them are affected by the increased delay, possibly even those which do not require the extra delay. Would it be possible to configure this per-controller (or should this even be per-device?) in DT ? In fact, I wonder whether this is not becoming a Vbus regulator ramp-up time kind of delay here ? Yes, but I don't think, it is blocking. This timeout will be common for all the USB HUB in the system, as it is done in Linux kernel. I just realized this is not the same delay as the usb_pgood_delay, right ? Yes it is 2 different timeout in USB stack, usb_scan_port() 1/ pgood_delay used in hub->query_delay = get_timer(0) + max(100, (int)pgood_delay); => time before the devices are queried * Don't talk to the device before the query delay is expired. * This is needed for voltages to stabalize. 2/ HUB_DEBOUNCE_TIMEOUT used in hub->connect_timeout = hub->query_delay + HUB_DEBOUNCE_TIMEOUT => timeout (max) for usb_get_port_status() answer OR No connection change happened (portchange/portstatus) This is actually the maximum wait for a device to start communicating, i.e. even if this timeout is set to a very high value, most devices will not take that long and will start communicating in shorter time anyway, so the time of completion for e.g. '=> usb reset' is not affected by this change on very much all systems, correct ? Yes as it is a max value, it is a protection timeout for problematic devices, it should not occur for normal use case, but only when the device are correctly detected on the HUB port... I think the the 'usb reset' sequence is impacted: usb_init => usb_new_device => usb_hub_probe => usb_hub_configure = - usb_hub_power_on() -usb_device_list_scan() But as it is a CONFIG it is a platform choice. Regards ___ Uboot-stm32 mailing list uboot-st...@st-md-mailman.stormreply.com https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32
[PATCH] configs/agilex: enable FPGA Partial Reconfiguration command
From: "Chew, Chiau Ee"
This is to enable config to support FPGA Partial Reconfiguration
command in agilex ATF and non-ATF uboot build.
Signed-off-by: Chew, Chiau Ee
Signed-off-by: Jit Loon Lim
---
configs/socfpga_agilex_atf_defconfig| 1 +
configs/socfpga_agilex_defconfig| 1 +
configs/socfpga_agilex_nand_atf_defconfig | 1 +
..._atf_defconfig => socfpga_agilex_nand_defconfig} | 12 +---
configs/socfpga_agilex_qspi_atf_defconfig | 1 +
..._atf_defconfig => socfpga_agilex_qspi_defconfig} | 13 ++---
configs/socfpga_agilex_vab_defconfig| 1 +
7 files changed, 16 insertions(+), 14 deletions(-)
copy configs/{socfpga_agilex_nand_atf_defconfig =>
socfpga_agilex_nand_defconfig} (89%)
copy configs/{socfpga_agilex_qspi_atf_defconfig =>
socfpga_agilex_qspi_defconfig} (88%)
diff --git a/configs/socfpga_agilex_atf_defconfig
b/configs/socfpga_agilex_atf_defconfig
index bdfe764d9e..cc11fc1912 100644
--- a/configs/socfpga_agilex_atf_defconfig
+++ b/configs/socfpga_agilex_atf_defconfig
@@ -68,6 +68,7 @@ CONFIG_BOOTFILE="kernel.itb"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
+CONFIG_FPGA_INTEL_PR=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index e2d869610c..f7e767fbbe 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -62,6 +62,7 @@ CONFIG_BOOTFILE="Image"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
+CONFIG_FPGA_INTEL_PR=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_agilex_nand_atf_defconfig
b/configs/socfpga_agilex_nand_atf_defconfig
index a3b272d771..0beec3d8dd 100755
--- a/configs/socfpga_agilex_nand_atf_defconfig
+++ b/configs/socfpga_agilex_nand_atf_defconfig
@@ -54,6 +54,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
+CONFIG_FPGA_INTEL_PR=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_agilex_nand_atf_defconfig
b/configs/socfpga_agilex_nand_defconfig
similarity index 89%
copy from configs/socfpga_agilex_nand_atf_defconfig
copy to configs/socfpga_agilex_nand_defconfig
index a3b272d771..5613237ae5 100755
--- a/configs/socfpga_agilex_nand_atf_defconfig
+++ b/configs/socfpga_agilex_nand_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x20
+CONFIG_SYS_TEXT_BASE=0x1000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2
@@ -12,11 +12,10 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_ARMV8_PSCI=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk_nand"
-CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x200
-# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
@@ -27,8 +26,6 @@ CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_ATF=y
-CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
CONFIG_CMD_MEMTEST=y
@@ -54,6 +51,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
+CONFIG_FPGA_INTEL_PR=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_agilex_qspi_atf_defconfig
b/configs/socfpga_agilex_qspi_atf_defconfig
index 8956abae36..0e82873bc1 100755
--- a/configs/socfpga_agilex_qspi_atf_defconfig
+++ b/configs/socfpga_agilex_qspi_atf_defconfig
@@ -49,6 +49,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
CONFIG_SPL_ALTERA_SDRAM=y
+CONFIG_FPGA_INTEL_PR=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_agilex_qspi_atf_defconfig
b/configs/socfpga_agilex_qspi_defconfig
similarity index 88%
copy from configs/socfpga_agilex_qspi_atf_defconfig
copy to configs/socfpga_agilex_qspi_defconfig
index 8956abae36..ee6b7b8660 100755
--- a/configs/socfpga_agilex_qspi_atf_defconfig
+++ b/configs/socfpga_agilex_qspi_defconfig
@@ -1,7 +1,8 @@
CONFIG_ARM=y
+CONFIG_ARM_SMCCC=y
CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_TEXT_BASE=0x20
+CONFIG_SYS_TEXT_BASE=0x1000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
@@ -13,11 +14,10 @@ CONFIG_SPL_TEXT_BASE=0xFFE0
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_ARMV8_PSCI=y
[PATCH] configs: Enable ATF support for QSPI & NAND boot
From: Chee Hong Ang HSD #1508277418: Add defconfigs with ATF support for QSPI and NAND boot on Stratix10 and Agilex platforms. Signed-off-by: Chee Hong Ang Signed-off-by: Jit Loon Lim --- configs/socfpga_agilex_nand_atf_defconfig| 88 +++ configs/socfpga_agilex_qspi_atf_defconfig| 76 + configs/socfpga_stratix10_nand_atf_defconfig | 90 configs/socfpga_stratix10_qspi_atf_defconfig | 77 + include/configs/socfpga_soc64_common.h | 22 + 5 files changed, 353 insertions(+) create mode 100755 configs/socfpga_agilex_nand_atf_defconfig create mode 100755 configs/socfpga_agilex_qspi_atf_defconfig create mode 100755 configs/socfpga_stratix10_nand_atf_defconfig create mode 100755 configs/socfpga_stratix10_qspi_atf_defconfig diff --git a/configs/socfpga_agilex_nand_atf_defconfig b/configs/socfpga_agilex_nand_atf_defconfig new file mode 100755 index 00..a3b272d771 --- /dev/null +++ b/configs/socfpga_agilex_nand_atf_defconfig @@ -0,0 +1,88 @@ +CONFIG_ARM=y +CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_TEXT_BASE=0x20 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SIZE=0x2 +CONFIG_ENV_OFFSET=0x0020 +CONFIG_DM_GPIO=y +CONFIG_SPL_TEXT_BASE=0xffe0 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y +CONFIG_IDENT_STRING="socfpga_agilex" +CONFIG_SPL_FS_FAT=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk_nand" +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x200 +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_NAND_BOOT=y +CONFIG_BOOTDELAY=5 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="earlycon panic=-1" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run nandload; run linux_qspi_enable; run nandboot" +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_CACHE=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_CMD_NAND_LOCK_UNLOCK=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_MTDIDS_DEFAULT="nand0=ffb9.nand.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb9.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)" +CONFIG_ENV_IS_IN_NAND=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_ALTERA_SDRAM=y +CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_DW=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_NAND_DENALI_DT=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x0 +CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10 +CONFIG_SPL_NAND_FRAMEWORK=y +CONFIG_SF_DEFAULT_MODE=0x2003 +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_DM_RESET=y +CONFIG_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_DESIGNWARE_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_STORAGE=y +CONFIG_DESIGNWARE_WATCHDOG=y +CONFIG_WDT=y +# CONFIG_SPL_USE_TINY_PRINTF is not set \ No newline at end of file diff --git a/configs/socfpga_agilex_qspi_atf_defconfig b/configs/socfpga_agilex_qspi_atf_defconfig new file mode 100755 index 00..8956abae36 --- /dev/null +++ b/configs/socfpga_agilex_qspi_atf_defconfig @@ -0,0 +1,76 @@ +CONFIG_ARM=y +CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_TEXT_BASE=0x20 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x020C +CONFIG_ENV_SECT_SIZE=0x1 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x0200 +CONFIG_DM_GPIO=y +CONFIG_SPL_TEXT_BASE=0xFFE0 +CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y +CONFIG_IDENT_STRING="socfpga_agilex" +CONFIG_SPL_FS_FAT=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk_qspi" +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x200 +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=5 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="earlycon panic=-1" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="sf probe;run qspiload;run linux_qspi_enable;rsu dtb;run qspiboot" +CONFIG_SPL_CACHE=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MTD=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
Re: [PATCH v2 2/3] clk: stm32mp13: introduce STM32MP13 RCC driver
On 11/8/22 02:59, Sean Anderson wrote:
On 10/26/22 12:44, Gabriel Fernandez wrote:
Introduce STM32MP13 RCC driver using Common Clock Framework.
Please augment this commit message with some of the explanations you
sent last time.
ok
Signed-off-by: Gabriel Fernandez
Reviewed-by: Patrick Delaunay
Tested-by: Patrick Delaunay
---
(no changes since v1)
drivers/clk/stm32/Kconfig | 15 +
drivers/clk/stm32/Makefile | 2 +
drivers/clk/stm32/clk-stm32-core.c | 271 ++
drivers/clk/stm32/clk-stm32-core.h | 223
drivers/clk/stm32/clk-stm32mp13.c | 841 +
drivers/clk/stm32/stm32mp13_rcc.h | 288 ++
6 files changed, 1640 insertions(+)
create mode 100644 drivers/clk/stm32/clk-stm32-core.c
create mode 100644 drivers/clk/stm32/clk-stm32-core.h
create mode 100644 drivers/clk/stm32/clk-stm32mp13.c
create mode 100644 drivers/clk/stm32/stm32mp13_rcc.h
diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig
index eac3fc1e9d..7a34ea23c3 100644
--- a/drivers/clk/stm32/Kconfig
+++ b/drivers/clk/stm32/Kconfig
@@ -14,6 +14,12 @@ config CLK_STM32H7
This clock driver adds support for RCC clock management
for STM32H7 SoCs.
+config CLK_STM32_CORE
+ bool "Enable RCC clock core driver for STM32MP"
+ depends on ARCH_STM32MP && CLK
+ select CLK_CCF
+ select CLK_COMPOSITE_CCF
+
config CLK_STM32MP1
bool "Enable RCC clock driver for STM32MP15"
depends on ARCH_STM32MP && CLK
@@ -21,3 +27,12 @@ config CLK_STM32MP1
help
Enable the STM32 clock (RCC) driver. Enable support for
manipulating STM32MP15's on-SoC clocks.
+
+config CLK_STM32MP13
+ bool "Enable RCC clock driver for STM32MP13"
+ depends on ARCH_STM32MP && CLK
+ default y if STM32MP13x
+ select CLK_STM32_CORE
+ help
+ Enable the STM32 clock (RCC) driver. Enable support for
+ manipulating STM32MP13's on-SoC clocks.
diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile
index f66f295403..20afbc3cfc 100644
--- a/drivers/clk/stm32/Makefile
+++ b/drivers/clk/stm32/Makefile
@@ -2,6 +2,8 @@
#
# Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+obj-$(CONFIG_CLK_STM32_CORE) += clk-stm32-core.o
obj-$(CONFIG_CLK_STM32F) += clk-stm32f.o
obj-$(CONFIG_CLK_STM32H7) += clk-stm32h7.o
obj-$(CONFIG_CLK_STM32MP1) += clk-stm32mp1.o
+obj-$(CONFIG_CLK_STM32MP13) += clk-stm32mp13.o
diff --git a/drivers/clk/stm32/clk-stm32-core.c
b/drivers/clk/stm32/clk-stm32-core.c
new file mode 100644
index 00..7b7de6389b
--- /dev/null
+++ b/drivers/clk/stm32/clk-stm32-core.c
@@ -0,0 +1,271 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+ * Author: Gabriel Fernandez for
STMicroelectronics.
+ */
+
+#define LOG_CATEGORY UCLASS_CLK
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "clk-stm32-core.h"
+
+int stm32_rcc_init(struct udevice *dev,
+ const struct stm32_clock_match_data *data)
+{
+ int i;
+ u8 *cpt;
+ struct stm32mp_rcc_priv *priv = dev_get_priv(dev);
+ fdt_addr_t base = dev_read_addr(dev->parent);
+ const struct clk_stm32_clock_data *clock_data = data->clock_data;
+
+ if (base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ priv->base = (void __iomem *)base;
+
+ /* allocate the counter of user for internal RCC gates, commun
for several user */
nit: common
ok
+ cpt = kzalloc(clock_data->num_gates, GFP_KERNEL);
+ if (!cpt)
+ return -ENOMEM;
+
+ priv->gate_cpt = cpt;
+
+ priv->data = clock_data;
+
+ for (i = 0; i < data->num_clocks; i++) {
+ const struct clock_config *cfg = >tab_clocks[i];
+ struct clk *clk = ERR_PTR(-ENOENT);
+
+ if (data->check_security && data->check_security(priv->base,
cfg))
+ continue;
+
+ if (cfg->setup) {
+ clk = cfg->setup(dev, cfg);
+ clk->id = cfg->id;
+ } else {
+ dev_err(dev, "failed to register clock %s\n", cfg->name);
+
nit: no need for a blank line here
ok
+ return -ENOENT;
+ }
+ }
+
+ return 0;
+}
+
+ulong clk_stm32_get_rate_by_name(const char *name)
+{
+ struct udevice *dev;
+
+ if (!uclass_get_device_by_name(UCLASS_CLK, name, )) {
+ struct clk *clk = dev_get_clk_ptr(dev);
+
+ return clk_get_rate(clk);
+ }
+
+ return 0;
+}
+
+const struct clk_ops stm32_clk_ops = {
+ .enable = ccf_clk_enable,
+ .disable = ccf_clk_disable,
+ .get_rate = ccf_clk_get_rate,
+ .set_rate = ccf_clk_set_rate,
+};
+
+#define RCC_MP_ENCLRR_OFFSET 4
+
+static void clk_stm32_gate_set_state(void __iomem *base,
+ const struct clk_stm32_clock_data *data,
+ u8 *cpt,
+ u16 gate_id,
+ int enable)
These three can be on the same line
ok
+{
+
Re: problem with reading the NV memory index of TPM slb9670
Hi Simon, thanks for the cc Tasos thanks for the report. Here's what happens here On Fri, 18 Nov 2022 at 22:50, Simon Glass wrote: > > +Ilias Apalodimas > > > On Tue, 15 Nov 2022 at 23:12, Tasos Terzidis wrote: > > > > Hello, > > > > I tried to use a tpm2 command for reading the NV memory index of an slb9670 > > TPM. > > > > I noticed in file cmd/tpm-v2.c, that the command tpm2 nv_read_value (as tpm > > nv_read_value) > > > > is not implemented. In file lib/tpm-v2.c there is the tpm2_nv_read_value > > function. > > > > Do you plan to implement the command tpm2 nv_read_value in the future ? That should be relatively easy to plug in and test. The functionality already exists in the TPM API (tpm_nv_read_value support v1 & v2). However no one has added it in 'tpm2' functions which explains what you see below. The entry point for the tpm command is 'cmd/tpm-common.c'. In that code we try to figure out if we are talking to a tpmv1 or v2. In your case it's a v2 and you get back a usage message since reading nvram isn't implemented yet. > > > > > > > > Then I used the > > > > tpm nv_read_value index addr count > > > > "Read bytes from space to memory address ". > > > > > > > > The syntax I used is > > > > tpm nv_read_value 0x1 0x3000 20 > > > > I’m trying to read 32 bytes from 0x1 index nv memory of TPM > > > > to 0x3000 memory of u-boot > > > > U-boot can’t understand the command and returns the help listing all the > > commands for tpm. > > > > I also used > > > > tpm nv_read_value 0x0 0x3000 20 > > > > 0x0 as an offset to 0x1 index of NV memory (following the syntax of > > tpm2_nvread command o TSS tpm –tools) > > > > > > Same result, list of commands for tpm > > > > > > > > Other commands of tpm such as tpm2 pcr read or extend functions as expected > > in u-boot environment > > > > > > > > I can’t understand what I do wrong > > Thanks /Ilias > > > > > > Thank you > > > > Tasos Terzids
Re: [PATCH 0/3] cmd: pxe: support INITRD and FDT selection with FIT
Hi Patrick,
Thanks for looking at it.
On 10/28/22 11:01, Patrick Delaunay wrote:
Since the commit d5ba6188dfbf ("cmd: pxe_utils: Check fdtcontroladdr
in label_boot") the FDT or the FDTDIR label is required in extlinux.conf
and the fallback done by bootm command when only the device tree is present
in this command parameters is no more performed when FIT is used for
kernel.
The next file "extlinux.conf" no more selects the device tree in FIT
but use the pxe fallback with the device tree of U-Boot.
menu title Select the boot mode
DEFAULT test
LABEL test
KERNEL /fitImage
This serie restores the possibility to use a FIT in extlinux.conf
by using FDT label with the same string.
menu title Select the boot mode
DEFAULT test
LABEL test
KERNEL /fitImage
FDT /fitImage
even when a specific FIT config is used:
menu title Select the boot mode
DEFAULT test
LABEL test
KERNEL /fitImage#config
FDT /fitImage#config
The last commit of the series is only a minor improvement.
I tested this on my Puma RK3399 and it does work again, thanks.
However, I'm not sure this is what we should go for?
My worry is the following:
What happens for old releases (pre-v2022.04) where KERNEL worked just
fine without the FDT to load the fdt from the fitimage conf specified in
KERNEL field? Would we now need to keep an extlinux.conf for pre-2022.04
releases where FDT wouldn't be set and one for 2023.01 and later where
FDT would be mentioned? That does not seem like a good thing for distros.
I unfortunately cannot answer the question myself without spending
significant effort patching v2022.01 to get it to work on our Puma
module. Does anyone have access to a board to quickly check an
extlinux.conf with KERNEL and FDT set to /fitImage on a v2022.01 release?
Is there really no other way than adding this new requirement? (Nothing
against it if it does not break older releases with the "new"
extlinux.conf though).
Cheers,
Quentin
Re: [PATCH] riscv: use imply instead of select for SPL_SEPARATE_BSS
On Mon, Nov 21, 2022 at 12:00 PM Sean Anderson wrote: > > On 11/16/22 02:08, Zong Li wrote: > > Use imply instead of select, then it can still be disabled by > > board-specific defconfig, or be set to n manually. > > > > Signed-off-by: Zong Li > > --- > > arch/Kconfig | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/Kconfig b/arch/Kconfig > > index ae39716697..102956d24c 100644 > > --- a/arch/Kconfig > > +++ b/arch/Kconfig > > @@ -111,7 +111,7 @@ config RISCV > > select SUPPORT_OF_CONTROL > > select OF_CONTROL > > select DM > > - select SPL_SEPARATE_BSS if SPL > > + imply SPL_SEPARATE_BSS if SPL > > imply DM_SERIAL > > imply DM_ETH > > imply DM_EVENT > > Do you have an example of a board which does this? > Hi Sean, We'd like to disable 'SPL_SEPARATE_BSS' on our internal platforms that don't exist in the mainline. It seems to me that using 'imply' might be not only working on the mainline's board, but also making it flexible to disable 'SPL_SEPARATE_BSS' by board-specific configuration or disable it manually for debug purposes. Hope the idea is good to you all. Thanks > --Sean
Re: [PATCH] Subject: [patch]SPI: GD SPI: Add Gigadevice SPI NOR part numbers
On 11/17/22 01:56, Victor lim wrote: added gigadevice in the defconfig file and ID in the ids.c file Signed-off-by: Victor Lim --- configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + This should be done in separate patch. drivers/mtd/spi/spi-nor-ids.c | 137 +++--- 3 files changed, 94 insertions(+), 45 deletions(-) diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..75014117f1 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y This is likely just appended and doesn't reflect Kconfig layout. Run make xilinx_zynqmp_mini_qspi_defconfig; make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 60f0d7cac4..cd245906ab 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -76,3 +76,4 @@ CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y ditto. I am also fine with enabling these memories for zynqmp_virt/zynq_virt and versal_virt and versal_net_virt platforms. Hard to guess what you have changed below. But if you want to change style it is one patch. If you want to add new devices it is another patch. Thanks, Michal
[PATCH v1] clk: nuvoton: fix bug for calculate pll clock
Fix bug for npcm7xx bmc calculate pll clock.
PLLCON1 need to divide by 2.
Signed-off-by: Jim Liu
---
drivers/clk/nuvoton/clk_npcm7xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/nuvoton/clk_npcm7xx.c
b/drivers/clk/nuvoton/clk_npcm7xx.c
index a12aaa2f4c..b23dd37af6 100644
--- a/drivers/clk/nuvoton/clk_npcm7xx.c
+++ b/drivers/clk/nuvoton/clk_npcm7xx.c
@@ -25,7 +25,7 @@ static const struct parent_data apb_parent[] =
{{NPCM7XX_CLK_AHB, 0}};
static struct npcm_clk_pll npcm7xx_clk_plls[] = {
{NPCM7XX_CLK_PLL0, NPCM7XX_CLK_REFCLK, PLLCON0, 0},
- {NPCM7XX_CLK_PLL1, NPCM7XX_CLK_REFCLK, PLLCON1, 0},
+ {NPCM7XX_CLK_PLL1, NPCM7XX_CLK_REFCLK, PLLCON1, POST_DIV2},
{NPCM7XX_CLK_PLL2, NPCM7XX_CLK_REFCLK, PLLCON2, 0},
{NPCM7XX_CLK_PLL2DIV2, NPCM7XX_CLK_REFCLK, PLLCON2, POST_DIV2}
};
--
2.17.1
[PATCH v1] i2c: nuvoton: renamed the NPCM i2c driver
The Makefile name is npcm_i2c but the driver is npcm-i2c.
Signed-off-by: Jim Liu
---
drivers/i2c/{npcm-i2c.c => npcm_i2c.c} | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename drivers/i2c/{npcm-i2c.c => npcm_i2c.c} (100%)
diff --git a/drivers/i2c/npcm-i2c.c b/drivers/i2c/npcm_i2c.c
similarity index 100%
rename from drivers/i2c/npcm-i2c.c
rename to drivers/i2c/npcm_i2c.c
--
2.17.1
Re: [PATCH] cli_hush: fix 'exit' cmd that was not exiting scripts
Hi Marek,
On 11/19/22 15:12, Marek Vasut wrote:
On 11/18/22 12:19, Hector Palacios wrote:
Commit 8c4e3b79bd0bb76eea16869e9666e19047c0d005 supposedly
passed one-level up the argument passed to 'exit' but it also
broke 'exit' purpose of stopping a script.
In reality, even if 'do_exit()' is capable of returning any
integer, the cli only admits '1' or '0' as return values.
This commit respects the current implementation to allow 'exit'
to at least return '1' for future processing, but returns
when the command being run is 'exit'.
Before this:
=> setenv foo 'echo bar ; exit 3 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit 1 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit 0 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit -1 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit -2 ; echo should not see this';
run foo; echo $?
bar
should not see this
0
=> setenv foo 'echo bar ; exit ; echo should not see this'; run
foo; echo $?
bar
should not see this
0
After this:
=> setenv foo 'echo bar ; exit 3 ; echo should not see this';
run foo; echo $?
bar
1
=> setenv foo 'echo bar ; exit 1 ; echo should not see this';
run foo; echo $?
bar
1
=> setenv foo 'echo bar ; exit 0 ; echo should not see this';
run foo; echo $?
bar
0
=> setenv foo 'echo bar ; exit -1 ; echo should not see
this'; run foo; echo $?
bar
0
=> setenv foo 'echo bar ; exit -2 ; echo should not see
this'; run foo; echo $?
bar
0
=> setenv foo 'echo bar ; exit ; echo should not see this';
run foo; echo $?
bar
0
Reported-by: Adrian Vovk
Signed-off-by: Hector Palacios
---
common/cli_hush.c | 4
1 file changed, 4 insertions(+)
diff --git a/common/cli_hush.c b/common/cli_hush.c
index 1467ff81b35b..9fe8b87e02d7 100644
--- a/common/cli_hush.c
+++ b/common/cli_hush.c
@@ -1902,6 +1902,10 @@ static int run_list_real(struct pipe *pi)
last_return_code = -rcode - 2;
return -2; /* exit */
}
+ if (!strcmp(pi->progs->argv[0], "exit")) {
+ last_return_code = rcode;
+ return rcode; /* exit */
+ }
last_return_code=(rcode == 0) ? 0 : 1;
#endif
#ifndef __U_BOOT__
Looking at the code just above this change 'if (rcode < -1)
last_return_code = -rcode - 2', that explains the odd 'return -r - 2' in
cmd/exit.c I think.
That's what I thought, too. The cli captures a -2 as the number to exit
a script, and with -rcode -2 was exiting and returning a 0.
Instead of capturing a magic number, I'm suggesting to capture 'exit'
command.
I wonder, can we somehow fix the return code handling in cmd/exit.c
instead, so that it would cover both this behavior listed in this patch,
and 8c4e3b79bd0 ("cmd: exit: Fix return value") ? The cmd/exit.c seems
like the right place to fix it.
I didn't revert or touched 8c4e3b79bd0 but if what you wanted to do with
that commit is to return any positive integer to the upper layers, I
must say that just doesn't work because the cli_hush only processes 1
(failure) or 0 (success), so there's no way for something such as 'exit
3' to produce a $? of 3.
I think the 'exit' command should only be used with this old U-Boot
standard of considering 1 a failure and 0 a success.
I could remove the 'if (rcode < -1) last_return_code = -rcode - 2',
which doesn't add much value now, but other than that I'm unsure of what
you have in mind as to fix cmd/exit.c.
btw. it would be good to write a unit test for this, since it is
becoming messy.
Regards
--
Héctor Palacios
