Re: [PATCH v4 2/2] arm: rk3399: usb2phy: phy-rockchip-inno-usb2.c: Implement operations for the 480MHz usb2phy clock in rk3399.
On 12/9/22 16:47, Xavier Drudis Ferran wrote: This clock has no users but appears in a phandle list used by ehci-generic.c to bulk enable it. The phandle list comes from linux, where it is needed for suspend/resume to work [1]. My tests give the same results with or without this patch, but Marek Vasut found it weird to declare an empty clk_ops[2]. So I adapted the code from linux 6.1-rc8 so that it hopefully works if it ever has some user. For now, without real users, it seems to at least not give any errors. You might want to squash 1/2 and 2/2 together, since it's one change (add clock operations to a phy driver). Since 1/2 works without any clock operations, who does enable these usb clock on this SoC ? Is there any driver or platform code for that ? If so, you can drop that platform code with this driver-side implementation in place (which is nice). btw I am still hoping some of the rockchip people will have a look at this series.
[PATCH v2] serial: Use -EAGAIN in getc and putc
U-Boot serial code already handles -EAGAIN value from getc and putc
callbacks. So change drivers code to return -EAGAIN when HW is busy instead
of doing its own busy loop and waiting until HW is ready.
Signed-off-by: Pali Rohár
---
Changes in v2:
* Fix serial_lpuart.c code after Tom's review
* Add serial_mpc8xx.c change
To prevent merge conflicts, please apply this patch *after* this:
http://patchwork.ozlabs.org/project/uboot/patch/20221210232744.15600-1-p...@kernel.org/
---
drivers/serial/serial_arc.c | 8 +++
drivers/serial/serial_lpuart.c | 36 -
drivers/serial/serial_mpc8xx.c | 12 --
drivers/serial/serial_mvebu_a3700.c | 8 +++
4 files changed, 28 insertions(+), 36 deletions(-)
diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c
index b2d95bdbe18d..c2fc8a901e25 100644
--- a/drivers/serial/serial_arc.c
+++ b/drivers/serial/serial_arc.c
@@ -53,8 +53,8 @@ static int arc_serial_putc(struct udevice *dev, const char c)
struct arc_serial_plat *plat = dev_get_plat(dev);
struct arc_serial_regs *const regs = plat->reg;
- while (!(readb(>status) & UART_TXEMPTY))
- ;
+ if (!(readb(>status) & UART_TXEMPTY))
+ return -EAGAIN;
writeb(c, >data);
@@ -83,8 +83,8 @@ static int arc_serial_getc(struct udevice *dev)
struct arc_serial_plat *plat = dev_get_plat(dev);
struct arc_serial_regs *const regs = plat->reg;
- while (!arc_serial_tstc(regs))
- ;
+ if (!arc_serial_tstc(regs))
+ return -EAGAIN;
/* Check for overflow errors */
if (readb(>status) & UART_OVERFLOW_ERR)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 07941c29ed74..51e66abdbc15 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -168,23 +168,24 @@ static void _lpuart_serial_setbrg(struct udevice *dev,
static int _lpuart_serial_getc(struct lpuart_serial_plat *plat)
{
struct lpuart_fsl *base = plat->reg;
- while (!(__raw_readb(>us1) & (US1_RDRF | US1_OR)))
- schedule();
+ if (!(__raw_readb(>us1) & (US1_RDRF | US1_OR)))
+ return -EAGAIN;
barrier();
return __raw_readb(>ud);
}
-static void _lpuart_serial_putc(struct lpuart_serial_plat *plat,
+static int _lpuart_serial_putc(struct lpuart_serial_plat *plat,
const char c)
{
struct lpuart_fsl *base = plat->reg;
- while (!(__raw_readb(>us1) & US1_TDRE))
- schedule();
+ if (!(__raw_readb(>us1) & US1_TDRE))
+ return -EAGAIN;
__raw_writeb(c, >ud);
+ return 0;
}
/* Test whether a character is in the RX buffer */
@@ -328,10 +329,9 @@ static int _lpuart32_serial_getc(struct lpuart_serial_plat
*plat)
u32 stat, val;
lpuart_read32(plat->flags, >stat, );
- while ((stat & STAT_RDRF) == 0) {
+ if ((stat & STAT_RDRF) == 0) {
lpuart_write32(plat->flags, >stat, STAT_FLAGS);
- schedule();
- lpuart_read32(plat->flags, >stat, );
+ return -EAGAIN;
}
lpuart_read32(plat->flags, >data, );
@@ -343,22 +343,18 @@ static int _lpuart32_serial_getc(struct
lpuart_serial_plat *plat)
return val & 0x3ff;
}
-static void _lpuart32_serial_putc(struct lpuart_serial_plat *plat,
+static int _lpuart32_serial_putc(struct lpuart_serial_plat *plat,
const char c)
{
struct lpuart_fsl_reg32 *base = plat->reg;
u32 stat;
- while (true) {
- lpuart_read32(plat->flags, >stat, );
-
- if ((stat & STAT_TDRE))
- break;
-
- schedule();
- }
+ lpuart_read32(plat->flags, >stat, );
+ if (!(stat & STAT_TDRE))
+ return -EAGAIN;
lpuart_write32(plat->flags, >data, c);
+ return 0;
}
/* Test whether a character is in the RX buffer */
@@ -453,11 +449,9 @@ static int lpuart_serial_putc(struct udevice *dev, const
char c)
struct lpuart_serial_plat *plat = dev_get_plat(dev);
if (is_lpuart32(dev))
- _lpuart32_serial_putc(plat, c);
- else
- _lpuart_serial_putc(plat, c);
+ return _lpuart32_serial_putc(plat, c);
- return 0;
+ return _lpuart_serial_putc(plat, c);
}
static int lpuart_serial_pending(struct udevice *dev, bool input)
diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c
index 808a40f503ea..b8d6a81b650f 100644
--- a/drivers/serial/serial_mpc8xx.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -178,14 +178,13 @@ static int serial_mpc8xx_putc(struct udevice *dev, const
char c)
rtx = (struct serialbuffer __iomem *)>cp_dpmem[CPM_SERIAL_BASE];
- /* Wait for last character to go. */
+ if
[PATCH] serial: Do not write additional \r before \n for dm_serial drivers
serial-uclass.c code already puts \r before \n for all dm_serial drivers.
Signed-off-by: Pali Rohár
---
drivers/serial/serial_lpuart.c | 3 ---
drivers/serial/serial_mpc8xx.c | 3 ---
2 files changed, 6 deletions(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ff576da516d4..07941c29ed74 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -349,9 +349,6 @@ static void _lpuart32_serial_putc(struct lpuart_serial_plat
*plat,
struct lpuart_fsl_reg32 *base = plat->reg;
u32 stat;
- if (c == '\n')
- serial_putc('\r');
-
while (true) {
lpuart_read32(plat->flags, >stat, );
diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c
index aeae6ae6cd25..808a40f503ea 100644
--- a/drivers/serial/serial_mpc8xx.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -176,9 +176,6 @@ static int serial_mpc8xx_putc(struct udevice *dev, const
char c)
cpm8xx_t__iomem *cpmp = &(im->im_cpm);
struct serialbuffer __iomem *rtx;
- if (c == '\n')
- serial_mpc8xx_putc(dev, '\r');
-
rtx = (struct serialbuffer __iomem *)>cp_dpmem[CPM_SERIAL_BASE];
/* Wait for last character to go. */
--
2.20.1
Re: [PATCH] serial: Use -EAGAIN in getc and putc
On Thursday 08 December 2022 10:45:49 Tom Rini wrote:
> On Sun, Dec 04, 2022 at 01:36:55PM +0100, Pali Rohár wrote:
>
> > U-Boot serial code already handles -EAGAIN value from getc and putc
> > callbacks. So change drivers code to return -EAGAIN when HW is busy instead
> > of doing its own busy loop and waiting until HW is ready.
> >
> > Signed-off-by: Pali Rohár
> > Reviewed-by: Simon Glass
> > Reviewed-by: Stefan Roese
> [snip]
> > diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
> > index ff576da516d4..d7259d531b55 100644
> > --- a/drivers/serial/serial_lpuart.c
> > +++ b/drivers/serial/serial_lpuart.c
> > @@ -168,8 +168,8 @@ static void _lpuart_serial_setbrg(struct udevice *dev,
> > static int _lpuart_serial_getc(struct lpuart_serial_plat *plat)
> > {
> > struct lpuart_fsl *base = plat->reg;
> > - while (!(__raw_readb(>us1) & (US1_RDRF | US1_OR)))
> > - schedule();
> > + if (!(__raw_readb(>us1) & (US1_RDRF | US1_OR)))
> > + return -EAGAIN;
> >
> > barrier();
> >
> > @@ -181,8 +181,8 @@ static void _lpuart_serial_putc(struct
> > lpuart_serial_plat *plat,
> > {
> > struct lpuart_fsl *base = plat->reg;
> >
> > - while (!(__raw_readb(>us1) & US1_TDRE))
> > - schedule();
> > + if (!(__raw_readb(>us1) & US1_TDRE))
> > + return -EAGAIN;
> >
> > __raw_writeb(c, >ud);
> > }
>
> This is non-trivially not right for this driver. ->putc here is set to
> lpuart_serial_putc which calls _lpuart_serial_putc OR
> _lpuart32_serial_putc, so there's the lpuart32 cases to address, and
> then lpuart_serial_putc needs to just return whatever one it called
> rather than always returning 0.
>
> --
> Tom
Ou, you are right. This is really incomplete and does not work
correctly. Thanks for spotting this issue, I will send fixed patch.
[PATCH] imx6qdl-sabresd: Pass mmc alias
From: Fabio Estevam
Originally, the mmc aliases node was present in imx6qdl-sabresd.dtsi.
After the sync with Linux in commit d0399a46e7cd ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.
This causes a regression in which the SD card cannot be found anymore.
Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the SD card (esdhc3) was
mapped to mmc1.
Fixes: d0399a46e7cd ("imx6dl/imx6qdl: synchronise device trees with linux")
Reported-by: Carlos Rafael Giani
Signed-off-by: Fabio Estevam
---
arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi
b/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi
index 45f02b19c7ee..cbb856fba3f3 100644
--- a/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi
@@ -5,6 +5,12 @@
#include "imx6qdl-u-boot.dtsi"
+/ {
+ aliases {
+ mmc1 =
+ };
+};
+
{
u-boot,dm-spl;
};
--
2.25.1
jffs2 for loading kernel image from spi-flash
Hi u-boot professionals, Sorry for this unsolicited email. I am working on bringing up the kernel.jffs2 stored in one of the spi-nor flash mtd partitions. But the jffs2 cmds (fsload, fsinfo, fsls) to load it to the boot address seem to work only with memory-mapped nor flash. The get_fl_mem_nor() in jffs2_1pass.c has memcpy(), which means it is using memory mapped nor flash. I am using qspi driver and "sf read" cmd works well. Does current u-boot jffs2 cmd support only memory mapped nor flash? Or does u-boot have different cmd to load jffs2 image from nor flash? Regards, KD
Re: [PATCH] ARM: imx: Reinstate decode ECSPI env location from i.MX8M ROMAPI tables
On 09/12/2022 22:29, Marek Vasut wrote:
Decode ECSPI boot device in env_get_location() from i.MX8M ROMAPI
tables.
This is necessary to correctly identify env is in SPI NOR when the
system
boots from SPI NOR attached to ECSPI.
This reinstates change from commit:
e26d0152d61 ("ARM: imx: Decode ECSPI env location from i.MX8M ROMAPI
tables")
which has been dropped in commit:
b0a284a7c94 ("imx: move get_boot_device to common file")
Fixes: b0a284a7c94 ("imx: move get_boot_device to common file")
Signed-off-by: Marek Vasut
Reviewed-by: Fabio Estevam
Re: [PATCH 2/2] ARM: imx: Remove PMIC reset configuration from board files
On 09/12/2022 16:35, Marek Vasut wrote: The PCA9450 reset configuration can now be performed by the PCA9450 PMIC driver itself, remove the hard-coded variant from board code and let the PMIC driver perform this task using one-liner: ``` $ sed -i '/set WDOG_B_CFG to cold reset/,+2 d' $(git grep -l PCA9450_RESET_CTRL.*0xA1 board/) ``` Venice and i.MX93 EVK required slight manual fix up. Signed-off-by: Marek Vasut Reviewed-by: Fabio Estevam
Re: [PATCH 1/2] pmic: pca9450: Make warm reset on WDOG_B assertion
On 09/12/2022 16:35, Marek Vasut wrote:
The default configuration of the PMIC behavior makes the PMIC
power cycle most regulators on WDOG_B assertion. This power
cycling causes the memory contents of OCRAM to be lost.
Some systems neeeds some memory that survives reset and
reboot, therefore this patch is created.
The implementation is taken almost verbatim from Linux commit
2364a64d0673f ("regulator: pca9450: Make warm reset on WDOG_B
assertion")
Signed-off-by: Marek Vasut
Reviewed-by: Fabio Estevam
[PATCH] patch V2: SPI: NOR: ZynqMp: enabling gigadevice part #
Enabling Gigadevice in the config file Signed-off-by: Victor Lim --- configs/xilinx_zynqmp_mini_qspi_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 75014117f1..5e81dc193a 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_POWER is not set CONFIG_ARM_DCC=y @@ -78,4 +79,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set -CONFIG_SPI_FLASH_GIGADEVICE=y + -- 2.25.1
[PATCH] patch V2: SPI: NOR: Enable GIGADEVICE in the config file
Working with Xilinx team to add Gigadevice part # to uboot Signed-off-by: Victor Lim --- configs/zynq_cse_qspi_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 60f0d7cac4..cd245906ab 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -76,3 +76,4 @@ CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y -- 2.25.1
Re: [PATCH] net: zynq_gem: Add support for new compatible str with xlnx prefix
On 09/12/2022 16:19, Michal Simek wrote: > cdns prefix was deprecated and replaced by xlnx one. > > Signed-off-by: Michal Simek > --- > > Link: > https://lore.kernel.org/r/20220726070802.26579-1-krzysztof.kozlow...@linaro.org Thanks. Acked-by: Krzysztof Kozlowski Best regards, Krzysztof
