date:20240517

[PATCH FOR TESTING ONLY RFC 4/4] sunxi-d1s-t113: Add D1 and T113 PWM node

2024-05-17 Thread John Watts

This is based on the binding from the as yet unmerged kernel series:

https://lore.kernel.org/linux-kernel/20240131125920.2879433-2-privates...@gmail.com/

Signed-off-by: John Watts 
---
 arch/riscv/dts/sunxi-d1s-t113.dtsi   | 12 
 dts/upstream/src/riscv/allwinner/sunxi-d1s-t113.dtsi | 12 
 2 files changed, 24 insertions(+)

diff --git a/arch/riscv/dts/sunxi-d1s-t113.dtsi 
b/arch/riscv/dts/sunxi-d1s-t113.dtsi
index 822f022eec..92b6432f77 100644
--- a/arch/riscv/dts/sunxi-d1s-t113.dtsi
+++ b/arch/riscv/dts/sunxi-d1s-t113.dtsi
@@ -145,6 +145,18 @@
};
};
 
+   pwm: pwm@2000c00 {
+   compatible = "allwinner,sun20i-d1-pwm";
+   reg = <0x02000c00 0x400>;
+   clocks = < CLK_BUS_PWM>,
+<>,
+< CLK_APB0>;
+   clock-names = "bus", "hosc", "apb0";
+   resets = < RST_BUS_PWM>;
+   status = "disabled";
+   #pwm-cells = <0x3>;
+   };
+
ccu: clock-controller@2001000 {
compatible = "allwinner,sun20i-d1-ccu";
reg = <0x2001000 0x1000>;
diff --git a/dts/upstream/src/riscv/allwinner/sunxi-d1s-t113.dtsi 
b/dts/upstream/src/riscv/allwinner/sunxi-d1s-t113.dtsi
index 5a9d7f5a75..435a1e66aa 100644
--- a/dts/upstream/src/riscv/allwinner/sunxi-d1s-t113.dtsi
+++ b/dts/upstream/src/riscv/allwinner/sunxi-d1s-t113.dtsi
@@ -145,6 +145,18 @@
};
};
 
+   pwm: pwm@2000c00 {
+   compatible = "allwinner,sun20i-d1-pwm";
+   reg = <0x02000c00 0x400>;
+   clocks = < CLK_BUS_PWM>,
+<>,
+< CLK_APB0>;
+   clock-names = "bus", "hosc", "apb0";
+   resets = < RST_BUS_PWM>;
+   status = "disabled";
+   #pwm-cells = <0x3>;
+   };
+
ccu: clock-controller@2001000 {
compatible = "allwinner,sun20i-d1-ccu";
reg = <0x2001000 0x1000>;

-- 
2.45.1

[PATCH RFC 3/4] pwm: sunxi: Add support Allwinner D1 PWM

2024-05-17 Thread John Watts

This driver documents and handles setting up PWM on the D1.

Signed-off-by: John Watts 
---
 drivers/pwm/Kconfig|   6 +
 drivers/pwm/Makefile   |   1 +
 drivers/pwm/sunxi_pwm_d1.c | 542 +
 3 files changed, 549 insertions(+)

diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index 6e79868d0e..8c4c910ea7 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -112,6 +112,12 @@ config PWM_SUNXI
  This PWM is found on H3, A64 and other Allwinner SoCs. It supports a
  programmable period and duty cycle. A 16-bit counter is used.
 
+config PWM_SUNXI_D1
+   bool "Enable support for the Allwinner D1 Sunxi PWM"
+   depends on DM_PWM
+   help
+ This PWM is found on D1, T113-S3 and R329 SoCs.
+
 config PWM_TI_EHRPWM
bool "Enable support for EHRPWM PWM"
depends on DM_PWM && ARCH_OMAP2PLUS
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index e4d10c8dc3..ea96e7159b 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -23,4 +23,5 @@ obj-$(CONFIG_PWM_SANDBOX) += sandbox_pwm.o
 obj-$(CONFIG_PWM_SIFIVE)   += pwm-sifive.o
 obj-$(CONFIG_PWM_TEGRA)+= tegra_pwm.o
 obj-$(CONFIG_PWM_SUNXI)+= sunxi_pwm.o
+obj-$(CONFIG_PWM_SUNXI_D1) += sunxi_pwm_d1.o
 obj-$(CONFIG_PWM_TI_EHRPWM)+= pwm-ti-ehrpwm.o
diff --git a/drivers/pwm/sunxi_pwm_d1.c b/drivers/pwm/sunxi_pwm_d1.c
new file mode 100644
index 00..6c57bc6e85
--- /dev/null
+++ b/drivers/pwm/sunxi_pwm_d1.c
@@ -0,0 +1,542 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright 2022 Jookia 
+/*
+ * The Allwinner D1's PWM channels are 16-bit counters with up to
+ * 65537 cycles (yes, you read that correctly).
+ *
+ * Each channel must be programmed using three variables:
+ * - The entire cycle count (used for the period)
+ * - The active cycle count (the count of inactive cycles)
+ * - The polarity (specifies if the signal is active high or low)
+ * The cycle counts are at minimum 1 and at maximum 65536.
+ *
+ * The controller will output the number of entire cycles plus one
+ * extra, with any cycles after the active cycle output as active.
+ *
+ * Consider a PWM period of 128 nanoseconds and a cycle period of 32.
+ * Setting the entire cycle count to 3 and active cycle count to 4
+ * gives an output like so:
+ *
+ * - Cycle 1 runs 0 to 32 nanoseconds, inactive
+ * - Cycle 2 runs 32 to 64 nanoseconds, inactive
+ * - Cycle 3 runs 64 to 96 nanoseconds, inactive
+ * - Cycle 4 runs 96 to 128 nanoseconds, inactive
+ * - Cycle 5 is skipped but would run 128 to 160 nanoseconds, active
+ *
+ * If we set the entire count to 4, cycle 5 would run and we wouldn't be
+ * able to specify it as inactive as the active count only goes up to 4.
+ *
+ * In practice this means we want to set the entire cycle to be one less
+ * then the actual number of cycles we want, so we can set the number of
+ * active cycles to be up to maximum for a fully inactive signal.
+ *
+ * The PWM channels are paired and clocked together, resulting in a
+ * cycle time found using the following formula:
+ *
+ * PWM0_CYCLE_NS = 10 / (BUS_CLOCK / COMMON_DIV / PWM0_PRESCALER_K)
+ * PWM1_CYCLE_NS = 10 / (BUS_CLOCK / COMMON_DIV / PWM1_PRESCALER_K)
+ *
+ * This means both clocks should ideally be set at the same time and not
+ * impact each other too much.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* PWM channel information */
+struct pwm_channel {
+   uint period_ns;
+   uint duty_ns;
+   bool polarity;
+   bool enable;
+   bool updated;
+};
+
+/* Timings found for a PWM channel */
+struct pwm_timings {
+   uint cycle_ns;
+   uint period_ns;
+   uint duty_ns;
+   uint clock_id;
+   uint common_div;
+   uint prescale_k;
+   uint entire_cycles;
+   uint active_cycles;
+   uint polarity;
+};
+
+/* Driver state */
+struct sunxi_pwm_d1_priv {
+   void *base;
+   struct clk *clk_bus;
+   struct clk *clk_srcs[3]; /* Last value must be NULL */
+   struct reset_ctl *reset;
+   int npwm;
+   struct pwm_channel *channels;
+};
+
+/* Divides a nanosecond value, rounding up for very low values */
+uint div_ns(uint ns, uint div)
+{
+   uint result = (ns / div);
+
+   /* If the number is less than 1000, round it to the nearest digit */
+   if (result < 1000)
+   result = (ns + (div - 1)) / div;
+
+   if (result < 1)
+   result = 1;
+
+   return result;
+}
+
+/* Checks if an error is relatively too large */
+int error_too_large(uint actual, uint target)
+{
+   /* For a target of zero we want zero */
+   if (target == 0)
+   return (actual == 0);
+
+   /* Don't overflow large numbers when we multiply by 100 */
+   while (actual > 1000) {
+   actual /= 100;
+   target /= 100;
+   }
+
+   int error_percent = (actual * 100)

[PATCH RFC 2/4] pinctrl: sunxi: Add PWM7 pinctrl for the D1

2024-05-17 Thread John Watts

This is currently only used for PD22 on the Mango Pi MQ-Dual.

Signed-off-by: John Watts 
---
 drivers/pinctrl/sunxi/pinctrl-sunxi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c 
b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 37ea93715d..b3f2568ffe 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -615,6 +615,7 @@ static const struct sunxi_pinctrl_function 
sun20i_d1_pinctrl_functions[] = {
{ "uart1",  2 },/* PG6-PG7 */
{ "uart2",  7 },/* PB0-PB1 */
{ "uart3",  7 },/* PB6-PB7 */
+   { "pwm7",   5 },/* PD22 */
 };
 
 static const struct sunxi_pinctrl_desc __maybe_unused sun20i_d1_pinctrl_desc = 
{

-- 
2.45.1

[PATCH RFC 1/4] clk: sunxi: Add PWM bus clock and reset

2024-05-17 Thread John Watts

This is needed for the D1 PWM driver.

Signed-off-by: John Watts 
---
 drivers/clk/sunxi/clk_d1.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/sunxi/clk_d1.c b/drivers/clk/sunxi/clk_d1.c
index 9dae761de8..6577d86e0b 100644
--- a/drivers/clk/sunxi/clk_d1.c
+++ b/drivers/clk/sunxi/clk_d1.c
@@ -15,6 +15,8 @@
 static struct ccu_clk_gate d1_gates[] = {
[CLK_APB0]  = GATE_DUMMY,
 
+   [CLK_BUS_PWM]   = GATE(0x7ac, BIT(0)),
+
[CLK_BUS_MMC0]  = GATE(0x84c, BIT(0)),
[CLK_BUS_MMC1]  = GATE(0x84c, BIT(1)),
[CLK_BUS_MMC2]  = GATE(0x84c, BIT(2)),
@@ -48,6 +50,8 @@ static struct ccu_clk_gate d1_gates[] = {
 };
 
 static struct ccu_reset d1_resets[] = {
+   [RST_BUS_PWM]   = RESET(0x7ac, BIT(16)),
+
[RST_BUS_MMC0]  = RESET(0x84c, BIT(16)),
[RST_BUS_MMC1]  = RESET(0x84c, BIT(17)),
[RST_BUS_MMC2]  = RESET(0x84c, BIT(18)),

-- 
2.45.1

[PATCH RFC 0/4] pwm: sunxi: Add support Allwinner D1 PWM

2024-05-17 Thread John Watts

This patch series adds support for the Allwinner D1, T113 and R329 PWM.

This code isn't based on any kernel code but instead written from scratch with
the goal of handling the PWM pairs deterministically.

I've tested this on T113 hardware and it works very well.

Signed-off-by: John Watts 
---
John Watts (4):
  clk: sunxi: Add PWM bus clock and reset
  pinctrl: sunxi: Add PWM7 pinctrl for the D1
  pwm: sunxi: Add support Allwinner D1 PWM
  [FOR TESTING ONLY] sunxi-d1s-t113: Add D1 and T113 PWM node

 arch/riscv/dts/sunxi-d1s-t113.dtsi |  12 +
 drivers/clk/sunxi/clk_d1.c |   4 +
 drivers/pinctrl/sunxi/pinctrl-sunxi.c  |   1 +
 drivers/pwm/Kconfig|   6 +
 drivers/pwm/Makefile   |   1 +
 drivers/pwm/sunxi_pwm_d1.c | 542 +
 .../src/riscv/allwinner/sunxi-d1s-t113.dtsi|  12 +
 7 files changed, 578 insertions(+)
---
base-commit: 312efdf9c9297382b4e1d04c50376573764b5c00
change-id: 20240518-pwm_d1-b43d263ea143

Best regards,
-- 
John Watts

Re: [PATCH 1/1] usb: Assimilate usb_get_descriptor() to linux

2024-05-17 Thread Marek Vasut


On 5/17/24 11:18 AM, Philip Oberfichtner wrote:

Before this commit, usb_get_descriptor() failed for some flakey USB
devices. We hereby adopt the more robust linux implementation [1].


Can you include which exact device fails and how? Details of the failure 
are valuable for the next person who runs into such a bug. Search 
engines index the ML posts too, so they become searchable using those.


Which kernel version is this imported from ? Commit ID would be good to add.

[...]

[PATCH 1/1] Added arm64 assembly for examples/api crt0

2024-05-17 Thread Brunham, Kalen

I've encountered a problem when compiling the 'examples/api' directory for 
ARM64 in U-boot. The problem lies in the assembly code in 'examples/api/crt0.S' 
where the current CONFIG_ARM code is only 32-bit. When targeting ARM64, a 
64-bit version is necessary.

I have proposed a fix by including a 'CONFIG_ARM64' section in the assembly 
code as shown below.  These changes have been check via 
https://github.com/u-boot/u-boot/pull/538.

Feedback is welcome.

---
examples/api/crt0.S | 15 +++
1 file changed, 15 insertions(+)

diff --git a/examples/api/crt0.S b/examples/api/crt0.S
index 57bba9d851..4c23a54b21 100644
--- a/examples/api/crt0.S
+++ b/examples/api/crt0.S
@@ -24,6 +24,21 @@ syscall:
mtctr %r11
bctr

+#elif defined(CONFIG_ARM64)
+
+  .text
+  .globl _start
+_start:
+  ldr   ip0, =search_hint
+  str   sp_el2, [ip0]
+  b main
+
+
+  .globl syscall
+syscall:
+  ldr   ip0, =syscall_ptr
+  ldr   pc_el2, [ip0]
+
#elif defined(CONFIG_ARM)

   .text
--

Signed-off-by: Kalen Brunham

Re: [PATCH] Init virtio before loading ENV from EXT4 or FAT

2024-05-17 Thread Tom Rini

On Wed, May 01, 2024 at 10:54:09AM +0200, Fiona Klute wrote:

> Specifying a file in an EXT4 or FAT partition on a virtio device as
> environment location failed because virtio hadn't been initialized by
> the time the environment was loaded. This patch mirrors commit
> 54ee5ae84191 ("Add SCSI scan for ENV in EXT4 or FAT") in issue and
> fix, just for a different kind of block device.
> 
> The additional include in include/virtio.h is needed so all functions
> called there are defined, the alternative would have been to include
> dm/device.h separately in the env/ sources.
> 
> Checkpatch suggests using "if (IS_ENABLED(CONFIG...))" instead of
> "#if defined(CONFIG_...)", I'm sticking to the style of the existing
> code here.
> 
> Signed-off-by: Fiona Klute 
> CC: Joe Hershberger 
> CC: Bin Meng 
> CC: Rogier Stam 

As this problem was reported by another user:
https://stackoverflow.com/questions/78490686/custom-u-boot-writes-to-environment-file-but-cannot-read-from-it
I've decided it's worth pulling this in now rather than for a later
release via -next, so, applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] timer: npcm: Change counter source

2024-05-17 Thread Tom Rini

On Mon, May 13, 2024 at 03:26:03PM +0800, Jim Liu wrote:

> From: Stanley Chu 
> 
> The counter value read from TDR register may not be correct.
> Read SECCNT and CNTR25M instead to get the correct timestamp.
> 
> Signed-off-by: Stanley Chu 
> ---
>  arch/arm/dts/nuvoton-common-npcm7xx.dtsi | 12 ++--
>  arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 13 ++--
>  drivers/timer/npcm-timer.c   | 81 ++--
>  3 files changed, 30 insertions(+), 76 deletions(-)

This no longer applies to u-boot/next, please rebase, thanks.

-- 
Tom


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Re: [PATCH] phy: Use dt-bindig definations for npcm usb phy

2024-05-17 Thread Tom Rini

On Mon, 13 May 2024 15:25:32 +0800, Jim Liu wrote:

> Use dt-binding definations for the phy switch connection.
> It declares the target usb controller it is connected to.
> 
> 

Applied to u-boot/master, thanks!

-- 
Tom

Re: [PATCH] pinctrl: Fix pinctrl_gpio_get_pinctrl_and_offset()

2024-05-17 Thread Tom Rini

On Fri, 10 May 2024 19:35:51 +, Jonas Karlman wrote:

> Linux kernel Documentation/devicetree/bindings/gpio/gpio.txt define the
> format of the gpio-ranges prop as:
> 
>   The format is: <[pin controller phandle], [GPIO controller offset],
>   [pin controller offset], [number of pins]>;
> 
>   Example:
> 
> [...]

Applied to u-boot/master, thanks!

-- 
Tom

Re: [PATCH 1/7] MIPS: Implement setjmp

2024-05-17 Thread Jiaxun Yang




在2024年5月17日五月 下午10:11，Heinrich Schuchardt写道：
[...]
> As the jumpbuffer is only used inside U-Boot we should be able to use 
> the same register sequence independant of the bitness.

Hi Heinrich,

I chose to use ABI's stack frame because GDB requires it to perform proper
unwinding and it helped debugging a lot.

But I'm fine with unifying them if you think it's necessary, what's your 
opinion?

Thanks
- Jiaxun

>
> Best regards
>
> Heinrich
>
-- 
- Jiaxun

[PATCH 3/3] sandbox: Use pkg-config to detect and config sdl2

2024-05-17 Thread Jiaxun Yang

sdl2-config is not cross compile friendly, it can only detect
and config stuff from build host.

Use pkg-config instead, which is a generic way to config libraries
on any sane system & cross toolchain should have it ready.

The output of pkg-config practically have no difference with
sdl2-config.

Signed-off-by: Jiaxun Yang 
---
 Makefile | 3 ++-
 arch/sandbox/Kconfig | 2 +-
 arch/sandbox/config.mk   | 5 ++---
 doc/arch/sandbox/sandbox.rst | 6 --
 4 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/Makefile b/Makefile
index 596f6458e6b2..5e397e107a80 100644
--- a/Makefile
+++ b/Makefile
@@ -383,6 +383,7 @@ LDR = $(CROSS_COMPILE)ldr
 STRIP  = $(CROSS_COMPILE)strip
 OBJCOPY= $(CROSS_COMPILE)objcopy
 OBJDUMP= $(CROSS_COMPILE)objdump
+PKG_CONFIG = $(CROSS_COMPILE)pkg-config
 LEX= flex
 YACC   = bison
 AWK= awk
@@ -439,7 +440,7 @@ UBOOTVERSION = $(VERSION)$(if 
$(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SU
 
 export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION
 export ARCH CPU BOARD VENDOR SOC CPUDIR BOARDDIR
-export CONFIG_SHELL HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD CC
+export CONFIG_SHELL HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD CC PKG_CONFIG
 export CPP AR NM LDR STRIP OBJCOPY OBJDUMP KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS
 export MAKE LEX YACC AWK PERL PYTHON PYTHON2 PYTHON3
 export HOSTCXX KBUILD_HOSTCXXFLAGS CHECK CHECKFLAGS DTC DTC_FLAGS
diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig
index c3954e33aceb..5af074e3e700 100644
--- a/arch/sandbox/Kconfig
+++ b/arch/sandbox/Kconfig
@@ -71,7 +71,7 @@ config HOST_ARCH_UNKNOWN
 !HOST_ARCH_RISCV32 && !HOST_ARCH_RISCV64
 
 config HOST_HAS_SDL
-   def_bool $(success,sdl2-config --version)
+   def_bool $(success,$(PKG_CONFIG) sdl2)
 
 config SANDBOX_SDL
bool "Enable SDL2 support in sandbox"
diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk
index 6b1da993ba4e..94c11fd78918 100644
--- a/arch/sandbox/config.mk
+++ b/arch/sandbox/config.mk
@@ -4,13 +4,12 @@
 PLATFORM_CPPFLAGS += -D__SANDBOX__ -U_FORTIFY_SOURCE
 PLATFORM_CPPFLAGS += -fPIC -ffunction-sections -fdata-sections
 PLATFORM_LIBS += -lrt
-SDL_CONFIG ?= sdl2-config
 
 # Define this to avoid linking with SDL, which requires SDL libraries
 # This can solve 'sdl-config: Command not found' errors
 ifeq ($(CONFIG_SANDBOX_SDL),y)
-PLATFORM_LIBS += $(shell $(SDL_CONFIG) --libs)
-PLATFORM_CPPFLAGS += $(shell $(SDL_CONFIG) --cflags)
+PLATFORM_LIBS += $(shell $(PKG_CONFIG) sdl2 --libs)
+PLATFORM_CPPFLAGS += $(shell $(PKG_CONFIG) sdl2 --cflags)
 endif
 
 SANITIZERS :=
diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst
index 5f8db126657f..9ad1b654989c 100644
--- a/doc/arch/sandbox/sandbox.rst
+++ b/doc/arch/sandbox/sandbox.rst
@@ -526,12 +526,6 @@ For debugging with GDB or LLDB, it is preferable to reduce 
the compiler
 optimization level (CONFIG_CC_OPTIMIZE_FOR_DEBUG=y) and to disable Link Time
 Optimization (CONFIG_LTO=n).
 
-SDL_CONFIG
---
-
-If sdl-config is on a different path from the default, set the SDL_CONFIG
-environment variable to the correct pathname before building U-Boot.
-
 
 Using valgrind / memcheck
 -

-- 
2.34.1

[PATCH 2/3] EFI: Make EFI loader depend sandbox HOST_ARCH

2024-05-17 Thread Jiaxun Yang

Since EFI loader on sandbox requires some architecture
code, make it depend on HOST_ARCH to ensure it's only
compiled on desired host.

Signed-off-by: Jiaxun Yang 
---
 lib/efi_loader/Kconfig | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 430bb7f0f7dc..54d180fe31c1 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -1,11 +1,14 @@
 config EFI_LOADER
bool "Support running UEFI applications"
-   depends on OF_LIBFDT && ( \
+   depends on OF_LIBFDT && (( \
ARM && (SYS_CPU = arm1136 || \
SYS_CPU = arm1176 || \
SYS_CPU = armv7   || \
SYS_CPU = armv8)  || \
-   X86 || RISCV || SANDBOX)
+   X86 || RISCV) || \
+   (SANDBOX && (HOST_ARCH_X86 || HOST_ARCH_X86_64 || \
+HOST_ARCH_ARM || HOST_ARCH_AARCH64 || \
+HOST_ARCH_RISCV32 || HOST_ARCH_RISCV64)))
# We need EFI_STUB_64BIT to be set on x86_64 with EFI_STUB
depends on !EFI_STUB || !X86_64 || EFI_STUB_64BIT
# We need EFI_STUB_32BIT to be set on x86_32 with EFI_STUB

-- 
2.34.1

[PATCH 1/3] sandbox: Move HOST_ARCH detection to Kconfig

2024-05-17 Thread Jiaxun Yang

Move host arch detection to Kconfig so we can make some
options depend on HOST_ARCH.

Also now we are using compiler macros to detect target
arch, which is more robust than looking at uname -a.

Signed-off-by: Jiaxun Yang 
---
 Makefile  | 24 -
 arch/sandbox/Kconfig  | 23 
 arch/sandbox/config.mk| 12 +--
 arch/sandbox/lib/crt0_sandbox_efi.S   | 14 ++--
 arch/sandbox/lib/reloc_sandbox_efi.c  | 14 ++--
 include/efi_default_filename.h| 14 ++--
 include/host_arch.h   | 26 ---
 lib/efi_selftest/efi_selftest_miniapp_exception.c |  6 +++---
 8 files changed, 53 insertions(+), 80 deletions(-)

diff --git a/Makefile b/Makefile
index 44deb339af19..596f6458e6b2 100644
--- a/Makefile
+++ b/Makefile
@@ -16,29 +16,6 @@ NAME =
 # (this increases performance and avoids hard-to-debug behaviour)
 MAKEFLAGS += -rR
 
-# Determine target architecture for the sandbox
-include include/host_arch.h
-ifeq ("", "$(CROSS_COMPILE)")
-  MK_ARCH="${shell uname -m}"
-else
-  MK_ARCH="${shell echo $(CROSS_COMPILE) | sed -n 
's/^[[:space:]]*\([^\/]*\/\)*\([^-]*\)-[^[:space:]]*/\2/p'}"
-endif
-unexport HOST_ARCH
-ifeq ("x86_64", $(MK_ARCH))
-  export HOST_ARCH=$(HOST_ARCH_X86_64)
-else ifneq (,$(findstring $(MK_ARCH), "i386" "i486" "i586" "i686"))
-  export HOST_ARCH=$(HOST_ARCH_X86)
-else ifneq (,$(findstring $(MK_ARCH), "aarch64" "armv8l"))
-  export HOST_ARCH=$(HOST_ARCH_AARCH64)
-else ifneq (,$(findstring $(MK_ARCH), "arm" "armv7" "armv7a" "armv7l"))
-  export HOST_ARCH=$(HOST_ARCH_ARM)
-else ifeq ("riscv32", $(MK_ARCH))
-  export HOST_ARCH=$(HOST_ARCH_RISCV32)
-else ifeq ("riscv64", $(MK_ARCH))
-  export HOST_ARCH=$(HOST_ARCH_RISCV64)
-endif
-undefine MK_ARCH
-
 # Avoid funny character set dependencies
 unexport LC_ALL
 LC_COLLATE=C
@@ -1963,7 +1940,6 @@ define filechk_version.h
echo \#define U_BOOT_VERSION_NUM $(VERSION); \
echo \#define U_BOOT_VERSION_NUM_PATCH $$(echo $(PATCHLEVEL) | \
sed -e "s/^0*//"); \
-   echo \#define HOST_ARCH $(HOST_ARCH); \
echo \#define CC_VERSION_STRING \"$$(LC_ALL=C $(CC) --version | head -n 
1)\"; \
echo \#define LD_VERSION_STRING \"$$(LC_ALL=C $(LD) --version | head -n 
1)\"; )
 endef
diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig
index 1c8353d6156d..c3954e33aceb 100644
--- a/arch/sandbox/Kconfig
+++ b/arch/sandbox/Kconfig
@@ -47,6 +47,29 @@ config HOST_32BIT
 config HOST_64BIT
def_bool $(cc-define,_LP64)
 
+config HOST_ARCH_X86
+   def_bool $(cc-define,__i386__)
+
+config HOST_ARCH_X86_64
+   def_bool $(cc-define,__x86_64__)
+
+config HOST_ARCH_ARM
+   def_bool $(cc-define,__arm__)
+
+config HOST_ARCH_AARCH64
+   def_bool $(cc-define,__aarch64__)
+
+config HOST_ARCH_RISCV32
+   def_bool $(cc-define,__riscv_xlen 32)
+
+config HOST_ARCH_RISCV64
+   def_bool $(cc-define,__riscv_xlen 64)
+
+config HOST_ARCH_UNKNOWN
+   def_bool !HOST_ARCH_X86 && !HOST_ARCH_X86_64 && \
+!HOST_ARCH_ARM && !HOST_ARCH_AARCH64 && \
+!HOST_ARCH_RISCV32 && !HOST_ARCH_RISCV64
+
 config HOST_HAS_SDL
def_bool $(success,sdl2-config --version)
 
diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk
index 405843800e9e..6b1da993ba4e 100644
--- a/arch/sandbox/config.mk
+++ b/arch/sandbox/config.mk
@@ -44,27 +44,27 @@ cmd_u-boot-spl = (cd $(obj) && $(CC) -o $(SPL_BIN) -Wl,-T 
u-boot-spl.lds \
-Wl,--no-whole-archive \
$(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot-spl.map -Wl,--gc-sections)
 
-ifeq ($(HOST_ARCH),$(HOST_ARCH_X86_64))
+ifeq ($(CONFIG_HOST_ARCH_X86_64),y)
 EFI_LDS := ${SRCDIR}/../../../arch/x86/lib/elf_x86_64_efi.lds
 EFI_TARGET := --target=efi-app-x86_64
-else ifeq ($(HOST_ARCH),$(HOST_ARCH_X86))
+else ifeq ($(CONFIG_HOST_ARCH_X86),y)
 EFI_LDS := ${SRCDIR}/../../../arch/x86/lib/elf_ia32_efi.lds
 EFI_TARGET := --target=efi-app-ia32
-else ifeq ($(HOST_ARCH),$(HOST_ARCH_AARCH64))
+else ifeq ($(CONFIG_HOST_ARCH_AARCH64),y)
 EFI_LDS := ${SRCDIR}/../../../arch/arm/lib/elf_aarch64_efi.lds
 OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \
-j __u_boot_list -j .rela.dyn -j .got -j .got.plt \
-j .binman_sym_table -j .text_rest \
-j .efi_runtime -j .efi_runtime_rel
-else ifeq ($(HOST_ARCH),$(HOST_ARCH_ARM))
+else ifeq ($(CONFIG_HOST_ARCH_ARM),y)
 EFI_LDS := ${SRCDIR}/../../../arch/arm/lib/elf_arm_efi.lds
 OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \
-j .data -j .got -j .got.plt -j __u_boot_list -j .rel.dyn \
-j .binman_sym_table -j .text_rest \
-j .efi_runtime -j .efi_runtime_rel
-else ifeq ($(HOST_ARCH),$(HOST_ARCH_RISCV32))
+else ifeq ($(CONFIG_HOST_ARCH_RISCV32),y)

[PATCH 0/3] sandbox: HOST_ARCH improvements

2024-05-17 Thread Jiaxun Yang

Hi all,

This series is in respond to a review comment [1] I got from Heinrich.

It moved detection of HOST_ARCH to Kconfig, which allows us to control
options based on HOST_ARCH.

It further improved detection and configuration of SDL2 so that it can
work with cross toolchain provided sysroot.

Tested on x86_64, cross compile and loosely tesed with qemu-user on
riscv64, arm, aarch64.

Thanks

[1]: https://lore.kernel.org/u-boot/2cd8d385-f0a9-4a1b-827d-1c55cd7e3...@gmx.de/

Signed-off-by: Jiaxun Yang 
---
Jiaxun Yang (3):
  sandbox: Move HOST_ARCH detection to Kconfig
  EFI: Make EFI loader depend sandbox HOST_ARCH
  sandbox: Use pkg-config to detect and config sdl2

 Makefile  | 27 ++-
 arch/sandbox/Kconfig  | 25 -
 arch/sandbox/config.mk| 17 +++---
 arch/sandbox/lib/crt0_sandbox_efi.S   | 14 ++--
 arch/sandbox/lib/reloc_sandbox_efi.c  | 14 ++--
 doc/arch/sandbox/sandbox.rst  |  6 -
 include/efi_default_filename.h| 14 ++--
 include/host_arch.h   | 26 --
 lib/efi_loader/Kconfig|  7 --
 lib/efi_selftest/efi_selftest_miniapp_exception.c |  6 ++---
 10 files changed, 63 insertions(+), 93 deletions(-)
---
base-commit: ad7dce5abd49ef3b5c93da5303e15449c8c162b4
change-id: 20240517-sandbox-hostarch-kconfig-a56a5f80b70d

Best regards,
-- 
Jiaxun Yang

Re: [PATCH v1 7/7] MAINTAINERS: Update Starfive visionfive2 maintain files.

2024-05-17 Thread Marek Vasut


On 5/17/24 11:47 AM, Minda Chen wrote:




On 5/4/24 5:03 PM, Minda Chen wrote:

Add USB related files to Starfive visionfive2 MAINTAINERS.

Signed-off-by: Minda Chen 
---
   board/starfive/visionfive2/MAINTAINERS | 2 ++
   1 file changed, 2 insertions(+)

diff --git a/board/starfive/visionfive2/MAINTAINERS

b/board/starfive/visionfive2/MAINTAINERS

index d7f638f9b4..1faf83f581 100644
--- a/board/starfive/visionfive2/MAINTAINERS
+++ b/board/starfive/visionfive2/MAINTAINERS
@@ -6,3 +6,5 @@ F:  board/starfive/visionfive2/
   F:   include/configs/starfive-visionfive2.h
   F:   configs/starfive_visionfive2_defconfig
   F:   drivers/pci/pcie_starfive_jh7110.c
+F: drivers/phy/starfive/
+F: drivers/usb/cdns3/cdns3-starfive.c


Thanks !

Reviewed-by: Marek Vasut 


Thanks for reviewing the patch set!  I will follow the comments.


Thank you !

Re: [PATCH 1/7] MIPS: Implement setjmp

2024-05-17 Thread Heinrich Schuchardt




Am 17. Mai 2024 18:32:52 MESZ schrieb Jiaxun Yang :
>Implement setjmp with o32/n64 ABI's standard stack frame.
>Note that those two ABIs slightly disagreed on placement of
>registers so they are being implemented in two different
>files.
>
>Signed-off-by: Jiaxun Yang 
>---
> arch/mips/include/asm/setjmp.h | 36 +++
> arch/mips/lib/Makefile |  2 ++
> arch/mips/lib/setjmp32.S   | 51 ++
> arch/mips/lib/setjmp64.S   | 56 ++
> 4 files changed, 145 insertions(+)
>
>diff --git a/arch/mips/include/asm/setjmp.h b/arch/mips/include/asm/setjmp.h
>new file mode 100644
>index ..afa2ffb007e6
>--- /dev/null
>+++ b/arch/mips/include/asm/setjmp.h
>@@ -0,0 +1,36 @@
>+/* SPDX-License-Identifier: GPL-2.0+ */
>+/*
>+ * Copyright (c) 2024 Jiaxun Yang 
>+ */
>+
>+#ifndef _SETJMP_H_
>+#define _SETJMP_H_1
>+
>+/*
>+ * This really should be opaque, but the EFI implementation wrongly
>+ * assumes that a 'struct jmp_buf_data' is defined.
>+ */
>+#if __mips == 64
>+struct jmp_buf_data {
>+  unsigned long ra;
>+  unsigned long sp;
>+  unsigned long fp;
>+  unsigned long gp;
>+  unsigned long s_regs[8];/* s0 - s7 */
>+};
>+#else
>+struct jmp_buf_data {
>+  unsigned long ra;
>+  unsigned long sp;
>+  unsigned long s_regs[8];/* s0 - s7 */
>+  unsigned long fp;
>+  unsigned long gp;
>+};

As the jumpbuffer is only used inside U-Boot we should be able to use the same 
register sequence independant of the bitness.

Best regards

Heinrich

>+#endif
>+
>+typedef struct jmp_buf_data jmp_buf[1];
>+
>+int setjmp(jmp_buf jmp);
>+void longjmp(jmp_buf jmp, int ret);
>+
>+#endif /* _SETJMP_H_ */
>diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
>index 1621cc9a1ff9..e36dfd0547b5 100644
>--- a/arch/mips/lib/Makefile
>+++ b/arch/mips/lib/Makefile
>@@ -10,6 +10,8 @@ obj-y+= reloc.o
> obj-y += stack.o
> obj-y += traps.o
> 
>+obj-$(CONFIG_32BIT) += setjmp32.o
>+obj-$(CONFIG_64BIT) += setjmp64.o
> obj-$(CONFIG_CMD_BOOTM) += bootm.o
> obj-$(CONFIG_CMD_GO) += boot.o
> obj-$(CONFIG_SPL_BUILD) += spl.o
>diff --git a/arch/mips/lib/setjmp32.S b/arch/mips/lib/setjmp32.S
>new file mode 100644
>index ..4a2661d29249
>--- /dev/null
>+++ b/arch/mips/lib/setjmp32.S
>@@ -0,0 +1,51 @@
>+/* SPDX-License-Identifier: GPL-2.0+ */
>+/*
>+ * Copyright (c) 2024 Jiaxun Yang 
>+ */
>+
>+#include 
>+#include 
>+
>+.pushsection .text.setjmp, "ax"
>+ENTRY(setjmp)
>+  sw  ra,  0(a0)
>+  sw  sp,  4(a0)
>+  sw  s0,  8(a0)
>+  sw  s1, 12(a0)
>+  sw  s2, 16(a0)
>+  sw  s3, 20(a0)
>+  sw  s4, 24(a0)
>+  sw  s5, 28(a0)
>+  sw  s6, 32(a0)
>+  sw  s7, 36(a0)
>+  sw  fp, 40(a0)
>+  sw  gp, 44(a0)
>+
>+  movev0, zero
>+  jr  ra
>+ENDPROC(setjmp)
>+.popsection
>+
>+.pushsection .text.longjmp, "ax"
>+ENTRY(longjmp)
>+  lw  ra,  0(a0)
>+  lw  sp,  4(a0)
>+  lw  s0,  8(a0)
>+  lw  s1, 12(a0)
>+  lw  s2, 16(a0)
>+  lw  s3, 20(a0)
>+  lw  s4, 24(a0)
>+  lw  s5, 28(a0)
>+  lw  s6, 32(a0)
>+  lw  s7, 36(a0)
>+  lw  fp, 40(a0)
>+  lw  gp, 44(a0)
>+
>+  beqza1, 1f
>+  movev0, a1
>+  jr  ra
>+1:
>+  li  v0, 1
>+  jr  ra
>+ENDPROC(longjmp)
>+.popsection
>diff --git a/arch/mips/lib/setjmp64.S b/arch/mips/lib/setjmp64.S
>new file mode 100644
>index ..6f615bb10014
>--- /dev/null
>+++ b/arch/mips/lib/setjmp64.S
>@@ -0,0 +1,56 @@
>+/* SPDX-License-Identifier: GPL-2.0+ */
>+/*
>+ * Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
>+ * Copyright (c) 2017 Lemote Co.Ltd
>+ *Author: Heiher 
>+ * Copyright (c) 2024 Jiaxun Yang 
>+ */
>+
>+#include 
>+#include 
>+
>+.pushsection .text.setjmp, "ax"
>+ENTRY(setjmp)
>+  sd  ra, 0x00(a0)
>+  sd  sp, 0x08(a0)
>+  sd  fp, 0x10(a0)
>+  sd  gp, 0x18(a0)
>+
>+  sd  s0, 0x20(a0)
>+  sd  s1, 0x28(a0)
>+  sd  s2, 0x30(a0)
>+  sd  s3, 0x38(a0)
>+  sd  s4, 0x40(a0)
>+  sd  s5, 0x48(a0)
>+  sd  s6, 0x50(a0)
>+  sd  s7, 0x58(a0)
>+
>+  movev0, zero
>+  jr  ra
>+ENDPROC(setjmp)
>+.popsection
>+
>+.pushsection .text.longjmp, "ax"
>+ENTRY(longjmp)
>+  ld  ra, 0x00(a0)
>+  ld  sp, 0x08(a0)
>+  ld  fp, 0x10(a0)
>+  ld  gp, 0x18(a0)
>+
>+  ld  s0, 0x20(a0)
>+  ld  s1, 0x28(a0)
>+  ld  s2, 0x30(a0)
>+  ld  s3, 0x38(a0)
>+  ld  s4, 0x40(a0)
>+  ld  s5, 0x48(a0)
>+  ld  s6, 0x50(a0)
>+  ld  s7, 0x58(a0)
>+
>+  beqza1, 1f
>+  movev0, a1
>+  jr  ra
>+1:
>+  li  v0, 1
>+  jr  ra
>+ENDPROC(longjmp)
>+.popsection
>

Re: [PATCH 2/7] efi: Allow runtime relocate to be disabled

2024-05-17 Thread Heinrich Schuchardt




Am 17. Mai 2024 18:32:53 MESZ schrieb Jiaxun Yang :
>Allow runtime relocate to be disabled because on MIPS we
>never do that. It's guaranteed that OS won't call
>set_virtual_address_map and convert_pointer as well.
>
>On MIPS KSEG0 is always mapped to memory and there is no
>way to disable it for kernel mode. Both EFI runtime and
>kernel lays in this segment, so relocation is totally
>unnecessary.
>
>Also U-Boot does not use traditional .dyn.rel to perform
>relocation on MIPS, that makes implementation of runtime
>relocation pretty hard.
>
>Signed-off-by: Jiaxun Yang 
>---
> include/efi_loader.h  | 26 ++
> lib/efi_loader/Kconfig| 10 ++
> lib/efi_loader/efi_image_loader.c |  1 +
> lib/efi_loader/efi_memory.c   | 14 +++---
> lib/efi_loader/efi_runtime.c  | 11 ++-
> lib/efi_loader/efi_var_mem.c  |  6 +-
> lib/efi_selftest/Makefile |  2 +-
> 7 files changed, 56 insertions(+), 14 deletions(-)
>
>diff --git a/include/efi_loader.h b/include/efi_loader.h
>index 9600941aa327..1ae62906e099 100644
>--- a/include/efi_loader.h
>+++ b/include/efi_loader.h
>@@ -31,7 +31,7 @@ static inline void *guidcpy(void *dst, const void *src)
>   return memcpy(dst, src, sizeof(efi_guid_t));
> }
> 
>-#if CONFIG_IS_ENABLED(EFI_LOADER)
>+#if CONFIG_IS_ENABLED(EFI_LOADER) && CONFIG_IS_ENABLED(EFI_RUNTIME_RELOCATE)
> 
> /**
>  * __efi_runtime_data - declares a non-const variable for EFI runtime section
>@@ -79,6 +79,23 @@ static inline void *guidcpy(void *dst, const void *src)
>  */
> #define __efi_runtime __section(".text.efi_runtime")
> 
>+/* Call this to relocate the runtime section to an address space */
>+void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
>+
>+#else /* CONFIG_IS_ENABLED(EFI_LOADER) && 
>CONFIG_IS_ENABLED(EFI_RUNTIME_RELOCATE) */
>+
>+/* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */
>+#define __efi_runtime_data
>+#define __efi_runtime_rodata
>+#define __efi_runtime
>+
>+static inline void efi_runtime_relocate(ulong offset,
>+  struct efi_mem_desc *map) {};
>+
>+#endif /* CONFIG_IS_ENABLED(EFI_LOADER) && 
>CONFIG_IS_ENABLED(EFI_RUNTIME_RELOCATE) */
>+
>+#if CONFIG_IS_ENABLED(EFI_LOADER)
>+
> /*
>  * Call this with mmio_ptr as the _pointer_ to a pointer to an MMIO region
>  * to make it available at runtime
>@@ -101,10 +118,6 @@ efi_status_t efi_launch_capsules(void);
> 
> #else /* CONFIG_IS_ENABLED(EFI_LOADER) */
> 
>-/* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */
>-#define __efi_runtime_data
>-#define __efi_runtime_rodata
>-#define __efi_runtime
> static inline efi_status_t efi_add_runtime_mmio(void *mmio_ptr, u64 len)
> {
>   return EFI_SUCCESS;
>@@ -118,7 +131,6 @@ static inline efi_status_t efi_launch_capsules(void)
> {
>   return EFI_SUCCESS;
> }
>-
> #endif /* CONFIG_IS_ENABLED(EFI_LOADER) */
> 
> #if CONFIG_IS_ENABLED(EFI_BINARY_EXEC)
>@@ -641,8 +653,6 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj 
>*handle,
>struct efi_loaded_image *loaded_image_info);
> /* Called once to store the pristine gd pointer */
> void efi_save_gd(void);
>-/* Call this to relocate the runtime section to an address space */
>-void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
> /* Call this to get image parameters */
> void efi_get_image_parameters(void **img_addr, size_t *img_size);
> /* Add a new object to the object list. */
>diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
>index 430bb7f0f7dc..bc5ae9086ea2 100644
>--- a/lib/efi_loader/Kconfig
>+++ b/lib/efi_loader/Kconfig
>@@ -359,6 +359,16 @@ config EFI_UNICODE_CAPITALIZATION
> 
> endif
> 
>+config EFI_RUNTIME_RELOCATE
>+  bool "Support relocation for EFI runtime service"
>+  depends on ARM || X86 || RISCV || SANDBOX

The sandbox should build on all architectures with EFI support. So for the 
sandbox I guess you should consider the host architecture.

>+  default y
>+  help
>+Select this option to enable relocation for EFI runtime service. It
>+enables set_virtual_address_map and convert_pointer runtime service.
>+It is required for OS on most architectures to make use of EFI runtime
>+services.
>+
> config EFI_LOADER_BOUNCE_BUFFER
>   bool "EFI Applications use bounce buffers for DMA operations"
>   depends on ARM64
>diff --git a/lib/efi_loader/efi_image_loader.c 
>b/lib/efi_loader/efi_image_loader.c
>index 604243603289..cedc4d822fe7 100644
>--- a/lib/efi_loader/efi_image_loader.c
>+++ b/lib/efi_loader/efi_image_loader.c
>@@ -50,6 +50,7 @@ static int machines[] = {
> #if defined(__riscv) && (__riscv_xlen == 64)
>   IMAGE_FILE_MACHINE_RISCV64,
> #endif
>+
>   0 };
> 
> /**
>diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
>index 12cf23fa3fa8..7a1959d2409a 100644
>--- a/lib/efi_loader/efi_memory.c
>+++

Re: [PATCH 4/7] Makefile.lib: Enforce EFI CFLAGS/AFLAGS

2024-05-17 Thread Heinrich Schuchardt




Am 17. Mai 2024 18:32:55 MESZ schrieb Jiaxun Yang :
>EFI AFLAGS/CFLAGS should be enforced for those runtime
>supporting files as well, otherwise EFI applications
>will fail to compile on MIPS.
>
>Signed-off-by: Jiaxun Yang 
>---
> Makefile | 3 +++
> scripts/Makefile.lib | 8 ++--
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
>diff --git a/Makefile b/Makefile
>index 44deb339af19..6c9098f5823f 100644
>--- a/Makefile
>+++ b/Makefile
>@@ -652,6 +652,8 @@ export EFI_CRT0# Filename of EFI CRT0 in 
>arch/$(ARCH)/lib
> export EFI_RELOC  # Filename of EFU relocation code in arch/$(ARCH)/lib
> export CFLAGS_EFI # Compiler flags to add when building EFI app
> export CFLAGS_NON_EFI # Compiler flags to remove when building EFI app
>+export AFLAGS_EFI # Assembler flags to add when building EFI app
>+export AFLAGS_NON_EFI # Assembler flags to remove when building EFI app
> export EFI_TARGET # binutils target if EFI is natively supported
> 
> export LTO_ENABLE
>@@ -926,6 +928,7 @@ export PLATFORM_LIBGCC
> LDPPFLAGS += \
>   -include $(srctree)/include/u-boot/u-boot.lds.h \
>   -DCPUDIR=$(CPUDIR) \
>+  -DARCHDIR=arch/$(ARCH) \

This change seems to be unrelated.

>   $(shell $(LD) --version | \
> sed -ne 's/GNU ld version 
> \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
> 
>diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
>index 52aed7a65d47..5aacab32cb38 100644
>--- a/scripts/Makefile.lib
>+++ b/scripts/Makefile.lib
>@@ -495,8 +495,12 @@ $(obj)/%_efi.so: $(obj)/%.o $(obj)/efi_crt0.o 
>$(obj)/efi_reloc.o $(obj)/efi_free
> 
> targets += $(obj)/efi_crt0.o $(obj)/efi_reloc.o $(obj)/efi_freestanding.o
> 
>-CFLAGS_REMOVE_efi_reloc.o := $(LTO_CFLAGS)
>-CFLAGS_REMOVE_efi_freestanding.o := $(LTO_CFLAGS)
>+AFLAGS_efi_crt0.o := $(AFLAGS_EFI)
>+CFLAGS_efi_reloc.o := $(CFLAGS_EFI)
>+CFLAGS_efi_freestanding.o := $(CFLAGS_EFI)
>+AFLAGS_REMOVE_efi_crt0.o := $(AFLAGS_NON_EFI)
>+CFLAGS_REMOVE_efi_reloc.o := $(CFLAGS_NON_EFI) $(LTO_CFLAGS)
>+CFLAGS_REMOVE_efi_freestanding.o := $(CFLAGS_NON_EFI) $(LTO_CFLAGS)
> 
> # ACPI
> # ---
>

Re: [PATCH] env: Invert gd->env_valid for env_mmc_save

2024-05-17 Thread Tom Rini

On Fri, May 10, 2024 at 01:38:34PM +0200, jas...@fancydomain.eu wrote:

> From: Jasper Orschulko 
> 
> The A/B update strategy of the env's has a gap in the first 2 calls of 
> saveenv.
> The env's are stored twice on the first memory area if:
> gd->env_valid == ENV_INVALID.
> 
> u-boot=> saveenv
> Saving Environment to MMC... Writing to MMC(1)... OK
> u-boot=> saveenv
> Saving Environment to MMC... Writing to MMC(1)... OK  <-- !!!
> u-boot=> saveenv
> Saving Environment to MMC... Writing to redundant MMC(1)... OK
> u-boot=> saveenv
> Saving Environment to MMC... Writing to MMC(1)... OK
> 
> Signed-off-by: Michael Glembotzki 
> Signed-off-by: Jasper Orschulko 
> ---
>  env/mmc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/env/mmc.c b/env/mmc.c
> index 7afb733e890..2bef30c973c 100644
> --- a/env/mmc.c
> +++ b/env/mmc.c
> @@ -299,7 +299,7 @@ static int env_mmc_save(void)
>   ret = 0;
>  
>   if (IS_ENABLED(CONFIG_SYS_REDUNDAND_ENVIRONMENT))
> - gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : 
> ENV_REDUND;
> + gd->env_valid = gd->env_valid == ENV_VALID ? ENV_REDUND : 
> ENV_VALID;
>  
>  fini:
>   fini_mmc_for_env(mmc);

Can you please explain a little more on how you get to this problem? The
same code / test exists in env/fat.c, env/sf.c and env/ubi.c. In the
case of env/mmc.c it's been that way since introduction in:
commit d196bd880347373237d73e0d115b4d51c68cf2ad
Author: Michael Heimpold 
Date:   Wed Apr 10 10:36:19 2013 +

env_mmc: add support for redundant environment

This patch add support for storing the environment redundant on
mmc devices. Substantially it re-uses the logic from the NAND 
implementation,
that means using an incremental counter for marking newer data.

Signed-off-by: Michael Heimpold 

as well. Thanks!

-- 
Tom


signature.asc
Description: PGP signature

[PATCH v3 12/12] mailmap: Update email for Paul Burton

2024-05-17 Thread Jiaxun Yang

Paul had left MIPS a couple of years ago, his email address is
no longer valid.

Replace it with his kenrel.org email, which has been used in
kernel and QEMU, in case we still want to reach him.

Signed-off-by: Jiaxun Yang 
---
 .mailmap| 3 ++-
 board/imgtec/boston/MAINTAINERS | 2 +-
 board/imgtec/malta/MAINTAINERS  | 2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/.mailmap b/.mailmap
index 8049856d41c3..bb7c1c3869ab 100644
--- a/.mailmap
+++ b/.mailmap
@@ -87,7 +87,8 @@ This contributor prefers not to receive mails 
  

 Patrice Chotard  
 Patrick Delaunay  
-Paul Burton  
+Paul Burton  
+Paul Burton  
 Piyush Mehta  
 Prabhakar Kushwaha 
 Punnaiah Choudary Kalluri  

diff --git a/board/imgtec/boston/MAINTAINERS b/board/imgtec/boston/MAINTAINERS
index 12e1652858bb..b03a6487db29 100644
--- a/board/imgtec/boston/MAINTAINERS
+++ b/board/imgtec/boston/MAINTAINERS
@@ -1,5 +1,5 @@
 BOSTON BOARD
-M: Paul Burton 
+M: Paul Burton 
 S: Maintained
 F:  arch/mips/dts/boston-u-boot.dtsi
 F: board/imgtec/boston/
diff --git a/board/imgtec/malta/MAINTAINERS b/board/imgtec/malta/MAINTAINERS
index b1cf297f4fac..252c5e45ab56 100644
--- a/board/imgtec/malta/MAINTAINERS
+++ b/board/imgtec/malta/MAINTAINERS
@@ -1,5 +1,5 @@
 MALTA BOARD
-M: Paul Burton 
+M: Paul Burton 
 S: Maintained
 F: board/imgtec/malta/
 F: include/configs/malta.h

-- 
2.34.1

[PATCH v3 11/12] MIPS: boston: Migrate to OF_UPSTREAM

2024-05-17 Thread Jiaxun Yang

We can now boot with upstream devicetree.

Reviewed-by: Sumit Garg 
Signed-off-by: Jiaxun Yang 
---
 arch/mips/Kconfig|   1 +
 arch/mips/dts/Makefile   |   1 -
 arch/mips/dts/boston-u-boot.dtsi |  10 ++
 arch/mips/dts/img,boston.dts | 222 ---
 board/imgtec/boston/MAINTAINERS  |   1 +
 configs/boston32r2_defconfig |   2 +-
 configs/boston32r2el_defconfig   |   2 +-
 configs/boston32r6_defconfig |   2 +-
 configs/boston32r6el_defconfig   |   2 +-
 configs/boston64r2_defconfig |   2 +-
 configs/boston64r2el_defconfig   |   2 +-
 configs/boston64r6_defconfig |   2 +-
 configs/boston64r6el_defconfig   |   2 +-
 13 files changed, 20 insertions(+), 231 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 748b5175b2eb..733a8de4fb83 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -146,6 +146,7 @@ config TARGET_BOSTON
select SUPPORTS_CPU_MIPS64_R2
select SUPPORTS_CPU_MIPS64_R6
select SUPPORTS_LITTLE_ENDIAN
+   imply OF_UPSTREAM
imply BOOTSTD_FULL
imply CLK
imply CLK_BOSTON
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 14fbce597b9e..5478dcd8d025 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -3,7 +3,6 @@
 dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
 dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
 dtb-$(CONFIG_TARGET_AP152) += ap152.dtb
-dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
diff --git a/arch/mips/dts/boston-u-boot.dtsi b/arch/mips/dts/boston-u-boot.dtsi
new file mode 100644
index ..1b0c0a289613
--- /dev/null
+++ b/arch/mips/dts/boston-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+_regs {
+   compatible = "img,boston-platform-regs", "syscon", "simple-mfd";
+   bootph-all;
+};
+
+_boston {
+   bootph-all;
+};
diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts
deleted file mode 100644
index c1a73963037d..
--- a/arch/mips/dts/img,boston.dts
+++ /dev/null
@@ -1,222 +0,0 @@
-/dts-v1/;
-
-#include 
-#include 
-#include 
-#include 
-
-/ {
-   #address-cells = <1>;
-   #size-cells = <1>;
-   compatible = "img,boston";
-
-   chosen {
-   stdout-path = 
-   };
-
-   cpus {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   cpu@0 {
-   device_type = "cpu";
-   compatible = "img,mips";
-   reg = <0>;
-   clocks = <_boston BOSTON_CLK_CPU>;
-   };
-   };
-
-   memory@0 {
-   device_type = "memory";
-   reg = <0x 0x1000>;
-   };
-
-   gic: interrupt-controller {
-   compatible = "mti,gic";
-
-   interrupt-controller;
-   #interrupt-cells = <3>;
-
-   timer {
-   compatible = "mti,gic-timer";
-   interrupts = ;
-   clocks = <_boston BOSTON_CLK_CPU>;
-   };
-   };
-
-   pci0: pci@1000 {
-   status = "disabled";
-   compatible = "xlnx,axi-pcie-host-1.00.a";
-   device_type = "pci";
-   reg = <0x1000 0x200>;
-
-   #address-cells = <3>;
-   #size-cells = <2>;
-   #interrupt-cells = <1>;
-
-   interrupt-parent = <>;
-   interrupts = ;
-
-   ranges = <0x0200 0 0x4000
- 0x4000 0 0x4000>;
-
-   interrupt-map-mask = <0 0 0 7>;
-   interrupt-map = <0 0 0 1 _intc 0>,
-   <0 0 0 2 _intc 1>,
-   <0 0 0 3 _intc 2>,
-   <0 0 0 4 _intc 3>;
-
-   pci0_intc: interrupt-controller {
-   interrupt-controller;
-   #address-cells = <0>;
-   #interrupt-cells = <1>;
-   };
-   };
-
-   pci1: pci@1200 {
-   status = "disabled";
-   compatible = "xlnx,axi-pcie-host-1.00.a";
-   device_type = "pci";
-   reg = <0x1200 0x200>;
-
-   #address-cells = <3>;
-   #size-cells = <2>;
-   #interrupt-cells = <1>;
-
-   interrupt-parent = <>;
-   interrupts = ;
-
-   ranges = <0x0200 0 0x2000
- 0x2000 0 0x2000>;
-
-   interrupt-map-mask = <0 0 0 7>;
-   interrupt-map = <0 0 0 1 _intc 0>,
-   <0 0 0 2 _intc 1>,
-   <0 0 0 3 _intc 2>,
-   <0 0 0 4 _intc 3>;
-
-

[PATCH v3 10/12] dts/upstream: Add Makefile for MIPS

2024-05-17 Thread Jiaxun Yang

It is required to make OF_UPSTREAM work.

Reviewed-by: Sumit Garg 
Signed-off-by: Jiaxun Yang 
---
 dts/upstream/src/mips/Makefile | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/dts/upstream/src/mips/Makefile b/dts/upstream/src/mips/Makefile
new file mode 100644
index ..9a8f6aa35846
--- /dev/null
+++ b/dts/upstream/src/mips/Makefile
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+include $(srctree)/scripts/Makefile.dts
+
+targets += $(dtb-y)
+
+# Add any required device tree compiler flags here
+DTC_FLAGS += -a 0x8
+
+PHONY += dtbs
+dtbs: $(addprefix $(obj)/, $(dtb-y))
+   @:
+
+clean-files := */*.dtb */*.dtbo

-- 
2.34.1

[PATCH v3 09/12] clk: boston: Allow to get regmap from parent device

2024-05-17 Thread Jiaxun Yang

In upstream devicetree, clk_boston is a child of syscon node
and there is no "regmap" property for clk_boston node.

Try to check parent device first to look for syscon.

Signed-off-by: Jiaxun Yang 
---
v2: Move syscon_get_regmap to probe
v3: Move syscon detection code to probe to ensure
parent is probbed before syscon_get_regmap.
---
 drivers/clk/clk_boston.c | 19 ---
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c
index 030ff7cc58ec..71e030f463e1 100644
--- a/drivers/clk/clk_boston.c
+++ b/drivers/clk/clk_boston.c
@@ -58,17 +58,21 @@ const struct clk_ops clk_boston_ops = {
.get_rate = clk_boston_get_rate,
 };
 
-static int clk_boston_of_to_plat(struct udevice *dev)
+static int clk_boston_probe(struct udevice *dev)
 {
struct clk_boston *state = dev_get_plat(dev);
struct udevice *syscon;
int err;
 
-   err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
-  "regmap", );
-   if (err) {
-   pr_err("unable to find syscon device\n");
-   return err;
+   if (dev->parent && device_get_uclass_id(dev->parent) == UCLASS_SYSCON) {
+   syscon = dev->parent;
+   } else {
+   err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+  "regmap", );
+   if (err) {
+   pr_err("unable to find syscon device\n");
+   return err;
+   }
}
 
state->regmap = syscon_get_regmap(syscon);
@@ -91,7 +95,8 @@ U_BOOT_DRIVER(clk_boston) = {
.name = "boston_clock",
.id = UCLASS_CLK,
.of_match = clk_boston_match,
-   .of_to_plat = clk_boston_of_to_plat,
+   .probe = clk_boston_probe,
.plat_auto  = sizeof(struct clk_boston),
.ops = _boston_ops,
+   .flags = DM_FLAG_PRE_RELOC,
 };

-- 
2.34.1

[PATCH v3 08/12] MIPS: boston: Provide default env vars

2024-05-17 Thread Jiaxun Yang

Provide default environment variables on image loading address
to make the board useful.

Signed-off-by: Jiaxun Yang 
---
 board/imgtec/boston/Kconfig| 4 
 board/imgtec/boston/boston.env | 9 +
 2 files changed, 13 insertions(+)

diff --git a/board/imgtec/boston/Kconfig b/board/imgtec/boston/Kconfig
index 5537788001a3..965847d9650d 100644
--- a/board/imgtec/boston/Kconfig
+++ b/board/imgtec/boston/Kconfig
@@ -9,6 +9,10 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
default "boston"
 
+
+config ENV_SOURCE_FILE
+   default "boston"
+
 config TEXT_BASE
default 0x9fc0 if 32BIT
default 0x9fc0 if 64BIT
diff --git a/board/imgtec/boston/boston.env b/board/imgtec/boston/boston.env
new file mode 100644
index ..796e0fd6bf98
--- /dev/null
+++ b/board/imgtec/boston/boston.env
@@ -0,0 +1,9 @@
+#ifdef CONFIG_64BIT
+fdt_addr_r=0x80001000
+kernel_addr_r=0x8800
+ramdisk_addr_r=0x8b00
+#else
+fdt_addr_r=0x80001000
+kernel_addr_r=0x8800
+ramdisk_addr_r=0x8b00
+#endif

-- 
2.34.1

[PATCH v3 07/12] MIPS: boston: Imply various options

2024-05-17 Thread Jiaxun Yang

This is a PC-like platform board.
Enable drivers for most on-board devices to make it useful.

Signed-off-by: Jiaxun Yang 
---
 arch/mips/Kconfig | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index eb7f3ad23762..748b5175b2eb 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -146,7 +146,34 @@ config TARGET_BOSTON
select SUPPORTS_CPU_MIPS64_R2
select SUPPORTS_CPU_MIPS64_R6
select SUPPORTS_LITTLE_ENDIAN
+   imply BOOTSTD_FULL
+   imply CLK
+   imply CLK_BOSTON
imply CMD_DM
+   imply AHCI
+   imply AHCI_PCI
+   imply CFI_FLASH
+   imply MTD_NOR_FLASH
+   imply MMC
+   imply MMC_PCI
+   imply MMC_SDHCI
+   imply MMC_SDHCI_SDMA
+   imply PCH_GBE
+   imply PCI
+   imply PCI_XILINX
+   imply PCI_INIT_R
+   imply SCSI
+   imply SCSI_AHCI
+   imply SYS_NS16550
+   imply SYSRESET
+   imply SYSRESET_CMD_POWEROFF
+   imply SYSRESET_SYSCON
+   imply USB
+   imply USB_EHCI_HCD
+   imply USB_EHCI_PCI
+   imply USB_XHCI_HCD
+   imply USB_XHCI_PCI
+   imply CMD_USB
 
 config TARGET_XILFPGA
bool "Support Imagination Xilfpga"

-- 
2.34.1

[PATCH v3 06/12] MIPS: Provide dummy acpi_table.h

2024-05-17 Thread Jiaxun Yang

Some drivers need this header.
Provide this dummy header as riscv did.

Signed-off-by: Jiaxun Yang 
---
 arch/mips/include/asm/acpi_table.h | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/mips/include/asm/acpi_table.h 
b/arch/mips/include/asm/acpi_table.h
new file mode 100644
index ..b4139d0ba328
--- /dev/null
+++ b/arch/mips/include/asm/acpi_table.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __ASM_ACPI_TABLE_H__
+#define __ASM_ACPI_TABLE_H__
+
+/*
+ * This file is needed by some drivers.
+ */
+
+#endif /* __ASM_ACPI_TABLE_H__ */

-- 
2.34.1

[PATCH v3 05/12] ahci: dwc_ahsata: Generalize the driver

2024-05-17 Thread Jiaxun Yang

Remove hard dependencies to arch headers, get clock from clk
subsystem if arch clock function is not available, align
compatible strings with devicetree binding.

No functional change on existing platforms, just get it build
on other platforms.

Signed-off-by: Jiaxun Yang 
---
 drivers/ata/dwc_ahsata.c | 38 --
 1 file changed, 32 insertions(+), 6 deletions(-)

diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c
index c2cde48c0b55..27c24228ef89 100644
--- a/drivers/ata/dwc_ahsata.c
+++ b/drivers/ata/dwc_ahsata.c
@@ -6,6 +6,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -18,9 +19,11 @@
 #include 
 #include 
 #include 
+#if IS_ENABLED(CONFIG_ARCH_MX5) || IS_ENABLED(CONFIG_ARCH_MX6)
 #include 
 #include 
 #include 
+#endif
 #include 
 #include 
 #include 
@@ -115,13 +118,12 @@ static int ahci_setup_oobr(struct ahci_uc_priv *uc_priv, 
int clk)
return 0;
 }
 
-static int ahci_host_init(struct ahci_uc_priv *uc_priv)
+static int ahci_host_init(struct ahci_uc_priv *uc_priv, int clk)
 {
u32 tmp, cap_save, num_ports;
int i, j, timeout = 1000;
struct sata_port_regs *port_mmio = NULL;
struct sata_host_regs *host_mmio = uc_priv->mmio_base;
-   int clk = mxc_get_clock(MXC_SATA_CLK);
 
cap_save = readl(_mmio->cap);
cap_save |= SATA_HOST_CAP_SSS;
@@ -909,17 +911,41 @@ int dwc_ahsata_scan(struct udevice *dev)
 int dwc_ahsata_probe(struct udevice *dev)
 {
struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
+   struct clk_bulk clk_bulk __maybe_unused;
+   struct clk clk __maybe_unused;
+   int sataclk;
int ret;
 
-#if defined(CONFIG_MX6)
+#if IS_ENABLED(CONFIG_MX6)
setup_sata();
 #endif
+#if IS_ENABLED(CONFIG_MX5) || IS_ENABLED(CONFIG_MX6)
+   sataclk = mxc_get_clock(MXC_SATA_CLK);
+#else
+   ret = clk_get_bulk(dev, _bulk);
+   if (ret)
+   return ret;
+
+   ret = clk_enable_bulk(_bulk);
+   if (ret)
+   return ret;
+
+   ret = clk_get_by_name(dev, "sata", );
+   if (ret)
+   return ret;
+
+   sataclk = clk_get_rate();
+#endif
+   if (IS_ERR_VALUE(sataclk)) {
+   log_err("Unable to get SATA clock rate\n");
+   return -EINVAL;
+   }
uc_priv->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NO_ATAPI;
uc_priv->mmio_base = dev_read_addr_ptr(dev);
 
/* initialize adapter */
-   ret = ahci_host_init(uc_priv);
+   ret = ahci_host_init(uc_priv, sataclk);
if (ret)
return ret;
 
@@ -961,7 +987,6 @@ U_BOOT_DRIVER(dwc_ahsata_blk) = {
.ops= _ahsata_blk_ops,
 };
 
-#if CONFIG_IS_ENABLED(DWC_AHSATA_AHCI)
 struct ahci_ops dwc_ahsata_ahci_ops = {
.port_status = dwc_ahsata_port_status,
.reset   = dwc_ahsata_bus_reset,
@@ -969,7 +994,9 @@ struct ahci_ops dwc_ahsata_ahci_ops = {
 };
 
 static const struct udevice_id dwc_ahsata_ahci_ids[] = {
+   { .compatible = "fsl,imx53-ahci" },
{ .compatible = "fsl,imx6q-ahci" },
+   { .compatible = "fsl,imx6qp-ahci" },
{ }
 };
 
@@ -980,4 +1007,3 @@ U_BOOT_DRIVER(dwc_ahsata_ahci) = {
.ops  = _ahsata_ahci_ops,
.probe= dwc_ahsata_probe,
 };
-#endif

-- 
2.34.1

[PATCH v3 04/12] ahci: DMA addressing fixes

2024-05-17 Thread Jiaxun Yang

Ensure that we are using correct physical/virtual address for
DMA buffer write and hardware register settings.

The convention is: in ahci_ioports all pointers are virtual,
that will be converted to physical address when writing to
hardware registers or into sg/cmd_tbl.

Also fixed 64bit physical address support for dwc_ahsata, ensure
higher bits are written into registers/sg properly.

Use memalign for allocating aligned buffer in dwc_ahsata so we
don't have to do our own alignment in driver.

Signed-off-by: Jiaxun Yang 
---
 drivers/ata/ahci.c| 34 -
 drivers/ata/dwc_ahsata.c  | 44 +++
 drivers/ata/dwc_ahsata_priv.h |  2 --
 include/ahci.h|  4 ++--
 4 files changed, 42 insertions(+), 42 deletions(-)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index ac869296d525..21b13fedac50 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -421,7 +421,7 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 
port,
 
 static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
 {
-   phys_addr_t pa = virt_to_phys((void *)pp->cmd_tbl);
+   phys_addr_t pa = virt_to_phys(pp->cmd_tbl);
 
pp->cmd_slot->opts = cpu_to_le32(opts);
pp->cmd_slot->status = 0;
@@ -450,7 +450,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 
port)
 {
struct ahci_ioports *pp = &(uc_priv->port[port]);
void __iomem *port_mmio = pp->port_mmio;
-   u64 dma_addr;
+   phys_addr_t dma_addr;
u32 port_status;
void __iomem *mem;
 
@@ -474,34 +474,32 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, 
u8 port)
 * First item in chunk of DMA memory: 32-slot command table,
 * 32 bytes each in size
 */
-   pp->cmd_slot =
-   (struct ahci_cmd_hdr *)(uintptr_t)virt_to_phys((void *)mem);
-   debug("cmd_slot = %p\n", pp->cmd_slot);
-   mem += (AHCI_CMD_SLOT_SZ + 224);
+   pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
+   mem += AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT;
 
/*
 * Second item: Received-FIS area
 */
-   pp->rx_fis = virt_to_phys((void *)mem);
+   pp->rx_fis = mem;
mem += AHCI_RX_FIS_SZ;
 
/*
 * Third item: data area for storing a single command
 * and its scatter-gather table
 */
-   pp->cmd_tbl = virt_to_phys((void *)mem);
-   debug("cmd_tbl_dma = %lx\n", pp->cmd_tbl);
+   pp->cmd_tbl = mem;
 
mem += AHCI_CMD_TBL_HDR;
-   pp->cmd_tbl_sg =
-   (struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem);
-
-   dma_addr = (ulong)pp->cmd_slot;
-   writel_with_flush(dma_addr, port_mmio + PORT_LST_ADDR);
-   writel_with_flush(dma_addr >> 32, port_mmio + PORT_LST_ADDR_HI);
-   dma_addr = (ulong)pp->rx_fis;
-   writel_with_flush(dma_addr, port_mmio + PORT_FIS_ADDR);
-   writel_with_flush(dma_addr >> 32, port_mmio + PORT_FIS_ADDR_HI);
+   pp->cmd_tbl_sg = (struct ahci_sg *)(mem);
+
+   dma_addr = virt_to_phys(pp->cmd_slot);
+   debug("cmd_slot_dma = 0x%08llx\n", (u64)dma_addr);
+   writel_with_flush(lower_32_bits(dma_addr), port_mmio + PORT_LST_ADDR);
+   writel_with_flush(upper_32_bits(dma_addr), port_mmio + 
PORT_LST_ADDR_HI);
+   dma_addr = virt_to_phys(pp->rx_fis);
+   debug("rx_fis_dma = 0x%08llx\n", (u64)dma_addr);
+   writel_with_flush(lower_32_bits(dma_addr), port_mmio + PORT_FIS_ADDR);
+   writel_with_flush(upper_32_bits(dma_addr), port_mmio + 
PORT_FIS_ADDR_HI);
 
 #ifdef CONFIG_SUNXI_AHCI
sunxi_dma_init(port_mmio);
diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c
index a29d641343ed..c2cde48c0b55 100644
--- a/drivers/ata/dwc_ahsata.c
+++ b/drivers/ata/dwc_ahsata.c
@@ -329,6 +329,7 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 
port,
 {
struct ahci_ioports *pp = _priv->port[port];
struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
+   phys_addr_t pa = virt_to_phys(buf);
u32 sg_count, max_bytes;
int i;
 
@@ -340,9 +341,8 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 
port,
}
 
for (i = 0; i < sg_count; i++) {
-   ahci_sg->addr =
-   cpu_to_le32((u32)buf + i * max_bytes);
-   ahci_sg->addr_hi = 0;
+   ahci_sg->addr = cpu_to_le32(lower_32_bits(pa));
+   ahci_sg->addr_hi = cpu_to_le32(upper_32_bits(pa));
ahci_sg->flags_size = cpu_to_le32(0x3f &
(buf_len < max_bytes
? (buf_len - 1)
@@ -358,14 +358,14 @@ static void ahci_fill_cmd_slot(struct ahci_ioports *pp, 
u32 cmd_slot, u32 opts)
 {
struct ahci_cmd_hdr *cmd_hdr = (struct ahci_cmd_hdr *)(pp->cmd_slot +
AHCI_CMD_SLOT_SZ * cmd_slot);
+   phys_addr_t pa =

[PATCH v3 03/12] pci: Enable PCI_MAP_SYSTEM_MEMORY when ARCH_MAP_SYSMEM is not set

2024-05-17 Thread Jiaxun Yang

For MIPS we are always looking gd->dram in virtual address so
PCI_MAP_SYSTEM_MEMORY should always be enabled.

If in future we ever want to make it physical we have to set
ARCH_MAP_SYSMEM.

Signed-off-by: Jiaxun Yang 
---
 drivers/pci/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 289d1deb38b6..14f6067fa29b 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -67,6 +67,7 @@ config PCI_CONFIG_HOST_BRIDGE
 config PCI_MAP_SYSTEM_MEMORY
bool "Map local system memory from a virtual base address"
depends on MIPS
+   default y if !ARCH_MAP_SYSMEM
help
  Say Y if base address of system memory is being used as a virtual 
address
  instead of a physical address (e.g. on MIPS). The PCI core will then 
remap

-- 
2.34.1

[PATCH v3 02/12] pci: auto: Reduce bridge mem alignment boundary for boston

2024-05-17 Thread Jiaxun Yang

Boston has a very limited memory range for PCI controllers, where
1MB can't easily fit into it.

Make alignment boundary of PCI memory resource allocation a Kconfig
option and default to 0x1 for boston.

Signed-off-by: Jiaxun Yang 
---
 drivers/pci/Kconfig|  9 +
 drivers/pci/pci_auto.c | 16 
 2 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 8d02ab82ad9f..289d1deb38b6 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -75,6 +75,15 @@ config PCI_MAP_SYSTEM_MEMORY
  This should only be required on MIPS where CFG_SYS_SDRAM_BASE is still
  being used as virtual address.
 
+config PCI_BRIDGE_MEM_ALIGNMENT
+   hex "Alignment boundary of PCI memory resource allocation"
+   default 0x1 if TARGET_BOSTON
+   default 0x10
+   help
+ Specify a boundary for alignment of PCI memory resource allocation,
+ this is normally 0x10 (1MB) but can be reduced to accommodate
+ hardware with tight bridge range if hardware allows.
+
 config PCI_SRIOV
bool "Enable Single Root I/O Virtualization support for PCI"
help
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 90f818864457..b2c76b25801a 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -372,8 +372,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, 
int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff);
 
if (pci_mem) {
-   /* Round memory allocator to 1MB boundary */
-   pciauto_region_align(pci_mem, 0x10);
+   /* Round memory allocator */
+   pciauto_region_align(pci_mem, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
 
/*
 * Set up memory and I/O filter limits, assume 32-bit
@@ -387,8 +387,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, 
int sub_bus)
}
 
if (pci_prefetch) {
-   /* Round memory allocator to 1MB boundary */
-   pciauto_region_align(pci_prefetch, 0x10);
+   /* Round memory allocator */
+   pciauto_region_align(pci_prefetch, 
CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
 
/*
 * Set up memory and I/O filter limits, assume 32-bit
@@ -465,8 +465,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, 
int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - dev_seq(ctlr));
 
if (pci_mem) {
-   /* Round memory allocator to 1MB boundary */
-   pciauto_region_align(pci_mem, 0x10);
+   /* Round memory allocator */
+   pciauto_region_align(pci_mem, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
 
dm_pci_write_config16(dev, PCI_MEMORY_LIMIT,
  ((pci_mem->bus_lower - 1) >> 16) &
@@ -480,8 +480,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, 
int sub_bus)
 _64);
prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
 
-   /* Round memory allocator to 1MB boundary */
-   pciauto_region_align(pci_prefetch, 0x10);
+   /* Round memory allocator */
+   pciauto_region_align(pci_prefetch, 
CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
 
dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT,
  (((pci_prefetch->bus_lower - 1) >> 16) &

-- 
2.34.1

[PATCH v3 01/12] pci: xilinx: Handle size of ecam region properly

2024-05-17 Thread Jiaxun Yang

Probe size of ecam from devicetree properly and cap accessible
bus number accorading to ecam region size to ensure we don't go
beyond hardware address space.

Also disable all interrupts to ensure errors are handled silently.

Signed-off-by: Jiaxun Yang 
---
 drivers/pci/pcie_xilinx.c | 53 +++
 1 file changed, 40 insertions(+), 13 deletions(-)

diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index a674ab04beee..63058e8e7c5d 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -18,14 +18,19 @@
  */
 struct xilinx_pcie {
void *cfg_base;
+   pci_size_t size;
+   int first_busno;
 };
 
 /* Register definitions */
-#define XILINX_PCIE_REG_PSCR   0x144
-#define XILINX_PCIE_REG_PSCR_LNKUP BIT(11)
-#define XILINX_PCIE_REG_RPSC   0x148
-#define XILINX_PCIE_REG_RPSC_BEN   BIT(0)
-
+#define XILINX_PCIE_REG_BRIDGE_INFO0x130
+#define  XILINX_PCIE_REG_BRIDGE_INFO_ECAMSZ_SHIFT  16
+#define  XILINX_PCIE_REG_BRIDGE_INFO_ECAMSZ_MASK   (0x7 << 16)
+#define XILINX_PCIE_REG_INT_MASK   0x13c
+#define XILINX_PCIE_REG_PSCR   0x144
+#define  XILINX_PCIE_REG_PSCR_LNKUPBIT(11)
+#define XILINX_PCIE_REG_RPSC   0x148
+#define  XILINX_PCIE_REG_RPSC_BEN  BIT(0)
 /**
  * pcie_xilinx_link_up() - Check whether the PCIe link is up
  * @pcie: Pointer to the PCI controller state
@@ -61,14 +66,18 @@ static int pcie_xilinx_config_address(const struct udevice 
*udev, pci_dev_t bdf,
  uint offset, void **paddress)
 {
struct xilinx_pcie *pcie = dev_get_priv(udev);
-   unsigned int bus = PCI_BUS(bdf);
+   unsigned int bus = PCI_BUS(bdf) - pcie->first_busno;
unsigned int dev = PCI_DEV(bdf);
unsigned int func = PCI_FUNC(bdf);
+   int num_buses = DIV_ROUND_UP(pcie->size, 1 << 16);
void *addr;
 
if ((bus > 0) && !pcie_xilinx_link_up(pcie))
return -ENODEV;
 
+   if (bus > num_buses)
+   return -ENODEV;
+
/*
 * Busses 0 (host-PCIe bridge) & 1 (its immediate child) are
 * limited to a single device each.
@@ -142,20 +151,37 @@ static int pcie_xilinx_of_to_plat(struct udevice *dev)
struct xilinx_pcie *pcie = dev_get_priv(dev);
fdt_addr_t addr;
fdt_size_t size;
-   u32 rpsc;
 
addr = dev_read_addr_size(dev, );
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
 
-   pcie->cfg_base = devm_ioremap(dev, addr, size);
-   if (IS_ERR(pcie->cfg_base))
-   return PTR_ERR(pcie->cfg_base);
+   pcie->cfg_base = map_physmem(addr, size, MAP_NOCACHE);
+   if (!pcie->cfg_base)
+   return -ENOMEM;
+   pcie->size = size;
+   return 0;
+}
 
-   /* Enable the Bridge enable bit */
-   rpsc = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_RPSC);
+static int pci_xilinx_probe(struct udevice *dev)
+{
+   struct xilinx_pcie *pcie = dev_get_priv(dev);
+   u32 rpsc;
+   int num_buses = DIV_ROUND_UP(pcie->size, 1 << 16);
+
+   pcie->first_busno = dev_seq(dev);
+
+   /* Disable all interrupts */
+   writel(0, pcie->cfg_base + XILINX_PCIE_REG_INT_MASK);
+
+   /* Enable the bridge */
+   rpsc = readl(pcie->cfg_base + XILINX_PCIE_REG_RPSC);
rpsc |= XILINX_PCIE_REG_RPSC_BEN;
-   __raw_writel(rpsc, pcie->cfg_base + XILINX_PCIE_REG_RPSC);
+   writel(rpsc, pcie->cfg_base + XILINX_PCIE_REG_RPSC);
+
+   /* Enable access to all possible subordinate buses */
+   writel((0 << 0) | (1 << 8) | (num_buses << 16),
+  pcie->cfg_base + PCI_PRIMARY_BUS);
 
return 0;
 }
@@ -176,5 +202,6 @@ U_BOOT_DRIVER(pcie_xilinx) = {
.of_match   = pcie_xilinx_ids,
.ops= _xilinx_ops,
.of_to_plat = pcie_xilinx_of_to_plat,
+   .probe  = pci_xilinx_probe,
.priv_auto  = sizeof(struct xilinx_pcie),
 };

-- 
2.34.1

[PATCH v3 00/12] MIPS: Boston: Various enhancements

2024-05-17 Thread Jiaxun Yang

Hi all,

This is a huge series which promoted MIPS/Boston target into a
usable state, with fixes to drivers and general framework issues
I found in this process.

I also converted the target to OF_UPSTREAM.

This target is covered by QEMU, to test on QEMU:
```
make boston64r6el_defconfig
make
qemu-system-mips64el -M boston -cpu I6500 -bios ./u-boot.bin -nographic
```

This is my first u-boot contribution, please kindly advise if you
have any comments.

Thanks

Signed-off-by: Jiaxun Yang 
---
Changes in v3:
- Slight change in clk_boston probe order (Jonas)
- Link to v2: 
https://lore.kernel.org/r/20240516-boston-v2-0-77938800d...@flygoat.com

Changes in v2:
- Drop "[PATCH 09/13] syscon: Probe device first in syscon_get_regmap"
  in flavour of fixing the driver device life cycle (Jonas)
- Link to v1: 
https://lore.kernel.org/r/20240513-boston-v1-0-fac969384...@flygoat.com

---
Jiaxun Yang (12):
  pci: xilinx: Handle size of ecam region properly
  pci: auto: Reduce bridge mem alignment boundary for boston
  pci: Enable PCI_MAP_SYSTEM_MEMORY when ARCH_MAP_SYSMEM is not set
  ahci: DMA addressing fixes
  ahci: dwc_ahsata: Generalize the driver
  MIPS: Provide dummy acpi_table.h
  MIPS: boston: Imply various options
  MIPS: boston: Provide default env vars
  clk: boston: Allow to get regmap from parent device
  dts/upstream: Add Makefile for MIPS
  MIPS: boston: Migrate to OF_UPSTREAM
  mailmap: Update email for Paul Burton

 .mailmap   |   3 +-
 arch/mips/Kconfig  |  28 +
 arch/mips/dts/Makefile |   1 -
 arch/mips/dts/boston-u-boot.dtsi   |  10 ++
 arch/mips/dts/img,boston.dts   | 222 -
 arch/mips/include/asm/acpi_table.h |  10 ++
 board/imgtec/boston/Kconfig|   4 +
 board/imgtec/boston/MAINTAINERS|   3 +-
 board/imgtec/boston/boston.env |   9 ++
 board/imgtec/malta/MAINTAINERS |   2 +-
 configs/boston32r2_defconfig   |   2 +-
 configs/boston32r2el_defconfig |   2 +-
 configs/boston32r6_defconfig   |   2 +-
 configs/boston32r6el_defconfig |   2 +-
 configs/boston64r2_defconfig   |   2 +-
 configs/boston64r2el_defconfig |   2 +-
 configs/boston64r6_defconfig   |   2 +-
 configs/boston64r6el_defconfig |   2 +-
 drivers/ata/ahci.c |  34 +++---
 drivers/ata/dwc_ahsata.c   |  82 +-
 drivers/ata/dwc_ahsata_priv.h  |   2 -
 drivers/clk/clk_boston.c   |  19 ++--
 drivers/pci/Kconfig|  10 ++
 drivers/pci/pci_auto.c |  16 +--
 drivers/pci/pcie_xilinx.c  |  53 ++---
 dts/upstream/src/mips/Makefile |  14 +++
 include/ahci.h |   4 +-
 27 files changed, 232 insertions(+), 310 deletions(-)
---
base-commit: c8ffd1356d42223cbb8c86280a083cc3c93e6426
change-id: 20240513-boston-45ef6edc219f

Best regards,
-- 
Jiaxun Yang

[v3 2/2] doc: process.rst: Document device tree resync rules

2024-05-17 Thread Tom Rini

Document the logic of when we do a full resync of the device trees used
by OF_UPSTREAM as well as that cherry-picking is allowed as needed.

Signed-off-by: Tom Rini 
---
Changes in v3:
- Actually commit the changes I intended for v2

Changes in v2:
- Address Quentin's feedback

Cc: Heinrich Schuchardt 
Cc: Quentin Schulz 
---
 doc/develop/devicetree/control.rst |  9 ++---
 doc/develop/process.rst| 13 +
 2 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/doc/develop/devicetree/control.rst 
b/doc/develop/devicetree/control.rst
index 4cc1457d4ea8..ca4fb0b5b10f 100644
--- a/doc/develop/devicetree/control.rst
+++ b/doc/develop/devicetree/control.rst
@@ -113,9 +113,12 @@ SoC being used via Kconfig and set 
`DEFAULT_DEVICE_TREE=/` when
 prompted by Kconfig.
 
 However, if `dts/upstream/` hasn't yet received devicetree source file for your
-newly added board support then you can add corresponding devicetree source file
-as `arch//dts/.dts`. To select that add `# CONFIG_OF_UPSTREAM is 
not
-set` and set `DEFAULT_DEVICE_TREE=` when prompted by Kconfig.
+newly added board support then one option is that you can add the corresponding
+devicetree source file as `arch//dts/.dts`. To select that add `#
+CONFIG_OF_UPSTREAM is not set` and set `DEFAULT_DEVICE_TREE=` when
+prompted by Kconfig. Another option is that you can use use the "pick" option 
of
+`dts/update-dts-subtree.sh` mentioned above to bring in the commits that you
+need.
 
 This should include your CPU or SoC's devicetree file. On top of that any 
U-Boot
 specific tweaks (see: :ref:`dttweaks`) can be made for your board.
diff --git a/doc/develop/process.rst b/doc/develop/process.rst
index a66540a698c1..0542b3fc1245 100644
--- a/doc/develop/process.rst
+++ b/doc/develop/process.rst
@@ -108,6 +108,19 @@ Differences to the Linux Development Process
   In U-Boot, ``"-rc1"`` will only be released after all (or at least most of
   the) patches that were submitted during the merge window have been applied.
 
+Resyncing of the device tree subtree
+
+
+As explained in :doc:`devicetree/control` some platforms make use of device 
tree
+files which come from a git subtree that mirrors the Linux Kernel sources
+itself. For our purposes, we only track releases and not release candidates for
+merging in our tree. These merges follow the normal merge window rules.
+
+In the case of specific changes, such as bug fixes or new platform support,
+these can be "cherry-picked" and are subject to the normal merge rules. For
+example, a bug fix can come in later in the window but a full re-sync only
+happens within the merge window itself.
+
 .. _custodians:
 
 Custodians
-- 
2.34.1

[v3 1/2] doc: process.rst: Use subsubheading for "Phases of the Development Process"

2024-05-17 Thread Tom Rini

These sections which talk about the different phases of the development
process should be using the subsubheading identifier.

Signed-off-by: Tom Rini 
---
Changes in v3:
None

Changes in v2:
None

Cc: Heinrich Schuchardt 
---
 doc/develop/process.rst | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/doc/develop/process.rst b/doc/develop/process.rst
index 92477d05dd85..a66540a698c1 100644
--- a/doc/develop/process.rst
+++ b/doc/develop/process.rst
@@ -34,7 +34,7 @@ It is followed by a *Stabilization Period*.
 The end of a Release Cycle is marked by the release of a new U-Boot version.
 
 Merge Window
-
+
 
 The Merge Window is the period when new patches get submitted (and hopefully
 accepted) for inclusion into U-Boot mainline. This period lasts for 21 days (3
@@ -44,7 +44,7 @@ This is the only time when new code (like support for new 
processors or new
 boards, or other new features or reorganization of code) is accepted.
 
 Twilight Time
--
+^
 
 Usually patches do not get accepted as they are - the peer review that takes
 place will usually require changes and resubmissions of the patches before they
@@ -65,13 +65,13 @@ the Merge Window does not preclude patches that were 
already posted from being
 merged for the upcoming release.
 
 Stabilization Period
-
+
 
 During the Stabilization Period only patches containing bug fixes get
 applied.
 
 Corner Cases
-
+
 
 Sometimes it is not clear if a patch contains a bug fix or not.
 For example, changes that remove dead code, unused macros etc. or
-- 
2.34.1

Re: [PATCH 0/7] MIPS: Enable EFI support

2024-05-17 Thread Jiaxun Yang




在2024年5月17日五月 下午6:12，Heinrich Schuchardt写道：
[...]
>>as well.
>>
>>Please review.
>>Thanks
>
> Implementing the Loongarch architecture defined in 
> <https://uefi.org/specs/UEFI/2.10/02_Overview.html#loongarch-platforms> 
> would make sense to me.
>
> Supporting an architecture that does not have published UEFI standards 
> is less convincing. 
>
> Is any of the mentioned boards being produced anymore?

Hi Heinrich,

Yes, MIPS/Loongson boards are still producing for many existing applications.
There will be some future MIPS product from CIP United [1], and I think get
EBBR like booting stuff implemented can save a lot of hassle.

I also intended to use UEFI as loongson3-virt firmware, supporting actual
Loongson hardware is out of my scope.

I'm a hobbyist (and contractor) on MIPS stuff, so I don't really know details
on LoongArch UEFI.

Thanks

[1]: http://www.cipunited.com/

>
> Best regards
>
> Heinrich
>
>>
>>[1]: https://github.com/kontais/EFI-MIPS
>>[2]: https://github.com/loongson-community/firmware-nonfree
>>[3]: http://www.kunluntech.com.cn/klbiosxl
>>[4]: https://sourceforge.net/projects/efify/
>>[5]: https://github.com/loongson-community/grub
>>[6]: https://www.ventoy.net/en/index.html
>>
>>Signed-off-by: Jiaxun Yang 
>>---
>>Jiaxun Yang (7):
>>  MIPS: Implement setjmp
>>  efi: Allow runtime relocate to be disabled
>>  Makefile.lib: Preserve .rodata section for EFI file
>>  Makefile.lib: Enforce EFI CFLAGS/AFLAGS
>>  MIPS: Add smbios_start to arch_global_data
>>  MIPS: Define MIPS EFI related bits everywhere
>>  MIPS: Implement EFI supporting stuff
>>
>> Makefile  |   3 +
>> arch/mips/config.mk   |   9 +
>> arch/mips/include/asm/global_data.h   |   3 +
>> arch/mips/include/asm/setjmp.h|  36 
>> arch/mips/lib/Makefile|  15 ++
>> arch/mips/lib/crt0_mips_efi.S | 239 
>> ++
>> arch/mips/lib/elf_mips_efi.lds| 113 ++
>> arch/mips/lib/reloc_mips_efi.c|  99 +
>> arch/mips/lib/setjmp32.S  |  51 +
>> arch/mips/lib/setjmp64.S  |  56 +
>> include/asm-generic/pe.h  |   5 +
>> include/config_distro_bootcmd.h   |   6 +
>> include/efi_default_filename.h|   8 +
>> include/efi_loader.h  |  26 ++-
>> include/elf.h |   8 +
>> lib/efi_loader/Kconfig|  12 +-
>> lib/efi_loader/efi_image_loader.c |  18 ++
>> lib/efi_loader/efi_memory.c   |  14 +-
>> lib/efi_loader/efi_runtime.c  |  11 +-
>> lib/efi_loader/efi_var_mem.c  |   6 +-
>> lib/efi_selftest/Makefile |   2 +-
>> lib/efi_selftest/efi_selftest_miniapp_exception.c |   2 +
>> scripts/Makefile.lib  |  10 +-
>> 23 files changed, 734 insertions(+), 18 deletions(-)
>>---
>>base-commit: ad7dce5abd49ef3b5c93da5303e15449c8c162b4
>>change-id: 20240517-mips-efi-c9a1ad819c2d
>>
>>Best regards,

-- 
- Jiaxun

Re: [PATCH v3 4/4] imx: hab: Use nxp_imx8mcst etype for i.MX8M flash.bin signing

2024-05-17 Thread Tim Harvey

On Thu, May 16, 2024 at 6:31 PM Marek Vasut  wrote:
>
> On 5/16/24 11:40 PM, Tim Harvey wrote:
>
> [...]
>
> >> -The entire script is available in doc/imx/habv4/csf_examples/mx8m/csf.sh
> >> -and can be used as follows to modify flash.bin to be signed
> >> -(adjust paths as needed):
> >> -```
> >> -export CST_DIR=/usr/src/cst-3.3.1/
> >> -export CSF_KEY=$CST_DIR/crts/CSF1_1_sha256_4096_65537_v3_usr_crt.pem
> >> -export IMG_KEY=$CST_DIR/crts/IMG1_1_sha256_4096_65537_v3_usr_crt.pem
> >> -export SRK_TABLE=$CST_DIR/crts/SRK_1_2_3_4_table.bin
> >> -export PATH=$CST_DIR/linux64/bin:$PATH
> >
> > Hi Marek,
> >
> > I thought you were going to leave the above env setting examples in
> > the documentation.
> >
> > I suggest showing how to specify using env (by just leaving the above
> > in) as well as by copying them directly to the build directory if
> > wanted.. otherwise the documentation is lacking.
>
> If the tool can do env vars now, I would like to avoid copying key
> material around. So what about this:
>
> diff --git a/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
> b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
> index 1eb1fb0aa61..257ffb45656 100644
> --- a/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
> +++ b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
> @@ -144,6 +144,8 @@ The signing is activated by wrapping SPL and
> fitImage sections into nxp-imx8mcst
>   etype, which is done automatically in
> arch/arm/dts/imx8m{m,n,p,q}-u-boot.dtsi
>   in case CONFIG_IMX_HAB Kconfig symbol is enabled.
>
> +Build of flash.bin target then produces a signed flash.bin automatically.
> +
>   The nxp-imx8mcst etype is configurable using either DT properties or
> environment
>   variables. The following DT properties and environment variables are
> supported.
>   Note that environment variables override DT properties.
> @@ -160,7 +162,15 @@ Note that environment variables override DT properties.
>   | nxp,img-crt| IMG_KEY   | full path to the IMG Key
> IMG1_1_sha256_4096_65537_v3_usr_crt.pem |
>
> ++---+--+
>
> -Build of flash.bin target then produces a signed flash.bin automatically.
> +Environment variables can be set as follows to point the build process
> +to external key material:
> +```
> +export CST_DIR=/usr/src/cst-3.3.1/
> +export CSF_KEY=$CST_DIR/crts/CSF1_1_sha256_4096_65537_v3_usr_crt.pem
> +export IMG_KEY=$CST_DIR/crts/IMG1_1_sha256_4096_65537_v3_usr_crt.pem
> +export SRK_TABLE=$CST_DIR/crts/SRK_1_2_3_4_table.bin
> +make flash.bin
> +```
>
>   1.4 Closing the device
>   ---
>

Hi Marek,

Yes, with that change you can add for the series:
Reviewed-by: Tim Harvey 

Best Regards,

Tim

Re: [PATCH 0/7] MIPS: Enable EFI support

2024-05-17 Thread Heinrich Schuchardt




Am 17. Mai 2024 18:32:51 MESZ schrieb Jiaxun Yang :
>Hi all,
>
>This series enabled EFI support to MIPS platform.
>
>Although MIPS is not defined by UEFI specification, there are
>quite a few firmware implementations available, including
>MIPS-EFI[1] for Loongson-2F, Lemote's proprietary EDK2 implementation
>on Loongson-3[2], Kunlun firmware for Loongson-3[3], efiffy[4]
>for MIPS Creator CI20 and another mystery EDK implementation shipped
>with some Creator CI20 board.  
>
>Available applications including gnu-efi, Loongson's GRUB fork[5],
>Ventoy[6].
>
>My implementation in U-Boot is aiming to follow conventions made
>by other implementations for architecture stuff and remain
>compliance with spec for general aspects.
>
>bootefi hello and selftest passed on both 32 and 64 bit system,
>gnu-efi, grub and ventoy are tested on mips64el with my pending
>platform works. mips32el efi executable from efiffy is tested
>as well.
>
>Please review.
>Thanks

Implementing the Loongarch architecture defined in 
<https://uefi.org/specs/UEFI/2.10/02_Overview.html#loongarch-platforms> would 
make sense to me.

Supporting an architecture that does not have published UEFI standards is less 
convincing. 

Is any of the mentioned boards being produced anymore?

Best regards

Heinrich

>
>[1]: https://github.com/kontais/EFI-MIPS
>[2]: https://github.com/loongson-community/firmware-nonfree
>[3]: http://www.kunluntech.com.cn/klbiosxl
>[4]: https://sourceforge.net/projects/efify/
>[5]: https://github.com/loongson-community/grub
>[6]: https://www.ventoy.net/en/index.html
>
>Signed-off-by: Jiaxun Yang 
>---
>Jiaxun Yang (7):
>  MIPS: Implement setjmp
>  efi: Allow runtime relocate to be disabled
>  Makefile.lib: Preserve .rodata section for EFI file
>  Makefile.lib: Enforce EFI CFLAGS/AFLAGS
>  MIPS: Add smbios_start to arch_global_data
>  MIPS: Define MIPS EFI related bits everywhere
>  MIPS: Implement EFI supporting stuff
>
> Makefile  |   3 +
> arch/mips/config.mk   |   9 +
> arch/mips/include/asm/global_data.h   |   3 +
> arch/mips/include/asm/setjmp.h|  36 
> arch/mips/lib/Makefile|  15 ++
> arch/mips/lib/crt0_mips_efi.S | 239 ++
> arch/mips/lib/elf_mips_efi.lds| 113 ++
> arch/mips/lib/reloc_mips_efi.c|  99 +
> arch/mips/lib/setjmp32.S  |  51 +
> arch/mips/lib/setjmp64.S  |  56 +
> include/asm-generic/pe.h  |   5 +
> include/config_distro_bootcmd.h   |   6 +
> include/efi_default_filename.h|   8 +
> include/efi_loader.h  |  26 ++-
> include/elf.h |   8 +
> lib/efi_loader/Kconfig|  12 +-
> lib/efi_loader/efi_image_loader.c |  18 ++
> lib/efi_loader/efi_memory.c   |  14 +-
> lib/efi_loader/efi_runtime.c  |  11 +-
> lib/efi_loader/efi_var_mem.c  |   6 +-
> lib/efi_selftest/Makefile |   2 +-
> lib/efi_selftest/efi_selftest_miniapp_exception.c |   2 +
> scripts/Makefile.lib  |  10 +-
> 23 files changed, 734 insertions(+), 18 deletions(-)
>---
>base-commit: ad7dce5abd49ef3b5c93da5303e15449c8c162b4
>change-id: 20240517-mips-efi-c9a1ad819c2d
>
>Best regards,

Re: [PATCH 1/1] defconfig: disable VIDEO_COPY on the sandbox

2024-05-17 Thread Jiaxun Yang




在2024年5月17日五月 下午5:06，Heinrich Schuchardt写道：
> Since commit a75cf70d23ac ("efi: Correct handling of frame buffer") the EFI
> block image transfer is broken on the sandbox.
>
> To test build sandbox_defconfig with CONFIG_EFI_SELFTEST=y and execute
>
> setenv efi_selftest block image transfer
> bootefi selftest
>
> Fixes: a75cf70d23ac ("efi: Correct handling of frame buffer")
> Signed-off-by: Heinrich Schuchardt 

Reviewed-by: Jiaxun Yang 

It turns out that texture copy is only required for 8bpc display, which
we don't care much anyway.

Thanks
- Jiaxun

> ---
>  configs/sandbox_defconfig | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
> index 93b52f2de5c..80c310b8e82 100644
> --- a/configs/sandbox_defconfig
> +++ b/configs/sandbox_defconfig
> @@ -318,7 +318,6 @@ CONFIG_USB_ETHER=y
>  CONFIG_USB_ETH_CDC=y
>  CONFIG_VIDEO=y
>  CONFIG_VIDEO_FONT_SUN12X22=y
> -CONFIG_VIDEO_COPY=y
>  CONFIG_CONSOLE_ROTATION=y
>  CONFIG_CONSOLE_TRUETYPE=y
>  CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
> -- 
> 2.43.0

-- 
- Jiaxun

[PATCH 7/7] MIPS: Implement EFI supporting stuff

2024-05-17 Thread Jiaxun Yang

Implemented crt, ELF and EFI linking, ELF relocation handling
and other necessary bits for MIPS EFI.

Signed-off-by: Jiaxun Yang 
---
 arch/mips/config.mk|   9 ++
 arch/mips/lib/Makefile |  13 +++
 arch/mips/lib/crt0_mips_efi.S  | 239 +
 arch/mips/lib/elf_mips_efi.lds | 113 +++
 arch/mips/lib/reloc_mips_efi.c |  99 +
 lib/efi_loader/Kconfig |   2 +-
 6 files changed, 474 insertions(+), 1 deletion(-)

diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index 745f03190e98..e970858c1e59 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -36,6 +36,10 @@ endif
 PLATFORM_CPPFLAGS += -D__MIPS__
 PLATFORM_ELFFLAGS += -B mips $(OBJCOPYFLAGS)
 
+EFI_LDS:= elf_mips_efi.lds
+EFI_CRT0   := crt0_mips_efi.o
+EFI_RELOC  := reloc_mips_efi.o
+
 #
 # From Linux arch/mips/Makefile
 #
@@ -66,3 +70,8 @@ LDFLAGS_FINAL += --gc-sections
 OBJCOPYFLAGS   += -j .text -j .rodata -j .data -j __u_boot_list
 
 LDFLAGS_STANDALONE += --gc-sections
+
+CFLAGS_EFI := -fPIE -mabicalls
+AFLAGS_EFI := -fPIE -mabicalls
+CFLAGS_NON_EFI := -mno-abicalls -fno-pic -fno-PIE
+AFLAGS_NON_EFI := -mno-abicalls -fno-pic -fno-PIE
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index e36dfd0547b5..eef663febe47 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -17,3 +17,16 @@ obj-$(CONFIG_CMD_GO) += boot.o
 obj-$(CONFIG_SPL_BUILD) += spl.o
 
 lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o udivdi3.o
+
+# For building EFI apps
+CFLAGS_$(EFI_CRT0) := $(CFLAGS_EFI)
+CFLAGS_REMOVE_$(EFI_CRT0) := $(CFLAGS_NON_EFI)
+AFLAGS_$(EFI_CRT0) := $(CFLAGS_EFI)
+AFLAGS_REMOVE_$(EFI_CRT0) := $(CFLAGS_NON_EFI)
+
+CFLAGS_$(EFI_RELOC) := $(CFLAGS_EFI)
+CFLAGS_REMOVE_$(EFI_RELOC) := $(CFLAGS_NON_EFI)
+
+extra-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += $(EFI_CRT0) $(EFI_RELOC)
+extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC)
+extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC)
diff --git a/arch/mips/lib/crt0_mips_efi.S b/arch/mips/lib/crt0_mips_efi.S
new file mode 100644
index ..84acee620d14
--- /dev/null
+++ b/arch/mips/lib/crt0_mips_efi.S
@@ -0,0 +1,239 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * crt0-efi-mips64el.S - PE/COFF header for MIPS64 EFI applications
+ *
+ * Copright (C) 2014 Linaro Ltd. 
+ * Copright (C) 2017 Heiher 
+ * Copright (C) 2024 Jiaxun Yang 
+ */
+
+#include 
+#include 
+
+#if __mips == 64
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define PE_MACHINE IMAGE_FILE_MACHINE_R4000
+#else
+#define PE_MACHINE IMAGE_FILE_MACHINE_R4000_BE
+#endif
+#define PE_MAGICIMAGE_NT_OPTIONAL_HDR64_MAGIC
+#define IMG_CHARACTERISTICS \
+   (IMAGE_FILE_EXECUTABLE_IMAGE | \
+IMAGE_FILE_LINE_NUMS_STRIPPED | \
+IMAGE_FILE_LOCAL_SYMS_STRIPPED | \
+IMAGE_FILE_LARGE_ADDRESS_AWARE | \
+IMAGE_FILE_DEBUG_STRIPPED)
+#else
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define PE_MACHINE IMAGE_FILE_MACHINE_R3000
+#else
+#define PE_MACHINE IMAGE_FILE_MACHINE_R3000_BE
+#endif
+#define PE_MAGICIMAGE_NT_OPTIONAL_HDR32_MAGIC
+#define IMG_CHARACTERISTICS \
+   (IMAGE_FILE_EXECUTABLE_IMAGE | \
+IMAGE_FILE_LINE_NUMS_STRIPPED | \
+IMAGE_FILE_LOCAL_SYMS_STRIPPED | \
+IMAGE_FILE_DEBUG_STRIPPED)
+#endif
+
+
+   .section.text.head
+
+   /*
+* Magic "MZ" signature for PE/COFF
+*/
+   .globl  ImageBase
+ImageBase:
+   .2byte  IMAGE_DOS_SIGNATURE /* 'MZ' */
+   .skip   58  /* 'MZ' + pad + offset == 64 */
+   .4byte  pe_header - ImageBase   /* Offset to the PE header */
+pe_header:
+   .4byte  IMAGE_NT_SIGNATURE  /* 'PE' */
+coff_header:
+   .2byte  PE_MACHINE  /* Machine Magic */
+   .2byte  3   /* nr_sections */
+   .4byte  0   /* TimeDateStamp */
+   .4byte  0   /* PointerToSymbolTable */
+   .4byte  0   /* NumberOfSymbols */
+   .2byte  section_table - optional_header /* SizeOfOptionalHeader */
+   .2byte  IMG_CHARACTERISTICS /* Characteristics */
+
+optional_header:
+   .2byte  PE_MAGIC/* PE32(+) format */
+   .byte   0x02/* MajorLinkerVersion */
+   .byte   0x14/* MinorLinkerVersion */
+   .4byte  _edata - _start /* SizeOfCode */
+   .4byte  0   /* SizeOfInitializedData */
+   .4byte  0   /* SizeOfUninitializedData */
+   .4byte  _start - ImageBase  /* AddressOfEntryPoint */
+   .4byte  _start - ImageBase  /* BaseOfCode */
+#if __mips != 64
+

[PATCH 6/7] MIPS: Define MIPS EFI related bits everywhere

2024-05-17 Thread Jiaxun Yang

Various file names, instruction defines, magic numbers
related to MIPS's EFI implementation.

PE magic numbers are from winnt.h, DHCP numbers are
from IANA page, boot file names are from other
implementations.

Signed-off-by: Jiaxun Yang 
---
 include/asm-generic/pe.h  |  5 +
 include/config_distro_bootcmd.h   |  6 ++
 include/efi_default_filename.h|  8 
 include/elf.h |  8 
 lib/efi_loader/efi_image_loader.c | 17 +
 lib/efi_selftest/efi_selftest_miniapp_exception.c |  2 ++
 6 files changed, 46 insertions(+)

diff --git a/include/asm-generic/pe.h b/include/asm-generic/pe.h
index cd5b6ad62bf0..42c4cbedbc95 100644
--- a/include/asm-generic/pe.h
+++ b/include/asm-generic/pe.h
@@ -31,6 +31,11 @@
 
 /* Machine types */
 #define IMAGE_FILE_MACHINE_I3860x014c
+#define IMAGE_FILE_MACHINE_R3000_BE0x0160
+#define IMAGE_FILE_MACHINE_R3000   0x0162
+#define IMAGE_FILE_MACHINE_R4000_BE0x0164
+#define IMAGE_FILE_MACHINE_R4000   0x0166
+#define IMAGE_FILE_MACHINE_R1  0x0168
 #define IMAGE_FILE_MACHINE_ARM 0x01c0
 #define IMAGE_FILE_MACHINE_THUMB   0x01c2
 #define IMAGE_FILE_MACHINE_ARMNT   0x01c4
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 2a136b96a6d9..9e03d10acec5 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -366,6 +366,12 @@
 #elif defined(CONFIG_ARCH_RV64I) || ((defined(__riscv) && __riscv_xlen == 64))
 #define BOOTENV_EFI_PXE_ARCH "0x1b"
 #define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00027:UNDI:003000"
+#elif defined(CONFIG_CPU_MIPS32) || ((defined(__mips) && __mips == 32))
+#define BOOTENV_EFI_PXE_ARCH "0x21"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00033:UNDI:003000"
+#elif defined(CONFIG_CPU_MIPS64) || ((defined(__mips) && __mips == 64))
+#define BOOTENV_EFI_PXE_ARCH "0x22"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00034:UNDI:003000"
 #elif defined(CONFIG_SANDBOX)
 # error "sandbox EFI support is only supported on ARM and x86"
 #else
diff --git a/include/efi_default_filename.h b/include/efi_default_filename.h
index 77932984b557..eb94a54514bc 100644
--- a/include/efi_default_filename.h
+++ b/include/efi_default_filename.h
@@ -47,6 +47,14 @@
 #define BOOTEFI_NAME "BOOTRISCV32.EFI"
 #elif defined(CONFIG_ARCH_RV64I)
 #define BOOTEFI_NAME "BOOTRISCV64.EFI"
+#elif defined(CONFIG_CPU_MIPS32) && defined(CONFIG_SYS_BIG_ENDIAN)
+#define BOOTEFI_NAME "BOOTMIPS.EFI"
+#elif defined(CONFIG_CPU_MIPS32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
+#define BOOTEFI_NAME "BOOTMIPSEL.EFI"
+#elif defined(CONFIG_CPU_MIPS64) && defined(CONFIG_SYS_BIG_ENDIAN)
+#define BOOTEFI_NAME "BOOTMIPS64.EFI"
+#elif defined(CONFIG_CPU_MIPS64) && defined(CONFIG_SYS_LITTLE_ENDIAN)
+#define BOOTEFI_NAME "BOOTMIPS64EL.EFI"
 #else
 #error Unsupported UEFI architecture
 #endif
diff --git a/include/elf.h b/include/elf.h
index a4ba74d8abeb..95de6ffbce31 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -545,6 +545,9 @@ typedef struct {
 #define DT_LOPROC  0x7000  /* reserved range for processor */
 #define DT_HIPROC  0x7fff  /* specific dynamic array tags */
 
+/* MIPS */
+#define DT_MIPS_LOCAL_GOTNO0x700a  /* Number of local got entries 
*/
+
 /* Dynamic Tag Flags - d_un.d_val */
 #define DF_ORIGIN  0x01/* Object may use DF_ORIGIN */
 #define DF_SYMBOLIC0x02/* Symbol resolutions starts here */
@@ -699,6 +702,11 @@ unsigned long elf_hash(const unsigned char *name);
 #define R_RISCV_64 2
 #define R_RISCV_RELATIVE   3
 
+/* MIPS Relocations */
+#define R_MIPS_NONE0
+#define R_MIPS_REL32   3
+#define R_MIPS_64  18
+
 #ifndef __ASSEMBLY__
 int valid_elf_image(unsigned long addr);
 unsigned long load_elf64_image_phdr(unsigned long addr);
diff --git a/lib/efi_loader/efi_image_loader.c 
b/lib/efi_loader/efi_image_loader.c
index cedc4d822fe7..8df469851851 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -51,6 +51,23 @@ static int machines[] = {
IMAGE_FILE_MACHINE_RISCV64,
 #endif
 
+#if defined(__mips__) && (__mips == 32) && defined(__BIG_ENDIAN)
+   IMAGE_FILE_MACHINE_R3000_BE,
+#endif
+
+#if defined(__mips__) && (__mips == 32) && defined(__LITTLE_ENDIAN)
+   IMAGE_FILE_MACHINE_R3000,
+#endif
+
+#if defined(__mips__) && (__mips == 64) && defined(__BIG_ENDIAN)
+   IMAGE_FILE_MACHINE_R4000_BE,
+#endif
+
+#if defined(__mips__) && (__mips == 64) && defined(__LITTLE_ENDIAN)
+   IMAGE_FILE_MACHINE_R4000,
+   IMAGE_FILE_MACHINE_R1,
+#endif
+
0 };
 
 /**
diff --git a/lib/efi_selftest/efi_selftest_miniapp_exception.c 
b/lib/efi_selftest/efi_selftest_miniapp_exception.c
index f668cdac4ab2..f3b4ee926f8f 100644
---

[PATCH 5/7] MIPS: Add smbios_start to arch_global_data

2024-05-17 Thread Jiaxun Yang

This is necessary for SMBIOS to build on MIPS.

Signed-off-by: Jiaxun Yang 
---
 arch/mips/include/asm/global_data.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/include/asm/global_data.h 
b/arch/mips/include/asm/global_data.h
index 147a95ecea8b..740bbcdb84e9 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -40,6 +40,9 @@ struct arch_global_data {
 #ifdef CONFIG_ARCH_OCTEON
struct octeon_eeprom_mac_addr mac_desc;
 #endif
+#ifdef CONFIG_SMBIOS
+   ulong smbios_start; /* Start address of SMBIOS table */
+#endif
 };
 
 #include 

-- 
2.34.1

[PATCH 4/7] Makefile.lib: Enforce EFI CFLAGS/AFLAGS

2024-05-17 Thread Jiaxun Yang

EFI AFLAGS/CFLAGS should be enforced for those runtime
supporting files as well, otherwise EFI applications
will fail to compile on MIPS.

Signed-off-by: Jiaxun Yang 
---
 Makefile | 3 +++
 scripts/Makefile.lib | 8 ++--
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 44deb339af19..6c9098f5823f 100644
--- a/Makefile
+++ b/Makefile
@@ -652,6 +652,8 @@ export EFI_CRT0 # Filename of EFI CRT0 in 
arch/$(ARCH)/lib
 export EFI_RELOC   # Filename of EFU relocation code in arch/$(ARCH)/lib
 export CFLAGS_EFI  # Compiler flags to add when building EFI app
 export CFLAGS_NON_EFI  # Compiler flags to remove when building EFI app
+export AFLAGS_EFI  # Assembler flags to add when building EFI app
+export AFLAGS_NON_EFI  # Assembler flags to remove when building EFI app
 export EFI_TARGET  # binutils target if EFI is natively supported
 
 export LTO_ENABLE
@@ -926,6 +928,7 @@ export PLATFORM_LIBGCC
 LDPPFLAGS += \
-include $(srctree)/include/u-boot/u-boot.lds.h \
-DCPUDIR=$(CPUDIR) \
+   -DARCHDIR=arch/$(ARCH) \
$(shell $(LD) --version | \
  sed -ne 's/GNU ld version 
\([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
 
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 52aed7a65d47..5aacab32cb38 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -495,8 +495,12 @@ $(obj)/%_efi.so: $(obj)/%.o $(obj)/efi_crt0.o 
$(obj)/efi_reloc.o $(obj)/efi_free
 
 targets += $(obj)/efi_crt0.o $(obj)/efi_reloc.o $(obj)/efi_freestanding.o
 
-CFLAGS_REMOVE_efi_reloc.o := $(LTO_CFLAGS)
-CFLAGS_REMOVE_efi_freestanding.o := $(LTO_CFLAGS)
+AFLAGS_efi_crt0.o := $(AFLAGS_EFI)
+CFLAGS_efi_reloc.o := $(CFLAGS_EFI)
+CFLAGS_efi_freestanding.o := $(CFLAGS_EFI)
+AFLAGS_REMOVE_efi_crt0.o := $(AFLAGS_NON_EFI)
+CFLAGS_REMOVE_efi_reloc.o := $(CFLAGS_NON_EFI) $(LTO_CFLAGS)
+CFLAGS_REMOVE_efi_freestanding.o := $(CFLAGS_NON_EFI) $(LTO_CFLAGS)
 
 # ACPI
 # ---

-- 
2.34.1

[PATCH 3/7] Makefile.lib: Preserve .rodata section for EFI file

2024-05-17 Thread Jiaxun Yang

This is required in performing objcopy to MIPS EFI files.

Signed-off-by: Jiaxun Yang 
---
 scripts/Makefile.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 62f87517c09c..52aed7a65d47 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -469,7 +469,7 @@ $(obj)/%_efi.S: $(obj)/%.efi
 
 quiet_cmd_efi_objcopy = OBJCOPY $@
 cmd_efi_objcopy = $(OBJCOPY) -j .header -j .text -j .sdata -j .data -j \
-   .dynamic -j .dynsym  -j .rel* -j .rela* -j .reloc \
+   .dynamic -j .dynsym  -j .rel* -j .rela* -j .reloc -j .rodata \
$(if $(EFI_TARGET),$(EFI_TARGET),-O binary) $^ $@
 
 $(obj)/%.efi: $(obj)/%_efi.so

-- 
2.34.1

[PATCH 2/7] efi: Allow runtime relocate to be disabled

2024-05-17 Thread Jiaxun Yang

Allow runtime relocate to be disabled because on MIPS we
never do that. It's guaranteed that OS won't call
set_virtual_address_map and convert_pointer as well.

On MIPS KSEG0 is always mapped to memory and there is no
way to disable it for kernel mode. Both EFI runtime and
kernel lays in this segment, so relocation is totally
unnecessary.

Also U-Boot does not use traditional .dyn.rel to perform
relocation on MIPS, that makes implementation of runtime
relocation pretty hard.

Signed-off-by: Jiaxun Yang 
---
 include/efi_loader.h  | 26 ++
 lib/efi_loader/Kconfig| 10 ++
 lib/efi_loader/efi_image_loader.c |  1 +
 lib/efi_loader/efi_memory.c   | 14 +++---
 lib/efi_loader/efi_runtime.c  | 11 ++-
 lib/efi_loader/efi_var_mem.c  |  6 +-
 lib/efi_selftest/Makefile |  2 +-
 7 files changed, 56 insertions(+), 14 deletions(-)

diff --git a/include/efi_loader.h b/include/efi_loader.h
index 9600941aa327..1ae62906e099 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -31,7 +31,7 @@ static inline void *guidcpy(void *dst, const void *src)
return memcpy(dst, src, sizeof(efi_guid_t));
 }
 
-#if CONFIG_IS_ENABLED(EFI_LOADER)
+#if CONFIG_IS_ENABLED(EFI_LOADER) && CONFIG_IS_ENABLED(EFI_RUNTIME_RELOCATE)
 
 /**
  * __efi_runtime_data - declares a non-const variable for EFI runtime section
@@ -79,6 +79,23 @@ static inline void *guidcpy(void *dst, const void *src)
  */
 #define __efi_runtime __section(".text.efi_runtime")
 
+/* Call this to relocate the runtime section to an address space */
+void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
+
+#else /* CONFIG_IS_ENABLED(EFI_LOADER) && 
CONFIG_IS_ENABLED(EFI_RUNTIME_RELOCATE) */
+
+/* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */
+#define __efi_runtime_data
+#define __efi_runtime_rodata
+#define __efi_runtime
+
+static inline void efi_runtime_relocate(ulong offset,
+   struct efi_mem_desc *map) {};
+
+#endif /* CONFIG_IS_ENABLED(EFI_LOADER) && 
CONFIG_IS_ENABLED(EFI_RUNTIME_RELOCATE) */
+
+#if CONFIG_IS_ENABLED(EFI_LOADER)
+
 /*
  * Call this with mmio_ptr as the _pointer_ to a pointer to an MMIO region
  * to make it available at runtime
@@ -101,10 +118,6 @@ efi_status_t efi_launch_capsules(void);
 
 #else /* CONFIG_IS_ENABLED(EFI_LOADER) */
 
-/* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */
-#define __efi_runtime_data
-#define __efi_runtime_rodata
-#define __efi_runtime
 static inline efi_status_t efi_add_runtime_mmio(void *mmio_ptr, u64 len)
 {
return EFI_SUCCESS;
@@ -118,7 +131,6 @@ static inline efi_status_t efi_launch_capsules(void)
 {
return EFI_SUCCESS;
 }
-
 #endif /* CONFIG_IS_ENABLED(EFI_LOADER) */
 
 #if CONFIG_IS_ENABLED(EFI_BINARY_EXEC)
@@ -641,8 +653,6 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj 
*handle,
 struct efi_loaded_image *loaded_image_info);
 /* Called once to store the pristine gd pointer */
 void efi_save_gd(void);
-/* Call this to relocate the runtime section to an address space */
-void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
 /* Call this to get image parameters */
 void efi_get_image_parameters(void **img_addr, size_t *img_size);
 /* Add a new object to the object list. */
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 430bb7f0f7dc..bc5ae9086ea2 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -359,6 +359,16 @@ config EFI_UNICODE_CAPITALIZATION
 
 endif
 
+config EFI_RUNTIME_RELOCATE
+   bool "Support relocation for EFI runtime service"
+   depends on ARM || X86 || RISCV || SANDBOX
+   default y
+   help
+ Select this option to enable relocation for EFI runtime service. It
+ enables set_virtual_address_map and convert_pointer runtime service.
+ It is required for OS on most architectures to make use of EFI runtime
+ services.
+
 config EFI_LOADER_BOUNCE_BUFFER
bool "EFI Applications use bounce buffers for DMA operations"
depends on ARM64
diff --git a/lib/efi_loader/efi_image_loader.c 
b/lib/efi_loader/efi_image_loader.c
index 604243603289..cedc4d822fe7 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -50,6 +50,7 @@ static int machines[] = {
 #if defined(__riscv) && (__riscv_xlen == 64)
IMAGE_FILE_MACHINE_RISCV64,
 #endif
+
0 };
 
 /**
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 12cf23fa3fa8..7a1959d2409a 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -908,8 +908,8 @@ __weak void efi_add_known_memory(void)
  */
 static void add_u_boot_and_runtime(void)
 {
-   unsigned long runtime_start, runtime_end, runtime_pages;
-   unsigned long runtime_mask = EFI_PAGE_MASK;
+   __maybe_unused unsigned long runtime_start, runtime_end,

[PATCH 1/7] MIPS: Implement setjmp

2024-05-17 Thread Jiaxun Yang

Implement setjmp with o32/n64 ABI's standard stack frame.
Note that those two ABIs slightly disagreed on placement of
registers so they are being implemented in two different
files.

Signed-off-by: Jiaxun Yang 
---
 arch/mips/include/asm/setjmp.h | 36 +++
 arch/mips/lib/Makefile |  2 ++
 arch/mips/lib/setjmp32.S   | 51 ++
 arch/mips/lib/setjmp64.S   | 56 ++
 4 files changed, 145 insertions(+)

diff --git a/arch/mips/include/asm/setjmp.h b/arch/mips/include/asm/setjmp.h
new file mode 100644
index ..afa2ffb007e6
--- /dev/null
+++ b/arch/mips/include/asm/setjmp.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2024 Jiaxun Yang 
+ */
+
+#ifndef _SETJMP_H_
+#define _SETJMP_H_ 1
+
+/*
+ * This really should be opaque, but the EFI implementation wrongly
+ * assumes that a 'struct jmp_buf_data' is defined.
+ */
+#if __mips == 64
+struct jmp_buf_data {
+   unsigned long ra;
+   unsigned long sp;
+   unsigned long fp;
+   unsigned long gp;
+   unsigned long s_regs[8];/* s0 - s7 */
+};
+#else
+struct jmp_buf_data {
+   unsigned long ra;
+   unsigned long sp;
+   unsigned long s_regs[8];/* s0 - s7 */
+   unsigned long fp;
+   unsigned long gp;
+};
+#endif
+
+typedef struct jmp_buf_data jmp_buf[1];
+
+int setjmp(jmp_buf jmp);
+void longjmp(jmp_buf jmp, int ret);
+
+#endif /* _SETJMP_H_ */
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 1621cc9a1ff9..e36dfd0547b5 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -10,6 +10,8 @@ obj-y += reloc.o
 obj-y  += stack.o
 obj-y  += traps.o
 
+obj-$(CONFIG_32BIT) += setjmp32.o
+obj-$(CONFIG_64BIT) += setjmp64.o
 obj-$(CONFIG_CMD_BOOTM) += bootm.o
 obj-$(CONFIG_CMD_GO) += boot.o
 obj-$(CONFIG_SPL_BUILD) += spl.o
diff --git a/arch/mips/lib/setjmp32.S b/arch/mips/lib/setjmp32.S
new file mode 100644
index ..4a2661d29249
--- /dev/null
+++ b/arch/mips/lib/setjmp32.S
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2024 Jiaxun Yang 
+ */
+
+#include 
+#include 
+
+.pushsection .text.setjmp, "ax"
+ENTRY(setjmp)
+   sw  ra,  0(a0)
+   sw  sp,  4(a0)
+   sw  s0,  8(a0)
+   sw  s1, 12(a0)
+   sw  s2, 16(a0)
+   sw  s3, 20(a0)
+   sw  s4, 24(a0)
+   sw  s5, 28(a0)
+   sw  s6, 32(a0)
+   sw  s7, 36(a0)
+   sw  fp, 40(a0)
+   sw  gp, 44(a0)
+
+   movev0, zero
+   jr  ra
+ENDPROC(setjmp)
+.popsection
+
+.pushsection .text.longjmp, "ax"
+ENTRY(longjmp)
+   lw  ra,  0(a0)
+   lw  sp,  4(a0)
+   lw  s0,  8(a0)
+   lw  s1, 12(a0)
+   lw  s2, 16(a0)
+   lw  s3, 20(a0)
+   lw  s4, 24(a0)
+   lw  s5, 28(a0)
+   lw  s6, 32(a0)
+   lw  s7, 36(a0)
+   lw  fp, 40(a0)
+   lw  gp, 44(a0)
+
+   beqza1, 1f
+   movev0, a1
+   jr  ra
+1:
+   li  v0, 1
+   jr  ra
+ENDPROC(longjmp)
+.popsection
diff --git a/arch/mips/lib/setjmp64.S b/arch/mips/lib/setjmp64.S
new file mode 100644
index ..6f615bb10014
--- /dev/null
+++ b/arch/mips/lib/setjmp64.S
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+ * Copyright (c) 2017 Lemote Co.Ltd
+ * Author: Heiher 
+ * Copyright (c) 2024 Jiaxun Yang 
+ */
+
+#include 
+#include 
+
+.pushsection .text.setjmp, "ax"
+ENTRY(setjmp)
+   sd  ra, 0x00(a0)
+   sd  sp, 0x08(a0)
+   sd  fp, 0x10(a0)
+   sd  gp, 0x18(a0)
+
+   sd  s0, 0x20(a0)
+   sd  s1, 0x28(a0)
+   sd  s2, 0x30(a0)
+   sd  s3, 0x38(a0)
+   sd  s4, 0x40(a0)
+   sd  s5, 0x48(a0)
+   sd  s6, 0x50(a0)
+   sd  s7, 0x58(a0)
+
+   movev0, zero
+   jr  ra
+ENDPROC(setjmp)
+.popsection
+
+.pushsection .text.longjmp, "ax"
+ENTRY(longjmp)
+   ld  ra, 0x00(a0)
+   ld  sp, 0x08(a0)
+   ld  fp, 0x10(a0)
+   ld  gp, 0x18(a0)
+
+   ld  s0, 0x20(a0)
+   ld  s1, 0x28(a0)
+   ld  s2, 0x30(a0)
+   ld  s3, 0x38(a0)
+   ld  s4, 0x40(a0)
+   ld  s5, 0x48(a0)
+   ld  s6, 0x50(a0)
+   ld  s7, 0x58(a0)
+
+   beqza1, 1f
+   movev0, a1
+   jr  ra
+1:
+   li  v0, 1
+   jr  ra
+ENDPROC(longjmp)
+.popsection

-- 
2.34.1

[PATCH 0/7] MIPS: Enable EFI support

2024-05-17 Thread Jiaxun Yang

Hi all,

This series enabled EFI support to MIPS platform.

Although MIPS is not defined by UEFI specification, there are
quite a few firmware implementations available, including
MIPS-EFI[1] for Loongson-2F, Lemote's proprietary EDK2 implementation
on Loongson-3[2], Kunlun firmware for Loongson-3[3], efiffy[4]
for MIPS Creator CI20 and another mystery EDK implementation shipped
with some Creator CI20 board.  

Available applications including gnu-efi, Loongson's GRUB fork[5],
Ventoy[6].

My implementation in U-Boot is aiming to follow conventions made
by other implementations for architecture stuff and remain
compliance with spec for general aspects.

bootefi hello and selftest passed on both 32 and 64 bit system,
gnu-efi, grub and ventoy are tested on mips64el with my pending
platform works. mips32el efi executable from efiffy is tested
as well.

Please review.
Thanks

[1]: https://github.com/kontais/EFI-MIPS
[2]: https://github.com/loongson-community/firmware-nonfree
[3]: http://www.kunluntech.com.cn/klbiosxl
[4]: https://sourceforge.net/projects/efify/
[5]: https://github.com/loongson-community/grub
[6]: https://www.ventoy.net/en/index.html

Signed-off-by: Jiaxun Yang 
---
Jiaxun Yang (7):
  MIPS: Implement setjmp
  efi: Allow runtime relocate to be disabled
  Makefile.lib: Preserve .rodata section for EFI file
  Makefile.lib: Enforce EFI CFLAGS/AFLAGS
  MIPS: Add smbios_start to arch_global_data
  MIPS: Define MIPS EFI related bits everywhere
  MIPS: Implement EFI supporting stuff

 Makefile  |   3 +
 arch/mips/config.mk   |   9 +
 arch/mips/include/asm/global_data.h   |   3 +
 arch/mips/include/asm/setjmp.h|  36 
 arch/mips/lib/Makefile|  15 ++
 arch/mips/lib/crt0_mips_efi.S | 239 ++
 arch/mips/lib/elf_mips_efi.lds| 113 ++
 arch/mips/lib/reloc_mips_efi.c|  99 +
 arch/mips/lib/setjmp32.S  |  51 +
 arch/mips/lib/setjmp64.S  |  56 +
 include/asm-generic/pe.h  |   5 +
 include/config_distro_bootcmd.h   |   6 +
 include/efi_default_filename.h|   8 +
 include/efi_loader.h  |  26 ++-
 include/elf.h |   8 +
 lib/efi_loader/Kconfig|  12 +-
 lib/efi_loader/efi_image_loader.c |  18 ++
 lib/efi_loader/efi_memory.c   |  14 +-
 lib/efi_loader/efi_runtime.c  |  11 +-
 lib/efi_loader/efi_var_mem.c  |   6 +-
 lib/efi_selftest/Makefile |   2 +-
 lib/efi_selftest/efi_selftest_miniapp_exception.c |   2 +
 scripts/Makefile.lib  |  10 +-
 23 files changed, 734 insertions(+), 18 deletions(-)
---
base-commit: ad7dce5abd49ef3b5c93da5303e15449c8c162b4
change-id: 20240517-mips-efi-c9a1ad819c2d

Best regards,
-- 
Jiaxun Yang

[PATCH 1/1] defconfig: disable VIDEO_COPY on the sandbox

2024-05-17 Thread Heinrich Schuchardt

Since commit a75cf70d23ac ("efi: Correct handling of frame buffer") the EFI
block image transfer is broken on the sandbox.

To test build sandbox_defconfig with CONFIG_EFI_SELFTEST=y and execute

setenv efi_selftest block image transfer
bootefi selftest

Fixes: a75cf70d23ac ("efi: Correct handling of frame buffer")
Signed-off-by: Heinrich Schuchardt 
---
 configs/sandbox_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 93b52f2de5c..80c310b8e82 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -318,7 +318,6 @@ CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 CONFIG_VIDEO=y
 CONFIG_VIDEO_FONT_SUN12X22=y
-CONFIG_VIDEO_COPY=y
 CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
 CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
-- 
2.43.0

Re: [PATCH 1/1] Makefile: add build-sandbox*/ to mrproper target

2024-05-17 Thread Tom Rini

On Fri, May 17, 2024 at 05:51:29PM +0200, Heinrich Schuchardt wrote:
> On 5/17/24 17:18, Tom Rini wrote:
> > On Fri, May 17, 2024 at 05:15:34PM +0200, Heinrich Schuchardt wrote:
> > 
> > > make mrproper should remove all build artefacts.
> > > 
> > > Running make tests without deleting build-sandbox led to an error
> > > 
> > >  *** No rule to make target '../include/common.h',
> > >  needed by 'include/config/auto.conf'.
> > > 
> > > on my machine.
> > > 
> > > Let's add the build-sandbox*/ directories to the mrproper target.
> > > 
> > > Signed-off-by: Heinrich Schuchardt 
> > > ---
> > >   Makefile | 2 +-
> > >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > I don't believe it's the right place to remove build directories. This
> > is also incomplete as it wouldn't clean up other platforms that can be
> > built, and of course it cannot handle out of tree build directories. All
> > build directories regardless of where they are need to be removed as
> > that particular change breaks re-using build directories before/after
> > it.
> > 
> 
> My expectation is that after 'make mrproper; git clean -df' I have no build
> artifacts left over.
> 
> In .gitignore I find '/build*'. This results in 'git clean -df' not removing
> the the build directories either.
> 
> Tom, what is your suggestion?

git clean -dfx ? Per the help:
   -x
   Don’t use the standard ignore rules (see gitignore(5)), but still 
use the ignore
   rules given with -e options from the command line. This allows 
removing all
   untracked files, including build products. This can be used 
(possibly in
   conjunction with git restore or git reset) to create a pristine 
working directory
   to test a clean build.

-- 
Tom


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Re: [PATCH 1/1] Makefile: add build-sandbox*/ to mrproper target

2024-05-17 Thread Heinrich Schuchardt


On 5/17/24 17:18, Tom Rini wrote:

On Fri, May 17, 2024 at 05:15:34PM +0200, Heinrich Schuchardt wrote:


make mrproper should remove all build artefacts.

Running make tests without deleting build-sandbox led to an error

 *** No rule to make target '../include/common.h',
 needed by 'include/config/auto.conf'.

on my machine.

Let's add the build-sandbox*/ directories to the mrproper target.

Signed-off-by: Heinrich Schuchardt 
---
  Makefile | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)


I don't believe it's the right place to remove build directories. This
is also incomplete as it wouldn't clean up other platforms that can be
built, and of course it cannot handle out of tree build directories. All
build directories regardless of where they are need to be removed as
that particular change breaks re-using build directories before/after
it.



My expectation is that after 'make mrproper; git clean -df' I have no 
build artifacts left over.


In .gitignore I find '/build*'. This results in 'git clean -df' not 
removing the the build directories either.


Tom, what is your suggestion?

Best regards

Heinrich

[v2 2/2] doc: process.rst: Document device tree resync rules

2024-05-17 Thread Tom Rini

Document the logic of when we do a full resync of the device trees used
by OF_UPSTREAM as well as that cherry-picking is allowed as needed.

Signed-off-by: Tom Rini 
---
Changes in v2:
- Address Quentin's feedback

Cc: Heinrich Schuchardt 
Cc: Quentin Schulz 
---
 doc/develop/process.rst | 13 +
 1 file changed, 13 insertions(+)

diff --git a/doc/develop/process.rst b/doc/develop/process.rst
index a66540a698c1..0542b3fc1245 100644
--- a/doc/develop/process.rst
+++ b/doc/develop/process.rst
@@ -108,6 +108,19 @@ Differences to the Linux Development Process
   In U-Boot, ``"-rc1"`` will only be released after all (or at least most of
   the) patches that were submitted during the merge window have been applied.
 
+Resyncing of the device tree subtree
+
+
+As explained in :doc:`devicetree/control` some platforms make use of device 
tree
+files which come from a git subtree that mirrors the Linux Kernel sources
+itself. For our purposes, we only track releases and not release candidates for
+merging in our tree. These merges follow the normal merge window rules.
+
+In the case of specific changes, such as bug fixes or new platform support,
+these can be "cherry-picked" and are subject to the normal merge rules. For
+example, a bug fix can come in later in the window but a full re-sync only
+happens within the merge window itself.
+
 .. _custodians:
 
 Custodians
-- 
2.34.1

[v2 1/2] doc: process.rst: Use subsubheading for "Phases of the Development Process"

2024-05-17 Thread Tom Rini

These sections which talk about the different phases of the development
process should be using the subsubheading identifier.

Signed-off-by: Tom Rini 
---
Changes in v2:
None

Cc: Heinrich Schuchardt 
---
 doc/develop/process.rst | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/doc/develop/process.rst b/doc/develop/process.rst
index 92477d05dd85..a66540a698c1 100644
--- a/doc/develop/process.rst
+++ b/doc/develop/process.rst
@@ -34,7 +34,7 @@ It is followed by a *Stabilization Period*.
 The end of a Release Cycle is marked by the release of a new U-Boot version.
 
 Merge Window
-
+
 
 The Merge Window is the period when new patches get submitted (and hopefully
 accepted) for inclusion into U-Boot mainline. This period lasts for 21 days (3
@@ -44,7 +44,7 @@ This is the only time when new code (like support for new 
processors or new
 boards, or other new features or reorganization of code) is accepted.
 
 Twilight Time
--
+^
 
 Usually patches do not get accepted as they are - the peer review that takes
 place will usually require changes and resubmissions of the patches before they
@@ -65,13 +65,13 @@ the Merge Window does not preclude patches that were 
already posted from being
 merged for the upcoming release.
 
 Stabilization Period
-
+
 
 During the Stabilization Period only patches containing bug fixes get
 applied.
 
 Corner Cases
-
+
 
 Sometimes it is not clear if a patch contains a bug fix or not.
 For example, changes that remove dead code, unused macros etc. or
-- 
2.34.1

Re: [PATCH 1/1] Makefile: add build-sandbox*/ to mrproper target

2024-05-17 Thread Tom Rini

On Fri, May 17, 2024 at 05:15:34PM +0200, Heinrich Schuchardt wrote:

> make mrproper should remove all build artefacts.
> 
> Running make tests without deleting build-sandbox led to an error
> 
> *** No rule to make target '../include/common.h',
> needed by 'include/config/auto.conf'.
> 
> on my machine.
> 
> Let's add the build-sandbox*/ directories to the mrproper target.
> 
> Signed-off-by: Heinrich Schuchardt 
> ---
>  Makefile | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

I don't believe it's the right place to remove build directories. This
is also incomplete as it wouldn't clean up other platforms that can be
built, and of course it cannot handle out of tree build directories. All
build directories regardless of where they are need to be removed as
that particular change breaks re-using build directories before/after
it.

-- 
Tom

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Re: [Agilex7 M-series Platform Enablement v1 16/16] configs: Add defconfig for Agilex7 M-series

2024-05-17 Thread Tom Rini

On Fri, May 17, 2024 at 01:27:01PM +0800, tingting.m...@intel.com wrote:
> From: Wan Yee Lau 
> 
> Add defconfig for Agilex7 M-series.
> 
> Signed-off-by: Wan Yee Lau 
> Signed-off-by: Teik Heng Chong 
> Signed-off-by: Tingting Meng 
> ---
>  ...onfig => socfpga_agilex7m_sdmmc_defconfig} | 110 +-
>  1 file changed, 54 insertions(+), 56 deletions(-)
>  copy configs/{socfpga_agilex5_defconfig => socfpga_agilex7m_sdmmc_defconfig} 
> (56%)

You need to put this in a MAINTAINERS file.

-- 
Tom


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[PATCH 1/1] Makefile: add build-sandbox*/ to mrproper target

2024-05-17 Thread Heinrich Schuchardt

make mrproper should remove all build artefacts.

Running make tests without deleting build-sandbox led to an error

*** No rule to make target '../include/common.h',
needed by 'include/config/auto.conf'.

on my machine.

Let's add the build-sandbox*/ directories to the mrproper target.

Signed-off-by: Heinrich Schuchardt 
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 44deb339af1..179cce9c0a1 100644
--- a/Makefile
+++ b/Makefile
@@ -2204,7 +2204,7 @@ CLEAN_FILES += include/autoconf.mk* include/bmp_logo.h 
include/bmp_logo_data.h \
   Test* capsule.*.efi-capsule capsule*.map
 
 # Directories & files removed with 'make mrproper'
-MRPROPER_DIRS  += include/config include/generated spl tpl vpl \
+MRPROPER_DIRS  += build-sandbox* include/config include/generated spl tpl vpl \
  .tmp_objdiff doc/output include/asm
 
 # Remove include/asm symlink created by U-Boot before v2014.01
-- 
2.43.0

Re: [Agilex7 M-series Platform Enablement v1 01/16] arch: arm: dts: Add dts and dtsi for new platform Agilex7 M-series

2024-05-17 Thread Tom Rini

On Fri, May 17, 2024 at 01:26:46PM +0800, tingting.m...@intel.com wrote:

> From: Wan Yee Lau 
> 
> Add Agilex7 M-series dtsi and dts for new platform Agilex7 M-series.
> 
> Signed-off-by: Wan Yee Lau 
> Signed-off-by: Teik Heng Chong 
> Signed-off-by: Tingting Meng 
> ---
>  ...tsi => socfpga_agilex7m_socdk-u-boot.dtsi} |  37 -
>  ...x_socdk.dts => socfpga_agilex7m_socdk.dts} |  66 +++--
>  arch/arm/dts/socfpga_soc64_u-boot.dtsi| 127 ++
>  3 files changed, 213 insertions(+), 17 deletions(-)
>  copy arch/arm/dts/{socfpga_agilex_socdk-u-boot.dtsi => 
> socfpga_agilex7m_socdk-u-boot.dtsi} (50%)
>  copy arch/arm/dts/{socfpga_agilex_socdk.dts => socfpga_agilex7m_socdk.dts} 
> (63%)
>  create mode 100644 arch/arm/dts/socfpga_soc64_u-boot.dtsi

Why can't we use OF_UPSTREAM on these platforms?

-- 
Tom


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Re: [PATCH 2/2] doc: process.rst: Document device tree resync rules

2024-05-17 Thread Tom Rini

On Fri, May 17, 2024 at 10:35:43AM +0200, Quentin Schulz wrote:
> Hi Tom,
> 
> On 5/16/24 10:34 PM, Tom Rini wrote:
> > Document the logic of when we do a full resync of the device trees used
> > by OF_UPSTREAM as well as that cherry-picking is allowed as needed.
> > 
> > Signed-off-by: Tom Rini 
> > ---
> > Cc: Heinrich Schuchardt 
> > ---
> >   doc/develop/process.rst | 13 +
> >   1 file changed, 13 insertions(+)
> > 
> > diff --git a/doc/develop/process.rst b/doc/develop/process.rst
> > index a66540a698c1..0542b3fc1245 100644
> > --- a/doc/develop/process.rst
> > +++ b/doc/develop/process.rst
> > @@ -108,6 +108,19 @@ Differences to the Linux Development Process
> > In U-Boot, ``"-rc1"`` will only be released after all (or at least most 
> > of
> > the) patches that were submitted during the merge window have been 
> > applied.
> > +Resyncing of the device tree subtree
> > +
> > +
> > +As explained in :doc:`devicetree/control` some platforms make use of 
> > device tree
> > +files which come from a git subtree that mirrors the Linux Kernel sources
> > +itself. For our purposes, we only track releases and not release 
> > candidates for
> > +merging in our tree. These merges follow the normal merge window rules.
> > +
> > +In the case of specific changes, such as bug fixes or new platform support,
> > +these can be "cherry-picked" and are subject to the normal merge rules. For
> > +example, a bug fix can come in later in the window but a full re-sync only
> > +happens within the merge window itself.
> > +
> 
> Can we provide an example on how to cherry-pick those changes with a command
> line?

This is covered in doc/develop/devicetree/control.rst already so I'd
rather not, in this document, which is currently just "why" we do
things. If we need full examples and not just how to use, we should
expand "Resyncing with devicetree-rebasing" in the other document I
think.

> Additionally, in doc/develop/devicetree/control.rst we say:
> 
> """
> However, if `dts/upstream/` hasn't yet received devicetree source file for
> your newly added board support then you can add corresponding devicetree
> source file as `arch//dts/.dts`. To select that add `#
> CONFIG_OF_UPSTREAM is not set` and set `DEFAULT_DEVICE_TREE=` when
> prompted by Kconfig.
> """
> 
> But now we have a second option, cherry-picking upstream changes instead, so
> I assume we should document it there as well (or cross-reference?).
> 
> Looks good to me otherwise, thanks for clarifying this new process.

Thanks for spotting that part, yes, I'll go re-word that as well.

-- 
Tom


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Re: [PATCH v3 4/4] imx: hab: Use nxp_imx8mcst etype for i.MX8M flash.bin signing

2024-05-17 Thread Francesco Dolcini

Hello Marek,

On Fri, May 17, 2024 at 03:25:38AM +0200, Marek Vasut wrote:
> On 5/16/24 11:40 PM, Tim Harvey wrote:
> 
> [...]
> 
> > > -The entire script is available in doc/imx/habv4/csf_examples/mx8m/csf.sh
> > > -and can be used as follows to modify flash.bin to be signed
> > > -(adjust paths as needed):
> > > -```
> > > -export CST_DIR=/usr/src/cst-3.3.1/
> > > -export CSF_KEY=$CST_DIR/crts/CSF1_1_sha256_4096_65537_v3_usr_crt.pem
> > > -export IMG_KEY=$CST_DIR/crts/IMG1_1_sha256_4096_65537_v3_usr_crt.pem
> > > -export SRK_TABLE=$CST_DIR/crts/SRK_1_2_3_4_table.bin
> > > -export PATH=$CST_DIR/linux64/bin:$PATH
> > 
> > Hi Marek,
> > 
> > I thought you were going to leave the above env setting examples in
> > the documentation.
> > 
> > I suggest showing how to specify using env (by just leaving the above
> > in) as well as by copying them directly to the build directory if
> > wanted.. otherwise the documentation is lacking.
> 
> If the tool can do env vars now, I would like to avoid copying key material
> around. So what about this:
> 
> diff --git a/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
> b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
> index 1eb1fb0aa61..257ffb45656 100644
> --- a/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
> +++ b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
> @@ -144,6 +144,8 @@ The signing is activated by wrapping SPL and fitImage
> sections into nxp-imx8mcst
>  etype, which is done automatically in
> arch/arm/dts/imx8m{m,n,p,q}-u-boot.dtsi
>  in case CONFIG_IMX_HAB Kconfig symbol is enabled.
> 
> +Build of flash.bin target then produces a signed flash.bin automatically.
> +
>  The nxp-imx8mcst etype is configurable using either DT properties or
> environment
>  variables. The following DT properties and environment variables are
> supported.
>  Note that environment variables override DT properties.
> @@ -160,7 +162,15 @@ Note that environment variables override DT properties.
>  | nxp,img-crt| IMG_KEY   | full path to the IMG Key
> IMG1_1_sha256_4096_65537_v3_usr_crt.pem |
> 
> ++---+--+
> 
> -Build of flash.bin target then produces a signed flash.bin automatically.
> +Environment variables can be set as follows to point the build process
> +to external key material:
> +```
> +export CST_DIR=/usr/src/cst-3.3.1/
> +export CSF_KEY=$CST_DIR/crts/CSF1_1_sha256_4096_65537_v3_usr_crt.pem
> +export IMG_KEY=$CST_DIR/crts/IMG1_1_sha256_4096_65537_v3_usr_crt.pem
> +export SRK_TABLE=$CST_DIR/crts/SRK_1_2_3_4_table.bin
> +make flash.bin
> +```

FWIW, this addresses the concern I raised on the previous version, works
for me. Thanks Marek (and Tim).

Francesco

Re: [PATCH v5 01/12] efi: Correct handling of frame buffer

2024-05-17 Thread Jiaxun Yang




在2024年5月17日五月 下午1:46，Heinrich Schuchardt写道：
> On 11/19/23 20:11, Simon Glass wrote:
>> The efi_gop driver uses private fields from the video uclass to obtain a
>> pointer to the frame buffer. Use the platform data instead.
>>
>> Check the VIDEO_COPY setting to determine which frame buffer to use. Once
>> the next stage is running (and making use of U-Boot's EFI boot services)
>> U-Boot does not handle copying from priv->fb to the hardware framebuffer,
>> so we must allow EFI to write directly to the hardware framebuffer.
>>
>> We could provide a function to read this, but it seems better to just
>> document how it works. The original change ignored an explicit comment
>> in the video.h file ("Things that are private to the uclass: don't use
>> these in the driver") which is why this was missed when the VIDEO_COPY
>> feature was added.
>>
>> Signed-off-by: Simon Glass 
>> Fixes: 8f661a5b662 ("efi_loader: gop: Expose fb when 32bpp")
>> Reviewed-by: Bin Meng #
>
> Since this patch
> a75cf70d23ac ("efi: Correct handling of frame buffer") the EFI block
> image transfer is broken on the sandbox.

Our situation on sandbox is a little bit confusing to me.

Sandbox requires explicit sync itself to allow framebufer to be copied
to the texture, so I don't really understand how does this work in first
place.

Thanks
- Jiaxun

>
> Build sandbox_defconfig with CONFIG_EFI_SELFTEST=y.
>
> setenv efi_selftest block image transfer
> bootefi selftest
>
> A moving submarine should be shown.
>
> Best regards
>
> Heinrich
>
>> ---

[PATCH 1/1] usb: Assimilate usb_get_descriptor() to linux

2024-05-17 Thread Philip Oberfichtner

Before this commit, usb_get_descriptor() failed for some flakey USB
devices. We hereby adopt the more robust linux implementation [1].

Signed-off-by: Philip Oberfichtner 

[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/usb/core/message.c?h=v6.9#n781
---
 common/usb.c | 37 ++---
 1 file changed, 30 insertions(+), 7 deletions(-)

diff --git a/common/usb.c b/common/usb.c
index 84b10f5c7d..f5b21c883f 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -214,8 +214,9 @@ int usb_int_msg(struct usb_device *dev, unsigned long pipe,
  * clear keyboards LEDs). For data transfers, (storage transfers) we don't
  * allow control messages with 0 timeout, by previousely resetting the flag
  * asynch_allowed (usb_disable_asynch(1)).
- * returns the transferred length if OK or -1 if error. The transferred length
- * and the current status are stored in the dev->act_len and dev->status.
+ * returns the transferred length if OK, otherwise a negative error code. The
+ * transferred length and the current status are stored in the dev->act_len and
+ * dev->status.
  */
 int usb_control_msg(struct usb_device *dev, unsigned int pipe,
unsigned char request, unsigned char requesttype,
@@ -257,11 +258,14 @@ int usb_control_msg(struct usb_device *dev, unsigned int 
pipe,
break;
mdelay(1);
}
+
+   if (timeout == 0)
+   return -ETIMEDOUT;
+
if (dev->status)
return -1;
 
return dev->act_len;
-
 }
 
 /*---
@@ -562,10 +566,29 @@ int usb_clear_halt(struct usb_device *dev, int pipe)
 static int usb_get_descriptor(struct usb_device *dev, unsigned char type,
unsigned char index, void *buf, int size)
 {
-   return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
-  USB_REQ_GET_DESCRIPTOR, USB_DIR_IN,
-  (type << 8) + index, 0, buf, size,
-  USB_CNTL_TIMEOUT);
+   int i;
+   int result;
+
+   if (size <= 0)  /* No point in asking for no data */
+   return -EINVAL;
+
+   memset(buf, 0, size);   /* Make sure we parse really received data */
+
+   for (i = 0; i < 3; ++i) {
+   /* retry on length 0 or error; some devices are flakey */
+   result = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
+USB_REQ_GET_DESCRIPTOR, USB_DIR_IN,
+(type << 8) + index, 0, buf, size,
+USB_CNTL_TIMEOUT);
+   if (result <= 0 && result != -ETIMEDOUT)
+   continue;
+   if (result > 1 && ((u8 *)buf)[1] != type) {
+   result = -ENODATA;
+   continue;
+   }
+   break;
+   }
+   return result;
 }
 
 /**
-- 
2.39.2

[Agilex7 M-series Platform Enablement v1 16/16] configs: Add defconfig for Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Wan Yee Lau 

Add defconfig for Agilex7 M-series.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 ...onfig => socfpga_agilex7m_sdmmc_defconfig} | 110 +-
 1 file changed, 54 insertions(+), 56 deletions(-)
 copy configs/{socfpga_agilex5_defconfig => socfpga_agilex7m_sdmmc_defconfig} 
(56%)

diff --git a/configs/socfpga_agilex5_defconfig 
b/configs/socfpga_agilex7m_sdmmc_defconfig
similarity index 56%
copy from configs/socfpga_agilex5_defconfig
copy to configs/socfpga_agilex7m_sdmmc_defconfig
index f39954aea8..12414e2e5f 100644
--- a/configs/socfpga_agilex5_defconfig
+++ b/configs/socfpga_agilex7m_sdmmc_defconfig
@@ -1,50 +1,69 @@
 CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=4
 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x0400
 CONFIG_ARCH_SOCFPGA=y
-CONFIG_TEXT_BASE=0x8020
+CONFIG_TEXT_BASE=0x20
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_NR_DRAM_BANKS=2
+CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x0410
+CONFIG_ENV_SECT_SIZE=0x2
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x0400
 CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex5_socdk"
-CONFIG_TARGET_SOCFPGA_AGILEX5_SOCDK=y
-CONFIG_IDENT_STRING="socfpga_agilex5"
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex7m_socdk"
+CONFIG_SPL_TEXT_BASE=0xFFE0
+CONFIG_TARGET_SOCFPGA_AGILEX7M_SOCDK=y
+CONFIG_IDENT_STRING="socfpga_agilex7m"
 CONFIG_SPL_FS_FAT=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x8200
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x0200
+CONFIG_SYS_LOAD_ADDR=0x0200
 # CONFIG_USE_SPL_FIT_GENERATOR is not set
-CONFIG_QSPI_BOOT=y
+# CONFIG_NAND_BOOT is not set
+# CONFIG_QSPI_BOOT is not set
 CONFIG_BOOTDELAY=5
 CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 initrd=0x9000 root=/dev/ram0 rw 
init=/sbin/init ramdisk_size=1000 earlycon panic=-1 nosmp kvm-arm.mode=nvhe"
-CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_BOOTARGS="earlycon panic=-1"
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
+CONFIG_SPL_MAX_SIZE=0x4
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3ff0
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
+CONFIG_CUSTOM_SPL_SYS_MALLOC_ADDR=0x3fa0
+CONFIG_SPL_SYS_MALLOC_SIZE=0x50
+CONFIG_SPL_BSS_MAX_SIZE=0x10
 CONFIG_SPL_CRC32=y
+CONFIG_SPL_MTD_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_CACHE=y
+CONFIG_SPL_SPI_LOAD=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_SYS_PROMPT="SOCFPGA_AGILEX5 # "
+CONFIG_SYS_PROMPT="SOCFPGA_AGILEX7M # "
 CONFIG_CMD_NVEDIT_SELECT=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_SF=y
-CONFIG_DOS_PARTITION=y
-CONFIG_SPL_DOS_PARTITION=y
-CONFIG_SPL_SYS_DISABLE_DCACHE_OPS=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_MTD=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+# CONFIG_CMD_NAND_TRIMFFS is not set
+# CONFIG_CMD_NAND_LOCK_UNLOCK is not set
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_SPL_SPI_FLASH_MTD=y
 CONFIG_SPI_FLASH_MTD=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_MTDIDS_DEFAULT="nand0=ffb9.nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb9.nand.0:2m(u-boot),-(root)"
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_CMD_UBI=y
 CONFIG_CMD_UBIFS=y
 CONFIG_MTD_UBI=y
@@ -53,9 +72,8 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
 # CONFIG_ISO_PARTITION is not set
 # CONFIG_EFI_PARTITION is not set
 CONFIG_OF_LIST=""
-CONFIG_ENV_IS_IN_UBI=y
-CONFIG_ENV_UBI_PART="root"
-CONFIG_ENV_UBI_VOLUME="env"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
@@ -65,52 +83,32 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_MISC=y
+CONFIG_MMC_DW=y
+CONFIG_SYS_MMC_MAX_BLK_COUNT=256
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
+# CONFIG_NAND_DENALI_DT is not set
+# CONFIG_SYS_NAND_U_BOOT_LOCATIONS is not set
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x0
+CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10
+CONFIG_SPL_NAND_FRAMEWORK=y
 CONFIG_SF_DEFAULT_MODE=0x2003
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_UBI_SILENCE_MSG=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
-CONFIG_RGMII=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_MII=y
 CONFIG_DM_RESET=y
 CONFIG_SYS_NS16550_MEM32=y
 CONFIG_SPI=y
-CONFIG_CADENCE_QSPI=y
-CONFIG_DESIGNWARE_SPI=y
+# CONFIG_CADENCE_QSPI is not set
+# CONFIG_DESIGNWARE_SPI is not set
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_UBIFS_SILENCE_MSG=y
+CONFIG_DESIGNWARE_WATCHDOG=y
+CONFIG_WDT=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 CONFIG_PANIC_HANG=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_LOAD_ADDR=0x8200
-CONFIG_WDT=y
-CONFIG_CMD_WDT=y
-CONFIG_DESIGNWARE_WATCHDOG=y

[Agilex7 M-series Platform Enablement v1 15/16] arch: arm: dts: Update Makefile for new platform Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Wan Yee Lau 

Update Makefile to support Agilex7 M-series platform enablement.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 arch/arm/dts/Makefile   |  1 +
 arch/arm/mach-socfpga/Makefile  | 18 ++
 board/intel/agilex7m-socdk/Makefile |  7 +++
 3 files changed, 26 insertions(+)
 create mode 100644 board/intel/agilex7m-socdk/Makefile

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7b7788f755..c056e0e78e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -547,6 +547,7 @@ dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) +=  \
socfpga_agilex_socdk.dtb\
socfpga_agilex5_socdk.dtb   \
+   socfpga_agilex7m_socdk.dtb  \
socfpga_arria5_secu1.dtb\
socfpga_arria5_socdk.dtb\
socfpga_arria10_chameleonv3_270_2.dtb   \
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 67c6a8dfec..856fd597f6 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -65,6 +65,21 @@ obj-y+= reset_manager_s10.o
 obj-y  += wrap_pll_config_soc64.o
 endif
 
+ifdef CONFIG_TARGET_SOCFPGA_AGILEX7M
+obj-y  += clock_manager_agilex.o
+obj-y  += lowlevel_init_soc64.o
+obj-y  += mailbox_s10.o
+obj-y  += misc_soc64.o
+obj-y  += mmu-arm64_s10.o
+obj-y  += reset_manager_s10.o
+obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH)  += secure_vab.o
+obj-y  += system_manager_soc64.o
+obj-y  += timer_s10.o
+obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH)  += vab.o
+obj-y  += wrap_handoff_soc64.o
+obj-y  += wrap_pll_config_soc64.o
+endif
+
 ifdef CONFIG_TARGET_SOCFPGA_N5X
 obj-y  += clock_manager_n5x.o
 obj-y  += lowlevel_init_soc64.o
@@ -107,6 +122,9 @@ endif
 ifdef CONFIG_TARGET_SOCFPGA_AGILEX5
 obj-y  += spl_soc64.o
 endif
+ifdef CONFIG_TARGET_SOCFPGA_AGILEX7M
+obj-y  += spl_agilex7m.o
+endif
 else
 obj-$(CONFIG_SPL_ATF) += secure_reg_helper.o
 obj-$(CONFIG_SPL_ATF) += smc_api.o
diff --git a/board/intel/agilex7m-socdk/Makefile 
b/board/intel/agilex7m-socdk/Makefile
new file mode 100644
index 00..ff5d9dde3b
--- /dev/null
+++ b/board/intel/agilex7m-socdk/Makefile
@@ -0,0 +1,7 @@
+
+# Copyright (C) 2024 Intel Corporation 
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+obj-y  := socfpga.o
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 14/16] arch: arm: mach-socfpga: Update kconfig for new platform Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Wan Yee Lau 

Update Kconfig for new platform Agilex7 M-series.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 arch/arm/Kconfig  |  4 +++-
 arch/arm/mach-socfpga/Kconfig | 19 +++
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 56e190adf6..f68b680d82 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -32,7 +32,9 @@ config COUNTER_FREQUENCY
ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
default 2500 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
default 1 if ARCH_ZYNQMP
-   default 2 if ARCH_SOCFPGA && ARM64 && TARGET_SOCFPGA_AGILEX5
+   default 4 if ARCH_SOCFPGA && ARM64 && !TARGET_SOCFPGA_AGILEX7M
+   default 2 if ARCH_SOCFPGA && ARM64 && TARGET_SOCFPGA_AGILEX5 && 
\
+   TARGET_SOCFPGA_AGILEX7M
default 0
help
  For platforms with ARMv8-A and ARMv7-A which features a system
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 1008232cac..2ca6336f21 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -59,6 +59,18 @@ config TARGET_SOCFPGA_AGILEX
select SPL_CLK if SPL
select TARGET_SOCFPGA_SOC64
 
+config TARGET_SOCFPGA_AGILEX7M
+   bool
+   select ARMV8_MULTIENTRY
+   select ARMV8_SET_SMPEN
+   select BINMAN if SPL_ATF
+   select CLK
+   select FPGA_INTEL_SDM_MAILBOX
+   select GICV2
+   select NCORE_CACHE
+   select SPL_CLK if SPL
+   select TARGET_SOCFPGA_SOC64
+
 config TARGET_SOCFPGA_AGILEX5
bool
select BINMAN if SPL_ATF
@@ -139,6 +151,10 @@ config TARGET_SOCFPGA_AGILEX_SOCDK
bool "Intel SOCFPGA SoCDK (Agilex)"
select TARGET_SOCFPGA_AGILEX
 
+config TARGET_SOCFPGA_AGILEX7M_SOCDK
+   bool "Intel SOCFPGA SoCDK (Agilex7 M-series)"
+   select TARGET_SOCFPGA_AGILEX7M
+
 config TARGET_SOCFPGA_AGILEX5_SOCDK
bool "Intel SOCFPGA SoCDK (Agilex5)"
select TARGET_SOCFPGA_AGILEX5
@@ -216,6 +232,7 @@ config TARGET_SOCFPGA_TERASIC_SOCKIT
 endchoice
 
 config SYS_BOARD
+   default "agilex7m-socdk" if TARGET_SOCFPGA_AGILEX7M_SOCDK
default "agilex5-socdk" if TARGET_SOCFPGA_AGILEX5_SOCDK
default "agilex-socdk" if TARGET_SOCFPGA_AGILEX_SOCDK
default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
@@ -238,6 +255,7 @@ config SYS_BOARD
default "vining_fpga" if TARGET_SOCFPGA_SOFTING_VINING_FPGA
 
 config SYS_VENDOR
+   default "intel" if TARGET_SOCFPGA_AGILEX7M_SOCDK
default "intel" if TARGET_SOCFPGA_AGILEX5_SOCDK
default "intel" if TARGET_SOCFPGA_AGILEX_SOCDK
default "intel" if TARGET_SOCFPGA_N5X_SOCDK
@@ -261,6 +279,7 @@ config SYS_SOC
default "socfpga"
 
 config SYS_CONFIG_NAME
+   default "socfpga_agilex7m_socdk" if TARGET_SOCFPGA_AGILEX7M_SOCDK
default "socfpga_agilex5_socdk" if TARGET_SOCFPGA_AGILEX5_SOCDK
default "socfpga_agilex_socdk" if TARGET_SOCFPGA_AGILEX_SOCDK
default "socfpga_arria5_secu1" if TARGET_SOCFPGA_ARRIA5_SECU1
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 13/16] ddr: altera: soc64: Fix dram size calculation in clamshell mode

2024-05-17 Thread tingting . meng

From: Teik Heng Chong 

This patch is to fix wrong memory size calculation in clamshell mode

Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 drivers/ddr/altera/sdram_soc64.c | 16 +++-
 drivers/ddr/altera/sdram_soc64.h |  5 +
 2 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index 8f2085f3a0..27580cce2f 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -27,6 +27,9 @@
 
 #define PGTABLE_OFF0x4000
 
+#define SINGLE_RANK_CLAMSHELL  0xC3C3
+#define DUAL_RANK_CLAMSHELL0xA5A5
+
 #if !IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
 u32 hmc_readl(struct altera_sdram_plat *plat, u32 reg)
 {
@@ -240,8 +243,19 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat 
*plat)
 {
u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
 
+   u32 reg_ctrlcfg6_value = hmc_readl(plat, CTRLCFG6);
+   u32 cs_rank = CTRLCFG6_CFG_CS_CHIP(reg_ctrlcfg6_value);
+   u32 cs_addr_width;
+
+   if (cs_rank == SINGLE_RANK_CLAMSHELL)
+   cs_addr_width = 0;
+   else if (cs_rank == DUAL_RANK_CLAMSHELL)
+   cs_addr_width = 1;
+   else
+   cs_addr_width = DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw);
+
phys_size_t size = (phys_size_t)1 <<
-   (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
+   (cs_addr_width +
 DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
 DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) +
 DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr/altera/sdram_soc64.h
index add7df01a5..8b3b53cf5d 100644
--- a/drivers/ddr/altera/sdram_soc64.h
+++ b/drivers/ddr/altera/sdram_soc64.h
@@ -78,6 +78,8 @@ struct altera_sdram_plat {
 #define CTRLCFG0   0x28
 #define CTRLCFG1   0x2c
 #define CTRLCFG30x34
+#define CTRLCFG50x3c
+#define CTRLCFG60x40
 #define DRAMTIMING00x50
 #define CALTIMING0 0x7c
 #define CALTIMING1 0x80
@@ -118,6 +120,9 @@ struct altera_sdram_plat {
 #define CTRLCFG1_CFG_CTRL_EN_ECC(x)\
(((x) >> 7) & 0x1)
 
+#define CTRLCFG6_CFG_CS_CHIP(x)\
+   ((x) & 0x)
+
 #define DRAMTIMING0_CFG_TCL(x) \
((x) & 0x7F)
 
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 12/16] ddr: altera: soc64: Clean up bit-shift by zero bit

2024-05-17 Thread tingting . meng

From: Teik Heng Chong 

Clean up bit-shift by zero bit

Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 drivers/ddr/altera/sdram_soc64.h | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr/altera/sdram_soc64.h
index 02019ac9e5..add7df01a5 100644
--- a/drivers/ddr/altera/sdram_soc64.h
+++ b/drivers/ddr/altera/sdram_soc64.h
@@ -92,7 +92,7 @@ struct altera_sdram_plat {
 #define NIOSRESERVED2  0x118
 
 #define DRAMADDRW_CFG_COL_ADDR_WIDTH(x)\
-   (((x) >> 0) & 0x1F)
+   ((x) & 0x1F)
 #define DRAMADDRW_CFG_ROW_ADDR_WIDTH(x)\
(((x) >> 5) & 0x1F)
 #define DRAMADDRW_CFG_BANK_ADDR_WIDTH(x)   \
@@ -103,7 +103,7 @@ struct altera_sdram_plat {
(((x) >> 16) & 0x7)
 
 #define CTRLCFG0_CFG_MEMTYPE(x)\
-   (((x) >> 0) & 0xF)
+   ((x) & 0xF)
 #define CTRLCFG0_CFG_DIMM_TYPE(x)  \
(((x) >> 4) & 0x7)
 #define CTRLCFG0_CFG_AC_POS(x) \
@@ -112,17 +112,17 @@ struct altera_sdram_plat {
(((x) >> 9) & 0x1F)
 
 #define CTRLCFG1_CFG_DBC3_BURST_LEN(x) \
-   (((x) >> 0) & 0x1F)
+   ((x) & 0x1F)
 #define CTRLCFG1_CFG_ADDR_ORDER(x) \
(((x) >> 5) & 0x3)
 #define CTRLCFG1_CFG_CTRL_EN_ECC(x)\
(((x) >> 7) & 0x1)
 
 #define DRAMTIMING0_CFG_TCL(x) \
-   (((x) >> 0) & 0x7F)
+   ((x) & 0x7F)
 
 #define CALTIMING0_CFG_ACT_TO_RDWR(x)  \
-   (((x) >> 0) & 0x3F)
+   ((x) & 0x3F)
 #define CALTIMING0_CFG_ACT_TO_PCH(x)   \
(((x) >> 6) & 0x3F)
 #define CALTIMING0_CFG_ACT_TO_ACT(x)   \
@@ -131,7 +131,7 @@ struct altera_sdram_plat {
(((x) >> 18) & 0x3F)
 
 #define CALTIMING1_CFG_RD_TO_RD(x) \
-   (((x) >> 0) & 0x3F)
+   ((x) & 0x3F)
 #define CALTIMING1_CFG_RD_TO_RD_DC(x)  \
(((x) >> 6) & 0x3F)
 #define CALTIMING1_CFG_RD_TO_RD_DB(x)  \
@@ -142,7 +142,7 @@ struct altera_sdram_plat {
(((x) >> 24) & 0x3F)
 
 #define CALTIMING2_CFG_RD_TO_WR_DB(x)  \
-   (((x) >> 0) & 0x3F)
+   ((x) & 0x3F)
 #define CALTIMING2_CFG_RD_TO_WR_PCH(x) \
(((x) >> 6) & 0x3F)
 #define CALTIMING2_CFG_RD_AP_TO_VALID(x)   \
@@ -153,7 +153,7 @@ struct altera_sdram_plat {
(((x) >> 24) & 0x3F)
 
 #define CALTIMING3_CFG_WR_TO_WR_DB(x)  \
-   (((x) >> 0) & 0x3F)
+   ((x) & 0x3F)
 #define CALTIMING3_CFG_WR_TO_RD(x) \
(((x) >> 6) & 0x3F)
 #define CALTIMING3_CFG_WR_TO_RD_DC(x)  \
@@ -164,7 +164,7 @@ struct altera_sdram_plat {
(((x) >> 24) & 0x3F)
 
 #define CALTIMING4_CFG_WR_AP_TO_VALID(x)   \
-   (((x) >> 0) & 0x3F)
+   ((x) & 0x3F)
 #define CALTIMING4_CFG_PCH_TO_VALID(x) \
(((x) >> 6) & 0x3F)
 #define CALTIMING4_CFG_PCH_ALL_TO_VALID(x) \
@@ -175,7 +175,7 @@ struct altera_sdram_plat {
(((x) >> 26) & 0x3F)
 
 #define CALTIMING9_CFG_4_ACT_TO_ACT(x) \
-   (((x) >> 0) & 0xFF)
+   ((x) & 0xFF)
 
 /* Firewall DDR scheduler MPFE */
 #define FW_HMC_ADAPTOR_REG_ADDR0xf8020004
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 11/16] ddr: altera: soc64: Restructure SDRAM firewall function

2024-05-17 Thread tingting . meng

From: Sin Hui Kho 

Restructure SDRAM firewall function. Move the non-F2SDRAM firewall
configuration to an individual function, in preparation to support
F2SDRAM firewall configuration.

Signed-off-by: Sin Hui Kho 
Signed-off-by: Tingting Meng 
---
 drivers/ddr/altera/sdram_soc64.c | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index a0cc9be25e..8f2085f3a0 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -253,7 +253,7 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat 
*plat)
return size;
 }
 
-void sdram_set_firewall(struct bd_info *bd)
+static void sdram_set_firewall_non_f2sdram(struct bd_info *bd)
 {
u32 i;
phys_size_t value;
@@ -289,7 +289,7 @@ void sdram_set_firewall(struct bd_info *bd)
  FW_MPU_DDR_SCR_NONMPUREGION0ADDR_BASEEXT +
  (i * 4 * sizeof(u32)));
 
-   /* Setting non-secure MPU limit and limit extexded */
+   /* Setting non-secure MPU limit and limit extended */
value = bd->bi_dram[i].start + bd->bi_dram[i].size - 1;
 
lower = lower_32_bits(value);
@@ -302,7 +302,7 @@ void sdram_set_firewall(struct bd_info *bd)
  FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMITEXT +
  (i * 4 * sizeof(u32)));
 
-   /* Setting non-secure Non-MPU limit and limit extexded */
+   /* Setting non-secure Non-MPU limit and limit extended */
FW_MPU_DDR_SCR_WRITEL(lower,
  FW_MPU_DDR_SCR_NONMPUREGION0ADDR_LIMIT +
  (i * 4 * sizeof(u32)));
@@ -315,6 +315,11 @@ void sdram_set_firewall(struct bd_info *bd)
}
 }
 
+void sdram_set_firewall(struct bd_info *bd)
+{
+   sdram_set_firewall_non_f2sdram(bd);
+}
+
 static int altera_sdram_of_to_plat(struct udevice *dev)
 {
struct altera_sdram_plat *plat = dev_get_plat(dev);
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 10/16] ddr: altera: Add DDR driver for Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Wan Yee Lau 

This is for new platform enablement for Agilex7 M-series.
Add DDR driver for Agilex7 M-series. This driver is designed to support
DDR and HBM memory. The official HBM handoff is not ready yet, therefore
hardcoded handoff is used for HBM driver validation on mUDV board.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 .../include/mach/base_addr_soc64.h|   6 +-
 .../include/mach/system_manager_soc64.h   |   7 +-
 drivers/ddr/altera/Makefile   |   3 +-
 drivers/ddr/altera/sdram_agilex7m.c   | 527 ++
 drivers/ddr/altera/sdram_soc64.c  |  15 +-
 drivers/ddr/altera/sdram_soc64.h  |  15 +-
 6 files changed, 565 insertions(+), 8 deletions(-)
 create mode 100644 drivers/ddr/altera/sdram_agilex7m.c

diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h 
b/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h
index 65721098b2..1f935fcdec 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h
@@ -45,12 +45,15 @@
 #define SOCFPGA_SDR_SCHEDULER_ADDRESS  0xf8000400
 #define SOCFPGA_HMC_MMR_IO48_ADDRESS   0xf801
 #define SOCFPGA_SDR_ADDRESS0xf8011000
+#define SOCFPGA_FW_MPFE_SCR_ADDRESS0xf802
 #if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) || \
-   IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
+   IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X) || \
+   IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
 #define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020200
 #else
 #define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020100
 #endif
+#define SOCFPGA_F2SDRAM_MGR_ADDRESS0xf8024000
 #define SOCFPGA_SMMU_ADDRESS   0xfa00
 #define SOCFPGA_MAILBOX_ADDRESS0xffa3
 #define SOCFPGA_UART0_ADDRESS  0xffc02000
@@ -74,6 +77,7 @@
 #define SOCFPGA_FIREWALL_SOC2FPGA  0xffd21200
 #define SOCFPGA_FIREWALL_LWSOC2FPGA0xffd21300
 #define SOCFPGA_FIREWALL_TCU   0xffd21400
+#define SOCFPGA_FIREWALL_PRIV_MEMORYMAP_PRIV   0xffd24800
 #define SOCFPGA_DMANONSECURE_ADDRESS   0xffda
 #define SOCFPGA_DMASECURE_ADDRESS  0xffda1000
 #define SOCFPGA_OCRAM_ADDRESS  0xffe0
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h 
b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
index a8009664fe..815bdf8ce1 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * Copyright (C) 2019-2021 Intel Corporation 
+ * Copyright (C) 2019-2024 Intel Corporation 
  */
 
 #ifndef _SYSTEM_MANAGER_SOC64_H_
@@ -103,6 +103,11 @@ void populate_sysmgr_pinmux(void);
 #define ALT_SYSMGR_SCRATCH_REG_0_DDR_RESET_TYPE_MASK   (BIT(29) | BIT(28))
 #define ALT_SYSMGR_SCRATCH_REG_0_DDR_RESET_TYPE_SHIFT  28
 
+#define ALT_SYSMGR_SCRATCH_REG_8_DDR_DBE_MASK  BIT(31)
+#define ALT_SYSMGR_SCRATCH_REG_8_DDR_PROGRESS_MASK BIT(30)
+#define ALT_SYSMGR_SCRATCH_REG_8_OCRAM_DBE_MASKBIT(29)
+#define ALT_SYSMGR_SCRATCH_REG_8_IO96B_HPS_MASKGENMASK(28, 27)
+
 #define SYSMGR_SDMMC   SYSMGR_SOC64_SDMMC
 
 #define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUXBIT(0)
diff --git a/drivers/ddr/altera/Makefile b/drivers/ddr/altera/Makefile
index 9fa5d85a27..1dac088b39 100644
--- a/drivers/ddr/altera/Makefile
+++ b/drivers/ddr/altera/Makefile
@@ -4,7 +4,7 @@
 # Wolfgang Denk, DENX Software Engineering, w...@denx.de.
 #
 # (C) Copyright 2010, Thomas Chou 
-# Copyright (C) 2014-2021 Altera Corporation 
+# Copyright (C) 2014-2024 Altera Corporation 
 
 ifdef CONFIG_$(SPL_)ALTERA_SDRAM
 obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram_gen5.o sequencer.o
@@ -12,4 +12,5 @@ obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += sdram_arria10.o
 obj-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += sdram_soc64.o sdram_s10.o
 obj-$(CONFIG_TARGET_SOCFPGA_AGILEX) += sdram_soc64.o sdram_agilex.o
 obj-$(CONFIG_TARGET_SOCFPGA_N5X) += sdram_soc64.o sdram_n5x.o
+obj-$(CONFIG_TARGET_SOCFPGA_AGILEX7M) += sdram_soc64.o sdram_agilex7m.o 
iossm_mailbox.o uibssm_mailbox.o
 endif
diff --git a/drivers/ddr/altera/sdram_agilex7m.c 
b/drivers/ddr/altera/sdram_agilex7m.c
new file mode 100644
index 00..4d585501e6
--- /dev/null
+++ b/drivers/ddr/altera/sdram_agilex7m.c
@@ -0,0 +1,527 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Intel Corporation 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "iossm_mailbox.h"
+#include "uibssm_mailbox.h"
+#include "sdram_soc64.h"
+
+/* NOCPLL register */
+#define SYSMGR_HMC_CLK 0xB4
+#define SYSMGR_HMC_CLK_NOCPLL  BIT(8)
+
+/* MPFE NOC registers */
+#define F2SDRAM_SIDEBAND_FLAGOUTSET0

[Agilex7 M-series Platform Enablement v1 09/16] ddr: altera: Add uibssm mailbox for Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Teik Heng Chong 

Add uibssm mailbox driver for Agilex7 M-series. HPS will interact with UIB
and HBM subsystem through software defined mailbox interface.
HPS can retrieve memory interface calibration status, UIB configuration,
memory interfae configuration, trigger calibration and etc with the list of
supported mailbox command type and opcode.

Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 drivers/ddr/altera/uibssm_mailbox.c | 311 
 drivers/ddr/altera/uibssm_mailbox.h | 117 +++
 2 files changed, 428 insertions(+)
 create mode 100644 drivers/ddr/altera/uibssm_mailbox.c
 create mode 100644 drivers/ddr/altera/uibssm_mailbox.h

diff --git a/drivers/ddr/altera/uibssm_mailbox.c 
b/drivers/ddr/altera/uibssm_mailbox.c
new file mode 100644
index 00..a6e2a5f44b
--- /dev/null
+++ b/drivers/ddr/altera/uibssm_mailbox.c
@@ -0,0 +1,311 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Intel Corporation 
+ */
+#include 
+#include 
+#include 
+#include 
+#include "uibssm_mailbox.h"
+
+#define MAX_RETRIES 3
+
+int uib_bist_mem_init_start(struct uib_info *uib_ctrl)
+{
+   struct uib_mb_resp usr_resp;
+   bool bist_start = false;
+   bool bist_success = false;
+   u32 start;
+
+   /*
+* Full memory initialization BIST performed on all UIB channels
+* start memory initialization BIST on full memory address
+*/
+   uib_mb_req(uib_ctrl->uib[0].uib_csr_addr,
+  UIB_CMD_TRIG_CONTROLLER_OP,
+  UIB_BIST_MEM_INIT_START,
+  UIB_BIST_FULL_MEM, _resp);
+
+   bist_start = UIBSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status) &
+   UIB_BIST_INITIATE_PASS;
+   if (!bist_start) {
+   printf("%s: Failed to initialized memory on UIB\n", __func__);
+
+   return -EINVAL;
+   }
+
+   /* Polling for the initiated memory initialization BIST status */
+   start = get_timer(0);
+   while (!bist_success) {
+   /*
+* cmd_param_0 is not used in BIST status request,
+* hence set the value to 0
+*/
+   uib_mb_req(uib_ctrl->uib[0].uib_csr_addr,
+  UIB_CMD_TRIG_CONTROLLER_OP,
+  UIB_BIST_MEM_INIT_STATUS,
+  0, _resp);
+
+   bist_success = 
UIBSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status) & BIT(0);
+   if (!bist_success && (get_timer(start) > TIMEOUT)) {
+   printf("%s: Timeout initialize memory on UIB\n", 
__func__);
+
+   return -ETIMEDOUT;
+   }
+
+   udelay(1);
+   }
+
+   debug("%s: Memory initialized successfully on UIB\n", __func__);
+
+   return 0;
+}
+
+int uib_cal_status(phys_addr_t addr)
+{
+   int ret = 0;
+   phys_addr_t status_addr = addr + UIB_R_INITSTS_OFFSET;
+
+   /* Ensure calibration completed */
+   ret = wait_for_bit_le32((const void *)status_addr, 
UIB_R_INITSTS_INITSTS_PASS, true,
+   TIMEOUT, false);
+   if (ret)
+   printf("%s: HBM calibration UIB instance 0x%llx timeout\n", 
__func__, status_addr);
+
+   return ret;
+}
+
+void uib_init_mem_cal(struct uib_info *uib_ctrl)
+{
+   int i, ret;
+
+   if (!uib_ctrl->num_instance) {
+   uib_ctrl->overall_cal_status = false;
+   } else {
+   uib_ctrl->overall_cal_status = true;
+
+   /* Check initial calibration status for the assigned UIB */
+   for (i = 0; i < uib_ctrl->num_instance; i++) {
+   ret = uib_cal_status(uib_ctrl->uib[i].uib_csr_addr);
+   if (ret) {
+   uib_ctrl->uib[i].cal_status = false;
+   uib_ctrl->overall_cal_status = false;
+
+   printf("%s: Initial HBM calibration UIB_%d 
failed\n", __func__, i);
+   break;
+   }
+
+   uib_ctrl->uib[i].cal_status = true;
+
+   debug("%s: Initial HBM calibration UIB_%d succeed\n", 
__func__, i);
+   }
+   }
+}
+
+/* Trying 3 times re-calibration if initial calibration failed */
+void uib_trig_mem_cal(struct uib_info *uib_ctrl)
+{
+   int i, j, cal_stat;
+
+   if (!uib_ctrl->num_instance) {
+   uib_ctrl->overall_cal_status = false;
+   } else {
+   uib_ctrl->overall_cal_status = true;
+
+   for (i = 0; i < uib_ctrl->num_instance; i++) {
+   uib_ctrl->uib[i].cal_status = false;
+
+   /* Initiate Re-calibration */
+   for (j = 0; j < MAX_RETRIES; j++) {
+   clrsetbits_le32(uib_ctrl->uib[i].uib_csr_addr +
+

[Agilex7 M-series Platform Enablement v1 08/16] ddr: altera: Add iossm mailbox for Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Wan Yee Lau 

Add iossm mailbox driver for Agilex7 M-series. HPS will interact with IO96B
and DDR subsystem through software defined mailbox interface.
HPS can retrieve memory interface calibration status, IO96B configuration,
memory interfae configuration, trigger calibration and etc with the list of
supported mailbox command type and opcode.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 drivers/ddr/altera/iossm_mailbox.c | 637 +
 drivers/ddr/altera/iossm_mailbox.h | 182 +
 2 files changed, 819 insertions(+)
 create mode 100644 drivers/ddr/altera/iossm_mailbox.c
 create mode 100644 drivers/ddr/altera/iossm_mailbox.h

diff --git a/drivers/ddr/altera/iossm_mailbox.c 
b/drivers/ddr/altera/iossm_mailbox.c
new file mode 100644
index 00..f84a3a070d
--- /dev/null
+++ b/drivers/ddr/altera/iossm_mailbox.c
@@ -0,0 +1,637 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Intel Corporation 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "iossm_mailbox.h"
+
+#define ECC_INTSTATUS_SERR SOCFPGA_SYSMGR_ADDRESS + 0x9C
+#define ECC_INISTATUS_DERR SOCFPGA_SYSMGR_ADDRESS + 0xA0
+#define DDR_CSR_CLKGEN_LOCKED_IO96B0_MASK BIT(16)
+#define DDR_CSR_CLKGEN_LOCKED_IO96B1_MASK BIT(17)
+
+#define DDR_CSR_CLKGEN_LOCKED_IO96B_MASK(x)(i == 0 ? 
DDR_CSR_CLKGEN_LOCKED_IO96B0_MASK : \
+   
DDR_CSR_CLKGEN_LOCKED_IO96B1_MASK)
+
+#define IO96B_MB_REQ_SETUP(v, w, x, y, z)  usr_req.ip_type = v; \
+   usr_req.ip_id = w; \
+   usr_req.usr_cmd_type = x; \
+   usr_req.usr_cmd_opcode = y; \
+   usr_req.cmd_param[0] = z; \
+   for (n = 1; n < NUM_CMD_PARAM; 
n++) \
+   usr_req.cmd_param[n] = 0
+#define MAX_RETRY_COUNT3
+
+#define IO96B0_PLL_A_MASK  BIT(0)
+#define IO96B0_PLL_B_MASK  BIT(1)
+#define IO96B1_PLL_A_MASK  BIT(2)
+#define IO96B1_PLL_B_MASK  BIT(3)
+
+/* supported DDR type list */
+static const char *ddr_type_list[7] = {
+   "DDR4", "DDR5", "DDR5_RDIMM", "LPDDR4", "LPDDR5", "QDRIV", 
"UNKNOWN"
+};
+
+static int is_ddr_csr_clkgen_locked(u8 io96b_pll)
+{
+   int ret = 0;
+
+   if (FIELD_GET(IO96B0_PLL_A_MASK, io96b_pll)) {
+   ret = wait_for_bit_le32((const void *)(ECC_INTSTATUS_SERR),
+   DDR_CSR_CLKGEN_LOCKED_IO96B0_MASK, 
true, TIMEOUT, false);
+
+   if (ret) {
+   debug("%s: ddr csr io96b_0 clkgenA locked is 
timeout\n", __func__);
+   goto err;
+   }
+   }
+
+   if (FIELD_GET(IO96B0_PLL_B_MASK, io96b_pll)) {
+   ret = wait_for_bit_le32((const void *)(ECC_INISTATUS_DERR),
+   DDR_CSR_CLKGEN_LOCKED_IO96B0_MASK, 
true, TIMEOUT, false);
+
+   if (ret) {
+   debug("%s: ddr csr io96b_0 clkgenB locked is 
timeout\n", __func__);
+   goto err;
+   }
+   }
+
+   if (FIELD_GET(IO96B1_PLL_A_MASK, io96b_pll)) {
+   ret = wait_for_bit_le32((const void *)(ECC_INTSTATUS_SERR),
+   DDR_CSR_CLKGEN_LOCKED_IO96B1_MASK, 
true, TIMEOUT, false);
+
+   if (ret) {
+   debug("%s: ddr csr io96b_1 clkgenA locked is 
timeout\n", __func__);
+   goto err;
+   }
+   }
+
+   if (FIELD_GET(IO96B1_PLL_B_MASK, io96b_pll)) {
+   ret = wait_for_bit_le32((const void *)(ECC_INISTATUS_DERR),
+   DDR_CSR_CLKGEN_LOCKED_IO96B1_MASK, 
true, TIMEOUT, false);
+
+   if (ret) {
+   debug("%s: ddr csr io96b_1 clkgenB locked is 
timeout\n", __func__);
+   goto err;
+   }
+   }
+
+err:
+   return ret;
+}
+
+/* Mailbox request function
+ * This function will send the request to IOSSM mailbox and wait for response 
return
+ *
+ * @io96b_csr_addr: CSR address for the target IO96B
+ * @req:Structure contain command request for IOSSM mailbox command
+ * @resp_data_len:  User desire extra response data fields other than
+ * CMD_RESPONSE_DATA_SHORT field on 
CMD_RESPONSE_STATUS
+ * @resp:   Structure contain responses returned from the requested 
IOSSM
+ * mailbox command
+ */
+int io96b_mb_req(phys_addr_t io96b_csr_addr, struct io96b_mb_req req,
+u32 resp_data_len, struct io96b_mb_resp *resp)
+{
+   int i, ret;
+   u32 cmd_req, cmd_resp;
+
+   /* Initialized zeros for responses

[Agilex7 M-series Platform Enablement v1 07/16] clk: altera: Add clock support for Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Teik Heng Chong 

Agilex7 M-series reuse the clock driver from Agilex.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 +-
 arch/arm/mach-socfpga/misc.c   | 2 +-
 drivers/clk/altera/Makefile| 1 +
 3 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h 
b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index 6c9d32b9dd..77d97193f5 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -26,7 +26,7 @@ int cm_set_qspi_controller_clk_hz(u32 clk_hz);
 #include 
 #elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
 #include 
-#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) || 
IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
 #include 
 #elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
 #include 
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 79f7887519..5537445e10 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -252,7 +252,7 @@ void socfpga_get_managers_addr(void)
if (ret)
hang();
 
-#ifdef CONFIG_TARGET_SOCFPGA_AGILEX
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) || 
IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
ret = socfpga_get_base_addr("intel,agilex-clkmgr",
_clkmgr_base);
 #elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
diff --git a/drivers/clk/altera/Makefile b/drivers/clk/altera/Makefile
index 61ffa4179a..858f828e53 100644
--- a/drivers/clk/altera/Makefile
+++ b/drivers/clk/altera/Makefile
@@ -4,6 +4,7 @@
 #
 
 obj-$(CONFIG_TARGET_SOCFPGA_AGILEX) += clk-agilex.o
+obj-$(CONFIG_TARGET_SOCFPGA_AGILEX7M) += clk-agilex.o
 obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += clk-arria10.o
 obj-$(CONFIG_TARGET_SOCFPGA_N5X) += clk-n5x.o
 obj-$(CONFIG_TARGET_SOCFPGA_N5X) += clk-mem-n5x.o
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 06/16] include: configs: soc64: Use CONFIG_SPL_ATF to differentiate bootfile

2024-05-17 Thread tingting . meng

From: Siew Chin Lim 

ATF boot flow (SPL->ATF->U-Boot Proper->OS) boot to OS via kernel.itb file
using bootm command.

Change to use CONFIG_SPL_ATF to differentiate the bootfile of default
environment variable. We shouldn't use CONFIG_FIT because it is enabled
by default for U-Boot Proper.

Signed-off-by: Siew Chin Lim 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 arch/arm/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a0842e1933..56e190adf6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -21,6 +21,9 @@ config ARM64_CRC32
  not be present on all ARMv8.0, but is always present on ARMv8.1 and
  newer.
 
+config BOOTFILE
+   default kernel.itb if SPL_ATF && TARGET_SOCFPGA_SOC64
+
 config COUNTER_FREQUENCY
int "Timer clock frequency"
depends on ARM64 || CPU_V7A
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 05/16] include: configs: Add config header file for Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Wan Yee Lau 

Add config header file for new platform Agilex7 M-series.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 .../{socfpga_agilex5_socdk.h => socfpga_agilex7m_socdk.h}   | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
 copy include/configs/{socfpga_agilex5_socdk.h => socfpga_agilex7m_socdk.h} 
(55%)

diff --git a/include/configs/socfpga_agilex5_socdk.h 
b/include/configs/socfpga_agilex7m_socdk.h
similarity index 55%
copy from include/configs/socfpga_agilex5_socdk.h
copy to include/configs/socfpga_agilex7m_socdk.h
index b5b5bd767f..433556804e 100644
--- a/include/configs/socfpga_agilex5_socdk.h
+++ b/include/configs/socfpga_agilex7m_socdk.h
@@ -4,9 +4,9 @@
  *
  */
 
-#ifndef __CONFIG_SOCFGPA_AGILEX5_H__
-#define __CONFIG_SOCFGPA_AGILEX5_H__
+#ifndef __CONFIG_SOCFGPA_AGILEX7M_H__
+#define __CONFIG_SOCFGPA_AGILEX7M_H__
 
 #include 
 
-#endif /* __CONFIG_SOCFGPA_AGILEX5_H__ */
+#endif /* __CONFIG_SOCFGPA_AGILEX7M_H__ */
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 04/16] arch: arm: mach-socfpga: Update handoff settings for Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Wan Yee Lau 

Handoff settings updated for new platform Agilex7 M-series.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h 
b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
index d839f28841..747016b436 100644
--- a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
@@ -28,10 +28,20 @@
 #define SOC64_HANDOFF_OFFSET_DATA  0x10
 #define SOC64_HANDOFF_SIZE 4096
 
-#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
-   IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX)
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_SOC64) || \
+   IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
 #define SOC64_HANDOFF_BASE 0xFFE3F000
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
+#define SOC64_HANDOFF_MISC (SOC64_HANDOFF_BASE + 0x62C)
+/* DDR handoff */
+#define SOC64_HANDOFF_MAGIC_DDR0x5344524D
+#define SOC64_HANDOFF_DDR_BASE (SOC64_HANDOFF_BASE + 0x610)
+#define SOC64_HANDOFF_DDR_LEN  2
+#define SOC64_HANDOFF_DDR_INTERLEAVING_MODE_MASK   BIT(0)
+#define SOC64_HANDOFF_DDR_MEMORY_TYPE_MASK BIT(0)
+#else
 #define SOC64_HANDOFF_MISC (SOC64_HANDOFF_BASE + 0x610)
+#endif
 #elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
 #define SOC64_HANDOFF_BASE 0x0007F000
 #elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 03/16] arch: arm: mach-socfpga: Improve help info.

2024-05-17 Thread tingting . meng

From: Teik Heng Chong 

To improve help info for bridge enable/disable command.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 arch/arm/mach-socfpga/misc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 80ad087034..79f7887519 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -210,8 +210,8 @@ static int do_bridge(struct cmd_tbl *cmdtp, int flag, int 
argc,
 
 U_BOOT_CMD(bridge, 3, 1, do_bridge,
   "SoCFPGA HPS FPGA bridge control",
-  "enable [mask] - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA 
bridges\n"
-  "bridge disable [mask] - Enable HPS-to-FPGA, FPGA-to-HPS, 
LWHPS-to-FPGA bridges\n"
+  "enable [mask] - Enable HPS-to-FPGA (Bit 0), LWHPS-to-FPGA (Bit 1), 
FPGA-to-HPS (Bit 2) bridges \n"
+  "bridge disable [mask] - Disable HPS-to-FPGA (Bit 0), LWHPS-to-FPGA 
(Bit 1), FPGA-to-HPS (Bit 2) bridges\n"
   ""
 );
 
-- 
2.25.1

[Agilex7 M-series Platform Enablement v1 02/16] arch: arm: mach-socfpga: Add Agilex7 M-series mach-socfgpa enablement

2024-05-17 Thread tingting . meng

From: Wan Yee Lau 

Add platform related files for new platform Agilex7 M-series.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 arch/arm/mach-socfpga/include/mach/misc.h |  3 +-
 .../{spl_agilex.c => spl_agilex7m.c}  | 45 ---
 arch/arm/mach-socfpga/wrap_handoff_soc64.c|  4 ++
 board/intel/agilex7m-socdk/MAINTAINERS|  7 +++
 board/intel/agilex7m-socdk/socfpga.c  |  4 ++
 5 files changed, 45 insertions(+), 18 deletions(-)
 copy arch/arm/mach-socfpga/{spl_agilex.c => spl_agilex7m.c} (68%)
 create mode 100644 board/intel/agilex7m-socdk/MAINTAINERS
 create mode 100644 board/intel/agilex7m-socdk/socfpga.c

diff --git a/arch/arm/mach-socfpga/include/mach/misc.h 
b/arch/arm/mach-socfpga/include/mach/misc.h
index 8460acb00d..e271d2855f 100644
--- a/arch/arm/mach-socfpga/include/mach/misc.h
+++ b/arch/arm/mach-socfpga/include/mach/misc.h
@@ -40,7 +40,8 @@ void socfpga_sdram_remap_zero(void);
 #endif
 
 #if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
-   defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+   defined(CONFIG_TARGET_SOCFPGA_AGILEX) || \
+   defined(CONFIG_TARGET_SOCFPGA_AGILEX7M)
 int is_fpga_config_ready(void);
 #endif
 
diff --git a/arch/arm/mach-socfpga/spl_agilex.c 
b/arch/arm/mach-socfpga/spl_agilex7m.c
similarity index 68%
copy from arch/arm/mach-socfpga/spl_agilex.c
copy to arch/arm/mach-socfpga/spl_agilex7m.c
index ee5a9dc1e2..ee41db8884 100644
--- a/arch/arm/mach-socfpga/spl_agilex.c
+++ b/arch/arm/mach-socfpga/spl_agilex7m.c
@@ -1,26 +1,25 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (C) 2019 Intel Corporation 
- *
+ * Copyright (C) 2024 Intel Corporation 
  */
 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
+#include 
+#include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -40,13 +39,6 @@ void board_init_f(ulong dummy)
writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
   socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG);
 
-#ifdef CONFIG_HW_WATCHDOG
-   /* Enable watchdog before initializing the HW */
-   socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
-   socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
-   hw_watchdog_init();
-#endif
-
/* ensure all processors are not released prior Linux boot */
writeq(0, CPU_RELEASE_ADDR);
 
@@ -60,11 +52,30 @@ void board_init_f(ulong dummy)
hang();
}
 
+   /*
+* Enable watchdog as early as possible before initializing other
+* component. Watchdog need to be enabled after clock driver because
+* it will retrieve the clock frequency from clock driver.
+*/
+   if (CONFIG_IS_ENABLED(WDT))
+   initr_watchdog();
+
preloader_console_init();
print_reset_info();
cm_print_clock_quick_summary();
 
-   firewall_setup();
+   ret = uclass_get_device_by_name(UCLASS_NOP, 
"socfpga-system-mgr-firewall", );
+   if (ret) {
+   printf("System manager firewall configuration failed: %d\n", 
ret);
+   hang();
+   }
+
+   ret = uclass_get_device_by_name(UCLASS_NOP, 
"socfpga-l3interconnect-firewall", );
+   if (ret) {
+   printf("L3 interconnect firewall configuration failed: %d\n", 
ret);
+   hang();
+   }
+
ret = uclass_get_device(UCLASS_CACHE, 0, );
if (ret) {
debug("CCU init failed: %d\n", ret);
diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c 
b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
index 6aa9bb26b4..8c06b3d59e 100644
--- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
+++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
@@ -39,6 +39,10 @@ static enum endianness check_endianness(u32 handoff)
case SOC64_HANDOFF_DDR_PHY_INIT_ENGINE_MAGIC:
debug("%s: PHY engine handoff data\n", __func__);
return LITTLE_ENDIAN;
+#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
+   case SOC64_HANDOFF_MAGIC_DDR:
+   debug("%s: SOC64_HANDOFF_MAGIC_DDR\n", __func__);
+   return BIG_ENDIAN;
 #endif
default:
debug("%s: Unknown endianness!!\n", __func__);
diff --git a/board/intel/agilex7m-socdk/MAINTAINERS 
b/board/intel/agilex7m-socdk/MAINTAINERS
new file mode 100644
index 00..feb2916488
--- /dev/null
+++ b/board/intel/agilex7m-socdk/MAINTAINERS
@@ -0,0 +1,7 @@
+SOCFPGA BOARD
+M: Tien Fong Chee 
+M: Teik Heng Chong 
+S: Maintained
+F: board/intel/agilex7m-socdk/
+F: include/configs/socfpga_agilex7m_socdk.h
+F: configs/socfpga_agilex7m_sdmmc_defconfig
diff --git a/board/intel/agilex7m-socdk/socfpga.c 
b/board/intel/agilex7m-socdk/socfpga.c
new file mode 100644
index 00..52921d90aa
--- /dev/null
+++ b/board/intel/agilex7m-socdk/socfpga.c

[Agilex7 M-series Platform Enablement v1 01/16] arch: arm: dts: Add dts and dtsi for new platform Agilex7 M-series

2024-05-17 Thread tingting . meng

From: Wan Yee Lau 

Add Agilex7 M-series dtsi and dts for new platform Agilex7 M-series.

Signed-off-by: Wan Yee Lau 
Signed-off-by: Teik Heng Chong 
Signed-off-by: Tingting Meng 
---
 ...tsi => socfpga_agilex7m_socdk-u-boot.dtsi} |  37 -
 ...x_socdk.dts => socfpga_agilex7m_socdk.dts} |  66 +++--
 arch/arm/dts/socfpga_soc64_u-boot.dtsi| 127 ++
 3 files changed, 213 insertions(+), 17 deletions(-)
 copy arch/arm/dts/{socfpga_agilex_socdk-u-boot.dtsi => 
socfpga_agilex7m_socdk-u-boot.dtsi} (50%)
 copy arch/arm/dts/{socfpga_agilex_socdk.dts => socfpga_agilex7m_socdk.dts} 
(63%)
 create mode 100644 arch/arm/dts/socfpga_soc64_u-boot.dtsi

diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi 
b/arch/arm/dts/socfpga_agilex7m_socdk-u-boot.dtsi
similarity index 50%
copy from arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
copy to arch/arm/dts/socfpga_agilex7m_socdk-u-boot.dtsi
index 63df28e836..4369f0b545 100644
--- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_agilex7m_socdk-u-boot.dtsi
@@ -2,12 +2,18 @@
 /*
  * U-Boot additions
  *
- * Copyright (C) 2019-2022 Intel Corporation 
+ * Copyright (C) 2024 Intel Corporation 
  */
 
 #include "socfpga_agilex-u-boot.dtsi"
+#include "socfpga_soc64_u-boot.dtsi"
 
 /{
+   chosen {
+   stdout-path = "serial0:115200n8";
+   u-boot,spl-boot-order = 
+   };
+
aliases {
spi0 = 
i2c0 = 
@@ -23,9 +29,7 @@
};
 
memory {
-   /* 8GB */
-   reg = <0 0x 0 0x8000>,
- <2 0x8000 1 0x8000>;
+   reg = <0 0x 0 0x8000>;
};
 };
 
@@ -34,22 +38,43 @@
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
bootph-all;
+   /delete-property/ cdns,read-delay;
 };
 
  {
status = "okay";
 };
 
+ {
+   status = "okay";
+   nand-bus-width = <16>;
+   bootph-all;
+};
+
  {
drvsel = <3>;
smplsel = <0>;
bootph-all;
 };
 
- {
-   status = "okay";
+ {
+   compatible = "intel,sdr-ctl-agilex7m";
+
+   reg = <0xf802 0x100>;
+};
+
+_l3interconnect_firewall {
+   soc_noc_fw_mpfe_csr_inst_0_mpfe_scr@f802 {
+   intel,offset-settings =
+   /* Disable MPFE firewall for SMMU */
+   <0x 0x00010101 0x00010101>;
+   };
 };
 
  {
bootph-all;
 };
+
+ {
+   /delete-node/ kernel;
+};
diff --git a/arch/arm/dts/socfpga_agilex_socdk.dts 
b/arch/arm/dts/socfpga_agilex7m_socdk.dts
similarity index 63%
copy from arch/arm/dts/socfpga_agilex_socdk.dts
copy to arch/arm/dts/socfpga_agilex7m_socdk.dts
index bcdeecc0e0..ba929b9c74 100644
--- a/arch/arm/dts/socfpga_agilex_socdk.dts
+++ b/arch/arm/dts/socfpga_agilex7m_socdk.dts
@@ -1,11 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (C) 2019, Intel Corporation
+ * Copyright (C) 2024, Intel Corporation
  */
 #include "socfpga_agilex.dtsi"
 
 / {
-   model = "SoCFPGA Agilex SoCDK";
+   model = "SoCFPGA Agilex7-M SoCDK";
 
aliases {
serial0 = 
@@ -14,10 +14,6 @@
ethernet2 = 
};
 
-   chosen {
-   stdout-path = "serial0:115200n8";
-   };
-
leds {
compatible = "gpio-leds";
hps0 {
@@ -85,6 +81,36 @@
};
 };
 
+ {
+   status = "okay";
+   phy-mode = "rgmii";
+   phy-handle = <>;
+
+   max-frame-size = <3800>;
+
+   mdio2 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "snps,dwmac-mdio";
+   phy2: ethernet-phy@2 {
+   reg = <4>;
+
+   txd0-skew-ps = <0>; /* -420ps */
+   txd1-skew-ps = <0>; /* -420ps */
+   txd2-skew-ps = <0>; /* -420ps */
+   txd3-skew-ps = <0>; /* -420ps */
+   rxd0-skew-ps = <420>; /* 0ps */
+   rxd1-skew-ps = <420>; /* 0ps */
+   rxd2-skew-ps = <420>; /* 0ps */
+   rxd3-skew-ps = <420>; /* 0ps */
+   txen-skew-ps = <0>; /* -420ps */
+   txc-skew-ps = <1860>; /* 960ps */
+   rxdv-skew-ps = <420>; /* 0ps */
+   rxc-skew-ps = <1680>; /* 780ps */
+   };
+   };
+};
+
  {
status = "okay";
cap-sd-highspeed;
@@ -128,13 +154,31 @@
#size-cells = <1>;
 
qspi_boot: partition@0 {
-   label = "Boot and fpga data";
-   reg = <0x0 0x034B>;
+   label = "u-boot";
+   reg = <0x0 0x0420>;
+   };
+
+   root: partition@420 {
+   label =

[Agilex7 M-series Platform Enablement v1 00/16]

2024-05-17 Thread tingting . meng

From: Tingting Meng 

Intel Agilex7 M-Series is the highest peformance FPGA targeted for compute and
memory-intensive application,this series is built using intel 7 process 
technology and expands upon I-Series device feature, offering in-package 
high bandwidth memory (HBM), memory interfaces for DDR5 SDRAM, and a hard memory
Network-on-Chip (NoC) to maximize memory bandwidth. The series of patches  
include 
adding clock driver, IOSSM mailbox driver, UIBSSM mailbox driver,
DDR driver and HBM driver needed for Agilex 7 M-Series platform enablement and
supports linux boot from SD card.
 
This series patches based on  master branch https://source.denx.de/u-boot/u-boot
 
Complete compilation check on different devices, ran checkpatch and tested on 
board


Siew Chin Lim (1):
  include: configs: soc64: Use CONFIG_SPL_ATF to differentiate bootfile

Sin Hui Kho (1):
  ddr: altera: soc64: Restructure SDRAM firewall function

Teik Heng Chong (5):
  arch: arm: mach-socfpga: Improve help info.
  clk: altera: Add clock support for Agilex7 M-series
  ddr: altera: Add uibssm mailbox for Agilex7 M-series
  ddr: altera: soc64: Clean up bit-shift by zero bit
  ddr: altera: soc64: Fix dram size calculation in clamshell mode

Wan Yee Lau (9):
  arch: arm: dts: Add dts and dtsi for new platform Agilex7 M-series
  arch: arm: mach-socfpga: Add Agilex7 M-series mach-socfgpa enablement
  arch: arm: mach-socfpga: Update handoff settings for Agilex7 M-series
  include: configs: Add config header file for Agilex7 M-series
  ddr: altera: Add iossm mailbox for Agilex7 M-series
  ddr: altera: Add DDR driver for Agilex7 M-series
  arch: arm: mach-socfpga: Update kconfig for new platform Agilex7
M-series
  arch: arm: dts: Update Makefile for new platform Agilex7 M-series
  configs: Add defconfig for Agilex7 M-series

 arch/arm/Kconfig  |   7 +-
 arch/arm/dts/Makefile |   1 +
 .../dts/socfpga_agilex7m_socdk-u-boot.dtsi|  80 +++
 arch/arm/dts/socfpga_agilex7m_socdk.dts   | 185 +
 arch/arm/dts/socfpga_soc64_u-boot.dtsi| 127 
 arch/arm/mach-socfpga/Kconfig |  19 +
 arch/arm/mach-socfpga/Makefile|  18 +
 .../include/mach/base_addr_soc64.h|   6 +-
 .../mach-socfpga/include/mach/clock_manager.h |   2 +-
 .../mach-socfpga/include/mach/handoff_soc64.h |  14 +-
 arch/arm/mach-socfpga/include/mach/misc.h |   3 +-
 .../include/mach/system_manager_soc64.h   |   7 +-
 arch/arm/mach-socfpga/misc.c  |   6 +-
 arch/arm/mach-socfpga/spl_agilex7m.c  |  98 +++
 arch/arm/mach-socfpga/wrap_handoff_soc64.c|   4 +
 board/intel/agilex7m-socdk/MAINTAINERS|   7 +
 board/intel/agilex7m-socdk/Makefile   |   7 +
 board/intel/agilex7m-socdk/socfpga.c  |   4 +
 configs/socfpga_agilex7m_sdmmc_defconfig  | 114 
 drivers/clk/altera/Makefile   |   1 +
 drivers/ddr/altera/Makefile   |   3 +-
 drivers/ddr/altera/iossm_mailbox.c| 637 ++
 drivers/ddr/altera/iossm_mailbox.h| 182 +
 drivers/ddr/altera/sdram_agilex7m.c   | 527 +++
 drivers/ddr/altera/sdram_soc64.c  |  42 +-
 drivers/ddr/altera/sdram_soc64.h  |  40 +-
 drivers/ddr/altera/uibssm_mailbox.c   | 311 +
 drivers/ddr/altera/uibssm_mailbox.h   | 117 
 include/configs/socfpga_agilex7m_socdk.h  |  12 +
 29 files changed, 2551 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_agilex7m_socdk-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex7m_socdk.dts
 create mode 100644 arch/arm/dts/socfpga_soc64_u-boot.dtsi
 create mode 100644 arch/arm/mach-socfpga/spl_agilex7m.c
 create mode 100644 board/intel/agilex7m-socdk/MAINTAINERS
 create mode 100644 board/intel/agilex7m-socdk/Makefile
 create mode 100644 board/intel/agilex7m-socdk/socfpga.c
 create mode 100644 configs/socfpga_agilex7m_sdmmc_defconfig
 create mode 100644 drivers/ddr/altera/iossm_mailbox.c
 create mode 100644 drivers/ddr/altera/iossm_mailbox.h
 create mode 100644 drivers/ddr/altera/sdram_agilex7m.c
 create mode 100644 drivers/ddr/altera/uibssm_mailbox.c
 create mode 100644 drivers/ddr/altera/uibssm_mailbox.h
 create mode 100644 include/configs/socfpga_agilex7m_socdk.h

-- 
2.25.1

Re: [PATCH v5 01/12] efi: Correct handling of frame buffer

2024-05-17 Thread Heinrich Schuchardt


On 11/19/23 20:11, Simon Glass wrote:

The efi_gop driver uses private fields from the video uclass to obtain a
pointer to the frame buffer. Use the platform data instead.

Check the VIDEO_COPY setting to determine which frame buffer to use. Once
the next stage is running (and making use of U-Boot's EFI boot services)
U-Boot does not handle copying from priv->fb to the hardware framebuffer,
so we must allow EFI to write directly to the hardware framebuffer.

We could provide a function to read this, but it seems better to just
document how it works. The original change ignored an explicit comment
in the video.h file ("Things that are private to the uclass: don't use
these in the driver") which is why this was missed when the VIDEO_COPY
feature was added.

Signed-off-by: Simon Glass 
Fixes: 8f661a5b662 ("efi_loader: gop: Expose fb when 32bpp")
Reviewed-by: Bin Meng #


Since this patch
a75cf70d23ac ("efi: Correct handling of frame buffer") the EFI block
image transfer is broken on the sandbox.

Build sandbox_defconfig with CONFIG_EFI_SELFTEST=y.

setenv efi_selftest block image transfer
bootefi selftest

A moving submarine should be shown.

Best regards

Heinrich


---

(no changes since v2)

Changes in v2:
- Rebase to -next
- Add some more comments to the header file
- Add fixes tag

  include/video.h  |  9 ++---
  lib/efi_loader/efi_gop.c | 12 +++-
  2 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/include/video.h b/include/video.h
index 5048116a3d57..4d8df9baaada 100644
--- a/include/video.h
+++ b/include/video.h
@@ -21,9 +21,12 @@ struct udevice;
   * @align: Frame-buffer alignment, indicating the memory boundary the frame
   *buffer should start on. If 0, 1MB is assumed
   * @size: Frame-buffer size, in bytes
- * @base: Base address of frame buffer, 0 if not yet known
- * @copy_base: Base address of a hardware copy of the frame buffer. See
- * CONFIG_VIDEO_COPY.
+ * @base: Base address of frame buffer, 0 if not yet known. If 
CONFIG_VIDEO_COPY
+ * is enabled, this is the software copy, so writes to this will not be
+ * visible until vidconsole_sync_copy() is called. If CONFIG_VIDEO_COPY is
+ * disabled, this is the hardware framebuffer.
+ * @copy_base: Base address of a hardware copy of the frame buffer. If
+ * CONFIG_VIDEO_COPY is disabled, this is not used.
   * @copy_size: Size of copy framebuffer, used if @size is 0
   * @hide_logo: Hide the logo (used for testing)
   */
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index 778b693f983a..a09db31eb465 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -10,6 +10,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 

@@ -467,10 +468,10 @@ efi_status_t efi_gop_register(void)
struct efi_gop_obj *gopobj;
u32 bpix, format, col, row;
u64 fb_base, fb_size;
-   void *fb;
efi_status_t ret;
struct udevice *vdev;
struct video_priv *priv;
+   struct video_uc_plat *plat;

/* We only support a single video output device for now */
if (uclass_first_device_err(UCLASS_VIDEO, )) {
@@ -483,9 +484,10 @@ efi_status_t efi_gop_register(void)
format = priv->format;
col = video_get_xsize(vdev);
row = video_get_ysize(vdev);
-   fb_base = (uintptr_t)priv->fb;
-   fb_size = priv->fb_size;
-   fb = priv->fb;
+
+   plat = dev_get_uclass_plat(vdev);
+   fb_base = IS_ENABLED(CONFIG_VIDEO_COPY) ? plat->copy_base : plat->base;
+   fb_size = plat->size;

switch (bpix) {
case VIDEO_BPP16:
@@ -547,7 +549,7 @@ efi_status_t efi_gop_register(void)
}
gopobj->info.pixels_per_scanline = col;
gopobj->bpix = bpix;
-   gopobj->fb = fb;
+   gopobj->fb = map_sysmem(fb_base, fb_size);

return EFI_SUCCESS;
  }

[PATCH RFC] doc: Document address spaces used by U-Boot

2024-05-17 Thread Jiaxun Yang

This serves as a reference for developers on how to handle
all those address spaces for U-Boot.

Signed-off-by: Jiaxun Yang 
---
Hi all,

I was trying to clear up long standing myth of virtual
address vs physical adddress mapping on MIPS by having
a clear division betweem virt and phys adddress everywhere.

In this process I would like to confirm my understanding
by writing a document and requesting comments from the
community.

Note that there are some sysmem APIs mentioned in the document
are not in U-Boot tree, namely ``sysmem_addr_t`` and sysmem_to_phys
co. I think they can help with annotating address spaces.

Please kindly comment on the design.

Thanks!
---
 doc/develop/address_spaces.rst | 73 ++
 doc/develop/index.rst  |  1 +
 2 files changed, 74 insertions(+)

diff --git a/doc/develop/address_spaces.rst b/doc/develop/address_spaces.rst
new file mode 100644
index ..05c4a1575f27
--- /dev/null
+++ b/doc/develop/address_spaces.rst
@@ -0,0 +1,73 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2024 Jiaxun Yang 
+
+Address Spaces
+==
+
+Introduction
+
+
+In U-Boot, we have three address spaces that are used to describe a memory
+address:
+
+- ``virt``: virtual address space
+- ``phys``: physical address space
+- ``sysmem``: system memory address space
+
+On most architectures, we maintain a 1:1:1 mapping between all three address,
+with the exception of MIPS and sandbox.
+
+There are many API misused in existing code base, this document is to clarify
+the usage of these address spaces and APIs. Hopefully it will help to reduce
+the confusion and porting effort.
+
+``virt``
+
+
+This is the address space that is directly used by U-Boot to access memory.
+Every pointer in U-Boot must in ``virt`` address space. to get a valid ``virt``
+address from any other address space, you must use relavant mapping functions
+to ensure it's being tracked. It is recomanded to use ``ulong`` or pointer 
types
+to store ``virt`` address.
+
+``phys``
+
+
+This is the address space that is used to describe the physical memory address.
+It's used to describe the physical memory address of a device, or the physical
+memory address of a memory region. Usual places you would see ``phys`` address
+are addresses comes from Device Tree and some memory related APIs. It is
+recommended to use ``fdt_addr_t`` or ``phys_addr_t`` to store ``phys`` address.
+
+Following APIs are availble to handle ``phys`` address:
+
+- ``map_physmem()``: Create mapping from physical address to virtual 
address
+- ``unmap_physmem()``: Remove mapping created by ``map_physmem()``
+- ``virt_to_phys()``: Find physical address mapping for a virtual address
+- ``ioremap()``: Create mapping for I/O memory region
+- ``iounmap()``: Remove mapping created by ``ioremap()``
+
+``sysmem``
+--
+
+This is the address space that is used by U-Boot internally to describe RAM
+address. It helps to abstract some architecture differences and provide a
+consistent way to managed RAM. Usual places you would see ``sysmem`` address
+are addresses comes from ``gd->bd->bi_dram[]``, addresses comes from ``LMB``
+addresses being used as memory related config optinos, and addresses being
+used as arguments to load commands. It is recommended to use ``sysmem_addr_t``
+to store ``sysmem`` address.
+
+It is further used by sandbox to simulate memory, and by MIPS to handle
+differences between ``virt`` and ``phys`` address spaces.
+
+Following APIs are availble to handle ``sysmem`` address:
+
+- ``map_sysmem()``: Create mapping from system memory address to virtual 
address
+- ``unmap_sysmem()``: Remove mapping created by ``map_sysmem()``
+- ``map_to_sysmem()``: Find system memory address mapping for a virtual 
address
+- ``sysmem_to_phys()``: Find physical address mapping for a system memory 
address
+- ``phys_to_sysmem()``: Find system memory address mapping for a physical 
address
+- ``nomap_sysmem()``: Pass through an address unchanged (For sandbox 
tracking)
+- ``nomap_to_sysmem()``: Pass through an address unchanged
+
diff --git a/doc/develop/index.rst b/doc/develop/index.rst
index f82e148b101c..1b8e11cd2f24 100644
--- a/doc/develop/index.rst
+++ b/doc/develop/index.rst
@@ -27,6 +27,7 @@ Implementation
 .. toctree::
:maxdepth: 1
 
+   address_spaces
directories
bloblist
bootstd

---
base-commit: ad7dce5abd49ef3b5c93da5303e15449c8c162b4
change-id: 20240517-address-spaces-1c3b9c379b13

Best regards,
-- 
Jiaxun Yang

Re: [PATCH v1 7/7] MAINTAINERS: Update Starfive visionfive2 maintain files.

2024-05-17 Thread Minda Chen


> 
> On 5/4/24 5:03 PM, Minda Chen wrote:
> > Add USB related files to Starfive visionfive2 MAINTAINERS.
> >
> > Signed-off-by: Minda Chen 
> > ---
> >   board/starfive/visionfive2/MAINTAINERS | 2 ++
> >   1 file changed, 2 insertions(+)
> >
> > diff --git a/board/starfive/visionfive2/MAINTAINERS
> b/board/starfive/visionfive2/MAINTAINERS
> > index d7f638f9b4..1faf83f581 100644
> > --- a/board/starfive/visionfive2/MAINTAINERS
> > +++ b/board/starfive/visionfive2/MAINTAINERS
> > @@ -6,3 +6,5 @@ F:  board/starfive/visionfive2/
> >   F:include/configs/starfive-visionfive2.h
> >   F:configs/starfive_visionfive2_defconfig
> >   F:drivers/pci/pcie_starfive_jh7110.c
> > +F: drivers/phy/starfive/
> > +F: drivers/usb/cdns3/cdns3-starfive.c
> 
> Thanks !
> 
> Reviewed-by: Marek Vasut 

Thanks for reviewing the patch set!  I will follow the comments.

Re: [PATCH 2/2] doc: Update netconsole examples

2024-05-17 Thread Heinrich Schuchardt


On 5/14/24 22:20, Fiona Klute wrote:

As I understand the env command documentation the subcommand style is
preferred, though the old format is still fully supported.

Signed-off-by: Fiona Klute 


Reviewed-by: Heinrich Schuchardt 


---
  doc/usage/netconsole.rst | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/doc/usage/netconsole.rst b/doc/usage/netconsole.rst
index 0c983e6970..b5832843f3 100644
--- a/doc/usage/netconsole.rst
+++ b/doc/usage/netconsole.rst
@@ -24,9 +24,9 @@ can be used for network console.

  For example, if your server IP is 192.168.1.1, you could use::

-   => setenv nc 'setenv stdout nc;setenv stdin nc'
-   => setenv ncip 192.168.1.1
-   => saveenv
+   => env set nc 'env set stdout nc; env set stdin nc'
+   => env set ncip 192.168.1.1
+   => env save
=> run nc

  On the host side, please use this script to access the console
--
2.43.0

[PATCH] FSL DDR: Errata A009942 clears board cpo_sample

2024-05-17 Thread Joakim Tjernlund

LSB in debug_28 register is cleared here so
previous setting by errata A009942 is lost.
Save and restore LSB in debug_28

Signed-off-by: Joakim Tjernlund 
---
 drivers/ddr/fsl/fsl_ddr_gen4.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index 31c58d9a8e..1f8ff87a8b 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -477,6 +477,8 @@ step2:
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009942
ddr_freq = get_ddr_freq(ctrl_num) / 100;
val32 = ddr_in32(>debug[28]);
+   temp32 = val32 & 0xff;
+   debug("cpo_sample:%x\n", temp32);
val32 &= 0xff0fff00;
if (ddr_freq <= 1333)
val32 |= 0x0080006a;
@@ -487,6 +489,8 @@ step2:
else if (ddr_freq <= 2133)
val32 |= 0x0060007b;
 
+   if (temp32)
+   val32 = (val32 & ~0xff) | temp32;
ddr_out32(>debug[28], val32);
debug("Applied errata CONFIG_SYS_FSL_ERRATUM_A009942\n");
 #endif
-- 
2.43.2

Re: [PATCH 2/2] doc: process.rst: Document device tree resync rules

2024-05-17 Thread Quentin Schulz


Hi Tom,

On 5/16/24 10:34 PM, Tom Rini wrote:

Document the logic of when we do a full resync of the device trees used
by OF_UPSTREAM as well as that cherry-picking is allowed as needed.

Signed-off-by: Tom Rini 
---
Cc: Heinrich Schuchardt 
---
  doc/develop/process.rst | 13 +
  1 file changed, 13 insertions(+)

diff --git a/doc/develop/process.rst b/doc/develop/process.rst
index a66540a698c1..0542b3fc1245 100644
--- a/doc/develop/process.rst
+++ b/doc/develop/process.rst
@@ -108,6 +108,19 @@ Differences to the Linux Development Process
In U-Boot, ``"-rc1"`` will only be released after all (or at least most of
the) patches that were submitted during the merge window have been applied.
  
+Resyncing of the device tree subtree

+
+
+As explained in :doc:`devicetree/control` some platforms make use of device 
tree
+files which come from a git subtree that mirrors the Linux Kernel sources
+itself. For our purposes, we only track releases and not release candidates for
+merging in our tree. These merges follow the normal merge window rules.
+
+In the case of specific changes, such as bug fixes or new platform support,
+these can be "cherry-picked" and are subject to the normal merge rules. For
+example, a bug fix can come in later in the window but a full re-sync only
+happens within the merge window itself.
+


Can we provide an example on how to cherry-pick those changes with a 
command line?


Additionally, in doc/develop/devicetree/control.rst we say:

"""
However, if `dts/upstream/` hasn't yet received devicetree source file 
for your newly added board support then you can add corresponding 
devicetree source file as `arch//dts/.dts`. To select that 
add `# CONFIG_OF_UPSTREAM is not set` and set 
`DEFAULT_DEVICE_TREE=` when prompted by Kconfig.

"""

But now we have a second option, cherry-picking upstream changes 
instead, so I assume we should document it there as well (or 
cross-reference?).


Looks good to me otherwise, thanks for clarifying this new process.

Cheers,
Quentin

Re: [PATCH v1 6/9] rockchip: RK3568: Read the reset cause from clock reset unit for RK356x SoC

2024-05-17 Thread Anand Moon

Hi Jonas,

Dropping @edgeble.ai email ID as it is not working

On Thu, 16 May 2024 at 19:48, Jonas Karlman  wrote:
>
> Hi Anand,
>
> On 2024-05-16 10:59, Anand Moon wrote:
> > Read the reset cause from the clock reset unit for RK356x SoC.
> >
> > Cc: Jagan Teki 
> > Signed-off-by: Anand Moon 
> > ---
> >  arch/arm/mach-rockchip/cpu-info.c | 4 
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/arm/mach-rockchip/cpu-info.c 
> > b/arch/arm/mach-rockchip/cpu-info.c
> > index 77833c8fce..114608b506 100644
> > --- a/arch/arm/mach-rockchip/cpu-info.c
> > +++ b/arch/arm/mach-rockchip/cpu-info.c
> > @@ -12,6 +12,8 @@
> >  #include 
> >  #elif IS_ENABLED(CONFIG_ROCKCHIP_RK3399)
> >  #include 
> > +#elif IS_ENABLED(CONFIG_ROCKCHIP_RK33568)
> > +#include 
> >  #endif
> >  #include 
> >  #include 
> > @@ -22,6 +24,8 @@ char *get_reset_cause(void)
> >   struct rk3328_cru *cru = rockchip_get_cru();
> >  #elif IS_ENABLED(CONFIG_ROCKCHIP_RK3399)
> >   struct rockchip_cru *cru = rockchip_get_cru();
> > +#elif IS_ENABLED(CONFIG_ROCKCHIP_RK3568)
> > + struct rk3568_cru *cru = rockchip_get_cru();
>
> This is strictly not needed for RK3568 after the commit 6e710897aa31
> ("rockchip: cru: Enable cpu info support for rk3568").

Ok, thanks for this input.
>
> Suggest you use same/similar workaround or cleanup the include/define
> statement in arch/arm/include/asm/arch-rockchip/cru.h for all SoCs.
>
> Also at least one RK SoC have other bits set in the glb_rst_st reg.
>
> Suggest you add following:
>
>   GLB_RST_MASK  = GENMASK(5, 0),
>
> and use something like:
>
>   switch (cru->glb_rst_st & GLB_RST_MASK) {
>
> or "unknown reset" is reported on affected SoCs.
>
> I have also seen POR always being reported even after a reboot so please
> confirm that reset reason works on the SoCs/boards you enable this on.
>

Ok, I will check this and update you on this.

> Regards,
> Jonas
>
Thanks
-Anand

Re: [PATCH 1/2] doc: Detailed example for netconsole setup

2024-05-17 Thread Heinrich Schuchardt


On 5/14/24 22:20, Fiona Klute wrote:

This adds details that I would have liked to have readily available,
in particular how to activate the network interface before enabling
netconsole, and how to integrate netconsole so you can use the U-Boot
prompt.

Signed-off-by: Fiona Klute 
---
  doc/usage/netconsole.rst | 33 -
  1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/doc/usage/netconsole.rst b/doc/usage/netconsole.rst
index 2aa3b9ccc5..0c983e6970 100644
--- a/doc/usage/netconsole.rst
+++ b/doc/usage/netconsole.rst
@@ -18,7 +18,9 @@ broadcast address and port  are used. If it is set to an 
IP
  address of 0 (or 0.0.0.0) then no messages are sent to the network.
  The source / listening port can be configured separately by setting
  the 'ncinport' environment variable and the destination port can be
-configured by setting the 'ncoutport' environment variable.
+configured by setting the 'ncoutport' environment variable. Note that
+you need to set up the network interface (e.g. using DHCP) before it
+can be used for network console.

  For example, if your server IP is 192.168.1.1, you could use::

@@ -107,3 +109,32 @@ as follows:

  Note that unlike the U-Boot implementation the Linux netconsole is
  unidirectional, i. e. you have console output only in Linux.
+
+Setup via environment
+-
+
+If persistent environment is enabled in your U-Boot configuration, you
+can configure the network console using the environment. For example::


Thanks for adding this information.

Prefixing lines with => makes copying harder.
If you see value in showing the prompt, please, use

.. prompt:: bash =>

Best regards

Heinrich


+
+   => env set autoload no
+   => env set hostname "u-boot"
+   => env set bootdelay 5
+   => env set nc 'dhcp; env set stdout nc; env set stdin nc'
+   => env set ncip 192.168.1.1
+   => env set preboot "${preboot}; run nc;"
+   => env save
+   => reset
+
+``autoload no`` tells the ``dhcp`` command to configure the network
+interface without trying to load an image. ``hostname "u-boot"`` sets
+the hostname to be sent in DHCP requests, so they are easy to
+recognize in the DHCP server log. The command in ``nc`` calls ``dhcp``
+to make sure the network interface is set up before enabling
+netconsole.
+
+Adding ``nc`` to ``preboot`` tells U-Boot to activate netconsole
+before trying to find any boot options, so you can interact with it if
+desired.
+
+``env save`` stores the settings persistently, and ``reset`` then
+triggers a fresh start that will use the changed settings.
--
2.43.0

Re: [PATCH 1/6] video: Move generated bmp headers to include/generated

2024-05-17 Thread Heiko Schocher


Hello Yang,

On 17.05.24 00:16, Jiaxun Yang wrote:

Emphasis that those headers are generated.
Also naturally gitignore them.

Signed-off-by: Jiaxun Yang 
---
  Makefile  | 2 +-
  board/aristainetos/aristainetos.c | 2 +-
  board/toradex/common/tdx-common.c | 2 +-
  common/splash.c   | 4 ++--
  tools/Makefile| 4 ++--
  5 files changed, 7 insertions(+), 7 deletions(-)


Reviewed-by: Heiko Schocher 

for the aristainetos2 board part.

bye,
Heiko
--
DENX Software Engineering GmbH,  Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de

Re: [PATCH 126/149] board: st: Remove and add needed includes

2024-05-17 Thread Patrice CHOTARD




On 5/1/24 04:42, Tom Rini wrote:
> Remove  from this board vendor directory and when needed
> add missing include files directly.
> 
> Signed-off-by: Tom Rini 
> ---
> Cc: Patrick Delaunay 
> Cc: Patrice Chotard 
> Cc: Kamil Lulko 
> Cc: Vikas Manocha 
> Cc: Dillon Min 
> ---
>  board/st/common/cmd_stboard.c| 1 -
>  board/st/common/stm32mp_dfu.c| 1 -
>  board/st/common/stm32mp_dfu_virt.c   | 1 -
>  board/st/common/stpmic1.c| 1 -
>  board/st/common/stusb160x.c  | 1 -
>  board/st/stih410-b2260/board.c   | 1 -
>  board/st/stm32f429-discovery/led.c   | 1 -
>  board/st/stm32f429-discovery/stm32f429-discovery.c   | 1 -
>  board/st/stm32f429-evaluation/stm32f429-evaluation.c | 1 -
>  board/st/stm32f469-discovery/stm32f469-discovery.c   | 1 -
>  board/st/stm32f746-disco/stm32f746-disco.c   | 2 +-
>  board/st/stm32h743-disco/stm32h743-disco.c   | 1 -
>  board/st/stm32h743-eval/stm32h743-eval.c | 1 -
>  board/st/stm32h750-art-pi/stm32h750-art-pi.c | 1 -
>  board/st/stm32mp1/spl.c  | 1 -
>  board/st/stm32mp1/stm32mp1.c | 1 -
>  16 files changed, 1 insertion(+), 16 deletions(-)
> 
> diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c
> index c8c0bad5da16..50da063051b8 100644
> --- a/board/st/common/cmd_stboard.c
> +++ b/board/st/common/cmd_stboard.c
> @@ -30,7 +30,6 @@
>   */
>  
>  #ifndef CONFIG_SPL_BUILD
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
> index 77edb86e78c1..1db8e45480e1 100644
> --- a/board/st/common/stm32mp_dfu.c
> +++ b/board/st/common/stm32mp_dfu.c
> @@ -3,7 +3,6 @@
>   * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/st/common/stm32mp_dfu_virt.c 
> b/board/st/common/stm32mp_dfu_virt.c
> index f0f99605796a..4049d72bf9d5 100644
> --- a/board/st/common/stm32mp_dfu_virt.c
> +++ b/board/st/common/stm32mp_dfu_virt.c
> @@ -3,7 +3,6 @@
>   * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c
> index 969ad484864d..45c2bb5bceac 100644
> --- a/board/st/common/stpmic1.c
> +++ b/board/st/common/stpmic1.c
> @@ -5,7 +5,6 @@
>  
>  #define LOG_CATEGORY LOGC_BOARD
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/st/common/stusb160x.c b/board/st/common/stusb160x.c
> index f0385e5e3830..e1ad8b00717a 100644
> --- a/board/st/common/stusb160x.c
> +++ b/board/st/common/stusb160x.c
> @@ -8,7 +8,6 @@
>  
>  #define LOG_CATEGORY UCLASS_I2C_GENERIC
>  
> -#include 
>  #include 
>  #include 
>  
> diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
> index 82817571ae3d..a912712c9dd9 100644
> --- a/board/st/stih410-b2260/board.c
> +++ b/board/st/stih410-b2260/board.c
> @@ -4,7 +4,6 @@
>   * Author(s): Patrice Chotard,  for 
> STMicroelectronics.
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/st/stm32f429-discovery/led.c 
> b/board/st/stm32f429-discovery/led.c
> index 8dda6a97bd1c..4b8038341b9e 100644
> --- a/board/st/stm32f429-discovery/led.c
> +++ b/board/st/stm32f429-discovery/led.c
> @@ -4,7 +4,6 @@
>   * Kamil Lulko, 
>   */
>  
> -#include 
>  #include 
>  #include 
>  
> diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c 
> b/board/st/stm32f429-discovery/stm32f429-discovery.c
> index 55e464cc7cf1..22d751b44d3d 100644
> --- a/board/st/stm32f429-discovery/stm32f429-discovery.c
> +++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
> @@ -10,7 +10,6 @@
>   * Kamil Lulko, 
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c 
> b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
> index 25472f041fef..db59ebb838e7 100644
> --- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c
> +++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
> @@ -4,7 +4,6 @@
>   * Author(s): Patrice Chotard,  for 
> STMicroelectronics.
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c 
> b/board/st/stm32f469-discovery/stm32f469-discovery.c
> index 9ed6c1e67680..134d207d95d8 100644
> --- a/board/st/stm32f469-discovery/stm32f469-discovery.c
> +++ b/board/st/stm32f469-discovery/stm32f469-discovery.c
> @@ -4,7 +4,6 @@
>   * Author(s): Patrice CHOTARD,  for 
> STMicroelectronics.
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
> b/board/st/stm32f746-disco/stm32f746-disco.c
> index 0f9666008430..6d86e4fe7aab 100644
> ---

Re: [PATCH] ARM: dts: stm32: Add generic SoM compatible to STM32MP15xx DH electronics DHSOM

2024-05-17 Thread Patrice CHOTARD




On 5/17/24 01:47, Marek Vasut wrote:
> Add generic SoM compatible string into machine compatible string
> for all STM32MP15xx based DH electronics DHSOM. This way, common
> board code can match on this compatible. No functional change.
> 
> Signed-off-by: Marek Vasut 
> ---
> Cc: Patrice Chotard 
> Cc: Patrick Delaunay 
> Cc: Simon Glass 
> Cc: Tom Rini 
> Cc: u-b...@dh-electronics.com
> Cc: u-boot@lists.denx.de
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
>  arch/arm/dts/stm32mp15xx-dhcom-drc02.dts   | 4 +++-
>  arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts| 4 +++-
>  arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts | 4 +++-
>  arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts   | 4 +++-
>  arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts | 4 +++-
>  arch/arm/dts/stm32mp15xx-dhcor-testbench.dts   | 4 +++-
>  6 files changed, 18 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts 
> b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
> index 1ef9ac29cea..90625bf6b60 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
> @@ -11,5 +11,7 @@
>  
>  / {
>   model = "DH Electronics STM32MP15xx DHCOM DRC02";
> - compatible = "dh,stm32mp15xx-dhcom-drc02", "st,stm32mp1xx";
> + compatible = "dh,stm32mp15xx-dhcom-drc02",
> +  "dh,stm32mp15xx-dhcom-som",
> +  "st,stm32mp1xx";
>  };
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts 
> b/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts
> index e2e01e2146c..b2e450aa13b 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-pdk2.dts
> @@ -11,5 +11,7 @@
>  
>  / {
>   model = "STMicroelectronics STM32MP15xx DHCOM Premium Developer Kit 
> (2)";
> - compatible = "dh,stm32mp15xx-dhcom-pdk2", "st,stm32mp15x";
> + compatible = "dh,stm32mp15xx-dhcom-pdk2",
> +  "dh,stm32mp15xx-dhcom-som",
> +  "st,stm32mp15x";
>  };
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts 
> b/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts
> index 06770b47873..3e908102f61 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-picoitx.dts
> @@ -11,5 +11,7 @@
>  
>  / {
>   model = "DH Electronics STM32MP15xx DHCOM PicoITX";
> - compatible = "dh,stm32mp15xx-dhcom-picoitx", "st,stm32mp1xx";
> + compatible = "dh,stm32mp15xx-dhcom-picoitx",
> +  "dh,stm32mp15xx-dhcom-som",
> +  "st,stm32mp1xx";
>  };
> diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts 
> b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts
> index 76ac5a873c1..dd8fcecbca5 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts
> @@ -14,5 +14,7 @@
>  
>  / {
>   model = "Arrow Electronics STM32MP15xx Avenger96 board";
> - compatible = "arrow,stm32mp15xx-avenger96", "st,stm32mp15x";
> + compatible = "arrow,stm32mp15xx-avenger96",
> +  "dh,stm32mp15xx-dhcor-som",
> +  "st,stm32mp15x";
>  };
> diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts 
> b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts
> index 77dd944ff53..c1f99c1685e 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts
> @@ -12,5 +12,7 @@
>  
>  / {
>   model = "DH electronics STM32MP15xx DHCOR DRC Compact";
> - compatible = "dh,stm32mp15xx-dhcor-drc-compact", "st,stm32mp1xx";
> + compatible = "dh,stm32mp15xx-dhcor-drc-compact",
> +  "dh,stm32mp15xx-dhcor-som",
> +  "st,stm32mp1xx";
>  };
> diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts 
> b/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> index c9163e1c028..5fdd762ddbf 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> @@ -9,7 +9,9 @@
>  
>  / {
>   model = "DH electronics STM32MP15xx DHCOR Testbench";
> - compatible = "dh,stm32mp15xx-dhcor-testbench", "st,stm32mp1xx";
> + compatible = "dh,stm32mp15xx-dhcor-testbench",
> +  "dh,stm32mp15xx-dhcor-som",
> +  "st,stm32mp1xx";
>  
>   aliases {
>   ethernet0 = 

Reviewed-by: Patrice Chotard 

Thanks

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