Re: [U-Boot] [PATCH] pm9261: add mach-type localy for the board

2011-10-31 Thread RONETIX - Asen Dimov 
Hi Albert,

On 10/28/2011 09:17 PM, Albert ARIBAUD wrote:
 Hi Asen,

 You should copy Ilko as the maintainer, unless you are taking over 
 maintainership of this board (and pm9263 and pm9g45), in which case 
 please modify MAINTAINERS file as well.
Ok, I will CC: him next time.

 Le 28/10/2011 18:10, Asen Chavdarov Dimov a écrit :
 Signed-off-by: Asen Chavdarov Dimovdi...@ronetix.at
 ---
   board/ronetix/pm9261/mach-type.h |   31 
 +++

 NAK. Do not copy-paste mach-type.h, just add the MACH_TYPE_PM9261 
 define in include/configs/pm9261.h.

   board/ronetix/pm9261/pm9261.c|1 +
   2 files changed, 32 insertions(+), 0 deletions(-)
   create mode 100644 board/ronetix/pm9261/mach-type.h
...
   #includecommon.h
 +#include mach-type.h

 NAK -- you don't need this if you add MACH_TYPE_PM9261.

   #includeasm/sizes.h
   #includeasm/io.h
   #includeasm/arch/at91sam9_smc.h

 Same applies to the other two boards -- you can actually submit a 
 single patch for all three of them.

Ok.
 Amicalement,
Regards,
Asen
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Re: [U-Boot] [PATCH, AT91, rework v2] change common at91sam9261 files after AT91 rework

2011-07-26 Thread RONETIX - Asen Dimov 
Hello Reinhard,

On 07/26/2011 10:14 AM, Reinhard Meyer wrote:
 Dear Asen Dimov,
 Signed-off-by: Asen Dimovdi...@ronetix.at
 ---
 Note:
 This patch was a part of patches, but it is better to be done step by step 
 and
 so this patch is a split from the patch series with message id:
 1307606409-29818-2-git-send-email-di...@ronetix.at
 and Patchwork:
 http://patchwork.ozlabs.org/patch/99665/

 Changes for v2:
  - add CONFIG_AT91_GPIO_PIULLUP
  - reneme at91_serial3_hw_init() to at91_seriald_hw_init()
  - remove at91_serial_hw_init()
 What I miss in at91sam9261_devices.c (as compared to the 9260)
 is support for MACB and MCI. Don't 9261 systems use Ethernet?
 Or is that part still in the board specific files?

 Then, I would like to add the following changes:

 -- arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c
 @@ -79,14 +79,14 @@ void at91_seriald_hw_init(void)
   writel(1  ATMEL_ID_SYS,pmc-pcer);
   }

 -#ifdef CONFIG_HAS_DATAFLASH
 +#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
   void at91_spi0_hw_init(unsigned long cs_mask)
   {
   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;

 - at91_set_a_periph(AT91_PIO_PORTA, 0, 0);/* SPI0_MISO */
 - at91_set_a_periph(AT91_PIO_PORTA, 1, 0);/* SPI0_MOSI */
 - at91_set_a_periph(AT91_PIO_PORTA, 2, 0);/* SPI0_SPCK */
 + at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);  /* SPI0_MISO */
 + at91_set_a_periph(AT91_PIO_PORTA, 1, PUP);  /* SPI0_MOSI */
 + at91_set_a_periph(AT91_PIO_PORTA, 2, PUP);  /* SPI0_SPCK */

   /* Enable clock */
   writel(1  ATMEL_ID_SPI0,pmc-pcer);
 @@ -121,9 +121,9 @@ void at91_spi1_hw_init(unsigned long cs_mask)
   {
   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;

 - at91_set_a_periph(AT91_PIO_PORTB, 30, 0);   /* SPI1_MISO */
 - at91_set_a_periph(AT91_PIO_PORTB, 31, 0);   /* SPI1_MOSI */
 - at91_set_a_periph(AT91_PIO_PORTB, 29, 0);   /* SPI1_SPCK */
 + at91_set_a_periph(AT91_PIO_PORTB, 30, PUP); /* SPI1_MISO */
 + at91_set_a_periph(AT91_PIO_PORTB, 31, PUP); /* SPI1_MOSI */
 + at91_set_a_periph(AT91_PIO_PORTB, 29, PUP); /* SPI1_SPCK */

   /* Enable clock */
   writel(1  ATMEL_ID_SPI1,pmc-pcer);

 - arch/arm/include/asm/arch-at91/at91sam9261.h
 @@ -104,7 +104,7 @@
   #define ATMEL_SIZE_SRAM 0x00028000  /* Internal SRAM size 
 (160Kb) */

   #define ATMEL_BASE_ROM  0x0040  /* Internal ROM base 
 address */
 -#define ATMEL_SIZE_ROM   SZ_32K  /* Internal ROM size 
 (32Kb) */
 +#define ATMEL_SIZE_ROM   0x8000  /* Internal ROM size 
 (32Kb) */

   #define ATMEL_BASE_UHP  0x0050  /* USB Host controller 
 */
   #define ATMEL_BASE_LCDC 0x0060  /* LDC controller */

 I have this as a local patch and could squash this onto yours, or
 you may provide an updated patch.
I will try once more to make it as it should be.
 Thanks,
 Reinhard

Regards,
Asen
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Re: [U-Boot] [PATCH, AT91, rework v2] change common at91sam9261 files after AT91 rework

2011-07-26 Thread RONETIX - Asen Dimov 
and one forgotten answer ...

On 07/26/2011 12:11 PM, RONETIX - Asen Dimov wrote:
 Hello Reinhard,

 On 07/26/2011 10:14 AM, Reinhard Meyer wrote:
 Dear Asen Dimov,
 Signed-off-by: Asen Dimovdi...@ronetix.at
 ---
 Note:
 This patch was a part of patches, but it is better to be done step 
 by step and
 so this patch is a split from the patch series with message id:
 1307606409-29818-2-git-send-email-di...@ronetix.at
 and Patchwork:
 http://patchwork.ozlabs.org/patch/99665/

 Changes for v2:
 - add CONFIG_AT91_GPIO_PIULLUP
 - reneme at91_serial3_hw_init() to at91_seriald_hw_init()
 - remove at91_serial_hw_init()
 What I miss in at91sam9261_devices.c (as compared to the 9260)
 is support for MACB and MCI. Don't 9261 systems use Ethernet?
 Or is that part still in the board specific files?

that part is in the board file.

[snip]
 Regards,
 Asen

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Re: [U-Boot] [PATCH, AT91, rework v2] change common at91sam9261 files after AT91 rework

2011-07-26 Thread RONETIX - Asen Dimov 
Hello Reinhard,

On 07/26/2011 12:58 PM, Reinhard Meyer wrote:
 Dear Asen Dimov,
 I have this as a local patch and could squash this onto yours, or
 you may provide an updated patch.
 I will try once more to make it as it should be.
 The squashed version is at top of u-boot-atmel/rework-at91sam9261.
 If you are OK with that, I'll post the patch and apply it to master.
 (I also changed the subject a bit)
Good, I am OK with that. The pm9261 now boots and the patch will come soon.
 Best Regards,
 Reinhard
Regards,
Asen
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[U-Boot] [PATCH, AT91, rework v2] change common at91sam9261 files after AT91 rework

2011-07-18 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
Note:
This patch was a part of patches, but it is better to be done step by step and
so this patch is a split from the patch series with message id:
1307606409-29818-2-git-send-email-di...@ronetix.at
and Patchwork:
http://patchwork.ozlabs.org/patch/99665/

Changes for v2:
- add CONFIG_AT91_GPIO_PIULLUP
- reneme at91_serial3_hw_init() to at91_seriald_hw_init()
- remove at91_serial_hw_init()


 arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c |   62 ++---
 arch/arm/include/asm/arch-at91/at91sam9261.h  |1 +
 2 files changed, 30 insertions(+), 33 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c 
b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c
index b4353ef..68401f6 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c
@@ -23,77 +23,73 @@
  */
 
 #include common.h
+#include asm/io.h
 #include asm/arch/at91_common.h
 #include asm/arch/at91_pmc.h
 #include asm/arch/gpio.h
-#include asm/arch/io.h
+
+/*
+ * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
+ * peripheral pins. Good to have if hardware is soldered optionally
+ * or in case of SPI no slave is selected. Avoid lines to float
+ * needlessly. Use a short local PUP define.
+ *
+ * Due to errata TXD floats when CTS is inactive pullups are always
+ * on for TXD pins.
+ */
+#ifdef CONFIG_AT91_GPIO_PULLUP
+# define PUP CONFIG_AT91_GPIO_PULLUP
+#else
+# define PUP 0
+#endif
 
 void at91_serial0_hw_init(void)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTC, 8, 1);/* TXD0 */
at91_set_a_periph(AT91_PIO_PORTC, 9, 0);/* RXD0 */
-   writel(1  AT91SAM9261_ID_US0, pmc-pcer);
+   writel(1  ATMEL_ID_USART0, pmc-pcer);
 }
 
 void at91_serial1_hw_init(void)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTC, 12, 1);   /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTC, 13, 0);   /* RXD1 */
-   writel(1  AT91SAM9261_ID_US1, pmc-pcer);
+   writel(1  ATMEL_ID_USART1, pmc-pcer);
 }
 
 void at91_serial2_hw_init(void)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTC, 14, 1);   /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTC, 15, 0);   /* RXD2 */
-   writel(1  AT91SAM9261_ID_US2, pmc-pcer);
+   writel(1  ATMEL_ID_USART2, pmc-pcer);
 }
 
-void at91_serial3_hw_init(void)
+void at91_seriald_hw_init(void)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTA, 9, 0);/* DRXD */
at91_set_a_periph(AT91_PIO_PORTA, 10, 1);   /* DTXD */
-   writel(1  AT91_ID_SYS, pmc-pcer);
-}
-
-void at91_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-   at91_serial0_hw_init();
-#endif
-
-#ifdef CONFIG_USART1
-   at91_serial1_hw_init();
-#endif
-
-#ifdef CONFIG_USART2
-   at91_serial2_hw_init();
-#endif
-
-#ifdef CONFIG_USART3   /* DBGU */
-   at91_serial3_hw_init();
-#endif
+   writel(1  ATMEL_ID_SYS, pmc-pcer);
 }
 
 #ifdef CONFIG_HAS_DATAFLASH
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTA, 0, 0);/* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 1, 0);/* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 2, 0);/* SPI0_SPCK */
 
/* Enable clock */
-   writel(1  AT91SAM9261_ID_SPI0, pmc-pcer);
+   writel(1  ATMEL_ID_SPI0, pmc-pcer);
 
if (cs_mask  (1  0)) {
at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
@@ -123,14 +119,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTB, 30, 0);   /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 31, 0);   /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 29, 0);   /* SPI1_SPCK */
 
/* Enable clock */
-   writel(1  AT91SAM9261_ID_SPI1, pmc-pcer);
+   writel(1  ATMEL_ID_SPI1, pmc-pcer);
 
if (cs_mask  (1  0)) {
at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h 
b/arch/arm/include/asm/arch-at91/at91sam9261.h
index c85fd29..a07f273

[U-Boot] [PATCH] AT91 rework: pm9261, pm9263 and pm9g45

2011-06-09 Thread RONETIX - Asen Dimov 
Hello,

I got several instances of the patches, probably you got it too,
so I apology for the mess.

Here is the list of patches:

[PM9261]
http://patchwork.ozlabs.org/patch/99663/
http://patchwork.ozlabs.org/patch/99665/
http://patchwork.ozlabs.org/patch/99666/

[PM9263]
http://patchwork.ozlabs.org/patch/99662/
http://patchwork.ozlabs.org/patch/99668/

[PM9G45]
http://patchwork.ozlabs.org/patch/99664/
http://patchwork.ozlabs.org/patch/99667/

Regards,
Asen
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Re: [U-Boot] [PATCH] AT91 rework: pm9261, pm9263 and pm9g45

2011-06-09 Thread RONETIX - Asen Dimov 
Hello Reinhard,

On 06/09/2011 01:57 PM, Reinhard Meyer wrote:
...
 Dear Asen Dimov,
 The empty reset_timer() function added there can obviously only
 solve build issues.
 On any account reset_timer() must not be used anymore.
 As such this patch must get a NAK.

The architectures, except AT91 are using reset_timer() to make epochs
(start from zero). I don't want to break the other architectures
and I need the CFI driver for pm92613 and pm9261. I can not think of
another idea, except an empty reset_timer(). Any suggestions, ideas?
...
 Best Regards,
 Reinhard
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Re: [U-Boot] [PATCH] AT91 rework: pm9261, pm9263 and pm9g45

2011-06-09 Thread RONETIX - Asen Dimov 
Hi Reinhard,

On 06/09/2011 02:00 PM, Reinhard Meyer wrote:
...
 http://patchwork.ozlabs.org/patch/99665/
 http://patchwork.ozlabs.org/patch/99666/

 [PM9263]
 http://patchwork.ozlabs.org/patch/99662/
 http://patchwork.ozlabs.org/patch/99668/

 [PM9G45]
 http://patchwork.ozlabs.org/patch/99664/
 http://patchwork.ozlabs.org/patch/99667/
 Ah, and patches should be numbered 1/n .. n/n; 0/n is only
 for a descriptive summary.

should I repost them numbering with 1/n?
 Best Regards,
 Reinhard
Regards,
Asen
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[U-Boot] [PATCH v2] pm9g45_v1.3: make ethernet works

2011-02-17 Thread Asen Dimov 
V2:
- put the PHY reset/init code on a proper place, so now
in the config file PHY reset could be enabled/disabled
if nRST signal is not long enough.

Signed-off-by: Asen Dimov di...@ronetix.at
---
 board/ronetix/pm9g45/pm9g45.c |   50 +++--
 include/configs/pm9g45.h  |5 
 2 files changed, 38 insertions(+), 17 deletions(-)

diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
index 79b7c9d..d9e16b9 100644
--- a/board/ronetix/pm9g45/pm9g45.c
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -108,23 +108,6 @@ static void pm9g45_macb_hw_init(void)
/* Enable clock */
writel(1  AT91SAM9G45_ID_EMAC, pmc-pcer);
 
-   /*
-* Disable pull-up on:
-*  RXDV (PA15) = PHY normal mode (not Test mode)
-*  ERX0 (PA12) = PHY ADDR0
-*  ERX1 (PA13) = PHY ADDR1 = PHYADDR = 0x0
-*
-* PHY has internal pull-down
-*/
-   at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
-   at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
-   at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
-
-   /* Re-enable pull-up */
-   at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
-   at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
-   at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
-
at91_macb_hw_init();
 }
 #endif
@@ -174,6 +157,39 @@ void dram_init_banksize(void)
 #ifdef CONFIG_RESET_PHY_R
 void reset_phy(void)
 {
+   at91_rstc_t *rstc   = (at91_rstc_t *) AT91_RSTC_BASE;
+   unsigned long   erstl;
+
+   /*
+* Disable pull-up on:
+*  RXDV (PA15) = PHY normal mode (not Test mode)
+*  ERX0 (PA12) = PHY ADDR0
+*  ERX1 (PA13) = PHY ADDR1 = PHYADDR = 0x0
+*
+* PHY has internal pull-down
+*/
+   at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
+   at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
+   at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
+
+   erstl = readl(rstc-mr)  AT91_RSTC_MR_ERSTL_MASK;
+
+   /* Need to reset PHY - 500ms reset */
+   writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
+   AT91_RSTC_MR_URSTEN, rstc-mr);
+   writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, rstc-cr);
+
+   /* Wait for end hardware reset */
+   while (!(readl(rstc-sr)  AT91_RSTC_SR_NRSTL));
+
+   /* Restore NRST value */
+   writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, rstc-mr);
+
+   /* Re-enable pull-up */
+   at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
+   at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
+   at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
+
 #ifdef CONFIG_MACB
/*
 * Initialize ethernet HW addr prior to starting Linux,
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index ec51ccf..4d8089f 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -125,6 +125,11 @@
 #define CONFIG_NET_MULTI   1
 #define CONFIG_NET_RETRY_COUNT 20
 #define CONFIG_RESET_PHY_R 1
+#define CONFIG_MACB_SEARCH_PHY
+#define CONFIG_CMD_MII
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+/* MAC is Organizationally Unique Identifier + 3 octects user numbers */
+#define CONFIG_ETHADDR 02:00:00:fe:ed:00
 
 /* USB */
 #define CONFIG_USB_ATMEL
-- 
1.5.5.6

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[U-Boot] mpc5125: nand flash commands

2011-02-14 Thread RONETIX - Asen Dimov 
Hello,

Have anybody made the nand support for mpc5125, especially commads for
flashing first stage boot loader and U-Boot:
nand_e, nand_w and nand_loader, which are implemented in
/fscale/cys/git-freescale/u-boot-2009.03/drivers/mtd/nand/mpc5125_nfc_mtc.c.

The BSP from Freescale has these commands as as object file not source.
We need these sources to implement nand programming in our
JTAG programmer.

Since U-Boot is GPL licensed all sources shout be public.

Thanks in advance.

Regards,
Asen


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Re: [U-Boot] [PATCH] pm9g45_v1.3: make ethernet works

2011-02-03 Thread RONETIX - Asen Dimov 
Hello,

Asen Dimov with Message-Id: 
1296141314-9580-1-git-send-email-di...@ronetix.at wrote:
 Signed-off-by: Asen Dimov di...@ronetix.at
 ---
  board/ronetix/pm9g45/pm9g45.c |   15 +++
  include/configs/pm9g45.h  |5 +
  2 files changed, 20 insertions(+), 0 deletions(-)

 diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
 index 79b7c9d..0e1d6b2 100644
 --- a/board/ronetix/pm9g45/pm9g45.c
 +++ b/board/ronetix/pm9g45/pm9g45.c
 @@ -96,6 +96,8 @@ static void pm9g45_nand_hw_init(void)
  static void pm9g45_macb_hw_init(void)
  {
   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
 + at91_rstc_t *rstc   = (at91_rstc_t *) AT91_RSTC_BASE;
 + unsigned long   erstl;
  
   /*
* PD2 enables the 50MHz oscillator for Ethernet PHY
 @@ -120,6 +122,19 @@ static void pm9g45_macb_hw_init(void)
   at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
   at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
  
 + erstl = readl(rstc-mr)  AT91_RSTC_MR_ERSTL_MASK;
 +
 + /* Need to reset PHY - 500ms reset */
 + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
 + AT91_RSTC_MR_URSTEN, rstc-mr);
 + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, rstc-cr);
 +
 + /* Wait for end hardware reset */
 + while (!(readl(rstc-sr)  AT91_RSTC_SR_NRSTL));
 +
 + /* Restore NRST value */
 + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, rstc-mr);
 +
   /* Re-enable pull-up */
   at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
   at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
 diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
 index ec51ccf..4d8089f 100644
 --- a/include/configs/pm9g45.h
 +++ b/include/configs/pm9g45.h
 @@ -125,6 +125,11 @@
  #define CONFIG_NET_MULTI 1
  #define CONFIG_NET_RETRY_COUNT   20
  #define CONFIG_RESET_PHY_R   1
 +#define CONFIG_MACB_SEARCH_PHY
 +#define CONFIG_CMD_MII
 +#define CONFIG_OVERWRITE_ETHADDR_ONCE
 +/* MAC is Organizationally Unique Identifier + 3 octects user numbers */
 +#define CONFIG_ETHADDR   02:00:00:fe:ed:00
  
  /* USB */
  #define CONFIG_USB_ATMEL
   
is this fix lost or there is something wrong with it?


Regards,
Asen
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[U-Boot] [PATCH] pm9g45_v1.3: make ethernet works

2011-01-27 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 board/ronetix/pm9g45/pm9g45.c |   15 +++
 include/configs/pm9g45.h  |5 +
 2 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
index 79b7c9d..0e1d6b2 100644
--- a/board/ronetix/pm9g45/pm9g45.c
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -96,6 +96,8 @@ static void pm9g45_nand_hw_init(void)
 static void pm9g45_macb_hw_init(void)
 {
at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_rstc_t *rstc   = (at91_rstc_t *) AT91_RSTC_BASE;
+   unsigned long   erstl;
 
/*
 * PD2 enables the 50MHz oscillator for Ethernet PHY
@@ -120,6 +122,19 @@ static void pm9g45_macb_hw_init(void)
at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
 
+   erstl = readl(rstc-mr)  AT91_RSTC_MR_ERSTL_MASK;
+
+   /* Need to reset PHY - 500ms reset */
+   writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
+   AT91_RSTC_MR_URSTEN, rstc-mr);
+   writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, rstc-cr);
+
+   /* Wait for end hardware reset */
+   while (!(readl(rstc-sr)  AT91_RSTC_SR_NRSTL));
+
+   /* Restore NRST value */
+   writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, rstc-mr);
+
/* Re-enable pull-up */
at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index ec51ccf..4d8089f 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -125,6 +125,11 @@
 #define CONFIG_NET_MULTI   1
 #define CONFIG_NET_RETRY_COUNT 20
 #define CONFIG_RESET_PHY_R 1
+#define CONFIG_MACB_SEARCH_PHY
+#define CONFIG_CMD_MII
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+/* MAC is Organizationally Unique Identifier + 3 octects user numbers */
+#define CONFIG_ETHADDR 02:00:00:fe:ed:00
 
 /* USB */
 #define CONFIG_USB_ATMEL
-- 
1.5.5.6

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Re: [U-Boot] [PATCH 0/1] at91: USART3_BASE use AT91_DBGU_BASE instead of (AT91_BASE_SYS + AT91_DBGU)

2010-12-13 Thread RONETIX - Asen Dimov 
Hello Reinhard,

Reinhard Meyer wrote:
 Dear Asen Dimov,

 Signed-off-by: Asen Dimovdi...@ronetix.at
 ---
   arch/arm/include/asm/arch-at91/at91cap9.h|1 +
   arch/arm/include/asm/arch-at91/at91sam9260.h |1 +
   arch/arm/include/asm/arch-at91/at91sam9261.h |1 +
   arch/arm/include/asm/arch-at91/at91sam9g45.h |1 +
   arch/arm/include/asm/arch-at91/at91sam9rl.h  |1 +
   arch/arm/include/asm/arch-at91/memory-map.h  |5 -
   6 files changed, 9 insertions(+), 1 deletions(-)

 We are currently reworking the avr32 and at91 files.

 Please rebase your work on top of the u-boot-atmel.git, rework101209 
 branch.
 You will find that most of your changes to common files are already done.

in this case you can discard this patch.

 With best regards,
 Reinhard

Regards,
Asen
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[U-Boot] [PATCH 1/1] pm9g45: enable cache command

2010-12-12 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 include/configs/pm9g45.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index 8822012..ec51ccf 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -81,6 +81,7 @@
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_IMLS
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_PING1
 #define CONFIG_CMD_DHCP1
 #define CONFIG_CMD_NAND1
-- 
1.5.5.6

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[U-Boot] [PATCH 1/1] pm9263: enable cache command

2010-12-12 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 include/configs/pm9263.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index c9e7489..96e12f2 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -214,6 +214,7 @@
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_PING1
 #define CONFIG_CMD_DHCP1
 #define CONFIG_CMD_NAND1
-- 
1.5.5.6

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[U-Boot] [PATCH 0/1] pm9g45: ARM relocation support

2010-12-12 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 board/ronetix/pm9g45/config.mk |1 -
 board/ronetix/pm9g45/pm9g45.c  |9 -
 include/configs/pm9g45.h   |6 ++
 3 files changed, 14 insertions(+), 2 deletions(-)
 delete mode 100644 board/ronetix/pm9g45/config.mk

diff --git a/board/ronetix/pm9g45/config.mk b/board/ronetix/pm9g45/config.mk
deleted file mode 100644
index 9d3c5ae..000
--- a/board/ronetix/pm9g45/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x73f0
diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
index f3d48f2..79b7c9d 100644
--- a/board/ronetix/pm9g45/pm9g45.c
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -159,9 +159,16 @@ int board_init(void)
 
 int dram_init(void)
 {
+   /* dram_init must store complete ramsize in gd-ram_size */
+   gd-ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
+   PHYS_SDRAM_SIZE);
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
gd-bd-bi_dram[0].start = PHYS_SDRAM;
gd-bd-bi_dram[0].size = PHYS_SDRAM_SIZE;
-   return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index 3ed6b56..8822012 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -39,6 +39,8 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_MAIN_CLOCK 1200 /* from 12 MHz crystal */
 #define CONFIG_SYS_HZ  1000
+#define CONFIG_SYS_TEXT_BASE   0x73f0
+#define CONFIG_AT91FAMILY
 
 #define CONFIG_ARCH_CPU_INIT
 
@@ -175,6 +177,10 @@
 #define CONFIG_SYS_MALLOC_LEN  ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\
0x1000)
 
+#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM
+#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+   GENERATED_GBL_DATA_SIZE)
+
 #define CONFIG_STACKSIZE   (32*1024)   /* regular stack */
 
 #ifdef CONFIG_USE_IRQ
-- 
1.5.5.6

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[U-Boot] [PATCH 0/1] pm9261: ARM relocation support

2010-12-12 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 board/ronetix/pm9261/config.mk |1 -
 board/ronetix/pm9261/pm9261.c  |9 -
 include/configs/pm9261.h   |6 ++
 3 files changed, 14 insertions(+), 2 deletions(-)
 delete mode 100644 board/ronetix/pm9261/config.mk

diff --git a/board/ronetix/pm9261/config.mk b/board/ronetix/pm9261/config.mk
deleted file mode 100644
index 975522a..000
--- a/board/ronetix/pm9261/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x23f0
\ No newline at end of file
diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c
index 53d8c48..e0f44dd 100644
--- a/board/ronetix/pm9261/pm9261.c
+++ b/board/ronetix/pm9261/pm9261.c
@@ -281,9 +281,16 @@ int board_eth_init(bd_t *bis)
 
 int dram_init(void)
 {
+   /* dram_init must store complete ramsize in gd-ram_size */
+   gd-ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
+   PHYS_SDRAM_SIZE);
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
gd-bd-bi_dram[0].start = PHYS_SDRAM;
gd-bd-bi_dram[0].size = PHYS_SDRAM_SIZE;
-   return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 7fcc9ba..c7f0be9 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -45,6 +45,8 @@
 #define CONFIG_PM9261  1   /* on a Ronetix PM9261 Board*/
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ  /* we don't need IRQ/FIQ stuff  */
+#define CONFIG_SYS_TEXT_BASE   0
+#define CONFIG_AT91FAMILY
 
 /* clocks */
 /* CKGR_MOR - enable main osc. */
@@ -370,6 +372,10 @@
 #define CONFIG_SYS_MALLOC_LEN  \
ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
 
+#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM
+#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+   GENERATED_GBL_DATA_SIZE)
+
 #define CONFIG_STACKSIZE   (32 * 1024) /* regular stack */
 
 #ifdef CONFIG_USE_IRQ
-- 
1.5.5.6

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[U-Boot] [PATCH 1/1] atmel_dataflash: fix calling to reset_timer() and get_timer()

2010-12-12 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 drivers/spi/atmel_dataflash_spi.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/atmel_dataflash_spi.c 
b/drivers/spi/atmel_dataflash_spi.c
index 4a5c4aa..d5215c0 100644
--- a/drivers/spi/atmel_dataflash_spi.c
+++ b/drivers/spi/atmel_dataflash_spi.c
@@ -158,12 +158,12 @@ unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
}
 
/* arm simple, non interrupt dependent timer */
-   reset_timer_masked();
+   reset_timer();
timeout = 0;
 
writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR);
while (!(readl(AT91_BASE_SPI + AT91_SPI_SR)  AT91_SPI_RXBUFF) 
-   ((timeout = get_timer_masked())  CONFIG_SYS_SPI_WRITE_TOUT));
+   ((timeout = get_timer(0))  CONFIG_SYS_SPI_WRITE_TOUT));
writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + 
AT91_SPI_PTCR);
pDesc-state = IDLE;
 
-- 
1.5.5.6

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[U-Boot] [PATCH 1/1] pm9261: enable cache command

2010-12-12 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 include/configs/pm9261.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index c7f0be9..26e5049 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -203,6 +203,7 @@
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_PING1
 #define CONFIG_CMD_DHCP1
 #define CONFIG_CMD_NAND1
-- 
1.5.5.6

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[U-Boot] [PATCH 0/1] pm9263: ARM relocation support

2010-12-12 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 board/ronetix/pm9263/config.mk |1 -
 board/ronetix/pm9263/pm9263.c  |9 -
 include/configs/pm9263.h   |6 ++
 3 files changed, 14 insertions(+), 2 deletions(-)
 delete mode 100644 board/ronetix/pm9263/config.mk

diff --git a/board/ronetix/pm9263/config.mk b/board/ronetix/pm9263/config.mk
deleted file mode 100644
index e554a45..000
--- a/board/ronetix/pm9263/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x23f0
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c
index 4dc0237..ec9f865 100644
--- a/board/ronetix/pm9263/pm9263.c
+++ b/board/ronetix/pm9263/pm9263.c
@@ -378,9 +378,16 @@ int board_init(void)
 
 int dram_init(void)
 {
+   /* dram_init must store complete ramsize in gd-ram_size */
+   gd-ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
+   PHYS_SDRAM_SIZE);
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
gd-bd-bi_dram[0].start = PHYS_SDRAM;
gd-bd-bi_dram[0].size = PHYS_SDRAM_SIZE;
-   return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 619af2d..c9e7489 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -44,6 +44,8 @@
 #define CONFIG_PM9263  1   /* on a Ronetix PM9263 Board*/
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ  /* we don't need IRQ/FIQ stuff  */
+#define CONFIG_SYS_TEXT_BASE   0
+#define CONFIG_AT91FAMILY
 
 /* clocks */
 #define CONFIG_SYS_MOR_VAL \
@@ -401,6 +403,10 @@
  */
 #define CONFIG_SYS_MALLOC_LEN  ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
 
+#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM
+#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+   GENERATED_GBL_DATA_SIZE)
+
 #define CONFIG_STACKSIZE   (32 * 1024) /* regular stack */
 
 #ifdef CONFIG_USE_IRQ
-- 
1.5.5.6

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[U-Boot] [PATCH 0/1] at91: USART3_BASE use AT91_DBGU_BASE instead of (AT91_BASE_SYS + AT91_DBGU)

2010-12-12 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 arch/arm/include/asm/arch-at91/at91cap9.h|1 +
 arch/arm/include/asm/arch-at91/at91sam9260.h |1 +
 arch/arm/include/asm/arch-at91/at91sam9261.h |1 +
 arch/arm/include/asm/arch-at91/at91sam9g45.h |1 +
 arch/arm/include/asm/arch-at91/at91sam9rl.h  |1 +
 arch/arm/include/asm/arch-at91/memory-map.h  |5 -
 6 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91cap9.h 
b/arch/arm/include/asm/arch-at91/at91cap9.h
index 5af6fdc..19c280d 100644
--- a/arch/arm/include/asm/arch-at91/at91cap9.h
+++ b/arch/arm/include/asm/arch-at91/at91cap9.h
@@ -53,6 +53,7 @@
 #define AT91CAP9_ID_IRQ0   30  /* Advanced Interrupt Controller (IRQ0) 
*/
 #define AT91CAP9_ID_IRQ1   31  /* Advanced Interrupt Controller (IRQ1) 
*/
 
+#define AT91_DBGU_BASE 0xee00
 #define AT91_PIO_BASE  0xf200
 #define AT91_PMC_BASE  0xfc00
 #define AT91_RSTC_BASE 0xfd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h 
b/arch/arm/include/asm/arch-at91/at91sam9260.h
index 7fd60b7..cc3adc3 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9260.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260.h
@@ -53,6 +53,7 @@
 #define AT91_SDRAMC_BASE   0xea00
 #define AT91_SMC_BASE  0xec00
 #define AT91_MATRIX_BASE   0xee00
+#define AT91_DBGU_BASE 0xf200
 #define AT91_PIO_BASE  0xf400
 #define AT91_PMC_BASE  0xfc00
 #define AT91_RSTC_BASE 0xfd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h 
b/arch/arm/include/asm/arch-at91/at91sam9261.h
index 7ca0283..bd638f9 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9261.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9261.h
@@ -46,6 +46,7 @@
 #define AT91_SDRAMC_BASE   0xea00
 #define AT91_SMC_BASE  0xec00
 #define AT91_MATRIX_BASE   0xee00
+#define AT91_DBGU_BASE 0xf200
 #define AT91_PIO_BASE  0xf400
 #define AT91_PMC_BASE  0xfc00
 #define AT91_RSTC_BASE 0xfd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45.h 
b/arch/arm/include/asm/arch-at91/at91sam9g45.h
index 445f4b2..32bddc9 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
@@ -54,6 +54,7 @@
 #define AT91_EMAC_BASE 0xfffbc000
 #define AT91_SMC_BASE  0xe800
 #define AT91_MATRIX_BASE   0xea00
+#define AT91_DBGU_BASE 0xee00
 #define AT91_PIO_BASE  0xf200
 #define AT91_PMC_BASE  0xfc00
 #define AT91_RSTC_BASE 0xfd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h 
b/arch/arm/include/asm/arch-at91/at91sam9rl.h
index 8eb0d4f..2e6be18 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9rl.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
@@ -47,6 +47,7 @@
 #define AT91_SDRAMC_BASE   0xea00
 #define AT91_SMC_BASE  0xec00
 #define AT91_MATRIX_BASE   0xee00
+#define AT91_DBGU_BASE 0xf200
 #define AT91_PIO_BASE  0xf400
 #define AT91_PMC_BASE  0xfc00
 #define AT91_RSTC_BASE 0xfd00
diff --git a/arch/arm/include/asm/arch-at91/memory-map.h 
b/arch/arm/include/asm/arch-at91/memory-map.h
index d489fa2..fb6d1d3 100644
--- a/arch/arm/include/asm/arch-at91/memory-map.h
+++ b/arch/arm/include/asm/arch-at91/memory-map.h
@@ -29,7 +29,10 @@
 #define USART0_BASE AT91_USART0
 #define USART1_BASE AT91_USART1
 #define USART2_BASE AT91_USART2
-#define USART3_BASE (AT91_BASE_SYS + AT91_DBGU)
+/*
+ *  The UART of DBGU is named USART3.
+*/
+#define USART3_BASE AT91_DBGU_BASE
 #define SPI0_BASE  AT91_BASE_SPI
 #define SPI1_BASE  AT91_BASE_SPI1
 
-- 
1.5.5.6

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[U-Boot] [PATCH] add 1-wire DS2401 serial number chip

2010-05-26 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 drivers/misc/Makefile |1 +
 drivers/misc/ds2401.c |  265 +
 include/ds2401.h  |   36 +++
 3 files changed, 302 insertions(+), 0 deletions(-)
 create mode 100644 drivers/misc/ds2401.c
 create mode 100644 include/ds2401.h

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 96aa331..4355b6e 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -32,6 +32,7 @@ COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
 COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o
 COBJS-$(CONFIG_FSL_PMIC) += fsl_pmic.o
+COBJS-$(CONFIG_DS2401) += ds2401.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/misc/ds2401.c b/drivers/misc/ds2401.c
new file mode 100644
index 000..4298d8a
--- /dev/null
+++ b/drivers/misc/ds2401.c
@@ -0,0 +1,265 @@
+/*
+ * Copyright 2009, 2010
+ * Ilko Iliev il...@ronetix.at
+ * Ronetix Development Tools GmbH www.ronetix.at
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Driver for 1-wire, DS2401, a Silicon Serial Number chip
+ *
+ * Driver usage:
+ *
+ * To build the driver add in a board config file:
+ * #define CONFIG_DS2401 1
+ *
+ * In the board specific file define the get and set functions
+ * to read and write one bit from/to PIO.
+ * 
+ * If you want to set a specific first three bytes of the MAC address
+ * define CONFIG_MAC_OUI.
+ */
+
+#include common.h
+#include command.h
+#include ds2401.h
+
+#ifndef CONFIG_MAC_OUI
+#define CONFIG_MAC_OUI 02:00:00 /* Organizationally Unique Identifier*/
+#endif
+
+static DS2401_FUNCS *DS2401_Funcs = NULL;
+
+/*
+ * Generate a 1-wire reset, return 1 if no presence detect was found,
+ * return 0 otherwise.
+ */
+static int ds2401_reset(void)
+{
+   int result;
+
+   DS2401_Funcs-set(0);
+   udelay(480);
+   DS2401_Funcs-set(1);
+   udelay(70);
+
+   result = DS2401_Funcs-get();
+
+   udelay(410);
+   return result;
+}
+
+/*
+ * Send 1 a 1-wire write bit.
+ * Provide 10us recovery time.
+ */
+static void ds2401_write_bit(int bit)
+{
+   if (bit) {
+   /*
+* write '1' bit
+*/
+   DS2401_Funcs-set(0);
+   udelay(6);
+   DS2401_Funcs-set(1);
+   udelay(64);
+   } else {
+   /*
+* write '0' bit
+*/
+   DS2401_Funcs-set(0);
+   udelay(60);
+   DS2401_Funcs-set(1);
+   udelay(10);
+   }
+}
+
+/*
+ * Read a bit from the 1-wire bus and return it.
+ * Provide 10us recovery time.
+ */
+static int ds2401_read_bit(void)
+{
+   int result;
+
+   DS2401_Funcs-set(0);
+
+#ifdef __OPTIMIZE__
+   udelay(1);
+#endif
+
+   DS2401_Funcs-set(1);
+   udelay(9);
+
+   result = DS2401_Funcs-get();
+   udelay(55);
+
+   return result;
+}
+
+static void ds2401_write_byte(int data)
+{
+   int loop;
+
+   for (loop = 0; loop  8; loop++) {
+   ds2401_write_bit(data  0x01);
+   data = 1;
+   }
+}
+
+static int ds2401_read_byte(void)
+{
+   int loop, result = 0;
+
+   for (loop = 0; loop  8; loop++) {
+   result = 1;
+   if (ds2401_read_bit())
+   result |= 0x80;
+   }
+
+   return result;
+}
+
+static unsigned char ds2401_crc8_table[] = {
+   0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65,
+   157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220,
+   35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98,
+   190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255,
+   70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7,
+   219, 133, 103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154,
+   101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36,
+   248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185,
+   140, 210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113, 147, 
205,
+   17, 79, 173, 243, 112, 46, 204, 146, 211, 141, 111, 49, 178, 236, 14, 
80,
+   175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82

[U-Boot] [PATCH v3] at91: define matrix registers bit fields

2010-04-29 Thread Asen Dimov 
Change since [PATCH v2]: use space instead of tab after #define.

Signed-off-by: Asen Dimov di...@ronetix.at
---
 arch/arm/include/asm/arch-at91/at91_matrix.h |  138 ++
 1 files changed, 138 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h 
b/arch/arm/include/asm/arch-at91/at91_matrix.h
index 981ec20..aa62fe7 100644
--- a/arch/arm/include/asm/arch-at91/at91_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91_matrix.h
@@ -113,4 +113,142 @@ typedef struct at91_matrix {
 
 #define AT91_MATRIX_CSA_EBI1_CS2A  0x0008
 
+#if defined CONFIG_AT91SAM9261
+/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#define AT91_MATRIX_MCFG_RCB0  (1  0)
+/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#define AT91_MATRIX_MCFG_RCB1  (1  1)
+#endif
+
+/* Undefined Length Burst Type */
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
+   defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MCFG_ULBT_INFINITE 0x
+#define AT91_MATRIX_MCFG_ULBT_SINGLE   0x0001
+#define AT91_MATRIX_MCFG_ULBT_FOUR 0x0002
+#define AT91_MATRIX_MCFG_ULBT_EIGHT0x0003
+#define AT91_MATRIX_MCFG_ULBT_SIXTEEN  0x0004
+#endif
+#if defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MCFG_ULBT_THIRTYTWO0x0005
+#define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR0x0006
+#define AT91_MATRIX_MCFG_ULBT_128  0x0007
+#endif
+
+/* Default Master Type */
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_NONE 0x
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_LAST 0x0001
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED0x0002
+
+/* Fixed Index of Default Master */
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263)
+#define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x)  ((x  0xf)  18)
+#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260)
+#define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x)  ((x  7)  18)
+#endif
+
+/* Maximum Number of Allowed Cycles for a Burst */
+#if defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x  0x1ff)  0)
+#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
+   defined(CONFIG_AT91SAM9263)
+#define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x  0xff)  0)
+#endif
+
+/* Arbitration Type */
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263)
+#define AT91_MATRIX_SCFG_ARBT_ROUND_ROBIN  0x
+#define AT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY   0x0100
+#endif
+
+/* Master Remap Control Register */
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
+   defined(CONFIG_AT91SAM9G45)
+/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#define AT91_MATRIX_MRCR_RCB0  (1  0)
+/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#define AT91_MATRIX_MRCR_RCB1  (1  1)
+#endif
+#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MRCR_RCB2  0x0004
+#define AT91_MATRIX_MRCR_RCB3  0x0008
+#define AT91_MATRIX_MRCR_RCB4  0x0010
+#define AT91_MATRIX_MRCR_RCB5  0x0020
+#define AT91_MATRIX_MRCR_RCB6  0x0040
+#define AT91_MATRIX_MRCR_RCB7  0x0080
+#define AT91_MATRIX_MRCR_RCB8  0x0100
+#endif
+#if defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MRCR_RCB9  0x0200
+#define AT91_MATRIX_MRCR_RCB10 0x0400
+#define AT91_MATRIX_MRCR_RCB11 0x0800
+#endif
+
+/* TCM Configuration Register */
+#if defined(CONFIG_AT91SAM9G45)
+/* Size of ITCM enabled memory block */
+#define AT91_MATRIX_TCMR_ITCM_00x
+#define AT91_MATRIX_TCMR_ITCM_32   0x0040
+/* Size of DTCM enabled memory block */
+#define AT91_MATRIX_TCMR_DTCM_00x
+#define AT91_MATRIX_TCMR_DTCM_32   0x0060
+#define AT91_MATRIX_TCMR_DTCM_64   0x0070
+/* Wait state TCM register */
+#define AT91_MATRIX_TCMR_TCM_NO_WS 0x
+#define AT91_MATRIX_TCMR_TCM_ONE_WS0x0800
+#endif
+#if defined(CONFIG_AT91SAM9263)
+/* Size of ITCM enabled memory block */
+#define AT91_MATRIX_TCMR_ITCM_00x
+#define AT91_MATRIX_TCMR_ITCM_16   0x0005
+#define AT91_MATRIX_TCMR_ITCM_32   0x0006
+/* Size of DTCM enabled memory block */
+#define AT91_MATRIX_TCMR_DTCM_00x
+#define AT91_MATRIX_TCMR_DTCM_16   0x0050
+#define AT91_MATRIX_TCMR_DTCM_32   0x0060
+#endif
+#if defined(CONFIG_AT91SAM9261)
+/* Size of ITCM enabled memory block */
+#define AT91_MATRIX_TCMR_ITCM_00x
+#define AT91_MATRIX_TCMR_ITCM_16   0x0005
+#define AT91_MATRIX_TCMR_ITCM_32   0x0006
+#define AT91_MATRIX_TCMR_ITCM_64   0x0007
+/* Size of DTCM enabled memory block */
+#define AT91_MATRIX_TCMR_DTCM_00x
+#define AT91_MATRIX_TCMR_DTCM_16   0x0050
+#define AT91_MATRIX_TCMR_DTCM_32   0x0060
+#define AT91_MATRIX_TCMR_DTCM_64   0x0070
+#endif
+
+#if defined(CONFIG_AT91SAM9G45)
+/* Video

[U-Boot] [PATCH v3] add new board pm9g45

2010-04-20 Thread Asen Dimov 
Add the new board PM9G45 from Ronetix GmbH.
* AT91SAM9G45 MCU at 400Mhz.
* 128MB DDR2 SDRAM
* 256MB NAND
* 10/100 MBits Ethernet DP83848
* Serial number chip DS2401

The board is made as SODIMM200 module.
For more info www.ronatix.at or i...@ronetix.at.

Signed-off-by: Asen Dimov di...@ronetix.at
---
 MAINTAINERS|1 +
 MAKEALL|1 +
 Makefile   |4 +
 board/ronetix/pm9g45/Makefile  |   54 ++
 .../at91sam9m10g45ek = ronetix/pm9g45}/config.mk  |0 
 board/ronetix/pm9g45/pm9g45.c  |  188 
 include/configs/pm9g45.h   |  186 +++
 7 files changed, 434 insertions(+), 0 deletions(-)
 create mode 100644 board/ronetix/pm9g45/Makefile
 copy board/{atmel/at91sam9m10g45ek = ronetix/pm9g45}/config.mk (100%)
 create mode 100644 board/ronetix/pm9g45/pm9g45.c
 create mode 100644 include/configs/pm9g45.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 0e759c9..a3993fc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -224,6 +224,7 @@ Ilko Iliev il...@ronetix.at
 
PM9261  AT91SAM9261
PM9263  AT91SAM9263
+   PM9G45  ARM926EJS (AT91SAM9G45 SoC)
 
 Gary Jennejohn ga...@denx.de
 
diff --git a/MAKEALL b/MAKEALL
index b15d407..911983e 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -672,6 +672,7 @@ LIST_at91= \
otc570  \
pm9261  \
pm9263  \
+   pm9g45  \
SBC35_A9G20 \
TNY_A9260   \
TNY_A9G20   \
diff --git a/Makefile b/Makefile
index 8b4e0b9..46845a5 100644
--- a/Makefile
+++ b/Makefile
@@ -2871,6 +2871,10 @@ otc570_config:   unconfig
 pm9263_config  :   unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
 
+pm9g45_config  :   unconfig
+   @mkdir -p $(obj)include
+   @$(MKCONFIG) -a pm9g45 arm arm926ejs pm9g45 ronetix at91
+
 SBC35_A9G20_NANDFLASH_config \
 SBC35_A9G20_EEPROM_config \
 SBC35_A9G20_config :   unconfig
diff --git a/board/ronetix/pm9g45/Makefile b/board/ronetix/pm9g45/Makefile
new file mode 100644
index 000..dd5b02e
--- /dev/null
+++ b/board/ronetix/pm9g45/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop stelian@leadtechdesign.com
+# Lead Tech Design www.leadtechdesign.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y += pm9g45.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/atmel/at91sam9m10g45ek/config.mk 
b/board/ronetix/pm9g45/config.mk
similarity index 100%
copy from board/atmel/at91sam9m10g45ek/config.mk
copy to board/ronetix/pm9g45/config.mk
diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
new file mode 100644
index 000..3b4d9a3
--- /dev/null
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -0,0 +1,188 @@
+/*
+ * (C) Copyright 2010
+ * Ilko Iliev il...@ronetix.at
+ * Asen Dimov di...@ronetix.at
+ * Ronetix GmbH www.ronetix.at
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop stelian@leadtechdesign.com
+ * Lead Tech Design www.leadtechdesign.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License

[U-Boot] [PATCH] at91: define matrix registers bit fields

2010-04-19 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 arch/arm/include/asm/arch-at91/at91_matrix.h |  138 ++
 1 files changed, 138 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h 
b/arch/arm/include/asm/arch-at91/at91_matrix.h
index 981ec20..60fd75b 100644
--- a/arch/arm/include/asm/arch-at91/at91_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91_matrix.h
@@ -113,4 +113,142 @@ typedef struct at91_matrix {
 
 #define AT91_MATRIX_CSA_EBI1_CS2A  0x0008
 
+#if defined(CONFIG_AT91SAM9261)
+/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#defineAT91_MATRIX_MCFG_RCB0   (1  0)
+/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#defineAT91_MATRIX_MCFG_RCB1   (1  1)
+#endif
+
+/* Undefined Length Burst Type */
+#if defiled(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
+   defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MCFG_ULBT_INFINITE 0x
+#define AT91_MATRIX_MCFG_ULBT_SINGLE   0x0001
+#define AT91_MATRIX_MCFG_ULBT_FOUR 0x0002
+#define AT91_MATRIX_MCFG_ULBT_EIGHT0x0003
+#define AT91_MATRIX_MCFG_ULBT_SIXTEEN  0x0004
+#endif
+#if defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MCFG_ULBT_THIRTYTWO0x0005
+#define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR0x0006
+#define AT91_MATRIX_MCFG_ULBT_128  0x0007
+#endif
+
+/* Default Master Type */
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_NONE 0x
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_LAST 0x0001
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED0x0002
+
+/* Fixed Index of Default Master */
+#if defiled(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263)
+#defineAT91_MATRIX_SCFG_FIXED_DEFMSTR(x)   ((x  0xf)  18)
+#elif defiled(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260)
+#defineAT91_MATRIX_SCFG_FIXED_DEFMSTR(x)   ((x  7)  18)
+#endif
+
+/* Maximum Number of Allowed Cycles for a Burst */
+#if defiled(CONFIG_AT91SAM9G45)
+#defineAT91_MATRIX_SCFG_SLOT_CYCLE(x)  ((x  0x1ff)  0)
+#elif defiled(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
+   defined(CONFIG_AT91SAM9G45)
+#defineAT91_MATRIX_SCFG_SLOT_CYCLE(x)  ((x  0xff)  0)
+#endif
+
+/* Arbitration Type */
+#if defiled(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263)
+#defineAT91_MATRIX_SCFG_ARBT_ROUND_ROBIN   0x
+#defineAT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY0x0100
+#endif
+
+/* Master Remap Control Register */
+#elif defiled(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
+   defined(CONFIG_AT91SAM9G45)
+/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#defineAT91_MATRIX_MRCR_RCB0   (1  0)
+/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#defineAT91_MATRIX_MRCR_RCB1   (1  1)
+#endif
+#if defiled(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45)
+#defineAT91_MATRIX_MRCR_RCB2   0x0004
+#defineAT91_MATRIX_MRCR_RCB3   0x0008
+#defineAT91_MATRIX_MRCR_RCB4   0x0010
+#defineAT91_MATRIX_MRCR_RCB5   0x0020
+#defineAT91_MATRIX_MRCR_RCB6   0x0040
+#defineAT91_MATRIX_MRCR_RCB7   0x0080
+#defineAT91_MATRIX_MRCR_RCB8   0x0100
+#endif
+#if defiled(CONFIG_AT91SAM9G45)
+#defineAT91_MATRIX_MRCR_RCB9   0x0200
+#defineAT91_MATRIX_MRCR_RCB10  0x0400
+#defineAT91_MATRIX_MRCR_RCB11  0x0800
+#endif
+
+/* TCM Configuration Register */
+#if defiled(CONFIG_AT91SAM9G45)
+/* Size of ITCM enabled memory block */
+#defineAT91_MATRIX_TCMR_ITCM_0 0x
+#defineAT91_MATRIX_TCMR_ITCM_320x0040
+/* Size of DTCM enabled memory block */
+#defineAT91_MATRIX_TCMR_DTCM_0 0x
+#defineAT91_MATRIX_TCMR_DTCM_320x0060
+#defineAT91_MATRIX_TCMR_DTCM_640x0070
+/* Wait state TCM register */
+#defineAT91_MATRIX_TCMR_TCM_NO_WS  0x
+#defineAT91_MATRIX_TCMR_TCM_ONE_WS 0x0800
+#endif
+#if defiled(CONFIG_AT91SAM9263)
+/* Size of ITCM enabled memory block */
+#defineAT91_MATRIX_TCMR_ITCM_0 0x
+#defineAT91_MATRIX_TCMR_ITCM_160x0005
+#defineAT91_MATRIX_TCMR_ITCM_320x0006
+/* Size of DTCM enabled memory block */
+#defineAT91_MATRIX_TCMR_DTCM_0 0x
+#defineAT91_MATRIX_TCMR_DTCM_160x0050
+#defineAT91_MATRIX_TCMR_DTCM_320x0060
+#endif
+#if defiled(CONFIG_AT91SAM9261)
+/* Size of ITCM enabled memory block */
+#defineAT91_MATRIX_TCMR_ITCM_0 0x
+#defineAT91_MATRIX_TCMR_ITCM_160x0005
+#defineAT91_MATRIX_TCMR_ITCM_320x0006
+#defineAT91_MATRIX_TCMR_ITCM_640x0007
+/* Size of DTCM enabled memory block */
+#defineAT91_MATRIX_TCMR_DTCM_0 0x
+#define

[U-Boot] [PATCH v2] at91: define matrix registers bit fields

2010-04-19 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 arch/arm/include/asm/arch-at91/at91_matrix.h |  138 ++
 1 files changed, 138 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h 
b/arch/arm/include/asm/arch-at91/at91_matrix.h
index 981ec20..f99b1d4 100644
--- a/arch/arm/include/asm/arch-at91/at91_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91_matrix.h
@@ -113,4 +113,142 @@ typedef struct at91_matrix {
 
 #define AT91_MATRIX_CSA_EBI1_CS2A  0x0008
 
+#if defined CONFIG_AT91SAM9261
+/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#defineAT91_MATRIX_MCFG_RCB0   (1  0)
+/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#defineAT91_MATRIX_MCFG_RCB1   (1  1)
+#endif
+
+/* Undefined Length Burst Type */
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
+   defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MCFG_ULBT_INFINITE 0x
+#define AT91_MATRIX_MCFG_ULBT_SINGLE   0x0001
+#define AT91_MATRIX_MCFG_ULBT_FOUR 0x0002
+#define AT91_MATRIX_MCFG_ULBT_EIGHT0x0003
+#define AT91_MATRIX_MCFG_ULBT_SIXTEEN  0x0004
+#endif
+#if defined(CONFIG_AT91SAM9G45)
+#define AT91_MATRIX_MCFG_ULBT_THIRTYTWO0x0005
+#define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR0x0006
+#define AT91_MATRIX_MCFG_ULBT_128  0x0007
+#endif
+
+/* Default Master Type */
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_NONE 0x
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_LAST 0x0001
+#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED0x0002
+
+/* Fixed Index of Default Master */
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263)
+#defineAT91_MATRIX_SCFG_FIXED_DEFMSTR(x)   ((x  0xf)  18)
+#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260)
+#defineAT91_MATRIX_SCFG_FIXED_DEFMSTR(x)   ((x  7)  18)
+#endif
+
+/* Maximum Number of Allowed Cycles for a Burst */
+#if defined(CONFIG_AT91SAM9G45)
+#defineAT91_MATRIX_SCFG_SLOT_CYCLE(x)  ((x  0x1ff)  0)
+#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
+   defined(CONFIG_AT91SAM9263)
+#defineAT91_MATRIX_SCFG_SLOT_CYCLE(x)  ((x  0xff)  0)
+#endif
+
+/* Arbitration Type */
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263)
+#defineAT91_MATRIX_SCFG_ARBT_ROUND_ROBIN   0x
+#defineAT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY0x0100
+#endif
+
+/* Master Remap Control Register */
+#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
+   defined(CONFIG_AT91SAM9G45)
+/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#defineAT91_MATRIX_MRCR_RCB0   (1  0)
+/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#defineAT91_MATRIX_MRCR_RCB1   (1  1)
+#endif
+#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45)
+#defineAT91_MATRIX_MRCR_RCB2   0x0004
+#defineAT91_MATRIX_MRCR_RCB3   0x0008
+#defineAT91_MATRIX_MRCR_RCB4   0x0010
+#defineAT91_MATRIX_MRCR_RCB5   0x0020
+#defineAT91_MATRIX_MRCR_RCB6   0x0040
+#defineAT91_MATRIX_MRCR_RCB7   0x0080
+#defineAT91_MATRIX_MRCR_RCB8   0x0100
+#endif
+#if defined(CONFIG_AT91SAM9G45)
+#defineAT91_MATRIX_MRCR_RCB9   0x0200
+#defineAT91_MATRIX_MRCR_RCB10  0x0400
+#defineAT91_MATRIX_MRCR_RCB11  0x0800
+#endif
+
+/* TCM Configuration Register */
+#if defined(CONFIG_AT91SAM9G45)
+/* Size of ITCM enabled memory block */
+#defineAT91_MATRIX_TCMR_ITCM_0 0x
+#defineAT91_MATRIX_TCMR_ITCM_320x0040
+/* Size of DTCM enabled memory block */
+#defineAT91_MATRIX_TCMR_DTCM_0 0x
+#defineAT91_MATRIX_TCMR_DTCM_320x0060
+#defineAT91_MATRIX_TCMR_DTCM_640x0070
+/* Wait state TCM register */
+#defineAT91_MATRIX_TCMR_TCM_NO_WS  0x
+#defineAT91_MATRIX_TCMR_TCM_ONE_WS 0x0800
+#endif
+#if defined(CONFIG_AT91SAM9263)
+/* Size of ITCM enabled memory block */
+#defineAT91_MATRIX_TCMR_ITCM_0 0x
+#defineAT91_MATRIX_TCMR_ITCM_160x0005
+#defineAT91_MATRIX_TCMR_ITCM_320x0006
+/* Size of DTCM enabled memory block */
+#defineAT91_MATRIX_TCMR_DTCM_0 0x
+#defineAT91_MATRIX_TCMR_DTCM_160x0050
+#defineAT91_MATRIX_TCMR_DTCM_320x0060
+#endif
+#if defined(CONFIG_AT91SAM9261)
+/* Size of ITCM enabled memory block */
+#defineAT91_MATRIX_TCMR_ITCM_0 0x
+#defineAT91_MATRIX_TCMR_ITCM_160x0005
+#defineAT91_MATRIX_TCMR_ITCM_320x0006
+#defineAT91_MATRIX_TCMR_ITCM_640x0007
+/* Size of DTCM enabled memory block */
+#defineAT91_MATRIX_TCMR_DTCM_0 0x
+#define

[U-Boot] [PATCH v2] pm9263 converted to at91 soc access

2010-04-19 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 board/ronetix/pm9263/led.c|   15 ++--
 board/ronetix/pm9263/pm9263.c |  195 +
 include/configs/pm9263.h  |   87 +-
 3 files changed, 152 insertions(+), 145 deletions(-)

diff --git a/board/ronetix/pm9263/led.c b/board/ronetix/pm9263/led.c
index fe1a1d2..4e585a4 100644
--- a/board/ronetix/pm9263/led.c
+++ b/board/ronetix/pm9263/led.c
@@ -26,18 +26,19 @@
 #include common.h
 #include asm/arch/at91sam9263.h
 #include asm/arch/at91_pmc.h
-#include asm/arch/gpio.h
+#include asm/arch/at91_pio.h
 #include asm/arch/io.h
 
 void coloured_LED_init(void)
 {
+   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
/* Enable clock */
-   at91_sys_write(AT91_PMC_PCER, 1  AT91SAM9263_ID_PIOB |
- 1  AT91SAM9263_ID_PIOCDE);
+   writel(1  AT91SAM9263_ID_PIOB, pmc-pcer);
 
-   at91_set_gpio_output(CONFIG_RED_LED, 1);
-   at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+   at91_set_pio_output(CONFIG_RED_LED, 1);
+   at91_set_pio_output(CONFIG_GREEN_LED, 1);
 
-   at91_set_gpio_value(CONFIG_RED_LED, 0);
-   at91_set_gpio_value(CONFIG_GREEN_LED, 1);
+   at91_set_pio_value(CONFIG_RED_LED, 0);
+   at91_set_pio_value(CONFIG_GREEN_LED, 1);
 }
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c
index 23ea154..c7835de 100644
--- a/board/ronetix/pm9263/pm9263.c
+++ b/board/ronetix/pm9263/pm9263.c
@@ -27,13 +27,13 @@
 #include common.h
 #include asm/sizes.h
 #include asm/arch/at91sam9263.h
-#include asm/arch/at91sam9263_matrix.h
 #include asm/arch/at91sam9_smc.h
 #include asm/arch/at91_common.h
 #include asm/arch/at91_pmc.h
 #include asm/arch/at91_rstc.h
+#include asm/arch/at91_matrix.h
+#include asm/arch/at91_pio.h
 #include asm/arch/clk.h
-#include asm/arch/gpio.h
 #include asm/arch/io.h
 #include asm/arch/hardware.h
 #include lcd.h
@@ -55,52 +55,59 @@ DECLARE_GLOBAL_DATA_PTR;
 static void pm9263_nand_hw_init(void)
 {
unsigned long csa;
+   at91_smc_t  *smc= (at91_smc_t *) AT91_SMC0_BASE;
+   at91_matrix_t   *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
 
/* Enable CS3 */
-   csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
-   at91_sys_write(AT91_MATRIX_EBI0CSA,
-  csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
+   csa = readl(matrix-csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
+   writel(csa, matrix-csa[0]);
 
/* Configure SMC CS3 for NAND/SmartMedia */
-   at91_sys_write(AT91_SMC_SETUP(3),
-  AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(1) |
-  AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(1));
-   at91_sys_write(AT91_SMC_PULSE(3),
-  AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-  AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-   at91_sys_write(AT91_SMC_CYCLE(3),
-  AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-   at91_sys_write(AT91_SMC_MODE(3),
-  AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-  AT91_SMC_EXNWMODE_DISABLE |
+   writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
+   AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
+   smc-cs[3].setup);
+
+   writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+   AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+   smc-cs[3].pulse);
+
+   writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+   smc-cs[3].cycle);
+
+   writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+   AT91_SMC_MODE_EXNW_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
-  AT91_SMC_DBW_16 |
+   AT91_SMC_MODE_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
-  AT91_SMC_DBW_8 |
+   AT91_SMC_MODE_DBW_8 |
 #endif
-  AT91_SMC_TDF_(2));
+   AT91_SMC_MODE_TDF_CYCLE(2),
+   smc-cs[3].mode);
 
/* Configure RDY/BSY */
-   at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+   at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
/* Enable NandFlash */
-   at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+   at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif
 
 #ifdef CONFIG_MACB
 static void pm9263_macb_hw_init(void)
 {
+   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pio_t  *pio= (at91_pio_t *) AT91_PIO_BASE;
+
/*
 * PB27 enables the 50MHz oscillator for Ethernet PHY
 * 1 - enable
 * 0 - disable
 */
-   at91_set_gpio_output(AT91_PIN_PB27, 1);
-   at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */
+   at91_set_pio_output(AT91_PIO_PORTB, 27, 1);
+   at91_set_pio_value(AT91_PIO_PORTB, 27, 1); /* 1- enable, 0 - disable

Re: [U-Boot] [PATCH] pm9263 converted to at91 soc access

2010-04-13 Thread RONETIX - Asen Dimov 
Tom wrote:
 Asen Dimov wrote:
 Signed-off-by: Asen Dimov di...@ronetix.at
 ---
  board/ronetix/pm9263/led.c|   15 ++--
  board/ronetix/pm9263/pm9263.c |  195 
 +
  include/configs/pm9263.h  |   82 -
  3 files changed, 146 insertions(+), 146 deletions(-)

 diff --git a/board/ronetix/pm9263/led.c b/board/ronetix/pm9263/led.c
 index fe1a1d2..4e585a4 100644
 --- a/board/ronetix/pm9263/led.c
 +++ b/board/ronetix/pm9263/led.c
 @@ -26,18 +26,19 @@
  #include common.h
  #include asm/arch/at91sam9263.h
  #include asm/arch/at91_pmc.h
 -#include asm/arch/gpio.h
 +#include asm/arch/at91_pio.h
  #include asm/arch/io.h
  
  void coloured_LED_init(void)
  {
 +at91_pmc_t*pmc= (at91_pmc_t *) AT91_PMC_BASE;
 +
  /* Enable clock */
 -at91_sys_write(AT91_PMC_PCER, 1  AT91SAM9263_ID_PIOB |
 -  1  AT91SAM9263_ID_PIOCDE);
 +writel(1  AT91SAM9263_ID_PIOB, pmc-pcer);

 Missing PICOCDE..
 Is this ok ?

The two leds are on PIOB, no leds on PIO: C, D or E.
It is ok.
  
 -at91_set_gpio_output(CONFIG_RED_LED, 1);
 -at91_set_gpio_output(CONFIG_GREEN_LED, 1);
 +at91_set_pio_output(CONFIG_RED_LED, 1);
 +at91_set_pio_output(CONFIG_GREEN_LED, 1);
  
 -at91_set_gpio_value(CONFIG_RED_LED, 0);
 -at91_set_gpio_value(CONFIG_GREEN_LED, 1);
 +at91_set_pio_value(CONFIG_RED_LED, 0);
 +at91_set_pio_value(CONFIG_GREEN_LED, 1);
  }
 diff --git a/board/ronetix/pm9263/pm9263.c 
 b/board/ronetix/pm9263/pm9263.c
 index 23ea154..83371e5 100644
 --- a/board/ronetix/pm9263/pm9263.c
 +++ b/board/ronetix/pm9263/pm9263.c
 @@ -27,13 +27,13 @@
  #include common.h
  #include asm/sizes.h
  #include asm/arch/at91sam9263.h
 -#include asm/arch/at91sam9263_matrix.h
  #include asm/arch/at91sam9_smc.h
  #include asm/arch/at91_common.h
  #include asm/arch/at91_pmc.h
  #include asm/arch/at91_rstc.h
 +#include asm/arch/at91_matrix.h
 +#include asm/arch/at91_pio.h
  #include asm/arch/clk.h
 -#include asm/arch/gpio.h
  #include asm/arch/io.h
  #include asm/arch/hardware.h
  #include lcd.h
 @@ -55,52 +55,59 @@ DECLARE_GLOBAL_DATA_PTR;
  static void pm9263_nand_hw_init(void)
  {
  unsigned long csa;
 +at91_smc_t *smc = (at91_smc_t *) AT91_SMC0_BASE;
 +at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
  
  /* Enable CS3 */
 -csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
 -at91_sys_write(AT91_MATRIX_EBI0CSA,
 -   csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 +csa = readl(matrix-csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
 +writel(csa, matrix-csa[0]);

 Missing SMARTMEDIA
 Is this ok?

AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA sets the SMARTMEDIA bit and
AT91_MATRIX_CSA_EBI_CS3A sets the SMARTMEDIA bit too.
It is ok.
  
  /* Configure SMC CS3 for NAND/SmartMedia */
 -at91_sys_write(AT91_SMC_SETUP(3),
 -   AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(1) |
 -   AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(1));
 -at91_sys_write(AT91_SMC_PULSE(3),
 -   AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
 -   AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
 -at91_sys_write(AT91_SMC_CYCLE(3),
 -   AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
 -at91_sys_write(AT91_SMC_MODE(3),
 -   AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
 -   AT91_SMC_EXNWMODE_DISABLE |
 +writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
 +AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
 +smc-cs[3].setup);
 +
 +writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
 +AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
 +smc-cs[3].pulse);
 +
 +writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
 +smc-cs[3].cycle);
 +
 +writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
 +AT91_SMC_MODE_EXNW_DISABLE |
  #ifdef CONFIG_SYS_NAND_DBW_16
 -   AT91_SMC_DBW_16 |
 +AT91_SMC_MODE_DBW_16 |
  #else /* CONFIG_SYS_NAND_DBW_8 */
 -   AT91_SMC_DBW_8 |
 +AT91_SMC_MODE_DBW_8 |
  #endif
 -   AT91_SMC_TDF_(2));
 +AT91_SMC_MODE_TDF_CYCLE(2),
 +smc-cs[3].mode);
  
  /* Configure RDY/BSY */
 -at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 +at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  
  /* Enable NandFlash */
 -at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 +at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  }
  #endif
  
  #ifdef CONFIG_MACB
  static void pm9263_macb_hw_init(void)
  {
 +at91_pmc_t*pmc= (at91_pmc_t *) AT91_PMC_BASE;
 +at91_pio_t*pio= (at91_pio_t *) AT91_PIO_BASE;
 +
  /*
   * PB27 enables the 50MHz oscillator for Ethernet PHY
   * 1 - enable
   * 0 - disable
   */
 -at91_set_gpio_output(AT91_PIN_PB27, 1);
 -at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable

[U-Boot] [PATCH] pm9263: remove CONFIG_CMD_AUTOSCRIPT

2010-04-07 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 include/configs/pm9263.h |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 807dba8..f854f38 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -215,7 +215,6 @@
 #include config_cmd_default.h
 #undef CONFIG_CMD_BDI
 #undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
-- 
1.5.5.6

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[U-Boot] [PATCH] pm9263 converted to at91 soc access

2010-04-07 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 board/ronetix/pm9263/led.c|   15 ++--
 board/ronetix/pm9263/pm9263.c |  195 +
 include/configs/pm9263.h  |   82 -
 3 files changed, 146 insertions(+), 146 deletions(-)

diff --git a/board/ronetix/pm9263/led.c b/board/ronetix/pm9263/led.c
index fe1a1d2..4e585a4 100644
--- a/board/ronetix/pm9263/led.c
+++ b/board/ronetix/pm9263/led.c
@@ -26,18 +26,19 @@
 #include common.h
 #include asm/arch/at91sam9263.h
 #include asm/arch/at91_pmc.h
-#include asm/arch/gpio.h
+#include asm/arch/at91_pio.h
 #include asm/arch/io.h
 
 void coloured_LED_init(void)
 {
+   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
/* Enable clock */
-   at91_sys_write(AT91_PMC_PCER, 1  AT91SAM9263_ID_PIOB |
- 1  AT91SAM9263_ID_PIOCDE);
+   writel(1  AT91SAM9263_ID_PIOB, pmc-pcer);
 
-   at91_set_gpio_output(CONFIG_RED_LED, 1);
-   at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+   at91_set_pio_output(CONFIG_RED_LED, 1);
+   at91_set_pio_output(CONFIG_GREEN_LED, 1);
 
-   at91_set_gpio_value(CONFIG_RED_LED, 0);
-   at91_set_gpio_value(CONFIG_GREEN_LED, 1);
+   at91_set_pio_value(CONFIG_RED_LED, 0);
+   at91_set_pio_value(CONFIG_GREEN_LED, 1);
 }
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c
index 23ea154..83371e5 100644
--- a/board/ronetix/pm9263/pm9263.c
+++ b/board/ronetix/pm9263/pm9263.c
@@ -27,13 +27,13 @@
 #include common.h
 #include asm/sizes.h
 #include asm/arch/at91sam9263.h
-#include asm/arch/at91sam9263_matrix.h
 #include asm/arch/at91sam9_smc.h
 #include asm/arch/at91_common.h
 #include asm/arch/at91_pmc.h
 #include asm/arch/at91_rstc.h
+#include asm/arch/at91_matrix.h
+#include asm/arch/at91_pio.h
 #include asm/arch/clk.h
-#include asm/arch/gpio.h
 #include asm/arch/io.h
 #include asm/arch/hardware.h
 #include lcd.h
@@ -55,52 +55,59 @@ DECLARE_GLOBAL_DATA_PTR;
 static void pm9263_nand_hw_init(void)
 {
unsigned long csa;
+   at91_smc_t  *smc= (at91_smc_t *) AT91_SMC0_BASE;
+   at91_matrix_t   *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
 
/* Enable CS3 */
-   csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
-   at91_sys_write(AT91_MATRIX_EBI0CSA,
-  csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
+   csa = readl(matrix-csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
+   writel(csa, matrix-csa[0]);
 
/* Configure SMC CS3 for NAND/SmartMedia */
-   at91_sys_write(AT91_SMC_SETUP(3),
-  AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(1) |
-  AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(1));
-   at91_sys_write(AT91_SMC_PULSE(3),
-  AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-  AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-   at91_sys_write(AT91_SMC_CYCLE(3),
-  AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-   at91_sys_write(AT91_SMC_MODE(3),
-  AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-  AT91_SMC_EXNWMODE_DISABLE |
+   writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
+   AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
+   smc-cs[3].setup);
+
+   writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+   AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+   smc-cs[3].pulse);
+
+   writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+   smc-cs[3].cycle);
+
+   writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+   AT91_SMC_MODE_EXNW_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
-  AT91_SMC_DBW_16 |
+   AT91_SMC_MODE_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
-  AT91_SMC_DBW_8 |
+   AT91_SMC_MODE_DBW_8 |
 #endif
-  AT91_SMC_TDF_(2));
+   AT91_SMC_MODE_TDF_CYCLE(2),
+   smc-cs[3].mode);
 
/* Configure RDY/BSY */
-   at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+   at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
/* Enable NandFlash */
-   at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+   at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif
 
 #ifdef CONFIG_MACB
 static void pm9263_macb_hw_init(void)
 {
+   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pio_t  *pio= (at91_pio_t *) AT91_PIO_BASE;
+
/*
 * PB27 enables the 50MHz oscillator for Ethernet PHY
 * 1 - enable
 * 0 - disable
 */
-   at91_set_gpio_output(AT91_PIN_PB27, 1);
-   at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */
+   at91_set_pio_output(AT91_PIO_PORTB, 27, 1);
+   at91_set_pio_value(AT91_PIO_PORTB, 27, 1); /* 1- enable, 0 - disable

[U-Boot] [PATCH] pm9261: remove CONFIG_CMD_AUTOSCRIPT

2010-04-06 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 include/configs/pm9261.h |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 47bb8c0..41e28d3 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -200,7 +200,6 @@
 #include config_cmd_default.h
 #undef CONFIG_CMD_BDI
 #undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
-- 
1.5.5.6

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[U-Boot] [PATCH] pm9261 converted to at91 soc access

2010-04-06 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 board/ronetix/pm9261/led.c|   18 +++--
 board/ronetix/pm9261/pm9261.c |  152 +++-
 include/configs/pm9261.h  |   68 +--
 3 files changed, 130 insertions(+), 108 deletions(-)

diff --git a/board/ronetix/pm9261/led.c b/board/ronetix/pm9261/led.c
index 396c3e7..ff21ce6 100644
--- a/board/ronetix/pm9261/led.c
+++ b/board/ronetix/pm9261/led.c
@@ -26,19 +26,21 @@
 #include common.h
 #include asm/arch/at91sam9261.h
 #include asm/arch/at91_pmc.h
-#include asm/arch/gpio.h
+#include asm/arch/at91_pio.h
 #include asm/arch/io.h
 
 void coloured_LED_init(void)
 {
+   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+
/* Enable clock */
-   at91_sys_write(AT91_PMC_PCER, 1  AT91SAM9261_ID_PIOC);
+   writel(1  AT91SAM9261_ID_PIOC, pmc-pcer);
 
-   at91_set_gpio_output(CONFIG_RED_LED, 1);
-   at91_set_gpio_output(CONFIG_GREEN_LED, 1);
-   at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
+   at91_set_pio_output(CONFIG_RED_LED, 1);
+   at91_set_pio_output(CONFIG_GREEN_LED, 1);
+   at91_set_pio_output(CONFIG_YELLOW_LED, 1);
 
-   at91_set_gpio_value(CONFIG_RED_LED, 0);
-   at91_set_gpio_value(CONFIG_GREEN_LED, 1);
-   at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
+   at91_set_pio_value(CONFIG_RED_LED, 0);
+   at91_set_pio_value(CONFIG_GREEN_LED, 1);
+   at91_set_pio_value(CONFIG_YELLOW_LED, 1);
 }
diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c
index 8662339..53d8c48 100644
--- a/board/ronetix/pm9261/pm9261.c
+++ b/board/ronetix/pm9261/pm9261.c
@@ -27,13 +27,14 @@
 #include common.h
 #include asm/sizes.h
 #include asm/arch/at91sam9261.h
-#include asm/arch/at91sam9261_matrix.h
 #include asm/arch/at91sam9_smc.h
 #include asm/arch/at91_common.h
 #include asm/arch/at91_pmc.h
 #include asm/arch/at91_rstc.h
+#include asm/arch/at91_matrix.h
+#include asm/arch/at91_pio.h
 #include asm/arch/clk.h
-#include asm/arch/gpio.h
+#include asm/arch/at91_pio.h
 #include asm/arch/io.h
 #include asm/arch/hardware.h
 #include lcd.h
@@ -55,39 +56,48 @@ DECLARE_GLOBAL_DATA_PTR;
 static void pm9261_nand_hw_init(void)
 {
unsigned long csa;
+   at91_smc_t  *smc= (at91_smc_t *) AT91_SMC_BASE;
+   at91_matrix_t   *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
 
/* Enable CS3 */
-   csa = at91_sys_read(AT91_MATRIX_EBICSA);
-   at91_sys_write(AT91_MATRIX_EBICSA,
-  csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+   csa = readl(matrix-csa) | AT91_MATRIX_CSA_EBI_CS3A;
+   writel(csa, matrix-csa);
 
/* Configure SMC CS3 for NAND/SmartMedia */
-   at91_sys_write(AT91_SMC_SETUP(3),
-  AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
-  AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-   at91_sys_write(AT91_SMC_PULSE(3),
-  AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-  AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-   at91_sys_write(AT91_SMC_CYCLE(3),
-  AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-   at91_sys_write(AT91_SMC_MODE(3),
-  AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-  AT91_SMC_EXNWMODE_DISABLE |
+   writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+   AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+   smc-cs[3].setup);
+
+   writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+   AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+   smc-cs[3].pulse);
+
+   writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+   smc-cs[3].cycle);
+
+   writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+   AT91_SMC_MODE_EXNW_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
-  AT91_SMC_DBW_16 |
+   AT91_SMC_MODE_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
-  AT91_SMC_DBW_8 |
+   AT91_SMC_MODE_DBW_8 |
 #endif
-  AT91_SMC_TDF_(2));
+   AT91_SMC_MODE_TDF_CYCLE(2),
+   smc-cs[3].mode);
+
+   writel(1  AT91SAM9261_ID_PIOA |
+   1  AT91SAM9261_ID_PIOC,
+   pmc-pcer);
 
/* Configure RDY/BSY */
-   at91_set_gpio_input(AT91_PIN_PA16, 1);
+   at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
/* Enable NandFlash */
-   at91_set_gpio_output(AT91_PIN_PC14, 1);
+   at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 
-   at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
-   at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
+   at91_set_a_periph(AT91_PIO_PORTC, 0, 0);/* NANDOE */
+   at91_set_a_periph(AT91_PIO_PORTC, 1, 0);/* NANDWE */
 }
 #endif
 
@@ -95,23 +105,30

Re: [U-Boot] [PATCH] add new board pm9g45

2010-03-30 Thread RONETIX - Asen Dimov 
Hello Tom,

In respond of the message  4ba51dad.5020...@windriver.com you wrote:

there is a second version of the this patch in e-mail with message-id  
1268928021-31632-1-git-send-email-di...@ronetix.at and subject 
[U-Boot][PATCH v2] add new board pm9g45 from 18.03.2010.

Regards,
Asen
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[U-Boot] [PATCH] correct a syntax typo in at91_matrix.h

2010-03-18 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 include/asm-arm/arch-at91/at91_matrix.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/asm-arm/arch-at91/at91_matrix.h 
b/include/asm-arm/arch-at91/at91_matrix.h
index 9b3c110..981ec20 100644
--- a/include/asm-arm/arch-at91/at91_matrix.h
+++ b/include/asm-arm/arch-at91/at91_matrix.h
@@ -80,7 +80,7 @@ typedef struct at91_matrix {
u32 mrcr;   /* 0x100 Master Remap Control */
u32 reserve4[3];
 #ifdefined(CONFIG_AT91SAM9G45)
-   u32 ccr[52] /* 0x110 - 0x1E0 Chip Configuration */
+   u32 ccr[52];/* 0x110 - 0x1E0 Chip Configuration */
u32 womr;   /* 0x1E4 Write Protect Mode  */
u32 wpsr;   /* 0x1E8 Write Protect Status */
u32 resg45_1[10];
-- 
1.5.5.6

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[U-Boot] [PATCH] using AT91_PMC_MCKR_MDIV_ instead of LEGACY one in at91/clock.c

2010-03-18 Thread Asen Dimov 

Signed-off-by: Asen Dimov di...@ronetix.at
---
 cpu/arm926ejs/at91/clock.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/cpu/arm926ejs/at91/clock.c b/cpu/arm926ejs/at91/clock.c
index b06d760..ecf91f5 100644
--- a/cpu/arm926ejs/at91/clock.c
+++ b/cpu/arm926ejs/at91/clock.c
@@ -203,7 +203,8 @@ int at91_clock_init(unsigned long main_clock)
if (mckr  AT91_PMC_MCKR_MDIV_MASK)
freq /= 2;  /* processor clock division */
 #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
-   mck_rate_hz = (mckr  AT91_PMC_MCKR_MDIV_MASK) == AT91SAM9_PMC_MDIV_3
+   mck_rate_hz = (mckr  AT91_PMC_MCKR_MDIV_MASK) ==
+   (AT91_PMC_MCKR_MDIV_2 | AT91_PMC_MCKR_MDIV_4)
? freq / 3
: freq / (1  ((mckr  AT91_PMC_MCKR_MDIV_MASK)  8));
 #else
-- 
1.5.5.6

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Re: [U-Boot] [PATCH] add new board pm9g45

2010-03-17 Thread RONETIX - Asen Dimov 

Hello Wolfgang,

in the message 20100316190012.84ca750...@gemini.denx.de form 
16.03.2010 at 09:00 PM

+#ifdef CONFIG_LCD
+/*
+ * LCD name TX09D50VM1CCA
+ */
+vidinfo_t panel_info = {
+   vl_col: 240,
+   vl_row: 320,
+   vl_clk: 4965000,
+   vl_sync:ATMEL_LCDC_INVLINE_NORMAL |
+   ATMEL_LCDC_INVFRAME_NORMAL,
+   vl_bpix:3,
+   vl_tft: 1,
+   vl_hsync_len:   5,
+   vl_left_margin: 1,
+   vl_right_margin:33,
+   vl_vsync_len:   1,
+   vl_upper_margin:1,
+   vl_lower_margin:0,
+   mmio:   AT91SAM9G45_LCDC_BASE,
+};



This information should not be board-specific. The panel information
is generic and should moved to a separate header file that is not part
of the board code.


  
In the boards (at91sam9263ek and at91sam9m10g45ek, and some more 
at91sam9 based boards) I am looking at, the panel_info is in the board 
specific code.
There are some lcd.c files with panel_info structures: 
drivers/video/mx3fb.c, cpu/pxa/pxafb.c and  cpu/mpc8xx/lcd.c .


Where should be the proper place for panel_info which is somehow 
architecture dependent?


Regards,
Asen




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[U-Boot] [PATCH] add new board pm9g45

2010-03-16 Thread Asen Dimov 
Hello everyone,

here is the new board PM9G45 from Ronetix GmbH,
based on at91sam9g45 MCU. It has 128MB DDR2 SDRAM, 256MB NAND,
could be with or without DataFlash. 
The board is made as SODIMM200 module.
For more info www.ronatix.at or i...@ronetix.at.

Regards,
Asen

Signed-off-by: Asen Dimov di...@ronetix.at
---
 MAKEALL|1 +
 Makefile   |4 +
 board/ronetix/pm9g45/Makefile  |   54 +++
 .../at91sam9m10g45ek = ronetix/pm9g45}/config.mk  |0 
 board/ronetix/pm9g45/pm9g45.c  |  365 
 include/configs/pm9g45.h   |  246 +
 6 files changed, 670 insertions(+), 0 deletions(-)
 create mode 100644 board/ronetix/pm9g45/Makefile
 copy board/{atmel/at91sam9m10g45ek = ronetix/pm9g45}/config.mk (100%)
 create mode 100644 board/ronetix/pm9g45/pm9g45.c
 create mode 100644 include/configs/pm9g45.h

diff --git a/MAKEALL b/MAKEALL
index beacb5f..ad591d5 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -673,6 +673,7 @@ LIST_at91= \
otc570  \
pm9261  \
pm9263  \
+   pm9g45  \
SBC35_A9G20 \
TNY_A9260   \
TNY_A9G20   \
diff --git a/Makefile b/Makefile
index d801e25..438580a 100644
--- a/Makefile
+++ b/Makefile
@@ -2882,6 +2882,10 @@ otc570_config:   unconfig
 pm9263_config  :   unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
 
+pm9g45_config  :   unconfig
+   @mkdir -p $(obj)include
+   @$(MKCONFIG) -a pm9g45 arm arm926ejs pm9g45 ronetix at91
+
 SBC35_A9G20_NANDFLASH_config \
 SBC35_A9G20_EEPROM_config \
 SBC35_A9G20_config :   unconfig
diff --git a/board/ronetix/pm9g45/Makefile b/board/ronetix/pm9g45/Makefile
new file mode 100644
index 000..dd5b02e
--- /dev/null
+++ b/board/ronetix/pm9g45/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop stelian@leadtechdesign.com
+# Lead Tech Design www.leadtechdesign.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y += pm9g45.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/atmel/at91sam9m10g45ek/config.mk 
b/board/ronetix/pm9g45/config.mk
similarity index 100%
copy from board/atmel/at91sam9m10g45ek/config.mk
copy to board/ronetix/pm9g45/config.mk
diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
new file mode 100644
index 000..d11f40f
--- /dev/null
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -0,0 +1,365 @@
+/*
+ * (C) Copyright 2005-2010
+ * Ilko Iliev il...@ronetix.at
+ * Asen Dimov di...@ronetix.at
+ * Ronetix GmbH www.ronetix.at
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop stelian@leadtechdesign.com
+ * Lead Tech Design www.leadtechdesign.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License