Re: [U-Boot] upstream Arndale support
Hi Andre, On 4 December 2013 17:09, Andre Przywara andre.przyw...@linaro.org wrote: Hi, I cannot get upstream u-boot to run on an Arndale board. Everything works when I use the Linaro branch. But this tree is old and carries a whole different set of patches for Arndale. Is the Arndale upstream support supposed to work? If yes, is there a different recipe for populating the uSD card? What works is the following: $ git checkout linaro $ make arndale5250_config make -j arndale5250 $ dd if=/tmp/arndale-bl1.bin of=/dev/sdb seek=1 $ dd if=spl/smdk5250-spl.bin of=/dev/sdb seek=17 $ dd if=u-boot.bin of=/dev/sdb seek=49 Transferring this to upstream I get the following: $ git checkout master $ make arndale_config make -j arndale $ dd if=/tmp/arndale-bl1.bin of=/dev/sdb seek=1 $ dd if=spl/arndale-spl.bin of=/dev/sdb seek=17 $ dd if=u-boot.bin of=/dev/sdb seek=49 dd if=u-boot-dtb.bin of=/dev/sdb seek=49 However while the Linaro based build works fine, I don't get any serial output on the upstream build. Can someone give any hints? Thanks, Andre. -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] Add usb eth support
Ping On 19 November 2013 11:09, Chander Kashyap chander.kash...@linaro.org wrote: Ping.. On 19 October 2013 12:19, Inderpal Singh chander.kash...@linaro.org wrote: From: Chander Kashyap chander.kash...@linaro.org Arndale board has AX88760, which is USB 2.0 Hub USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub. This patchset add support for this usb ethernet controllor. Chander Kashyap (1): exynos5: arndale: Add network support Inderpal Singh (1): usb: ehci: exynos: set/reset hsic phys arch/arm/include/asm/arch-exynos/ehci.h | 14 + board/samsung/arndale/arndale.c | 23 +++ drivers/usb/host/ehci-exynos.c | 48 +++ include/configs/arndale.h |6 4 files changed, 91 insertions(+) -- 1.7.9.5 -- with warm regards, Chander Kashyap -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] Add usb eth support
Ping.. On 19 October 2013 12:19, Inderpal Singh chander.kash...@linaro.org wrote: From: Chander Kashyap chander.kash...@linaro.org Arndale board has AX88760, which is USB 2.0 Hub USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub. This patchset add support for this usb ethernet controllor. Chander Kashyap (1): exynos5: arndale: Add network support Inderpal Singh (1): usb: ehci: exynos: set/reset hsic phys arch/arm/include/asm/arch-exynos/ehci.h | 14 + board/samsung/arndale/arndale.c | 23 +++ drivers/usb/host/ehci-exynos.c | 48 +++ include/configs/arndale.h |6 4 files changed, 91 insertions(+) -- 1.7.9.5 -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] arm:samsung:serial Extract common UART code
8f8f85f..a759d07 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -69,6 +69,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_BAUDRATE115200 #define EXYNOS5_DEFAULT_UART_OFFSET0x01 #define CONFIG_SILENT_CONSOLE diff --git a/include/configs/origen.h b/include/configs/origen.h index da13574..a59419d 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -48,6 +48,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ #define CONFIG_BAUDRATE 115200 #define EXYNOS4_DEFAULT_UART_OFFSET0x02 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d0fafd7..812b7f3 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -42,6 +42,7 @@ /* * select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL2 1 /* use SERIAL2 */ #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 97a4008..2270449 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -48,6 +48,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ #define CONFIG_BAUDRATE115200 diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index a572e62..4631dac 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -47,6 +47,7 @@ /* * select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL0 1 /* use SERIAL 0 on SMDKC100 */ /* PWM */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 0496661..9e10bf1 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -48,6 +48,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL1 1 /* use SERIAL 1 */ #define CONFIG_BAUDRATE 115200 #define EXYNOS4_DEFAULT_UART_OFFSET0x01 diff --git a/include/configs/trats.h b/include/configs/trats.h index 9b6aac9..6b301c8 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -53,6 +53,7 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (16 20)) /* select serial console configuration */ +#define CONFIG_S5P_SERIAL #define CONFIG_SERIAL2 /* use SERIAL 2 */ #define CONFIG_BAUDRATE115200 Thanks, Minkyu Kang. Regards, Lukasz Majewski ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] please pull u-boot-samsung master
Hi Minkyu, On 9 September 2013 13:55, Minkyu Kang mk7.k...@samsung.com wrote: Dear Chander Kashyap, On 06/09/13 13:32, Chander Kashyap wrote: Hi Albert, On 5 September 2013 18:58, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Chander, On Thu, 5 Sep 2013 17:36:34 +0530, Chander Kashyap chander.kash...@linaro.org wrote: Hi Albert, On 5 September 2013 17:08, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Chander, On Thu, 5 Sep 2013 16:47:27 +0530, Chander Kashyap chander.kash...@linaro.org wrote: Hi Lukasz, On 5 September 2013 16:27, Lukasz Majewski l.majew...@samsung.com wrote: Hi Chander, Its working for me. But my dtc -v: Version: DTC 1.3.0 Have you managed to properly build test Samsung's u-boot tree with DTC 1.3.0? Yes, I am able to build and test. I am running on ubuntu. Then you are not testing on a recent enough U-Boot source tree; currently, master (and arm) require dtc version = 1.4.0, and will fail as indicated by Lukasz and as experienced by me -- I had to build dtc version 1.4.0 from git source. Sorry for big mess. I had re-based my tree to u-boot samsung. I have tested it after re-basing to u-boot tree. It was failing. Shall i send all the patches again, or is it possible to send the single failing patch. Well, if you have rebased to u-boot-master, then you can as well do an interactive rebase so that the commit which breaks builds is omitted. Offending patch was part of two patch series. I have fixed it and resend it with series again. Since the patchset is already applied to u-boot-samsung, If you send new patchset, then I should do rebase and forced push. If possible please send fixing patch instead of new patchset. Sure I will do that. Thanks, Thanks, Minkyu Kang. -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] dts: samsung: arndale: Fix include path
As per new convention ARCH_CPU_DTS is not defined in dtc/Makefile.
Hence Arndale comilation is failing. Fix this by adding proper include
file in board/samsung/dts/exynos5250-arndale.dts.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
board/samsung/dts/exynos5250-arndale.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/samsung/dts/exynos5250-arndale.dts
b/board/samsung/dts/exynos5250-arndale.dts
index c700e45..202f2ea 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -8,7 +8,7 @@
*/
/dts-v1/;
-/include/ ARCH_CPU_DTS
+#include exynos5250.dtsi
/ {
model = SAMSUNG Arndale board based on EXYNOS5250;
--
1.7.9.5
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Re: [U-Boot] please pull u-boot-samsung master
Hi Albert, On 5 September 2013 14:43, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Minkyu, On Fri, 30 Aug 2013 14:10:19 +0900, Minkyu Kang mk7.k...@samsung.com wrote: Dear Albert, The following changes since commit 9ed887caecb9ecb0c68773a1870d143b9f28d3da: Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-08-17 18:24:13 +0200) are available in the git repository at: git://git.denx.de/u-boot-samsung master for you to fetch changes up to 812d7576cdbecc12d7eec7b53d3a4a06234b: drivers:power:max77686: add function to set voltage and mode (2013-08-30 12:24:54 +0900) Chander Kashyap (2): CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles exynos5250: Add arndale board support Inderpal Singh (1): exynos5250: arndale: Add mmc support Minkyu Kang (2): arm: smdkc100: remove config.mk file arm: goni: remove config.mk file Piotr Wilczek (2): arm:exynos:gpio: fix s5p_gpio_part_max for exynos4x12 drivers:power:max77686: add function to set voltage and mode MAINTAINERS |4 + Makefile |2 +- arch/arm/include/asm/arch-exynos/gpio.h | 17 +- board/samsung/arndale/Makefile | 34 board/samsung/arndale/arndale.c | 101 board/samsung/arndale/arndale_spl.c | 50 ++ board/samsung/dts/exynos5250-arndale.dts | 39 + board/samsung/goni/config.mk | 18 --- board/samsung/smdkc100/config.mk | 16 -- boards.cfg |1 + drivers/power/pmic/pmic_max77686.c | 192 ++ include/configs/arndale.h| 255 ++ include/configs/exynos5250-dt.h |2 +- include/configs/s5p_goni.h |3 + include/configs/smdkc100.h |3 + include/power/max77686_pmic.h| 26 +++ tools/Makefile |4 +- 17 files changed, 725 insertions(+), 42 deletions(-) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/dts/exynos5250-arndale.dts delete mode 100644 board/samsung/goni/config.mk delete mode 100644 board/samsung/smdkc100/config.mk create mode 100644 include/configs/arndale.h Fails for arndale: Error: /home/albert/src/u-boot-arm/board/samsung/dts/exynos5250-arndale.dts:11.2-9 syntax error My dtc -v: Version: DTC 1.4.0, built from source. Its working for me. But my dtc -v: Version: DTC 1.3.0 Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] please pull u-boot-samsung master
On 5 September 2013 15:12, Chander Kashyap chander.kash...@linaro.org wrote: Hi Albert, On 5 September 2013 14:43, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Minkyu, On Fri, 30 Aug 2013 14:10:19 +0900, Minkyu Kang mk7.k...@samsung.com wrote: Dear Albert, The following changes since commit 9ed887caecb9ecb0c68773a1870d143b9f28d3da: Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-08-17 18:24:13 +0200) are available in the git repository at: git://git.denx.de/u-boot-samsung master for you to fetch changes up to 812d7576cdbecc12d7eec7b53d3a4a06234b: drivers:power:max77686: add function to set voltage and mode (2013-08-30 12:24:54 +0900) Chander Kashyap (2): CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles exynos5250: Add arndale board support Inderpal Singh (1): exynos5250: arndale: Add mmc support Minkyu Kang (2): arm: smdkc100: remove config.mk file arm: goni: remove config.mk file Piotr Wilczek (2): arm:exynos:gpio: fix s5p_gpio_part_max for exynos4x12 drivers:power:max77686: add function to set voltage and mode MAINTAINERS |4 + Makefile |2 +- arch/arm/include/asm/arch-exynos/gpio.h | 17 +- board/samsung/arndale/Makefile | 34 board/samsung/arndale/arndale.c | 101 board/samsung/arndale/arndale_spl.c | 50 ++ board/samsung/dts/exynos5250-arndale.dts | 39 + board/samsung/goni/config.mk | 18 --- board/samsung/smdkc100/config.mk | 16 -- boards.cfg |1 + drivers/power/pmic/pmic_max77686.c | 192 ++ include/configs/arndale.h| 255 ++ include/configs/exynos5250-dt.h |2 +- include/configs/s5p_goni.h |3 + include/configs/smdkc100.h |3 + include/power/max77686_pmic.h| 26 +++ tools/Makefile |4 +- 17 files changed, 725 insertions(+), 42 deletions(-) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/dts/exynos5250-arndale.dts delete mode 100644 board/samsung/goni/config.mk delete mode 100644 board/samsung/smdkc100/config.mk create mode 100644 include/configs/arndale.h Fails for arndale: Error: /home/albert/src/u-boot-arm/board/samsung/dts/exynos5250-arndale.dts:11.2-9 syntax error My dtc -v: Version: DTC 1.4.0, built from source. Its working for me. But my dtc -v: Version: DTC 1.3.0 Tested now with dtc -v: Version: DTC 1.4.0 It got compiled. properly. Or I missed something. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- with warm regards, Chander Kashyap -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] please pull u-boot-samsung master
Hi Lukasz, On 5 September 2013 16:27, Lukasz Majewski l.majew...@samsung.com wrote: Hi Chander, Its working for me. But my dtc -v: Version: DTC 1.3.0 Have you managed to properly build test Samsung's u-boot tree with DTC 1.3.0? Yes, I am able to build and test. I am running on ubuntu. On my setup (debian - 1.3.0-4) it fails. Tested now with dtc -v: Version: DTC 1.4.0 It got compiled. properly. Or I missed something. The Exynos5x boards with DT support shall be compiled with DTC version 1.4+. Otherwise they fail: Configuring for snow board... make: *** [checkdtc] Error 1 make: *** [checkdtc] Error 1 make: *** Waiting for unfinished jobs Configuring for smdk5250 board... make: *** [checkdtc] Error 1 make: *** [checkdtc] Error 1 make: *** Waiting for unfinished jobs -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] please pull u-boot-samsung master
Hi Albert, On 5 September 2013 17:08, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Chander, On Thu, 5 Sep 2013 16:47:27 +0530, Chander Kashyap chander.kash...@linaro.org wrote: Hi Lukasz, On 5 September 2013 16:27, Lukasz Majewski l.majew...@samsung.com wrote: Hi Chander, Its working for me. But my dtc -v: Version: DTC 1.3.0 Have you managed to properly build test Samsung's u-boot tree with DTC 1.3.0? Yes, I am able to build and test. I am running on ubuntu. Then you are not testing on a recent enough U-Boot source tree; currently, master (and arm) require dtc version = 1.4.0, and will fail as indicated by Lukasz and as experienced by me -- I had to build dtc version 1.4.0 from git source. Sorry for big mess. I had re-based my tree to u-boot samsung. I have tested it after re-basing to u-boot tree. It was failing. Shall i send all the patches again, or is it possible to send the single failing patch. Amicalement, -- Albert. -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v8 1/2] exynos5250: Add arndale board support
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
board/samsung/arndale/arndale_spl.c | 50 ++
board/samsung/dts/exynos5250-arndale.dts | 21 +++
boards.cfg |1 +
include/configs/arndale.h| 255 ++
7 files changed, 452 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index bd0f3a0..9c53ca4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -464,6 +464,10 @@ Andre Schwarz andre.schw...@matrix-vision.de
mvblm7 MPC8343
mvsmr MPC5200
+Inderpal Singh inderpal.si...@linaro.org
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Jon Smirl jonsm...@gmail.com
pcm030 MPC5200
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..afd8db3
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS += arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..84d8f19
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+ set_ps_hold_ctrl();
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr, size;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+ gd-bd-bi_dram[i].start = addr;
+ gd-bd-bi_dram[i].size = size;
+ }
+}
+
+static int board_uart_init(void)
+{
+ int err = 0, uart_id;
+
+ for (uart_id = PERIPH_ID_UART0; uart_id = PERIPH_ID_UART3; uart_id++) {
+ err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(UART%d not configured\n,
+ (uart_id - PERIPH_ID_UART0));
+ return err;
+ }
+ }
+ return err;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+ int err;
+
+ err = board_uart_init();
+ if (err) {
+ debug(UART init failed\n);
+ return err;
+ }
+ return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+ printf(\nBoard: Arndale\n);
+
+ return 0;
+}
+#endif
diff --git a/board/samsung/arndale/arndale_spl.c
b/board/samsung/arndale/arndale_spl.c
new file mode 100644
index 000..2949c08
--- /dev/null
+++ b/board/samsung/arndale/arndale_spl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/spl.h
+
+#define SIGNATURE 0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+ __attribute__((section(.machine_param))) = {
+ .signature = SIGNATURE,
+ .version= 1,
+ .params = vmubfasirM,
+ .size = sizeof(machine_param),
+
+ .mem_iv_size= 0x1f,
+ .mem_type
[U-Boot] [PATCH v8 0/2] Add Arndale board support
The Arndale board is based on samsung's exynos5250 SOC. For spl generation, it depends on the patch at [5]. First patch provides the basic arndale board support. The second patch adds the MMC support. Changes in v2: - split from earlier patchset at [3] as per Minkyu - Removed checkpatch errors pointed out by Wolfgang - rebased to latest u-boot-samsung master branch - created mmc_boot.c to remove dependency on consolidation patch at [4] - split the mmc support to new patch as it depends on [2] [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883 [2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887 [3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 [4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272 Changes in v3: - Used dt based serial - rebased to latest u-boot-samsung master branch Changes in v4: - Removed the config dependency on exynos5_dt.h as it contains smdk5250 configurations rather than the common exynos5 generic configurations. - rebased to latest u-boot-samsung master branch Changes in v5: - Fix comments suggested by Minkyu - Added SPDX-License-Identifier to new files Changes in v6: - Fixed missed out sorting of Maintainers entry Changes in v7: - Fixed regression caused due to v6. - rebased to latest u-boot-samsung master branch - Fixed checkpatch warning for parenthesis alignment. Changes in v7: - Fixed DT compilation error with DTC 1.4.0 [5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles Chander Kashyap (1): exynos5250: Add arndale board support Inderpal Singh (1): exynos5250: arndale: Add mmc support MAINTAINERS |4 + board/samsung/arndale/Makefile | 34 board/samsung/arndale/arndale.c | 101 board/samsung/arndale/arndale_spl.c | 50 ++ board/samsung/dts/exynos5250-arndale.dts | 39 + boards.cfg |1 + include/configs/arndale.h| 255 ++ 7 files changed, 484 insertions(+) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/dts/exynos5250-arndale.dts create mode 100644 include/configs/arndale.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v8 2/2] exynos5250: arndale: Add mmc support
From: Inderpal Singh inderpal.si...@linaro.org
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 84d8f19..052fecd 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,6 +6,7 @@
#include common.h
#include asm/arch/pinmux.h
+#include asm/arch/dwmmc.h
#include asm/arch/power.h
DECLARE_GLOBAL_DATA_PTR;
@@ -48,6 +49,19 @@ void dram_init_banksize(void)
}
}
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ int ret;
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+ if (ret)
+ debug(dwmmc init failed\n);
+
+ return ret;
+}
+#endif
+
static int board_uart_init(void)
{
int err = 0, uart_id;
diff --git a/board/samsung/dts/exynos5250-arndale.dts
b/board/samsung/dts/exynos5250-arndale.dts
index ce75314..202f2ea 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -18,4 +18,22 @@
serial0 = /serial@12C2;
console = /serial@12C2;
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
--
1.7.9.5
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Re: [U-Boot] please pull u-boot-samsung master
Hi Albert, On 5 September 2013 18:58, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Chander, On Thu, 5 Sep 2013 17:36:34 +0530, Chander Kashyap chander.kash...@linaro.org wrote: Hi Albert, On 5 September 2013 17:08, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Chander, On Thu, 5 Sep 2013 16:47:27 +0530, Chander Kashyap chander.kash...@linaro.org wrote: Hi Lukasz, On 5 September 2013 16:27, Lukasz Majewski l.majew...@samsung.com wrote: Hi Chander, Its working for me. But my dtc -v: Version: DTC 1.3.0 Have you managed to properly build test Samsung's u-boot tree with DTC 1.3.0? Yes, I am able to build and test. I am running on ubuntu. Then you are not testing on a recent enough U-Boot source tree; currently, master (and arm) require dtc version = 1.4.0, and will fail as indicated by Lukasz and as experienced by me -- I had to build dtc version 1.4.0 from git source. Sorry for big mess. I had re-based my tree to u-boot samsung. I have tested it after re-basing to u-boot tree. It was failing. Shall i send all the patches again, or is it possible to send the single failing patch. Well, if you have rebased to u-boot-master, then you can as well do an interactive rebase so that the commit which breaks builds is omitted. Offending patch was part of two patch series. I have fixed it and resend it with series again. Amicalement, -- Albert. -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 1/2] exynos5250: Add arndale board support
Dear Kim,
On 21 August 2013 00:54, Kim Phillips kim.phill...@linaro.org wrote:
On Tue, 6 Aug 2013 20:05:46 +0530
Chander Kashyap chander.kash...@linaro.org wrote:
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
This patchseries gives me:
make[1]: Entering directory
`/home/kim/git/u-boot-arndale-upstream/board/samsung/arndale'
arm-linux-gnueabihf-gcc -g -Os -ffunction-sections -fdata-sections
-fno-common -ffixed-r8 -msoft-float -D__KERNEL__
-DCONFIG_SYS_TEXT_BASE=0x43E0 -DCONFIG_SPL_TEXT_BASE=0x02023400
-DCONFIG_SPL_PAD_TO=0 -I/home/kim/git/u-boot-arndale-upstream/include
-fno-builtin -ffreestanding -nostdinc -isystem
/home/kim/toolchain/gcc-linaro-arm-linux-gnueabihf-4.8-2013.07-1_linux/bin/../lib/gcc/arm-linux-gnueabihf/4.8.2/include
-pipe -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux
-march=armv7-a -Wall -Wstrict-prototypes -fno-stack-protector
-Wno-format-nonliteral -Wno-format-security -fstack-usage -o arndale.o
arndale.c -c
arndale.c: In function ‘board_uart_init’:
arndale.c:74:11: error: ‘ret’ undeclared (first use in this function)
return ret;
^
arndale.c:74:11: note: each undeclared identifier is reported only once for
each function it appears in
arndale.c:78:1: warning: control reaches end of non-void function
[-Wreturn-type]
}
^
make[1]: *** [arndale.o] Error 1
make[1]: Leaving directory
`/home/kim/git/u-boot-arndale-upstream/board/samsung/arndale'
I manually fixed it with:
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 6d81b90..4e021c3 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -71,10 +71,10 @@ static int board_uart_init(void)
if (err) {
debug(UART%d not configured\n,
(uart_id - PERIPH_ID_UART0));
- return ret;
+ return err;
}
}
- return ret;
+ return err;
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
btw, I noticed that misaligned parenthesis above, and asked checkpatch
if it did, and it did:
CHECK: Alignment should match open parenthesis
#73: FILE: samsung/arndale/arndale.c:73:
+ debug(UART%d not configured\n,
+ (uart_id - PERIPH_ID_UART0));
so it's obvious that you're not build-testing nor running checkpatch
between each patchseries version submission.
Even after fixing the above, I get:
arm-linux-gnueabihf-objcopy --gap-fill=0xff -O binary
/home/kim/git/u-boot-arndale-upstream/spl/u-boot-spl
/home/kim/git/u-boot-arndale-upstream/spl/u-boot-spl.bin
/home/kim/git/u-boot-arndale-upstream/tools/mkarndalespl \
/home/kim/git/u-boot-arndale-upstream/spl/u-boot-spl.bin
/home/kim/git/u-boot-arndale-upstream/spl/arndale-spl.bin
/bin/bash: line 1: /home/kim/git/u-boot-arndale-upstream/tools/mkarndalespl:
No such file or directory
make[1]: *** [/home/kim/git/u-boot-arndale-upstream/spl/arndale-spl.bin]
Error 127
make[1]: Leaving directory `/home/kim/git/u-boot-arndale-upstream/spl'
make: *** [spl/u-boot-spl.bin] Error 2
this is v6 of the patchseries - could you *please* establish a decent
test regimen prior to your patch submissions?
Thanks for pointing out.
Sorry for the all the mess. I will fix all the issues properly and resend it.
Thanks,
Kim
--
with warm regards,
Chander Kashyap
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Re: [U-Boot] [PATCH v6 1/2] exynos5250: Add arndale board support
On 21 August 2013 08:56, Chander Kashyap chander.kash...@linaro.org wrote:
Dear Kim,
On 21 August 2013 00:54, Kim Phillips kim.phill...@linaro.org wrote:
On Tue, 6 Aug 2013 20:05:46 +0530
Chander Kashyap chander.kash...@linaro.org wrote:
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
This patchseries gives me:
make[1]: Entering directory
`/home/kim/git/u-boot-arndale-upstream/board/samsung/arndale'
arm-linux-gnueabihf-gcc -g -Os -ffunction-sections -fdata-sections
-fno-common -ffixed-r8 -msoft-float -D__KERNEL__
-DCONFIG_SYS_TEXT_BASE=0x43E0 -DCONFIG_SPL_TEXT_BASE=0x02023400
-DCONFIG_SPL_PAD_TO=0 -I/home/kim/git/u-boot-arndale-upstream/include
-fno-builtin -ffreestanding -nostdinc -isystem
/home/kim/toolchain/gcc-linaro-arm-linux-gnueabihf-4.8-2013.07-1_linux/bin/../lib/gcc/arm-linux-gnueabihf/4.8.2/include
-pipe -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux
-march=armv7-a -Wall -Wstrict-prototypes -fno-stack-protector
-Wno-format-nonliteral -Wno-format-security -fstack-usage -o arndale.o
arndale.c -c
arndale.c: In function ‘board_uart_init’:
arndale.c:74:11: error: ‘ret’ undeclared (first use in this function)
return ret;
^
arndale.c:74:11: note: each undeclared identifier is reported only once for
each function it appears in
arndale.c:78:1: warning: control reaches end of non-void function
[-Wreturn-type]
}
^
make[1]: *** [arndale.o] Error 1
make[1]: Leaving directory
`/home/kim/git/u-boot-arndale-upstream/board/samsung/arndale'
I manually fixed it with:
diff --git a/board/samsung/arndale/arndale.c
b/board/samsung/arndale/arndale.c
index 6d81b90..4e021c3 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -71,10 +71,10 @@ static int board_uart_init(void)
if (err) {
debug(UART%d not configured\n,
(uart_id - PERIPH_ID_UART0));
- return ret;
+ return err;
}
}
- return ret;
+ return err;
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
btw, I noticed that misaligned parenthesis above, and asked checkpatch
if it did, and it did:
CHECK: Alignment should match open parenthesis
#73: FILE: samsung/arndale/arndale.c:73:
+ debug(UART%d not configured\n,
+ (uart_id - PERIPH_ID_UART0));
so it's obvious that you're not build-testing nor running checkpatch
between each patchseries version submission.
Even after fixing the above, I get:
arm-linux-gnueabihf-objcopy --gap-fill=0xff -O binary
/home/kim/git/u-boot-arndale-upstream/spl/u-boot-spl
/home/kim/git/u-boot-arndale-upstream/spl/u-boot-spl.bin
/home/kim/git/u-boot-arndale-upstream/tools/mkarndalespl \
/home/kim/git/u-boot-arndale-upstream/spl/u-boot-spl.bin
/home/kim/git/u-boot-arndale-upstream/spl/arndale-spl.bin
/bin/bash: line 1: /home/kim/git/u-boot-arndale-upstream/tools/mkarndalespl:
No such file or directory
make[1]: *** [/home/kim/git/u-boot-arndale-upstream/spl/arndale-spl.bin]
Error 127
make[1]: Leaving directory `/home/kim/git/u-boot-arndale-upstream/spl'
make: *** [spl/u-boot-spl.bin] Error 2
This patch depends on
CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles
http://u-boot.10912.n7.nabble.com/PATCH-v2-CONFIG-EXYNOS5-Replace-misnomer-SMDK5250-with-EXYNOS5250-and-update-Makefiles-td160016.html
Kindly apply this patch before compiling for arndale.
this is v6 of the patchseries - could you *please* establish a decent
test regimen prior to your patch submissions?
Thanks for pointing out.
Sorry for the all the mess. I will fix all the issues properly and resend it.
Thanks,
Kim
--
with warm regards,
Chander Kashyap
--
with warm regards,
Chander Kashyap
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[U-Boot] [Patch v7 0/2] Add Arndale board support
The Arndale board is based on samsung's exynos5250 SOC. For spl generation, it depends on the patch at [5]. First patch provides the basic arndale board support. The second patch adds the MMC support. Changes in v2: - split from earlier patchset at [3] as per Minkyu - Removed checkpatch errors pointed out by Wolfgang - rebased to latest u-boot-samsung master branch - created mmc_boot.c to remove dependency on consolidation patch at [4] - split the mmc support to new patch as it depends on [2] [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883 [2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887 [3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 [4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272 Changes in v3: - Used dt based serial - rebased to latest u-boot-samsung master branch Changes in v4: - Removed the config dependency on exynos5_dt.h as it contains smdk5250 configurations rather than the common exynos5 generic configurations. - rebased to latest u-boot-samsung master branch Changes in v5: - Fix comments suggested by Minkyu - Added SPDX-License-Identifier to new files Changes in v6: - Fixed missed out sorting of Maintainers entry Changes in v7: - Fixed regression caused due to v6. - rebased to latest u-boot-samsung master branch - Fixed checkpatch warning for parenthesis alignment. [5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles Chander Kashyap (1): exynos5250: Add arndale board support Inderpal Singh (1): exynos5250: arndale: Add mmc support MAINTAINERS |4 + board/samsung/arndale/Makefile | 34 board/samsung/arndale/arndale.c | 101 board/samsung/arndale/arndale_spl.c | 50 ++ board/samsung/dts/exynos5250-arndale.dts | 39 + boards.cfg |1 + include/configs/arndale.h| 255 ++ 7 files changed, 484 insertions(+) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/dts/exynos5250-arndale.dts create mode 100644 include/configs/arndale.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v7 1/2] exynos5250: Add arndale board support
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
board/samsung/arndale/arndale_spl.c | 50 ++
board/samsung/dts/exynos5250-arndale.dts | 21 +++
boards.cfg |1 +
include/configs/arndale.h| 255 ++
7 files changed, 452 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..f937761 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -464,6 +464,10 @@ Andre Schwarz andre.schw...@matrix-vision.de
mvblm7 MPC8343
mvsmr MPC5200
+Inderpal Singh inderpal.si...@linaro.org
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Jon Smirl jonsm...@gmail.com
pcm030 MPC5200
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..afd8db3
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS += arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..84d8f19
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+ set_ps_hold_ctrl();
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr, size;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+ gd-bd-bi_dram[i].start = addr;
+ gd-bd-bi_dram[i].size = size;
+ }
+}
+
+static int board_uart_init(void)
+{
+ int err = 0, uart_id;
+
+ for (uart_id = PERIPH_ID_UART0; uart_id = PERIPH_ID_UART3; uart_id++) {
+ err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(UART%d not configured\n,
+ (uart_id - PERIPH_ID_UART0));
+ return err;
+ }
+ }
+ return err;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+ int err;
+
+ err = board_uart_init();
+ if (err) {
+ debug(UART init failed\n);
+ return err;
+ }
+ return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+ printf(\nBoard: Arndale\n);
+
+ return 0;
+}
+#endif
diff --git a/board/samsung/arndale/arndale_spl.c
b/board/samsung/arndale/arndale_spl.c
new file mode 100644
index 000..2949c08
--- /dev/null
+++ b/board/samsung/arndale/arndale_spl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/spl.h
+
+#define SIGNATURE 0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+ __attribute__((section(.machine_param))) = {
+ .signature = SIGNATURE,
+ .version= 1,
+ .params = vmubfasirM,
+ .size = sizeof(machine_param),
+
+ .mem_iv_size= 0x1f,
+ .mem_type
[U-Boot] [Patch v7 2/2] exynos5250: arndale: Add mmc support
From: Inderpal Singh inderpal.si...@linaro.org
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 84d8f19..052fecd 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,6 +6,7 @@
#include common.h
#include asm/arch/pinmux.h
+#include asm/arch/dwmmc.h
#include asm/arch/power.h
DECLARE_GLOBAL_DATA_PTR;
@@ -48,6 +49,19 @@ void dram_init_banksize(void)
}
}
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ int ret;
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+ if (ret)
+ debug(dwmmc init failed\n);
+
+ return ret;
+}
+#endif
+
static int board_uart_init(void)
{
int err = 0, uart_id;
diff --git a/board/samsung/dts/exynos5250-arndale.dts
b/board/samsung/dts/exynos5250-arndale.dts
index d3c0527..c700e45 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -18,4 +18,22 @@
serial0 = /serial@12C2;
console = /serial@12C2;
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
--
1.7.9.5
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[U-Boot] [PATCH v5 0/2] Add Arndale board support
The Arndale board is based on samsung's exynos5250 SOC. For spl generation, it depends on the patch at [5]. First patch provides the basic arndale board support. The second patch adds the MMC support. Changes in v2: - split from earlier patchset at [3] as per Minkyu - Removed checkpatch errors pointed out by Wolfgang - rebased to latest u-boot-samsung master branch - created mmc_boot.c to remove dependency on consolidation patch at [4] - split the mmc support to new patch as it depends on [2] [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883 [2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887 [3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 [4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272 Changes in v3: - Used dt based serial - rebased to latest u-boot-samsung master branch Changes in v4: - Removed the config depedency on exynos5_dt.h as it contains smdk5250 configurations rather than the common exynos5 generic configurations. - rebased to latest u-boot-samsung master branch Changes in v5: - Fix comments suggested by Minkyu - Added SPDX-License-Identifier to new files [5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles Chander Kashyap (1): exynos5250: Add arndale board support Inderpal Singh (1): exynos5250: arndale: Add mmc support MAINTAINERS |4 + board/samsung/arndale/Makefile | 34 board/samsung/arndale/arndale.c | 101 board/samsung/arndale/arndale_spl.c | 50 ++ board/samsung/dts/exynos5250-arndale.dts | 39 + boards.cfg |1 + include/configs/arndale.h| 255 ++ 7 files changed, 484 insertions(+) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/dts/exynos5250-arndale.dts create mode 100644 include/configs/arndale.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 2/2] exynos5250: arndale: Add mmc support
From: Inderpal Singh inderpal.si...@linaro.org
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 5ec56f6..6d81b90 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,6 +6,7 @@
#include common.h
#include asm/arch/pinmux.h
+#include asm/arch/dwmmc.h
#include asm/arch/power.h
DECLARE_GLOBAL_DATA_PTR;
@@ -48,6 +49,19 @@ void dram_init_banksize(void)
}
}
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ int ret;
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+ if (ret)
+ debug(dwmmc init failed\n);
+
+ return ret;
+}
+#endif
+
static int board_uart_init(void)
{
int err = 0, uart_id;
diff --git a/board/samsung/dts/exynos5250-arndale.dts
b/board/samsung/dts/exynos5250-arndale.dts
index d3c0527..c700e45 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -18,4 +18,22 @@
serial0 = /serial@12C2;
console = /serial@12C2;
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
--
1.7.9.5
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[U-Boot] [PATCH v5 1/2] exynos5250: Add arndale board support
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
board/samsung/arndale/arndale_spl.c | 50 ++
board/samsung/dts/exynos5250-arndale.dts | 21 +++
boards.cfg |1 +
include/configs/arndale.h| 255 ++
7 files changed, 452 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..56d4741 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -209,6 +209,10 @@ Matthias Fuchs matthias.fu...@esd-electronics.com
WUH405 PPC405EP
CMS700 PPC405EP
+Inderpal Singh inderpal.si...@linaro.org
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Siddarth Gore go...@marvell.com
guruplugARM926EJS (Kirkwood SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..afd8db3
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS += arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..5ec56f6
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+ set_ps_hold_ctrl();
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr, size;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+ gd-bd-bi_dram[i].start = addr;
+ gd-bd-bi_dram[i].size = size;
+ }
+}
+
+static int board_uart_init(void)
+{
+ int err = 0, uart_id;
+
+ for (uart_id = PERIPH_ID_UART0; uart_id = PERIPH_ID_UART3; uart_id++) {
+ err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(UART%d not configured\n,
+ (uart_id - PERIPH_ID_UART0));
+ return ret;
+ }
+ }
+ return ret;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+ int err;
+
+ err = board_uart_init();
+ if (err) {
+ debug(UART init failed\n);
+ return err;
+ }
+ return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+ printf(\nBoard: Arndale\n);
+
+ return 0;
+}
+#endif
diff --git a/board/samsung/arndale/arndale_spl.c
b/board/samsung/arndale/arndale_spl.c
new file mode 100644
index 000..2949c08
--- /dev/null
+++ b/board/samsung/arndale/arndale_spl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/spl.h
+
+#define SIGNATURE 0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+ __attribute__((section(.machine_param))) = {
+ .signature = SIGNATURE,
+ .version= 1,
+ .params = vmubfasirM,
+ .size = sizeof(machine_param
Re: [U-Boot] [PATCH v4 1/2] exynos5250: Add arndale board support
On 6 August 2013 17:16, Minkyu Kang mk7.k...@samsung.com wrote:
On 25/07/13 21:46, Chander Kashyap wrote:
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 50 ++
board/samsung/arndale/arndale.c | 102 +++
board/samsung/arndale/arndale_spl.c | 66
board/samsung/dts/exynos5250-arndale.dts | 23 +++
boards.cfg |1 +
include/configs/arndale.h| 271
++
7 files changed, 517 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..bf489d4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -747,6 +747,10 @@ Chander Kashyap k.chan...@samsung.com
SMDKV310ARM ARMV7 (EXYNOS4210 SoC)
SMDK5250ARM ARMV7 (EXYNOS5250 SoC)
+Inderpal Singh inderpal.si...@linaro.org
please sort the list by last name.
Sure i will.
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Lukasz Majewski l.majew...@samsung.com
trats ARM ARMV7 (EXYNOS4210 SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..5786774
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
Please use for new files SPDX-License-Identifier.
please check it globally.
Thanks for pointing out. I will add.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS+= arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS+= arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL := $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB): $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c
b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..47cbac8
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void
[U-Boot] [PATCH v6 1/2] exynos5250: Add arndale board support
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
board/samsung/arndale/arndale_spl.c | 50 ++
board/samsung/dts/exynos5250-arndale.dts | 21 +++
boards.cfg |1 +
include/configs/arndale.h| 255 ++
7 files changed, 452 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..56d4741 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -209,6 +209,10 @@ Matthias Fuchs matthias.fu...@esd-electronics.com
WUH405 PPC405EP
CMS700 PPC405EP
+Inderpal Singh inderpal.si...@linaro.org
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Siddarth Gore go...@marvell.com
guruplugARM926EJS (Kirkwood SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..afd8db3
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS += arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..5ec56f6
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+ set_ps_hold_ctrl();
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr, size;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+ gd-bd-bi_dram[i].start = addr;
+ gd-bd-bi_dram[i].size = size;
+ }
+}
+
+static int board_uart_init(void)
+{
+ int err = 0, uart_id;
+
+ for (uart_id = PERIPH_ID_UART0; uart_id = PERIPH_ID_UART3; uart_id++) {
+ err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(UART%d not configured\n,
+ (uart_id - PERIPH_ID_UART0));
+ return ret;
+ }
+ }
+ return ret;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+ int err;
+
+ err = board_uart_init();
+ if (err) {
+ debug(UART init failed\n);
+ return err;
+ }
+ return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+ printf(\nBoard: Arndale\n);
+
+ return 0;
+}
+#endif
diff --git a/board/samsung/arndale/arndale_spl.c
b/board/samsung/arndale/arndale_spl.c
new file mode 100644
index 000..2949c08
--- /dev/null
+++ b/board/samsung/arndale/arndale_spl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/spl.h
+
+#define SIGNATURE 0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+ __attribute__((section(.machine_param))) = {
+ .signature = SIGNATURE,
+ .version= 1,
+ .params = vmubfasirM,
+ .size = sizeof(machine_param
[U-Boot] [PATCH v6 0/2] Add Arndale board support
The Arndale board is based on samsung's exynos5250 SOC. For spl generation, it depends on the patch at [5]. First patch provides the basic arndale board support. The second patch adds the MMC support. Changes in v2: - split from earlier patchset at [3] as per Minkyu - Removed checkpatch errors pointed out by Wolfgang - rebased to latest u-boot-samsung master branch - created mmc_boot.c to remove dependency on consolidation patch at [4] - split the mmc support to new patch as it depends on [2] [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883 [2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887 [3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 [4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272 Changes in v3: - Used dt based serial - rebased to latest u-boot-samsung master branch Changes in v4: - Removed the config depedency on exynos5_dt.h as it contains smdk5250 configurations rather than the common exynos5 generic configurations. - rebased to latest u-boot-samsung master branch Changes in v5: - Fix comments suggested by Minkyu - Added SPDX-License-Identifier to new files Changes in v6: - Fixed missed out sorting of Maintainers entry [5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and update Makefiles Chander Kashyap (1): exynos5250: Add arndale board support Inderpal Singh (1): exynos5250: arndale: Add mmc support MAINTAINERS |4 + board/samsung/arndale/Makefile | 34 board/samsung/arndale/arndale.c | 101 board/samsung/arndale/arndale_spl.c | 50 ++ board/samsung/dts/exynos5250-arndale.dts | 39 + boards.cfg |1 + include/configs/arndale.h| 255 ++ 7 files changed, 484 insertions(+) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/dts/exynos5250-arndale.dts create mode 100644 include/configs/arndale.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 2/2] exynos5250: arndale: Add mmc support
From: Inderpal Singh inderpal.si...@linaro.org
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 5ec56f6..6d81b90 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,6 +6,7 @@
#include common.h
#include asm/arch/pinmux.h
+#include asm/arch/dwmmc.h
#include asm/arch/power.h
DECLARE_GLOBAL_DATA_PTR;
@@ -48,6 +49,19 @@ void dram_init_banksize(void)
}
}
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ int ret;
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+ if (ret)
+ debug(dwmmc init failed\n);
+
+ return ret;
+}
+#endif
+
static int board_uart_init(void)
{
int err = 0, uart_id;
diff --git a/board/samsung/dts/exynos5250-arndale.dts
b/board/samsung/dts/exynos5250-arndale.dts
index d3c0527..c700e45 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -18,4 +18,22 @@
serial0 = /serial@12C2;
console = /serial@12C2;
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
--
1.7.9.5
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Re: [U-Boot] [PATCH v5 7/7] cros: exynos: enable cros-ec for smdk5250
On 15 May 2013 15:57, Hung-ying Tyan ty...@chromium.org wrote:
This patch initiates cros-ec in board_init() to enable it for smdk5250.
This patch depends on the patch in the MMC series that brings in exynos5-dt.c.
Refer to http://patchwork.ozlabs.org/patch/240084.
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org
---
Changes in v5:
- Add exynos: tag.
- Add dependency description.
Changes in v4: None
Changes in v3: None
Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
Sorry for very late reply.
You are enabling this feature on smdk5250, but adding the
configuration in exynos5250-dt.h, though exynos5250-dt.h is seems to
common.
Though this patch is merged but isnt it possible to submit a patch to
add configuration macros to smdk5250.h rather than exynos5250-dt.h.
Or shall i submit the patch for doing so.
- Added commit message.
- Dropped the period from commit subject.
board/samsung/smdk5250/exynos5-dt.c | 45
+
include/configs/exynos5250-dt.h | 10 -
2 files changed, 54 insertions(+), 1 deletion(-)
diff --git a/board/samsung/smdk5250/exynos5-dt.c
b/board/samsung/smdk5250/exynos5-dt.c
index b01fe72..8be3192 100644
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -21,6 +21,7 @@
*/
#include common.h
+#include cros_ec.h
#include fdtdec.h
#include asm/io.h
#include errno.h
@@ -39,6 +40,13 @@
DECLARE_GLOBAL_DATA_PTR;
+struct local_info {
+ struct cros_ec_dev *cros_ec_dev;/* Pointer to cros_ec device
*/
+ int cros_ec_err;/* Error for cros_ec, 0 if ok
*/
+};
+
+static struct local_info local;
+
#ifdef CONFIG_USB_EHCI_EXYNOS
int board_usb_vbus_init(void)
{
@@ -55,12 +63,30 @@ int board_usb_vbus_init(void)
}
#endif
+struct cros_ec_dev *board_get_cros_ec_dev(void)
+{
+ return local.cros_ec_dev;
+}
+
+static int board_init_cros_ec_devices(const void *blob)
+{
+ local.cros_ec_err = cros_ec_init(blob, local.cros_ec_dev);
+ if (local.cros_ec_err)
+ return -1; /* Will report in board_late_init() */
+
+ return 0;
+}
+
int board_init(void)
{
gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
#ifdef CONFIG_EXYNOS_SPI
spi_init();
#endif
+
+ if (board_init_cros_ec_devices(gd-fdt_blob))
+ return -1;
+
#ifdef CONFIG_USB_EHCI_EXYNOS
board_usb_vbus_init();
#endif
@@ -337,3 +363,22 @@ int board_early_init_f(void)
return err;
}
#endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+ stdio_print_current_devices();
+
+ if (local.cros_ec_err) {
+ /* Force console on */
+ gd-flags = ~GD_FLG_SILENT;
+
+ printf(cros-ec communications failure %d\n,
+ local.cros_ec_err);
+ puts(\nPlease reset with Power+Refresh\n\n);
+ panic(Cannot init cros-ec device);
+ return -1;
+ }
+ return 0;
+}
+#endif
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 97c8825..289db00 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -82,11 +82,19 @@
#define CONFIG_BAUDRATE115200
#define EXYNOS5_DEFAULT_UART_OFFSET0x01
+/* Enable keyboard */
+#define CONFIG_CROS_EC /* CROS_EC protocol */
+#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
+#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
+#define CONFIG_CROS_EC_KEYB/* CROS_EC keyboard input */
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_KEYBOARD
+
/* Console configuration */
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define EXYNOS_DEVICE_SETTINGS \
- stdin=serial\0 \
+ stdin=serial,cros-ec-keyb\0 \
stdout=serial,lcd\0 \
stderr=serial,lcd\0
--
1.8.2.1
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--
with warm regards,
Chander Kashyap
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[U-Boot] [PATCH v4 2/2] exynos5250: arndale: Add mmc support
From: Inderpal Singh inderpal.si...@linaro.org
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 47cbac8..5ee7252 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -22,6 +22,7 @@
#include common.h
#include asm/arch/pinmux.h
+#include asm/arch/dwmmc.h
#include asm/arch/power.h
DECLARE_GLOBAL_DATA_PTR;
@@ -64,6 +65,19 @@ void dram_init_banksize(void)
}
}
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ int ret;
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd-fdt_blob);
+ if (ret)
+ debug(dwmmc init failed\n);
+
+ return ret;
+}
+#endif
+
static int board_uart_init(void)
{
int err, uart_id, ret = 0;
diff --git a/board/samsung/dts/exynos5250-arndale.dts
b/board/samsung/dts/exynos5250-arndale.dts
index 3081ab4..948275a 100644
--- a/board/samsung/dts/exynos5250-arndale.dts
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -20,4 +20,22 @@
serial0 = /serial@12C2;
console = /serial@12C2;
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
--
1.7.9.5
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[U-Boot] [PATCH v4 0/2] Add Arndale board support
The Arndale board is based on samsung's exynos5250 SOC. For spl generation, it depends on the patch at [5]. First patch provides the basic arndale board support. The second patch adds the MMC support. Changes in v2: - split from earlier patchset at [3] as per Minkyu - Removed checkpatch errors pointed out by Wolfgang - rebased to latest u-boot-samsung master branch - created mmc_boot.c to remove dependency on consolidation patch at [4] - split the mmc support to new patch as it depends on [2] [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883 [2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887 [3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 [4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272 Changes in v3: - Used dt based serial - rebased to latest u-boot-samsung master branch Changes in v4: - Removed the config depedency on exynos5_dt.h as it contains smdk5250 configurations rather than the common exynos5 generic configurations. - Reused common exynos clock and memory initlialization routines. - rebased to latest u-boot-samsung master branch [5] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/164824 Chander Kashyap (1): exynos5250: Add arndale board support Inderpal Singh (1): exynos5250: arndale: Add mmc support MAINTAINERS |4 + board/samsung/arndale/Makefile | 50 ++ board/samsung/arndale/arndale.c | 116 + board/samsung/arndale/arndale_spl.c | 66 board/samsung/dts/exynos5250-arndale.dts | 41 + boards.cfg |1 + include/configs/arndale.h| 271 ++ 7 files changed, 549 insertions(+) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/dts/exynos5250-arndale.dts create mode 100644 include/configs/arndale.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/2] exynos5250: Add arndale board support
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 50 ++
board/samsung/arndale/arndale.c | 102 +++
board/samsung/arndale/arndale_spl.c | 66
board/samsung/dts/exynos5250-arndale.dts | 23 +++
boards.cfg |1 +
include/configs/arndale.h| 271 ++
7 files changed, 517 insertions(+)
create mode 100644 board/samsung/arndale/Makefile
create mode 100644 board/samsung/arndale/arndale.c
create mode 100644 board/samsung/arndale/arndale_spl.c
create mode 100644 board/samsung/dts/exynos5250-arndale.dts
create mode 100644 include/configs/arndale.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 081cf96..bf489d4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -747,6 +747,10 @@ Chander Kashyap k.chan...@samsung.com
SMDKV310ARM ARMV7 (EXYNOS4210 SoC)
SMDK5250ARM ARMV7 (EXYNOS5250 SoC)
+Inderpal Singh inderpal.si...@linaro.org
+
+ Arndale ARM ARMV7 (EXYNOS5250 SoC)
+
Lukasz Majewski l.majew...@samsung.com
trats ARM ARMV7 (EXYNOS4210 SoC)
diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644
index 000..5786774
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS += arndale.o
+endif
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all: $(ALL)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644
index 000..47cbac8
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+ set_ps_hold_ctrl();
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr, size;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+ gd-bd-bi_dram[i].start = addr;
+ gd-bd-bi_dram[i
Re: [U-Boot] [PATCH v3 0/2] Add Arndale board support
Dear Inder, On 2 July 2013 10:11, Inderpal Singh inderpal.si...@linaro.org wrote: The Arndale board is based on samsung's exynos5250 SOC. For spl generation, it depends on the patch at [5]. First patch provides the basic arndale board support. The second patch adds the MMC support. Changes in v2: - split from earlier patchset at [3] as per Minkyu - Removed checkpatch errors pointed out by Wolfgang - rebased to latest u-boot-samsung master branch - created mmc_boot.c to remove dependency on consolidation patch at [4] - split the mmc support to new patch as it depends on [2] [1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/162883 [2] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/159887 [3] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 [4] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/156272 Changes in v3: - Used dt based serial - rebased to latest u-boot-samsung master branch [5] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/164824 Inderpal Singh (2): exynos5250: Add arndale board support exynos5250: arndale: Add mmc support MAINTAINERS |4 + board/samsung/arndale/Makefile | 58 +++ board/samsung/arndale/arndale.c | 117 ++ board/samsung/arndale/arndale_spl.c | 66 +++ board/samsung/arndale/clock_init.c | 655 ++ board/samsung/arndale/clock_init.h | 149 +++ board/samsung/arndale/dmc_common.c | 199 + board/samsung/arndale/dmc_init_ddr3.c| 228 +++ board/samsung/arndale/lowlevel_init.S| 92 + board/samsung/arndale/mmc_boot.c | 58 +++ board/samsung/arndale/setup.h| 569 ++ board/samsung/dts/exynos5250-arndale.dts | 41 ++ boards.cfg |1 + include/configs/arndale.h| 36 ++ 14 files changed, 2273 insertions(+) create mode 100644 board/samsung/arndale/Makefile create mode 100644 board/samsung/arndale/arndale.c create mode 100644 board/samsung/arndale/arndale_spl.c create mode 100644 board/samsung/arndale/clock_init.c create mode 100644 board/samsung/arndale/clock_init.h create mode 100644 board/samsung/arndale/dmc_common.c create mode 100644 board/samsung/arndale/dmc_init_ddr3.c create mode 100644 board/samsung/arndale/lowlevel_init.S create mode 100644 board/samsung/arndale/mmc_boot.c create mode 100644 board/samsung/arndale/setup.h create mode 100644 board/samsung/dts/exynos5250-arndale.dts create mode 100644 include/configs/arndale.h -- 1.7.9.5 Looks good. Acked-by: Chander Kashyap chander.kash...@gmail.com -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] exynos5250: move board specific configs to board specific config file
CONFIG_SPL_LDSCRIPT board/samsung/smdk5250/smdk5250-uboot-spl.lds +#define CONFIG_IDENT_STRING for SMDK5250 +#define CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH + +/* Display */ +#define CONFIG_LCD + +#include configs/exynos5250-dt.h + #endif /* __CONFIG_SMDK_H */ diff --git a/include/configs/snow.h b/include/configs/snow.h index b8460fd..e940c69 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -25,9 +25,21 @@ #ifndef __CONFIG_SNOW_H #define __CONFIG_SNOW_H -#include configs/exynos5250-dt.h - #undef CONFIG_DEFAULT_DEVICE_TREE #define CONFIG_DEFAULT_DEVICE_TREE exynos5250-snow +#define CONFIG_SMDK5250/* which is in a SMDK5250 */ +#define CONFIG_SERIAL3 /* use SERIAL 3 */ + +/* specific .lds file */ +#define CONFIG_SPL_LDSCRIPT board/samsung/smdk5250/smdk5250-uboot-spl.lds +#define CONFIG_IDENT_STRING for SMDK5250 +#define CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH + +/* Display */ +#define CONFIG_LCD + +#include configs/exynos5250-dt.h + #endif /* __CONFIG_SNOW_H */ The intent with the exynos5250-dt file is that it supports any board with that chip, so it should enable any feature used by Exynos5250 boards. Granted that might not suit all boards, which only need a subset of the features. Perhaps we should create an exynos5250-dt-base.h, with just the core options defined. Then other boards can include the base file, and exynos5250-dt can stay as the 'enable everything/ config? So as per you suggestion, there would be 3 files. One exynos5250-dt-base.h, second exynos5250-dt.h and third the board specific config file. How about having core options unconditionally enabled in exynos5250-dt.h and other options with #ifdef. The board specific config files can define the other options. This way only 2 files will do. For example, let exynos5250-dt.h has SPI related configs under #ifdef CONFIG_SPI_FLASH and let smdk5250.h or arndale.h define CONFIG_SPI_FLASH based on the spi flash presence in respective boards. Let me know your opinion.SPI Well the problem is who sets CONFIG_SPI_FLASH IIUC the CONFIG_SPI_FLASH will be set in respective board config file. Hence only boards want to have SPI boot support will define it. For us at least, exynos5250-dt is a good upstream target, since we can add all features into it and it will should boot on all the different boards. It helps to make sure that other boards don't get non-device-tree config that breaks this approach. So I think you do need a base config file. But I think a better name might be exynos5250-dt-common.h instead of exynos5250-dt-base.h. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] Make tzpc initialization common for exynos4 and exynos5
Hi Inder, On 6 March 2013 11:11, Inderpal Singh inderpal.si...@linaro.org wrote: The first patch moves the tzpc_init file from smdk5250 to armv7/exynos. The second makes tzpc_init common for exynos4 and exynos5. And the third makes necessary changes to exynos4 based origen and smdkv310 boards. The patchset has been tested on exynos4 based origen and exynos5 based Arndale board. Inderpal Singh (3): exynos: move tzpc_init to armv7/exynos exynos: update tzpc_init to make it common for exynos4 and exynos5 exynos: Update origen and smdkv310 to use common tzpc_init arch/arm/cpu/armv7/exynos/Makefile |2 +- arch/arm/cpu/armv7/exynos/tzpc_init.c | 57 + arch/arm/cpu/armv7/s5p-common/Makefile |2 ++ arch/arm/include/asm/arch-exynos/tzpc.h | 28 +++ board/samsung/origen/lowlevel_init.S| 44 ++- board/samsung/origen/origen_setup.h | 25 - board/samsung/smdk5250/Makefile |1 - board/samsung/smdk5250/lowlevel_init.S |2 ++ board/samsung/smdk5250/setup.h | 25 - board/samsung/smdk5250/tzpc_init.c | 48 - board/samsung/smdkv310/lowlevel_init.S | 60 ++- include/configs/exynos5250-dt.h |2 -- include/configs/origen.h|2 ++ include/configs/smdkv310.h |2 ++ spl/Makefile|4 +++ 15 files changed, 102 insertions(+), 202 deletions(-) create mode 100644 arch/arm/cpu/armv7/exynos/tzpc_init.c delete mode 100644 board/samsung/smdk5250/tzpc_init.c -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Seems good to me. Acked-by: Chander Kashyap chander.kash...@linaro.org -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] Add Arndale board support
On 14 February 2013 17:00, Inderpal Singh inderpal.si...@linaro.org wrote: The Arndale board is based on samsung's exynos5250 SOC. First patch moves board specific options to board specific config file and the second patch adds the initial config and dts file for the arndale board. Inderpal Singh (2): smdk5250: move board specific options to board specific config file Exynos5: Arndale: Add support for exynos5250 based arndale board. board/samsung/dts/exynos5250-arndale.dts | 36 ++ boards.cfg |1 + include/configs/arndale.h| 39 +++ include/configs/exynos5250-dt.h | 60 -- include/configs/smdk5250.h | 35 + 5 files changed, 111 insertions(+), 60 deletions(-) create mode 100644 board/samsung/dts/exynos5250-arndale.dts create mode 100644 include/configs/arndale.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot for all patches in the series: Acked-by: Chander Kashyap chander.kash...@linaro.org -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses
Thanks for applying. On 26 December 2012 15:37, Minkyu Kang mk7.k...@samsung.com wrote: On 26/12/12 15:13, Minkyu Kang wrote: From: Chander Kashyap chander.kash...@linaro.org This patch populates base addresses of Exynos4x12 registers. Signed-off-by: Chander Kashyap chander.kash...@linaro.org Signed-off-by: Minkyu Kang mk7.k...@samsung.com --- Changes since v2: - rebased, add SPI and I2S addresses. arch/arm/include/asm/arch-exynos/cpu.h | 48 1 file changed, 42 insertions(+), 6 deletions(-) applied to u-boot-samsung/master. Thanks, Minkyu Kang. -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] EXYNOS4: Add support for Exynos4x12 SoCs
Dear Kim,
On 13 December 2012 13:51, 김정현 jh...@insignal.co.kr wrote:
Dear Chander,
2012년 12월 13일 15:19, Chander Kashyap 쓴 글:
On 13 December 2012 11:49, Chander Kashyap chander.kash...@linaro.org
wrote:
Dear Kim,
On 12 December 2012 13:24, Jeong Hyeon Kim snow.jh...@gmail.com wrote:
From: Jeong-Hyeon Kim jh...@insignal.co.kr
This patch adds the support for Exynos4212/4412.
Samsung's ARM Cortex-A9 based Exynos4x12 SoCs and Exynos4210 are similar.
Address of a few registers are different in CMU part like MPLL.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
arch/arm/cpu/armv7/exynos/clock.c|7 +-
arch/arm/include/asm/arch-exynos/clock.h | 240
++
arch/arm/include/asm/arch-exynos/cpu.h |1 +
3 files changed, 247 insertions(+), 1 deletion(-)
As i discussed with you these changes has been already posted.
http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/148856
Kindly use them and resend yours patches.
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index fe61f88..47e2e6c 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
Please have a look patch at the link.
[PATCH] EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency
http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/143640
I applied it and your resend patches at 7, Dec. to latest u-boot-samsung
tree.
http://patchwork.ozlabs.org/patch/204445/
It made compile error as below.
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h: In
function 'samsung_get_base_i2s':
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:208:
error: 'EXYNOS4X12_I2S_BASE' undeclared (first use in this function)
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:208:
error: (Each undeclared identifier is reported only once
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:208:
error: for each function it appears in.)
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h: In
function 'samsung_get_base_spi':
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:226:
error: 'EXYNOS4X12_SPI_BASE' undeclared (first use in this function)
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h: In
function 'samsung_get_base_spi_isp':
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:227:
error: 'EXYNOS4X12_SPI_ISP_BASE' undeclared (first use in this function)
You need apply my patches. Then add these base addresses in cpu.h and
create a patch. Then add yours board specific patches.
Please resend patches after fix it.
@@ -94,7 +94,12 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
r = readl(clk-apll_con0);
break;
case MPLL:
- r = readl(clk-mpll_con0);
+ if (proid_is_exynos4412()) {
+ struct exynos4412_clock *clk4412 =
+ (struct exynos4412_clock
*)samsung_get_base_clock();
+ r = readl(clk4412-mpll_con0);
+ } else
+ r = readl(clk-mpll_con0);
break;
case EPLL:
r = readl(clk-epll_con0);
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
index ff6781a..5d4ed5c 100644
--- a/arch/arm/include/asm/arch-exynos/clock.h
+++ b/arch/arm/include/asm/arch-exynos/clock.h
@@ -251,6 +251,246 @@ struct exynos4_clock {
unsigned intdiv_iem_l1;
};
+struct exynos4412_clock {
+ unsigned char res1[0x4200];
+ unsigned intsrc_leftbus;
+ unsigned char res2[0x1fc];
+ unsigned intmux_stat_leftbus;
+ unsigned char res3[0xfc];
+ unsigned intdiv_leftbus;
+ unsigned char res4[0xfc];
+ unsigned intdiv_stat_leftbus;
+ unsigned char res5[0x1fc];
+ unsigned intgate_ip_leftbus;
+ unsigned char res6[0x12c];
+ unsigned intgate_ip_image;
+ unsigned char res7[0xcc];
+ unsigned intclkout_cmu_leftbus;
+ unsigned intclkout_cmu_leftbus_div_stat;
+ unsigned char res8[0x37f8];
+ unsigned intsrc_rightbus;
+ unsigned char res9[0x1fc];
+ unsigned intmux_stat_rightbus;
+ unsigned char res10[0xfc];
+ unsigned intdiv_rightbus;
+ unsigned char res11[0xfc];
+ unsigned intdiv_stat_rightbus;
+ unsigned char res12[0x1fc];
+ unsigned intgate_ip_rightbus;
+ unsigned char res13[0x15c];
+ unsigned intgate_ip_perir;
+ unsigned char res14[0x9c];
+ unsigned intclkout_cmu_rightbus;
+ unsigned intclkout_cmu_rightbus_div_stat;
+ unsigned char res15[0x3608];
+ unsigned intepll_lock;
+ unsigned char
Re: [U-Boot] [PATCH 3/4] EXYNOS4: Add support for Exynos4x12 SoCs
;
+ unsigned intclkout_cmu_cpu_div_stat;
+ unsigned char res67[0x5f8];
+ unsigned intarmclk_stopctrl;
+ unsigned intatclk_stopctrl;
+ unsigned char res68[0x18];
+ unsigned intpwr_ctrl;
+ unsigned intpwr_ctrl2;
+ unsigned char res69[0x3d8];
+ unsigned intl2_status;
+ unsigned char res70[0xc];
+ unsigned intcpu_status;
+ unsigned char res71[0xc];
+ unsigned intptm_status;
+ unsigned char res72[0x2edc];
+ unsigned intclk_div_isp0;
+ unsigned intclk_div_isp1;
+ unsigned char res73[0xf8];
+ unsigned intclk_div_stat_isp0;
+ unsigned intclk_div_stat_isp1;
+ unsigned char res74[0x3f8];
+ unsigned intgate_ip_isp0;
+ unsigned intgate_ip_isp1;
+ unsigned char res75[0x1f8];
+ unsigned intclkout_cmu_isp;
+ unsigned intclkout_cmu_isp_stat;
+ unsigned char res76[0xf8];
+ unsigned intclkout_cmu_spare0;
+ unsigned intclkout_cmu_spare1;
+ unsigned intclkout_cmu_spare2;
+ unsigned intclkout_cmu_spare3;
+};
+
struct exynos5_clock {
unsigned intapll_lock;
unsigned char res1[0xfc];
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index d1b2ea8..7ee5366 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -152,6 +152,7 @@ static inline int proid_is_##type(void)
\
}
IS_EXYNOS_TYPE(exynos4210, 0x4210)
+IS_EXYNOS_TYPE(exynos4412, 0x4412)
IS_EXYNOS_TYPE(exynos5250, 0x5250)
#define SAMSUNG_BASE(device, base) \
--
1.7.9.5
--
with warm regards,
Chander Kashyap
___
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Re: [U-Boot] [PATCH 3/4] EXYNOS4: Add support for Exynos4x12 SoCs
On 13 December 2012 11:49, Chander Kashyap chander.kash...@linaro.org wrote:
Dear Kim,
On 12 December 2012 13:24, Jeong Hyeon Kim snow.jh...@gmail.com wrote:
From: Jeong-Hyeon Kim jh...@insignal.co.kr
This patch adds the support for Exynos4212/4412.
Samsung's ARM Cortex-A9 based Exynos4x12 SoCs and Exynos4210 are similar.
Address of a few registers are different in CMU part like MPLL.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
arch/arm/cpu/armv7/exynos/clock.c|7 +-
arch/arm/include/asm/arch-exynos/clock.h | 240
++
arch/arm/include/asm/arch-exynos/cpu.h |1 +
3 files changed, 247 insertions(+), 1 deletion(-)
As i discussed with you these changes has been already posted.
http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/148856
Kindly use them and resend yours patches.
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index fe61f88..47e2e6c 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
Please have a look patch at the link.
[PATCH] EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency
http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/143640
@@ -94,7 +94,12 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
r = readl(clk-apll_con0);
break;
case MPLL:
- r = readl(clk-mpll_con0);
+ if (proid_is_exynos4412()) {
+ struct exynos4412_clock *clk4412 =
+ (struct exynos4412_clock
*)samsung_get_base_clock();
+ r = readl(clk4412-mpll_con0);
+ } else
+ r = readl(clk-mpll_con0);
break;
case EPLL:
r = readl(clk-epll_con0);
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
index ff6781a..5d4ed5c 100644
--- a/arch/arm/include/asm/arch-exynos/clock.h
+++ b/arch/arm/include/asm/arch-exynos/clock.h
@@ -251,6 +251,246 @@ struct exynos4_clock {
unsigned intdiv_iem_l1;
};
+struct exynos4412_clock {
+ unsigned char res1[0x4200];
+ unsigned intsrc_leftbus;
+ unsigned char res2[0x1fc];
+ unsigned intmux_stat_leftbus;
+ unsigned char res3[0xfc];
+ unsigned intdiv_leftbus;
+ unsigned char res4[0xfc];
+ unsigned intdiv_stat_leftbus;
+ unsigned char res5[0x1fc];
+ unsigned intgate_ip_leftbus;
+ unsigned char res6[0x12c];
+ unsigned intgate_ip_image;
+ unsigned char res7[0xcc];
+ unsigned intclkout_cmu_leftbus;
+ unsigned intclkout_cmu_leftbus_div_stat;
+ unsigned char res8[0x37f8];
+ unsigned intsrc_rightbus;
+ unsigned char res9[0x1fc];
+ unsigned intmux_stat_rightbus;
+ unsigned char res10[0xfc];
+ unsigned intdiv_rightbus;
+ unsigned char res11[0xfc];
+ unsigned intdiv_stat_rightbus;
+ unsigned char res12[0x1fc];
+ unsigned intgate_ip_rightbus;
+ unsigned char res13[0x15c];
+ unsigned intgate_ip_perir;
+ unsigned char res14[0x9c];
+ unsigned intclkout_cmu_rightbus;
+ unsigned intclkout_cmu_rightbus_div_stat;
+ unsigned char res15[0x3608];
+ unsigned intepll_lock;
+ unsigned char res16[0xc];
+ unsigned intvpll_lock;
+ unsigned char res17[0xec];
+ unsigned intepll_con0;
+ unsigned intepll_con1;
+ unsigned intepll_con2;
+ unsigned char res18[0x4];
+ unsigned intvpll_con0;
+ unsigned intvpll_con1;
+ unsigned intvpll_con2;
+ unsigned char res19[0xe4];
+ unsigned intsrc_top0;
+ unsigned intsrc_top1;
+ unsigned char res20[0x8];
+ unsigned intsrc_cam0;
+ unsigned intsrc_tv;
+ unsigned intsrc_mfc;
+ unsigned intsrc_g3d;
+ unsigned char res21[0x4];
+ unsigned intsrc_lcd0;
+ unsigned intsrc_isp;
+ unsigned intsrc_maudio;
+ unsigned intsrc_fsys;
+ unsigned char res22[0xc];
+ unsigned intsrc_peril0;
+ unsigned intsrc_peril1;
+ unsigned intsrc_cam1;
+ unsigned char res23[0xc4];
+ unsigned intsrc_mask_cam0;
+ unsigned intsrc_mask_tv;
+ unsigned char res24[0xc];
+ unsigned intsrc_mask_lcd;
+ unsigned intsrc_mask_isp;
+ unsigned intsrc_mask_maudio;
+ unsigned intsrc_mask_fsys;
+ unsigned char res25[0xc];
+ unsigned intsrc_mask_peril0;
+ unsigned intsrc_mask_peril1;
+ unsigned char res26[0xb8];
+ unsigned intmux_stat_top
[U-Boot] [Resend Patch v2 0/3] EXYNOS: Add support for Exynos4x12
This patch series popultes Register addresses, clock structure and gpio structure for Exynos4x12. Rebase to latest u-boot-samsung tree. Chander Kashyap (3): EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12 EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12 arch/arm/include/asm/arch-exynos/clock.h | 276 ++ arch/arm/include/asm/arch-exynos/cpu.h | 48 +- arch/arm/include/asm/arch-exynos/gpio.h | 85 + 3 files changed, 402 insertions(+), 7 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Resend Patch v2 1/3] EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses
This patch populates base addresses of Exynos4x12 registers.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/cpu.h | 48 +++-
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index d1b2ea8..86c7905 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -27,7 +27,7 @@
#define EXYNOS_CPU_NAMEExynos
#define EXYNOS4_ADDR_BASE 0x1000
-/* EXYNOS4 */
+/* EXYNOS4 Common*/
#define EXYNOS4_GPIO_PART3_BASE0x0386
#define EXYNOS4_PRO_ID 0x1000
#define EXYNOS4_SYSREG_BASE0x1001
@@ -61,7 +61,37 @@
#define EXYNOS4_DP_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE
-/* EXYNOS5 */
+/* EXYNOS4X12 */
+#define EXYNOS4X12_GPIO_PART3_BASE 0x0386
+#define EXYNOS4X12_PRO_ID 0x1000
+#define EXYNOS4X12_SYSREG_BASE 0x1001
+#define EXYNOS4X12_POWER_BASE 0x1002
+#define EXYNOS4X12_SWRESET 0x10020400
+#define EXYNOS4X12_USBPHY_CONTROL 0x10020704
+#define EXYNOS4X12_CLOCK_BASE 0x1003
+#define EXYNOS4X12_SYSTIMER_BASE 0x1005
+#define EXYNOS4X12_WATCHDOG_BASE 0x1006
+#define EXYNOS4X12_DMC0_BASE 0x1060
+#define EXYNOS4X12_DMC1_BASE 0x1061
+#define EXYNOS4X12_GPIO_PART4_BASE 0x106E
+#define EXYNOS4X12_GPIO_PART2_BASE 0x1100
+#define EXYNOS4X12_GPIO_PART1_BASE 0x1140
+#define EXYNOS4X12_FIMD_BASE 0x11C0
+#define EXYNOS4X12_MIPI_DSIM_BASE 0x11C8
+#define EXYNOS4X12_USBOTG_BASE 0x1248
+#define EXYNOS4X12_MMC_BASE0x1251
+#define EXYNOS4X12_SROMC_BASE 0x1257
+#define EXYNOS4X12_USB_HOST_EHCI_BASE 0x1258
+#define EXYNOS4X12_USBPHY_BASE 0x125B
+#define EXYNOS4X12_UART_BASE 0x1380
+#define EXYNOS4X12_I2C_BASE0x1386
+#define EXYNOS4X12_PWMTIMER_BASE 0x139D
+
+#define EXYNOS4X12_ADC_BASEDEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_DP_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_MODEM_BASE DEVICE_NOT_AVAILABLE
+
+/* EXYNOS5 Common*/
#define EXYNOS5_I2C_SPACING0x1
#define EXYNOS5_GPIO_PART4_BASE0x0386
@@ -152,17 +182,21 @@ static inline int proid_is_##type(void)
\
}
IS_EXYNOS_TYPE(exynos4210, 0x4210)
+IS_EXYNOS_TYPE(exynos4412, 0x4412)
IS_EXYNOS_TYPE(exynos5250, 0x5250)
#define SAMSUNG_BASE(device, base) \
static inline unsigned int samsung_get_base_##device(void) \
{ \
- if (cpu_is_exynos4()) \
- return EXYNOS4_##base; \
- else if (cpu_is_exynos5()) \
+ if (cpu_is_exynos4()) { \
+ if (proid_is_exynos4412()) \
+ return EXYNOS4X12_##base; \
+ else\
+ return EXYNOS4_##base; \
+ } else if (cpu_is_exynos5()) { \
return EXYNOS5_##base; \
- else\
- return 0; \
+ } \
+ return 0; \
}
SAMSUNG_BASE(adc, ADC_BASE)
--
1.7.9.5
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[U-Boot] [Resend Patch v2 2/3] EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12
This patch adds clock structure for Exynos4x12.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/clock.h | 276 ++
1 file changed, 276 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
index ff6781a..9b56b4e 100644
--- a/arch/arm/include/asm/arch-exynos/clock.h
+++ b/arch/arm/include/asm/arch-exynos/clock.h
@@ -251,6 +251,282 @@ struct exynos4_clock {
unsigned intdiv_iem_l1;
};
+struct exynos4x12_clock {
+ unsigned char res1[0x4200];
+ unsigned intsrc_leftbus;
+ unsigned char res2[0x1fc];
+ unsigned intmux_stat_leftbus;
+ unsigned char res3[0xfc];
+ unsigned intdiv_leftbus;
+ unsigned char res4[0xfc];
+ unsigned intdiv_stat_leftbus;
+ unsigned char res5[0x1fc];
+ unsigned intgate_ip_leftbus;
+ unsigned char res6[0x12c];
+ unsigned intgate_ip_image;
+ unsigned char res7[0xcc];
+ unsigned intclkout_leftbus;
+ unsigned intclkout_leftbus_div_stat;
+ unsigned char res8[0x37f8];
+ unsigned intsrc_rightbus;
+ unsigned char res9[0x1fc];
+ unsigned intmux_stat_rightbus;
+ unsigned char res10[0xfc];
+ unsigned intdiv_rightbus;
+ unsigned char res11[0xfc];
+ unsigned intdiv_stat_rightbus;
+ unsigned char res12[0x1fc];
+ unsigned intgate_ip_rightbus;
+ unsigned char res13[0x15c];
+ unsigned intgate_ip_perir;
+ unsigned char res14[0x9c];
+ unsigned intclkout_rightbus;
+ unsigned intclkout_rightbus_div_stat;
+ unsigned char res15[0x3608];
+ unsigned intepll_lock;
+ unsigned char res16[0xc];
+ unsigned intvpll_lock;
+ unsigned char res17[0xec];
+ unsigned intepll_con0;
+ unsigned intepll_con1;
+ unsigned intepll_con2;
+ unsigned char res18[0x4];
+ unsigned intvpll_con0;
+ unsigned intvpll_con1;
+ unsigned intvpll_con2;
+ unsigned char res19[0xe4];
+ unsigned intsrc_top0;
+ unsigned intsrc_top1;
+ unsigned char res20[0x8];
+ unsigned intsrc_cam;
+ unsigned intsrc_tv;
+ unsigned intsrc_mfc;
+ unsigned intsrc_g3d;
+ unsigned char res21[0x4];
+ unsigned intsrc_lcd;
+ unsigned intsrc_isp;
+ unsigned intsrc_maudio;
+ unsigned intsrc_fsys;
+ unsigned char res22[0xc];
+ unsigned intsrc_peril0;
+ unsigned intsrc_peril1;
+ unsigned intsrc_cam1;
+ unsigned char res23[0xb4];
+ unsigned intsrc_mask_top;
+ unsigned char res24[0xc];
+ unsigned intsrc_mask_cam;
+ unsigned intsrc_mask_tv;
+ unsigned char res25[0xc];
+ unsigned intsrc_mask_lcd;
+ unsigned intsrc_mask_isp;
+ unsigned intsrc_mask_maudio;
+ unsigned intsrc_mask_fsys;
+ unsigned char res26[0xc];
+ unsigned intsrc_mask_peril0;
+ unsigned intsrc_mask_peril1;
+ unsigned char res27[0xb8];
+ unsigned intmux_stat_top0;
+ unsigned intmux_stat_top1;
+ unsigned char res28[0x10];
+ unsigned intmux_stat_mfc;
+ unsigned intmux_stat_g3d;
+ unsigned char res29[0x28];
+ unsigned intmux_stat_cam1;
+ unsigned char res30[0xb4];
+ unsigned intdiv_top;
+ unsigned char res31[0xc];
+ unsigned intdiv_cam;
+ unsigned intdiv_tv;
+ unsigned intdiv_mfc;
+ unsigned intdiv_g3d;
+ unsigned char res32[0x4];
+ unsigned intdiv_lcd;
+ unsigned intdiv_isp;
+ unsigned intdiv_maudio;
+ unsigned intdiv_fsys0;
+ unsigned intdiv_fsys1;
+ unsigned intdiv_fsys2;
+ unsigned intdiv_fsys3;
+ unsigned intdiv_peril0;
+ unsigned intdiv_peril1;
+ unsigned intdiv_peril2;
+ unsigned intdiv_peril3;
+ unsigned intdiv_peril4;
+ unsigned intdiv_peril5;
+ unsigned intdiv_cam1;
+ unsigned char res33[0x14];
+ unsigned intdiv2_ratio;
+ unsigned char res34[0x8c];
+ unsigned intdiv_stat_top;
+ unsigned char res35[0xc];
+ unsigned intdiv_stat_cam;
+ unsigned intdiv_stat_tv;
+ unsigned intdiv_stat_mfc;
+ unsigned intdiv_stat_g3d;
+ unsigned char res36[0x4];
+ unsigned intdiv_stat_lcd;
+ unsigned intdiv_stat_isp;
+ unsigned intdiv_stat_maudio;
+ unsigned intdiv_stat_fsys0;
+ unsigned intdiv_stat_fsys1;
+ unsigned intdiv_stat_fsys2;
+ unsigned intdiv_stat_fsys3;
+ unsigned int
[U-Boot] [Resend Patch v2 3/3] EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12
This patch adds gpio structure for Exynos4x12.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/gpio.h | 85 +++
1 file changed, 85 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
index 4db8fd6..cfe1024 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -79,6 +79,67 @@ struct exynos4_gpio_part3 {
struct s5p_gpio_bank z;
};
+struct exynos4x12_gpio_part1 {
+ struct s5p_gpio_bank a0;
+ struct s5p_gpio_bank a1;
+ struct s5p_gpio_bank b;
+ struct s5p_gpio_bank c0;
+ struct s5p_gpio_bank c1;
+ struct s5p_gpio_bank d0;
+ struct s5p_gpio_bank d1;
+ struct s5p_gpio_bank res1[0x5];
+ struct s5p_gpio_bank f0;
+ struct s5p_gpio_bank f1;
+ struct s5p_gpio_bank f2;
+ struct s5p_gpio_bank f3;
+ struct s5p_gpio_bank res2[0x2];
+ struct s5p_gpio_bank j0;
+ struct s5p_gpio_bank j1;
+};
+
+struct exynos4x12_gpio_part2 {
+ struct s5p_gpio_bank res1[0x2];
+ struct s5p_gpio_bank k0;
+ struct s5p_gpio_bank k1;
+ struct s5p_gpio_bank k2;
+ struct s5p_gpio_bank k3;
+ struct s5p_gpio_bank l0;
+ struct s5p_gpio_bank l1;
+ struct s5p_gpio_bank l2;
+ struct s5p_gpio_bank y0;
+ struct s5p_gpio_bank y1;
+ struct s5p_gpio_bank y2;
+ struct s5p_gpio_bank y3;
+ struct s5p_gpio_bank y4;
+ struct s5p_gpio_bank y5;
+ struct s5p_gpio_bank y6;
+ struct s5p_gpio_bank res2[0x3];
+ struct s5p_gpio_bank m0;
+ struct s5p_gpio_bank m1;
+ struct s5p_gpio_bank m2;
+ struct s5p_gpio_bank m3;
+ struct s5p_gpio_bank m4;
+ struct s5p_gpio_bank res3[0x48];
+ struct s5p_gpio_bank x0;
+ struct s5p_gpio_bank x1;
+ struct s5p_gpio_bank x2;
+ struct s5p_gpio_bank x3;
+};
+
+struct exynos4x12_gpio_part3 {
+ struct s5p_gpio_bank z;
+};
+
+struct exynos4x12_gpio_part4 {
+ struct s5p_gpio_bank v0;
+ struct s5p_gpio_bank v1;
+ struct s5p_gpio_bank res1[0x1];
+ struct s5p_gpio_bank v2;
+ struct s5p_gpio_bank v3;
+ struct s5p_gpio_bank res2[0x1];
+ struct s5p_gpio_bank v4;
+};
+
struct exynos5_gpio_part1 {
struct s5p_gpio_bank a0;
struct s5p_gpio_bank a1;
@@ -163,6 +224,30 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int
gpio, int mode);
- EXYNOS4_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
* GPIO_PER_BANK) + pin) + EXYNOS4_GPIO_PART1_MAX)
+#define exynos4x12_gpio_part1_get_nr(bank, pin) \
+ ((unsigned int) (((struct exynos4x12_gpio_part1 *) \
+ EXYNOS4X12_GPIO_PART1_BASE)-bank)) \
+ - EXYNOS4X12_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin)
+
+#define EXYNOS4X12_GPIO_PART1_MAX ((sizeof(struct exynos4x12_gpio_part1) \
+ / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos4x12_gpio_part2_get_nr(bank, pin) \
+ (((unsigned int) (((struct exynos4x12_gpio_part2 *) \
+ EXYNOS4X12_GPIO_PART2_BASE)-bank)) \
+ - EXYNOS4X12_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART1_MAX)
+
+#define EXYNOS4X12_GPIO_PART2_MAX ((sizeof(struct exynos4x12_gpio_part2) \
+ / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos4x12_gpio_part3_get_nr(bank, pin) \
+ (((unsigned int) (((struct exynos4x12_gpio_part3 *) \
+ EXYNOS4X12_GPIO_PART3_BASE)-bank)) \
+ - EXYNOS4X12_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART2_MAX)
+
#define exynos5_gpio_part1_get_nr(bank, pin) \
((unsigned int) (((struct exynos5_gpio_part1 *) \
EXYNOS5_GPIO_PART1_BASE)-bank)) \
--
1.7.9.5
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Re: [U-Boot] [PATCH v2 0/3] EXYNOS: Add support for Exynos4x12
Dear Minkyu, On 7 December 2012 13:19, Minkyu Kang mk7.k...@samsung.com wrote: Dear Chander, On 02/11/12 19:51, Chander Kashyap wrote: ping On 2 October 2012 15:16, Chander Kashyap chander.kash...@linaro.org wrote: This patch series popultes Register addresses, clock structure and gpio structure for Exynos4x12. Changes in v2: - Fixed the GPIO base address macro for exynos4x12_gpio_part3_get_nr in arch/arm/include/asm/arch-exynos/gpio.h Chander Kashyap (3): EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12 EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12 arch/arm/include/asm/arch-exynos/clock.h | 276 ++ arch/arm/include/asm/arch-exynos/cpu.h | 48 +- arch/arm/include/asm/arch-exynos/gpio.h | 85 + 3 files changed, 402 insertions(+), 7 deletions(-) Patches are looks good. Please rebase this patchset. Sure i will resend after re-basing. Thanks. Minkyu Kang. -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] EXYNOS: Add support for Exynos4x12
ping On 2 October 2012 15:16, Chander Kashyap chander.kash...@linaro.org wrote: This patch series popultes Register addresses, clock structure and gpio structure for Exynos4x12. Changes in v2: - Fixed the GPIO base address macro for exynos4x12_gpio_part3_get_nr in arch/arm/include/asm/arch-exynos/gpio.h Chander Kashyap (3): EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12 EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12 arch/arm/include/asm/arch-exynos/clock.h | 276 ++ arch/arm/include/asm/arch-exynos/cpu.h | 48 +- arch/arm/include/asm/arch-exynos/gpio.h | 85 + 3 files changed, 402 insertions(+), 7 deletions(-) -- 1.7.9.5 -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/9 V2] EXYNOS: Add I2S base address
Hi, On 22 August 2012 12:14, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch adds base address for I2S Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com Acked-by: Chander Kashyap chander.kash...@gmail.com -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 9/9 V2] SMDK5250: Enable Sound
On 22 August 2012 12:14, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch enables sound support for EXYNOS5 Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- Acked-by: Chander Kashyap chander.kash...@linaro.org -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 8/9 V2] EXYNOS: Add clock for I2S
);
+ else
+ return 0;
+}
+
+void clock_select_i2s_clk_source(void)
+{
+ if (cpu_is_exynos5())
+ exynos5_clock_select_i2s_clk_source();
+}
+
+int clock_epll_set_rate(unsigned long rate)
+{
+ if (cpu_is_exynos5())
+ return exynos5_clock_epll_set_rate(rate);
+ else
+ return 0;
+}
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index 4e51402..f32c634 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -41,4 +41,7 @@ unsigned long get_lcd_clk(void);
void set_lcd_clk(void);
void set_mipi_clk(void);
int spi_set_clock_rate(enum periph_id periph_id, unsigned int rate);
+void clock_select_i2s_clk_source(void);
+int clock_set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq);
+int clock_epll_set_rate(unsigned long rate);
#endif
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
index fce38ef..1df49a9 100644
--- a/arch/arm/include/asm/arch-exynos/clock.h
+++ b/arch/arm/include/asm/arch-exynos/clock.h
@@ -595,9 +595,38 @@ struct exynos5_clock {
unsigned intpll_div2_sel;
unsigned char res123[0xf5d8];
};
+
+/* structure for epll configuration used in audio clock configuration */
+struct st_epll_con_val {
+ unsigned int freq_out; /* frequency out */
+ unsigned int en_lock_det; /* enable lock detect */
+ unsigned int m_div; /* m divider value */
+ unsigned int p_div; /* p divider value */
+ unsigned int s_div; /* s divider value */
+ unsigned int k_dsm; /* k value of delta signal modulator
*/
+};
#endif
#define MPLL_FOUT_SEL_SHIFT4
+#define EXYNOS5_EPLLCON0_LOCKED_SHIFT 29 /* EPLL Locked bit position*/
+#define TIMEOUT_EPLL_LOCK 1000
+
+#define AUDIO_0_RATIO_MASK 0x0f
+#define AUDIO_1_RATIO_MASK 0x0f
+
+#define AUDIO1_SEL_MASK0xf
+#define CLK_SRC_SCLK_EPLL 0x7
+
+/* CON0 bit-fields */
+#define EPLL_CON0_MDIV_MASK0x1ff
+#define EPLL_CON0_PDIV_MASK0x3f
+#define EPLL_CON0_SDIV_MASK0x7
+#define EPLL_CON0_MDIV_SHIFT 16
+#define EPLL_CON0_PDIV_SHIFT 8
+#define EPLL_CON0_SDIV_SHIFT 0
+#define EPLL_CON0_LOCK_DET_EN_SHIFT28
+#define EPLL_CON0_LOCK_DET_EN_MASK 1
+
#define MPLL_FOUT_SEL_MASK 0x1
#define BPLL_FOUT_SEL_SHIFT0
#define BPLL_FOUT_SEL_MASK 0x1
--
1.7.4.4
--
with warm regards,
Chander Kashyap
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[U-Boot] [PATCH v2] EXYNOS: Clock: Add common function for pll rate calculation
From: Minkyu Kang mk7.k...@samsung.com
Moved the common code to calculate pll clock rate to new function
exynos_get_pll_clk().
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes from v1:
- Author name changed
arch/arm/cpu/armv7/exynos/clock.c | 102 ++---
1 file changed, 38 insertions(+), 64 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 4f3b451..a042423 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -26,41 +26,19 @@
#include asm/arch/clock.h
#include asm/arch/clk.h
-/* exynos4: return pll clock frequency */
-static unsigned long exynos4_get_pll_clk(int pllreg)
+/* exynos: return pll clock frequency */
+static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
{
- struct exynos4_clock *clk =
- (struct exynos4_clock *)samsung_get_base_clock();
- unsigned long r, m, p, s, k = 0, mask, fout;
+ unsigned long m, p, s = 0, mask, fout;
unsigned int freq;
-
- switch (pllreg) {
- case APLL:
- r = readl(clk-apll_con0);
- break;
- case MPLL:
- r = readl(clk-mpll_con0);
- break;
- case EPLL:
- r = readl(clk-epll_con0);
- k = readl(clk-epll_con1);
- break;
- case VPLL:
- r = readl(clk-vpll_con0);
- k = readl(clk-vpll_con1);
- break;
- default:
- printf(Unsupported PLL (%d)\n, pllreg);
- return 0;
- }
-
/*
* APLL_CON: MIDV [25:16]
* MPLL_CON: MIDV [25:16]
* EPLL_CON: MIDV [24:16]
* VPLL_CON: MIDV [24:16]
+* BPLL_CON: MIDV [25:16]: Exynos5
*/
- if (pllreg == APLL || pllreg == MPLL)
+ if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL)
mask = 0x3ff;
else
mask = 0x1ff;
@@ -92,13 +70,43 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
return fout;
}
+/* exynos4: return pll clock frequency */
+static unsigned long exynos4_get_pll_clk(int pllreg)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned long r, k = 0;
+
+ switch (pllreg) {
+ case APLL:
+ r = readl(clk-apll_con0);
+ break;
+ case MPLL:
+ r = readl(clk-mpll_con0);
+ break;
+ case EPLL:
+ r = readl(clk-epll_con0);
+ k = readl(clk-epll_con1);
+ break;
+ case VPLL:
+ r = readl(clk-vpll_con0);
+ k = readl(clk-vpll_con1);
+ break;
+ default:
+ printf(Unsupported PLL (%d)\n, pllreg);
+ return 0;
+ }
+
+ return exynos_get_pll_clk(pllreg, r, k);
+}
+
/* exynos5: return pll clock frequency */
static unsigned long exynos5_get_pll_clk(int pllreg)
{
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
- unsigned long r, m, p, s, k = 0, mask, fout;
- unsigned int freq, pll_div2_sel, fout_sel;
+ unsigned long r, k = 0, fout;
+ unsigned int pll_div2_sel, fout_sel;
switch (pllreg) {
case APLL:
@@ -123,41 +131,7 @@ static unsigned long exynos5_get_pll_clk(int pllreg)
return 0;
}
- /*
-* APLL_CON: MIDV [25:16]
-* MPLL_CON: MIDV [25:16]
-* EPLL_CON: MIDV [24:16]
-* VPLL_CON: MIDV [24:16]
-* BPLL_CON: MIDV [25:16]
-*/
- if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL)
- mask = 0x3ff;
- else
- mask = 0x1ff;
-
- m = (r 16) mask;
-
- /* PDIV [13:8] */
- p = (r 8) 0x3f;
- /* SDIV [2:0] */
- s = r 0x7;
-
- freq = CONFIG_SYS_CLK_FREQ;
-
- if (pllreg == EPLL) {
- k = k 0x;
- /* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
- fout = (m + k / 65536) * (freq / (p * (1 s)));
- } else if (pllreg == VPLL) {
- k = k 0xfff;
- /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
- fout = (m + k / 1024) * (freq / (p * (1 s)));
- } else {
- if (s 1)
- s = 1;
- /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
- fout = m * (freq / (p * (1 (s - 1;
- }
+ fout = exynos_get_pll_clk(pllreg, r, k);
/* According to the user manual, in EVT1 MPLL and BPLL always gives
* 1.6GHz clock, so divide by 2 to get 800MHz MPLL clock.*/
--
1.7.9.5
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[U-Boot] [PATCH v2] ARCH: EXYNOS: add support to match product id
From: Minkyu Kang mk7.k...@samsung.com
Based upon single SoC there can be multiple varients.
This patch add support to match the complete product ID.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes from v1:
- Author name changed
arch/arm/include/asm/arch-exynos/cpu.h |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 2cd4ae1..2bde10c 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -139,6 +139,15 @@ static inline int cpu_is_##type(void)
\
IS_SAMSUNG_TYPE(exynos4, 0x4)
IS_SAMSUNG_TYPE(exynos5, 0x5)
+#define IS_EXYNOS_TYPE(type, id) \
+static inline int proid_is_##type(void)\
+{ \
+ return s5p_cpu_id == id;\
+}
+
+IS_EXYNOS_TYPE(exynos4210, 0x4210)
+IS_EXYNOS_TYPE(exynos5250, 0x5250)
+
#define SAMSUNG_BASE(device, base) \
static inline unsigned int samsung_get_base_##device(void) \
{ \
--
1.7.9.5
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Re: [U-Boot] [PATCH v2] ARCH: EXYNOS: add support to match product id
Hi Albert, Thanks. On 15 October 2012 17:58, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Chander, On Mon, 15 Oct 2012 17:28:23 +0530, Chander Kashyap chander.kash...@linaro.org wrote: From: Minkyu Kang mk7.k...@samsung.com Based upon single SoC there can be multiple varients. Typo here (varients = variants) I will fix it. -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] ARCH: EXYNOS: add support to match product id
From: Minkyu Kang mk7.k...@samsung.com
Based upon single SoC there can be multiple variants.
This patch add support to match the complete product ID.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes from v1:
- Author name changed
Changes from v2:
- Fixed typo
arch/arm/include/asm/arch-exynos/cpu.h |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 2cd4ae1..2bde10c 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -139,6 +139,15 @@ static inline int cpu_is_##type(void)
\
IS_SAMSUNG_TYPE(exynos4, 0x4)
IS_SAMSUNG_TYPE(exynos5, 0x5)
+#define IS_EXYNOS_TYPE(type, id) \
+static inline int proid_is_##type(void)\
+{ \
+ return s5p_cpu_id == id;\
+}
+
+IS_EXYNOS_TYPE(exynos4210, 0x4210)
+IS_EXYNOS_TYPE(exynos5250, 0x5250)
+
#define SAMSUNG_BASE(device, base) \
static inline unsigned int samsung_get_base_##device(void) \
{ \
--
1.7.9.5
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Re: [U-Boot] go command is not working for smdkv310 board
Hi Balaji, On 9 October 2012 16:00, VISWANADHULA BALAJI vbalaj...@gmail.com wrote: Hi, I am using a u-boot-2010-12 version for the smdkv310 board. I used dnw tool for loading a u-boot on to the RAM with C0008000 as a load adress. *Go* command is not working and gets hang when i type the following command to run the u-boot code on to the u-boot prompt. go c8000 open include/configs/smdkv310.h #define CONFIG_STANDALONE_LOAD_ADDR 0x6000 then load application to 0x6000 and do: go 0x6000 Can any one help me how to come out from this issue. Thanks Balaji ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Need of MMU in uboot level
Hi Shabbir, On 8 October 2012 14:20, shabbir shabbirkh...@gmail.com wrote: Hi, We are using exynos 4210 based odroid-PC board.I have gone throgh the uboot code in which it is enabling MMU.I want to know why do we need to enable MMU in Which u-boot you are reffering to. uboot level.I came across this question when i was trying to use go command in uboot which does not seem to be working. Thanks Regards, Shabbir. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency
Adds functions to extract clock frequency of Exynos4x12 IPs.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/cpu/armv7/exynos/clock.c | 163 +++--
1 file changed, 158 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index a042423..012beab 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -100,6 +100,36 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
return exynos_get_pll_clk(pllreg, r, k);
}
+/* exynos4x12: return pll clock frequency */
+static unsigned long exynos4x12_get_pll_clk(int pllreg)
+{
+ struct exynos4x12_clock *clk =
+ (struct exynos4x12_clock *)samsung_get_base_clock();
+ unsigned long r, k = 0;
+
+ switch (pllreg) {
+ case APLL:
+ r = readl(clk-apll_con0);
+ break;
+ case MPLL:
+ r = readl(clk-mpll_con0);
+ break;
+ case EPLL:
+ r = readl(clk-epll_con0);
+ k = readl(clk-epll_con1);
+ break;
+ case VPLL:
+ r = readl(clk-vpll_con0);
+ k = readl(clk-vpll_con1);
+ break;
+ default:
+ printf(Unsupported PLL (%d)\n, pllreg);
+ return 0;
+ }
+
+ return exynos_get_pll_clk(pllreg, r, k);
+}
+
/* exynos5: return pll clock frequency */
static unsigned long exynos5_get_pll_clk(int pllreg)
{
@@ -181,6 +211,28 @@ static unsigned long exynos4_get_arm_clk(void)
return armclk;
}
+/* exynos4x12: return ARM clock frequency */
+static unsigned long exynos4x12_get_arm_clk(void)
+{
+ struct exynos4x12_clock *clk =
+ (struct exynos4x12_clock *)samsung_get_base_clock();
+ unsigned long div;
+ unsigned long armclk;
+ unsigned int core_ratio;
+ unsigned int core2_ratio;
+
+ div = readl(clk-div_cpu0);
+
+ /* CORE_RATIO: [2:0], CORE2_RATIO: [30:28] */
+ core_ratio = (div 0) 0x7;
+ core2_ratio = (div 28) 0x7;
+
+ armclk = get_pll_clk(APLL) / (core_ratio + 1);
+ armclk /= (core2_ratio + 1);
+
+ return armclk;
+}
+
/* exynos5: return ARM clock frequency */
static unsigned long exynos5_get_arm_clk(void)
{
@@ -246,6 +298,20 @@ static unsigned long exynos4_get_pwm_clk(void)
return pclk;
}
+/* exynos4x12: return pwm clock frequency */
+static unsigned long exynos4x12_get_pwm_clk(void)
+{
+ unsigned long pclk, sclk;
+ unsigned int ratio;
+
+ sclk = get_pll_clk(MPLL);
+ ratio = 8;
+
+ pclk = sclk / (ratio + 1);
+
+ return pclk;
+}
+
/* exynos5: return pwm clock frequency */
static unsigned long exynos5_get_pwm_clk(void)
{
@@ -314,6 +380,51 @@ static unsigned long exynos4_get_uart_clk(int dev_index)
return uclk;
}
+/* exynos4x12: return uart clock frequency */
+static unsigned long exynos4x12_get_uart_clk(int dev_index)
+{
+ struct exynos4x12_clock *clk =
+ (struct exynos4x12_clock *)samsung_get_base_clock();
+ unsigned long uclk, sclk;
+ unsigned int sel;
+ unsigned int ratio;
+
+ /*
+* CLK_SRC_PERIL0
+* UART0_SEL [3:0]
+* UART1_SEL [7:4]
+* UART2_SEL [8:11]
+* UART3_SEL [12:15]
+* UART4_SEL [16:19]
+*/
+ sel = readl(clk-src_peril0);
+ sel = (sel (dev_index 2)) 0xf;
+
+ if (sel == 0x6)
+ sclk = get_pll_clk(MPLL);
+ else if (sel == 0x7)
+ sclk = get_pll_clk(EPLL);
+ else if (sel == 0x8)
+ sclk = get_pll_clk(VPLL);
+ else
+ return 0;
+
+ /*
+* CLK_DIV_PERIL0
+* UART0_RATIO [3:0]
+* UART1_RATIO [7:4]
+* UART2_RATIO [8:11]
+* UART3_RATIO [12:15]
+* UART4_RATIO [16:19]
+*/
+ ratio = readl(clk-div_peril0);
+ ratio = (ratio (dev_index 2)) 0xf;
+
+ uclk = sclk / (ratio + 1);
+
+ return uclk;
+}
+
/* exynos5: return uart clock frequency */
static unsigned long exynos5_get_uart_clk(int dev_index)
{
@@ -388,6 +499,33 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned
int div)
writel(val, addr);
}
+/* exynos4x12: set the mmc clock */
+static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div)
+{
+ struct exynos4x12_clock *clk =
+ (struct exynos4x12_clock *)samsung_get_base_clock();
+ unsigned int addr;
+ unsigned int val;
+
+ /*
+* CLK_DIV_FSYS1
+* MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
+* CLK_DIV_FSYS2
+* MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
+*/
+ if (dev_index 2) {
+ addr = (unsigned int)clk-div_fsys1;
+ } else {
+ addr = (unsigned int)clk-div_fsys2;
+ dev_index -= 2;
+ }
+
+ val = readl
[U-Boot] [PATCH] ARCH: EXYNOS: add support to match product id
From: Chander Kashyap chander.kash...@gmail.com
Based upon single SoC there can be multiple varients.
This patch add support to match the complete product ID.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/cpu.h |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 2cd4ae1..2bde10c 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -139,6 +139,15 @@ static inline int cpu_is_##type(void)
\
IS_SAMSUNG_TYPE(exynos4, 0x4)
IS_SAMSUNG_TYPE(exynos5, 0x5)
+#define IS_EXYNOS_TYPE(type, id) \
+static inline int proid_is_##type(void)\
+{ \
+ return s5p_cpu_id == id;\
+}
+
+IS_EXYNOS_TYPE(exynos4210, 0x4210)
+IS_EXYNOS_TYPE(exynos5250, 0x5250)
+
#define SAMSUNG_BASE(device, base) \
static inline unsigned int samsung_get_base_##device(void) \
{ \
--
1.7.9.5
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[U-Boot] [PATCH] EXYNOS: Clock: Add common function for pll rate calculation
Moved the common code to calculate pll clock rate to new funtion
exynos_get_pll_clk().
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/cpu/armv7/exynos/clock.c | 102 ++---
1 file changed, 38 insertions(+), 64 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 4f3b451..a042423 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -26,41 +26,19 @@
#include asm/arch/clock.h
#include asm/arch/clk.h
-/* exynos4: return pll clock frequency */
-static unsigned long exynos4_get_pll_clk(int pllreg)
+/* exynos: return pll clock frequency */
+static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
{
- struct exynos4_clock *clk =
- (struct exynos4_clock *)samsung_get_base_clock();
- unsigned long r, m, p, s, k = 0, mask, fout;
+ unsigned long m, p, s = 0, mask, fout;
unsigned int freq;
-
- switch (pllreg) {
- case APLL:
- r = readl(clk-apll_con0);
- break;
- case MPLL:
- r = readl(clk-mpll_con0);
- break;
- case EPLL:
- r = readl(clk-epll_con0);
- k = readl(clk-epll_con1);
- break;
- case VPLL:
- r = readl(clk-vpll_con0);
- k = readl(clk-vpll_con1);
- break;
- default:
- printf(Unsupported PLL (%d)\n, pllreg);
- return 0;
- }
-
/*
* APLL_CON: MIDV [25:16]
* MPLL_CON: MIDV [25:16]
* EPLL_CON: MIDV [24:16]
* VPLL_CON: MIDV [24:16]
+* BPLL_CON: MIDV [25:16]: Exynos5
*/
- if (pllreg == APLL || pllreg == MPLL)
+ if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL)
mask = 0x3ff;
else
mask = 0x1ff;
@@ -92,13 +70,43 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
return fout;
}
+/* exynos4: return pll clock frequency */
+static unsigned long exynos4_get_pll_clk(int pllreg)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned long r, k = 0;
+
+ switch (pllreg) {
+ case APLL:
+ r = readl(clk-apll_con0);
+ break;
+ case MPLL:
+ r = readl(clk-mpll_con0);
+ break;
+ case EPLL:
+ r = readl(clk-epll_con0);
+ k = readl(clk-epll_con1);
+ break;
+ case VPLL:
+ r = readl(clk-vpll_con0);
+ k = readl(clk-vpll_con1);
+ break;
+ default:
+ printf(Unsupported PLL (%d)\n, pllreg);
+ return 0;
+ }
+
+ return exynos_get_pll_clk(pllreg, r, k);
+}
+
/* exynos5: return pll clock frequency */
static unsigned long exynos5_get_pll_clk(int pllreg)
{
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
- unsigned long r, m, p, s, k = 0, mask, fout;
- unsigned int freq, pll_div2_sel, fout_sel;
+ unsigned long r, k = 0, fout;
+ unsigned int pll_div2_sel, fout_sel;
switch (pllreg) {
case APLL:
@@ -123,41 +131,7 @@ static unsigned long exynos5_get_pll_clk(int pllreg)
return 0;
}
- /*
-* APLL_CON: MIDV [25:16]
-* MPLL_CON: MIDV [25:16]
-* EPLL_CON: MIDV [24:16]
-* VPLL_CON: MIDV [24:16]
-* BPLL_CON: MIDV [25:16]
-*/
- if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL)
- mask = 0x3ff;
- else
- mask = 0x1ff;
-
- m = (r 16) mask;
-
- /* PDIV [13:8] */
- p = (r 8) 0x3f;
- /* SDIV [2:0] */
- s = r 0x7;
-
- freq = CONFIG_SYS_CLK_FREQ;
-
- if (pllreg == EPLL) {
- k = k 0x;
- /* FOUT = (MDIV + K / 65536) * FIN / (PDIV * 2^SDIV) */
- fout = (m + k / 65536) * (freq / (p * (1 s)));
- } else if (pllreg == VPLL) {
- k = k 0xfff;
- /* FOUT = (MDIV + K / 1024) * FIN / (PDIV * 2^SDIV) */
- fout = (m + k / 1024) * (freq / (p * (1 s)));
- } else {
- if (s 1)
- s = 1;
- /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
- fout = m * (freq / (p * (1 (s - 1;
- }
+ fout = exynos_get_pll_clk(pllreg, r, k);
/* According to the user manual, in EVT1 MPLL and BPLL always gives
* 1.6GHz clock, so divide by 2 to get 800MHz MPLL clock.*/
--
1.7.9.5
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[U-Boot] [PATCH 3/3] EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12
This patch adds gpio structure for Exynos4x12.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/gpio.h | 85 +++
1 file changed, 85 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
index 4db8fd6..47335e7 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -79,6 +79,67 @@ struct exynos4_gpio_part3 {
struct s5p_gpio_bank z;
};
+struct exynos4x12_gpio_part1 {
+ struct s5p_gpio_bank a0;
+ struct s5p_gpio_bank a1;
+ struct s5p_gpio_bank b;
+ struct s5p_gpio_bank c0;
+ struct s5p_gpio_bank c1;
+ struct s5p_gpio_bank d0;
+ struct s5p_gpio_bank d1;
+ struct s5p_gpio_bank res1[0x5];
+ struct s5p_gpio_bank f0;
+ struct s5p_gpio_bank f1;
+ struct s5p_gpio_bank f2;
+ struct s5p_gpio_bank f3;
+ struct s5p_gpio_bank res2[0x2];
+ struct s5p_gpio_bank j0;
+ struct s5p_gpio_bank j1;
+};
+
+struct exynos4x12_gpio_part2 {
+ struct s5p_gpio_bank res1[0x2];
+ struct s5p_gpio_bank k0;
+ struct s5p_gpio_bank k1;
+ struct s5p_gpio_bank k2;
+ struct s5p_gpio_bank k3;
+ struct s5p_gpio_bank l0;
+ struct s5p_gpio_bank l1;
+ struct s5p_gpio_bank l2;
+ struct s5p_gpio_bank y0;
+ struct s5p_gpio_bank y1;
+ struct s5p_gpio_bank y2;
+ struct s5p_gpio_bank y3;
+ struct s5p_gpio_bank y4;
+ struct s5p_gpio_bank y5;
+ struct s5p_gpio_bank y6;
+ struct s5p_gpio_bank res2[0x3];
+ struct s5p_gpio_bank m0;
+ struct s5p_gpio_bank m1;
+ struct s5p_gpio_bank m2;
+ struct s5p_gpio_bank m3;
+ struct s5p_gpio_bank m4;
+ struct s5p_gpio_bank res3[0x48];
+ struct s5p_gpio_bank x0;
+ struct s5p_gpio_bank x1;
+ struct s5p_gpio_bank x2;
+ struct s5p_gpio_bank x3;
+};
+
+struct exynos4x12_gpio_part3 {
+ struct s5p_gpio_bank z;
+};
+
+struct exynos4x12_gpio_part4 {
+ struct s5p_gpio_bank v0;
+ struct s5p_gpio_bank v1;
+ struct s5p_gpio_bank res1[0x1];
+ struct s5p_gpio_bank v2;
+ struct s5p_gpio_bank v3;
+ struct s5p_gpio_bank res2[0x1];
+ struct s5p_gpio_bank v4;
+};
+
struct exynos5_gpio_part1 {
struct s5p_gpio_bank a0;
struct s5p_gpio_bank a1;
@@ -163,6 +224,30 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int
gpio, int mode);
- EXYNOS4_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
* GPIO_PER_BANK) + pin) + EXYNOS4_GPIO_PART1_MAX)
+#define exynos4x12_gpio_part1_get_nr(bank, pin) \
+ ((unsigned int) (((struct exynos4x12_gpio_part1 *) \
+ EXYNOS4X12_GPIO_PART1_BASE)-bank)) \
+ - EXYNOS4X12_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin)
+
+#define EXYNOS4X12_GPIO_PART1_MAX ((sizeof(struct exynos4x12_gpio_part1) \
+ / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos4x12_gpio_part2_get_nr(bank, pin) \
+ (((unsigned int) (((struct exynos4x12_gpio_part2 *) \
+ EXYNOS4X12_GPIO_PART2_BASE)-bank)) \
+ - EXYNOS4X12_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART1_MAX)
+
+#define EXYNOS4X12_GPIO_PART2_MAX ((sizeof(struct exynos4x12_gpio_part2) \
+ / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos4x12_gpio_part3_get_nr(bank, pin) \
+ (((unsigned int) (((struct exynos4x12_gpio_part3 *) \
+ EXYNOS5_GPIO_PART3_BASE)-bank)) \
+ - EXYNOS4X12_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART2_MAX)
+
#define exynos5_gpio_part1_get_nr(bank, pin) \
((unsigned int) (((struct exynos5_gpio_part1 *) \
EXYNOS5_GPIO_PART1_BASE)-bank)) \
--
1.7.9.5
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[U-Boot] [PATCH 0/3] EXYNOS: Add support for Exynos4x12
This patch series popultes Register addresses, clock structure and gpio structure for Exynos4x12. Chander Kashyap (3): EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12 EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12 arch/arm/include/asm/arch-exynos/clock.h | 276 ++ arch/arm/include/asm/arch-exynos/cpu.h | 48 +- arch/arm/include/asm/arch-exynos/gpio.h | 85 + 3 files changed, 402 insertions(+), 7 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12
This patch adds clock structure for Exynos4x12.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/clock.h | 276 ++
1 file changed, 276 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
index fce38ef..8492f4e 100644
--- a/arch/arm/include/asm/arch-exynos/clock.h
+++ b/arch/arm/include/asm/arch-exynos/clock.h
@@ -251,6 +251,282 @@ struct exynos4_clock {
unsigned intdiv_iem_l1;
};
+struct exynos4x12_clock {
+ unsigned char res1[0x4200];
+ unsigned intsrc_leftbus;
+ unsigned char res2[0x1fc];
+ unsigned intmux_stat_leftbus;
+ unsigned char res3[0xfc];
+ unsigned intdiv_leftbus;
+ unsigned char res4[0xfc];
+ unsigned intdiv_stat_leftbus;
+ unsigned char res5[0x1fc];
+ unsigned intgate_ip_leftbus;
+ unsigned char res6[0x12c];
+ unsigned intgate_ip_image;
+ unsigned char res7[0xcc];
+ unsigned intclkout_leftbus;
+ unsigned intclkout_leftbus_div_stat;
+ unsigned char res8[0x37f8];
+ unsigned intsrc_rightbus;
+ unsigned char res9[0x1fc];
+ unsigned intmux_stat_rightbus;
+ unsigned char res10[0xfc];
+ unsigned intdiv_rightbus;
+ unsigned char res11[0xfc];
+ unsigned intdiv_stat_rightbus;
+ unsigned char res12[0x1fc];
+ unsigned intgate_ip_rightbus;
+ unsigned char res13[0x15c];
+ unsigned intgate_ip_perir;
+ unsigned char res14[0x9c];
+ unsigned intclkout_rightbus;
+ unsigned intclkout_rightbus_div_stat;
+ unsigned char res15[0x3608];
+ unsigned intepll_lock;
+ unsigned char res16[0xc];
+ unsigned intvpll_lock;
+ unsigned char res17[0xec];
+ unsigned intepll_con0;
+ unsigned intepll_con1;
+ unsigned intepll_con2;
+ unsigned char res18[0x4];
+ unsigned intvpll_con0;
+ unsigned intvpll_con1;
+ unsigned intvpll_con2;
+ unsigned char res19[0xe4];
+ unsigned intsrc_top0;
+ unsigned intsrc_top1;
+ unsigned char res20[0x8];
+ unsigned intsrc_cam;
+ unsigned intsrc_tv;
+ unsigned intsrc_mfc;
+ unsigned intsrc_g3d;
+ unsigned char res21[0x4];
+ unsigned intsrc_lcd;
+ unsigned intsrc_isp;
+ unsigned intsrc_maudio;
+ unsigned intsrc_fsys;
+ unsigned char res22[0xc];
+ unsigned intsrc_peril0;
+ unsigned intsrc_peril1;
+ unsigned intsrc_cam1;
+ unsigned char res23[0xb4];
+ unsigned intsrc_mask_top;
+ unsigned char res24[0xc];
+ unsigned intsrc_mask_cam;
+ unsigned intsrc_mask_tv;
+ unsigned char res25[0xc];
+ unsigned intsrc_mask_lcd;
+ unsigned intsrc_mask_isp;
+ unsigned intsrc_mask_maudio;
+ unsigned intsrc_mask_fsys;
+ unsigned char res26[0xc];
+ unsigned intsrc_mask_peril0;
+ unsigned intsrc_mask_peril1;
+ unsigned char res27[0xb8];
+ unsigned intmux_stat_top0;
+ unsigned intmux_stat_top1;
+ unsigned char res28[0x10];
+ unsigned intmux_stat_mfc;
+ unsigned intmux_stat_g3d;
+ unsigned char res29[0x28];
+ unsigned intmux_stat_cam1;
+ unsigned char res30[0xb4];
+ unsigned intdiv_top;
+ unsigned char res31[0xc];
+ unsigned intdiv_cam;
+ unsigned intdiv_tv;
+ unsigned intdiv_mfc;
+ unsigned intdiv_g3d;
+ unsigned char res32[0x4];
+ unsigned intdiv_lcd;
+ unsigned intdiv_isp;
+ unsigned intdiv_maudio;
+ unsigned intdiv_fsys0;
+ unsigned intdiv_fsys1;
+ unsigned intdiv_fsys2;
+ unsigned intdiv_fsys3;
+ unsigned intdiv_peril0;
+ unsigned intdiv_peril1;
+ unsigned intdiv_peril2;
+ unsigned intdiv_peril3;
+ unsigned intdiv_peril4;
+ unsigned intdiv_peril5;
+ unsigned intdiv_cam1;
+ unsigned char res33[0x14];
+ unsigned intdiv2_ratio;
+ unsigned char res34[0x8c];
+ unsigned intdiv_stat_top;
+ unsigned char res35[0xc];
+ unsigned intdiv_stat_cam;
+ unsigned intdiv_stat_tv;
+ unsigned intdiv_stat_mfc;
+ unsigned intdiv_stat_g3d;
+ unsigned char res36[0x4];
+ unsigned intdiv_stat_lcd;
+ unsigned intdiv_stat_isp;
+ unsigned intdiv_stat_maudio;
+ unsigned intdiv_stat_fsys0;
+ unsigned intdiv_stat_fsys1;
+ unsigned intdiv_stat_fsys2;
+ unsigned intdiv_stat_fsys3;
+ unsigned int
[U-Boot] [PATCH 1/3] EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses
This patch populates base addresses of Exynos4x12 registers.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/cpu.h | 48 +++-
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 2bde10c..680b93b 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -27,7 +27,7 @@
#define EXYNOS_CPU_NAMEExynos
#define EXYNOS4_ADDR_BASE 0x1000
-/* EXYNOS4 */
+/* EXYNOS4 Common*/
#define EXYNOS4_GPIO_PART3_BASE0x0386
#define EXYNOS4_PRO_ID 0x1000
#define EXYNOS4_SYSREG_BASE0x1001
@@ -58,7 +58,37 @@
#define EXYNOS4_GPIO_PART4_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS4_DP_BASEDEVICE_NOT_AVAILABLE
-/* EXYNOS5 */
+/* EXYNOS4X12 */
+#define EXYNOS4X12_GPIO_PART3_BASE 0x0386
+#define EXYNOS4X12_PRO_ID 0x1000
+#define EXYNOS4X12_SYSREG_BASE 0x1001
+#define EXYNOS4X12_POWER_BASE 0x1002
+#define EXYNOS4X12_SWRESET 0x10020400
+#define EXYNOS4X12_USBPHY_CONTROL 0x10020704
+#define EXYNOS4X12_CLOCK_BASE 0x1003
+#define EXYNOS4X12_SYSTIMER_BASE 0x1005
+#define EXYNOS4X12_WATCHDOG_BASE 0x1006
+#define EXYNOS4X12_DMC0_BASE 0x1060
+#define EXYNOS4X12_DMC1_BASE 0x1061
+#define EXYNOS4X12_GPIO_PART4_BASE 0x106E
+#define EXYNOS4X12_GPIO_PART2_BASE 0x1100
+#define EXYNOS4X12_GPIO_PART1_BASE 0x1140
+#define EXYNOS4X12_FIMD_BASE 0x11C0
+#define EXYNOS4X12_MIPI_DSIM_BASE 0x11C8
+#define EXYNOS4X12_USBOTG_BASE 0x1248
+#define EXYNOS4X12_MMC_BASE0x1251
+#define EXYNOS4X12_SROMC_BASE 0x1257
+#define EXYNOS4X12_USB_HOST_EHCI_BASE 0x1258
+#define EXYNOS4X12_USBPHY_BASE 0x125B
+#define EXYNOS4X12_UART_BASE 0x1380
+#define EXYNOS4X12_I2C_BASE0x1386
+#define EXYNOS4X12_PWMTIMER_BASE 0x139D
+
+#define EXYNOS4X12_ADC_BASEDEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_DP_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_MODEM_BASE DEVICE_NOT_AVAILABLE
+
+/* EXYNOS5 Common*/
#define EXYNOS5_I2C_SPACING0x1
#define EXYNOS5_GPIO_PART4_BASE0x0386
@@ -146,17 +176,21 @@ static inline int proid_is_##type(void)
\
}
IS_EXYNOS_TYPE(exynos4210, 0x4210)
+IS_EXYNOS_TYPE(exynos4412, 0x4412)
IS_EXYNOS_TYPE(exynos5250, 0x5250)
#define SAMSUNG_BASE(device, base) \
static inline unsigned int samsung_get_base_##device(void) \
{ \
- if (cpu_is_exynos4()) \
- return EXYNOS4_##base; \
- else if (cpu_is_exynos5()) \
+ if (cpu_is_exynos4()) { \
+ if (proid_is_exynos4412()) \
+ return EXYNOS4X12_##base; \
+ else\
+ return EXYNOS4_##base; \
+ } else if (cpu_is_exynos5()) { \
return EXYNOS5_##base; \
- else\
- return 0; \
+ } \
+ return 0; \
}
SAMSUNG_BASE(adc, ADC_BASE)
--
1.7.9.5
___
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[U-Boot] [PATCH v2 0/3] EXYNOS: Add support for Exynos4x12
This patch series popultes Register addresses, clock structure and gpio structure for Exynos4x12. Changes in v2: - Fixed the GPIO base address macro for exynos4x12_gpio_part3_get_nr in arch/arm/include/asm/arch-exynos/gpio.h Chander Kashyap (3): EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12 EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12 arch/arm/include/asm/arch-exynos/clock.h | 276 ++ arch/arm/include/asm/arch-exynos/cpu.h | 48 +- arch/arm/include/asm/arch-exynos/gpio.h | 85 + 3 files changed, 402 insertions(+), 7 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/3] EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses
This patch populates base addresses of Exynos4x12 registers.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/cpu.h | 48 +++-
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 2bde10c..680b93b 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -27,7 +27,7 @@
#define EXYNOS_CPU_NAMEExynos
#define EXYNOS4_ADDR_BASE 0x1000
-/* EXYNOS4 */
+/* EXYNOS4 Common*/
#define EXYNOS4_GPIO_PART3_BASE0x0386
#define EXYNOS4_PRO_ID 0x1000
#define EXYNOS4_SYSREG_BASE0x1001
@@ -58,7 +58,37 @@
#define EXYNOS4_GPIO_PART4_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS4_DP_BASEDEVICE_NOT_AVAILABLE
-/* EXYNOS5 */
+/* EXYNOS4X12 */
+#define EXYNOS4X12_GPIO_PART3_BASE 0x0386
+#define EXYNOS4X12_PRO_ID 0x1000
+#define EXYNOS4X12_SYSREG_BASE 0x1001
+#define EXYNOS4X12_POWER_BASE 0x1002
+#define EXYNOS4X12_SWRESET 0x10020400
+#define EXYNOS4X12_USBPHY_CONTROL 0x10020704
+#define EXYNOS4X12_CLOCK_BASE 0x1003
+#define EXYNOS4X12_SYSTIMER_BASE 0x1005
+#define EXYNOS4X12_WATCHDOG_BASE 0x1006
+#define EXYNOS4X12_DMC0_BASE 0x1060
+#define EXYNOS4X12_DMC1_BASE 0x1061
+#define EXYNOS4X12_GPIO_PART4_BASE 0x106E
+#define EXYNOS4X12_GPIO_PART2_BASE 0x1100
+#define EXYNOS4X12_GPIO_PART1_BASE 0x1140
+#define EXYNOS4X12_FIMD_BASE 0x11C0
+#define EXYNOS4X12_MIPI_DSIM_BASE 0x11C8
+#define EXYNOS4X12_USBOTG_BASE 0x1248
+#define EXYNOS4X12_MMC_BASE0x1251
+#define EXYNOS4X12_SROMC_BASE 0x1257
+#define EXYNOS4X12_USB_HOST_EHCI_BASE 0x1258
+#define EXYNOS4X12_USBPHY_BASE 0x125B
+#define EXYNOS4X12_UART_BASE 0x1380
+#define EXYNOS4X12_I2C_BASE0x1386
+#define EXYNOS4X12_PWMTIMER_BASE 0x139D
+
+#define EXYNOS4X12_ADC_BASEDEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_DP_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_MODEM_BASE DEVICE_NOT_AVAILABLE
+
+/* EXYNOS5 Common*/
#define EXYNOS5_I2C_SPACING0x1
#define EXYNOS5_GPIO_PART4_BASE0x0386
@@ -146,17 +176,21 @@ static inline int proid_is_##type(void)
\
}
IS_EXYNOS_TYPE(exynos4210, 0x4210)
+IS_EXYNOS_TYPE(exynos4412, 0x4412)
IS_EXYNOS_TYPE(exynos5250, 0x5250)
#define SAMSUNG_BASE(device, base) \
static inline unsigned int samsung_get_base_##device(void) \
{ \
- if (cpu_is_exynos4()) \
- return EXYNOS4_##base; \
- else if (cpu_is_exynos5()) \
+ if (cpu_is_exynos4()) { \
+ if (proid_is_exynos4412()) \
+ return EXYNOS4X12_##base; \
+ else\
+ return EXYNOS4_##base; \
+ } else if (cpu_is_exynos5()) { \
return EXYNOS5_##base; \
- else\
- return 0; \
+ } \
+ return 0; \
}
SAMSUNG_BASE(adc, ADC_BASE)
--
1.7.9.5
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[U-Boot] [PATCH v2 2/3] EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12
This patch adds clock structure for Exynos4x12.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/clock.h | 276 ++
1 file changed, 276 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
index fce38ef..8492f4e 100644
--- a/arch/arm/include/asm/arch-exynos/clock.h
+++ b/arch/arm/include/asm/arch-exynos/clock.h
@@ -251,6 +251,282 @@ struct exynos4_clock {
unsigned intdiv_iem_l1;
};
+struct exynos4x12_clock {
+ unsigned char res1[0x4200];
+ unsigned intsrc_leftbus;
+ unsigned char res2[0x1fc];
+ unsigned intmux_stat_leftbus;
+ unsigned char res3[0xfc];
+ unsigned intdiv_leftbus;
+ unsigned char res4[0xfc];
+ unsigned intdiv_stat_leftbus;
+ unsigned char res5[0x1fc];
+ unsigned intgate_ip_leftbus;
+ unsigned char res6[0x12c];
+ unsigned intgate_ip_image;
+ unsigned char res7[0xcc];
+ unsigned intclkout_leftbus;
+ unsigned intclkout_leftbus_div_stat;
+ unsigned char res8[0x37f8];
+ unsigned intsrc_rightbus;
+ unsigned char res9[0x1fc];
+ unsigned intmux_stat_rightbus;
+ unsigned char res10[0xfc];
+ unsigned intdiv_rightbus;
+ unsigned char res11[0xfc];
+ unsigned intdiv_stat_rightbus;
+ unsigned char res12[0x1fc];
+ unsigned intgate_ip_rightbus;
+ unsigned char res13[0x15c];
+ unsigned intgate_ip_perir;
+ unsigned char res14[0x9c];
+ unsigned intclkout_rightbus;
+ unsigned intclkout_rightbus_div_stat;
+ unsigned char res15[0x3608];
+ unsigned intepll_lock;
+ unsigned char res16[0xc];
+ unsigned intvpll_lock;
+ unsigned char res17[0xec];
+ unsigned intepll_con0;
+ unsigned intepll_con1;
+ unsigned intepll_con2;
+ unsigned char res18[0x4];
+ unsigned intvpll_con0;
+ unsigned intvpll_con1;
+ unsigned intvpll_con2;
+ unsigned char res19[0xe4];
+ unsigned intsrc_top0;
+ unsigned intsrc_top1;
+ unsigned char res20[0x8];
+ unsigned intsrc_cam;
+ unsigned intsrc_tv;
+ unsigned intsrc_mfc;
+ unsigned intsrc_g3d;
+ unsigned char res21[0x4];
+ unsigned intsrc_lcd;
+ unsigned intsrc_isp;
+ unsigned intsrc_maudio;
+ unsigned intsrc_fsys;
+ unsigned char res22[0xc];
+ unsigned intsrc_peril0;
+ unsigned intsrc_peril1;
+ unsigned intsrc_cam1;
+ unsigned char res23[0xb4];
+ unsigned intsrc_mask_top;
+ unsigned char res24[0xc];
+ unsigned intsrc_mask_cam;
+ unsigned intsrc_mask_tv;
+ unsigned char res25[0xc];
+ unsigned intsrc_mask_lcd;
+ unsigned intsrc_mask_isp;
+ unsigned intsrc_mask_maudio;
+ unsigned intsrc_mask_fsys;
+ unsigned char res26[0xc];
+ unsigned intsrc_mask_peril0;
+ unsigned intsrc_mask_peril1;
+ unsigned char res27[0xb8];
+ unsigned intmux_stat_top0;
+ unsigned intmux_stat_top1;
+ unsigned char res28[0x10];
+ unsigned intmux_stat_mfc;
+ unsigned intmux_stat_g3d;
+ unsigned char res29[0x28];
+ unsigned intmux_stat_cam1;
+ unsigned char res30[0xb4];
+ unsigned intdiv_top;
+ unsigned char res31[0xc];
+ unsigned intdiv_cam;
+ unsigned intdiv_tv;
+ unsigned intdiv_mfc;
+ unsigned intdiv_g3d;
+ unsigned char res32[0x4];
+ unsigned intdiv_lcd;
+ unsigned intdiv_isp;
+ unsigned intdiv_maudio;
+ unsigned intdiv_fsys0;
+ unsigned intdiv_fsys1;
+ unsigned intdiv_fsys2;
+ unsigned intdiv_fsys3;
+ unsigned intdiv_peril0;
+ unsigned intdiv_peril1;
+ unsigned intdiv_peril2;
+ unsigned intdiv_peril3;
+ unsigned intdiv_peril4;
+ unsigned intdiv_peril5;
+ unsigned intdiv_cam1;
+ unsigned char res33[0x14];
+ unsigned intdiv2_ratio;
+ unsigned char res34[0x8c];
+ unsigned intdiv_stat_top;
+ unsigned char res35[0xc];
+ unsigned intdiv_stat_cam;
+ unsigned intdiv_stat_tv;
+ unsigned intdiv_stat_mfc;
+ unsigned intdiv_stat_g3d;
+ unsigned char res36[0x4];
+ unsigned intdiv_stat_lcd;
+ unsigned intdiv_stat_isp;
+ unsigned intdiv_stat_maudio;
+ unsigned intdiv_stat_fsys0;
+ unsigned intdiv_stat_fsys1;
+ unsigned intdiv_stat_fsys2;
+ unsigned intdiv_stat_fsys3;
+ unsigned int
[U-Boot] [PATCH v2 3/3] EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12
This patch adds gpio structure for Exynos4x12.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/gpio.h | 85 +++
1 file changed, 85 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
index 4db8fd6..cfe1024 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -79,6 +79,67 @@ struct exynos4_gpio_part3 {
struct s5p_gpio_bank z;
};
+struct exynos4x12_gpio_part1 {
+ struct s5p_gpio_bank a0;
+ struct s5p_gpio_bank a1;
+ struct s5p_gpio_bank b;
+ struct s5p_gpio_bank c0;
+ struct s5p_gpio_bank c1;
+ struct s5p_gpio_bank d0;
+ struct s5p_gpio_bank d1;
+ struct s5p_gpio_bank res1[0x5];
+ struct s5p_gpio_bank f0;
+ struct s5p_gpio_bank f1;
+ struct s5p_gpio_bank f2;
+ struct s5p_gpio_bank f3;
+ struct s5p_gpio_bank res2[0x2];
+ struct s5p_gpio_bank j0;
+ struct s5p_gpio_bank j1;
+};
+
+struct exynos4x12_gpio_part2 {
+ struct s5p_gpio_bank res1[0x2];
+ struct s5p_gpio_bank k0;
+ struct s5p_gpio_bank k1;
+ struct s5p_gpio_bank k2;
+ struct s5p_gpio_bank k3;
+ struct s5p_gpio_bank l0;
+ struct s5p_gpio_bank l1;
+ struct s5p_gpio_bank l2;
+ struct s5p_gpio_bank y0;
+ struct s5p_gpio_bank y1;
+ struct s5p_gpio_bank y2;
+ struct s5p_gpio_bank y3;
+ struct s5p_gpio_bank y4;
+ struct s5p_gpio_bank y5;
+ struct s5p_gpio_bank y6;
+ struct s5p_gpio_bank res2[0x3];
+ struct s5p_gpio_bank m0;
+ struct s5p_gpio_bank m1;
+ struct s5p_gpio_bank m2;
+ struct s5p_gpio_bank m3;
+ struct s5p_gpio_bank m4;
+ struct s5p_gpio_bank res3[0x48];
+ struct s5p_gpio_bank x0;
+ struct s5p_gpio_bank x1;
+ struct s5p_gpio_bank x2;
+ struct s5p_gpio_bank x3;
+};
+
+struct exynos4x12_gpio_part3 {
+ struct s5p_gpio_bank z;
+};
+
+struct exynos4x12_gpio_part4 {
+ struct s5p_gpio_bank v0;
+ struct s5p_gpio_bank v1;
+ struct s5p_gpio_bank res1[0x1];
+ struct s5p_gpio_bank v2;
+ struct s5p_gpio_bank v3;
+ struct s5p_gpio_bank res2[0x1];
+ struct s5p_gpio_bank v4;
+};
+
struct exynos5_gpio_part1 {
struct s5p_gpio_bank a0;
struct s5p_gpio_bank a1;
@@ -163,6 +224,30 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int
gpio, int mode);
- EXYNOS4_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
* GPIO_PER_BANK) + pin) + EXYNOS4_GPIO_PART1_MAX)
+#define exynos4x12_gpio_part1_get_nr(bank, pin) \
+ ((unsigned int) (((struct exynos4x12_gpio_part1 *) \
+ EXYNOS4X12_GPIO_PART1_BASE)-bank)) \
+ - EXYNOS4X12_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin)
+
+#define EXYNOS4X12_GPIO_PART1_MAX ((sizeof(struct exynos4x12_gpio_part1) \
+ / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos4x12_gpio_part2_get_nr(bank, pin) \
+ (((unsigned int) (((struct exynos4x12_gpio_part2 *) \
+ EXYNOS4X12_GPIO_PART2_BASE)-bank)) \
+ - EXYNOS4X12_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART1_MAX)
+
+#define EXYNOS4X12_GPIO_PART2_MAX ((sizeof(struct exynos4x12_gpio_part2) \
+ / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos4x12_gpio_part3_get_nr(bank, pin) \
+ (((unsigned int) (((struct exynos4x12_gpio_part3 *) \
+ EXYNOS4X12_GPIO_PART3_BASE)-bank)) \
+ - EXYNOS4X12_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin) + EXYNOS4X12_GPIO_PART2_MAX)
+
#define exynos5_gpio_part1_get_nr(bank, pin) \
((unsigned int) (((struct exynos5_gpio_part1 *) \
EXYNOS5_GPIO_PART1_BASE)-bank)) \
--
1.7.9.5
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Re: [U-Boot] [PATCH v2 0/3] EXYNOS: Add support for Exynos4x12
Dear Marek, thanks. On 3 October 2012 05:46, Marek Vasut ma...@denx.de wrote: Dear Chander Kashyap, This patch series popultes Register addresses, clock structure and gpio structure for Exynos4x12. Changes in v2: - Fixed the GPIO base address macro for exynos4x12_gpio_part3_get_nr in arch/arm/include/asm/arch-exynos/gpio.h Chander Kashyap (3): EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12 EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12 arch/arm/include/asm/arch-exynos/clock.h | 276 ++ arch/arm/include/asm/arch-exynos/cpu.h | 48 +- arch/arm/include/asm/arch-exynos/gpio.h | 85 + 3 files changed, 402 insertions(+), 7 deletions(-) CCing Minkyu mk7.k...@samsung.com is also Minkyu's ID. Best regards, Marek Vasut -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] PXE: FDT: Add support for fdt in PXE
On 12 September 2012 21:57, Tom Rini tr...@ti.com wrote: On Fri, Sep 07, 2012 at 11:06:31AM +0530, Chander Kashyap wrote: Now DT support is becoming common for all new SoC's. Hence it is better to have option for getting specific FDT from the remote server. This patch adds support for new label i.e. 'fdt'. This will allow to retrieve 'fdt blob' from the remote server. This patch take care for the following scenarios. The usage of fdt is optional. The 'fdt blob' can be retrieved from tftp or can be available locally or can be absent. If 'fdt_addr_r' environment variable is set and 'fdt' label is defined retrieve 'fdt blob' from tftp. 'fdt_addr_r' is then passed along bootm command. If 'fdt_addr' is set and 'fdt blob' is not retrieved from the tftp pass 'fdt_addr' to bootm command. In this case 'fdt blob' will be available at 'fdt_addr'. If 'fdt_addr' is not set and 'fdt blob' is not retrieve from tftp pass NULL to boot command. In this case 'fdt blob' is not required and absent. Signed-off-by: Chander Kashyap chander.kash...@linaro.org --- Changes in v2: - Removed the duplicate code. changes in v3: - Added documentation for fdt lable in doc/README.pxe changes in v4: - Added New environment variable 'fdt_addr_r' for 'fdt blob' - Add more descriptive documentation for the 'fdt' retrieval. common/cmd_pxe.c | 39 --- doc/README.pxe | 14 -- 2 files changed, 48 insertions(+), 5 deletions(-) Looks good to me, Joe can you please pick this up if you're good with it? Thanks! -- Tom Any feedback on this? -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Exynos5250: Enable PXE Support
ping On 5 September 2012 16:08, Chander Kashyap chander.kash...@linaro.org wrote: Add PXE support for the Exynos5250. Signed-off-by: Chander Kashyap chander.kash...@linaro.org --- include/configs/smdk5250.h |6 ++ 1 file changed, 6 insertions(+) diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 27dab76..2029ad3 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -216,6 +216,12 @@ #define CONFIG_ENV_SROM_BANK 1 #endif /*CONFIG_CMD_NET*/ +/* Enable PXE Support */ +#ifdef CONFIG_CMD_NET +#define CONFIG_CMD_PXE +#define CONFIG_MENU +#endif + /* Enable devicetree support */ #define CONFIG_OF_LIBFDT -- 1.7.9.5 -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] PXE: FDT: Add support for fdt in PXE
Hi Jason
On 6 September 2012 21:07, Jason Hobbs jason.ho...@calxeda.com wrote:
Chander,
Comments inline.
On Thu, Sep 06, 2012 at 01:40:04AM -0400, Chander Kashyap wrote:
Now DT support is becomming common for all new SoC's. Hence it is better to
have option for getting specific FDT from the remote server.
This patch adds support for new lable i.e. fdt. If fdt_addr is specified
then load fdt blob from the remote server to fdt_address.
If a fdt label is provided AND fdt_addr is specified, then load the blob
from the remote server to fdt_addr. fdt_addr alone still works on its
own if the fdt_blob has already been loaded some other way
Yes will add it.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes in v2:
- Removed the duplicate code.
changes in v3:
- Added documentation for fdt lable in doc/README.pxe
s/lable/label - fix globally
Will fix it
common/cmd_pxe.c | 23 +++
doc/README.pxe | 10 --
2 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index 6b31dea..0c81e08 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -450,6 +450,7 @@ struct pxe_label {
char *kernel;
char *append;
char *initrd;
+ char *fdt;
int attempted;
int localboot;
struct list_head list;
@@ -517,6 +518,9 @@ static void label_destroy(struct pxe_label *label)
if (label-initrd)
free(label-initrd);
+ if (label-fdt)
+ free(label-fdt);
+
free(label);
}
@@ -541,6 +545,9 @@ static void label_print(void *data)
if (label-initrd)
printf(\t\tinitrd: %s\n, label-initrd);
+
+ if (label-fdt)
+ printf(\tfdt: %s\n, label-fdt);
}
/*
@@ -633,6 +640,15 @@ static void label_boot(struct pxe_label *label)
*/
bootm_argv[3] = getenv(fdt_addr);
+ /* if fdt label is defined then get fdt from server */
+ if (bootm_argv[3] label-fdt) {
+ if (get_relfile_envaddr(label-fdt, fdt_addr) 0) {
+ printf(Skipping %s for failure retrieving fdt\n,
+ label-name);
+ return;
+ }
+ }
+
if (bootm_argv[3])
bootm_argc = 4;
@@ -658,6 +674,7 @@ enum token_type {
T_DEFAULT,
T_PROMPT,
T_INCLUDE,
+ T_FDT,
T_INVALID
};
@@ -685,6 +702,7 @@ static const struct token keywords[] = {
{append, T_APPEND},
{initrd, T_INITRD},
{include, T_INCLUDE},
+ {fdt, T_FDT},
{NULL, T_INVALID}
};
@@ -1074,6 +1092,11 @@ static int parse_label(char **c, struct pxe_menu *cfg)
err = parse_sliteral(c, label-initrd);
break;
+ case T_FDT:
+ if (!label-fdt)
+ err = parse_sliteral(c, label-fdt);
+ break;
+
case T_LOCALBOOT:
err = parse_integer(c, label-localboot);
break;
diff --git a/doc/README.pxe b/doc/README.pxe
index 2bbf53d..835ca5a 100644
--- a/doc/README.pxe
+++ b/doc/README.pxe
@@ -93,8 +93,9 @@ pxe boot
be passed to the bootm command to boot the kernel. These environment
variables are required to be set.
- fdt_addr - the location of a fdt blob. If this is set, it will be
passed
- to bootm when booting a kernel.
+ fdt_addr - locations in RAM at which 'pxe boot' will store the fdt blob
+ it retrieves from tftp, if fdt lable is defined in pxe file. If this
is
+ set, it will be passed to bootm when booting a kernel.
Thinking about this some more, I don't think you can use fdt_addr as the
place to store the blob. fdt_addr isn't garaunteed to be writeable RAM -
it could be a read only non volatile memory like NOR flash.
If you notice, all of the other tftp retrievals go to _r suffixed
variables, which are garaunteed (by convention) to be in writeable RAM.
You may need to take an approach where an addition fdt_addr_r variable
is used to point at the location to store the fdt blob.
Sure, I will take care for this
Your description also makes it less clear that if fdt_addr is set, it
points to the blob, whether or not it was retrieved from tftp.
Will make it more clear
pxe file format
===
@@ -156,6 +157,11 @@ initrd path- if this label is chosen, use
tftp to retrieve the initrd
the initrd_addr_r environment variable, and that address
will be passed to bootm.
+fdt path - if this label is chosen, use tftp to retrieve the fdt
blob
+ at path. it will be stored at the address indicated in
+ the fdt_addr environment variable, and that address will
+ be passed to bootm.
+
again, this should
[U-Boot] [PATCH v4] PXE: FDT: Add support for fdt in PXE
Now DT support is becoming common for all new SoC's. Hence it is better
to have option for getting specific FDT from the remote server.
This patch adds support for new label i.e. 'fdt'. This will allow to
retrieve 'fdt blob' from the remote server. This patch take care for
the following scenarios.
The usage of fdt is optional.
The 'fdt blob' can be retrieved from tftp or can be available locally
or can be absent.
If 'fdt_addr_r' environment variable is set and 'fdt' label is defined
retrieve 'fdt blob' from tftp. 'fdt_addr_r' is then passed along bootm
command.
If 'fdt_addr' is set and 'fdt blob' is not retrieved from the tftp pass
'fdt_addr' to bootm command. In this case 'fdt blob' will be available
at 'fdt_addr'.
If 'fdt_addr' is not set and 'fdt blob' is not retrieve from tftp pass
NULL to boot command. In this case 'fdt blob' is not required and absent.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes in v2:
- Removed the duplicate code.
changes in v3:
- Added documentation for fdt lable in doc/README.pxe
changes in v4:
- Added New environment variable 'fdt_addr_r' for 'fdt blob'
- Add more descriptive documentation for the 'fdt' retrieval.
common/cmd_pxe.c | 39 ---
doc/README.pxe | 14 --
2 files changed, 48 insertions(+), 5 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index 6b31dea..ee75db9 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -450,6 +450,7 @@ struct pxe_label {
char *kernel;
char *append;
char *initrd;
+ char *fdt;
int attempted;
int localboot;
struct list_head list;
@@ -517,6 +518,9 @@ static void label_destroy(struct pxe_label *label)
if (label-initrd)
free(label-initrd);
+ if (label-fdt)
+ free(label-fdt);
+
free(label);
}
@@ -541,6 +545,9 @@ static void label_print(void *data)
if (label-initrd)
printf(\t\tinitrd: %s\n, label-initrd);
+
+ if (label-fdt)
+ printf(\tfdt: %s\n, label-fdt);
}
/*
@@ -628,10 +635,29 @@ static void label_boot(struct pxe_label *label)
bootm_argv[1] = getenv(kernel_addr_r);
/*
-* fdt usage is optional. If there is an fdt_addr specified, we will
-* pass it along to bootm, and adjust argc appropriately.
+* fdt usage is optional:
+* It handles the following scenarios. All scenarios are exclusive
+*
+* Scenario 1: If fdt_addr_r specified and fdt label is defined in
+* pxe file, retrieve fdt blob from server. Pass fdt_addr_r to bootm,
+* and adjust argc appropriately.
+*
+* Scenario 2: If there is an fdt_addr specified, pass it along to
+* bootm, and adjust argc appropriately.
+*
+* Scenario 3: fdt blob is not available.
*/
- bootm_argv[3] = getenv(fdt_addr);
+ bootm_argv[3] = getenv(fdt_addr_r);
+
+ /* if fdt label is defined then get fdt from server */
+ if (bootm_argv[3] label-fdt) {
+ if (get_relfile_envaddr(label-fdt, fdt_addr_r) 0) {
+ printf(Skipping %s for failure retrieving fdt\n,
+ label-name);
+ return;
+ }
+ } else
+ bootm_argv[3] = getenv(fdt_addr);
if (bootm_argv[3])
bootm_argc = 4;
@@ -658,6 +684,7 @@ enum token_type {
T_DEFAULT,
T_PROMPT,
T_INCLUDE,
+ T_FDT,
T_INVALID
};
@@ -685,6 +712,7 @@ static const struct token keywords[] = {
{append, T_APPEND},
{initrd, T_INITRD},
{include, T_INCLUDE},
+ {fdt, T_FDT},
{NULL, T_INVALID}
};
@@ -1074,6 +1102,11 @@ static int parse_label(char **c, struct pxe_menu *cfg)
err = parse_sliteral(c, label-initrd);
break;
+ case T_FDT:
+ if (!label-fdt)
+ err = parse_sliteral(c, label-fdt);
+ break;
+
case T_LOCALBOOT:
err = parse_integer(c, label-localboot);
break;
diff --git a/doc/README.pxe b/doc/README.pxe
index 2bbf53d..f00f280 100644
--- a/doc/README.pxe
+++ b/doc/README.pxe
@@ -93,8 +93,13 @@ pxe boot
be passed to the bootm command to boot the kernel. These environment
variables are required to be set.
- fdt_addr - the location of a fdt blob. If this is set, it will be passed
- to bootm when booting a kernel.
+ fdt_addr_r - location in RAM at which 'pxe boot' will store the fdt blob
it
+ retrieves from tftp. The retrieval is possible if 'fdt' label is defined
in
+ pxe file and 'fdt_addr_r' is set. If retrieval is possible, 'fdt_addr_r'
+ will be passed to bootm command to boot
[U-Boot] [RFC] [PATCH] PXE: FDT: Add support for fdt in PXE
Now DT support is becomming common for all new SoC's. Hence it is better to
have option for getting specific FDT from the remote server.
This patch adds support for new lable i.e. fdt. If fdt_addr is specified
then load fdt blob from the remote server to fdt_address.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
common/cmd_pxe.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index 6b31dea..11cde21 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -450,6 +450,7 @@ struct pxe_label {
char *kernel;
char *append;
char *initrd;
+ char *fdt;
int attempted;
int localboot;
struct list_head list;
@@ -517,6 +518,9 @@ static void label_destroy(struct pxe_label *label)
if (label-initrd)
free(label-initrd);
+ if (label-fdt)
+ free(label-fdt);
+
free(label);
}
@@ -541,6 +545,9 @@ static void label_print(void *data)
if (label-initrd)
printf(\t\tinitrd: %s\n, label-initrd);
+
+ if (label-fdt)
+ printf(\tfdt: %s\n, label-fdt);
}
/*
@@ -633,6 +640,21 @@ static void label_boot(struct pxe_label *label)
*/
bootm_argv[3] = getenv(fdt_addr);
+ /* if fdt label is defined then get fdt from server */
+ if (bootm_argv[3] label-fdt) {
+ if (get_relfile_envaddr(label-fdt, fdt_addr) 0) {
+ printf(Skipping %s for failure retrieving fdt\n,
+ label-name);
+ return;
+ }
+ }
+
+ /*
+* fdt usage is optional. If there is an fdt_addr specified, we will
+* pass it along to bootm, and adjust argc appropriately.
+*/
+ bootm_argv[3] = getenv(fdt_addr);
+
if (bootm_argv[3])
bootm_argc = 4;
@@ -658,6 +680,7 @@ enum token_type {
T_DEFAULT,
T_PROMPT,
T_INCLUDE,
+ T_FDT,
T_INVALID
};
@@ -685,6 +708,7 @@ static const struct token keywords[] = {
{append, T_APPEND},
{initrd, T_INITRD},
{include, T_INCLUDE},
+ {fdt, T_FDT},
{NULL, T_INVALID}
};
@@ -1074,6 +1098,11 @@ static int parse_label(char **c, struct pxe_menu *cfg)
err = parse_sliteral(c, label-initrd);
break;
+ case T_FDT:
+ if (!label-fdt)
+ err = parse_sliteral(c, label-fdt);
+ break;
+
case T_LOCALBOOT:
err = parse_integer(c, label-localboot);
break;
--
1.7.9.5
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[U-Boot] [PATCH v2] PXE: FDT: Add support for fdt in PXE
Now DT support is becomming common for all new SoC's. Hence it is better to
have option for getting specific FDT from the remote server.
This patch adds support for new lable i.e. fdt. If fdt_addr is specified
then load fdt blob from the remote server to fdt_address.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes in v2: Removed the duplicate code.
common/cmd_pxe.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index 6b31dea..0c81e08 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -450,6 +450,7 @@ struct pxe_label {
char *kernel;
char *append;
char *initrd;
+ char *fdt;
int attempted;
int localboot;
struct list_head list;
@@ -517,6 +518,9 @@ static void label_destroy(struct pxe_label *label)
if (label-initrd)
free(label-initrd);
+ if (label-fdt)
+ free(label-fdt);
+
free(label);
}
@@ -541,6 +545,9 @@ static void label_print(void *data)
if (label-initrd)
printf(\t\tinitrd: %s\n, label-initrd);
+
+ if (label-fdt)
+ printf(\tfdt: %s\n, label-fdt);
}
/*
@@ -633,6 +640,15 @@ static void label_boot(struct pxe_label *label)
*/
bootm_argv[3] = getenv(fdt_addr);
+ /* if fdt label is defined then get fdt from server */
+ if (bootm_argv[3] label-fdt) {
+ if (get_relfile_envaddr(label-fdt, fdt_addr) 0) {
+ printf(Skipping %s for failure retrieving fdt\n,
+ label-name);
+ return;
+ }
+ }
+
if (bootm_argv[3])
bootm_argc = 4;
@@ -658,6 +674,7 @@ enum token_type {
T_DEFAULT,
T_PROMPT,
T_INCLUDE,
+ T_FDT,
T_INVALID
};
@@ -685,6 +702,7 @@ static const struct token keywords[] = {
{append, T_APPEND},
{initrd, T_INITRD},
{include, T_INCLUDE},
+ {fdt, T_FDT},
{NULL, T_INVALID}
};
@@ -1074,6 +1092,11 @@ static int parse_label(char **c, struct pxe_menu *cfg)
err = parse_sliteral(c, label-initrd);
break;
+ case T_FDT:
+ if (!label-fdt)
+ err = parse_sliteral(c, label-fdt);
+ break;
+
case T_LOCALBOOT:
err = parse_integer(c, label-localboot);
break;
--
1.7.9.5
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[U-Boot] [PATCH] Exynos5250: Enable PXE Support
Add PXE support for the Exynos5250. Signed-off-by: Chander Kashyap chander.kash...@linaro.org --- include/configs/smdk5250.h |6 ++ 1 file changed, 6 insertions(+) diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 27dab76..2029ad3 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -216,6 +216,12 @@ #define CONFIG_ENV_SROM_BANK 1 #endif /*CONFIG_CMD_NET*/ +/* Enable PXE Support */ +#ifdef CONFIG_CMD_NET +#define CONFIG_CMD_PXE +#define CONFIG_MENU +#endif + /* Enable devicetree support */ #define CONFIG_OF_LIBFDT -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] PXE: FDT: Add support for fdt in PXE
Hi Jason, On 5 September 2012 19:33, Jason Hobbs jason.ho...@calxeda.com wrote: Chander, You should add a description of the new label to doc/README.pxe. Otherwise, it looks good. Jason I will do the same. -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] PXE: FDT: Add support for fdt in PXE
Now DT support is becomming common for all new SoC's. Hence it is better to
have option for getting specific FDT from the remote server.
This patch adds support for new lable i.e. fdt. If fdt_addr is specified
then load fdt blob from the remote server to fdt_address.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes in v2:
- Removed the duplicate code.
changes in v3:
- Added documentation for fdt lable in doc/README.pxe
common/cmd_pxe.c | 23 +++
doc/README.pxe | 10 --
2 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index 6b31dea..0c81e08 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -450,6 +450,7 @@ struct pxe_label {
char *kernel;
char *append;
char *initrd;
+ char *fdt;
int attempted;
int localboot;
struct list_head list;
@@ -517,6 +518,9 @@ static void label_destroy(struct pxe_label *label)
if (label-initrd)
free(label-initrd);
+ if (label-fdt)
+ free(label-fdt);
+
free(label);
}
@@ -541,6 +545,9 @@ static void label_print(void *data)
if (label-initrd)
printf(\t\tinitrd: %s\n, label-initrd);
+
+ if (label-fdt)
+ printf(\tfdt: %s\n, label-fdt);
}
/*
@@ -633,6 +640,15 @@ static void label_boot(struct pxe_label *label)
*/
bootm_argv[3] = getenv(fdt_addr);
+ /* if fdt label is defined then get fdt from server */
+ if (bootm_argv[3] label-fdt) {
+ if (get_relfile_envaddr(label-fdt, fdt_addr) 0) {
+ printf(Skipping %s for failure retrieving fdt\n,
+ label-name);
+ return;
+ }
+ }
+
if (bootm_argv[3])
bootm_argc = 4;
@@ -658,6 +674,7 @@ enum token_type {
T_DEFAULT,
T_PROMPT,
T_INCLUDE,
+ T_FDT,
T_INVALID
};
@@ -685,6 +702,7 @@ static const struct token keywords[] = {
{append, T_APPEND},
{initrd, T_INITRD},
{include, T_INCLUDE},
+ {fdt, T_FDT},
{NULL, T_INVALID}
};
@@ -1074,6 +1092,11 @@ static int parse_label(char **c, struct pxe_menu *cfg)
err = parse_sliteral(c, label-initrd);
break;
+ case T_FDT:
+ if (!label-fdt)
+ err = parse_sliteral(c, label-fdt);
+ break;
+
case T_LOCALBOOT:
err = parse_integer(c, label-localboot);
break;
diff --git a/doc/README.pxe b/doc/README.pxe
index 2bbf53d..835ca5a 100644
--- a/doc/README.pxe
+++ b/doc/README.pxe
@@ -93,8 +93,9 @@ pxe boot
be passed to the bootm command to boot the kernel. These environment
variables are required to be set.
- fdt_addr - the location of a fdt blob. If this is set, it will be passed
- to bootm when booting a kernel.
+ fdt_addr - locations in RAM at which 'pxe boot' will store the fdt blob
+ it retrieves from tftp, if fdt lable is defined in pxe file. If this is
+ set, it will be passed to bootm when booting a kernel.
pxe file format
===
@@ -156,6 +157,11 @@ initrd path - if this label is chosen, use tftp
to retrieve the initrd
the initrd_addr_r environment variable, and that address
will be passed to bootm.
+fdt path - if this label is chosen, use tftp to retrieve the fdt blob
+ at path. it will be stored at the address indicated in
+ the fdt_addr environment variable, and that address will
+ be passed to bootm.
+
localboot flag- Run the command defined by localcmd in the environment.
flag is ignored and is only here to match the syntax of
PXELINUX config files.
--
1.7.9.5
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Re: [U-Boot] [PATCH] Origen: Add default clock settings for multimedia IPs
Hi, On 31 August 2012 12:03, Tushar Behera tushar.beh...@linaro.org wrote: From: Annamalai Lakshmanan annamalai.lakshma...@linaro.org Added clock settings for MFC, FIMC, FB and G3D. They are clocked to maximum respective frequencies as per datasheet. Signed-off-by: Annamalai Lakshmanan annamalai.lakshma...@linaro.org Signed-off-by: Giridhar Maruthy giridhar.maru...@linaro.org Signed-off-by: Inderpal Singh inderpal.si...@linaro.org Signed-off-by: Tushar Behera tushar.beh...@linaro.org --- -- Acked-By: Chander Kashyap chander.kash...@linaro.org with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 9/9] EXYNOS5: Enable Sound
hi Rajeshwari, On 14 August 2012 11:15, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch enables sound support for EXYNOS5 Enable sound for exynos5 based smdk5250 not exynos5. Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- include/configs/smdk5250.h |8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 4b9093c..fae1c0c 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -242,6 +242,14 @@ #define CONFIG_ENV_SPI_MAX_HZ 5000 #endif +/* Sound */ +#define CONFIG_CMD_SOUND +#ifdef CONFIG_CMD_SOUND +#define CONFIG_SOUND +#define CONFIG_I2S +#define CONFIG_SOUND_WM8994 +#endif + /* Enable devicetree support */ #define CONFIG_OF_LIBFDT -- 1.7.4.4 -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/9] EXYNOS: Add pinmux for I2S
hi,
On 14 August 2012 11:15, Rajeshwari Shinde rajeshwar...@samsung.com wrote:
This patch adds pinmux support for I2S1
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c| 12
arch/arm/include/asm/arch-exynos/periph.h |1 +
2 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 13f75e0..ba25f6c 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -273,6 +273,15 @@ void exynos5_spi_config(int peripheral)
}
}
+void exynos5_i2s_config(int peripheral)
make it static.
+{
+ int i;
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+ for (i = 0; i 5; i++)
+ s5p_gpio_cfg_pin(gpio1-b0, i, GPIO_FUNC(0x02));
+}
+
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -307,6 +316,9 @@ static int exynos5_pinmux_config(int peripheral, int
flags)
case PERIPH_ID_SPI4:
exynos5_spi_config(peripheral);
break;
+ case PERIPH_ID_I2S1:
+ exynos5_i2s_config(peripheral);
+ break;
default:
debug(%s: invalid peripheral %d, __func__, peripheral);
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index dafc3f3..404e5db 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -38,6 +38,7 @@ enum periph_id {
PERIPH_ID_I2C5,
PERIPH_ID_I2C6,
PERIPH_ID_I2C7,
+ PERIPH_ID_I2S1,
PERIPH_ID_SDMMC0,
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
--
1.7.4.4
--
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Re: [U-Boot] Query on S3C2412
ccng'g to minkyu On 25 July 2012 17:07, Subash Patel subash.ramasw...@linaro.org wrote: Hi Chander, Do you or Minku or someone in SLSI maintain mainline u-boot for old SoC's like S3C24XX? Your answer may be useful to Jose. Regards, Subash On 07/25/2012 04:42 PM, José Miguel Gonçalves wrote: Hi Subash, That board that I mentioned in the patch was a Silex SX-560: http://www.silexamerica.com/products/embedded_wireless/intelligent_modules/sx-560.html You can get the open-source code for it (including u-boot) from here: http://www.silexamerica.com/opensource/index.html BTW, I have now switched to this S3C2416 based board: http://www.armdesigner.com/MINI2416.html and I'm in the process of updating the u-boot code supplied (a 1.3.4 version patched by Samsung for the SMDK2416) to the latest u-boot source code. Do you know if Samsung (or someone else) provided a more recent u-boot for the SMDK2416 (or any other S3C2416 board)? Best regards, José Gonçalves On 07/25/2012 11:52 AM, Subash Patel wrote: Including even Ben who posted your patch. Regards, Subash On 07/25/2012 04:20 PM, Subash Patel wrote: Hi Jose, I am from Samsung Electronics, SLSI and work in the open source project called Linaro. I find that you have posted a patch to fix booting s3c2412 based board recently, and hence assume that you are using that SoC. I am trying to cleanup some code for these old boards now. Unfortunately my inside- contacts in company do not have any u-boot for this SoC. Although we work on the SMDK boards internally, I will try to fix up u-boot which you may be using for the same. Can you help me to get u-boot, the one you use if publicly available? Regards, Subash -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] problem on BL1.bin
Hi Balaji, On 13 July 2012 11:04, VISWANADHULA BALAJI vbalaj...@gmail.com wrote: Hi All, Iam using smdkv310 board of SAMSUNG EXYNOS SOC. How bl1.bin file copy the uboot.bin file from SD/MMC card to DDR2 RAM. by using the following device copy functions #define SDMMC_ReadBlocks_eMMC_ByCPU(uNumOfBlks, uDstAddr) \ (((void(*)(u32, u32*))(*((u32 *)EXT_eMMC43_BL2_ByCPU_ADDRESS)))(uNumOfBlks, uDstAddr)) Which file contain this code. As far as i can see there is no such code in mainline u-boot for smdkv310. What is the source of u-boot you are working on? The macro EXT_eMMC43_BL2_ByCPU_ADDRESS is mapped to the IRAM physical adress Please anybody can help me. Thanks Balaji ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/8 V4] EXYNOS5: Enable I2C support
Hi, On 19 June 2012 13:00, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch set enables I2C support for EXYNOS5. This patchset modifies the s3c24x0 I2C driver to use same for EXYNOS5. Multichannel support has been added to the s3c24x0 I2C driver. s3c24x0_i2c struct has been moved to a common place as it can used by different SOC's. Changes in V2: - Incorporated review comments from Simon Glass. - Aligned the pinmux functionality as per latest comments Changes in V3: - Incorporated review comments from Joonyoung Shim for I2C driver. Changes in V4: - Resolved build error for S3C2410. But the patch version is still 3. Rajeshwari Shinde (8): EXYNOS: CLK: Add i2c clock EXYNOS: Add I2C base address. EXYNOS: PINMUX: Add pinmux support for I2C I2C: Move struct s3c24x0_i2c to a common place. I2C: S3C24X0: Add offset to calculate next i2c channel base address I2C: Modify the I2C driver for EXYNOS5 I2C: Add support for Multi channel CONFIG: SMDK5250: I2C: Enable I2C arch/arm/cpu/armv7/exynos/clock.c | 33 arch/arm/cpu/armv7/exynos/pinmux.c | 52 ++ arch/arm/include/asm/arch-exynos/clk.h | 1 + arch/arm/include/asm/arch-exynos/cpu.h | 3 + arch/arm/include/asm/arch-exynos/periph.h | 8 + arch/arm/include/asm/arch-s3c24x0/s3c24x0.h | 10 - drivers/i2c/s3c24x0_i2c.c | 266 +++ drivers/i2c/s3c24x0_i2c.h | 39 include/configs/smdk5250.h | 8 + 9 files changed, 336 insertions(+), 84 deletions(-) create mode 100644 drivers/i2c/s3c24x0_i2c.h -- 1.7.4.4 -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] MMC: DWMMC: Add DWMMC driver
-on value of RX_WMark is FIFO_DEPTH-1 */
+ fifo_depth = 1 + ((fifo_val 16) 0x7ff);
+ fifo_threshold = fifo_depth / 2;
+
+ fifo_val = ~(RX_WMARK | TX_WMARK | MSIZE_MASK);
+ fifo_val |= (fifo_threshold | (fifo_threshold 16) | MSIZE_8);
+ dw_mci_writel(host, fifo_val, DWMCI_FIFOTH);
+}
+
+
+static int dw_mci_reset(struct dw_mci_host *host)
+{
+ int err;
+
+ /* power on the card */
+ dw_mci_writel(host, POWER_ENABLE, DWMCI_PWREN);
+
+ err = dw_mci_reset_all(host);
+ if (err)
+ return err;
+
+ dw_mci_fifo_init(host);
+
+ /* clear all pending interrupts */
+ dw_mci_writel(host, INTMSK_ALL, DWMCI_RINTSTS);
+
+ /* interrupts are not used, disable all */
+ dw_mci_writel(host, 0, DWMCI_INTMASK);
+
+ return 0;
+}
+
+static int dw_mci_initialize(struct mmc *mmc)
+{
+ struct dw_mci_host *host = (struct dw_mci_host *)mmc-priv;
+ unsigned int ier;
+ int err;
+
+ err = dw_mci_reset(host);
+ if (err)
+ return err;
+
+ /* enumerate at 400KHz */
+ dw_mci_change_clock(host, MIN_DWMMC_CLOCK);
+
+ /* set auto stop command */
+ ier = dw_mci_readl(host, DWMCI_CONTROL);
+ ier |= SEND_AS_CCSD;
+ dw_mci_writel(host, ier, DWMCI_CONTROL);
+
+ /* set 1bit card mode */
+ dw_mci_writel(host, PORT0_CARD_WIDTH1, DWMCI_CTYPE);
+
+ dw_mci_writel(host, 0xf, DWMCI_DEBENCE);
+
+ /* set bus mode register for IDMAC */
+ dw_mci_writel(host, BMOD_IDMAC_RESET, DWMCI_BMOD);
+
+ dw_mci_writel(host, 0x0, DWMCI_IDINTEN);
+
+ /* set the max timeout for data and response */
+ dw_mci_writel(host, TMOUT_MAX, DWMCI_TMOUT);
+
+ return 0;
+}
+
+int dw_mci_init(enum periph_id periph_id, int bus_width)
+{
+ struct dw_mci_host *mmc_host;
+ struct mmc *mmc;
+
+ if (num_devs == MAX_MMC_HOSTS) {
+ debug(%s: Too many hosts\n, __func__);
+ return -1;
+ }
+
+ /* set the clock for dwmmc controller */
+ if (set_dw_mci_clk_div(periph_id)) {
+ debug(clock_set_dw_mci failed\n);
+ return -EINVAL;
+ }
+
+ mmc = dw_mci_dev[num_devs];
+ mmc_host = dw_mci_host[num_devs];
+
+ sprintf(mmc-name, DWMMC%d, num_devs);
+ num_devs++;
+
+ mmc-priv = mmc_host;
+ mmc-send_cmd = dw_mci_send_command;
+ mmc-set_ios = dw_mci_set_ios;
+ mmc-init = dw_mci_initialize;
+
+ /*
+ * In 2.40a spec, Data offset is changed.
+ * Need to check the version-id and set data-offset for DATA register.
+ */
+ mmc_host-verid = GET_VERID(dw_mci_readl(mmc_host, DWMCI_VERID));
+ debug(Version ID is %04x\n, mmc_host-verid);
+
+ if (mmc_host-verid DW_MMC_240A)
+ mmc_host-data_offset = DATA_OFFSET;
+ else
+ mmc_host-data_offset = DATA_240A_OFFSET;
+
+ mmc-voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+ mmc-host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
+
+ if (bus_width == 8)
+ mmc-host_caps |= MMC_MODE_8BIT;
+ else
+ mmc-host_caps |= MMC_MODE_4BIT;
+
+ mmc-f_min = MIN_DWMMC_CLOCK;
+ mmc-f_max = MAX_DWMMC_CLOCK;
+
+ exynos_pinmux_config(periph_id,
+ bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : 0);
+
+ mmc_host-clock = 0;
+ mmc_host-peripheral = periph_id;
+ mmc_host-ioaddr = (void *)samsung_get_base_dwmmc();
+ mmc-b_max = 1;
+ mmc_register(mmc);
+ mmc-block_dev.removable = 1;
+ debug(dwmmc: periph_id=%d, width=%d, ioaddr=%p\n,
+ periph_id, bus_width, mmc_host-ioaddr);
+
+ return 0;
+}
--
1.7.4.4
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Re: [U-Boot] [PATCH 2/2] exynos: smdk5250: Enable the pinmux setup
, GPIO_DRV_4X);
-
- /* GPK2[0:1] pull disable */
- if (i == 0 || i == 1) {
- s5p_gpio_set_pull(gpio1-c2, i, GPIO_PULL_NONE);
- continue;
- }
-
- /* GPK2[2:6] pull up */
- s5p_gpio_set_pull(gpio1-c2, i, GPIO_PULL_UP);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err 0) {
+ debug(SDMMC2 not configured\n);
+ return err;
}
err = s5p_mmc_init(2, 4);
@@ -220,55 +142,23 @@ int board_mmc_init(bd_t *bis)
static void board_uart_init(void)
{
- struct exynos5_gpio_part1 *gpio1 =
- (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
- int i;
+ int err;
- /*
- * UART0 GPIOs : GPA0CON[3:0] 0x
- * Must set CFG17 switches to select UART0 to use.
- */
- for (i = 0; i = 3; i++) {
- s5p_gpio_set_pull(gpio1-a0, i, GPIO_PULL_NONE);
- s5p_gpio_cfg_pin(gpio1-a0, i, GPIO_FUNC(0x2));
- }
+ err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
+ if (err 0)
+ debug(UART0 not configured\n);
- /*
- * UART1 GPIOs : GPA0CON[5:4] 0x22
- * Must set CFG17 switches to select UART1 to use.
- *
- * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
- * in order to use them (so that those pins can be used for I2C).
- */
- for (i = 4; i = 5; i++) {
- s5p_gpio_set_pull(gpio1-a0, i, GPIO_PULL_NONE);
- s5p_gpio_cfg_pin(gpio1-a0, i, GPIO_FUNC(0x2));
- }
+ err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
+ if (err 0)
+ debug(UART1 not configured\n);
- /*
- * UART2 GPIOs : GPA1CON[1:0] 0x22
- * Must set CFG17 switches to select UART2 to use.
- *
- * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
- * in order to use them (so that those pins can be used for I2C).
- */
- for (i = 0; i = 1; i++) {
- s5p_gpio_set_pull(gpio1-a1, i, GPIO_PULL_NONE);
- s5p_gpio_cfg_pin(gpio1-a1, i, GPIO_FUNC(0x2));
- }
-
- /*
- * UART3 GPIOs : GPA1CON[5:4] 0x22
- * Must set CFG16 switches to select UART3 to use.
- */
- for (i = 4; i = 5; i++) {
- s5p_gpio_set_pull(gpio1-a1, i, GPIO_PULL_NONE);
- s5p_gpio_cfg_pin(gpio1-a1, i, GPIO_FUNC(0x2));
- }
+ err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
+ if (err 0)
+ debug(UART2 not configured\n);
- /*
- * There's no mux for UART4--it's internal only
- */
+ err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
+ if (err 0)
+ debug(UART3 not configured\n);
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
--
1.7.4.4
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Re: [U-Boot] [PATCH 1/2] exynos5: pinmux: Added default pinumx settings
,
+ PERIPH_ID_SDMMC2,
+ PERIPH_ID_SDMMC3,
+ PERIPH_ID_SDMMC4,
+ PERIPH_ID_SROMC,
+ PERIPH_ID_UART0,
+ PERIPH_ID_UART1,
+ PERIPH_ID_UART2,
+ PERIPH_ID_UART3,
+
+ PERIPH_ID_COUNT,
+ PERIPH_ID_NONE = -1,
+};
+
+/*
+ * Flags for setting specific configarations of peripherals.
+ * List will grow with support for more devices getting added.
+ */
+enum {
+ PINMUX_FLAG_NONE = 0x,
+
+ /* Flags for eMMC */
+ PINMUX_FLAG_8BIT_MODE = 1 0, /* SDMMC 8-bit mode */
+
+ /* Flags for SROM controller */
+ PINMUX_FLAG_BANK = 3 0, /* bank number (0-3) */
+ PINMUX_FLAG_16BIT = 1 2, /* 16-bit width */
+};
+
+/**
+ * Configures the pinmux for a particular peripheral.
+ *
+ * Each gpio can be configured in many different ways (4 bits on exynos)
+ * such as input, output, special function, external interrupt
+ * etc. This function will configure the peripheral pinmux along with
+ * pull-up/down and drive strength.
+ *
+ * @param peripheral peripheral to be configured
+ * @param flags configure flags
+ * @return 0 if ok, -1 on error (e.g. unsupported peripheral)
+ */
+int exynos_pinmux_config(int peripheral, int flags);
+
+#endif
--
1.7.4.4
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Re: [U-Boot] [PATCH 1/2 V2] EXYNOS5: PINMUX: Added default pinumx settings
Dear Rajeshwari, On 23 May 2012 14:24, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch performs the pinmux configuration in a common file. As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is supported. Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com Signed-off-by: Che-Liang Chiou clch...@chromium.org Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- changes in V2: - Adding pinmux.c to Makefile moved to this patch. - exynos5_pinmux_config made static. arch/arm/cpu/armv7/exynos/Makefile | 2 +- arch/arm/cpu/armv7/exynos/pinmux.c | 189 + arch/arm/include/asm/arch-exynos/pinmux.h | 77 3 files changed, 267 insertions(+), 1 deletions(-) create mode 100644 arch/arm/cpu/armv7/exynos/pinmux.c create mode 100644 arch/arm/include/asm/arch-exynos/pinmux.h Acked-by: Chander Kashyap chander.kash...@linaro.org - with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2 V2] EXYNOS: SMDK5250: Enable the pinmux setup
Dear Rajeshwari, On 23 May 2012 14:24, Rajeshwari Shinde rajeshwar...@samsung.com wrote: Use the pinmux configuration function for SMDK5250. Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- changes in V2: - Removed exynos5_gpio_part1 *gpio1 global variable as initialised in pinmux.c board/samsung/smdk5250/smdk5250.c | 163 ++--- 1 files changed, 25 insertions(+), 138 deletions(-) Acked-by: Chander Kashyap chander.kash...@linaro.org -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Fwd: [PATCH 1/2] exynos5: pinmux: Added default pinumx settings
to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARM_ARCH_PINMUX_H
+#define __ASM_ARM_ARCH_PINMUX_H
+
+/*
+ * Peripherals requiring clock/pinmux configuration. List will
+ * grow with support for more devices getting added.
+ *
+ */
+enum periph_id {
+ PERIPH_ID_SDMMC0,
+ PERIPH_ID_SDMMC1,
+ PERIPH_ID_SDMMC2,
+ PERIPH_ID_SDMMC3,
+ PERIPH_ID_SDMMC4,
+ PERIPH_ID_SROMC,
+ PERIPH_ID_UART0,
+ PERIPH_ID_UART1,
+ PERIPH_ID_UART2,
+ PERIPH_ID_UART3,
+
+ PERIPH_ID_COUNT,
+ PERIPH_ID_NONE = -1,
+};
+
+/*
+ * Flags for setting specific configarations of peripherals.
+ * List will grow with support for more devices getting added.
+ */
+enum {
+ PINMUX_FLAG_NONE = 0x,
+
+ /* Flags for eMMC */
+ PINMUX_FLAG_8BIT_MODE = 1 0, /* SDMMC 8-bit mode */
+
+ /* Flags for SROM controller */
+ PINMUX_FLAG_BANK = 3 0, /* bank number (0-3) */
+ PINMUX_FLAG_16BIT = 1 2, /* 16-bit width */
+};
+
+/**
+ * Configures the pinmux for a particular peripheral.
+ *
+ * Each gpio can be configured in many different ways (4 bits on exynos)
+ * such as input, output, special function, external interrupt
+ * etc. This function will configure the peripheral pinmux along with
+ * pull-up/down and drive strength.
+ *
+ * @param peripheral peripheral to be configured
+ * @param flags configure flags
+ * @return 0 if ok, -1 on error (e.g. unsupported peripheral)
+ */
+int exynos_pinmux_config(int peripheral, int flags);
+
+#endif
--
1.7.4.4
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Re: [U-Boot] [PATCH 1/6 V3] EXYNOS5: Fix system register structure
Dear Marek,
On 9 May 2012 14:19, Marek Vasut ma...@denx.de wrote:
Dear Rajeshwari Shinde,
This patch corrects the SYSREG structure.
We have removed the sysreg.h added in the previous patchset
version as the sysreg structure is already defined in system.h.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- Removed the definitions added for SYSREG registers as they were
already defined in system.h
- Corrected the already exsisted exynos5_sysreg as per the user manual.
arch/arm/include/asm/arch-exynos/system.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/system.h
b/arch/arm/include/asm/arch-exynos/system.h index c85f949..c1d880f 100644
--- a/arch/arm/include/asm/arch-exynos/system.h
+++ b/arch/arm/include/asm/arch-exynos/system.h
Ok, I tried applying this, but system.h is missing in my tree ... did I miss
any
other patchset?
Well patches are already availabel at u-boot-arm tree.
http://git.denx.de/?p=u-boot/u-boot-arm.git;a=summary
@@ -42,6 +42,7 @@ struct exynos5_sysreg {
unsigned int reserved;
unsigned int ispblk_cfg;
unsigned int usb20phy_cfg;
+ unsigned char res2[0x29c];
unsigned int mipi_dphy;
unsigned int dptx_dphy;
unsigned int phyclk_sel;
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/6 V3] EXYNOS5: Fix system register structure
On 9 May 2012 15:17, Chander Kashyap chander.kash...@linaro.org wrote:
Dear Marek,
On 9 May 2012 14:19, Marek Vasut ma...@denx.de wrote:
Dear Rajeshwari Shinde,
This patch corrects the SYSREG structure.
We have removed the sysreg.h added in the previous patchset
version as the sysreg structure is already defined in system.h.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- Removed the definitions added for SYSREG registers as they were
already defined in system.h
- Corrected the already exsisted exynos5_sysreg as per the user
manual.
arch/arm/include/asm/arch-exynos/system.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/system.h
b/arch/arm/include/asm/arch-exynos/system.h index c85f949..c1d880f 100644
--- a/arch/arm/include/asm/arch-exynos/system.h
+++ b/arch/arm/include/asm/arch-exynos/system.h
Ok, I tried applying this, but system.h is missing in my tree ... did I miss
any
other patchset?
Well patches are already availabel at u-boot-arm tree.
http://git.denx.de/?p=u-boot/u-boot-arm.git;a=summary
EXYNOS: definitions of system resgister and power management registers.
@@ -42,6 +42,7 @@ struct exynos5_sysreg {
unsigned int reserved;
unsigned int ispblk_cfg;
unsigned int usb20phy_cfg;
+ unsigned char res2[0x29c];
unsigned int mipi_dphy;
unsigned int dptx_dphy;
unsigned int phyclk_sel;
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH V3] USB: EXYNOS: Add ehci support
) += ehci-fsl.o
endif
+COBJS-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
COBJS-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o
COBJS-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
new file mode 100644
index 000..3830c43
--- /dev/null
+++ b/drivers/usb/host/ehci-exynos.c
@@ -0,0 +1,110 @@
+/*
+ * SAMSUNG EXYNOS USB HOST EHCI Controller
+ *
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * Vivek Gautam gautam.vi...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include usb.h
+#include asm/arch/cpu.h
+#include asm/arch/ehci.h
+#include ehci.h
+#include ehci-core.h
+
+/* Setup the EHCI host controller. */
+static void setup_usb_phy(struct exynos_usb_phy *usb)
+{
+ clrbits_le32(usb-usbphyctrl0,
+ HOST_CTRL0_FSEL_MASK |
+ HOST_CTRL0_COMMONON_N |
+ /* HOST Phy setting */
+ HOST_CTRL0_PHYSWRST |
+ HOST_CTRL0_PHYSWRSTALL |
+ HOST_CTRL0_SIDDQ |
+ HOST_CTRL0_FORCESUSPEND |
+ HOST_CTRL0_FORCESLEEP);
+
+ setbits_le32(usb-usbphyctrl0,
+ /* Setting up the ref freq */
+ (CLK_24MHZ 16) |
+ /* HOST Phy setting */
+ HOST_CTRL0_LINKSWRST |
+ HOST_CTRL0_UTMISWRST);
+ udelay(10);
+ clrbits_le32(usb-usbphyctrl0,
+ HOST_CTRL0_LINKSWRST |
+ HOST_CTRL0_UTMISWRST);
+ udelay(20);
+
+ /* EHCI Ctrl setting */
+ setbits_le32(usb-ehcictrl,
+ EHCICTRL_ENAINCRXALIGN |
+ EHCICTRL_ENAINCR4 |
+ EHCICTRL_ENAINCR8 |
+ EHCICTRL_ENAINCR16);
+}
+
+/* Reset the EHCI host controller. */
+static void reset_usb_phy(struct exynos_usb_phy *usb)
+{
+ /* HOST_PHY reset */
+ setbits_le32(usb-usbphyctrl0,
+ HOST_CTRL0_PHYSWRST |
+ HOST_CTRL0_PHYSWRSTALL |
+ HOST_CTRL0_SIDDQ |
+ HOST_CTRL0_FORCESUSPEND |
+ HOST_CTRL0_FORCESLEEP);
+}
+
+/*
+ * EHCI-initialization
+ * Create the appropriate control structures to manage
+ * a new EHCI host controller.
+ */
+int ehci_hcd_init(void)
+{
+ struct exynos_usb_phy *usb;
+
+ usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
+ setup_usb_phy(usb);
+
+ hccr = (struct ehci_hccr *)samsung_get_base_usb_ehci();
+ hcor = (struct ehci_hcor *)((uint32_t) hccr
+ + HC_LENGTH(ehci_readl(hccr-cr_capbase)));
+
+ debug(Exynos5-ehci: init hccr %x and hcor %x hc_length %d\n,
+ (uint32_t)hccr, (uint32_t)hcor,
+ (uint32_t)HC_LENGTH(ehci_readl(hccr-cr_capbase)));
+
+ return 0;
+}
+
+/*
+ * Destroy the appropriate control structures corresponding
+ * the EHCI host controller.
+ */
+int ehci_hcd_stop()
+{
+ struct exynos_usb_phy *usb;
+
+ usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
+ reset_usb_phy(usb);
+
+ return 0;
+}
--
1.7.4.4
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Re: [U-Boot] [PATCH 2/5] exynos5: Add structure for PMU register
On 2 May 2012 19:22, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch adds power mananagement register structure for exynos5 SoC. Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- arch/arm/include/asm/arch-exynos/power.h | 622 ++ 1 files changed, 622 insertions(+), 0 deletions(-) Acked-by: Chander kashyap chander.kash...@linaro.org -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/5] exynos5: Add structure for PMU register
Dear Rajeshwari, On 3 May 2012 11:43, Chander Kashyap chander.kash...@linaro.org wrote: On 2 May 2012 19:22, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch adds power mananagement register structure for exynos5 SoC. s/mananagement/management Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- arch/arm/include/asm/arch-exynos/power.h | 622 ++ 1 files changed, 622 insertions(+), 0 deletions(-) Acked-by: Chander kashyap chander.kash...@linaro.org -- with warm regards, Chander Kashyap -- with warm regards, Chander Kashyap ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/5] exynos5: Add system register structure
Dear Rajeshwari,
On 2 May 2012 21:23, Marek Vasut ma...@denx.de wrote:
Dear Rajeshwari Shinde,
This patch add structure for SYSREG.
Ccing Minkyu. Can I get your opinion on these patches please?
Signed-off-by: Che-Liang Chiou clch...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Reviewed-by: Vivek Gautam gautam.vi...@samsung.com
Reviewed-by: Simon Glass s...@chromium.org
---
arch/arm/include/asm/arch-exynos/sysreg.h | 43
+ 1 files changed, 43 insertions(+), 0
deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/sysreg.h
diff --git a/arch/arm/include/asm/arch-exynos/sysreg.h
b/arch/arm/include/asm/arch-exynos/sysreg.h new file mode 100644
index 000..aca4b2b
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/sysreg.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Register map for sysreg
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __EXYNOS5_SYSREG_H__
+#define __EXYNOS5_SYSREG_H__
+
+#ifndef __ASSEMBLY__
+/* sysreg map */
+struct exynos5_sysreg {
+ /* Add registers as and when required */
+ unsigned char res1[0x214];
+ unsigned int disp1blk_cfg;
+ unsigned int dispblk_cfg2;
+ unsigned int hdcp_e_fuse_mem_cfg;
+ unsigned int gsclblk_cfg0;
+ unsigned int gsclblk_cfg1;
+ unsigned int ispblk_cfg;
+ unsigned int usb20_phy_cfg;
+ unsigned char res2[0x29c];
+ unsigned int mipi_dphy;
+ unsigned int dptx_phy;
+ unsigned int phyclk_sel;
+};
+#endif
+
+#endif
Best regards,
Marek Vasut
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[U-Boot] [PATCH] EXYNOS: Detect cpuid based on Exynos product codes
Exynos based SoC's have two different naming conventions.
One is S5PC_ and other is EXXX_. This patch adds
generic code to handle EXXX_ connvention.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/cpu.h |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 89f2c2e..da89ccf 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -105,10 +105,13 @@ static inline void s5p_set_cpu_id(void)
}
}
+#define EXYNOS_ID ((readl(EXYNOS4_PRO_ID) (0xF 24)) 24)
#define IS_SAMSUNG_TYPE(type, id) \
static inline int cpu_is_##type(void) \
{ \
- return s5p_cpu_id == id ? 1 : 0;\
+ return ((s5p_cpu_id == id) \
+ || (EXYNOS_ID == (#type[sizeof(#type) - 2] - '0'))) \
+ ? 1 : 0;\
}
IS_SAMSUNG_TYPE(exynos4, 0xc210)
--
1.7.5.4
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[U-Boot] [PATCH] EXYNOS: Rename exynos5_tzpc structure to s5p_tzpc
TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to s5p_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use s5p_tzpc.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/tzpc.h |2 +-
board/samsung/smdk5250/tzpc_init.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h
b/arch/arm/include/asm/arch-exynos/tzpc.h
index 2c9a07b..63736ae 100644
--- a/arch/arm/include/asm/arch-exynos/tzpc.h
+++ b/arch/arm/include/asm/arch-exynos/tzpc.h
@@ -22,7 +22,7 @@
#define __TZPC_H_
#ifndef __ASSEMBLY__
-struct exynos5_tzpc {
+struct s5p_tzpc {
unsigned int r0size;
char res1[0x7FC];
unsigned int decprot0stat;
diff --git a/board/samsung/smdk5250/tzpc_init.c
b/board/samsung/smdk5250/tzpc_init.c
index c2ccef3..03e46bb 100644
--- a/board/samsung/smdk5250/tzpc_init.c
+++ b/board/samsung/smdk5250/tzpc_init.c
@@ -28,7 +28,7 @@
/* Setting TZPC[TrustZone Protection Controller] */
void tzpc_init(void)
{
- struct exynos5_tzpc *tzpc;
+ struct s5p_tzpc *tzpc;
unsigned int addr;
for (addr = TZPC0_BASE; addr = TZPC9_BASE; addr += TZPC_BASE_OFFSET) {
--
1.7.5.4
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Re: [U-Boot] [PATCH] EXYNOS: Rename exynos5_tzpc structure to s5p_tzpc
Hi Kyungmin Park,
On 14 March 2012 19:02, Kyungmin Park kmp...@infradead.org wrote:
Hi Chander,
On Wed, Mar 14, 2012 at 10:14 PM, Chander Kashyap
chander.kash...@linaro.org wrote:
TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to s5p_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use s5p_tzpc.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/tzpc.h | 2 +-
board/samsung/smdk5250/tzpc_init.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h
b/arch/arm/include/asm/arch-exynos/tzpc.h
index 2c9a07b..63736ae 100644
--- a/arch/arm/include/asm/arch-exynos/tzpc.h
+++ b/arch/arm/include/asm/arch-exynos/tzpc.h
@@ -22,7 +22,7 @@
#define __TZPC_H_
#ifndef __ASSEMBLY__
-struct exynos5_tzpc {
+struct s5p_tzpc {
I think 'exynos' is preferable. Even though each SOC has different
I tried to carry forward old conventions as in case of watchdog. I
will change it to exynos.
number of tzpc. It can be covered one exynos_tzpc. or we can define
it for each SoC.
One structure is enough as fields are same.
Thank you,
Kyungmin Park
unsigned int r0size;
char res1[0x7FC];
unsigned int decprot0stat;
diff --git a/board/samsung/smdk5250/tzpc_init.c
b/board/samsung/smdk5250/tzpc_init.c
index c2ccef3..03e46bb 100644
--- a/board/samsung/smdk5250/tzpc_init.c
+++ b/board/samsung/smdk5250/tzpc_init.c
@@ -28,7 +28,7 @@
/* Setting TZPC[TrustZone Protection Controller] */
void tzpc_init(void)
{
- struct exynos5_tzpc *tzpc;
+ struct s5p_tzpc *tzpc;
unsigned int addr;
for (addr = TZPC0_BASE; addr = TZPC9_BASE; addr += TZPC_BASE_OFFSET)
{
--
1.7.5.4
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Re: [U-Boot] [PATCH] EXYNOS: Rename exynos5_tzpc structure to s5p_tzpc
Dear Minkyu,
On 15 March 2012 06:53, Minkyu Kang proms...@gmail.com wrote:
Dear Chander Kashyap,
On 14 March 2012 22:38, Chander Kashyap chander.kash...@linaro.org wrote:
Hi Kyungmin Park,
On 14 March 2012 19:02, Kyungmin Park kmp...@infradead.org wrote:
Hi Chander,
On Wed, Mar 14, 2012 at 10:14 PM, Chander Kashyap
chander.kash...@linaro.org wrote:
TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to s5p_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use s5p_tzpc.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/tzpc.h | 2 +-
board/samsung/smdk5250/tzpc_init.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h
b/arch/arm/include/asm/arch-exynos/tzpc.h
index 2c9a07b..63736ae 100644
--- a/arch/arm/include/asm/arch-exynos/tzpc.h
+++ b/arch/arm/include/asm/arch-exynos/tzpc.h
@@ -22,7 +22,7 @@
#define __TZPC_H_
#ifndef __ASSEMBLY__
-struct exynos5_tzpc {
+struct s5p_tzpc {
I think 'exynos' is preferable. Even though each SOC has different
I tried to carry forward old conventions as in case of watchdog. I
will change it to exynos.
I agreed with Kyungmin.
From now, let's called exynos for common name including s5pc1xx and
s5pc2xx and exynos4 and exynos5.. etc.
Thanks for the inputs. Let us follow the convention. I will resubmit the patch.
number of tzpc. It can be covered one exynos_tzpc. or we can define
it for each SoC.
One structure is enough as fields are same.
Thanks
Minkyu Kang.
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[U-Boot] [PATCH v2] EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc
TZPC IP is common across Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to exynos_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use exynos_tzpc.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes in V2:
- Renaming is changed from s5p_ctzpc to exynos_tzpc as per
Kyungmin's Comments.
arch/arm/include/asm/arch-exynos/tzpc.h |2 +-
board/samsung/smdk5250/tzpc_init.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h
b/arch/arm/include/asm/arch-exynos/tzpc.h
index 2c9a07b..c5eb4b1 100644
--- a/arch/arm/include/asm/arch-exynos/tzpc.h
+++ b/arch/arm/include/asm/arch-exynos/tzpc.h
@@ -22,7 +22,7 @@
#define __TZPC_H_
#ifndef __ASSEMBLY__
-struct exynos5_tzpc {
+struct exynos_tzpc {
unsigned int r0size;
char res1[0x7FC];
unsigned int decprot0stat;
diff --git a/board/samsung/smdk5250/tzpc_init.c
b/board/samsung/smdk5250/tzpc_init.c
index c2ccef3..f39bd55 100644
--- a/board/samsung/smdk5250/tzpc_init.c
+++ b/board/samsung/smdk5250/tzpc_init.c
@@ -28,7 +28,7 @@
/* Setting TZPC[TrustZone Protection Controller] */
void tzpc_init(void)
{
- struct exynos5_tzpc *tzpc;
+ struct exynos_tzpc *tzpc;
unsigned int addr;
for (addr = TZPC0_BASE; addr = TZPC9_BASE; addr += TZPC_BASE_OFFSET) {
--
1.7.5.4
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[U-Boot] [PATCH] EXYNOS: Add structure for Exynos4 DMC
Add exynos4_dmc structure in dmc.h for exynos4 dram controllor(DMC).
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/dmc.h | 109
1 files changed, 109 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dmc.h
b/arch/arm/include/asm/arch-exynos/dmc.h
index debbe50..bd52d16 100644
--- a/arch/arm/include/asm/arch-exynos/dmc.h
+++ b/arch/arm/include/asm/arch-exynos/dmc.h
@@ -2,6 +2,115 @@
#define __DMC_H__
#ifndef __ASSEMBLY__
+struct exynos4_dmc {
+ unsigned int concontrol;
+ unsigned int memcontrol;
+ unsigned int memconfig0;
+ unsigned int memconfig1;
+ unsigned int directcmd;
+ unsigned int prechconfig;
+ unsigned int phycontrol0;
+ unsigned int phycontrol1;
+ unsigned int phycontrol2;
+ unsigned int phycontrol3;
+ unsigned int pwrdnconfig;
+ unsigned char res1[0x4];
+ unsigned int timingref;
+ unsigned int timingrow;
+ unsigned int timingdata;
+ unsigned int timingpower;
+ unsigned int phystatus;
+ unsigned int phyzqcontrol;
+ unsigned int chip0status;
+ unsigned int chip1status;
+ unsigned int arefstatus;
+ unsigned int mrstatus;
+ unsigned int phytest0;
+ unsigned int phytest1;
+ unsigned int qoscontrol0;
+ unsigned int qosconfig0;
+ unsigned int qoscontrol1;
+ unsigned int qosconfig1;
+ unsigned int qoscontrol2;
+ unsigned int qosconfig2;
+ unsigned int qoscontrol3;
+ unsigned int qosconfig3;
+ unsigned int qoscontrol4;
+ unsigned int qosconfig4;
+ unsigned int qoscontrol5;
+ unsigned int qosconfig5;
+ unsigned int qoscontrol6;
+ unsigned int qosconfig6;
+ unsigned int qoscontrol7;
+ unsigned int qosconfig7;
+ unsigned int qoscontrol8;
+ unsigned int qosconfig8;
+ unsigned int qoscontrol9;
+ unsigned int qosconfig9;
+ unsigned int qoscontrol10;
+ unsigned int qosconfig10;
+ unsigned int qoscontrol11;
+ unsigned int qosconfig11;
+ unsigned int qoscontrol12;
+ unsigned int qosconfig12;
+ unsigned int qoscontrol13;
+ unsigned int qosconfig13;
+ unsigned int qoscontrol14;
+ unsigned int qosconfig14;
+ unsigned int qoscontrol15;
+ unsigned int qosconfig15;
+ unsigned int qostimeout0;
+ unsigned int qostimeout1;
+ unsigned char res2[0x8];
+ unsigned int ivcontrol;
+ unsigned char res3[0x8];
+ unsigned int perevconfig;
+ unsigned char res4[0xDF00];
+ unsigned int pmnc_ppc_a;
+ unsigned char res5[0xC];
+ unsigned int cntens_ppc_a;
+ unsigned char res6[0xC];
+ unsigned int cntenc_ppc_a;
+ unsigned char res7[0xC];
+ unsigned int intens_ppc_a;
+ unsigned char res8[0xC];
+ unsigned int intenc_ppc_a;
+ unsigned char res9[0xC];
+ unsigned int flag_ppc_a;
+ unsigned char res10[0xAC];
+ unsigned int ccnt_ppc_a;
+ unsigned char res11[0xC];
+ unsigned int pmcnt0_ppc_a;
+ unsigned char res12[0xC];
+ unsigned int pmcnt1_ppc_a;
+ unsigned char res13[0xC];
+ unsigned int pmcnt2_ppc_a;
+ unsigned char res14[0xC];
+ unsigned int pmcnt3_ppc_a;
+ unsigned char res15[0xEBC];
+ unsigned int pmnc_ppc_m;
+ unsigned char res16[0xC];
+ unsigned int cntens_ppc_m;
+ unsigned char res17[0xC];
+ unsigned int cntenc_ppc_m;
+ unsigned char res18[0xC];
+ unsigned int intens_ppc_m;
+ unsigned char res19[0xC];
+ unsigned int intenc_ppc_m;
+ unsigned char res20[0xC];
+ unsigned int flag_ppc_m;
+ unsigned char res21[0xAC];
+ unsigned int ccnt_ppc_m;
+ unsigned char res22[0xC];
+ unsigned int pmcnt0_ppc_m;
+ unsigned char res23[0xC];
+ unsigned int pmcnt1_ppc_m;
+ unsigned char res24[0xC];
+ unsigned int pmcnt2_ppc_m;
+ unsigned char res25[0xC];
+ unsigned int pmcnt3_ppc_m;
+};
+
struct exynos5_dmc {
unsigned int concontrol;
unsigned int memcontrol;
--
1.7.5.4
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Re: [U-Boot] [PATCH v2] EXYNOS: SMDK5250: Support all 4 UARTs
On 13 February 2012 23:08, Doug Anderson diand...@chromium.org wrote:
This properly configures the mux to enable all UARTs.
This also fixes things so that we don't configure balls XUCTSN_1 and
XURTSN_1 as UART1 configuration (RTS/CTS), since they aren't
connected.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Removed #ifdefs and tested SERIAL_MULTI by setting stdin/out/err to
s5pserN and validating that serial moved.
board/samsung/smdk5250/smdk5250.c | 44 +++-
1 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index 928c08f..32786e2 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -224,11 +224,51 @@ static void board_uart_init(void)
(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
int i;
- /* UART1 GPIOs (part1) : GPA0CON[7:4] 0x */
- for (i = 4; i 8; i++) {
+ /*
+ * UART0 GPIOs : GPA0CON[3:0] 0x
+ * Must set CFG17 switches to select UART0 to use.
+ */
+ for (i = 0; i = 3; i++) {
s5p_gpio_set_pull(gpio1-a0, i, GPIO_PULL_NONE);
s5p_gpio_cfg_pin(gpio1-a0, i, GPIO_FUNC(0x2));
}
+
+ /*
+ * UART1 GPIOs : GPA0CON[5:4] 0x22
+ * Must set CFG17 switches to select UART1 to use.
+ *
+ * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
+ * in order to use them (so that those pins can be used for I2C).
+ */
+ for (i = 4; i = 5; i++) {
+ s5p_gpio_set_pull(gpio1-a0, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(gpio1-a0, i, GPIO_FUNC(0x2));
+ }
+
+ /*
+ * UART2 GPIOs : GPA1CON[1:0] 0x22
+ * Must set CFG17 switches to select UART2 to use.
+ *
+ * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
+ * in order to use them (so that those pins can be used for I2C).
+ */
+ for (i = 0; i = 1; i++) {
+ s5p_gpio_set_pull(gpio1-a1, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(gpio1-a1, i, GPIO_FUNC(0x2));
+ }
+
+ /*
+ * UART3 GPIOs : GPA1CON[5:4] 0x22
+ * Must set CFG16 switches to select UART3 to use.
+ */
+ for (i = 4; i = 5; i++) {
+ s5p_gpio_set_pull(gpio1-a1, i, GPIO_PULL_NONE);
+ s5p_gpio_cfg_pin(gpio1-a1, i, GPIO_FUNC(0x2));
+ }
+
+ /*
+ * There's no mux for UART4--it's internal only
+ */
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
--
1.7.7.3
Acked-by: Chander kashyap chander.kash...@linaro.org
--
with warm regards,
Chander Kashyap
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Re: [U-Boot] [PATCH] SMDK5250: Add ethernet support
Hi Simon,
On 24 January 2012 21:49, Simon Glass s...@chromium.org wrote:
Hi Chander,
On Tue, Jan 24, 2012 at 5:03 AM, Chander Kashyap
chander.kash...@linaro.org wrote:
This patch enable support for SMC911X based ethernet device.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
board/samsung/smdk5250/smdk5250.c | 89
+
include/configs/smdk5250.h | 13 +-
2 files changed, 100 insertions(+), 2 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index 2684620..a1b1a48 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -31,10 +31,95 @@
DECLARE_GLOBAL_DATA_PTR;
struct exynos5_gpio_part1 *gpio1;
+static void smc9115_pre_init(void)
Is there a common place where this function could go, so that other
boards based on this SOC could use it also? Perhaps a
board/samsun/exynos5 common directory?
As of now there is no common directory. Perhaps if more boards with
same gpio configuration are coming the n might be possible.
+{
+ u32 smc_bw_conf, smc_bc_conf;
+ int i;
+
+ /*
+ * SROM:CS1 and EBI
+ *
+ * GPY0[0] SROM_CSn[0]
+ * GPY0[1] SROM_CSn[1](2)
+ * GPY0[2] SROM_CSn[2]
+ * GPY0[3] SROM_CSn[3]
+ * GPY0[4] EBI_OEn(2)
+ * GPY0[5] EBI_EEn(2)
+ *
+ * GPY1[0] EBI_BEn[0](2)
+ * GPY1[1] EBI_BEn[1](2)
+ * GPY1[2] SROM_WAIT(2)
+ * GPY1[3] EBI_DATA_RDn(2)
+ */
+ s5p_gpio_cfg_pin(gpio1-y0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));
+ s5p_gpio_cfg_pin(gpio1-y0, 4, GPIO_FUNC(2));
+ s5p_gpio_cfg_pin(gpio1-y0, 5, GPIO_FUNC(2));
+
+ for (i = 0; i 4; i++)
+ s5p_gpio_cfg_pin(gpio1-y1, i, GPIO_FUNC(2));
+
+ /*
+ * EBI: 8 Addrss Lines
+ *
+ * GPY3[0] EBI_ADDR[0](2)
+ * GPY3[1] EBI_ADDR[1](2)
+ * GPY3[2] EBI_ADDR[2](2)
+ * GPY3[3] EBI_ADDR[3](2)
+ * GPY3[4] EBI_ADDR[4](2)
+ * GPY3[5] EBI_ADDR{5](2)
+ * GPY3[6] EBI_ADDR[6](2)
+ * GPY3[7] EBI_ADDR{7](2)
+ *
+ * EBI: 16 Data Lines
+ *
+ * GPY5[0] EBI_DATA[0](2)
+ * GPY5[1] EBI_DATA[1](2)
+ * GPY5[2] EBI_DATA[2](2)
+ * GPY5[3] EBI_DATA[3](2)
+ * GPY5[4] EBI_DATA[4](2)
+ * GPY5[5] EBI_DATA{5](2)
+ * GPY5[6] EBI_DATA[6](2)
+ * GPY5[7] EBI_DATA{7](2)
+ *
+ * GPY6[0] EBI_DATA[8](2)
+ * GPY6[1] EBI_DATA[9](2)
+ * GPY6[2] EBI_DATA[10](2)
+ * GPY6[3] EBI_DATA110](2)
+ * GPY6[4] EBI_DATA[12](2)
+ * GPY6[5] EBI_DATA{13](2)
+ * GPY6[6] EBI_DATA[14](2)
+ * GPY6[7] EBI_DATA{15](2)
+ */
+ for (i = 0; i 8; i++) {
+ s5p_gpio_cfg_pin(gpio1-y3, i, GPIO_FUNC(2));
+ s5p_gpio_set_pull(gpio1-y3, i, GPIO_PULL_UP);
+
+ s5p_gpio_cfg_pin(gpio1-y5, i, GPIO_FUNC(2));
+ s5p_gpio_set_pull(gpio1-y5, i, GPIO_PULL_UP);
+
+ s5p_gpio_cfg_pin(gpio1-y6, i, GPIO_FUNC(2));
+ s5p_gpio_set_pull(gpio1-y6, i, GPIO_PULL_UP);
+ }
+
+ /* Ethernet needs data bus width of 16 bits */
+ smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK)
+ | SROMC_BYTE_ENABLE(CONFIG_ENV_SROM_BANK);
+
+ smc_bc_conf = SROMC_BC_TACS(0x01) | SROMC_BC_TCOS(0x01)
+ | SROMC_BC_TACC(0x06) | SROMC_BC_TCOH(0x01)
+ | SROMC_BC_TAH(0x0C) | SROMC_BC_TACP(0x09)
+ | SROMC_BC_PMC(0x01);
+
+ /* Select and configure the SROMC bank */
+ s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
+}
+
int board_init(void)
{
gpio1 = (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+ smc9115_pre_init();
Could this be done once later, in board_eth_init(), to avoid init of a
device which might not be used?
Yes sure. I will move it before smc911x_initialize in board_eth_init().
+
gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
return 0;
}
@@ -79,6 +164,10 @@ void dram_init_banksize(void)
gd-bd-bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8, \
PHYS_SDRAM_8_SIZE);
}
+int board_eth_init(bd_t *bis)
+{
+ return smc911x_initialize(0, CONFIG_SMC911X_BASE);
+}
#ifdef CONFIG_DISPLAY_BOARDINFO
int checkboard(void)
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 6f2ef4c..4ad4bd2 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -98,8 +98,7 @@
#define CONFIG_CMD_MMC
#define
