[PATCH] configs: rockchip: rock-pi-s: use default bootdelay (2s)
align with other boards. Signed-off-by: FUKAUMI Naoki --- configs/rock-pi-s-rk3308_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig index cc3274a98b..cd0a996ee7 100644 --- a/configs/rock-pi-s-rk3308_defconfig +++ b/configs/rock-pi-s-rk3308_defconfig @@ -24,7 +24,6 @@ CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -CONFIG_BOOTDELAY=0 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x2 -- 2.39.2
[PATCH 1/2] configs: rockchip: rk3308: use CONFIG_DEFAULT_FDT_FILE
all rk3308 boards should use their own dtb file. also, change fdt_addr_r to avoid following error: "ERROR: Did not find a cmdline Flattened Device Tree" it happens on Radxa ROCK Pi S (256MB/512MB) with kernel built from Radxa BSP. Signed-off-by: FUKAUMI Naoki --- configs/evb-rk3308_defconfig | 1 + configs/roc-cc-rk3308_defconfig| 1 + configs/rock-pi-s-rk3308_defconfig | 1 + include/configs/rk3308_common.h| 3 ++- 4 files changed, 5 insertions(+), 1 deletion(-) diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index a13a809c1e..2c7ac88ed9 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -24,6 +24,7 @@ CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=0 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-evb.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x2 diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 9a789b212f..9cb90f6ee6 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -24,6 +24,7 @@ CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=0 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-roc-cc.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x2 diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig index cc3274a98b..e2abe4b4f7 100644 --- a/configs/rock-pi-s-rk3308_defconfig +++ b/configs/rock-pi-s-rk3308_defconfig @@ -25,6 +25,7 @@ CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=0 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-rock-pi-s.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x2 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 7d55fcd975..a413af1bd4 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -16,11 +16,12 @@ #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x0050\0" \ "pxefile_addr_r=0x0060\0" \ - "fdt_addr_r=0x0280\0" \ + "fdt_addr_r=0x03e0\0" \ "kernel_addr_r=0x0068\0" \ "ramdisk_addr_r=0x0400\0" #define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ ENV_MEM_LAYOUT_SETTINGS \ "partitions=" PARTS_DEFAULT \ ROCKCHIP_DEVICE_SETTINGS \ -- 2.39.2
[PATCH 2/2] configs: rockchip: rk3308: enable CONFIG_OF_LIBFDT_OVERLAY
enable CONFIG_OF_LIBFDT_OVERLAY and use it on Radxa ROCK Pi S. Signed-off-by: FUKAUMI Naoki --- configs/rock-pi-s-rk3308_defconfig | 1 + include/configs/rk3308_common.h| 1 + 2 files changed, 2 insertions(+) diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig index e2abe4b4f7..ca4a1800e7 100644 --- a/configs/rock-pi-s-rk3308_defconfig +++ b/configs/rock-pi-s-rk3308_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80 CONFIG_DEFAULT_DEVICE_TREE="rk3308-rock-pi-s" +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index a413af1bd4..861154fbeb 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -17,6 +17,7 @@ "scriptaddr=0x0050\0" \ "pxefile_addr_r=0x0060\0" \ "fdt_addr_r=0x03e0\0" \ + "fdtoverlay_addr_r=0x03f0\0" \ "kernel_addr_r=0x0068\0" \ "ramdisk_addr_r=0x0400\0" -- 2.39.2
Re: [PATCH v2 1/2] rockchip: Kconfig: Enable external TPL binary for rk3308
hi, On 9/9/23 18:33, Massimo Pegorer wrote: There is no support to initialize DRAM on rk3308 SoC using U-Boot TPL or SPL, and therefore an external TPL binary must be used to package a bootable u-boot-rockchip.bin image. Default ROCKCHIP_EXTERNAL_TPL to yes if ROCKCHIP_RK3308. Remove useless TPL_SERIAL. Signed-off-by: Massimo Pegorer --- arch/arm/mach-rockchip/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) Tested-by: FUKAUMI Naoki thank you very much for your work! diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index a279582f4f..3b044269bd 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -166,7 +166,6 @@ config ROCKCHIP_RK3308 imply SPL_SYSCON imply SPL_RAM imply SPL_SERIAL - imply TPL_SERIAL imply SPL_SEPARATE_BSS help The Rockchip RK3308 is a ARM-based Soc which embedded with quad @@ -436,7 +435,7 @@ config TPL_ROCKCHIP_COMMON_BOARD config ROCKCHIP_EXTERNAL_TPL bool "Use external TPL binary" - default y if ROCKCHIP_RK3568 || ROCKCHIP_RK3588 + default y if ROCKCHIP_RK3308 || ROCKCHIP_RK3568 || ROCKCHIP_RK3588 help Some Rockchip SoCs require an external TPL to initialize DRAM. Enable this option and build with ROCKCHIP_TPL=/path/to/ddr.bin to
[PATCH v2 1/2] arm: dts: rockchip: sync DT for RK3588 series with Linux
Sync the device tree for RK3588 series with Linux 6.6-rc1.
Signed-off-by: FUKAUMI Naoki
---
.../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 1 -
arch/arm/dts/rk3588-edgeble-neu6a.dtsi| 1 -
.../dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 6 -
arch/arm/dts/rk3588-edgeble-neu6b-io.dts | 66 ++
arch/arm/dts/rk3588-edgeble-neu6b.dtsi| 359 -
arch/arm/dts/rk3588-evb1-v10.dts | 720 +-
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 113 +--
arch/arm/dts/rk3588-rock-5b.dts | 448 ++-
arch/arm/dts/rk3588.dtsi | 215 ++
arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi | 12 -
arch/arm/dts/rk3588s-rock-5a.dts | 665 +++-
arch/arm/dts/rk3588s-u-boot.dtsi | 162
arch/arm/dts/rk3588s.dtsi | 367 +
include/dt-bindings/ata/ahci.h| 20 +
14 files changed, 2866 insertions(+), 289 deletions(-)
create mode 100644 include/dt-bindings/ata/ahci.h
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
index 373f369c65..dd0058262b 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
@@ -11,7 +11,6 @@
};
chosen {
- stdout-path =
u-boot,spl-boot-order =
};
};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6a.dtsi
index 38e1a1e25f..727580aaa1 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6a.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6a.dtsi
@@ -25,7 +25,6 @@
no-sdio;
no-sd;
non-removable;
- max-frequency = <2>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
status = "okay";
diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
index cd7626b24b..a45b3f5e86 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
@@ -11,12 +11,6 @@
};
chosen {
- stdout-path =
u-boot,spl-boot-order =
};
};
-
- {
- bus-width = <4>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io.dts
b/arch/arm/dts/rk3588-edgeble-neu6b-io.dts
index e9d5a8bab5..9933765e40 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6b-io.dts
+++ b/arch/arm/dts/rk3588-edgeble-neu6b-io.dts
@@ -21,7 +21,73 @@
};
};
+_ps {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ interrupt-parent = <>;
+ interrupts = ;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ pinctrl-names = "default";
+ pinctrl-0 = <_int>;
+ wakeup-source;
+ };
+};
+
+ {
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO _pull_none>;
+ };
+ };
+};
+
+/* FAN */
+ {
+ pinctrl-0 = <_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ no-sdio;
+ no-mmc;
+ sd-uhs-sdr104;
+ vmmc-supply = <_3v3_s3>;
+ vqmmc-supply = <_sd_s0>;
+ status = "okay";
+};
+
{
pinctrl-0 = <_xfer>;
status = "okay";
};
+
+/* RS232 */
+ {
+ pinctrl-0 = <_xfer>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+/* RS485 */
+ {
+ pinctrl-0 = <_xfer>;
+ pinctrl-names = "default";
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6b.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6b.dtsi
index 1c5bcf1280..017559bba3 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6b.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6b.dtsi
@@ -18,6 +18,42 @@
regulator-min-microvolt = <1200>;
regulator-max-microvolt = <1200>;
};
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
+ };
+
+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
+ co
[PATCH v2 2/2] arm: dts: rockchip: rock-5b: add support for PCIe3 and NVMe
this patch adds support for PCIe3 (M.2 M key) and enables NVMe.
=> pci
BusDevFun VendorId DeviceId Device Class Sub-Class
_
00.00.00 0x1d87 0x3588 Bridge device 0x04
01.00.00 0x10ec 0x8125 Network controller 0x00
02.00.00 0x1d87 0x3588 Bridge device 0x04
03.00.00 0x1179 0x011a Mass storage controller 0x08
=> nvme scan
=> nvme info
Device 0: Vendor: 0x1179 Rev: AGHA4101 Prod: 79CA20WPKRYN
Type: Hard Disk
Capacity: 488386.3 MB = 476.9 GB (1000215216 x 512)
Signed-off-by: FUKAUMI Naoki
this patch depends:
- "rockchip: rk3568: Fix use of PCIe bifurcation" [1]
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=366997
---
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 33 +
configs/rock5b-rk3588_defconfig | 1 +
2 files changed, 34 insertions(+)
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index 03626e71ea..96cc84e5aa 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -23,6 +23,19 @@
regulator-max-microvolt = <1200>;
};
+ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie30";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ enable-active-high;
+ gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <5000>;
+ vin-supply = <_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_vcc3v3_en>;
+ };
+
vcc5v0_usbdcin: vcc5v0-usbdcin {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usbdcin";
@@ -71,6 +84,18 @@
status = "okay";
};
+ {
+ status = "okay";
+};
+
+ {
+ reset-gpios = < RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <_pcie30>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_rst>;
+ status = "okay";
+};
+
{
pcie {
pcie_reset_h: pcie-reset-h {
@@ -81,6 +106,14 @@
rockchip,pins = <3 RK_PC7 4 _pull_none>,
<3 RK_PD0 4 _pull_none>;
};
+
+ pcie3_rst: pcie3-rst {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO _pull_none>;
+ };
+
+ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO _pull_none>;
+ };
};
usb-typec {
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index 3fa65cbf9b..50551c70f2 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -81,6 +81,7 @@ CONFIG_SPI_FLASH_XTX=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RTL8169=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
--
2.39.2
[PATCH RESEND 1/2] arm: dts: rockchip: rk3588, rk3588s: sync with Linux
Sync the devicetree with linux-next tag: next-20230831
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/rk3588.dtsi | 215 +++
arch/arm/dts/rk3588s.dtsi | 367 +
include/dt-bindings/ata/ahci.h | 20 ++
3 files changed, 602 insertions(+)
create mode 100644 include/dt-bindings/ata/ahci.h
diff --git a/arch/arm/dts/rk3588.dtsi b/arch/arm/dts/rk3588.dtsi
index 8be75556af..5519c1430c 100644
--- a/arch/arm/dts/rk3588.dtsi
+++ b/arch/arm/dts/rk3588.dtsi
@@ -7,6 +7,16 @@
#include "rk3588-pinctrl.dtsi"
/ {
+ pcie30_phy_grf: syscon@fd5b8000 {
+ compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon";
+ reg = <0x0 0xfd5b8000 0x0 0x1>;
+ };
+
+ pipe_phy1_grf: syscon@fd5c {
+ compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
+ reg = <0x0 0xfd5c 0x0 0x100>;
+ };
+
i2s8_8ch: i2s@fddc8000 {
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfddc8000 0x0 0x1000>;
@@ -75,6 +85,159 @@
status = "disabled";
};
+ pcie3x4: pcie@fe15 {
+ compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0x0f>;
+ clocks = < ACLK_PCIE_4L_MSTR>, < ACLK_PCIE_4L_SLV>,
+< ACLK_PCIE_4L_DBI>, < PCLK_PCIE_4L>,
+< CLK_PCIE_AUX0>, < CLK_PCIE4L_PIPE>;
+ clock-names = "aclk_mst", "aclk_slv",
+ "aclk_dbi", "pclk",
+ "aux", "pipe";
+ device_type = "pci";
+ interrupts = ,
+,
+,
+,
+;
+ interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 _intc 0>,
+ <0 0 0 2 _intc 1>,
+ <0 0 0 3 _intc 2>,
+ <0 0 0 4 _intc 3>;
+ linux,pci-domain = <0>;
+ max-link-speed = <3>;
+ msi-map = <0x 0x 0x1000>;
+ num-lanes = <4>;
+ phys = <>;
+ phy-names = "pcie-phy";
+ power-domains = < RK3588_PD_PCIE>;
+ ranges = <0x0100 0x0 0xf010 0x0 0xf010 0x0
0x0010>,
+<0x0200 0x0 0xf020 0x0 0xf020 0x0
0x00e0>,
+<0x0300 0x0 0x4000 0x9 0x 0x0
0x4000>;
+ reg = <0xa 0x4000 0x0 0x0040>,
+ <0x0 0xfe15 0x0 0x0001>,
+ <0x0 0xf000 0x0 0x0010>;
+ reg-names = "dbi", "apb", "config";
+ resets = < SRST_PCIE0_POWER_UP>, < SRST_P_PCIE0>;
+ reset-names = "pwr", "pipe";
+ status = "disabled";
+
+ pcie3x4_intc: legacy-interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ };
+ };
+
+ pcie3x2: pcie@fe16 {
+ compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x10 0x1f>;
+ clocks = < ACLK_PCIE_2L_MSTR>, < ACLK_PCIE_2L_SLV>,
+< ACLK_PCIE_2L_DBI>, < PCLK_PCIE_2L>,
+< CLK_PCIE_AUX1>, < CLK_PCIE2L_PIPE>;
+ clock-names = "aclk_mst", "aclk_slv",
+ "aclk_dbi", "pclk",
+ "aux", "pipe";
+ device_type = "pci";
+ interrupts = ,
+,
+,
+,
+;
+ interrupt-names = "sys", "pmc", "msg", "l
[PATCH RESEND 2/2] arm: dts: rockchip: rock-5b: add support for PCIe3 and NVMe
this patch adds support for PCIe3 (M.2 M key) and enables NVMe.
=> pci
BusDevFun VendorId DeviceId Device Class Sub-Class
_
00.00.00 0x1d87 0x3588 Bridge device 0x04
01.00.00 0x10ec 0x8125 Network controller 0x00
02.00.00 0x1d87 0x3588 Bridge device 0x04
03.00.00 0x1179 0x011a Mass storage controller 0x08
=> nvme scan
=> nvme info
Device 0: Vendor: 0x1179 Rev: AGHA4101 Prod: 79CA20WPKRYN
Type: Hard Disk
Capacity: 488386.3 MB = 476.9 GB (1000215216 x 512)
Signed-off-by: FUKAUMI Naoki
this patch depends:
- "rockchip: rk3568: Fix use of PCIe bifurcation" [1]
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=366997
---
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 33 +
configs/rock5b-rk3588_defconfig | 1 +
2 files changed, 34 insertions(+)
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index 1b2fcbb0bb..c790894170 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -27,6 +27,19 @@
regulator-max-microvolt = <1200>;
};
+ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie30";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ enable-active-high;
+ gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <5000>;
+ vin-supply = <_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_vcc3v3_en>;
+ };
+
vcc5v0_usbdcin: vcc5v0-usbdcin {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usbdcin";
@@ -87,6 +100,18 @@
status = "okay";
};
+ {
+ status = "okay";
+};
+
+ {
+ reset-gpios = < RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <_pcie30>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_rst>;
+ status = "okay";
+};
+
{
pcie {
pcie_reset_h: pcie-reset-h {
@@ -97,6 +122,14 @@
rockchip,pins = <3 RK_PC7 4 _pull_none>,
<3 RK_PD0 4 _pull_none>;
};
+
+ pcie3_rst: pcie3-rst {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO _pull_none>;
+ };
+
+ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO _pull_none>;
+ };
};
usb {
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index 3fa65cbf9b..50551c70f2 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -81,6 +81,7 @@ CONFIG_SPI_FLASH_XTX=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RTL8169=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
--
2.39.2
[PATCH 2/2] arm: dts: rockchip: rock-5b: add support for PCIe3 and NVMe
this patch adds support for PCIe3 (M.2 M key) and enables NVMe.
=> pci
BusDevFun VendorId DeviceId Device Class Sub-Class
_
00.00.00 0x1d87 0x3588 Bridge device 0x04
01.00.00 0x10ec 0x8125 Network controller 0x00
02.00.00 0x1d87 0x3588 Bridge device 0x04
03.00.00 0x1179 0x011a Mass storage controller 0x08
=> nvme scan
=> nvme info
Device 0: Vendor: 0x1179 Rev: AGHA4101 Prod: 79CA20WPKRYN
Type: Hard Disk
Capacity: 488386.3 MB = 476.9 GB (1000215216 x 512)
Signed-off-by: FUKAUMI Naoki
this patch depends:
- "rockchip: rk3568: Fix use of PCIe bifurcation" [1]
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=366997
---
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 33 +
configs/rock5b-rk3588_defconfig | 1 +
2 files changed, 34 insertions(+)
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index 1b2fcbb0bb..c790894170 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -27,6 +27,19 @@
regulator-max-microvolt = <1200>;
};
+ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie30";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ enable-active-high;
+ gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <5000>;
+ vin-supply = <_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_vcc3v3_en>;
+ };
+
vcc5v0_usbdcin: vcc5v0-usbdcin {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usbdcin";
@@ -87,6 +100,18 @@
status = "okay";
};
+ {
+ status = "okay";
+};
+
+ {
+ reset-gpios = < RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <_pcie30>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_rst>;
+ status = "okay";
+};
+
{
pcie {
pcie_reset_h: pcie-reset-h {
@@ -97,6 +122,14 @@
rockchip,pins = <3 RK_PC7 4 _pull_none>,
<3 RK_PD0 4 _pull_none>;
};
+
+ pcie3_rst: pcie3-rst {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO _pull_none>;
+ };
+
+ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO _pull_none>;
+ };
};
usb {
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index 3fa65cbf9b..50551c70f2 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -81,6 +81,7 @@ CONFIG_SPI_FLASH_XTX=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RTL8169=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
--
2.39.2
[PATCH 1/2] arm: dts: rockchip: rk3588, rk3588s: sync with Linux
Sync the devicetree with linux-next tag: next-20230831
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/rk3588.dtsi | 215 +++
arch/arm/dts/rk3588s.dtsi | 367 +
include/dt-bindings/ata/ahci.h | 20 ++
3 files changed, 602 insertions(+)
create mode 100644 include/dt-bindings/ata/ahci.h
diff --git a/arch/arm/dts/rk3588.dtsi b/arch/arm/dts/rk3588.dtsi
index 8be75556af..5519c1430c 100644
--- a/arch/arm/dts/rk3588.dtsi
+++ b/arch/arm/dts/rk3588.dtsi
@@ -7,6 +7,16 @@
#include "rk3588-pinctrl.dtsi"
/ {
+ pcie30_phy_grf: syscon@fd5b8000 {
+ compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon";
+ reg = <0x0 0xfd5b8000 0x0 0x1>;
+ };
+
+ pipe_phy1_grf: syscon@fd5c {
+ compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
+ reg = <0x0 0xfd5c 0x0 0x100>;
+ };
+
i2s8_8ch: i2s@fddc8000 {
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfddc8000 0x0 0x1000>;
@@ -75,6 +85,159 @@
status = "disabled";
};
+ pcie3x4: pcie@fe15 {
+ compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0x0f>;
+ clocks = < ACLK_PCIE_4L_MSTR>, < ACLK_PCIE_4L_SLV>,
+< ACLK_PCIE_4L_DBI>, < PCLK_PCIE_4L>,
+< CLK_PCIE_AUX0>, < CLK_PCIE4L_PIPE>;
+ clock-names = "aclk_mst", "aclk_slv",
+ "aclk_dbi", "pclk",
+ "aux", "pipe";
+ device_type = "pci";
+ interrupts = ,
+,
+,
+,
+;
+ interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 _intc 0>,
+ <0 0 0 2 _intc 1>,
+ <0 0 0 3 _intc 2>,
+ <0 0 0 4 _intc 3>;
+ linux,pci-domain = <0>;
+ max-link-speed = <3>;
+ msi-map = <0x 0x 0x1000>;
+ num-lanes = <4>;
+ phys = <>;
+ phy-names = "pcie-phy";
+ power-domains = < RK3588_PD_PCIE>;
+ ranges = <0x0100 0x0 0xf010 0x0 0xf010 0x0
0x0010>,
+<0x0200 0x0 0xf020 0x0 0xf020 0x0
0x00e0>,
+<0x0300 0x0 0x4000 0x9 0x 0x0
0x4000>;
+ reg = <0xa 0x4000 0x0 0x0040>,
+ <0x0 0xfe15 0x0 0x0001>,
+ <0x0 0xf000 0x0 0x0010>;
+ reg-names = "dbi", "apb", "config";
+ resets = < SRST_PCIE0_POWER_UP>, < SRST_P_PCIE0>;
+ reset-names = "pwr", "pipe";
+ status = "disabled";
+
+ pcie3x4_intc: legacy-interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ };
+ };
+
+ pcie3x2: pcie@fe16 {
+ compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x10 0x1f>;
+ clocks = < ACLK_PCIE_2L_MSTR>, < ACLK_PCIE_2L_SLV>,
+< ACLK_PCIE_2L_DBI>, < PCLK_PCIE_2L>,
+< CLK_PCIE_AUX1>, < CLK_PCIE2L_PIPE>;
+ clock-names = "aclk_mst", "aclk_slv",
+ "aclk_dbi", "pclk",
+ "aux", "pipe";
+ device_type = "pci";
+ interrupts = ,
+,
+,
+,
+;
+ interrupt-names = "sys", "pmc", "msg", "l
[PATCH] sunxi: MAINTAINERS: drop myself
I no longer maintain them. Signed-off-by: FUKAUMI Naoki --- board/sunxi/MAINTAINERS | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 98bbd2dd25..d89a25db7c 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -82,8 +82,8 @@ S:Maintained F: configs/A20-Olimex-SOM-EVB_defconfig A20-OLINUXINO-LIME BOARD -M: FUKAUMI Naoki -S: Maintained +M: +S: F: configs/A20-OLinuXino-Lime_defconfig A20-OLINUXINO-LIME2 BOARD @@ -379,8 +379,8 @@ S: Maintained F: configs/nanopi_a64_defconfig NINTENDO NES CLASSIC EDITION BOARD -M: FUKAUMI Naoki -S: Maintained +M: +S: F: configs/Nintendo_NES_Classic_Edition_defconfig OCEANIC 5205 5INMFD BOARD -- 2.39.2
[PATCH] rockchip: MAINTAINERS: fix board name for Radxa ROCK 4C+
align with other ROCK series.
Fixes: 2b506407c8 ("rockchip: Add MAINTAINERS entry for Radxa Rock 4C+")
Signed-off-by: FUKAUMI Naoki
---
board/rockchip/evb_rk3399/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS
b/board/rockchip/evb_rk3399/MAINTAINERS
index cb44bc9fda..c7e412b54e 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -80,7 +80,7 @@ F:configs/orangepi-rk3399_defconfig
F: arch/arm/dts/rk3399-u-boot.dtsi
F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi
-RADXA ROCK 4C+
+ROCK-4C+
M: FUKAUMI Naoki
S: Maintained
F: configs/rock-4c-plus-rk3399_defconfig
--
2.39.2
Re: [PATCH v2 0/7] rockchip: rk3568: Fix use of PCIe bifurcation
hi, On 8/3/23 04:22, Jonas Karlman wrote: This series add support for use of PCIe bifurcation on RK3568, and as a bonus support for the RK3588 PHY is also included. With PCIe bifurcation supported it is possible to enable PCIe on more RK3568 boards, e.g. on NanoPi R5C and NanoPi R5S. This series only include fixing the mini PCIe slot on Radxa E25. Most parts of this series was imported almost 1:1 from mainline linux. Patch 1 fixes configuration of number of lanes in pcie_dw_rockchip. Patch 2-3 refactor the snps-pcie3 phy driver. Patch 4 add bifurcation support for RK3568. Patch 5 add support for RK3588 to snps-pcie3 driver. Patch 6 fixes use of pcie2x1l0 on ROCK 5B. Patch 7 enables the mini PCIe slot on Radxa E25. Changes in v2: - Fix use of signal from comb PHY on RK3588 - Add fixes tag The RK3588 PHY part was tested on a ROCK 5B together with device tree files picked from Sebastian Reichel's rk3588 branch at [1]. Patches in this series is also aviliable at [2]. [1] https://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-misc.git/tree/?h=rk3588 [2] https://github.com/Kwiboo/u-boot-rockchip/commits/rk35xx-pcie-bifurcation-v2 Jonas Karlman (7): pci: pcie_dw_rockchip: Configure number of lanes and link width speed phy: rockchip: snps-pcie3: Refactor to use clk_bulk API phy: rockchip: snps-pcie3: Refactor to use a phy_init ops phy: rockchip: snps-pcie3: Add bifurcation support for RK3568 phy: rockchip: snps-pcie3: Add support for RK3588 phy: rockchip: naneng-combphy: Use signal from comb PHY on RK3588 rockchip: rk3568-radxa-e25: Enable pcie3x1 node arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi | 11 +- configs/radxa-e25-rk3568_defconfig| 1 - drivers/pci/pcie_dw_rockchip.c| 58 - .../rockchip/phy-rockchip-naneng-combphy.c| 6 + .../phy/rockchip/phy-rockchip-snps-pcie3.c| 230 ++ 5 files changed, 241 insertions(+), 65 deletions(-) for the whole series, Tested-by: FUKAUMI Naoki on ROCK 5B with NVMe and linux-next 20230802 device tree.
Re: [PATCH v3] board: rockchip: Add Radxa E25 Carrier Board
quot;;
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cd-gpios = < RK_PA4 GPIO_ACTIVE_LOW>;
+ /* Also used in pcie30x1_clkreqnm0 */
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <_bus4 _clk _cmd>;
+ sd-uhs-sdr104;
+ vmmc-supply = <_sd>;
+ vqmmc-supply = <_sd>;
+ status = "okay";
+};
+
+_host0_ehci {
+ status = "okay";
+};
+
+_host0_ohci {
+ status = "okay";
+};
+
+_host0_xhci {
+ status = "okay";
+};
+
+_host1_ehci {
+ status = "okay";
+};
+
+_host1_ohci {
+ status = "okay";
+};
+
+_otg {
+ phy-supply = <_typec>;
+ status = "okay";
+};
+
+_host {
+ phy-supply = <_minipcie>;
+ status = "okay";
+};
+
+_otg {
+ phy-supply = <_ngff>;
+ status = "okay";
+};
diff --git a/board/rockchip/evb_rk3568/MAINTAINERS
b/board/rockchip/evb_rk3568/MAINTAINERS
index a8ed2508a162..82a92b89fa64 100644
--- a/board/rockchip/evb_rk3568/MAINTAINERS
+++ b/board/rockchip/evb_rk3568/MAINTAINERS
@@ -27,6 +27,14 @@ M: Jagan Teki
S:Maintained
F:configs/radxa-cm3-io-rk3566_defconfig
+RADXA-E25
+M: Jonas Karlman
+S: Maintained
+F: configs/radxa-e25-rk3568_defconfig
+F: arch/arm/dts/rk3568-radxa-cm3i.dtsi
+F: arch/arm/dts/rk3568-radxa-e25.dts
+F: arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
+
ROCK-3A
M: Akash Gajjar
S: Maintained
diff --git a/configs/radxa-e25-rk3568_defconfig
b/configs/radxa-e25-rk3568_defconfig
new file mode 100644
index ..a905100a794d
--- /dev/null
+++ b/configs/radxa-e25-rk3568_defconfig
@@ -0,0 +1,94 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_COUNTER_FREQUENCY=2400
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a0
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x60
+CONFIG_SPL_STACK=0x40
+CONFIG_DEBUG_UART_BASE=0xFE66
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-radxa-e25.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x4
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks
assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_AHCI_PCI=y
AHCI_PCI is not required for SATA on Carrier Board.
Tested-by: FUKAUMI Naoki
=> scsi scan
scanning bus for devices...
Target spinup took 0 ms.
AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
flags: ncq stag pm led clo only pmp fbss pio slum part ccc apst
Device 0: (0:0) Vendor: ATA Prod.: TS120GMTS420S Rev: V011
Type: Hard Disk
Capacity: 114473.4 MB = 111.7 GB (234441648 x 512)
Best regards,
+CONFIG_DWC_AHCI=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_SPL_MMC_HS200_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_RTL8169=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index e23237e453f3..10fffb56f13d 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -101,6 +101,7 @@ List of mainline supported Rockchip boards:
- Pine64 SOQuartz on Blade (soquartz-blade-rk3566_defconfig)
- Pine64 SOQuartz on CM4-IO (soquartz-cm4-rk3566_defconfig)
- Pine64 SOQuartz on Model A (soquartz-model-a-rk3566_defconfig)
+ - Radxa E25 Carrier Board (radxa-e25-rk3568_defconfig)
* rk3588
- Rockchip EVB (evb-rk3588)
Re: AW: EXTERNAL - [PATCH] menu: Ignore prompt variable if timeout is != 0
hi, On 7/25/23 17:23, Traut Manuel LCPF-CH wrote: Hi, Since 739e8361f3fe78038251216df6096a32bc2d5839, a system with the following /boot/extlinux/extlinux.conf (which sets timeout to 50) immediately boots the first entry in the config without displaying a boot menu. According to the description, that should only happen if both prompt and timeout are set to zero in the config, but it also happens with timeout set to a non-zero value. Reported-by: Karsten Merker Signed-off-by: Manuel Traut --- common/menu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/common/menu.c b/common/menu.c index 8fe00965c0..8eab87 100644 --- a/common/menu.c +++ b/common/menu.c @@ -277,6 +277,9 @@ int menu_get_choice(struct menu *m, void **choice) if (!m->item_cnt) return -ENOENT; + if (m->timeout) + return menu_interactive_choice(m, choice); This should not be needed, if the user wants to prompt the menu there is the PROMPT keyword that can be used in extlinux.conf, e.g.: PROMPT 1 TIMEOUT 50 See https://wiki.archlinux.org/title/Syslinux#Boot_prompt That should set pxe cfg->prompt = 1 and that in turn menu m->prompt = 1. https://source.denx.de/u-boot/u-boot/-/blob/master/common/menu.c#L346 -351 this description is unclear for me if (timeout > 0) && (prompt == 0) This is my current understanding after reading the description multiple times: | timeout == 0 | timeout > 0 +--+- prompt == 0 | boot default | wait for timeout or user interrupt +--+- prompt != 0 | ask user | ask user so for (timeout > 0) && (prompt == 0) I would expect to boot the default choice immediately. Without reading the documentation I would expect PROMPT 1 TIMEOUT 50 to show a prompt for 5 seconds and afterwards boot the default choice. This also matches the current implantation and the explanation in the arch wiki. The current implementation, behaves like this: | timeout == 0 | timeout > 0 +--+- prompt == 0 | boot default | boot default +--+- prompt != 0 | ask user | wait for timeout or user input The patch under discussion considers a configuration of: PROMPT 0 TIMEOUT 50 that currently is booting the default target immediately. This clearly does not match the description. The patch would change the behavior like this: | timeout == 0 | timeout > 0 +--+- prompt == 0 | boot default | wait for timeout or user input +--+- prompt != 0 | ask user | wait for timeout or user input It does not match the description regarding: "prompt - If 1, the user will be prompted for input regardless of the value of timeout" If I write a configuration like: PROMPT 1 TIMEOUT 50 I would expect to get a prompt for 5 seconds, than boot the default target. I can update the patch to include changing the documentation along with table above as a comment to make it easier understandable. Or shall I update the patch to match the behavior described in the first table? Just let me know.. I agree that the documentation is not clear, because this is a common menu function I would expect the use of timeout and prompt to be explicit and that each control a single function. prompt: 0 = do not ask user, 1 = ask user timeout: 0 = wait indefinitely, > 0 time to wait for input This should match the current implementation (but not documentation..) @FUKAUMI Naoki, @mer...@debian.org - is it ok for you if we keep this behavior and I will fix the documentation? I'm fine. If anything needs to be done related to how extlinux.conf handles menu options the menu config should probably be changed in pxe_utils.c and not in the common menu.c. My expectations related to extlinux.conf would be: - No need to prompt or wait for timeout if there is only one bootable choice, regardless of PROMPT or TIMEOUT values - Should not prompt when I have explicitly specified PROMPT 0 - Having multiple bootable choices and a TIMEOUT > 0 or PROMPT 1 should prompt, at least if I have some way to see and control the menu This is also fine for me, we could implement this as an additional feature, if we have agreed on the basic behavior. I like this too. Best regards, -- FUKAUMI Naoki Radxa Best regards Manuel
Re: [PATCH] menu: Ignore prompt variable if timeout is != 0
hi, thank you for your reply! On 7/18/23 23:08, Jonas Karlman wrote: On 2023-07-14 09:36, FUKAUMI Naoki wrote: From: Manuel Traut Since 739e8361f3fe78038251216df6096a32bc2d5839, a system with the following /boot/extlinux/extlinux.conf (which sets timeout to 50) immediately boots the first entry in the config without displaying a boot menu. According to the description, that should only happen if both prompt and timeout are set to zero in the config, but it also happens with timeout set to a non-zero value. Reported-by: Karsten Merker Signed-off-by: Manuel Traut --- common/menu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/common/menu.c b/common/menu.c index 8fe00965c0..8eab87 100644 --- a/common/menu.c +++ b/common/menu.c @@ -277,6 +277,9 @@ int menu_get_choice(struct menu *m, void **choice) if (!m->item_cnt) return -ENOENT; + if (m->timeout) + return menu_interactive_choice(m, choice); This should not be needed, if the user wants to prompt the menu there is the PROMPT keyword that can be used in extlinux.conf, e.g.: PROMPT 1 TIMEOUT 50 See https://wiki.archlinux.org/title/Syslinux#Boot_prompt That should set pxe cfg->prompt = 1 and that in turn menu m->prompt = 1. https://source.denx.de/u-boot/u-boot/-/blob/master/common/menu.c#L346-351 this description is unclear for me if (timeout > 0) && (prompt == 0) Best regards, -- FUKAUMI Naoki Radxa Regards, Jonas + if (!m->prompt) return menu_default_choice(m, choice);
[PATCH] menu: Ignore prompt variable if timeout is != 0
From: Manuel Traut Since 739e8361f3fe78038251216df6096a32bc2d5839, a system with the following /boot/extlinux/extlinux.conf (which sets timeout to 50) immediately boots the first entry in the config without displaying a boot menu. According to the description, that should only happen if both prompt and timeout are set to zero in the config, but it also happens with timeout set to a non-zero value. Reported-by: Karsten Merker Signed-off-by: Manuel Traut --- common/menu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/common/menu.c b/common/menu.c index 8fe00965c0..8eab87 100644 --- a/common/menu.c +++ b/common/menu.c @@ -277,6 +277,9 @@ int menu_get_choice(struct menu *m, void **choice) if (!m->item_cnt) return -ENOENT; + if (m->timeout) + return menu_interactive_choice(m, choice); + if (!m->prompt) return menu_default_choice(m, choice); -- 2.39.0
Re: [PATCH v2 2/3] rockchip: rk356x: update the dwc3_device register offset
hi,
could you tell me current status of this patch?
--
FUKAUMI Naoki
On 2/26/23 22:22, Manoj Sai wrote:
update the dwc3_device register offset in board_usb_init()
for rk3568 platforms.
Signed-off-by: Manoj Sai
Reviewed-by: Jagan Teki
---
Changes for v2:-
- None
---
arch/arm/mach-rockchip/board.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index f1f70c81d0..c7729c966a 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -300,6 +300,9 @@ int usb_gadget_handle_interrupts(int index)
int board_usb_init(int index, enum usb_init_type init)
{
+ if (IS_ENABLED(CONFIG_ROCKCHIP_RK3568))
+ dwc3_device_data.base = 0xfcc0;
+
return dwc3_uboot_init(_device_data);
}
#endif /* CONFIG_USB_DWC3_GADGET */
[PATCH 3/5] arm: dts: rockchip: add Radxa ROCK 4C+
Linux commit 246450344dad arm64: dts: rockchip: rk3399: Radxa ROCK 4C+
Add support for Radxa ROCK 4C+ SBC.
Key differences of 4C+ compared to previous ROCK Pi 4.
- Rockchip RK3399-T SoC
- DP from 4C replaced with micro HDMI 2K@60fps
- 4-lane MIPI DSI with 1920*1080
- RK817 Audio codec
Also, an official naming convention from Radxa mention to remove
Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not
Radxa ROCK Pi 4C+.
Signed-off-by: Stephen Chen
Signed-off-by: Manoj Sai
Signed-off-by: Jagan Teki
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi | 5 +
arch/arm/dts/rk3399-rock-4c-plus.dts | 709 +++
arch/arm/dts/rk3399-t-opp.dtsi | 114 +++
4 files changed, 829 insertions(+)
create mode 100644 arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-4c-plus.dts
create mode 100644 arch/arm/dts/rk3399-t-opp.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1d674b90af..2e0dbf8720 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -157,6 +157,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
+ rk3399-rock-4c-plus.dtb \
rk3399-rock-pi-4a.dtb \
rk3399-rock-pi-4c.dtb \
rk3399-rock960.dtb \
diff --git a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
new file mode 100644
index 00..5c1c451b8f
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Radxa Limited
+ */
+#include "rk3399-rock-pi-4-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3399-rock-4c-plus.dts
b/arch/arm/dts/rk3399-rock-4c-plus.dts
new file mode 100644
index 00..028eb508ae
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus.dts
@@ -0,0 +1,709 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2022 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include
+#include "rk3399.dtsi"
+#include "rk3399-t-opp.dtsi"
+
+/ {
+ model = "Radxa ROCK 4C+";
+ compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
+
+ aliases {
+ mmc0 =
+ mmc1 =
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_led1 _led2>;
+
+ /* USER_LED1 */
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = ;
+ gpios = < RK_PD4 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "default-on";
+ };
+
+ /* USER_LED2 */
+ led-1 {
+ function = LED_FUNCTION_STATUS;
+ color = ;
+ gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <_enable_h>;
+ reset-gpios = < RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc_3v3: vcc-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_sys>;
+ };
+
+ vcc3v3_phy1: vcc3v3-phy1-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_phy1";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_3v3>;
+ };
+
+ vcc5v0_host1: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
[PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3
sync dts{,i} files for Radxa ROCK Pi 4 series with Linux 6.3.
because rk3399-rock-pi-4a.dts is enough for ROCK Pi 4A/B/A+/B+ and ROCK
4SE, delete dts{,i} for ROCK Pi 4B.
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/rk3399-rock-pi-4.dtsi| 229 --
...oot.dtsi => rk3399-rock-pi-4a-u-boot.dtsi} | 0
arch/arm/dts/rk3399-rock-pi-4b.dts| 46
arch/arm/dts/rk3399-rock-pi-4c.dts| 20 +-
5 files changed, 174 insertions(+), 122 deletions(-)
rename arch/arm/dts/{rk3399-rock-pi-4b-u-boot.dtsi =>
rk3399-rock-pi-4a-u-boot.dtsi} (100%)
delete mode 100644 arch/arm/dts/rk3399-rock-pi-4b.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3385948d22..1d674b90af 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -158,7 +158,6 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
rk3399-rock-pi-4a.dtb \
- rk3399-rock-pi-4b.dtb \
rk3399-rock-pi-4c.dtb \
rk3399-rock960.dtb \
rk3399-rockpro64.dtb \
diff --git a/arch/arm/dts/rk3399-rock-pi-4.dtsi
b/arch/arm/dts/rk3399-rock-pi-4.dtsi
index b2ea92..907071d4fe 100644
--- a/arch/arm/dts/rk3399-rock-pi-4.dtsi
+++ b/arch/arm/dts/rk3399-rock-pi-4.dtsi
@@ -6,14 +6,15 @@
/dts-v1/;
#include
+#include
#include
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
/ {
aliases {
- mmc0 =
- mmc1 =
+ mmc0 =
+ mmc1 =
};
chosen {
@@ -27,6 +28,20 @@
#clock-cells = <0>;
};
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_led2>;
+
+ /* USER_LED2 */
+ led-0 {
+ function = LED_FUNCTION_STATUS;
+ color = ;
+ gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = < 1>;
@@ -36,32 +51,56 @@
reset-gpios = < RK_PB2 GPIO_ACTIVE_LOW>;
};
- vcc12v_dcin: dc-12v {
+ sound: sound {
+ compatible = "audio-graph-card";
+ label = "Analog";
+ dais = <_p0>;
+ };
+
+ sound-dit {
+ compatible = "audio-graph-card";
+ label = "SPDIF";
+ dais = <_p0>;
+ };
+
+ spdif-dit {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port {
+ dit_p0_0: endpoint {
+ remote-endpoint = <_p0_0>;
+ };
+ };
+ };
+
+ vbus_typec: vbus-typec-regulator {
compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
+ enable-active-high;
+ gpio = < RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_typec_en>;
+ regulator-name = "vbus_typec";
regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200>;
- regulator-max-microvolt = <1200>;
+ vin-supply = <_sys>;
};
- vcc5v0_sys: vcc-sys {
+ vcc12v_dcin: dc-12v {
compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
+ regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- vin-supply = <_dcin>;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
};
- vcc_0v9: vcc-0v9 {
+ vcc3v3_lan: vcc3v3-lan-regulator {
compatible = "regulator-fixed";
- regulator-name = "vcc_0v9";
+ regulator-name = "vcc3v3_lan";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <90>;
- regulator-max-microvolt = <90>;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
vin-supply = <_sys>;
};
@@ -98,35 +137,35 @@
[PATCH 4/5] configs: rockchip: add Radxa ROCK 4C+
add defconfig for Radxa ROCK 4C+. Signed-off-by: FUKAUMI Naoki --- configs/rock-4c-plus-rk3399_defconfig | 97 +++ 1 file changed, 97 insertions(+) create mode 100644 configs/rock-4c-plus-rk3399_defconfig diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig new file mode 100644 index 00..97693166d9 --- /dev/null +++ b/configs/rock-4c-plus-rk3399_defconfig @@ -0,0 +1,97 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=2400 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x0020 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30 +CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-4c-plus" +CONFIG_DM_RESET=y +CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x40 +CONFIG_DEBUG_UART_BASE=0xFF1A +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_SYS_LOAD_ADDR=0x800800 +CONFIG_DEBUG_UART=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4c-plus.dtb" +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1 +CONFIG_TPL=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DFU_MMC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCI=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y +CONFIG_BAUDRATE=150 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_VIDEO=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y -- 2.39.2
[PATCH 2/5] configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B
rk3399-rock-pi-4a.dtb is enough for Radxa ROCK Pi 4A/B/A+/B+ and ROCK 4SE. Signed-off-by: FUKAUMI Naoki --- configs/rock-pi-4-rk3399_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index 4ecc06d92b..fde1ee2eb5 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -7,7 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30 CONFIG_ENV_OFFSET=0x3F8000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b" +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y @@ -17,7 +17,7 @@ CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 -- 2.39.2
[PATCH 5/5] doc: rockchip: update list of Radxa ROCK (Pi) 4 boards
add Radxa ROCK (Pi) 4 variants. Signed-off-by: FUKAUMI Naoki --- doc/board/rockchip/rockchip.rst | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 1dccb17d72..749e40de01 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -83,7 +83,10 @@ List of mainline supported Rockchip boards: - Khadas Edge-V (hadas-edge-v-rk3399) - Orange Pi RK3399 (orangepi-rk3399) - Pine64 RockPro64 (rockpro64-rk3399) - - Radxa ROCK Pi 4 (rock-pi-4-rk3399) + - Radxa ROCK 4C+ (rock-4c-plus-rk3399) + - Radxa ROCK 4SE (rock-pi-4-rk3399) + - Radxa ROCK Pi 4A/B/A+/B+ (rock-pi-4-rk3399) + - Radxa ROCK Pi 4C (rock-pi-4c-rk3399) - Rockchip Evb-RK3399 (evb_rk3399) - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399) -- 2.39.2
Re: [PATCH 1/2] arm: dts: rk3399: rock-pi-4: sync with Linux 6.3-rc5
hi,
On 4/13/23 11:18, Kever Yang wrote:
On 2023/4/8 17:11, FUKAUMI Naoki wrote:
sync *.dts{,i} files for Radxa ROCK Pi 4 series with Linux 6.3-rc5.
Signed-off-by: FUKAUMI Naoki
Reviewed-by: Kever Yang
this is not merged yet, right?
I want to modify this change.
Best regards,
--
FUKAUMI Naoki
Thanks,
- Kever
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/rk3399-rock-pi-4.dtsi | 229 --
.../dts/rk3399-rock-pi-4a-plus-u-boot.dtsi | 5 +
arch/arm/dts/rk3399-rock-pi-4a-plus.dts | 25 ++
arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi | 6 +
.../dts/rk3399-rock-pi-4b-plus-u-boot.dtsi | 5 +
arch/arm/dts/rk3399-rock-pi-4b-plus.dts | 61 +
arch/arm/dts/rk3399-rock-pi-4b.dts | 9 +-
arch/arm/dts/rk3399-rock-pi-4c.dts | 20 +-
9 files changed, 284 insertions(+), 78 deletions(-)
create mode 100644 arch/arm/dts/rk3399-rock-pi-4a-plus-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-pi-4a-plus.dts
create mode 100644 arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-pi-4b-plus-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-pi-4b-plus.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c160e884bf..8a5eb6225c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -157,7 +157,9 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
+ rk3399-rock-pi-4a-plus.dtb \
rk3399-rock-pi-4a.dtb \
+ rk3399-rock-pi-4b-plus.dtb \
rk3399-rock-pi-4b.dtb \
rk3399-rock-pi-4c.dtb \
rk3399-rock960.dtb \
diff --git a/arch/arm/dts/rk3399-rock-pi-4.dtsi
b/arch/arm/dts/rk3399-rock-pi-4.dtsi
index b2ea92..907071d4fe 100644
--- a/arch/arm/dts/rk3399-rock-pi-4.dtsi
+++ b/arch/arm/dts/rk3399-rock-pi-4.dtsi
@@ -6,14 +6,15 @@
/dts-v1/;
#include
+#include
#include
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
/ {
aliases {
- mmc0 =
- mmc1 =
+ mmc0 =
+ mmc1 =
};
chosen {
@@ -27,6 +28,20 @@
#clock-cells = <0>;
};
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_led2>;
+
+ /* USER_LED2 */
+ led-0 {
+ function = LED_FUNCTION_STATUS;
+ color = ;
+ gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = < 1>;
@@ -36,32 +51,56 @@
reset-gpios = < RK_PB2 GPIO_ACTIVE_LOW>;
};
- vcc12v_dcin: dc-12v {
+ sound: sound {
+ compatible = "audio-graph-card";
+ label = "Analog";
+ dais = <_p0>;
+ };
+
+ sound-dit {
+ compatible = "audio-graph-card";
+ label = "SPDIF";
+ dais = <_p0>;
+ };
+
+ spdif-dit {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port {
+ dit_p0_0: endpoint {
+ remote-endpoint = <_p0_0>;
+ };
+ };
+ };
+
+ vbus_typec: vbus-typec-regulator {
compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
+ enable-active-high;
+ gpio = < RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_typec_en>;
+ regulator-name = "vbus_typec";
regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200>;
- regulator-max-microvolt = <1200>;
+ vin-supply = <_sys>;
};
- vcc5v0_sys: vcc-sys {
+ vcc12v_dcin: dc-12v {
compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
+ regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- vin-supply = <_dcin>;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
};
- vcc_0v9: vcc-0v9 {
+ vcc3v3_lan: vcc3v3-lan-regulator {
compatible = "regulator-fixed";
- regulator-name = "vcc_0v9";
+ regulator-name = "vcc3v3_lan";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <90>;
- regulator-max-microvolt = <90>;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
vin-supply = <
[PATCH v2 4/4] configs: rockchip: radxa-cm3-io: drop CONFIG_USB_DWC3_GENERIC
it's not used by rk35xx Signed-off-by: FUKAUMI Naoki --- v2: - new patch configs/radxa-cm3-io-rk3566_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index 9b99181714..1df9cab79d 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -77,5 +77,4 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GENERIC=y CONFIG_ERRNO_STR=y -- 2.39.2
[PATCH v2 3/4] arm: dts: rockchip: radxa-cm3-io, rock-3a: enable regulators for usb
enable regulators for usb host function
Signed-off-by: FUKAUMI Naoki
Reviewed-by: Kever Yang
---
v2:
- collect R-b
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 4
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 8
2 files changed, 12 insertions(+)
diff --git a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
index 4e79173833..d183e93575 100644
--- a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
@@ -16,3 +16,7 @@
bootph-all;
status = "okay";
};
+
+_usb30 {
+ regulator-boot-on;
+};
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
index 9ef1e84770..b7b18e131a 100644
--- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -26,3 +26,11 @@
bootph-all;
status = "okay";
};
+
+_usb_host {
+ regulator-boot-on;
+};
+
+_usb_hub {
+ regulator-boot-on;
+};
--
2.39.2
[PATCH v2 2/4] configs: rockchip: radxa-cm3-io, rock-3a: enable commands for i2c/pmic/regulator
enable commands for i2c/pmic/regulator and relevant configs. also drop configs for unused regulators. Signed-off-by: FUKAUMI Naoki Reviewed-by: Kever Yang --- v2: - collect R-b configs/radxa-cm3-io-rk3566_defconfig | 8 ++-- configs/rock-3a-rk3568_defconfig | 3 ++- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index 2100cf2cb2..9b99181714 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -37,9 +37,12 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y @@ -60,8 +63,9 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -CONFIG_REGULATOR_PWM=y -CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=150 diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index 16a8b6092c..92562026a7 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -41,6 +41,8 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y @@ -64,7 +66,6 @@ CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y CONFIG_SPL_PMIC_RK8XX=y -CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y -- 2.39.2
[PATCH v2 1/4] configs: rockchip: rock-3a: make usb host work
add support for USB host function on ROCK 3A Signed-off-by: FUKAUMI Naoki --- v2: - drop CONFIG_USB_DWC3_GENERIC configs/rock-3a-rk3568_defconfig | 11 +++ 1 file changed, 11 insertions(+) diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index e753832183..16a8b6092c 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_ATF=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y @@ -58,6 +59,8 @@ CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y CONFIG_SPL_PMIC_RK8XX=y @@ -69,5 +72,13 @@ CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y # CONFIG_BINMAN_FDT is not set CONFIG_ERRNO_STR=y -- 2.39.2
[PATCH 3/3] arm: dts: rockchip: radxa-cm3-io, rock-3a: enable regulators for usb
enable regulators for usb host function
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 4
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 8
2 files changed, 12 insertions(+)
diff --git a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
index 4e79173833..d183e93575 100644
--- a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
@@ -16,3 +16,7 @@
bootph-all;
status = "okay";
};
+
+_usb30 {
+ regulator-boot-on;
+};
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
index 9ef1e84770..b7b18e131a 100644
--- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -26,3 +26,11 @@
bootph-all;
status = "okay";
};
+
+_usb_host {
+ regulator-boot-on;
+};
+
+_usb_hub {
+ regulator-boot-on;
+};
--
2.39.2
[PATCH 2/3] configs: rockchip: radxa-cm3-io, rock-3a: enable commands for i2c/pmic/regulator
enable commands for i2c/pmic/regulator and relevant configs. also drop configs for unused regulators. Signed-off-by: FUKAUMI Naoki --- configs/radxa-cm3-io-rk3566_defconfig | 8 ++-- configs/rock-3a-rk3568_defconfig | 3 ++- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index 2100cf2cb2..9b99181714 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -37,9 +37,12 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y @@ -60,8 +63,9 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -CONFIG_REGULATOR_PWM=y -CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=150 diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index d24563a504..c03aa2a4c1 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -41,6 +41,8 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y @@ -64,7 +66,6 @@ CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y CONFIG_SPL_PMIC_RK8XX=y -CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y -- 2.39.2
[PATCH 1/3] configs: rockchip: rock-3a: make usb host work
add support for USB host function on ROCK 3A Signed-off-by: FUKAUMI Naoki --- configs/rock-3a-rk3568_defconfig | 12 1 file changed, 12 insertions(+) diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index e753832183..d24563a504 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_ATF=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y @@ -58,6 +59,8 @@ CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y CONFIG_SPL_PMIC_RK8XX=y @@ -69,5 +72,14 @@ CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y # CONFIG_BINMAN_FDT is not set CONFIG_ERRNO_STR=y -- 2.39.2
[PATCH] arm: dts: rockchip: rock-3a: drop u-boot,spl-boot-order
use common one defined in rk356x-u-boot.dtsi.
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
index 9ef1e84770..f3ccfb1363 100644
--- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -9,7 +9,6 @@
/ {
chosen {
stdout-path =
- u-boot,spl-boot-order = "same-as-spl", ,
};
};
--
2.39.2
Re: [PATCH 2/2] configs: rk3399: add Radxa ROCK Pi 4 variants
hi,
On 4/13/23 11:22, Kever Yang wrote:
On 2023/4/8 17:11, FUKAUMI Naoki wrote:
compared to ROCK Pi 4B,
- ROCK Pi 4A: without Wi-Fi/BT
- ROCK Pi 4A+: with OP1, without Wi-Fi/BT
- ROCK Pi 4B+: with OP1
It will be better to re-use one defconfig all the board in one series,
the peripheral difference like
Wi-Fi/BT are identified by the dts, not thedefconfig, and they even
not used in U-Boot.
I got it.
btw, ROCK 4C+ is different to ROCK Pi 4A/A+/B/B+.
(e.g. PMIC is RK809 on 4C+ instead of RK808)
could you review ROCK 4C+ patches?
https://patchwork.ozlabs.org/project/uboot/list/?series=350088
Best regards,
--
FUKAUMI Naoki
Thanks,
- Kever
Signed-off-by: FUKAUMI Naoki
---
configs/rock-pi-4a-plus-rk3399_defconfig | 97 +++
configs/rock-pi-4a-rk3399_defconfig | 97 +++
configs/rock-pi-4b-plus-rk3399_defconfig | 97 +++
..._defconfig => rock-pi-4b-rk3399_defconfig} | 0
4 files changed, 291 insertions(+)
create mode 100644 configs/rock-pi-4a-plus-rk3399_defconfig
create mode 100644 configs/rock-pi-4a-rk3399_defconfig
create mode 100644 configs/rock-pi-4b-plus-rk3399_defconfig
rename configs/{rock-pi-4-rk3399_defconfig =>
rock-pi-4b-rk3399_defconfig} (100%)
diff --git a/configs/rock-pi-4a-plus-rk3399_defconfig
b/configs/rock-pi-4a-plus-rk3399_defconfig
new file mode 100644
index 00..daac538376
--- /dev/null
+++ b/configs/rock-pi-4a-plus-rk3399_defconfig
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=2400
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x0020
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a-plus"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x40
+CONFIG_DEBUG_UART_BASE=0xFF1A
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a-plus.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names
interrupt-parent assigned-clocks assigned-clock-rates
assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DFU_MMC=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_BAUDRATE=150
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_CAPSULE_ON_DISK=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/rock-pi-4a-rk3399_defconfig
b/configs/rock-pi-4a-rk3399_defconfig
new file mode 100644
index 00..fde1ee2eb5
--- /dev/null
+++ b/configs/rock-pi-4a-rk3399_defconfig
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=2400
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x0020
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x40
+CONFIG_DEBUG_UART_BASE=0xFF1A
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_
Re: [PATCH] configs: rk3588: rename defconfig for rock-5b
Hi,
On 4/10/23 12:12, Kever Yang wrote:
Hi,
On 2023/4/8 17:33, FUKAUMI Naoki wrote:
it should be rock-5b-rk3588_defconfig.
Why it should be rock-5b?
Its seems rock pi has many boards and with different name, I thinks
rock5b is a reasonable config name
because there is no name rule for rock pi boards till now.
configs/rockpro64-rk3399_defconfig
> configs/rock64-rk3328_defconfig
> configs/rock960-rk3399_defconfig
above 3 are not made by Radxa. please ignore for now.
configs/rock_defconfig
> configs/rock2_defconfig
above 2 are made by Radxa. but very old, no name rule.
configs/rock-pi-s-rk3308_defconfig
configs/rock-pi-e-rk3328_defconfig
configs/rock5b-rk3588_defconfig
configs/rock-pi-4-rk3399_defconfig
configs/rock-pi-4c-rk3399_defconfig
configs/rock-pi-n10-rk3399pro_defconfig
configs/rock-3a-rk3568_defconfig
configs/rock-pi-n8-rk3288_defconfig
$ grep -h CONFIG_DEFAULT_DEVICE_TREE configs/*rock*
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
CONFIG_DEFAULT_DEVICE_TREE="rk3568-rock-3a"
CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b"
CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960"
CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock"
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4c"
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b"
CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e"
CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10"
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock-pi-n8"
CONFIG_DEFAULT_DEVICE_TREE="rk3308-rock-pi-s"
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
I think "rock-5b" is better than "rock5b".
--
FUKAUMI Naoki
Thanks,
- Kever
Signed-off-by: FUKAUMI Naoki
---
configs/{rock5b-rk3588_defconfig => rock-5b-rk3588_defconfig} | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename configs/{rock5b-rk3588_defconfig => rock-5b-rk3588_defconfig}
(100%)
diff --git a/configs/rock5b-rk3588_defconfig
b/configs/rock-5b-rk3588_defconfig
similarity index 100%
rename from configs/rock5b-rk3588_defconfig
rename to configs/rock-5b-rk3588_defconfig
[PATCH] arm: dts: rk356x: Makefile: sort
sort alphanumerically. Signed-off-by: FUKAUMI Naoki --- arch/arm/dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c160e884bf..760cff5295 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -165,8 +165,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ROCKCHIP_RK3568) += \ - rk3568-evb.dtb \ rk3566-radxa-cm3-io.dtb \ + rk3568-evb.dtb \ rk3568-rock-3a.dtb dtb-$(CONFIG_ROCKCHIP_RK3588) += \ -- 2.39.2
[PATCH] configs: rk3588: rename defconfig for rock-5b
it should be rock-5b-rk3588_defconfig.
Signed-off-by: FUKAUMI Naoki
---
configs/{rock5b-rk3588_defconfig => rock-5b-rk3588_defconfig} | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename configs/{rock5b-rk3588_defconfig => rock-5b-rk3588_defconfig} (100%)
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock-5b-rk3588_defconfig
similarity index 100%
rename from configs/rock5b-rk3588_defconfig
rename to configs/rock-5b-rk3588_defconfig
--
2.39.2
[PATCH 2/2] configs: rk3399: add Radxa ROCK 4C+
add defconfig for ROCK 4C+. Signed-off-by: FUKAUMI Naoki --- configs/rock-4c-plus-rk3399_defconfig | 97 +++ 1 file changed, 97 insertions(+) create mode 100644 configs/rock-4c-plus-rk3399_defconfig diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig new file mode 100644 index 00..97693166d9 --- /dev/null +++ b/configs/rock-4c-plus-rk3399_defconfig @@ -0,0 +1,97 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=2400 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x0020 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30 +CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-4c-plus" +CONFIG_DM_RESET=y +CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x40 +CONFIG_DEBUG_UART_BASE=0xFF1A +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_SYS_LOAD_ADDR=0x800800 +CONFIG_DEBUG_UART=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4c-plus.dtb" +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1 +CONFIG_TPL=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DFU_MMC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCI=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y +CONFIG_BAUDRATE=150 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_VIDEO=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y -- 2.39.2
[PATCH 1/2] arm: dts: rk3399: add Radxa ROCK 4C+
Linux commit 246450344dad arm64: dts: rockchip: rk3399: Radxa ROCK 4C+
Add support for Radxa ROCK 4C+ SBC.
Key differences of 4C+ compared to previous ROCK Pi 4.
- Rockchip RK3399-T SoC
- DP from 4C replaced with micro HDMI 2K@60fps
- 4-lane MIPI DSI with 1920*1080
- RK817 Audio codec
Also, an official naming convention from Radxa mention to remove
Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not
Radxa ROCK Pi 4C+.
Signed-off-by: Stephen Chen
Signed-off-by: Manoj Sai
Signed-off-by: Jagan Teki
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi | 5 +
arch/arm/dts/rk3399-rock-4c-plus.dts | 709 +++
arch/arm/dts/rk3399-t-opp.dtsi | 114 +++
4 files changed, 829 insertions(+)
create mode 100644 arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-4c-plus.dts
create mode 100644 arch/arm/dts/rk3399-t-opp.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 8a5eb6225c..7a85a12e81 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -157,6 +157,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
+ rk3399-rock-4c-plus.dtb \
rk3399-rock-pi-4a-plus.dtb \
rk3399-rock-pi-4a.dtb \
rk3399-rock-pi-4b-plus.dtb \
diff --git a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
new file mode 100644
index 00..5c1c451b8f
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Radxa Limited
+ */
+#include "rk3399-rock-pi-4-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3399-rock-4c-plus.dts
b/arch/arm/dts/rk3399-rock-4c-plus.dts
new file mode 100644
index 00..028eb508ae
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus.dts
@@ -0,0 +1,709 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2022 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include
+#include "rk3399.dtsi"
+#include "rk3399-t-opp.dtsi"
+
+/ {
+ model = "Radxa ROCK 4C+";
+ compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
+
+ aliases {
+ mmc0 =
+ mmc1 =
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_led1 _led2>;
+
+ /* USER_LED1 */
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = ;
+ gpios = < RK_PD4 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "default-on";
+ };
+
+ /* USER_LED2 */
+ led-1 {
+ function = LED_FUNCTION_STATUS;
+ color = ;
+ gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <_enable_h>;
+ reset-gpios = < RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc_3v3: vcc-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_sys>;
+ };
+
+ vcc3v3_phy1: vcc3v3-phy1-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_phy1";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_3v3>;
+ };
+
+ vcc5v0_host1: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-
[PATCH 2/2] configs: rk3399: add Radxa ROCK Pi 4 variants
compared to ROCK Pi 4B,
- ROCK Pi 4A: without Wi-Fi/BT
- ROCK Pi 4A+: with OP1, without Wi-Fi/BT
- ROCK Pi 4B+: with OP1
Signed-off-by: FUKAUMI Naoki
---
configs/rock-pi-4a-plus-rk3399_defconfig | 97 +++
configs/rock-pi-4a-rk3399_defconfig | 97 +++
configs/rock-pi-4b-plus-rk3399_defconfig | 97 +++
..._defconfig => rock-pi-4b-rk3399_defconfig} | 0
4 files changed, 291 insertions(+)
create mode 100644 configs/rock-pi-4a-plus-rk3399_defconfig
create mode 100644 configs/rock-pi-4a-rk3399_defconfig
create mode 100644 configs/rock-pi-4b-plus-rk3399_defconfig
rename configs/{rock-pi-4-rk3399_defconfig => rock-pi-4b-rk3399_defconfig}
(100%)
diff --git a/configs/rock-pi-4a-plus-rk3399_defconfig
b/configs/rock-pi-4a-plus-rk3399_defconfig
new file mode 100644
index 00..daac538376
--- /dev/null
+++ b/configs/rock-pi-4a-plus-rk3399_defconfig
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=2400
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x0020
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a-plus"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x40
+CONFIG_DEBUG_UART_BASE=0xFF1A
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a-plus.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DFU_MMC=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_BAUDRATE=150
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_CAPSULE_ON_DISK=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/rock-pi-4a-rk3399_defconfig
b/configs/rock-pi-4a-rk3399_defconfig
new file mode 100644
index 00..fde1ee2eb5
--- /dev/null
+++ b/configs/rock-pi-4a-rk3399_defconfig
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=2400
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x0020
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x40
+CONFIG_DEBUG_UART_BASE=0xFF1A
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_NVEDIT_EFI
[PATCH 1/2] arm: dts: rk3399: rock-pi-4: sync with Linux 6.3-rc5
sync *.dts{,i} files for Radxa ROCK Pi 4 series with Linux 6.3-rc5.
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/rk3399-rock-pi-4.dtsi| 229 --
.../dts/rk3399-rock-pi-4a-plus-u-boot.dtsi| 5 +
arch/arm/dts/rk3399-rock-pi-4a-plus.dts | 25 ++
arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi| 6 +
.../dts/rk3399-rock-pi-4b-plus-u-boot.dtsi| 5 +
arch/arm/dts/rk3399-rock-pi-4b-plus.dts | 61 +
arch/arm/dts/rk3399-rock-pi-4b.dts| 9 +-
arch/arm/dts/rk3399-rock-pi-4c.dts| 20 +-
9 files changed, 284 insertions(+), 78 deletions(-)
create mode 100644 arch/arm/dts/rk3399-rock-pi-4a-plus-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-pi-4a-plus.dts
create mode 100644 arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-pi-4b-plus-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-pi-4b-plus.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c160e884bf..8a5eb6225c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -157,7 +157,9 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
+ rk3399-rock-pi-4a-plus.dtb \
rk3399-rock-pi-4a.dtb \
+ rk3399-rock-pi-4b-plus.dtb \
rk3399-rock-pi-4b.dtb \
rk3399-rock-pi-4c.dtb \
rk3399-rock960.dtb \
diff --git a/arch/arm/dts/rk3399-rock-pi-4.dtsi
b/arch/arm/dts/rk3399-rock-pi-4.dtsi
index b2ea92..907071d4fe 100644
--- a/arch/arm/dts/rk3399-rock-pi-4.dtsi
+++ b/arch/arm/dts/rk3399-rock-pi-4.dtsi
@@ -6,14 +6,15 @@
/dts-v1/;
#include
+#include
#include
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
/ {
aliases {
- mmc0 =
- mmc1 =
+ mmc0 =
+ mmc1 =
};
chosen {
@@ -27,6 +28,20 @@
#clock-cells = <0>;
};
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_led2>;
+
+ /* USER_LED2 */
+ led-0 {
+ function = LED_FUNCTION_STATUS;
+ color = ;
+ gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = < 1>;
@@ -36,32 +51,56 @@
reset-gpios = < RK_PB2 GPIO_ACTIVE_LOW>;
};
- vcc12v_dcin: dc-12v {
+ sound: sound {
+ compatible = "audio-graph-card";
+ label = "Analog";
+ dais = <_p0>;
+ };
+
+ sound-dit {
+ compatible = "audio-graph-card";
+ label = "SPDIF";
+ dais = <_p0>;
+ };
+
+ spdif-dit {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port {
+ dit_p0_0: endpoint {
+ remote-endpoint = <_p0_0>;
+ };
+ };
+ };
+
+ vbus_typec: vbus-typec-regulator {
compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
+ enable-active-high;
+ gpio = < RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_typec_en>;
+ regulator-name = "vbus_typec";
regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200>;
- regulator-max-microvolt = <1200>;
+ vin-supply = <_sys>;
};
- vcc5v0_sys: vcc-sys {
+ vcc12v_dcin: dc-12v {
compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
+ regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- vin-supply = <_dcin>;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
};
- vcc_0v9: vcc-0v9 {
+ vcc3v3_lan: vcc3v3-lan-regulator {
compatible = "regulator-fixed";
- regulator-name = "vcc_0v9";
+ regulator-name = "vcc3v3_lan";
regulator
Re: [PATCH V2 7/9] gpio/rockchip: rk_gpio support v2 gpio controller
32(REG, MASK)WRITE_REG(REG, READ_REG(REG) & ~(MASK))
+#define SETBITS_LE32(REG, MASK)WRITE_REG(REG, READ_REG(REG) | (MASK))
+#define CLRSETBITS_LE32(REG, MASK, VAL)WRITE_REG(REG, \
+ (READ_REG(REG) & ~(MASK)) | (VAL))
+
+#else
+#define GPIO_VER 1
+#define READ_REG(REG) readl(REG)
+#define WRITE_REG(REG, VAL)writel(VAL, REG)
+#define CLRBITS_LE32(REG, MASK)clrbits_le32(REG, MASK)
+#define SETBITS_LE32(REG, MASK)setbits_le32(REG, MASK)
+#define CLRSETBITS_LE32(REG, MASK, VAL)clrsetbits_le32(REG, MASK, VAL)
+#endif
+
struct rockchip_gpio_priv {
struct rockchip_gpio_regs *regs;
struct udevice *pinctrl;
@@ -35,7 +68,7 @@ static int rockchip_gpio_direction_input(struct udevice *dev,
unsigned offset)
struct rockchip_gpio_priv *priv = dev_get_priv(dev);
struct rockchip_gpio_regs *regs = priv->regs;
- clrbits_le32(>swport_ddr, OFFSET_TO_BIT(offset));
+ CLRBITS_LE32(>swport_ddr, OFFSET_TO_BIT(offset));
return 0;
}
@@ -47,8 +80,8 @@ static int rockchip_gpio_direction_output(struct udevice
*dev, unsigned offset,
struct rockchip_gpio_regs *regs = priv->regs;
int mask = OFFSET_TO_BIT(offset);
- clrsetbits_le32(>swport_dr, mask, value ? mask : 0);
- setbits_le32(>swport_ddr, mask);
+ CLRSETBITS_LE32(>swport_dr, mask, value ? mask : 0);
+ SETBITS_LE32(>swport_ddr, mask);
return 0;
}
@@ -68,7 +101,7 @@ static int rockchip_gpio_set_value(struct udevice *dev,
unsigned offset,
struct rockchip_gpio_regs *regs = priv->regs;
int mask = OFFSET_TO_BIT(offset);
- clrsetbits_le32(>swport_dr, mask, value ? mask : 0);
+ CLRSETBITS_LE32(>swport_dr, mask, value ? mask : 0);
return 0;
}
@@ -86,14 +119,14 @@ static int rockchip_gpio_get_function(struct udevice *dev,
unsigned offset)
ret = pinctrl_get_gpio_mux(priv->pinctrl, priv->bank, offset);
if (ret)
return ret;
- is_output = readl(>swport_ddr) & OFFSET_TO_BIT(offset);
+ is_output = READ_REG(>swport_ddr) & OFFSET_TO_BIT(offset);
return is_output ? GPIOF_OUTPUT : GPIOF_INPUT;
#endif
}
/* Simple SPL interface to GPIOs */
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && (GPIO_VER == 1)
enum {
PULL_NONE_1V8 = 0,
@@ -143,7 +176,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct rockchip_gpio_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args args;
- char *end;
+ char *end = NULL;
int ret;
priv->regs = dev_read_addr_ptr(dev);
diff --git a/drivers/pinctrl/rockchip/Makefile
b/drivers/pinctrl/rockchip/Makefile
index 9884355473..90461ae881 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -14,5 +14,6 @@ obj-$(CONFIG_ROCKCHIP_RK3308) += pinctrl-rk3308.o
obj-$(CONFIG_ROCKCHIP_RK3328) += pinctrl-rk3328.o
obj-$(CONFIG_ROCKCHIP_RK3368) += pinctrl-rk3368.o
obj-$(CONFIG_ROCKCHIP_RK3399) += pinctrl-rk3399.o
+obj-$(CONFIG_ROCKCHIP_RK3568) += pinctrl-rk3568.o
obj-$(CONFIG_ROCKCHIP_RV1108) += pinctrl-rv1108.o
obj-$(CONFIG_ROCKCHIP_RV1126) += pinctrl-rv1126.o
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
new file mode 100644
index 00..dce1c1e7ee
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
@@ -0,0 +1,453 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
--
FUKAUMI Naoki
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
+ /* CAN0 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO0, RK_PB3, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(0, 0, 0)),
+ /* CAN0 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO2, RK_PA1, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(0, 0, 1)),
+ /* CAN1 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 0)),
+ /* CAN1 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO4, RK_PC3, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 1)),
+ /* CAN2 IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO4, RK_PB5, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(4, 4, 0)),
+ /* CAN2 IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO2, RK_PB2, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(4, 4, 1)),
+ /* EDPDP_HPDIN IO mux selection M0 */
+ MR_TOPGRF(RK_GPIO4, RK_PC4, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(6, 6, 0)),
+ /* EDPDP_HPDIN IO mux selection M1 */
+ MR_TOPGRF(RK_GPIO0, RK_PC2, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(6, 6, 1)),
+ /* GMAC1 IO mux selection M0 */
+ MR_TOPGRF(RK_G
Re: [PATCH 1/1] rockchip: rk3568: Add Radxa Rock Pi 3A board support
sorry, few more corrections...
On 2/7/23 10:07, FUKAUMI Naoki wrote:
hi
thank you very much for your work!
On 2/7/23 02:56, Akash Gajjar wrote:
Add Radxa Rock Pi 3A support.
"ROCK 3 Model A" or "ROCK 3A". uppercase "ROCK", no "Pi" please.
> sync rk3568-rock-3a.dts from Linux 6.2.0-rc7
it seems several parts of dts are omitted. why?
Board Specification
- Rockchip RK3568
- 2/4/8 GB Dual-Channel LPDDR4
no "Dual-Channel"
- eMMC socket,SD card slot
- GbE LAN
- PCIe 3.0/2.0
- M.2 Connector
- HDMI In/Out, DP, MIPI DSI/CSI
no "HDMI In".
no "DP"
--
FUKAUMI Naoki
- USB 3.0, 2.0
- 40-pin GPIO expansion ports
- DC 12V/2A
Type-C PD 2.0 or QC 3.0/2.0, 9V/2A - 20V/2A.
Signed-off-by: Akash Gajjar
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 24 +++
arch/arm/dts/rk3568-rock-3a.dts | 214
configs/rock-pi-3a-rk3568_defconfig | 69
4 files changed, 309 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3568-rock-3a.dts
create mode 100644 configs/rock-pi-3a-rk3568_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d9b719f85d..7c28418c82 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -165,7 +165,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ROCKCHIP_RK3568) += \
- rk3568-evb.dtb
+ rk3568-evb.dtb \
+ rk3568-rock-3a.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
new file mode 100644
index 00..42c5b6a6c5
--- /dev/null
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ * (c) Copyright 2023 Akash Gajjar
+ */
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path =
+ u-boot,spl-boot-order = "same-as-spl",
+ };
+};
+
+ {
+ status = "okay";
+};
redundant?
Best regards,
--
FUKAUMI Naoki
+ {
+ clock-frequency = <2400>;
+ u-boot,dm-spl;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3568-rock-3a.dts
b/arch/arm/dts/rk3568-rock-3a.dts
new file mode 100644
index 00..0ff511d6a2
--- /dev/null
+++ b/arch/arm/dts/rk3568-rock-3a.dts
@@ -0,0 +1,214 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2023 Akash Gajjar
+ */
+
+/dts-v1/;
+#include
+#include
+#include "rk3568.dtsi"
+
+/ {
+ model = "Radxa ROCK3 Model A";
+ compatible = "radxa,rock3a", "rockchip,rk3568";
+
+ chosen: chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ gmac1_clkin: external-gmac1-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "gmac1_clkin";
+ #clock-cells = <0>;
+ };
+
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_dcin>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
+ };
+
+ vcc5v0_usb: vcc5v0-usb-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
+ };
+
+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = < RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ regulator-name = "vcc5v0_usb_host";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+
Re: [PATCH 1/1] rockchip: rk3568: Add Radxa Rock Pi 3A board support
hi
thank you very much for your work!
On 2/7/23 02:56, Akash Gajjar wrote:
Add Radxa Rock Pi 3A support.
"ROCK 3 Model A" or "ROCK 3A". uppercase "ROCK", no "Pi" please.
> sync rk3568-rock-3a.dts from Linux 6.2.0-rc7
it seems several parts of dts are omitted. why?
Board Specification
- Rockchip RK3568
- 2/4/8 GB Dual-Channel LPDDR4
- eMMC socket,SD card slot
- GbE LAN
- PCIe 3.0/2.0
- M.2 Connector
- HDMI In/Out, DP, MIPI DSI/CSI
no "HDMI In".
- USB 3.0, 2.0
- 40-pin GPIO expansion ports
- DC 12V/2A
Type-C PD 2.0 or QC 3.0/2.0, 9V/2A - 20V/2A.
Signed-off-by: Akash Gajjar
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 24 +++
arch/arm/dts/rk3568-rock-3a.dts | 214
configs/rock-pi-3a-rk3568_defconfig | 69
4 files changed, 309 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3568-rock-3a.dts
create mode 100644 configs/rock-pi-3a-rk3568_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d9b719f85d..7c28418c82 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -165,7 +165,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ROCKCHIP_RK3568) += \
- rk3568-evb.dtb
+ rk3568-evb.dtb \
+ rk3568-rock-3a.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
new file mode 100644
index 00..42c5b6a6c5
--- /dev/null
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ * (c) Copyright 2023 Akash Gajjar
+ */
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path =
+ u-boot,spl-boot-order = "same-as-spl",
+ };
+};
+
+ {
+ status = "okay";
+};
redundant?
Best regards,
--
FUKAUMI Naoki
+ {
+ clock-frequency = <2400>;
+ u-boot,dm-spl;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3568-rock-3a.dts b/arch/arm/dts/rk3568-rock-3a.dts
new file mode 100644
index 00..0ff511d6a2
--- /dev/null
+++ b/arch/arm/dts/rk3568-rock-3a.dts
@@ -0,0 +1,214 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2023 Akash Gajjar
+ */
+
+/dts-v1/;
+#include
+#include
+#include "rk3568.dtsi"
+
+/ {
+ model = "Radxa ROCK3 Model A";
+ compatible = "radxa,rock3a", "rockchip,rk3568";
+
+ chosen: chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ gmac1_clkin: external-gmac1-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "gmac1_clkin";
+ #clock-cells = <0>;
+ };
+
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_dcin>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
+ };
+
+ vcc5v0_usb: vcc5v0-usb-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
+ };
+
+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = < RK_PA6 GPIO_ACTIVE_HIGH>;
+
[PATCH] arm: dts: rockchip: add support for ROCK 4C+
this patch add support for Radxa ROCK 4C Plus.
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi | 6 +
arch/arm/dts/rk3399-rock-4c-plus.dts | 703 +++
arch/arm/dts/rk3399-t-opp.dtsi | 114 +++
configs/rock-4c-plus-rk3399_defconfig| 90 +++
5 files changed, 914 insertions(+)
create mode 100644 arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-4c-plus.dts
create mode 100644 arch/arm/dts/rk3399-t-opp.dtsi
create mode 100644 configs/rock-4c-plus-rk3399_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 965895bc2a..74904599d7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -156,6 +156,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
+ rk3399-rock-4c-plus.dtb \
rk3399-rock-pi-4a.dtb \
rk3399-rock-pi-4b.dtb \
rk3399-rock-pi-4c.dtb \
diff --git a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
new file mode 100644
index 00..b7dcd2e05d
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Radxa Limited
+ */
+
+#include "rk3399-rock-pi-4-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3399-rock-4c-plus.dts
b/arch/arm/dts/rk3399-rock-4c-plus.dts
new file mode 100644
index 00..f9884902f8
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus.dts
@@ -0,0 +1,703 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2022 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include
+#include "rk3399.dtsi"
+#include "rk3399-t-opp.dtsi"
+
+/ {
+ model = "Radxa ROCK 4C+";
+ compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
+
+ aliases {
+ mmc0 =
+ mmc1 =
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_led1 _led2>;
+
+ /* USER_LED1 */
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = ;
+ gpios = < RK_PD4 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "default-on";
+ };
+
+ /* USER_LED2 */
+ led-1 {
+ function = LED_FUNCTION_STATUS;
+ color = ;
+ gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <_enable_h>;
+ reset-gpios = < RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc_3v3: vcc-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_sys>;
+ };
+
+ vcc3v3_phy1: vcc3v3-phy1-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_phy1";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_3v3>;
+ };
+
+ vcc5v0_host1: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = < RK_PD6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_en>;
+ regulator-name = "vcc5v0_host1";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <_host0_s0
[PATCH] arm: dts: rockchip: enable ums/rockusb command for ROCK Pi 4
this patch add USB mass storage function and Rockusb function for Radxa ROCK Pi 4 series. Signed-off-by: FUKAUMI Naoki --- configs/rock-pi-4-rk3399_defconfig | 3 +++ configs/rock-pi-4c-rk3399_defconfig | 3 +++ 2 files changed, 6 insertions(+) diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index a13ac12d8c..c4f5a71f89 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -34,6 +34,8 @@ CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y @@ -78,6 +80,7 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index be9ac7aab9..04bff81022 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -34,6 +34,8 @@ CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y @@ -78,6 +80,7 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y -- 2.35.1
[PATCH] arm: dts: rockchip: rk356x: sync with Linux 6.0
prepare for rk3566 based board
Signed-off-by: FUKAUMI Naoki
---
arch/arm/dts/rk3566.dtsi | 35 +
arch/arm/dts/rk3568-evb-u-boot.dtsi |2 +-
arch/arm/dts/rk3568-pinctrl.dtsi |9 +
arch/arm/dts/rk3568.dtsi | 848 +---
...{rk3568-u-boot.dtsi => rk356x-u-boot.dtsi} |7 +-
arch/arm/dts/rk356x.dtsi | 1706 +
include/dt-bindings/power/rk3568-power.h | 32 +
7 files changed, 1891 insertions(+), 748 deletions(-)
create mode 100644 arch/arm/dts/rk3566.dtsi
rename arch/arm/dts/{rk3568-u-boot.dtsi => rk356x-u-boot.dtsi} (94%)
create mode 100644 arch/arm/dts/rk356x.dtsi
create mode 100644 include/dt-bindings/power/rk3568-power.h
diff --git a/arch/arm/dts/rk3566.dtsi b/arch/arm/dts/rk3566.dtsi
new file mode 100644
index 00..6c4b17d27b
--- /dev/null
+++ b/arch/arm/dts/rk3566.dtsi
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x.dtsi"
+
+/ {
+ compatible = "rockchip,rk3566";
+};
+
+ {
+ compatible = "rockchip,rk3566-pipe-grf", "syscon";
+};
+
+ {
+ power-domain@RK3568_PD_PIPE {
+ reg = ;
+ clocks = < PCLK_PIPE>;
+ pm_qos = <_pcie2x1>,
+<_sata1>,
+<_sata2>,
+<_usb3_0>,
+<_usb3_1>;
+ #power-domain-cells = <0>;
+ };
+};
+
+_host0_xhci {
+ phys = <_otg>;
+ phy-names = "usb2-phy";
+ extcon = <>;
+ maximum-speed = "high-speed";
+};
+
+ {
+ compatible = "rockchip,rk3566-vop";
+};
diff --git a/arch/arm/dts/rk3568-evb-u-boot.dtsi
b/arch/arm/dts/rk3568-evb-u-boot.dtsi
index b03cbeaedf..17503d3d27 100644
--- a/arch/arm/dts/rk3568-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-evb-u-boot.dtsi
@@ -3,7 +3,7 @@
* (C) Copyright 2021 Rockchip Electronics Co., Ltd
*/
-#include "rk3568-u-boot.dtsi"
+#include "rk356x-u-boot.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi
index a588ca95ac..8f90c66dd9 100644
--- a/arch/arm/dts/rk3568-pinctrl.dtsi
+++ b/arch/arm/dts/rk3568-pinctrl.dtsi
@@ -3108,4 +3108,13 @@
<4 RK_PA0 3 _pull_none_drv_level_2>;
};
};
+
+ tsadc {
+ /omit-if-no-ref/
+ tsadc_pin: tsadc-pin {
+ rockchip,pins =
+ /* tsadc_pin */
+ <0 RK_PA1 0 _pull_none>;
+ };
+ };
};
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index 12a071e679..2bdf8c7e97 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -3,777 +3,141 @@
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*/
-#include
-#include
-#include
-#include
-#include
-#include
-#include
+#include "rk356x.dtsi"
/ {
compatible = "rockchip,rk3568";
- interrupt-parent = <>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- gpio0 =
- gpio1 =
- gpio2 =
- gpio3 =
- gpio4 =
- i2c0 =
- i2c1 =
- i2c2 =
- i2c3 =
- i2c4 =
- i2c5 =
- serial0 =
- serial1 =
- serial2 =
- serial3 =
- serial4 =
- serial5 =
- serial6 =
- serial7 =
- serial8 =
- serial9 =
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x0>;
- clocks = <_clk 0>;
- enable-method = "psci";
- operating-points-v2 = <_opp_table>;
- };
-
- cpu1: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x100>;
- enable-method = "psci";
- operating-points-v2 = <_opp_table>;
- };
-
- cpu2: cpu@200 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x200>;
- enable-method = "psci";
-
[PATCH] rockchip: enable fdt overlays for ROCK Pi 4 series
add CONFIG_OF_LIBFDT_OVERLAY=y to support fdt overlays. Signed-off-by: FUKAUMI Naoki --- configs/rock-pi-4-rk3399_defconfig | 1 + configs/rock-pi-4c-rk3399_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index f8a57f6838..a13ac12d8c 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -84,3 +84,4 @@ CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index 9aa7809bd0..be9ac7aab9 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -84,3 +84,4 @@ CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y +CONFIG_OF_LIBFDT_OVERLAY=y -- 2.30.2
[U-Boot] [PATCH] sunxi: add support for Nintendo NES Classic Edition
Signed-off-by: FUKAUMI Naoki <nao...@gmail.com>
---
arch/arm/dts/Makefile | 1 +
.../dts/sun8i-r16-nintendo-nes-classic-edition.dts | 63 ++
board/sunxi/MAINTAINERS| 5 ++
configs/Nintendo_NES_Classic_Edition_defconfig | 24 +
4 files changed, 93 insertions(+)
create mode 100644 arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts
create mode 100644 configs/Nintendo_NES_Classic_Edition_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 932dbe0..660f175 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -255,6 +255,7 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \
sun8i-a33-olinuxino.dtb \
sun8i-a33-q8-tablet.dtb \
sun8i-a33-sinlinx-sina33.dtb \
+ sun8i-r16-nintendo-nes-classic-edition.dtb \
sun8i-r16-parrot.dtb
dtb-$(CONFIG_MACH_SUN8I_A83T) += \
sun8i-a83t-allwinner-h8homlet-v2.dtb \
diff --git a/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts
b/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts
new file mode 100644
index 000..dce688e
--- /dev/null
+++ b/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2016 FUKAUMI Naoki <nao...@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a33.dtsi"
+
+/ {
+ model = "Nintendo NES Classic Edition";
+ compatible = "nintendo,nes-classic-edition", "allwinner,sun8i-a33";
+
+ aliases {
+ serial0 =
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_a>;
+ status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index d7dc55b..e23d45e 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -232,6 +232,11 @@ M: Jelle van der Waa <je...@vdwaa.nl>
S: Maintained
F: configs/nanopi_neo_defconfig
+NINTENDO NES CLASSIC EDITION BOARD
+M: FUKAUMI Naoki <nao...@gmail.com>
+S: Maintained
+F: configs/Nintendo_NES_Classic_Edition_defconfig
+
R16 EVB PARROT BOARD
M: Quentin Schulz <quentin.sch...@free-electrons.com>
S: Maintained
diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig
b/configs/Nintendo_NES_Classic_Edition_defconfig
new file mode 100644
index 000..fcda1be
--- /dev/null
+++ b/configs/Nintendo_NES_Classic_Edition_defconfig
@@ -0,0 +1,24 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_MACH_SUN8I_A33=y
+CONFIG_DRAM_CLK=600
+CONFIG_DRAM_ZQ=15291
+CONFIG_DRAM_ODT_EN=y
+# CONFIG_MMC is not set
+CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
+CONFIG_AXP_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not
[U-Boot] [PATCH] rockchip: make configure_emmc() empty for Firefly-RK3288
on v2016.03-rc3, size of SPL image compiled by gcc 5.3.0 is too large for
Firefly-RK3288. (it's fine for Rock2)
$ gcc --version
gcc (Ubuntu/Linaro 5.3.0-3ubuntu1~14.04) 5.3.0 20151204
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
$ ./tools/mkimage -n rk3288 -T rksd -d spl/u-boot-spl-dtb.bin u-boot-spl-dtb.img
Warning: SPL image is too large (size 0x80d0) and will not boot
to reduce size of SPL image, this patch makes configure_emmc() empty for
Firefly-RK3288 as same as Rock2.
Signed-off-by: FUKAUMI Naoki <nao...@gmail.com>
---
arch/arm/mach-rockchip/rk3288-board-spl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c
b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 6a54368..e133cca 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -114,7 +114,7 @@ static void configure_l2ctlr(void)
#ifdef CONFIG_SPL_MMC_SUPPORT
static int configure_emmc(struct udevice *pinctrl)
{
-#ifndef CONFIG_TARGET_ROCK2
+#if !defined(CONFIG_TARGET_ROCK2) && !defined(CONFIG_TARGET_FIREFLY_RK3288)
struct gpio_desc desc;
int ret;
--
2.7.2
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[U-Boot] [PATCH v2] sun7i: Add support for Olimex A20-OLinuXino-LIME
This patch adds support for Olimex A20-OLinuXino-LIME board.
Signed-off-by: FUKAUMI Naoki nao...@gmail.com
---
Changes in v2:
- update MAINTAINERS
- remove SPL from CONFIG_SYS_EXTRA_OPTIONS
- s/FTDFILE/FDTFILE/g
board/sunxi/MAINTAINERS | 6 ++
board/sunxi/Makefile | 1 +
board/sunxi/dram_a20_olinuxino_l.c | 31 +++
configs/A20-OLinuXino-Lime_defconfig | 5 +
4 files changed, 43 insertions(+)
create mode 100644 board/sunxi/dram_a20_olinuxino_l.c
create mode 100644 configs/A20-OLinuXino-Lime_defconfig
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index b0b1804..4f32195 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -32,3 +32,9 @@ F:configs/Cubieboard2_defconfig
F: configs/Cubieboard2_FEL_defconfig
F: configs/Cubietruck_defconfig
F: configs/Cubietruck_FEL_defconfig
+
+A20-OLINUXINO-LIME BOARD
+M: FUKAUMI Naoki nao...@gmail.com
+S: Maintained
+F: board/sunxi/dram_a20_olinuxino_l.c
+F: configs/A20-OLinuXino-Lime_defconfig
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index cf001e7..56073a0 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_A10_OLINUXINO_L) += dram_a10_olinuxino_l.o
obj-$(CONFIG_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o
obj-$(CONFIG_A13_OLINUXINO)+= dram_a13_olinuxino.o
obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o
+obj-$(CONFIG_A20_OLINUXINO_L) += dram_a20_olinuxino_l.o
obj-$(CONFIG_A20_OLINUXINO_M) += dram_sun7i_384_1024_iow16.o
# This is not a typo, uses the same mem settings as the a10s-olinuxino-m
obj-$(CONFIG_AUXTEK_T004) += dram_a10s_olinuxino_m.o
diff --git a/board/sunxi/dram_a20_olinuxino_l.c
b/board/sunxi/dram_a20_olinuxino_l.c
new file mode 100644
index 000..2c74999
--- /dev/null
+++ b/board/sunxi/dram_a20_olinuxino_l.c
@@ -0,0 +1,31 @@
+/* this file is generated, don't edit it yourself */
+
+#include common.h
+#include asm/arch/dram.h
+
+static struct dram_para dram_para = {
+ .clock = 480,
+ .type = 3,
+ .rank_num = 1,
+ .density = 4096,
+ .io_width = 16,
+ .bus_width = 16,
+ .cas = 9,
+ .zq = 0x7f,
+ .odt_en = 0,
+ .size = 512,
+ .tpr0 = 0x42d899b7,
+ .tpr1 = 0xa090,
+ .tpr2 = 0x22a00,
+ .tpr3 = 0,
+ .tpr4 = 0,
+ .tpr5 = 0,
+ .emr1 = 0x4,
+ .emr2 = 0x10,
+ .emr3 = 0,
+};
+
+unsigned long sunxi_dram_init(void)
+{
+ return dramc_init(dram_para);
+}
diff --git a/configs/A20-OLinuXino-Lime_defconfig
b/configs/A20-OLinuXino-Lime_defconfig
new file mode 100644
index 000..ca79fd5
--- /dev/null
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS=A20_OLINUXINO_L,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI
+CONFIG_FDTFILE=sun7i-a20-olinuxino-lime.dtb
++S:CONFIG_ARM=y
++S:CONFIG_TARGET_SUN7I=y
--
2.0.4
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[U-Boot] [PATCH] sun7i: Add support for Olimex A20-OLinuXino-LIME
This patch adds support for Olimex A20-OLinuXino-LIME board.
Signed-off-by: FUKAUMI Naoki nao...@gmail.com
---
board/sunxi/Makefile | 1 +
board/sunxi/dram_a20_olinuxino_l.c | 31 +++
configs/A20-OLinuXino-Lime_defconfig | 5 +
3 files changed, 37 insertions(+)
create mode 100644 board/sunxi/dram_a20_olinuxino_l.c
create mode 100644 configs/A20-OLinuXino-Lime_defconfig
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index cf001e7..56073a0 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_A10_OLINUXINO_L) += dram_a10_olinuxino_l.o
obj-$(CONFIG_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o
obj-$(CONFIG_A13_OLINUXINO)+= dram_a13_olinuxino.o
obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o
+obj-$(CONFIG_A20_OLINUXINO_L) += dram_a20_olinuxino_l.o
obj-$(CONFIG_A20_OLINUXINO_M) += dram_sun7i_384_1024_iow16.o
# This is not a typo, uses the same mem settings as the a10s-olinuxino-m
obj-$(CONFIG_AUXTEK_T004) += dram_a10s_olinuxino_m.o
diff --git a/board/sunxi/dram_a20_olinuxino_l.c
b/board/sunxi/dram_a20_olinuxino_l.c
new file mode 100644
index 000..2c74999
--- /dev/null
+++ b/board/sunxi/dram_a20_olinuxino_l.c
@@ -0,0 +1,31 @@
+/* this file is generated, don't edit it yourself */
+
+#include common.h
+#include asm/arch/dram.h
+
+static struct dram_para dram_para = {
+ .clock = 480,
+ .type = 3,
+ .rank_num = 1,
+ .density = 4096,
+ .io_width = 16,
+ .bus_width = 16,
+ .cas = 9,
+ .zq = 0x7f,
+ .odt_en = 0,
+ .size = 512,
+ .tpr0 = 0x42d899b7,
+ .tpr1 = 0xa090,
+ .tpr2 = 0x22a00,
+ .tpr3 = 0,
+ .tpr4 = 0,
+ .tpr5 = 0,
+ .emr1 = 0x4,
+ .emr2 = 0x10,
+ .emr3 = 0,
+};
+
+unsigned long sunxi_dram_init(void)
+{
+ return dramc_init(dram_para);
+}
diff --git a/configs/A20-OLinuXino-Lime_defconfig
b/configs/A20-OLinuXino-Lime_defconfig
new file mode 100644
index 000..b06377a
--- /dev/null
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS=A20_OLINUXINO_L,SPL,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI
+CONFIG_FTDFILE=sun7i-a20-olinuxino-lime.dtb
++S:CONFIG_ARM=y
++S:CONFIG_TARGET_SUN7I=y
--
2.0.4
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