[PATCH 5/8] net: fsl-mc: sync DPNI MC APIs
Sync the Data Path Network Interface APIs to their latest form, this
means the layout of each command is created based on structures which
clearly describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/dpni.c | 582 +++
drivers/net/fsl-mc/mc.c | 14 +-
drivers/net/ldpaa_eth/ldpaa_eth.c | 22 +-
include/fsl-mc/fsl_dpni.h | 1101 ++---
4 files changed, 990 insertions(+), 729 deletions(-)
diff --git a/drivers/net/fsl-mc/dpni.c b/drivers/net/fsl-mc/dpni.c
index d0596a8e38d9..5b815a45a99d 100644
--- a/drivers/net/fsl-mc/dpni.c
+++ b/drivers/net/fsl-mc/dpni.c
@@ -1,36 +1,43 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2013-2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017, 2023 NXP
*/
#include
#include
#include
-int dpni_prepare_cfg(const struct dpni_cfg *cfg,
-uint8_t*cfg_buf)
-{
- uint64_t *params = (uint64_t *)cfg_buf;
-
- DPNI_PREP_CFG(params, cfg);
-
- return 0;
-}
-
-int dpni_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpni_id,
- uint16_t *token)
+/**
+ * dpni_open() - Open a control session for the specified object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpni_id: DPNI unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpni_create() function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_open(struct fsl_mc_io *mc_io, u32 cmd_flags, int dpni_id, u16 *token)
{
+ struct dpni_cmd_open *cmd_params;
struct mc_command cmd = { 0 };
+
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_OPEN,
cmd_flags,
0);
- DPNI_CMD_OPEN(cmd, dpni_id);
+ cmd_params = (struct dpni_cmd_open *)cmd.params;
+ cmd_params->dpni_id = cpu_to_le32(dpni_id);
/* send command to mc*/
err = mc_send_command(mc_io, );
@@ -38,14 +45,23 @@ int dpni_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token();
return 0;
}
-int dpni_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
+/**
+ * dpni_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_close(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token)
{
struct mc_command cmd = { 0 };
@@ -58,12 +74,32 @@ int dpni_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, );
}
-int dpni_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpni_cfg *cfg,
- uint32_t *obj_id)
+/**
+ * dpni_create() - Create the DPNI object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token:Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id:Returned object id
+ *
+ * Create the DPNI object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags,
+ const struct dpni_cfg *cfg, u32 *obj_id)
{
+ struct dpni_cmd_create *cmd_params;
struct mc_command cmd =
[PATCH 8/8] net: fsl-mc: sync remaining MC commands
This patch targets the last remaining commands left to sync to their
latest form - mainly the mc_get_version() API.
Besides this, remove any macro which is now of no help.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/dpmng.c | 20
drivers/net/fsl-mc/fsl_dpmng_cmd.h | 17 +
drivers/net/fsl-mc/mc_sys.c| 13 +
include/fsl-mc/fsl_dpmng.h | 13 +
include/fsl-mc/fsl_mc_cmd.h| 23 ---
5 files changed, 35 insertions(+), 51 deletions(-)
diff --git a/drivers/net/fsl-mc/dpmng.c b/drivers/net/fsl-mc/dpmng.c
index 8314243f3561..147ca6da9e1f 100644
--- a/drivers/net/fsl-mc/dpmng.c
+++ b/drivers/net/fsl-mc/dpmng.c
@@ -1,15 +1,24 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ * Copyright 2023 NXP
*/
#include
#include
#include
#include "fsl_dpmng_cmd.h"
-int mc_get_version(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- struct mc_version *mc_ver_info)
+/**
+ * mc_get_version() - Retrieves the Management Complex firmware
+ * version information
+ * @mc_io: Pointer to opaque I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @mc_ver_info: Returned version information structure
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int mc_get_version(struct fsl_mc_io *mc_io, uint32_t cmd_flags, struct
mc_version *mc_ver_info)
{
+ struct dpmng_rsp_get_version *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -24,7 +33,10 @@ int mc_get_version(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPMNG_RSP_GET_VERSION(cmd, mc_ver_info);
+ rsp_params = (struct dpmng_rsp_get_version *)cmd.params;
+ mc_ver_info->revision = le32_to_cpu(rsp_params->revision);
+ mc_ver_info->major = le32_to_cpu(rsp_params->version_major);
+ mc_ver_info->minor = le32_to_cpu(rsp_params->version_minor);
return 0;
}
diff --git a/drivers/net/fsl-mc/fsl_dpmng_cmd.h
b/drivers/net/fsl-mc/fsl_dpmng_cmd.h
index e18c88da0972..e6efceab7acc 100644
--- a/drivers/net/fsl-mc/fsl_dpmng_cmd.h
+++ b/drivers/net/fsl-mc/fsl_dpmng_cmd.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright 2013-2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017, 2023 NXP
*/
#ifndef __FSL_DPMNG_CMD_H
#define __FSL_DPMNG_CMD_H
@@ -8,12 +8,13 @@
/* Command IDs */
#define DPMNG_CMDID_GET_VERSION0x8311
-/*cmd, param, offset, width, type, arg_name */
-#define DPMNG_RSP_GET_VERSION(cmd, mc_ver_info) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mc_ver_info->revision); \
- MC_RSP_OP(cmd, 0, 32, 32, uint32_t, mc_ver_info->major); \
- MC_RSP_OP(cmd, 1, 0, 32, uint32_t, mc_ver_info->minor); \
-} while (0)
+#pragma pack(push, 1)
+struct dpmng_rsp_get_version {
+ __le32 revision;
+ __le32 version_major;
+ __le32 version_minor;
+};
+
+#pragma pack(pop)
#endif /* __FSL_DPMNG_CMD_H */
diff --git a/drivers/net/fsl-mc/mc_sys.c b/drivers/net/fsl-mc/mc_sys.c
index b5ae2ea3eb56..4d32516b0055 100644
--- a/drivers/net/fsl-mc/mc_sys.c
+++ b/drivers/net/fsl-mc/mc_sys.c
@@ -13,8 +13,13 @@
#include
#include
-#define MC_CMD_HDR_READ_CMDID(_hdr) \
- ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S))
+static u16 mc_cmd_hdr_read_cmdid(struct mc_command *cmd)
+{
+ struct mc_cmd_header *hdr = (struct mc_cmd_header *)>header;
+ u16 cmd_id = le16_to_cpu(hdr->cmd_id);
+
+ return cmd_id;
+}
/**
* mc_send_command - Send MC command and wait for response
@@ -52,8 +57,8 @@ int mc_send_command(struct fsl_mc_io *mc_io,
if (status != MC_CMD_STATUS_OK) {
printf("Error: MC command failed (portal: %p, obj handle: %#x,
command: %#x, status: %#x)\n",
mc_io->mmio_regs,
- (unsigned int)MC_CMD_HDR_READ_TOKEN(cmd->header),
- (unsigned int)MC_CMD_HDR_READ_CMDID(cmd->header),
+ (unsigned int)mc_cmd_hdr_read_token(cmd),
+ (unsigned int)mc_cmd_hdr_read_cmdid(cmd),
(unsigned int)status);
return -EIO;
diff --git a/include/fsl-mc/fsl_dpmng.h b/include/fsl-mc/fsl_dpmng.h
index 2148601e8a12..5dfc9ecc4281 100644
--- a/include/fsl-mc/fsl_dpmng.h
+++ b/include/fsl-mc/fsl_dpmng.h
@@ -30,17 +30,6 @@ struct mc_version {
uint32_t revision;
};
-/**
- * mc_get_version() - Retrieves the Management Complex firmware
- * version information
- * @mc_io: Pointer to opaque I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @mc_ver_info: Returned version inform
[PATCH 7/8] net: fsl-mc: sync DPIO MC APIs
Sync the Data Path IO APIs to their latest form, this means the layout
of each command is created based on structures which clearly describe
the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/dpio/dpio.c | 179 +--
include/fsl-mc/fsl_dpio.h | 251 +++--
2 files changed, 220 insertions(+), 210 deletions(-)
diff --git a/drivers/net/fsl-mc/dpio/dpio.c b/drivers/net/fsl-mc/dpio/dpio.c
index 30ecc9124b27..d17210bf451a 100644
--- a/drivers/net/fsl-mc/dpio/dpio.c
+++ b/drivers/net/fsl-mc/dpio/dpio.c
@@ -1,18 +1,34 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2013-2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017, 2023 NXP
*/
#include
#include
#include
-int dpio_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint32_t dpio_id,
- uint16_t *token)
+/**
+ * dpio_open() - Open a control session for the specified object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpio_id: DPIO unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpio_create() function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and any MC portals
+ * assigned to the parent container; this token must be used in
+ * all subsequent commands for this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpio_open(struct fsl_mc_io *mc_io, u32 cmd_flags, int dpio_id,
+ u16 *token)
{
+ struct dpio_cmd_open *cmd_params;
struct mc_command cmd = { 0 };
int err;
@@ -20,7 +36,8 @@ int dpio_open(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPIO_CMDID_OPEN,
cmd_flags,
0);
- DPIO_CMD_OPEN(cmd, dpio_id);
+ cmd_params = (struct dpio_cmd_open *)cmd.params;
+ cmd_params->dpio_id = cpu_to_le32(dpio_id);
/* send command to mc*/
err = mc_send_command(mc_io, );
@@ -28,14 +45,20 @@ int dpio_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token();
return 0;
}
-int dpio_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
+/**
+ * dpio_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpio_close(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token)
{
struct mc_command cmd = { 0 };
@@ -48,12 +71,32 @@ int dpio_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, );
}
-int dpio_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpio_cfg *cfg,
- uint32_t *obj_id)
+/**
+ * dpio_create() - Create the DPIO object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token:Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id:Returned object id
+ *
+ * Create the DPIO object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpio_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags,
+ const struct dpio_cfg *cfg, u32 *obj_id)
{
+ struct dpio_cmd_create *cmd_params;
struct mc_command cmd = { 0 };
int err;
@@ -61,7 +104,11 @@ int dpio_create(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPIO_CMDID_CREATE,
cmd_flags,
dprc_token);
- DPIO_CMD_CREATE(cmd, cfg);
+ cmd_params = (struct dpio_cmd_create *)cmd.params;
+ cmd_par
[PATCH 6/8] net: fsl-mc: sync DPSPARSER MC APIs
Sync the Data Path Soft Parser APIs to their latest form, this
means the layout of each command is created based on structures which
clearly describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/dpsparser.c | 124 ++---
include/fsl-mc/fsl_dpsparser.h | 139 -
2 files changed, 126 insertions(+), 137 deletions(-)
diff --git a/drivers/net/fsl-mc/dpsparser.c b/drivers/net/fsl-mc/dpsparser.c
index cfd1ba66a058..09dfb8f1fc02 100644
--- a/drivers/net/fsl-mc/dpsparser.c
+++ b/drivers/net/fsl-mc/dpsparser.c
@@ -2,15 +2,29 @@
/*
* Data Path Soft Parser
*
- * Copyright 2018 NXP
+ * Copyright 2018, 2023 NXP
*/
#include
#include
#include
-int dpsparser_open(struct fsl_mc_io *mc_io,
- u32 cmd_flags,
- u16 *token)
+/**
+ * dpsparser_open() - Open a control session for the specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpsparser_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpsparser_open(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 *token)
{
struct mc_command cmd = { 0 };
int err;
@@ -26,14 +40,23 @@ int dpsparser_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token();
return err;
}
-int dpsparser_close(struct fsl_mc_io *mc_io,
- u32 cmd_flags,
- u16 token)
+/**
+ * dpsparser_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSPARSER object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpsparser_close(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token)
{
struct mc_command cmd = { 0 };
@@ -45,9 +68,27 @@ int dpsparser_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, );
}
-int dpsparser_create(struct fsl_mc_io *mc_io,
-u16 token,
-u32 cmd_flags,
+/**
+ * dpsparser_create() - Create the DPSPARSER object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Returned token; use in subsequent API calls
+ *
+ * Create the DPSPARSER object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent calls to
+ * this specific object. For objects that are created using the
+ * DPL file, call dpsparser_open function to get an authentication
+ * token first.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpsparser_create(struct fsl_mc_io *mc_io, u16 token, u32 cmd_flags,
u32 *obj_id)
{
struct mc_command cmd = { 0 };
@@ -64,36 +105,51 @@ int dpsparser_create(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- MC_CMD_READ_OBJ_ID(cmd, *obj_id);
+ *obj_id = mc_cmd_read_object_id();
return 0;
}
-int dpsparser_destroy(struct fsl_mc_io *mc_io,
- u16 token,
- u32 cmd_flags,
+/**
+ * dpsparser_destroy() - Destroy the DPSPARSER object and release all its
resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSPARSER object
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
+int dpsparser_destroy(struct fsl_mc_io *mc_io, u16 token, u32 cmd_flags,
u32 obj_id)
{
+ struct dpsparser_cmd_destroy *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPSPARSER_CMDID_DESTROY,
cmd_flags
[PATCH 3/8] net: fsl-mc: sync DPMAC MC APIs
Sync the Data Path MAC APIs to their latest form, this means the
layout of each command is created based on structures which clearly
describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/dpmac.c | 185
include/fsl-mc/fsl_dpmac.h | 240 +
2 files changed, 215 insertions(+), 210 deletions(-)
diff --git a/drivers/net/fsl-mc/dpmac.c b/drivers/net/fsl-mc/dpmac.c
index f6def987c10b..5d4f6c67fd0b 100644
--- a/drivers/net/fsl-mc/dpmac.c
+++ b/drivers/net/fsl-mc/dpmac.c
@@ -11,19 +11,33 @@
#include
#include
-int dpmac_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpmac_id,
- uint16_t *token)
+/**
+ * dpmac_open() - Open a control session for the specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpmac_id: DPMAC unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpmac_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmac_open(struct fsl_mc_io *mc_io, u32 cmd_flags, int dpmac_id, u16
*token)
{
+ struct dpmac_cmd_open *cmd_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPMAC_CMDID_OPEN,
- cmd_flags,
- 0);
- DPMAC_CMD_OPEN(cmd, dpmac_id);
+ cmd.header = mc_encode_cmd_header(DPMAC_CMDID_OPEN, cmd_flags, 0);
+ cmd_params = (struct dpmac_cmd_open *)cmd.params;
+ cmd_params->dpmac_id = cpu_to_le32(dpmac_id);
/* send command to mc*/
err = mc_send_command(mc_io, );
@@ -31,39 +45,63 @@ int dpmac_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token();
return err;
}
-int dpmac_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
+/**
+ * dpmac_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPMAC object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmac_close(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token)
{
struct mc_command cmd = { 0 };
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPMAC_CMDID_CLOSE, cmd_flags,
- token);
+ cmd.header = mc_encode_cmd_header(DPMAC_CMDID_CLOSE, cmd_flags, token);
/* send command to mc*/
return mc_send_command(mc_io, );
}
-int dpmac_create(struct fsl_mc_io *mc_io,
-uint16_t dprc_token,
-uint32_t cmd_flags,
-const struct dpmac_cfg *cfg,
-uint32_t *obj_id)
+/**
+ * dpmac_create() - Create the DPMAC object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id:Returned object id
+ *
+ * Create the DPMAC object, allocate required resources and
+ * perform required initialization.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmac_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags,
+const struct dpmac_cfg *cfg, u32 *obj_id)
{
+ struct dpmac_cmd_create *cmd_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPMAC_CMDID_CREATE,
- cmd_flags,
- dprc_token);
- DPMAC_CMD_CREATE(cmd, cfg);
+ cmd.hea
[PATCH 4/8] net: fsl-mc: sync DPRC MC APIs
Sync the Data Resource Container APIs to their latest form, this means
the layout of each command is created based on structures which clearly
describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/dprc.c | 232 -
include/fsl-mc/fsl_dprc.h | 424 +-
2 files changed, 280 insertions(+), 376 deletions(-)
diff --git a/drivers/net/fsl-mc/dprc.c b/drivers/net/fsl-mc/dprc.c
index 2be56e24a186..d1a74ab47a98 100644
--- a/drivers/net/fsl-mc/dprc.c
+++ b/drivers/net/fsl-mc/dprc.c
@@ -3,16 +3,22 @@
* Freescale Layerscape MC I/O wrapper
*
* Copyright 2013-2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017, 2023 NXP
*/
#include
#include
#include
-int dprc_get_container_id(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int *container_id)
+/**
+ * dprc_get_container_id - Get container ID associated with a given portal.
+ * @mc_io: Pointer to Mc portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @container_id: Requested container id
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_container_id(struct fsl_mc_io *mc_io, u32 cmd_flags, int
*container_id)
{
struct mc_command cmd = { 0 };
int err;
@@ -28,23 +34,33 @@ int dprc_get_container_id(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPRC_RSP_GET_CONTAINER_ID(cmd, *container_id);
+ *container_id = (int)mc_cmd_read_object_id();
return 0;
}
-int dprc_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int container_id,
- uint16_t *token)
+/**
+ * dprc_open() - Open DPRC object for use
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @container_id: Container ID to open
+ * @token: Returned token of DPRC object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ * @warningRequired before any operation on the object.
+ */
+int dprc_open(struct fsl_mc_io *mc_io, u32 cmd_flags, int container_id, u16
*token)
{
+ struct dprc_cmd_open *cmd_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPRC_CMDID_OPEN, cmd_flags,
0);
- DPRC_CMD_OPEN(cmd, container_id);
+ cmd_params = (struct dprc_cmd_open *)cmd.params;
+ cmd_params->container_id = cpu_to_le32(container_id);
/* send command to mc*/
err = mc_send_command(mc_io, );
@@ -52,14 +68,23 @@ int dprc_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token();
return 0;
}
-int dprc_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
+/**
+ * dprc_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPRC object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_close(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token)
{
struct mc_command cmd = { 0 };
@@ -71,22 +96,35 @@ int dprc_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, );
}
-int dprc_create_container(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dprc_cfg *cfg,
- int *child_container_id,
- uint64_t *child_portal_paddr)
+/**
+ * dprc_create_container() - Create child container
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPRC object
+ * @cfg: Child container configuration
+ * @child_container_id:Returned child container ID
+ * @child_portal_offset:Returned child portal offset from MC portal base
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_create_container(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
+ struct dprc_cfg *cfg, int *child_container_id,
+ uint64_t *child_portal_offset)
{
+ struct dprc_cmd_create_container *cmd_params;
+ struct dprc_rsp_create_container *rsp_par
[PATCH 1/8] net: fsl-mc: remove unused MC APIs
There are multiple MC APIs which were added years ago but they are not
used at all in the u-boot source code. Remove all these APIs.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/dpio/dpio.c | 15 -
drivers/net/fsl-mc/dpmac.c | 89 --
drivers/net/fsl-mc/dpni.c | 100 ---
drivers/net/fsl-mc/dprc.c | 173 ---
include/fsl-mc/fsl_dpbp.h | 14 -
include/fsl-mc/fsl_dpio.h | 13 -
include/fsl-mc/fsl_dpmac.h | 120
include/fsl-mc/fsl_dpni.h | 434
include/fsl-mc/fsl_dprc.h | 513 -
9 files changed, 1471 deletions(-)
diff --git a/drivers/net/fsl-mc/dpio/dpio.c b/drivers/net/fsl-mc/dpio/dpio.c
index 8884455963de..30ecc9124b27 100644
--- a/drivers/net/fsl-mc/dpio/dpio.c
+++ b/drivers/net/fsl-mc/dpio/dpio.c
@@ -123,21 +123,6 @@ int dpio_disable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, );
}
-int dpio_reset(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
-{
- struct mc_command cmd = { 0 };
-
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPIO_CMDID_RESET,
- cmd_flags,
- token);
-
- /* send command to mc*/
- return mc_send_command(mc_io, );
-}
-
int dpio_get_attributes(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
diff --git a/drivers/net/fsl-mc/dpmac.c b/drivers/net/fsl-mc/dpmac.c
index 43a2ff43f888..f6def987c10b 100644
--- a/drivers/net/fsl-mc/dpmac.c
+++ b/drivers/net/fsl-mc/dpmac.c
@@ -95,95 +95,6 @@ int dpmac_destroy(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, );
}
-int dpmac_get_attributes(struct fsl_mc_io *mc_io,
-uint32_t cmd_flags,
-uint16_t token,
-struct dpmac_attr *attr)
-{
- struct mc_command cmd = { 0 };
- int err;
-
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_ATTR,
- cmd_flags,
- token);
-
- /* send command to mc*/
- err = mc_send_command(mc_io, );
- if (err)
- return err;
-
- /* retrieve response parameters */
- DPMAC_RSP_GET_ATTRIBUTES(cmd, attr);
-
- return 0;
-}
-
-int dpmac_mdio_read(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpmac_mdio_cfg *cfg)
-{
- struct mc_command cmd = { 0 };
- int err;
-
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPMAC_CMDID_MDIO_READ,
- cmd_flags,
- token);
- DPMAC_CMD_MDIO_READ(cmd, cfg);
-
- /* send command to mc*/
- err = mc_send_command(mc_io, );
- if (err)
- return err;
-
- /* retrieve response parameters */
- DPMAC_RSP_MDIO_READ(cmd, cfg->data);
-
- return 0;
-}
-
-int dpmac_mdio_write(struct fsl_mc_io *mc_io,
-uint32_t cmd_flags,
-uint16_t token,
-struct dpmac_mdio_cfg *cfg)
-{
- struct mc_command cmd = { 0 };
-
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPMAC_CMDID_MDIO_WRITE,
- cmd_flags,
- token);
- DPMAC_CMD_MDIO_WRITE(cmd, cfg);
-
- /* send command to mc*/
- return mc_send_command(mc_io, );
-}
-
-int dpmac_get_link_cfg(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpmac_link_cfg *cfg)
-{
- struct mc_command cmd = { 0 };
- int err = 0;
-
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_LINK_CFG,
- cmd_flags,
- token);
-
- /* send command to mc*/
- err = mc_send_command(mc_io, );
- if (err)
- return err;
-
- DPMAC_RSP_GET_LINK_CFG(cmd, cfg);
-
- return 0;
-}
-
int dpmac_set_link_state(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
diff --git a/drivers/net/fsl-mc/dpni.c b/drivers/net/fsl-mc/dpni.c
index a31abbff71b9..d0596a8e38d9 100644
--- a/drivers/net/fsl-mc/dpni.c
+++ b/drivers/net/fsl-mc/dpni.c
@@ -18,16 +18,6 @@ int dpni_prepare_cfg(const struct dpni_cfg *cfg,
return 0;
}
-int dpni_extract_cfg(struct dpni_cfg *cfg,
-const uint8_t *cfg_buf)
-{
- uint64_t *params = (uint64_t *)cfg_buf;
-
- DPNI_EXT_CFG(params, cfg);
-
- return 0;
-}
-
int dpni_open(struct fsl_mc_io *mc
[PATCH 2/8] net: fsl-mc: sync DPBP MC APIs
Sync the Data Path Buffer Pool APIs to their latest form, this means the
layout of each command is created based on structures which clearly
describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/dpbp.c | 180 +++--
include/fsl-mc/fsl_dpbp.h | 193 +++-
include/fsl-mc/fsl_mc_cmd.h | 24 +
3 files changed, 188 insertions(+), 209 deletions(-)
diff --git a/drivers/net/fsl-mc/dpbp.c b/drivers/net/fsl-mc/dpbp.c
index c609efb9abcc..5e17ccf73d38 100644
--- a/drivers/net/fsl-mc/dpbp.c
+++ b/drivers/net/fsl-mc/dpbp.c
@@ -3,25 +3,40 @@
* Freescale Layerscape MC I/O wrapper
*
* Copyright 2013-2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017-2023 NXP
*/
#include
#include
#include
-int dpbp_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpbp_id,
- uint16_t *token)
+/**
+ * dpbp_open() - Open a control session for the specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpbp_id: DPBP unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpbp_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_open(struct fsl_mc_io *mc_io, u32 cmd_flags, int dpbp_id, u16 *token)
{
+ struct dpbp_cmd_open *cmd_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_OPEN,
- cmd_flags,
- 0);
- DPBP_CMD_OPEN(cmd, dpbp_id);
+ cmd_flags, 0);
+ cmd_params = (struct dpbp_cmd_open *)cmd.params;
+ cmd_params->dpbp_id = cpu_to_le32(dpbp_id);
/* send command to mc*/
err = mc_send_command(mc_io, );
@@ -29,14 +44,23 @@ int dpbp_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token();
return err;
}
-int dpbp_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
+/**
+ * dpbp_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_close(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token)
{
struct mc_command cmd = { 0 };
@@ -48,11 +72,26 @@ int dpbp_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, );
}
-int dpbp_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpbp_cfg *cfg,
- uint32_t *obj_id)
+/**
+ * dpbp_create() - Create the DPBP object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token:Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id:Returned object id; use in subsequent API calls
+ *
+ * Create the DPBP object, allocate required resources and
+ * perform required initialization.
+ *
+ * This function accepts an authentication token of a parent
+ * container that this object should be assigned to and returns
+ * an object id. This object_id will be used in all subsequent calls to
+ * this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags,
+ const struct dpbp_cfg *cfg, u32 *obj_id)
{
struct mc_command cmd = { 0 };
int err;
@@ -61,8 +100,7 @@ int dpbp_create(struct fsl_mc_io *mc_io,
/* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_CREATE,
- cmd_flags,
- dprc_token);
+ cmd_flags, dprc_token);
/* send command to mc*/
err = mc_send_command(mc_io, );
@@ -70,33 +108,46 @@
[PATCH 0/8] net: fsl-mc: sync to latest MC APIs
This patch set syncs all the MC APIs to their latest form using packed structures to ilustrate each field and its endianness. No change in the minimum MC version or the command's version is made. The first patch removes any unused API so that we do not carry around useless code. Ioana Ciornei (8): net: fsl-mc: remove unused MC APIs net: fsl-mc: sync DPBP MC APIs net: fsl-mc: sync DPMAC MC APIs net: fsl-mc: sync DPRC MC APIs net: fsl-mc: sync DPNI MC APIs net: fsl-mc: sync DPSPARSER MC APIs net: fsl-mc: sync DPIO MC APIs net: fsl-mc: sync remaining MC commands drivers/net/fsl-mc/dpbp.c | 180 +++- drivers/net/fsl-mc/dpio/dpio.c | 194 ++-- drivers/net/fsl-mc/dpmac.c | 274 +++-- drivers/net/fsl-mc/dpmng.c | 20 +- drivers/net/fsl-mc/dpni.c | 680 + drivers/net/fsl-mc/dprc.c | 405 drivers/net/fsl-mc/dpsparser.c | 124 ++- drivers/net/fsl-mc/fsl_dpmng_cmd.h | 17 +- drivers/net/fsl-mc/mc.c| 14 +- drivers/net/fsl-mc/mc_sys.c| 13 +- drivers/net/ldpaa_eth/ldpaa_eth.c | 22 +- include/fsl-mc/fsl_dpbp.h | 207 +--- include/fsl-mc/fsl_dpio.h | 266 ++--- include/fsl-mc/fsl_dpmac.h | 360 ++- include/fsl-mc/fsl_dpmng.h | 13 +- include/fsl-mc/fsl_dpni.h | 1529 ++-- include/fsl-mc/fsl_dprc.h | 935 ++--- include/fsl-mc/fsl_dpsparser.h | 139 +-- include/fsl-mc/fsl_mc_cmd.h| 47 +- 19 files changed, 2050 insertions(+), 3389 deletions(-) -- 2.25.1
[PATCH 2/2] board: fsl: lx2160ardb: add dts fixup function for RevC and newer
From: Florin Chiculita
Since the new RevC LX2160A-RDB board has its 10G Aquantia PHYs at
different MDIO bus addresses, we must update both the kernel DTS and
u-boot's DTS (in case of DM_ETH) in case the board is indeed RevC or
newer. Use the newly introduced get_board_rev() function to trigger a
fixup of the kernel DTS to properly match the actual PHY addresses.
All this is encapsulated in the fdt_fixup_board_phy_revc() function
which will be used in the next patch.
Use the newly fdt_fixup_board_phy_revc() function introduced to
update both kernel's DTS and u-boot's DTS.
Signed-off-by: Florin Chiculita
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/eth_lx2160ardb.c | 107 +++
board/freescale/lx2160a/lx2160a.c| 7 ++
board/freescale/lx2160a/lx2160a.h| 1 +
include/configs/lx2160ardb.h | 5 ++
4 files changed, 120 insertions(+)
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c
b/board/freescale/lx2160a/eth_lx2160ardb.c
index 533f606effa7..c5dfefe1f342 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include "lx2160a.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -36,3 +37,109 @@ void reset_phy(void)
#endif
}
#endif /* CONFIG_RESET_PHY_R */
+
+static int fdt_get_dpmac_node(void *fdt, int dpmac_id)
+{
+ char dpmac_str[11] = "dpmacs@00";
+ int offset, dpmacs_offset;
+
+ /* get the dpmac offset */
+ dpmacs_offset = fdt_path_offset(fdt, "/soc/fsl-mc/dpmacs");
+ if (dpmacs_offset < 0)
+ dpmacs_offset = fdt_path_offset(fdt, "/fsl-mc/dpmacs");
+
+ if (dpmacs_offset < 0) {
+ printf("dpmacs node not found in device tree\n");
+ return dpmacs_offset;
+ }
+
+ sprintf(dpmac_str, "dpmac@%x", dpmac_id);
+ offset = fdt_subnode_offset(fdt, dpmacs_offset, dpmac_str);
+ if (offset < 0) {
+ sprintf(dpmac_str, "ethernet@%x", dpmac_id);
+ offset = fdt_subnode_offset(fdt, dpmacs_offset, dpmac_str);
+ if (offset < 0) {
+ printf("dpmac@%x/ethernet@%x node not found in device
tree\n",
+ dpmac_id, dpmac_id);
+ return offset;
+ }
+ }
+
+ return offset;
+}
+
+static int fdt_update_phy_addr(void *fdt, int dpmac_id, int phy_addr)
+{
+ char dpmac_str[] = "dpmacs@00";
+ const u32 *phyhandle;
+ int offset;
+ int err;
+
+ /* get the dpmac offset */
+ offset = fdt_get_dpmac_node(fdt, dpmac_id);
+ if (offset < 0)
+ return offset;
+
+ /* get dpmac phy-handle */
+ sprintf(dpmac_str, "dpmac@%x", dpmac_id);
+ phyhandle = (u32 *)fdt_getprop(fdt, offset, "phy-handle", NULL);
+ if (!phyhandle) {
+ printf("%s node not found in device tree\n", dpmac_str);
+ return offset;
+ }
+
+ offset = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*phyhandle));
+ if (offset < 0) {
+ printf("Could not get the ph node offset for dpmac %d\n",
+ dpmac_id);
+ return offset;
+ }
+
+ phy_addr = cpu_to_fdt32(phy_addr);
+ err = fdt_setprop(fdt, offset, "reg", _addr, sizeof(phy_addr));
+ if (err < 0) {
+ printf("Could not set phy node's reg for dpmac %d: %s.\n",
+ dpmac_id, fdt_strerror(err));
+ return err;
+ }
+
+ return 0;
+}
+
+static int fdt_delete_phy_handle(void *fdt, int dpmac_id)
+{
+ const u32 *phyhandle;
+ int offset;
+
+ /* get the dpmac offset */
+ offset = fdt_get_dpmac_node(fdt, dpmac_id);
+ if (offset < 0)
+ return offset;
+
+ /* verify if the node has a phy-handle */
+ phyhandle = (u32 *)fdt_getprop(fdt, offset, "phy-handle", NULL);
+ if (!phyhandle)
+ return 0;
+
+ return fdt_delprop(fdt, offset, "phy-handle");
+}
+
+int fdt_fixup_board_phy_revc(void *fdt)
+{
+ int ret;
+
+ if (get_board_rev() < 'C')
+ return 0;
+
+ /* DPMACs 3,4 have their Aquantia PHYs at new addresses */
+ ret = fdt_update_phy_addr(fdt, 3, AQR113C_PHY_ADDR1);
+ if (ret)
+ return ret;
+
+ ret = fdt_update_phy_addr(fdt, 4, AQR113C_PHY_ADDR2);
+ if (ret)
+ return ret;
+
+ /* There is no PHY for the DPMAC2, so remove the phy-handle */
+ return fdt_delete_phy_handle(fdt, 2);
+}
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index 4d406ac8f1c6..d631a11ff667 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/free
[PATCH 1/2] board: fsl: lx2160ardb: add api for obtaining board revision
From: Florin Chiculita
Add new API for obtaining board revision and trigger the i2c node
fixup with this new API.
Signed-off-by: Florin Chiculita
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/lx2160a.c | 15 ++-
board/freescale/lx2160a/lx2160a.h | 4
2 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index 2a752054cd99..4d406ac8f1c6 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -487,6 +487,15 @@ int config_board_mux(void)
}
#endif
+#if IS_ENABLED(CONFIG_TARGET_LX2160ARDB)
+u8 get_board_rev(void)
+{
+ u8 board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A';
+
+ return board_rev;
+}
+#endif
+
unsigned long get_board_sys_clk(void)
{
#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS)
@@ -760,9 +769,6 @@ int ft_board_setup(void *blob, struct bd_info *bd)
u64 mc_memory_size = 0;
u16 total_memory_banks;
int err;
-#if IS_ENABLED(CONFIG_TARGET_LX2160ARDB)
- u8 board_rev;
-#endif
err = fdt_increase_size(blob, 512);
if (err) {
@@ -825,8 +831,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
fdt_fixup_icid(blob);
#if IS_ENABLED(CONFIG_TARGET_LX2160ARDB)
- board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A';
- if (board_rev == 'C')
+ if (get_board_rev() == 'C')
fdt_fixup_i2c_thermal_node(blob);
#endif
diff --git a/board/freescale/lx2160a/lx2160a.h
b/board/freescale/lx2160a/lx2160a.h
index 52b020765dc6..4aac99e576a4 100644
--- a/board/freescale/lx2160a/lx2160a.h
+++ b/board/freescale/lx2160a/lx2160a.h
@@ -58,4 +58,8 @@
#endif
#endif
+#if IS_ENABLED(CONFIG_TARGET_LX2160ARDB)
+u8 get_board_rev(void);
+#endif
+
#endif /* __LX2160_H */
--
2.25.1
[PATCH 0/2] board: fsl: lx2160ardb: fixup PHY addresses for new board revisions
On the board revisions C and D, the LX2160A-RDB has the two 10G copper PHYs at different MDIO addresses. This patch set does the necessary fixup to both u-boot's and Linux's DTS so that the PHYs are properly described. Florin Chiculita (2): board: fsl: lx2160ardb: add api for obtaining board revision board: fsl: lx2160ardb: add dts fixup function for RevC and newer board/freescale/lx2160a/eth_lx2160ardb.c | 107 +++ board/freescale/lx2160a/lx2160a.c| 22 +++-- board/freescale/lx2160a/lx2160a.h| 5 ++ include/configs/lx2160ardb.h | 5 ++ 4 files changed, 134 insertions(+), 5 deletions(-) -- 2.25.1
[PATCH 6/6] net: ldpaa_eth: export DPNI and DPMAC counters through 'net stats'
Export the already existing DPNI and DPMAC counters through the newly
added callbacks.
Signed-off-by: Ioana Ciornei
---
drivers/net/ldpaa_eth/ldpaa_eth.c | 44 ---
1 file changed, 40 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c
b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 53c5b8ba2b1d..8c0b5a3b6fd2 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -998,11 +998,47 @@ static int ldpaa_eth_of_to_plat(struct udevice *dev)
return 0;
}
+static int ldpaa_eth_get_sset_count(struct udevice *dev)
+{
+ return LDPAA_ETH_DPNI_NUM_STATS + LDPAA_ETH_DPMAC_NUM_STATS;
+}
+
+static void ldpaa_eth_get_strings(struct udevice *dev, u8 *data)
+{
+ u8 *p = data;
+ int i;
+
+ for (i = 0; i < LDPAA_ETH_DPNI_NUM_STATS; i++) {
+ strlcpy(p, ldpaa_eth_dpni_stat_strings[i], ETH_GSTRING_LEN);
+ p += ETH_GSTRING_LEN;
+ }
+
+ for (i = 0; i < LDPAA_ETH_DPMAC_NUM_STATS; i++) {
+ strlcpy(p, ldpaa_eth_dpmac_stat_strings[i], ETH_GSTRING_LEN);
+ p += ETH_GSTRING_LEN;
+ }
+}
+
+static void ldpaa_eth_get_stats(struct udevice *dev, u64 *data)
+{
+ struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+ int i, j = 0;
+
+ for (i = 0; i < LDPAA_ETH_DPNI_NUM_STATS; i++)
+ *(data + j++) = priv->dpni_stats[i];
+
+ for (i = 0; i < LDPAA_ETH_DPMAC_NUM_STATS; i++)
+ *(data + j++) = priv->dpmac_stats[i];
+}
+
static const struct eth_ops ldpaa_eth_ops = {
- .start = ldpaa_eth_open,
- .send = ldpaa_eth_tx,
- .recv = ldpaa_eth_pull_dequeue_rx,
- .stop = ldpaa_eth_stop,
+ .start = ldpaa_eth_open,
+ .send = ldpaa_eth_tx,
+ .recv = ldpaa_eth_pull_dequeue_rx,
+ .stop = ldpaa_eth_stop,
+ .get_sset_count = ldpaa_eth_get_sset_count,
+ .get_strings = ldpaa_eth_get_strings,
+ .get_stats = ldpaa_eth_get_stats,
};
static const struct udevice_id ldpaa_eth_of_ids[] = {
--
2.25.1
[PATCH 5/6] cmd: net: add a 'net stats' command to dump network statistics
Add a new option to the 'net' command which can be used to dump network
statistics.
To do this, 3 new callbacks are added to the eth_ops structure:
.get_sset_count(), .get_strings(), .get_stats(). These callbacks
have the same functions as in Linux: to return the number of counters,
the strings which describe those counters and the actual values.
Signed-off-by: Ioana Ciornei
---
cmd/net.c | 54 ++-
include/net.h | 6 ++
2 files changed, 59 insertions(+), 1 deletion(-)
diff --git a/cmd/net.c b/cmd/net.c
index 68d406291ef1..dfe811f41acf 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -691,8 +692,58 @@ static int do_net_list(struct cmd_tbl *cmdtp, int flag,
int argc, char *const ar
return CMD_RET_SUCCESS;
}
+static int do_net_stats(struct cmd_tbl *cmdtp, int flag, int argc, char *const
argv[])
+{
+ int nstats, err, i, off;
+ struct udevice *dev;
+ u64 *values;
+ u8 *strings;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ err = uclass_get_device_by_name(UCLASS_ETH, argv[1], );
+ if (err) {
+ printf("Could not find device %s\n", argv[1]);
+ return CMD_RET_FAILURE;
+ }
+
+ if (!eth_get_ops(dev)->get_sset_count ||
+ !eth_get_ops(dev)->get_strings ||
+ !eth_get_ops(dev)->get_stats) {
+ printf("Driver does not implement stats dump!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ nstats = eth_get_ops(dev)->get_sset_count(dev);
+ strings = kcalloc(nstats, ETH_GSTRING_LEN, GFP_KERNEL);
+ if (!strings)
+ return CMD_RET_FAILURE;
+
+ values = kcalloc(nstats, sizeof(u64), GFP_KERNEL);
+ if (!values)
+ goto err_free_strings;
+
+ eth_get_ops(dev)->get_strings(dev, strings);
+ eth_get_ops(dev)->get_stats(dev, values);
+
+ off = 0;
+ for (i = 0; i < nstats; i++) {
+ printf(" %s: %llu\n", [off], values[i]);
+ off += ETH_GSTRING_LEN;
+ };
+
+ return CMD_RET_SUCCESS;
+
+err_free_strings:
+ kfree(strings);
+
+ return CMD_RET_FAILURE;
+}
+
static struct cmd_tbl cmd_net[] = {
U_BOOT_CMD_MKENT(list, 1, 0, do_net_list, "", ""),
+ U_BOOT_CMD_MKENT(stats, 2, 0, do_net_stats, "", ""),
};
static int do_net(struct cmd_tbl *cmdtp, int flag, int argc, char *const
argv[])
@@ -714,9 +765,10 @@ static int do_net(struct cmd_tbl *cmdtp, int flag, int
argc, char *const argv[])
}
U_BOOT_CMD(
- net, 2, 1, do_net,
+ net, 3, 1, do_net,
"NET sub-system",
"list - list available devices\n"
+ "stats - dump statistics for specified device\n"
);
#if defined(CONFIG_CMD_NCSI)
diff --git a/include/net.h b/include/net.h
index 785cb1059ef9..e254df7d7f43 100644
--- a/include/net.h
+++ b/include/net.h
@@ -167,6 +167,9 @@ enum eth_recv_flags {
* to the network stack. This function should fill in the
* eth_pdata::enetaddr field - optional
* set_promisc: Enable or Disable promiscuous mode
+ * get_sset_count: Number of statistics counters
+ * get_string: Names of the statistic counters
+ * get_stats: The values of the statistic counters
*/
struct eth_ops {
int (*start)(struct udevice *dev);
@@ -178,6 +181,9 @@ struct eth_ops {
int (*write_hwaddr)(struct udevice *dev);
int (*read_rom_hwaddr)(struct udevice *dev);
int (*set_promisc)(struct udevice *dev, bool enable);
+ int (*get_sset_count)(struct udevice *dev);
+ void (*get_strings)(struct udevice *dev, u8 *data);
+ void (*get_stats)(struct udevice *dev, u64 *data);
};
#define eth_get_ops(dev) ((struct eth_ops *)(dev)->driver->ops)
--
2.25.1
[PATCH 4/6] net: ldpaa_eth: extend debug capabilities with DPMAC statistics
The ldpaa_eth driver already had a DPMAC statistics dump, this patch
extends the list of stats and adds a bit more structure to the code.
For a bit more context, the DPAA2 u-boot software architecture uses a
default network interface object - a DPNI - which, at runtime, will get
connected to the currently used DPMAC object.
Each time the .stop() eth callback is called, the DPMAC is destroyed
thus any previous counters will get lost.
As a preparation for the next patches, we add a software kept set of
DPMAC counters which will get updated before each destroy operation
takes place.
Signed-off-by: Ioana Ciornei
---
drivers/net/ldpaa_eth/ldpaa_eth.c | 114 ++
drivers/net/ldpaa_eth/ldpaa_eth.h | 34 +
include/fsl-mc/fsl_dpmac.h| 5 +-
3 files changed, 76 insertions(+), 77 deletions(-)
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c
b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 907e51da6e1e..53c5b8ba2b1d 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -79,8 +79,33 @@ static void ldpaa_eth_add_dpni_stats(struct udevice *dev,
u64 *data)
priv->dpni_stats[i] += data[i];
}
-#ifdef DEBUG
+static void ldpaa_eth_collect_dpmac_stats(struct udevice *dev, u64 *data)
+{
+ struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+ int err, i;
+ u64 value;
+ for (i = 0; i < LDPAA_ETH_DPMAC_NUM_STATS; i++) {
+ err = dpmac_get_counter(dflt_mc_io, MC_CMD_NO_FLAGS,
+ priv->dpmac_handle, i,
+ );
+ if (err)
+ printf("dpmac_get_counter(%d) failed\n", i);
+
+ *(data + i) = value;
+ }
+}
+
+static void ldpaa_eth_add_dpmac_stats(struct udevice *dev, u64 *data)
+{
+ struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+ int i;
+
+ for (i = 0; i < LDPAA_ETH_DPMAC_NUM_STATS; i++)
+ priv->dpmac_stats[i] += data[i];
+}
+
+#ifdef DEBUG
static void ldpaa_eth_dump_dpni_stats(struct udevice *dev, u64 *data)
{
int i;
@@ -90,82 +115,13 @@ static void ldpaa_eth_dump_dpni_stats(struct udevice *dev,
u64 *data)
printf(" %s: %llu\n", ldpaa_eth_dpni_stat_strings[i], data[i]);
}
-static void ldpaa_eth_get_dpmac_counter(struct udevice *dev)
+static void ldpaa_eth_dump_dpmac_stats(struct udevice *dev, u64 *data)
{
- struct ldpaa_eth_priv *priv = dev_get_priv(dev);
- int err = 0;
- u64 value;
-
- err = dpmac_get_counter(dflt_mc_io, MC_CMD_NO_FLAGS,
-priv->dpmac_handle,
-DPMAC_CNT_ING_BYTE,
-);
- if (err < 0) {
- printf("dpmac_get_counter: DPMAC_CNT_ING_BYTE failed\n");
- return;
- }
- printf("\nDPMAC counters ..\n");
- printf("DPMAC_CNT_ING_BYTE=%lld\n", value);
-
- err = dpmac_get_counter(dflt_mc_io, MC_CMD_NO_FLAGS,
-priv->dpmac_handle,
-DPMAC_CNT_ING_FRAME_DISCARD,
-);
- if (err < 0) {
- printf("dpmac_get_counter: DPMAC_CNT_ING_FRAME_DISCARD
failed\n");
- return;
- }
- printf("DPMAC_CNT_ING_FRAME_DISCARD=%lld\n", value);
-
- err = dpmac_get_counter(dflt_mc_io, MC_CMD_NO_FLAGS,
-priv->dpmac_handle,
-DPMAC_CNT_ING_ALIGN_ERR,
-);
- if (err < 0) {
- printf("dpmac_get_counter: DPMAC_CNT_ING_ALIGN_ERR failed\n");
- return;
- }
- printf("DPMAC_CNT_ING_ALIGN_ERR =%lld\n", value);
-
- err = dpmac_get_counter(dflt_mc_io, MC_CMD_NO_FLAGS,
-priv->dpmac_handle,
-DPMAC_CNT_ING_BYTE,
-);
- if (err < 0) {
- printf("dpmac_get_counter: DPMAC_CNT_ING_BYTE failed\n");
- return;
- }
- printf("DPMAC_CNT_ING_BYTE=%lld\n", value);
-
- err = dpmac_get_counter(dflt_mc_io, MC_CMD_NO_FLAGS,
-priv->dpmac_handle,
-DPMAC_CNT_ING_ERR_FRAME,
-);
- if (err < 0) {
- printf("dpmac_get_counter: DPMAC_CNT_ING_ERR_FRAME failed\n");
- return;
- }
- printf("DPMAC_CNT_ING_ERR_FRAME=%lld\n", value);
-
- err = dpmac_get_counter(dflt_mc_io, MC_CMD_NO_FLAGS,
-priv->dpmac_handle,
-DPMAC_CNT_EGR_BYTE ,
-);
- if (err < 0) {
- printf("dpmac_get_counter: DPMAC_CNT_EGR_BYTE failed\n");
- return;
- }
- printf("DPMAC_CNT_EGR_BYTE =%lld\n", value);
+ int i;
- err = dpm
[PATCH 3/6] net: ldpaa_eth: extend debug capabilities with DPNI statistics
The ldpaa_eth driver already had a DPNI statistics dump, this patch
extends the list of stats and adds a bit more structure to the code.
For a bit more context, the DPAA2 u-boot software architecture uses a
default network interface object - a DPNI - which, at runtime, will get
connected to the currently used DPMAC object.
Each time the .stop() eth callback is called, the DPNI is reset to its
original state, including its counters.
As a preparation for the next patches, we add a software kept set of
DPNI counters which will get updated before each reset operation takes
place.
Signed-off-by: Ioana Ciornei
---
drivers/net/ldpaa_eth/ldpaa_eth.c | 106 +++---
drivers/net/ldpaa_eth/ldpaa_eth.h | 30 +
2 files changed, 82 insertions(+), 54 deletions(-)
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c
b/drivers/net/ldpaa_eth/ldpaa_eth.c
index fe901baf5a4e..907e51da6e1e 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -38,68 +38,56 @@ static void init_phy(struct udevice *dev)
}
#endif
-#ifdef DEBUG
+static void ldpaa_eth_collect_dpni_stats(struct udevice *dev, u64 *data)
+{
+ union dpni_statistics dpni_stats;
+ int dpni_stats_page_size[DPNI_STATISTICS_CNT] = {
+ sizeof(dpni_stats.page_0),
+ sizeof(dpni_stats.page_1),
+ sizeof(dpni_stats.page_2),
+ sizeof(dpni_stats.page_3),
+ sizeof(dpni_stats.page_4),
+ sizeof(dpni_stats.page_5),
+ sizeof(dpni_stats.page_6),
+ };
+ int j, k, num_cnt, err, i = 0;
-#define DPNI_STATS_PER_PAGE 6
-
-static const char *dpni_statistics[][DPNI_STATS_PER_PAGE] = {
- {
- "DPNI_CNT_ING_ALL_FRAMES",
- "DPNI_CNT_ING_ALL_BYTES",
- "DPNI_CNT_ING_MCAST_FRAMES",
- "DPNI_CNT_ING_MCAST_BYTES",
- "DPNI_CNT_ING_BCAST_FRAMES",
- "DPNI_CNT_ING_BCAST_BYTES",
- }, {
- "DPNI_CNT_EGR_ALL_FRAMES",
- "DPNI_CNT_EGR_ALL_BYTES",
- "DPNI_CNT_EGR_MCAST_FRAMES",
- "DPNI_CNT_EGR_MCAST_BYTES",
- "DPNI_CNT_EGR_BCAST_FRAMES",
- "DPNI_CNT_EGR_BCAST_BYTES",
- }, {
- "DPNI_CNT_ING_FILTERED_FRAMES",
- "DPNI_CNT_ING_DISCARDED_FRAMES",
- "DPNI_CNT_ING_NOBUFFER_DISCARDS",
- "DPNI_CNT_EGR_DISCARDED_FRAMES",
- "DPNI_CNT_EGR_CNF_FRAMES",
- ""
- },
-};
+ for (j = 0; j <= 6; j++) {
+ /* We're not interested in pages 4 & 5 for now */
+ if (j == 4 || j == 5)
+ continue;
+ err = dpni_get_statistics(dflt_mc_io, MC_CMD_NO_FLAGS,
+ dflt_dpni->dpni_handle,
+ j, _stats);
+ if (err) {
+ memset(_stats, 0, sizeof(dpni_stats));
+ printf("dpni_get_stats(%d) failed\n", j);
+ }
+
+ num_cnt = dpni_stats_page_size[j] / sizeof(u64);
+ for (k = 0; k < num_cnt; k++)
+ *(data + i++) = dpni_stats.raw.counter[k];
+ }
+}
-static void print_dpni_stats(const char *strings[],
-union dpni_statistics dpni_stats)
+static void ldpaa_eth_add_dpni_stats(struct udevice *dev, u64 *data)
{
- uint64_t *stat;
+ struct ldpaa_eth_priv *priv = dev_get_priv(dev);
int i;
- stat = (uint64_t *)_stats;
- for (i = 0; i < DPNI_STATS_PER_PAGE; i++) {
- if (strcmp(strings[i], "\0") == 0)
- break;
- printf("%s= %llu\n", strings[i], *stat);
- stat++;
- }
+ for (i = 0; i < LDPAA_ETH_DPNI_NUM_STATS; i++)
+ priv->dpni_stats[i] += data[i];
}
-static void ldpaa_eth_get_dpni_counter(void)
+#ifdef DEBUG
+
+static void ldpaa_eth_dump_dpni_stats(struct udevice *dev, u64 *data)
{
- int err = 0;
- unsigned int page = 0;
- union dpni_statistics dpni_stats;
+ int i;
- printf("DPNI counters ..\n");
- for (page = 0; page < 3; page++) {
- err = dpni_get_statistics(dflt_mc_io, MC_CMD_NO_FLAGS,
- dflt_dpni->dpni_handle, page,
- _stats);
- if (err < 0) {
- printf("dpni_get_statistics: failed:");
- printf("%d for page[%d]\n", err, page);
- return;
- }
- print_dpni_stats(dpni_statistics[page], dpni_stats);
- }
+ printf("DPNI counters:\n");
+ for (i = 0; i < LDPAA_ETH_DPNI_NUM_STATS; i++)
+
[PATCH 2/6] net: ldpaa_eth: transform dpni_statistics from a struct to a union
In order to simplify code, dpni_statistics can be written as a union.
Using the raw accessors we can just loop through all the statistics from
a page without trying to access each an every one independently.
Make this change to a union.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/dpni.c | 2 +-
drivers/net/ldpaa_eth/ldpaa_eth.c | 4 +-
include/fsl-mc/fsl_dpni.h | 143 +-
3 files changed, 105 insertions(+), 44 deletions(-)
diff --git a/drivers/net/fsl-mc/dpni.c b/drivers/net/fsl-mc/dpni.c
index 5290be20c85e..a31abbff71b9 100644
--- a/drivers/net/fsl-mc/dpni.c
+++ b/drivers/net/fsl-mc/dpni.c
@@ -491,7 +491,7 @@ int dpni_get_statistics(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint8_t page,
- struct dpni_statistics *stat)
+ union dpni_statistics *stat)
{
struct mc_command cmd = { 0 };
int err;
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c
b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 2cb6e9b7d705..fe901baf5a4e 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -68,7 +68,7 @@ static const char *dpni_statistics[][DPNI_STATS_PER_PAGE] = {
};
static void print_dpni_stats(const char *strings[],
-struct dpni_statistics dpni_stats)
+union dpni_statistics dpni_stats)
{
uint64_t *stat;
int i;
@@ -86,7 +86,7 @@ static void ldpaa_eth_get_dpni_counter(void)
{
int err = 0;
unsigned int page = 0;
- struct dpni_statistics dpni_stats;
+ union dpni_statistics dpni_stats;
printf("DPNI counters ..\n");
for (page = 0; page < 3; page++) {
diff --git a/include/fsl-mc/fsl_dpni.h b/include/fsl-mc/fsl_dpni.h
index e5e7338192f6..fc57c375ac14 100644
--- a/include/fsl-mc/fsl_dpni.h
+++ b/include/fsl-mc/fsl_dpni.h
@@ -258,13 +258,13 @@ do { \
/*cmd, param, offset, width, type, arg_name */
#define DPNI_RSP_GET_STATISTICS(cmd, stat) \
do { \
- MC_RSP_OP(cmd, 0, 0, 64, uint64_t, (stat)->counter0); \
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, (stat)->counter1); \
- MC_RSP_OP(cmd, 2, 0, 64, uint64_t, (stat)->counter2); \
- MC_RSP_OP(cmd, 3, 0, 64, uint64_t, (stat)->counter3); \
- MC_RSP_OP(cmd, 4, 0, 64, uint64_t, (stat)->counter4); \
- MC_RSP_OP(cmd, 5, 0, 64, uint64_t, (stat)->counter5); \
- MC_RSP_OP(cmd, 6, 0, 64, uint64_t, (stat)->counter6); \
+ MC_RSP_OP(cmd, 0, 0, 64, uint64_t, (stat)->raw.counter[0]); \
+ MC_RSP_OP(cmd, 1, 0, 64, uint64_t, (stat)->raw.counter[1]); \
+ MC_RSP_OP(cmd, 2, 0, 64, uint64_t, (stat)->raw.counter[2]); \
+ MC_RSP_OP(cmd, 3, 0, 64, uint64_t, (stat)->raw.counter[3]); \
+ MC_RSP_OP(cmd, 4, 0, 64, uint64_t, (stat)->raw.counter[4]); \
+ MC_RSP_OP(cmd, 5, 0, 64, uint64_t, (stat)->raw.counter[5]); \
+ MC_RSP_OP(cmd, 6, 0, 64, uint64_t, (stat)->raw.counter[6]); \
} while (0)
enum net_prot {
@@ -1257,40 +1257,101 @@ int dpni_set_tx_confirmation_mode(struct fsl_mc_io
*mc_io,
uint32_t cmd_flags,
uint16_t token,
enum dpni_confirmation_mode mode);
-struct dpni_statistics {
- /**
-* Page_0 statistics structure
-* @ingress_all_frames: Ingress frame count
-* @ingress_all_bytes: Ingress byte count
-* @ingress_multicast_frames: Ingress multicast frame count
-* @ingress_multicast_bytes: Ingress multicast byte count
-* @ingress_broadcast_frames: Ingress broadcast frame count
-* @ingress_broadcast_bytes: Ingress broadcast byte count
-*
-* Page_1 statistics structure
-* @egress_all_frames: Egress frame count
-* @egress_all_bytes: Egress byte count
-* @egress_multicast_frames: Egress multicast frame count
-* @egress_multicast_bytes: Egress multicast byte count
-* @egress_broadcast_frames: Egress broadcast frame count
-* @egress_broadcast_bytes: Egress broadcast byte count
-*
-* Page_2 statistics structure
-* @ingress_filtered_frames: Ingress filtered frame count
-* @ingress_discarded_frames: Ingress discarded frame count
-* @ingress_nobuffer_discards: Ingress discarded frame count due to
-* lack of buffers.
-* @egress_discarded_frames: Egress discarded frame count
-* @egress_confirmed_frames: Egress confirmed frame count
-*/
- uint64_t counter0;
- uint64_t counter1;
- uint64_t counter2;
- uint64_t counter3;
- uint64_t counter4;
- uint64_t counter5;
- uint64_t counter6;
+#define DPNI_STATISTICS_CNT7
+
+/**
+ * union dpni_statis
[PATCH 1/6] net: ldpaa_eth: fix the memory layout of the dpmac_get_counters() API
Each MC commands has a specific predefined memory layout that gets
interpreted by the firmware. The dpmac_get_counters() API memory layout
is wrong, thus the results returned by the command are incorrect.
Fix this by updating the offset of the counter field.
Signed-off-by: Ioana Ciornei
---
include/fsl-mc/fsl_dpmac.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/fsl-mc/fsl_dpmac.h b/include/fsl-mc/fsl_dpmac.h
index 1cea123a3164..8f5e17fe222a 100644
--- a/include/fsl-mc/fsl_dpmac.h
+++ b/include/fsl-mc/fsl_dpmac.h
@@ -84,7 +84,7 @@ do { \
/*cmd, param, offset, width, type, arg_name */
#define DPMAC_CMD_GET_COUNTER(cmd, type) \
- MC_CMD_OP(cmd, 1, 0, 64, enum dpmac_counter, type)
+ MC_CMD_OP(cmd, 0, 0, 8, enum dpmac_counter, type)
/*cmd, param, offset, width, type, arg_name */
#define DPMAC_RSP_GET_COUNTER(cmd, counter) \
--
2.25.1
[PATCH 0/6] Add the 'net stats' command to dump network statistics
This patch set extends the 'net' command so that it can be used to dump network statistics on the available devices. The first user of this new API is the ldpaa_eth driver which, in the last patch, implements the 3 new callbacks added. Since the ldpaa_eth driver already had some debug printing of counters, the first 4 patches are there to extend the existing list of counters and to reorganize the code so that it fits better with the new eth_ops callbacks. Ioana Ciornei (6): net: ldpaa_eth: fix the memory layout of the dpmac_get_counters() API net: ldpaa_eth: transform dpni_statistics from a struct to a union net: ldpaa_eth: extend debug capabilities with DPNI statistics net: ldpaa_eth: extend debug capabilities with DPMAC statistics cmd: net: add a 'net stats' command to dump network statistics net: ldpaa_eth: export DPNI and DPMAC counters through 'net stats' cmd/net.c | 54 ++- drivers/net/fsl-mc/dpni.c | 2 +- drivers/net/ldpaa_eth/ldpaa_eth.c | 248 +++--- drivers/net/ldpaa_eth/ldpaa_eth.h | 64 include/fsl-mc/fsl_dpmac.h| 7 +- include/fsl-mc/fsl_dpni.h | 143 - include/net.h | 6 + 7 files changed, 353 insertions(+), 171 deletions(-) -- 2.25.1
Re: [PATCH 00/18] Synchronise LS1088A/Ten64 device tree with Linux
On Wed, Apr 12, 2023 at 07:38:12AM +, Mathew McBride wrote: > I am intensively working on updating the current > "production" Ten64 (NXP LS1088A) firmware from v2020.07 to > the latest U-Boot, with the hope of taking advantage of > bootstd/bootflow and other improvements. > > One desire I have is to have U-Boot "supply" the device tree > which is used for EFI boot, rather than our current method of > reading the DTB from a flash partition with commands (sf read etc.) > and plugging that into the distroboot process. > > Indeed, once we syncronise the U-Boot FDT with the Linux > one, the bootflow method "Just Works" with the control > FDT, without us having to plug an external FDT into the > process. > > (Note: the bootstd conversion for Ten64 will be coming in > a later commit. The DTS on it's own is only one part of > the puzzle) > > The flow of this series is: > - Fix a crash I found in the U-Boot FDT fixup for Layerscape > > The previous U-Boot copy of the fsl-ls1088a.dts did not > have direct alias to the "crypto" node, triggering a crash > when FDT fixup tried to operate on it. > > - Enable DM_SERIAL for Ten64 (mirrors how it was enabled for > LS1088A-RDB and LS1088A-QDS recently) > > - Move all U-Boot "tweaks" into a -u-boot.dtsi file. > Each board will have it's own -u-boot.dtsi, > which includs the SoC-specific fsl-ls1088a-u-boot.dtsi. > > - For all hardware that was in U-Boot's fsl-ls1088a.dtsi, > and not in the "correct" place (under /soc), move them > into /soc and adopt the Linux kernel definition. > > PCIe needed special treatment as it's U-Boot binding was > slightly different, as well as different compatible strings > (match a different U-Boot driver) for MDIO, USB and fsl-mc > among others. > > At this point, Linux is able to boot on the Ten64 > using U-Boot's FDT (passed to it via EFI) with > major hardware (Ethernet, USB, PCIe) functional. > > - Finally, copy over the U-Boot fsl-ls1088a.dtsi with the > Linux kernel version. > They are now bit-for-bit identical, with the U-Boot tweaks > contained externally. > > - Similarly for the Ten64 DTS - fsl-ls1088a-ten64.dts > is now identical to the kernel version. > > This builds upon the recent conversion of the LS1088A > to DM_SERIAL[1]. I used a similar syncronisation for the LS1028A[2] > as a guide. > > [1] - "Convert LS1088A and LX2160 to DM_SERIAL" patch series > https://patchwork.ozlabs.org/project/uboot/list/?series=346392=%2A=both > > [2] - "arm: dts: ls1028a: sync device tree with linux" patch series > https://patchwork.ozlabs.org/project/uboot/list/?series=265457=%2A=both > Thanks a lot, Mathew! I really appreciate the work that you put into this series. For the entire series: Reviewed-by: Ioana Ciornei Tested-by: Ioana Ciornei # on LS1088A-RDB Ioana
Re: [PATCH 02/18] configs: ten64: enable DM_SERIAL
On Wed, Apr 12, 2023 at 07:38:14AM +, Mathew McBride wrote: > The recent series "Convert LS1088A and LX2160 to DM_SERIAL" > from Ioana Ciornei provided the necessary support to enable > DM_SERIAL on the Ten64 board (LS1088A). > > Signed-off-by: Mathew McBride Reviewed-by: Ioana Ciornei Thanks! I didn't want to touch defconfigs which I cannot directly test on the board.
Re: [PATCH 0/2] drivers: net: fsl-mc: fix MAC address fixup procedure
On Thu, Feb 09, 2023 at 06:07:02PM +0200, Ioana Ciornei wrote: > This patch set fixes the MAC address fixup procedure which was impacted > by several changes in the phy_interface_t used to describe some > interfaces. The transitions from "xgmii" to "xfi" and then finally > to "10gbase-r" were involved. > > The first patch just exports a function to identify the DPMAC id of an > UCLASS_ETH device and the DPAA2 driver name as a macro. > > Ioana Ciornei (2): > drivers: net: ldpaa: export driver name and API to get DPMAC id > drivers: net: fsl-mc: fix MAC address fixup procedure > Is there any chance for this two patches to be picked up for the v2023.04 release?
Re: [PATCH] configs: convert NXP LS1028A RDB and QDS to DM_SERIAL
On Wed, Mar 15, 2023 at 01:01:16PM +0200, Vladimir Oltean wrote: > Since the device trees are more or less synchronized with Linux, the > only necessary changes are to enable CONFIG_DM_SERIAL and the DM_SERIAL > driver for ns16550 (ns16550.c rather than serial_ns16550.c). > > ls1028aqds_tfa_lpuart_defconfig already uses DM_SERIAL for the LPUART > driver, so I didn't touch that. > > Signed-off-by: Vladimir Oltean Reviewed-by: Ioana Ciornei
[PATCH 08/10] arch: arm: dts: fsl-lx2160a.dtsi: sync serial nodes with Linux
Sync the serial nodes of the LX2160A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-lx2160a-qds.dtsi | 11 ++-
arch/arm/dts/fsl-lx2160a-rdb.dts | 11 ++-
arch/arm/dts/fsl-lx2160a.dtsi | 22 +-
3 files changed, 33 insertions(+), 11 deletions(-)
diff --git a/arch/arm/dts/fsl-lx2160a-qds.dtsi
b/arch/arm/dts/fsl-lx2160a-qds.dtsi
index 6635c5258590..e96605b1b4fb 100644
--- a/arch/arm/dts/fsl-lx2160a-qds.dtsi
+++ b/arch/arm/dts/fsl-lx2160a-qds.dtsi
@@ -2,7 +2,7 @@
/*
* NXP LX2160AQDS common device tree source
*
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2020, 2023 NXP
*
*/
@@ -11,6 +11,7 @@
/ {
aliases {
spi0 =
+ serial0 =
};
};
@@ -286,3 +287,11 @@
{
status = "okay";
};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts
index 399409776e74..aaa59598bd4c 100644
--- a/arch/arm/dts/fsl-lx2160a-rdb.dts
+++ b/arch/arm/dts/fsl-lx2160a-rdb.dts
@@ -5,7 +5,7 @@
* Author: Priyanka Jain
* Sriram Dash
*
- * Copyright 2018 NXP
+ * Copyright 2018, 2023 NXP
*
*/
@@ -18,6 +18,7 @@
compatible = "fsl,lx2160ardb", "fsl,lx2160a";
aliases {
spi0 =
+ serial0 =
};
};
@@ -137,3 +138,11 @@
{
status = "okay";
};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 58a408d2dc34..0b0f317f3056 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -2,7 +2,7 @@
/*
* NXP lx2160a SOC common device tree source
*
- * Copyright 2018-2021 NXP
+ * Copyright 2018-2021, 2023 NXP
*
*/
@@ -35,30 +35,34 @@
dma-ranges = <0x0 0x0 0x0 0x0 0x1 0x>;
uart0: serial@21c {
- compatible = "arm,pl011";
+ compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21c 0x0 0x1000>;
- clocks = < 4 0>;
+ interrupts = ;
+ current-speed = <115200>;
status = "disabled";
};
uart1: serial@21d {
- compatible = "arm,pl011";
+ compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21d 0x0 0x1000>;
- clocks = < 4 0>;
+ interrupts = ;
+ current-speed = <115200>;
status = "disabled";
};
uart2: serial@21e {
- compatible = "arm,pl011";
+ compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21e 0x0 0x1000>;
- clocks = < 4 0>;
+ interrupts = ;
+ current-speed = <115200>;
status = "disabled";
};
uart3: serial@21f {
- compatible = "arm,pl011";
+ compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21f 0x0 0x1000>;
- clocks = < 4 0>;
+ interrupts = ;
+ current-speed = <115200>;
status = "disabled";
};
};
--
2.25.1
[PATCH 10/10] board: freescale: lx2160a: remove the PL01X device instantiation
There is no need for the board file to instantiate a PL01X platform
device anymore. This is all taken care of by the DM code which now will
probe the device based on the DT node.
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/lx2160a.c | 34 ---
1 file changed, 34 deletions(-)
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index 33842d02178a..2a752054cd99 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -55,45 +55,11 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct pl01x_serial_plat serial0 = {
-#if CONFIG_CONS_INDEX == 0
- .base = CFG_SYS_SERIAL0,
-#elif CONFIG_CONS_INDEX == 1
- .base = CFG_SYS_SERIAL1,
-#else
-#error "Unsupported console index value."
-#endif
- .type = TYPE_PL011,
-};
-
-U_BOOT_DRVINFO(nxp_serial0) = {
- .name = "serial_pl01x",
- .plat = ,
-};
-
-static struct pl01x_serial_plat serial1 = {
- .base = CFG_SYS_SERIAL1,
- .type = TYPE_PL011,
-};
-
-U_BOOT_DRVINFO(nxp_serial1) = {
- .name = "serial_pl01x",
- .plat = ,
-};
-
-static void uart_get_clock(void)
-{
- serial0.clock = get_serial_clock();
- serial1.clock = get_serial_clock();
-}
-
int board_early_init_f(void)
{
#if defined(CONFIG_SYS_I2C_EARLY_INIT) && defined(CONFIG_SPL_BUILD)
i2c_early_init_f();
#endif
- /* get required clock for UART IP */
- uart_get_clock();
#ifdef CONFIG_EMC2305
select_i2c_ch_pca9547(I2C_MUX_CH_EMC2305, 0);
--
2.25.1
[PATCH 06/10] arch: arm: dts: fsl-lx2160a.dtsi: add an 'soc' node
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-lx2160a.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 57c7d3ef7111..08f160f6989f 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -27,6 +27,14 @@
clock-output-names = "sysclk";
};
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-ranges = <0x0 0x0 0x0 0x0 0x1 0x>;
+ };
+
crypto: crypto@800 {
compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
fsl,sec-era = <10>;
--
2.25.1
[PATCH 09/10] arch: arm: dts: fsl-lx2160a.dtsi: tag serial nodes with bootph-all
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-lx2160a.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 0b0f317f3056..680c69c7b738 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -40,6 +40,7 @@
interrupts = ;
current-speed = <115200>;
status = "disabled";
+ bootph-all;
};
uart1: serial@21d {
@@ -48,6 +49,7 @@
interrupts = ;
current-speed = <115200>;
status = "disabled";
+ bootph-all;
};
uart2: serial@21e {
@@ -56,6 +58,7 @@
interrupts = ;
current-speed = <115200>;
status = "disabled";
+ bootph-all;
};
uart3: serial@21f {
@@ -64,6 +67,7 @@
interrupts = ;
current-speed = <115200>;
status = "disabled";
+ bootph-all;
};
};
--
2.25.1
[PATCH 07/10] arch: arm: dts: fsl-lx2160a.dtsi: move the serial nodes under soc
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-lx2160a.dtsi | 56 +--
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 08f160f6989f..58a408d2dc34 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -33,6 +33,34 @@
#size-cells = <2>;
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x1 0x>;
+
+ uart0: serial@21c {
+ compatible = "arm,pl011";
+ reg = <0x0 0x21c 0x0 0x1000>;
+ clocks = < 4 0>;
+ status = "disabled";
+ };
+
+ uart1: serial@21d {
+ compatible = "arm,pl011";
+ reg = <0x0 0x21d 0x0 0x1000>;
+ clocks = < 4 0>;
+ status = "disabled";
+ };
+
+ uart2: serial@21e {
+ compatible = "arm,pl011";
+ reg = <0x0 0x21e 0x0 0x1000>;
+ clocks = < 4 0>;
+ status = "disabled";
+ };
+
+ uart3: serial@21f {
+ compatible = "arm,pl011";
+ reg = <0x0 0x21f 0x0 0x1000>;
+ clocks = < 4 0>;
+ status = "disabled";
+ };
};
crypto: crypto@800 {
@@ -185,34 +213,6 @@
status = "disabled";
};
- uart0: serial@21c {
- compatible = "arm,pl011";
- reg = <0x0 0x21c 0x0 0x1000>;
- clocks = < 4 0>;
- status = "disabled";
- };
-
- uart1: serial@21d {
- compatible = "arm,pl011";
- reg = <0x0 0x21d 0x0 0x1000>;
- clocks = < 4 0>;
- status = "disabled";
- };
-
- uart2: serial@21e {
- compatible = "arm,pl011";
- reg = <0x0 0x21e 0x0 0x1000>;
- clocks = < 4 0>;
- status = "disabled";
- };
-
- uart3: serial@21f {
- compatible = "arm,pl011";
- reg = <0x0 0x21f 0x0 0x1000>;
- clocks = < 4 0>;
- status = "disabled";
- };
-
dspi0: dspi@210 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
--
2.25.1
[PATCH 04/10] arch: arm: dts: fsl-ls1088a.dtsi: tag serial nodes with bootph-all
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-ls1088a.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index b094bcf67c4f..4782b83515af 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -64,6 +64,7 @@
QORIQ_CLK_PLL_DIV(4)>;
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
+ bootph-all;
};
duart1: serial@21c0600 {
@@ -73,6 +74,7 @@
QORIQ_CLK_PLL_DIV(4)>;
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
+ bootph-all;
};
};
--
2.25.1
[PATCH 05/10] configs: ls1088a: enable DM_SERIAL
Now that the DT nodes for the serial devices are in place for these boards, enable DM_SERIAL in the associated configs. Signed-off-by: Ioana Ciornei --- configs/ls1088aqds_tfa_defconfig | 4 +++- configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 4 +++- configs/ls1088ardb_tfa_defconfig | 4 +++- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index c8ab5723539a..3e103b93c8c8 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -118,7 +118,9 @@ CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 0ec80be2ea6a..d57ef3e8adf1 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -90,7 +90,9 @@ CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index 27323be40890..32d43aa653d1 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -96,7 +96,9 @@ CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y -- 2.25.1
[PATCH 03/10] arch: arm: dts: fsl-ls1088a.dtsi: sync serial nodes with Linux
Sync the serial nodes of the LS1088A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-ls1088a-qds.dtsi | 8 +++
arch/arm/dts/fsl-ls1088a-rdb.dts | 8 +++
arch/arm/dts/fsl-ls1088a-ten64.dts | 6 +++--
arch/arm/dts/fsl-ls1088a.dtsi | 35 ++
4 files changed, 46 insertions(+), 11 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1088a-qds.dtsi
b/arch/arm/dts/fsl-ls1088a-qds.dtsi
index 85dc7457bfb3..4d21d4fbd5e0 100644
--- a/arch/arm/dts/fsl-ls1088a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1088a-qds.dtsi
@@ -132,6 +132,14 @@
};
};
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
{
bus-num = <0>;
status = "okay";
diff --git a/arch/arm/dts/fsl-ls1088a-rdb.dts b/arch/arm/dts/fsl-ls1088a-rdb.dts
index 01f8fcb61aef..c63d4158e49f 100644
--- a/arch/arm/dts/fsl-ls1088a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1088a-rdb.dts
@@ -142,6 +142,14 @@
};
};
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
{
status = "okay";
diff --git a/arch/arm/dts/fsl-ls1088a-ten64.dts
b/arch/arm/dts/fsl-ls1088a-ten64.dts
index 43b669c642ce..55a7d41fb01b 100644
--- a/arch/arm/dts/fsl-ls1088a-ten64.dts
+++ b/arch/arm/dts/fsl-ls1088a-ten64.dts
@@ -20,6 +20,8 @@
compatible = "traverse,ten64", "fsl,ls1088a";
aliases {
+ serial0 =
+ serial1 =
spi0 =
};
@@ -164,11 +166,11 @@
status = "okay";
};
- {
+ {
status = "okay";
};
- {
+ {
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 0eb0f6c41aef..b094bcf67c4f 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -2,9 +2,10 @@
/*
* NXP ls1088a SOC common device tree source
*
- * Copyright 2017, 2020-2021 NXP
+ * Copyright 2017, 2020-2021, 2023 NXP
*/
+#include
#include
/ {
compatible = "fsl,ls1088a";
@@ -35,6 +36,13 @@
<1 10 0x8>; /* Hypervisor PPI, active-low */
};
+ sysclk: sysclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1>;
+ clock-output-names = "sysclk";
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
@@ -42,20 +50,29 @@
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x1 0x>;
- serial0: serial@21c0500 {
- device_type = "serial";
+ clockgen: clocking@130 {
+ compatible = "fsl,ls1088a-clockgen";
+ reg = <0 0x130 0 0xa>;
+ #clock-cells = <2>;
+ clocks = <>;
+ };
+
+ duart0: serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0500 0x0 0x100>;
- clock-frequency = <0>; /* Updated by bootloader */
- interrupts = <0 32 0x1>; /* edge triggered */
+ clocks = < QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
- serial1: serial@21c0600 {
- device_type = "serial";
+ duart1: serial@21c0600 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0600 0x0 0x100>;
- clock-frequency = <0>; /* Updated by bootloader */
- interrupts = <0 32 0x1>; /* edge triggered */
+ clocks = < QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
};
--
2.25.1
[PATCH 02/10] arch: arm: dts: fsl-ls1088a.dtsi: move the serial nodes under soc
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-ls1088a.dtsi | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 36ec0ff51f2a..0eb0f6c41aef 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -42,6 +42,21 @@
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x1 0x>;
+ serial0: serial@21c0500 {
+ device_type = "serial";
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21c0500 0x0 0x100>;
+ clock-frequency = <0>; /* Updated by bootloader */
+ interrupts = <0 32 0x1>; /* edge triggered */
+ };
+
+ serial1: serial@21c0600 {
+ device_type = "serial";
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21c0600 0x0 0x100>;
+ clock-frequency = <0>; /* Updated by bootloader */
+ interrupts = <0 32 0x1>; /* edge triggered */
+ };
};
i2c0: i2c@200 {
@@ -76,22 +91,6 @@
interrupts = <0 35 4>;
};
- serial0: serial@21c0500 {
- device_type = "serial";
- compatible = "fsl,ns16550", "ns16550a";
- reg = <0x0 0x21c0500 0x0 0x100>;
- clock-frequency = <0>; /* Updated by bootloader */
- interrupts = <0 32 0x1>; /* edge triggered */
- };
-
- serial1: serial@21c0600 {
- device_type = "serial";
- compatible = "fsl,ns16550", "ns16550a";
- reg = <0x0 0x21c0600 0x0 0x100>;
- clock-frequency = <0>; /* Updated by bootloader */
- interrupts = <0 32 0x1>; /* edge triggered */
- };
-
dspi: dspi@210 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
--
2.25.1
[PATCH 01/10] arch: arm: dts: fsl-ls1088a.dtsi: add an 'soc' node
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-ls1088a.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 9b7c54b260e2..36ec0ff51f2a 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -35,6 +35,15 @@
<1 10 0x8>; /* Hypervisor PPI, active-low */
};
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-ranges = <0x0 0x0 0x0 0x0 0x1 0x>;
+
+ };
+
i2c0: i2c@200 {
compatible = "fsl,vf610-i2c";
#address-cells = <1>;
--
2.25.1
[PATCH 00/10] Convert LS1088A and LX2160 to DM_SERIAL
This patch set converts the LS1088A and LX216X based boards to DM_SERIAL. Since we don't want to introduce even more differences between the U-Boot's and Linux's device trees, the DT patches make the necessary updates so that the serial nodes are synced with their counterpart. We also update the LS1088A's defconfigs so that DM_SERIAL is enabled. On LX2160A's defconfigs these updates are not needed since DM_SERIAL was already enabled. On the other hand, we did remove the hardcoded PL01X device instantiation from the board files in the last patch. Ioana Ciornei (10): arch: arm: dts: fsl-ls1088a.dtsi: add an 'soc' node arch: arm: dts: fsl-ls1088a.dtsi: move the serial nodes under soc arch: arm: dts: fsl-ls1088a.dtsi: sync serial nodes with Linux arch: arm: dts: fsl-ls1088a.dtsi: tag serial nodes with bootph-all configs: ls1088a: enable DM_SERIAL arch: arm: dts: fsl-lx2160a.dtsi: add an 'soc' node arch: arm: dts: fsl-lx2160a.dtsi: move the serial nodes under soc arch: arm: dts: fsl-lx2160a.dtsi: sync serial nodes with Linux arch: arm: dts: fsl-lx2160a.dtsi: tag serial nodes with bootph-all board: freescale: lx2160a: remove the PL01X device instantiation arch/arm/dts/fsl-ls1088a-qds.dtsi| 8 +++ arch/arm/dts/fsl-ls1088a-rdb.dts | 8 +++ arch/arm/dts/fsl-ls1088a-ten64.dts | 6 +- arch/arm/dts/fsl-ls1088a.dtsi| 61 +++- arch/arm/dts/fsl-lx2160a-qds.dtsi| 11 ++- arch/arm/dts/fsl-lx2160a-rdb.dts | 11 ++- arch/arm/dts/fsl-lx2160a.dtsi| 74 board/freescale/lx2160a/lx2160a.c| 34 - configs/ls1088aqds_tfa_defconfig | 4 +- configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 4 +- configs/ls1088ardb_tfa_defconfig | 4 +- 11 files changed, 138 insertions(+), 87 deletions(-) -- 2.25.1
Re: [PATCH 0/5] Convert the LS208xA RDB/QDS boards to DM_SERIAL
On Tue, Feb 28, 2023 at 11:40:15AM -0500, Tom Rini wrote: > On Tue, Feb 28, 2023 at 06:32:07PM +0200, Ioana Ciornei wrote: > > This patch set converts the LS208xA based boards to DM_SERIAL. > > > > Since we don't want to introduce even more differences between the > > U-Boot's and Linux's device trees the first 4 patches make the necessary > > updates so that the serial nodes are synced with their counterpart. > > > > The last patch just enables DM_SERIAL in the associated configs. > > > > Ioana Ciornei (5): > > arch: arm: dst: fsl-ls2080a.dtsi: add an 'soc' node > > arch: arm: dst: fsl-ls2080a.dtsi: move the serial nodes under soc > > arch: arm: dst: fsl-ls2080a.dts: sync serial nodes with Linux > > arch: arm: dst: fsl-ls2080a.dts: tag serial nodes with bootph-all > > configs: ls208x: enable DM_SERIAL > > > > arch/arm/dts/fsl-ls2080a.dtsi| 57 +++- > > configs/ls2088aqds_tfa_defconfig | 5 +- > > configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 4 +- > > configs/ls2088ardb_tfa_defconfig | 4 +- > > 4 files changed, 53 insertions(+), 17 deletions(-) > > This is good to see. My main question is, can we do a more complete > sync with the upstream dts files? > Sure, that would be the plan. Not in this patch set though. Ioana
[PATCH 5/5] configs: ls208x: enable DM_SERIAL
Now that the DT nodes for the serial devices are in place for these boards, enable DM_SERIAL in the associated configs. Signed-off-by: Ioana Ciornei --- configs/ls2088aqds_tfa_defconfig | 5 +++-- configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 4 +++- configs/ls2088ardb_tfa_defconfig | 4 +++- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index a9faa1525ac7..9f10dd23b283 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -18,7 +18,6 @@ CONFIG_AHCI=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -# CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -113,7 +112,9 @@ CONFIG_DM_RTC=y CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_RTC_DS3231=y CONFIG_DM_SCSI=y -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index 1dd7c1dd808c..f110bee57597 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -100,8 +100,10 @@ CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y CONFIG_RTC_DS3231=y CONFIG_DM_SCSI=y +CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_CONS_INDEX=2 -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index 246ab403754b..6ff4e493dc8b 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -108,8 +108,10 @@ CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y CONFIG_RTC_DS3231=y CONFIG_DM_SCSI=y +CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_CONS_INDEX=2 -CONFIG_SYS_NS16550_SERIAL=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y -- 2.25.1
[PATCH 4/5] arch: arm: dst: fsl-ls2080a.dts: tag serial nodes with bootph-all
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-ls2080a.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 03ef5d5cf6af..d754eb4d5cc8 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -69,6 +69,7 @@
clocks = < QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(4)>;
interrupts = <0 32 0x4>; /* Level high type */
+ bootph-all;
};
serial1: serial@21c0600 {
@@ -77,6 +78,7 @@
clocks = < QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(4)>;
interrupts = <0 32 0x4>; /* Level high type */
+ bootph-all;
};
};
--
2.25.1
[PATCH 3/5] arch: arm: dst: fsl-ls2080a.dts: sync serial nodes with Linux
Sync the serial nodes of the LS208XA RDB/QDS boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-ls2080a.dtsi | 33 +++--
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 2ee426acfd58..03ef5d5cf6af 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -6,18 +6,32 @@
* Copyright 2013-2015 Freescale Semiconductor, Inc.
*/
+#include
+
/ {
compatible = "fsl,ls2080a";
interrupt-parent = <>;
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ serial0 =
+ serial1 =
+ };
+
memory@8000 {
device_type = "memory";
reg = <0x 0x8000 0 0x8000>;
/* DRAM space - 1, size : 2 GB DRAM */
};
+ sysclk: sysclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1>;
+ clock-output-names = "sysclk";
+ };
+
gic: interrupt-controller@600 {
compatible = "arm,gic-v3";
reg = <0x0 0x0600 0 0x1>, /* GIC Dist */
@@ -42,20 +56,27 @@
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x1 0x>;
+ clockgen: clocking@130 {
+ compatible = "fsl,ls2080a-clockgen";
+ reg = <0 0x130 0 0xa>;
+ #clock-cells = <2>;
+ clocks = <>;
+ };
+
serial0: serial@21c0500 {
- device_type = "serial";
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0500 0x0 0x100>;
- clock-frequency = <0>; /* Updated by bootloader */
- interrupts = <0 32 0x1>; /* edge triggered */
+ clocks = < QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ interrupts = <0 32 0x4>; /* Level high type */
};
serial1: serial@21c0600 {
- device_type = "serial";
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0600 0x0 0x100>;
- clock-frequency = <0>; /* Updated by bootloader */
- interrupts = <0 32 0x1>; /* edge triggered */
+ clocks = < QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ interrupts = <0 32 0x4>; /* Level high type */
};
};
--
2.25.1
[PATCH 2/5] arch: arm: dst: fsl-ls2080a.dtsi: move the serial nodes under soc
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-ls2080a.dtsi | 29 ++---
1 file changed, 14 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 77fec065584b..2ee426acfd58 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -42,22 +42,21 @@
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x1 0x>;
- };
-
- serial0: serial@21c0500 {
- device_type = "serial";
- compatible = "fsl,ns16550", "ns16550a";
- reg = <0x0 0x21c0500 0x0 0x100>;
- clock-frequency = <0>; /* Updated by bootloader */
- interrupts = <0 32 0x1>; /* edge triggered */
- };
+ serial0: serial@21c0500 {
+ device_type = "serial";
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21c0500 0x0 0x100>;
+ clock-frequency = <0>; /* Updated by bootloader */
+ interrupts = <0 32 0x1>; /* edge triggered */
+ };
- serial1: serial@21c0600 {
- device_type = "serial";
- compatible = "fsl,ns16550", "ns16550a";
- reg = <0x0 0x21c0600 0x0 0x100>;
- clock-frequency = <0>; /* Updated by bootloader */
- interrupts = <0 32 0x1>; /* edge triggered */
+ serial1: serial@21c0600 {
+ device_type = "serial";
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x0 0x21c0600 0x0 0x100>;
+ clock-frequency = <0>; /* Updated by bootloader */
+ interrupts = <0 32 0x1>; /* edge triggered */
+ };
};
i2c0: i2c@200 {
--
2.25.1
[PATCH 1/5] arch: arm: dst: fsl-ls2080a.dtsi: add an 'soc' node
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-ls2080a.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index a1837454f43d..77fec065584b 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -35,6 +35,15 @@
<1 10 0x8>; /* Hypervisor PPI, active-low */
};
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-ranges = <0x0 0x0 0x0 0x0 0x1 0x>;
+
+ };
+
serial0: serial@21c0500 {
device_type = "serial";
compatible = "fsl,ns16550", "ns16550a";
--
2.25.1
[PATCH 0/5] Convert the LS208xA RDB/QDS boards to DM_SERIAL
This patch set converts the LS208xA based boards to DM_SERIAL. Since we don't want to introduce even more differences between the U-Boot's and Linux's device trees the first 4 patches make the necessary updates so that the serial nodes are synced with their counterpart. The last patch just enables DM_SERIAL in the associated configs. Ioana Ciornei (5): arch: arm: dst: fsl-ls2080a.dtsi: add an 'soc' node arch: arm: dst: fsl-ls2080a.dtsi: move the serial nodes under soc arch: arm: dst: fsl-ls2080a.dts: sync serial nodes with Linux arch: arm: dst: fsl-ls2080a.dts: tag serial nodes with bootph-all configs: ls208x: enable DM_SERIAL arch/arm/dts/fsl-ls2080a.dtsi| 57 +++- configs/ls2088aqds_tfa_defconfig | 5 +- configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 4 +- configs/ls2088ardb_tfa_defconfig | 4 +- 4 files changed, 53 insertions(+), 17 deletions(-) -- 2.25.1
Re: [PATCH 0/5] arm: fsl-layerscape: remove some boards
On Sun, Feb 12, 2023 at 06:17:15PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > These boards are for internal validation, drop them. > > Peng Fan (5): > arm: ls1012: remove ls1012aqds > arm: ls1021: remove ls1021aqds > arm: ls1043: remove ls1043aqds > arm: ls1046: remove ls1046aqds > arm: ls2080: remove ls2080aqds Hi Peng, Why exactly are you removing the support for these boards? The LS208xQDS boards are maintained, I updated them in the past to support DM_ETH and various RCW combinations. I even have a patch set in flight that tries to clean up the board files for Layerscape DPAA2 boards. https://patchwork.ozlabs.org/project/uboot/cover/20230215153119.756383-1-ioana.cior...@nxp.com/ Ioana
[PATCH] arm: dts: ls1088a-rdb: replace 'xgmii' with '10gbase-r'
When the first device tree description was added for the ethernet nodes,
the 2 10G ports on the LS1088ARDB were wrongly described as 'xgmii'.
Fix this by replacing the two last occurrences of 'xgmii' in the device
trees of the Layerscape DPAA2 devices.
Fixes: 68c7c008e84a ("arm: dts: ls1088ardb: add DPMAC and PHY nodes")
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/fsl-ls1088a-rdb.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1088a-rdb.dts b/arch/arm/dts/fsl-ls1088a-rdb.dts
index ad059437b534..01f8fcb61aef 100644
--- a/arch/arm/dts/fsl-ls1088a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1088a-rdb.dts
@@ -19,13 +19,13 @@
{
status = "okay";
- phy-connection-type = "xgmii";
+ phy-connection-type = "10gbase-r";
};
{
status = "okay";
phy-handle = <_phy1>;
- phy-connection-type = "xgmii";
+ phy-connection-type = "10gbase-r";
};
{
--
2.25.1
[PATCH 5/5] board: freescale: ls1088a: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei
---
board/freescale/ls1088a/eth_ls1088aqds.c | 739 +--
board/freescale/ls1088a/eth_ls1088ardb.c | 93 ---
board/freescale/ls1088a/ls1088a.c| 2 +-
3 files changed, 4 insertions(+), 830 deletions(-)
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c
b/board/freescale/ls1088a/eth_ls1088aqds.c
index 8fe643f70b96..f62f5fd27450 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -3,742 +3,9 @@
* Copyright 2017 NXP
*/
-#include
-#include
-#include
-#include
-#include
-#include
#include
#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
-#include
-#include
-
-#include "../common/qixis.h"
-
-#include "ls1088a_qixis.h"
-
-#ifndef CONFIG_DM_ETH
-#ifdef CONFIG_FSL_MC_ENET
-
-#define SFP_TX 0
-
- /* - In LS1088A A there are only 16 SERDES lanes, spread across 2 SERDES
banks.
- * Bank 1 -> Lanes A, B, C, D,
- * Bank 2 -> Lanes A,B, C, D,
- */
-
- /* Mapping of 8 SERDES lanes to LS1088A QDS board slots. A value of '0' here
- * means that the mapping must be determined dynamically, or that the lane
- * maps to something other than a board slot.
- */
-
-static u8 lane_to_slot_fsm1[] = {
- 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-/* On the Vitesse VSC8234XHG SGMII riser card there are 4 SGMII PHYs
- * housed.
- */
-
-static int xqsgii_riser_phy_addr[] = {
- XQSGMII_CARD_PHY1_PORT0_ADDR,
- XQSGMII_CARD_PHY2_PORT0_ADDR,
- XQSGMII_CARD_PHY3_PORT0_ADDR,
- XQSGMII_CARD_PHY4_PORT0_ADDR,
- XQSGMII_CARD_PHY3_PORT2_ADDR,
- XQSGMII_CARD_PHY1_PORT2_ADDR,
- XQSGMII_CARD_PHY4_PORT2_ADDR,
- XQSGMII_CARD_PHY2_PORT2_ADDR,
-};
-
-static int sgmii_riser_phy_addr[] = {
- SGMII_CARD_PORT1_PHY_ADDR,
- SGMII_CARD_PORT2_PHY_ADDR,
- SGMII_CARD_PORT3_PHY_ADDR,
- SGMII_CARD_PORT4_PHY_ADDR,
-};
-
-/* Slot2 does not have EMI connections */
-#define EMI_NONE 0xFF
-#define EMI1_RGMII10
-#define EMI1_RGMII21
-#define EMI1_SLOT1 2
-
-static const char * const mdio_names[] = {
- "LS1088A_QDS_MDIO0",
- "LS1088A_QDS_MDIO1",
- "LS1088A_QDS_MDIO2",
- DEFAULT_WRIOP_MDIO2_NAME,
-};
-
-struct ls1088a_qds_mdio {
- u8 muxval;
- struct mii_dev *realbus;
-};
-
-struct reg_pair {
- uint addr;
- u8 *val;
-};
-
-static void sgmii_configure_repeater(int dpmac)
-{
- struct mii_dev *bus;
- uint8_t a = 0xf;
- int i, j, k, ret;
- unsigned short value;
- const char *dev = "LS1088A_QDS_MDIO2";
- int i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b};
- int i2c_phy_addr = 0;
- int phy_addr = 0;
-
- uint8_t ch_a_eq[] = {0x1, 0x2, 0x3, 0x7};
- uint8_t ch_a_ctl2[] = {0x81, 0x82, 0x83, 0x84};
- uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7};
- uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84};
-
- u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20};
- struct reg_pair reg_pair[10] = {
- {6, _val[0]}, {4, _val[1]},
- {8, _val[2]}, {0xf, NULL},
- {0x11, NULL}, {0x16, NULL},
- {0x18, NULL}, {0x23, _val[3]},
- {0x2d, _val[4]}, {4, _val[5]},
- };
-#if CONFIG_IS_ENABLED(DM_I2C)
- struct udevice *udev;
-#endif
-
- /* Set I2c to Slot 1 */
-#if !CONFIG_IS_ENABLED(DM_I2C)
- ret = i2c_write(0x77, 0, 0, , 1);
-#else
- ret = i2c_get_chip_for_busnum(0, 0x77, 1, );
- if (!ret)
- ret = dm_i2c_write(udev, 0, , 1);
-#endif
- if (ret)
- goto error;
-
- switch (dpmac) {
- case 1:
- i2c_phy_addr = i2c_addr[1];
- phy_addr = 4;
- break;
- case 2:
- i2c_phy_addr = i2c_addr[0];
- phy_addr = 0;
- break;
- case 3:
- i2c_phy_addr = i2c_addr[3];
- phy_addr = 0xc;
- break;
- case 7:
- i2c_phy_addr = i2c_addr[2];
- phy_addr = 8;
- break;
- }
-
- /* Check the PHY status */
- ret = miiphy_set_current_dev(dev);
- if (ret > 0)
- goto error;
-
- bus = mdio_get_current_dev();
- debug("Reading from bus %s\n", bus->name);
-
- ret = miiphy_write(dev, phy_addr, 0x1f, 3);
- if (ret > 0)
- goto error;
-
- mdelay(10);
- ret = miiphy_read(dev, phy_addr, 0x11, );
- if (ret > 0)
- goto error;
-
- mdelay(10);
-
- if ((value & 0xfff) == 0x401) {
- miiphy_write(dev, phy_addr, 0x1f, 0);
- printf("DPMAC %d:PHY
[PATCH 2/5] board: freescale: lx2160a: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/eth_lx2160aqds.c | 825 +-
board/freescale/lx2160a/eth_lx2160ardb.c | 32 -
board/freescale/lx2160a/eth_lx2162aqds.c | 844 +--
board/freescale/lx2160a/lx2160a.c| 6 +-
4 files changed, 8 insertions(+), 1699 deletions(-)
diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c
b/board/freescale/lx2160a/eth_lx2160aqds.c
index 374d0526b42f..9939bb6f89e4 100644
--- a/board/freescale/lx2160a/eth_lx2160aqds.c
+++ b/board/freescale/lx2160a/eth_lx2160aqds.c
@@ -4,575 +4,15 @@
*
*/
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
#include
#include
-#include
#include
-#include
-#include
-
-#include "../common/qixis.h"
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_DM_ETH
-#define EMI_NONE 0
-#define EMI1 1 /* Mdio Bus 1 */
-#define EMI2 2 /* Mdio Bus 2 */
-
-#if defined(CONFIG_FSL_MC_ENET)
-enum io_slot {
- IO_SLOT_NONE = 0,
- IO_SLOT_1,
- IO_SLOT_2,
- IO_SLOT_3,
- IO_SLOT_4,
- IO_SLOT_5,
- IO_SLOT_6,
- IO_SLOT_7,
- IO_SLOT_8,
- EMI1_RGMII1,
- EMI1_RGMII2,
- IO_SLOT_MAX
-};
-
-struct lx2160a_qds_mdio {
- enum io_slot ioslot : 4;
- u8 realbusnum : 4;
- struct mii_dev *realbus;
-};
-
-/* structure explaining the phy configuration on 8 lanes of a serdes*/
-struct serdes_phy_config {
- u8 serdes; /* serdes protocol */
- struct phy_config {
- u8 dpmacid;
- /* -1 terminated array */
- int phy_address[WRIOP_MAX_PHY_NUM + 1];
- u8 mdio_bus;
- enum io_slot ioslot;
- } phy_config[SRDS_MAX_LANES];
-};
-
-/* Table defining the phy configuration on 8 lanes of a serdes.
- * Various assumptions have been made while defining this table.
- * e.g. for serdes1 protocol 19 it is being assumed that X-M11-USXGMII
- * card is being used for dpmac 3-4. (X-M12-XFI could also have been used)
- * And also that this card is connected to IO Slot 1 (could have been connected
- * to any of the 8 IO slots (IO slot 1 - IO slot 8)).
- * similarly, it is also being assumed that MDIO 1 is selected on X-M7-40G card
- * used in serdes1 protocol 19 (could have selected MDIO 2)
- * To override these settings "dpmac" environment variable can be used after
- * defining "dpmac_override" in hwconfig environment variable.
- * This table has limited serdes protocol entries. It can be expanded as per
- * requirement.
- */
-static const struct serdes_phy_config serdes1_phy_config[] = {
- {3, {{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1},
- EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC4, {AQ_PHY_ADDR2, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC5, {AQ_PHY_ADDR3, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC6, {AQ_PHY_ADDR4, -1},
-EMI1, IO_SLOT_1} } },
- {7, {{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1},
- EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC4, {AQ_PHY_ADDR2, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC5, {AQ_PHY_ADDR3, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC6, {AQ_PHY_ADDR4, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC7, {SGMII_CARD_PORT1_PHY_ADDR, -1},
-EMI1, IO_SLOT_2},
- {WRIOP1_DPMAC8, {SGMII_CARD_PORT2_PHY_ADDR, -1},
-EMI1, IO_SLOT_2},
- {WRIOP1_DPMAC9, {SGMII_CARD_PORT3_PHY_ADDR, -1},
-EMI1, IO_SLOT_2},
- {WRIOP1_DPMAC10, {SGMII_CARD_PORT4_PHY_ADDR, -1},
-EMI1, IO_SLOT_2} } },
- {8, {} },
- {13, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC2, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_2} } },
- {14, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1} } },
- {15, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC2, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1} } },
- {17, {{WRIOP1_DPMAC3, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC4, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC5, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC6, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1} } },
- {19, {{WRIOP1_DPMAC2, {CORTINA_PHY_ADDR1, -1},
- EMI1, IO_SLOT_2},
-{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1},
- EMI1, IO_SLOT_1
[PATCH 4/5] board: freescale: ls2080aqds: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei
---
board/freescale/ls2080aqds/eth.c| 981 +---
board/freescale/ls2080aqds/ls2080aqds.c | 2 +-
2 files changed, 4 insertions(+), 979 deletions(-)
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 6da6e5c84152..0d0d5de15623 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -3,987 +3,12 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include
-#include
-#include
-#include
-#include
#include
#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
-#include
-#include
-
-#include "../common/qixis.h"
-
-#include "ls2080aqds_qixis.h"
#define MC_BOOT_ENV_VAR "mcinitcmd"
-#ifndef CONFIG_DM_ETH
-
-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
- /* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
- * Bank 1 -> Lanes A, B, C, D, E, F, G, H
- * Bank 2 -> Lanes A,B, C, D, E, F, G, H
- */
-
- /* Mapping of 16 SERDES lanes to LS2080A QDS board slots. A value of '0' here
- * means that the mapping must be determined dynamically, or that the lane
- * maps to something other than a board slot.
- */
-
-static u8 lane_to_slot_fsm1[] = {
- 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-static u8 lane_to_slot_fsm2[] = {
- 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-/* On the Vitesse VSC8234XHG SGMII riser card there are 4 SGMII PHYs
- * housed.
- */
-
-static int xqsgii_riser_phy_addr[] = {
- XQSGMII_CARD_PHY1_PORT0_ADDR,
- XQSGMII_CARD_PHY2_PORT0_ADDR,
- XQSGMII_CARD_PHY3_PORT0_ADDR,
- XQSGMII_CARD_PHY4_PORT0_ADDR,
- XQSGMII_CARD_PHY3_PORT2_ADDR,
- XQSGMII_CARD_PHY1_PORT2_ADDR,
- XQSGMII_CARD_PHY4_PORT2_ADDR,
- XQSGMII_CARD_PHY2_PORT2_ADDR,
-};
-
-static int sgmii_riser_phy_addr[] = {
- SGMII_CARD_PORT1_PHY_ADDR,
- SGMII_CARD_PORT2_PHY_ADDR,
- SGMII_CARD_PORT3_PHY_ADDR,
- SGMII_CARD_PORT4_PHY_ADDR,
-};
-
-/* Slot2 does not have EMI connections */
-#define EMI_NONE 0xFF
-#define EMI1_SLOT1 0
-#define EMI1_SLOT2 1
-#define EMI1_SLOT3 2
-#define EMI1_SLOT4 3
-#define EMI1_SLOT5 4
-#define EMI1_SLOT6 5
-#define EMI2 6
-#define SFP_TX 0
-
-static const char * const mdio_names[] = {
- "LS2080A_QDS_MDIO0",
- "LS2080A_QDS_MDIO1",
- "LS2080A_QDS_MDIO2",
- "LS2080A_QDS_MDIO3",
- "LS2080A_QDS_MDIO4",
- "LS2080A_QDS_MDIO5",
- DEFAULT_WRIOP_MDIO2_NAME,
-};
-
-struct ls2080a_qds_mdio {
- u8 muxval;
- struct mii_dev *realbus;
-};
-
-struct reg_pair {
- uint addr;
- u8 *val;
-};
-
-static void sgmii_configure_repeater(int serdes_port)
-{
- struct mii_dev *bus;
- uint8_t a = 0xf;
- int i, j, k, ret;
- int dpmac_id = 0, dpmac, mii_bus = 0;
- unsigned short value;
- char dev[2][20] = {"LS2080A_QDS_MDIO0", "LS2080A_QDS_MDIO3"};
- uint8_t i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5f, 0x60};
-
- uint8_t ch_a_eq[] = {0x1, 0x2, 0x3, 0x7};
- uint8_t ch_a_ctl2[] = {0x81, 0x82, 0x83, 0x84};
- uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7};
- uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84};
-
- u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20};
- struct reg_pair reg_pair[10] = {
- {6, _val[0]}, {4, _val[1]},
- {8, _val[2]}, {0xf, NULL},
- {0x11, NULL}, {0x16, NULL},
- {0x18, NULL}, {0x23, _val[3]},
- {0x2d, _val[4]}, {4, _val[5]},
- };
-
- int *riser_phy_addr = _riser_phy_addr[0];
-#if CONFIG_IS_ENABLED(DM_I2C)
- struct udevice *udev;
-#endif
-
- /* Set I2c to Slot 1 */
-#if !CONFIG_IS_ENABLED(DM_I2C)
- ret = i2c_write(0x77, 0, 0, , 1);
-#else
- ret = i2c_get_chip_for_busnum(0, 0x77, 1, );
- if (!ret)
- ret = dm_i2c_write(udev, 0, , 1);
-#endif
- if (ret)
- goto error;
-
- for (dpmac = 0; dpmac < 8; dpmac++) {
- /* Check the PHY status */
- switch (serdes_port) {
- case 1:
- mii_bus = 0;
- dpmac_id = dpmac + 1;
- break;
- case 2:
- mii_bus = 1;
- dpmac_id = dpmac + 9;
- a = 0xb;
-#if !CONFIG_IS_ENABLED(DM_I2C)
- ret = i2c_write(0x76, 0, 0, , 1);
-#else
- ret = i2c_get_chip_for_busnum(0, 0x76, 1, );
- if (!ret)
- ret = dm_i2c_write(ud
[PATCH 3/5] board: freescale: ls2080rdb: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei
---
board/freescale/ls2080ardb/eth_ls2080rdb.c | 95 --
board/freescale/ls2080ardb/ls2080ardb.c| 2 +-
2 files changed, 1 insertion(+), 96 deletions(-)
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c
b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index 7034bc6e5d21..44d9782d729f 100644
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -4,104 +4,13 @@
*
*/
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
-#include
#include
-#include
DECLARE_GLOBAL_DATA_PTR;
int board_eth_init(struct bd_info *bis)
{
-#ifndef CONFIG_DM_ETH
-#if defined(CONFIG_FSL_MC_ENET)
- int i, interface;
- struct memac_mdio_info mdio_info;
- struct mii_dev *dev;
- struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
- u32 srds_s1;
- struct memac_mdio_controller *reg;
-
- srds_s1 = in_le32(>rcwsr[28]) &
- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
- srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT;
-
- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1;
- mdio_info.regs = reg;
- mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME;
-
- /* Register the EMI 1 */
- fm_memac_mdio_init(bis, _info);
-
- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2;
- mdio_info.regs = reg;
- mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME;
-
- /* Register the EMI 2 */
- fm_memac_mdio_init(bis, _info);
-
- switch (srds_s1) {
- case 0x2A:
- wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
- wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
- wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
- wriop_set_phy_address(WRIOP1_DPMAC5, 0, AQ_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC6, 0, AQ_PHY_ADDR2);
- wriop_set_phy_address(WRIOP1_DPMAC7, 0, AQ_PHY_ADDR3);
- wriop_set_phy_address(WRIOP1_DPMAC8, 0, AQ_PHY_ADDR4);
-
- break;
- case 0x4B:
- wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
- wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
- wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
-
- break;
- default:
- printf("SerDes1 protocol 0x%x is not supported on LS2080aRDB\n",
- srds_s1);
- break;
- }
-
- for (i = WRIOP1_DPMAC1; i <= WRIOP1_DPMAC4; i++) {
- interface = wriop_get_enet_if(i);
- switch (interface) {
- case PHY_INTERFACE_MODE_XGMII:
- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME);
- wriop_set_mdio(i, dev);
- break;
- default:
- break;
- }
- }
-
- for (i = WRIOP1_DPMAC5; i <= WRIOP1_DPMAC8; i++) {
- switch (wriop_get_enet_if(i)) {
- case PHY_INTERFACE_MODE_XGMII:
- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME);
- wriop_set_mdio(i, dev);
- break;
- default:
- break;
- }
- }
-
- cpu_eth_init(bis);
-#endif /* CONFIG_FSL_MC_ENET */
-#endif /* !CONFIG_DM_ETH */
#ifdef CONFIG_PHY_AQUANTIA
/*
@@ -116,11 +25,7 @@ int board_eth_init(struct bd_info *bis)
gd->jt->miiphy_set_current_dev = miiphy_set_current_dev;
#endif
-#ifdef CONFIG_DM_ETH
return 0;
-#else
- return pci_eth_init(bis);
-#endif
}
#if defined(CONFIG_RESET_PHY_R)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index aa2d65b45b89..a7fc2b207660 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -297,7 +297,7 @@ int board_init(void)
out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK);
#endif
-#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT)
pci_init();
#endif
--
2.25.1
[PATCH 1/5] board: freescale: lx2160a: remove hardcoded ethernet initialization
The LX2160ARDB board has support for DM_ETH probed devices, which means
that we do not need to manually create an MDIO controller, register it,
create PHYs on it etc.
In order to cleanup the board file a bit, just remove this code entirely.
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/eth_lx2160ardb.c | 144 ---
1 file changed, 144 deletions(-)
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c
b/board/freescale/lx2160a/eth_lx2160ardb.c
index 8a9c60f46cd5..69f3e817915b 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -5,158 +5,14 @@
*/
#include
-#include
-#include
-#include
#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
-#include
#include
-#include
-#include "lx2160a.h"
DECLARE_GLOBAL_DATA_PTR;
-static bool get_inphi_phy_id(struct mii_dev *bus, int addr, int devad)
-{
- int phy_reg;
- u32 phy_id;
-
- phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
- phy_id = (phy_reg & 0x) << 16;
-
- phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
- phy_id |= (phy_reg & 0x);
-
- if (phy_id == PHY_UID_IN112525_S03)
- return true;
- else
- return false;
-}
-
int board_eth_init(struct bd_info *bis)
{
-#if defined(CONFIG_FSL_MC_ENET)
- struct memac_mdio_info mdio_info;
- struct memac_mdio_controller *reg;
- int i, interface;
- struct mii_dev *dev;
- struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
- u32 srds_s1;
-
- srds_s1 = in_le32(>rcwsr[28]) &
- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
- srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT;
-
- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1;
- mdio_info.regs = reg;
- mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME;
-
- /* Register the EMI 1 */
- fm_memac_mdio_init(bis, _info);
-
- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2;
- mdio_info.regs = reg;
- mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME;
-
- /* Register the EMI 2 */
- fm_memac_mdio_init(bis, _info);
-
- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME);
- switch (srds_s1) {
- case 19:
- wriop_set_phy_address(WRIOP1_DPMAC2, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC3, 0,
- AQR107_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC4, 0,
- AQR107_PHY_ADDR2);
- if (get_inphi_phy_id(dev, INPHI_PHY_ADDR1, MDIO_MMD_VEND1)) {
- wriop_set_phy_address(WRIOP1_DPMAC5, 0,
- INPHI_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC6, 0,
- INPHI_PHY_ADDR1);
- }
- wriop_set_phy_address(WRIOP1_DPMAC17, 0,
- RGMII_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC18, 0,
- RGMII_PHY_ADDR2);
- break;
-
- case 18:
- wriop_set_phy_address(WRIOP1_DPMAC7, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC8, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC9, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC10, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC3, 0,
- AQR107_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC4, 0,
- AQR107_PHY_ADDR2);
- if (get_inphi_phy_id(dev, INPHI_PHY_ADDR1, MDIO_MMD_VEND1)) {
- wriop_set_phy_address(WRIOP1_DPMAC5, 0,
- INPHI_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC6, 0,
- INPHI_PHY_ADDR1);
- }
- wriop_set_phy_address(WRIOP1_DPMAC17, 0,
- RGMII_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC18, 0,
- RGMII_PHY_ADDR2);
- break;
-
- default:
- printf("SerDes1 protocol 0x%x is not supported on LX2160ARDB\n",
- srds_s1);
- goto next;
- }
-
- for (i = WRIOP1_DPMAC2; i <= WRIOP1_DPMAC10; i++) {
- interface = wriop_get_enet_if(i);
- switch (interface) {
- ca
[PATCH 0/5] board: freescale: remove non-DM_ETH code for Layerscape DPAA2 platforms
Now that DM_ETH is enabled by default and even the ldpaa_eth driver
doesn't have support for the non-DM_ETH use case (see commit below),
remove non-DM_ETH code from the board files.
commit cde5a844fbba ("net: ldpaa_eth: Remove non-DM_ETH code")
There is no point in keeping around the creation of the MDIO bus or the
hardcoded MDIO PHY addresses since we have these described in the DTS.
And if there is any RCW combination which is still not supported /
described by DTS we can always look in the commit history.
Ioana Ciornei (5):
board: freescale: lx2160a: remove hardcoded ethernet initialization
board: freescale: lx2160a: remove code under !CONFIG_DM_ETH
board: freescale: ls2080rdb: remove code under !CONFIG_DM_ETH
board: freescale: ls2080aqds: remove code under !CONFIG_DM_ETH
board: freescale: ls1088a: remove code under !CONFIG_DM_ETH
board/freescale/ls1088a/eth_ls1088aqds.c | 739 +---
board/freescale/ls1088a/eth_ls1088ardb.c | 93 --
board/freescale/ls1088a/ls1088a.c | 2 +-
board/freescale/ls2080aqds/eth.c | 981 +
board/freescale/ls2080aqds/ls2080aqds.c| 2 +-
board/freescale/ls2080ardb/eth_ls2080rdb.c | 95 --
board/freescale/ls2080ardb/ls2080ardb.c| 2 +-
board/freescale/lx2160a/eth_lx2160aqds.c | 825 +
board/freescale/lx2160a/eth_lx2160ardb.c | 176
board/freescale/lx2160a/eth_lx2162aqds.c | 844 +-
board/freescale/lx2160a/lx2160a.c | 6 +-
11 files changed, 17 insertions(+), 3748 deletions(-)
--
2.25.1
[PATCH 2/2] drivers: net: fsl-mc: fix MAC address fixup procedure
In the process of adopting CONFIG_DM_ETH on the DPAA2 based platforms,
interfaces which were previously defined as "xgmii" were transitioned to
be defined as "xfi" in the DTS.
See the commit below for reference:
commit 87274918f2f4 ("arm: dts: ls2088ardb: add DPMAC and PHY nodes")
Then Vladimir's commit replaced all occurrences of "xfi" with
"10gbase-r" in an effort to make U-Boot work with the same device tree
as Linux.
commit 77b11f760416 ("net: replace the "xfi" phy-mode with "10gbase-r"")
These changes to the phy_interface_t of an Ethernet port meant that the
mc_fixup_mac_addrs() function was no longer capable to properly fixup
the MAC addresses. The problem arises from the fact that the hardcoded
information about an interface (wriop_get_enet_if()) was no longer
matching any actual device.
For example, the function tried to search for "DPMAC1@xgmii1" by name
using eth_get_dev_by_name() when only "DPMAC1@10gbase-r" was available.
This function removes the need to rely on the hardcoded information by
iterating through all the UCLASS_ETH devices which are DPAA2 and request
a fixup for each of them.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/mc.c | 31 +--
1 file changed, 13 insertions(+), 18 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 4f84403d956c..78a40f285aa2 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
#define MC_RAM_BASE_ADDR_ALIGNMENT_MASK(~(MC_RAM_BASE_ADDR_ALIGNMENT -
1))
@@ -383,37 +384,31 @@ static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type)
{
- int i, err = 0, ret = 0;
-#define ETH_NAME_LEN 20
struct udevice *eth_dev;
- char ethname[ETH_NAME_LEN];
-
- for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
- /* port not enabled */
- if (wriop_is_enabled_dpmac(i) != 1)
- continue;
-
- snprintf(ethname, ETH_NAME_LEN, "DPMAC%d@%s", i,
-phy_interface_strings[wriop_get_enet_if(i)]);
-
- eth_dev = eth_get_dev_by_name(ethname);
- if (eth_dev == NULL)
+ int err = 0, ret = 0;
+ struct uclass *uc;
+ uint32_t dpmac_id;
+
+ uclass_get(UCLASS_ETH, );
+ uclass_foreach_dev(eth_dev, uc) {
+ if (!eth_dev->driver || !eth_dev->driver->name ||
+ strcmp(eth_dev->driver->name, LDPAA_ETH_DRIVER_NAME))
continue;
+ dpmac_id = ldpaa_eth_get_dpmac_id(eth_dev);
switch (type) {
case MC_FIXUP_DPL:
- err = mc_fixup_dpl_mac_addr(blob, i, eth_dev);
+ err = mc_fixup_dpl_mac_addr(blob, dpmac_id, eth_dev);
break;
case MC_FIXUP_DPC:
- err = mc_fixup_dpc_mac_addr(blob, i, eth_dev);
+ err = mc_fixup_dpc_mac_addr(blob, dpmac_id, eth_dev);
break;
default:
break;
}
if (err)
- printf("fsl-mc: ERROR fixing mac address for %s\n",
- ethname);
+ printf("fsl-mc: ERROR fixing mac address for %s\n",
eth_dev->name);
ret |= err;
}
--
2.25.1
[PATCH 1/2] drivers: net: ldpaa: export driver name and API to get DPMAC id
Export the ldpaa_eth_get_dpmac_id() function so that it can be used from
other drivers, especially by fsl-mc which will need it the next patch.
Also, create a macro for the Ethernet ldpaa driver name and export it as
well.
Signed-off-by: Ioana Ciornei
---
drivers/net/ldpaa_eth/ldpaa_eth.c | 7 ---
include/net/ldpaa_eth.h | 15 +++
2 files changed, 19 insertions(+), 3 deletions(-)
create mode 100644 include/net/ldpaa_eth.h
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c
b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 24850777949a..2cb6e9b7d705 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014-2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017, 2023 NXP
*/
#include
@@ -21,6 +21,7 @@
#include
#include
#include
+#include
#include "ldpaa_eth.h"
#ifdef CONFIG_PHYLIB
@@ -995,7 +996,7 @@ static int ldpaa_eth_probe(struct udevice *dev)
return 0;
}
-static uint32_t ldpaa_eth_get_dpmac_id(struct udevice *dev)
+uint32_t ldpaa_eth_get_dpmac_id(struct udevice *dev)
{
int port_node = dev_of_offset(dev);
@@ -1049,7 +1050,7 @@ static const struct udevice_id ldpaa_eth_of_ids[] = {
};
U_BOOT_DRIVER(ldpaa_eth) = {
- .name = "ldpaa_eth",
+ .name = LDPAA_ETH_DRIVER_NAME,
.id = UCLASS_ETH,
.of_match = ldpaa_eth_of_ids,
.of_to_plat = ldpaa_eth_of_to_plat,
diff --git a/include/net/ldpaa_eth.h b/include/net/ldpaa_eth.h
new file mode 100644
index ..7474bfaeec30
--- /dev/null
+++ b/include/net/ldpaa_eth.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2023 NXP
+ */
+
+#define LDPAA_ETH_DRIVER_NAME "ldpaa_eth"
+
+/**
+ * ldpaa_eth_get_dpmac_id() - Get the dpmac_id of a DPAA2 ethernet device
+ *
+ * @dev: DPAA2 ethernet udevice pointer
+ * Return: requested dpmac_id
+ */
+
+uint32_t ldpaa_eth_get_dpmac_id(struct udevice *dev);
--
2.25.1
[PATCH 0/2] drivers: net: fsl-mc: fix MAC address fixup procedure
This patch set fixes the MAC address fixup procedure which was impacted by several changes in the phy_interface_t used to describe some interfaces. The transitions from "xgmii" to "xfi" and then finally to "10gbase-r" were involved. The first patch just exports a function to identify the DPMAC id of an UCLASS_ETH device and the DPAA2 driver name as a macro. Ioana Ciornei (2): drivers: net: ldpaa: export driver name and API to get DPMAC id drivers: net: fsl-mc: fix MAC address fixup procedure drivers/net/fsl-mc/mc.c | 31 +-- drivers/net/ldpaa_eth/ldpaa_eth.c | 7 --- include/net/ldpaa_eth.h | 15 +++ 3 files changed, 32 insertions(+), 21 deletions(-) create mode 100644 include/net/ldpaa_eth.h -- 2.25.1
Re: [PATCH 1/7] drivers: net: fsl-mc: remove useless assignment of variable
On Tue, Jan 10, 2023 at 07:04:00PM +0200, Ramon Fried wrote:
> On Thu, Jan 5, 2023 at 5:03 PM Ioana Ciornei wrote:
> >
> > The cur_ptr variable is set to the start of the log buffer but then it's
> > not used. Just remove the assignment altogether.
> >
> > Signed-off-by: Ioana Ciornei
> > ---
> > drivers/net/fsl-mc/mc.c | 1 -
> > 1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
> > index 6b36860187ca..66fcb48ebd55 100644
> > --- a/drivers/net/fsl-mc/mc.c
> > +++ b/drivers/net/fsl-mc/mc.c
> > @@ -1796,7 +1796,6 @@ static void mc_dump_log(void)
> > if (size > bytes_end) {
> > print_k_bytes(cur_ptr, _end);
> >
> > - cur_ptr = buf;
> > size -= bytes_end;
> > }
> >
> > --
> > 2.25.1
> >
> Reviewed-by: Ramon Fried
Thanks for the reviews!
These kind of network patches go through the u-boot-net tree or is there
another path?
Ioana
[PATCH] drivers: net: fsl_ls_mdio: prevent a NULL pointer dereference
Prevent a NULL pointer dereference in the probe path by checking the return valud of dev_read_addr_ptr() against NULL. Signed-off-by: Ioana Ciornei --- drivers/net/fsl_ls_mdio.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/fsl_ls_mdio.c b/drivers/net/fsl_ls_mdio.c index f213e0dd8590..fce73937502d 100644 --- a/drivers/net/fsl_ls_mdio.c +++ b/drivers/net/fsl_ls_mdio.c @@ -124,6 +124,9 @@ static int fsl_ls_mdio_probe(struct udevice *dev) struct memac_mdio_controller *regs; priv->regs_base = dev_read_addr_ptr(dev); + if (!priv->regs_base) + return -ENODEV; + regs = (struct memac_mdio_controller *)(priv->regs_base); memac_setbits_32(>mdio_stat, -- 2.25.1
[PATCH 5/7] drivers: net: fsl-mc: remove explicit cast
Remove all the explicit casts from the void* returned by calloc.
With this we also improve a bit the length of those lines and there is
no need to split the assignment.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/mc.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 001c77ba8355..5ad47e3414b5 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -812,7 +812,7 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
* Initialize the global default MC portal
* And check that the MC firmware is responding portal commands:
*/
- root_mc_io = (struct fsl_mc_io *)calloc(sizeof(struct fsl_mc_io), 1);
+ root_mc_io = calloc(sizeof(struct fsl_mc_io), 1);
if (!root_mc_io) {
printf(" No memory: calloc() failed\n");
return -ENOMEM;
@@ -979,8 +979,7 @@ static int dpio_init(void)
int err = 0;
uint16_t major_ver, minor_ver;
- dflt_dpio = (struct fsl_dpio_obj *)calloc(
- sizeof(struct fsl_dpio_obj), 1);
+ dflt_dpio = calloc(sizeof(struct fsl_dpio_obj), 1);
if (!dflt_dpio) {
printf("No memory: calloc() failed\n");
err = -ENOMEM;
@@ -1168,7 +1167,7 @@ static int dprc_init(void)
goto err_create;
}
- dflt_mc_io = (struct fsl_mc_io *)calloc(sizeof(struct fsl_mc_io), 1);
+ dflt_mc_io = calloc(sizeof(struct fsl_mc_io), 1);
if (!dflt_mc_io) {
err = -ENOMEM;
printf(" No memory: calloc() failed\n");
@@ -1250,8 +1249,7 @@ static int dpbp_init(void)
struct dpbp_cfg dpbp_cfg;
uint16_t major_ver, minor_ver;
- dflt_dpbp = (struct fsl_dpbp_obj *)calloc(
- sizeof(struct fsl_dpbp_obj), 1);
+ dflt_dpbp = calloc(sizeof(struct fsl_dpbp_obj), 1);
if (!dflt_dpbp) {
printf("No memory: calloc() failed\n");
err = -ENOMEM;
@@ -1369,8 +1367,7 @@ static int dpni_init(void)
struct dpni_cfg dpni_cfg;
uint16_t major_ver, minor_ver;
- dflt_dpni = (struct fsl_dpni_obj *)calloc(
- sizeof(struct fsl_dpni_obj), 1);
+ dflt_dpni = calloc(sizeof(struct fsl_dpni_obj), 1);
if (!dflt_dpni) {
printf("No memory: calloc() failed\n");
err = -ENOMEM;
--
2.25.1
[PATCH 7/7] drivers: net: fsl-mc: do not use multiple blank lines
Remove the instances in which we have multiple blank lines.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/mc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 531835fbd503..f78f070aec1c 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -526,7 +526,6 @@ static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size,
u64 mc_dpc_addr)
return 0;
}
-
static int mc_fixup_dpl(u64 dpl_addr)
{
void *blob = (void *)dpl_addr;
@@ -698,7 +697,6 @@ static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
printf("SUCCESS\n");
}
-
*final_reg_gsr = reg_gsr;
return 0;
}
--
2.25.1
[PATCH 6/7] drivers: net: fsl-mc: align parameters to the open paranthesis
There were some cases in which the function parameters were not aligned
to the open paranthesis. Fix those instances.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/mc.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 5ad47e3414b5..531835fbd503 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -356,8 +356,7 @@ static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
if (noff < 0) {
err = fdt_increase_size(blob, 200);
if (err) {
- printf("fdt_increase_size: err=%s\n",
- fdt_strerror(err));
+ printf("fdt_increase_size: err=%s\n",
fdt_strerror(err));
return err;
}
@@ -373,7 +372,7 @@ static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
"link_type", link_type_mode);
if (err) {
printf("fdt_appendprop_string: err=%s\n",
- fdt_strerror(err));
+ fdt_strerror(err));
return err;
}
}
@@ -1158,10 +1157,9 @@ static int dprc_init(void)
cfg.icid = DPRC_GET_ICID_FROM_POOL;
cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL;
err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
- root_dprc_handle,
- ,
- _dprc_id,
- _portal_offset);
+ root_dprc_handle, ,
+ _dprc_id,
+ _portal_offset);
if (err < 0) {
printf("dprc_create_container() failed: %d\n", err);
goto err_create;
--
2.25.1
[PATCH 4/7] drivers: net: fsl-mc: remove the initialisation of global variables
Some of the global variables were being initialised either to NULL or 0. This is not needed, just remove the it. Signed-off-by: Ioana Ciornei --- drivers/net/fsl-mc/mc.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index 440273a17562..001c77ba8355 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -57,14 +57,14 @@ static int mc_dpl_applied = -1; #ifdef CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET static int mc_aiop_applied = -1; #endif -struct fsl_mc_io *root_mc_io = NULL; -struct fsl_mc_io *dflt_mc_io = NULL; /* child container */ -uint16_t root_dprc_handle = 0; -uint16_t dflt_dprc_handle = 0; +struct fsl_mc_io *root_mc_io; +struct fsl_mc_io *dflt_mc_io; +uint16_t root_dprc_handle; +uint16_t dflt_dprc_handle; int child_dprc_id; -struct fsl_dpbp_obj *dflt_dpbp = NULL; -struct fsl_dpio_obj *dflt_dpio = NULL; -struct fsl_dpni_obj *dflt_dpni = NULL; +struct fsl_dpbp_obj *dflt_dpbp; +struct fsl_dpio_obj *dflt_dpio; +struct fsl_dpni_obj *dflt_dpni; static u64 mc_lazy_dpl_addr; static u32 dpsparser_obj_id; static u16 dpsparser_handle; -- 2.25.1
[PATCH 3/7] drivers: net: fsl-mc: do not prefix decimal values with 0x
The fsl-mc driver printed debug information which used the 0x prefix for
decimal values. This only confuses anyone looking through the log.
Because of this, just remove the prefix and use the "DPXY." notation
which is the standard one for the DPAA2 objects.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/mc.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 180e57e42266..440273a17562 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -1038,7 +1038,7 @@ static int dpio_init(void)
}
#ifdef DEBUG
- printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
+ printf("Init: DPIO.%d\n", dflt_dpio->dpio_id);
#endif
err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
if (err < 0) {
@@ -1107,7 +1107,7 @@ static int dpio_exit(void)
}
#ifdef DEBUG
- printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
+ printf("Exit: DPIO.%d\n", dflt_dpio->dpio_id);
#endif
if (dflt_dpio)
@@ -1312,7 +1312,7 @@ static int dpbp_init(void)
}
#ifdef DEBUG
- printf("Init: DPBP id=0x%x\n", dflt_dpbp->dpbp_attr.id);
+ printf("Init: DPBP.%d\n", dflt_dpbp->dpbp_attr.id);
#endif
err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
@@ -1351,7 +1351,7 @@ static int dpbp_exit(void)
}
#ifdef DEBUG
- printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
+ printf("Exit: DPBP.%d\n", dflt_dpbp->dpbp_attr.id);
#endif
if (dflt_dpbp)
@@ -1422,7 +1422,7 @@ static int dpni_init(void)
}
#ifdef DEBUG
- printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
+ printf("Init: DPNI.%d\n", dflt_dpni->dpni_id);
#endif
err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
if (err < 0) {
@@ -1459,7 +1459,7 @@ static int dpni_exit(void)
}
#ifdef DEBUG
- printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
+ printf("Exit: DPNI.%d\n", dflt_dpni->dpni_id);
#endif
if (dflt_dpni)
--
2.25.1
[PATCH 2/7] drivers: net: fsl-mc: remove an useless break statement
The break statement is just after a goto statement, thus it will not get
executed. Just remove it.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/mc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 66fcb48ebd55..180e57e42266 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -1961,7 +1961,6 @@ static int do_fsl_mc(struct cmd_tbl *cmdtp, int flag, int
argc,
default:
printf("Invalid option: %s\n", argv[1]);
goto usage;
- break;
}
return err;
usage:
--
2.25.1
[PATCH 1/7] drivers: net: fsl-mc: remove useless assignment of variable
The cur_ptr variable is set to the start of the log buffer but then it's
not used. Just remove the assignment altogether.
Signed-off-by: Ioana Ciornei
---
drivers/net/fsl-mc/mc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 6b36860187ca..66fcb48ebd55 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -1796,7 +1796,6 @@ static void mc_dump_log(void)
if (size > bytes_end) {
print_k_bytes(cur_ptr, _end);
- cur_ptr = buf;
size -= bytes_end;
}
--
2.25.1
[PATCH 0/7] drivers: net: fsl-mc: cleanup coding style
This patch set tries to cleanup the mc.c source file a bit. The first two patches remove an useless assignment and a brake statement. Then we fix some debug logs by making sure that we do not print decimal values with a 0x prefix. Patches 4-7 just clean-up the coding style a bit and also some of the checkpatch warnings. Ioana Ciornei (7): drivers: net: fsl-mc: remove useless assignment of variable drivers: net: fsl-mc: remove an useless break statement drivers: net: fsl-mc: do not prefix decimal values with 0x drivers: net: fsl-mc: remove the initialisation of global variables drivers: net: fsl-mc: remove explicit cast drivers: net: fsl-mc: align parameters to the open paranthesis drivers: net: fsl-mc: do not use multiple blank lines drivers/net/fsl-mc/mc.c | 55 + 1 file changed, 23 insertions(+), 32 deletions(-) -- 2.25.1
Re: LX2106A U-Boot: board_eth_init() not called any more
On Wed, Nov 09, 2022 at 08:24:27AM -0500, Tom Rini wrote: > On Wed, Nov 09, 2022 at 12:48:59PM +0200, Ioana Ciornei wrote: > > > From: Stefan Roese > > > Subject: LX2106A U-Boot: board_eth_init() not called any more > > > [snip] > > I suspect there's unused code in the board directory that should be > removed then, can we please get that cleaned up? Thanks. > Yes, there are a bunch of '#ifndef CONFIG_DM_ETH' in the board files. I will put this cleanup on my list. Ioana
Re: LX2106A U-Boot: board_eth_init() not called any more
On Wed, Nov 09, 2022 at 02:29:56PM +0100, Stefan Roese wrote: > Hi Ioana, > [snip] > > fsl-mc: Booting Management Complex ... SUCCESS > > fsl-mc: Management Complex booted (version: 10.24.0, boot status: 0x1) > > Hit any key to stop autoboot: 0 > > => setenv ethact DPMAC3@usxgmii > > => setenv ipaddr 10.0.0.1 > > => ping 10.0.0.2 > > DPMAC3@usxgmii Waiting for PHY auto negotiation to complete.Using > > DPMAC3@usxgmii device > > host 10.0.0.2 is alive > > Great. Many thanks for this testing this. I need to check what needs to > be done on our custom LX2160 based board in the dts/dtsi files and > corresponding drivers to fully support operation with DM_ETH enabled > now. > Mainly you would need to populate the dpmacX DTS nodes corresponding to the interfaces enabled in your RCW setup and any PHY which they are using. The 'fsl-lx2160a-rdb.dts' can be a reference for your board. > BTW: You might want to send a patch removing the now obsolete > board_eth_init() functions in board/freescale/*. > Yes, I should do that since it's removed for good now. Ioana
RE: LX2106A U-Boot: board_eth_init() not called any more
> From: Stefan Roese
> Subject: LX2106A U-Boot: board_eth_init() not called any more
>
> Dear NXP LX2160 developers!
>
Hi!
> With commit 94633c36f9eb ("net: Make DM_ETH be selected by NETDEVICE")
> DM_ETH is now mandatory. And net/eth_legacy.c is not compiled anymore.
> Resulting in board_eth_init() not being called anymore. On NXP LX2160
> platforms (and some other NXP platforms as well), this functions and
> the legacy net/eth infrastructure seems still to be used AFAICT.
>
> So could you please let me know, if and how ethernet support on these
> boards is supposed to work with recent U-Boot versions on LX2160? My
> understanding is, that the current versions will result in an output
> like this:
>
> ...
> In:serial_pl01x
> Out: serial_pl01x
> Err: serial_pl01x
> SEC0: RNG instantiated
> Net: No ethernet found.
> ...
>
> Or did I miss something?
>
I am not exactly sure what you missed but ethernet support under DM_ETH
for the DPAA2 based boards was added more than 2 years ago in the
upstream.
For example, the LX2160ARDB board does no longer rely on the
board_eth_init() function but rather it discovers its ethernet
interfaces, any connected PHY etc using the DTS file (just like Linux
does).
There are multiple patch sets that I submitted which made this support
available. For reference, I will list below just some patches which
added DM_ETH support for LX2160ARDB.
8d3495023880 ("arm: dts: lx2160a: add external MDIO nodes")
f660f7af1dcb ("arm: dts: lx2160ardb: add DPMAC and PHY nodes")
643f5b47ec06 ("configs: lx2160ardb: enable CONFIG_DM_ETH and related")
And to double check, I just booted a LX2160ARDB board
(lx2160ardb_tfa_defconfig) with the latest u-boot from upstream and from
the log below you can see that the DPAA2 ethernet interfaces are
available.
U-Boot 2023.01-rc1-00019-g77b5cc2948f5 (Nov 09 2022 - 11:25:19 +0200)
SoC: LX2160ACE Rev2.0 (0x87360020)
Clock Configuration:
CPU0(A72):2200 MHz CPU1(A72):2200 MHz CPU2(A72):2200 MHz
CPU3(A72):2200 MHz CPU4(A72):2200 MHz CPU5(A72):2200 MHz
CPU6(A72):2200 MHz CPU7(A72):2200 MHz CPU8(A72):2200 MHz
CPU9(A72):2200 MHz CPU10(A72):2200 MHz CPU11(A72):2200 MHz
CPU12(A72):2200 MHz CPU13(A72):2200 MHz CPU14(A72):2200 MHz
CPU15(A72):2200 MHz
Bus: 750 MHz DDR: 3200 MT/s
Reset Configuration Word (RCW):
: 5883833c 24580058
0010: 0c01
0020: 036001a0 2580 0096
0030:
0040:
0050:
0060: 00027000
0070: 08b30010 00150020
Model: NXP Layerscape LX2160ARDB Board
Board: LX2160ACE Rev2.0-RDB, Board version: B, boot from FlexSPI DEV#1
FPGA: v4.0
SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 161.13MHz
SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz
SERDES3 Reference: Clock1 = 100MHz Clock2 = 100MHz
(...)
EEPROM: NXID v1
In:serial_pl01x
Out: serial_pl01x
Err: serial_pl01x
SEC0: RNG instantiated
Net: e1000: 68:05:ca:57:cc:c8
Warning: e1000#0 MAC addresses don't match:
Address in ROM is 68:05:ca:57:cc:c8
Address in environment is 00:04:9f:05:c4:27
eth0: DPMAC3@usxgmii, eth1: DPMAC4@usxgmii, eth2: DPMAC17@rgmii-id, eth3:
DPMAC18@rgmii-id, eth4: e1000#0 [PRIME]
SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total
64 MiB
device 0 offset 0x64, size 0x8
SF: 524288 bytes @ 0x64 Read: OK
device 0 offset 0xf0, size 0x10
SF: 1048576 bytes @ 0xf0 Read: OK
device 0 offset 0xa0, size 0x30
SF: 3145728 bytes @ 0xa0 Read: OK
device 0 offset 0xe0, size 0x10
SF: 1048576 bytes @ 0xe0 Read: OK
crc32+ MC firmware version 10.24.0
fsl-mc: Booting Management Complex ... SUCCESS
fsl-mc: Management Complex booted (version: 10.24.0, boot status: 0x1)
Hit any key to stop autoboot: 0
=> setenv ethact DPMAC3@usxgmii
=> setenv ipaddr 10.0.0.1
=> ping 10.0.0.2
DPMAC3@usxgmii Waiting for PHY auto negotiation to complete.Using
DPMAC3@usxgmii device
host 10.0.0.2 is alive
Ioana
Re: [PATCH] net: fsl_mdio: Fix busy flag polling register
On Sun, Jan 02, 2022 at 06:34:18PM +0100, Markus Koch wrote:
> NXP's mEMAC reference manual, Chapter 6.5.5 "MDIO Ethernet Management
> Interface usage", specifies to poll the BSY (0) bit in the CFG (we call
> it CTL) register to wait until a transaction has finished, not bit 31 in
> the data register.
First of all, the CFG (Configuration) and CTL (Control) are two
different registers so the '(we call it CTL)' part of your statement is
false.
Indeed, the BSY bit is located in the MDIO_CFG register but that is not
accessed through the mdio_ctl field as you used it in your changes.
It's instead accessed through the mdio_stat field (the MDIO_CFG is
called in some RMs as the Configuration and Status register).
>
> In the Linux kernel, this has already been fixed in commit 26eee0210ad7
> ("net/fsl: fix a bug in xgmac_mdio").
>
Even the commit that you referenced is using the mdio_stat field.
--- a/drivers/net/ethernet/freescale/xgmac_mdio.c
+++ b/drivers/net/ethernet/freescale/xgmac_mdio.c
@@ -79,7 +79,7 @@ static int xgmac_wait_until_done(struct device *dev,
/* Wait till the MDIO write is complete */
timeout = TIMEOUT;
- while ((ioread32be(>mdio_data) & MDIO_DATA_BSY) && timeout) {
+ while ((ioread32be(>mdio_stat) & MDIO_STAT_BSY) && timeout) {
cpu_relax();
timeout--;
}
Please fix this up in a v2.
Thanks,
Ioana
Re: [PATCH v2] drivers: net: fsl-mc: add a command which dumps the MC log
On Thu, Oct 07, 2021 at 10:09:25AM +, Aluchenesei Cosmin-florin wrote: > This mail was sent by mistake. Please ignore. > I think the previous one is the one that you sent by mistake, not this one. This patch fixes the issues that I pointed out. Also, please make sure to configure your email client so that you can respond inline next time. > -Original Message- > From: Aluchenesei Cosmin-florin > Sent: Thursday, October 7, 2021 1:08 PM > To: joe.hershber...@ni.com; rfried@gmail.com; Priyanka Jain > > Cc: Ioana Ciornei ; u-boot@lists.denx.de; Aluchenesei > Cosmin-florin > Subject: [PATCH v2] drivers: net: fsl-mc: add a command which dumps the MC log > > Extended fsl_mc command adding an extra option dump_log > > Signed-off-by: Cosmin-Florin Aluchenesei > > Changes in v2: > - Add MC_STRUCT_BUFFER_OFFSET once to the base address of MC. > --- This 'Changes in v2' should have been under the 3 dashes '---' and not above. Anyhow, I reviewed this, it looks good. Reviewed-by: Ioana Ciornei Tested-by: Ioana Ciornei Priyanka, could you please take this patch? Thanks! Ioana
Re: [PATCH] drivers: net: fsl-mc: add a command which dumps the MC log
On Fri, Oct 01, 2021 at 12:01:07PM +0300, Cosmin-Florin Aluchenesei wrote:
> +static void mc_dump_log(void)
> +{
> + struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
> + u64 high = in_le64(_ccsr_regs->reg_mcfbahr) & MC_FW_ADDR_MASK_HIGH;
> + u64 low = in_le64(_ccsr_regs->reg_mcfbalr) & MC_FW_ADDR_MASK_LOW;
> + u64 mc_addr = (high << 32) | low | MC_STRUCT_BUFFER_OFFSET;
> + u32 buf_len, wrapped, last_byte, magic, buf_start;
> + struct log_header *header;
> + ssize_t size, bytes_end;
> + const void *end_of_data;
> + const void *map_addr;
> + const void *end_addr;
> + const void *cur_ptr;
> + const void *buf;
> +
> + map_addr = map_sysmem(mc_addr + MC_STRUCT_BUFFER_OFFSET,
> + MC_BUFFER_SIZE);
This does not work as it is.
You are adding the MC_STRUCT_BUFFER_OFFSET twice to the base address of
the MC - mc_addr. This means that the magic check below will fail
always.
A diff like the following fixes the issue.
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -1799,7 +1799,7 @@ static void mc_dump_log(void)
struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
u64 high = in_le64(_ccsr_regs->reg_mcfbahr) & MC_FW_ADDR_MASK_HIGH;
u64 low = in_le64(_ccsr_regs->reg_mcfbalr) & MC_FW_ADDR_MASK_LOW;
- u64 mc_addr = (high << 32) | low | MC_STRUCT_BUFFER_OFFSET;
+ u64 mc_addr = (high << 32) | low;
u32 buf_len, wrapped, last_byte, magic, buf_start;
struct log_header *header;
ssize_t size, bytes_end;
Please fix this and send a v2.
Ioana
[PATCH v2 3/4] board: fsl: lx2160ardb: add dts fixup function for RevC
From: Florin Chiculita
Since the new RevC LX2160A-RDB board has its 10G Aquantia PHYs at
different MDIO bus addresses, we must update both the kernel DTS and
u-boot's DTS (in case of DM_ETH) in case the board is indeed RevC.
Use the newly introduced get_board_rev() function to trigger a fixup
of the kernel DTS to properly match the actual PHY addresses.
All this is encapsulated in the fdt_fixup_board_phy_revc() function
which will be used in the next patch.
Signed-off-by: Florin Chiculita
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/eth_lx2160ardb.c | 106 +++
board/freescale/lx2160a/lx2160a.h| 1 +
2 files changed, 107 insertions(+)
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c
b/board/freescale/lx2160a/eth_lx2160ardb.c
index 8fd2a501de16..c693ad9a0a4a 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -231,6 +231,112 @@ void reset_phy(void)
}
#endif /* CONFIG_RESET_PHY_R */
+static int fdt_get_dpmac_node(void *fdt, int dpmac_id)
+{
+ char dpmac_str[] = "dpmacs@00";
+ int offset, dpmacs_offset;
+
+ /* get the dpmac offset */
+ dpmacs_offset = fdt_path_offset(fdt, "/soc/fsl-mc/dpmacs");
+ if (dpmacs_offset < 0)
+ dpmacs_offset = fdt_path_offset(fdt, "/fsl-mc/dpmacs");
+
+ if (dpmacs_offset < 0) {
+ printf("dpmacs node not found in device tree\n");
+ return dpmacs_offset;
+ }
+
+ sprintf(dpmac_str, "dpmac@%x", dpmac_id);
+ offset = fdt_subnode_offset(fdt, dpmacs_offset, dpmac_str);
+ if (offset < 0) {
+ sprintf(dpmac_str, "ethernet@%x", dpmac_id);
+ offset = fdt_subnode_offset(fdt, dpmacs_offset, dpmac_str);
+ if (offset < 0) {
+ printf("dpmac@%x/ethernet@%x node not found in device
tree\n",
+ dpmac_id, dpmac_id);
+ return offset;
+ }
+ }
+
+ return offset;
+}
+
+static int fdt_update_phy_addr(void *fdt, int dpmac_id, int phy_addr)
+{
+ char dpmac_str[] = "dpmacs@00";
+ const u32 *phyhandle;
+ int offset;
+ int err;
+
+ /* get the dpmac offset */
+ offset = fdt_get_dpmac_node(fdt, dpmac_id);
+ if (offset < 0)
+ return offset;
+
+ /* get dpmac phy-handle */
+ sprintf(dpmac_str, "dpmac@%x", dpmac_id);
+ phyhandle = (u32 *)fdt_getprop(fdt, offset, "phy-handle", NULL);
+ if (!phyhandle) {
+ printf("%s node not found in device tree\n", dpmac_str);
+ return offset;
+ }
+
+ offset = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*phyhandle));
+ if (offset < 0) {
+ printf("Could not get the ph node offset for dpmac %d\n",
+ dpmac_id);
+ return offset;
+ }
+
+ phy_addr = cpu_to_fdt32(phy_addr);
+ err = fdt_setprop(fdt, offset, "reg", _addr, sizeof(phy_addr));
+ if (err < 0) {
+ printf("Could not set phy node's reg for dpmac %d: %s.\n",
+ dpmac_id, fdt_strerror(err));
+ return err;
+ }
+
+ return 0;
+}
+
+static int fdt_delete_phy_handle(void *fdt, int dpmac_id)
+{
+ const u32 *phyhandle;
+ int offset;
+
+ /* get the dpmac offset */
+ offset = fdt_get_dpmac_node(fdt, dpmac_id);
+ if (offset < 0)
+ return offset;
+
+ /* verify if the node has a phy-handle */
+ phyhandle = (u32 *)fdt_getprop(fdt, offset, "phy-handle", NULL);
+ if (!phyhandle)
+ return 0;
+
+ return fdt_delprop(fdt, offset, "phy-handle");
+}
+
+int fdt_fixup_board_phy_revc(void *fdt)
+{
+ int ret;
+
+ if (get_board_rev() != 'C')
+ return 0;
+
+ /* DPMACs 3,4 have their Aquantia PHYs at new addresses */
+ ret = fdt_update_phy_addr(fdt, 3, AQR113C_PHY_ADDR1);
+ if (ret)
+ return ret;
+
+ ret = fdt_update_phy_addr(fdt, 4, AQR113C_PHY_ADDR2);
+ if (ret)
+ return ret;
+
+ /* There is no PHY for the DPMAC2, so remove the phy-handle */
+ return fdt_delete_phy_handle(fdt, 2);
+}
+
int fdt_fixup_board_phy(void *fdt)
{
int mdio_offset;
diff --git a/board/freescale/lx2160a/lx2160a.h
b/board/freescale/lx2160a/lx2160a.h
index cf56cefb45a3..e9b318339af3 100644
--- a/board/freescale/lx2160a/lx2160a.h
+++ b/board/freescale/lx2160a/lx2160a.h
@@ -60,6 +60,7 @@
#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
u8 get_board_rev(void);
+int fdt_fixup_board_phy_revc(void *fdt);
#endif
#endif /* __LX2160_H */
--
2.17.1
[PATCH v2 2/4] board: fsl: lx2160ardb: add support for lx2160ardb revC board
From: Florin Chiculita
New RevC LX2160A-RDB board doesn't have any 40G PHY and the 10G Aquantia
PHYs have different MDIO bus addresses, thus a different init is
required.
This patch adds support for the non-DM_ETH use of the LX2160ARDB RevC
board.
Signed-off-by: Florin Chiculita
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/eth_lx2160ardb.c | 52 +++-
include/configs/lx2160ardb.h | 5 ++-
2 files changed, 55 insertions(+), 2 deletions(-)
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c
b/board/freescale/lx2160a/eth_lx2160ardb.c
index 15cbc58d59a7..8fd2a501de16 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2018, 2020 NXP
+ * Copyright 2018-2021 NXP
*
*/
@@ -41,6 +41,49 @@ static bool get_inphi_phy_id(struct mii_dev *bus, int addr,
int devad)
return false;
}
+int setup_eth_rev_c(u32 srds_p)
+{
+ struct mii_dev *bus;
+ int i;
+
+ /* difference between SerDes1 protocols 18/19 is 4x10G vs. 40G */
+ switch (srds_p) {
+ case 19:
+ wriop_init_dpmac_enet_if(WRIOP1_DPMAC2,
+PHY_INTERFACE_MODE_XLAUI);
+ break;
+ case 18:
+ for (i = WRIOP1_DPMAC7; i <= WRIOP1_DPMAC10; i++)
+ wriop_init_dpmac_enet_if(i, PHY_INTERFACE_MODE_XFI);
+ break;
+ default:
+ printf("SerDes1 protocol 0x%x is not supported on LX2160ARDB\n",
+ srds_p);
+ return -1;
+ }
+
+ /* common interfaces for SerDes1 protocols 18 and 19 initialization */
+ wriop_set_phy_address(WRIOP1_DPMAC3, 0, AQR113C_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC4, 0, AQR113C_PHY_ADDR2);
+ wriop_set_phy_address(WRIOP1_DPMAC5, 0, INPHI_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC6, 0, INPHI_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC17, 0, RGMII_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC18, 0, RGMII_PHY_ADDR2);
+
+ /* assign DPMAC/PHY to MDIO bus */
+ bus = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME);
+ wriop_set_mdio(WRIOP1_DPMAC3, bus);
+ wriop_set_mdio(WRIOP1_DPMAC4, bus);
+ wriop_set_mdio(WRIOP1_DPMAC17, bus);
+ wriop_set_mdio(WRIOP1_DPMAC18, bus);
+
+ bus = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME);
+ wriop_set_mdio(WRIOP1_DPMAC5, bus);
+ wriop_set_mdio(WRIOP1_DPMAC6, bus);
+
+ return 0;
+}
+
int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FSL_MC_ENET)
@@ -70,6 +113,13 @@ int board_eth_init(struct bd_info *bis)
fm_memac_mdio_init(bis, _info);
dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME);
+
+ /* new LX2160A-RDB2 revC board uses phy-less 25G/40G interfaces */
+ if (get_board_rev() == 'C') {
+ setup_eth_rev_c(srds_s1);
+ goto next;
+ }
+
switch (srds_s1) {
case 19:
wriop_set_phy_address(WRIOP1_DPMAC2, 0,
diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h
index 097f1224c90f..a7e9753dc174 100644
--- a/include/configs/lx2160ardb.h
+++ b/include/configs/lx2160ardb.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2018,2020 NXP
+ * Copyright 2018-2021 NXP
*/
#ifndef __LX2_RDB_H
@@ -21,6 +21,9 @@
#if defined(CONFIG_FSL_MC_ENET)
#define CONFIG_MII
#define CONFIG_ETHPRIME"DPMAC1@xgmii"
+
+#define AQR113C_PHY_ADDR1 0x0
+#define AQR113C_PHY_ADDR2 0x08
#endif
/* EMC2305 */
--
2.17.1
[PATCH v2 4/4] board: fsl: lx2160ardb: add dts fixup for RevC
Use the newly fdt_fixup_board_phy_revc() function introduced to updated
both kernel's DTS and u-boot's DTS in case we are running with DM_ETH.
Signed-off-by: Ioana Ciornei
Signed-off-by: Florin Chiculita
---
board/freescale/lx2160a/eth_lx2160ardb.c | 2 +-
board/freescale/lx2160a/lx2160a.c| 8
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c
b/board/freescale/lx2160a/eth_lx2160ardb.c
index c693ad9a0a4a..30a3af9f4737 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -366,5 +366,5 @@ int fdt_fixup_board_phy(void *fdt)
}
}
- return ret;
+ return fdt_fixup_board_phy_revc(fdt);
}
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index 9f1a6979258c..0736735e6f0d 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -189,6 +189,11 @@ int board_fix_fdt(void *fdt)
"fsl,lx2160a-pcie");
}
+ /* Fixup u-boot's DTS in case this is a revC board and
+* we're using DM_ETH.
+*/
+ if (IS_ENABLED(CONFIG_TARGET_LX2160ARDB) && IS_ENABLED(CONFIG_DM_ETH))
+ fdt_fixup_board_phy_revc(fdt);
return 0;
}
#endif
@@ -723,6 +728,9 @@ void fdt_fixup_board_enet(void *fdt)
fdt_status_okay(fdt, offset);
#ifndef CONFIG_DM_ETH
fdt_fixup_board_phy(fdt);
+#else
+ if (IS_ENABLED(CONFIG_TARGET_LX2160ARDB))
+ fdt_fixup_board_phy_revc(fdt);
#endif
} else {
fdt_status_fail(fdt, offset);
--
2.17.1
[PATCH v2 1/4] board: fsl: lx2160ardb: add api for obtaining board revision
From: Florin Chiculita
Add new API for obtaining board revision and trigger the i2c node
fixup with this new API.
Signed-off-by: Florin Chiculita
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/lx2160a.c | 13 ++---
board/freescale/lx2160a/lx2160a.h | 6 +-
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index 8f75b48f956b..9f1a6979258c 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -564,6 +564,15 @@ int config_board_mux(void)
}
#endif
+#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
+u8 get_board_rev(void)
+{
+ u8 board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A';
+
+ return board_rev;
+}
+#endif
+
unsigned long get_board_sys_clk(void)
{
#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS)
@@ -847,7 +856,6 @@ int ft_board_setup(void *blob, struct bd_info *bd)
u64 mc_memory_base = 0;
u64 mc_memory_size = 0;
u16 total_memory_banks;
- u8 board_rev;
ft_cpu_setup(blob, bd);
@@ -903,8 +911,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
fdt_fixup_icid(blob);
if (IS_ENABLED(CONFIG_TARGET_LX2160ARDB)) {
- board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A';
- if (board_rev == 'C')
+ if (get_board_rev() >= 'C')
fdt_fixup_i2c_thermal_node(blob);
}
diff --git a/board/freescale/lx2160a/lx2160a.h
b/board/freescale/lx2160a/lx2160a.h
index 52b020765dc6..cf56cefb45a3 100644
--- a/board/freescale/lx2160a/lx2160a.h
+++ b/board/freescale/lx2160a/lx2160a.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
#ifndef __LX2160_H
@@ -58,4 +58,8 @@
#endif
#endif
+#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
+u8 get_board_rev(void);
+#endif
+
#endif /* __LX2160_H */
--
2.17.1
[PATCH v2 0/4] board: fsl: lx2160ardb: add networking support for RevC
This patch set adds networking support for the LX2160A-RDB revC board. The main difference is that the 10G Aquantia PHYs are at different MDIO bus addresses. To address this, the u-boot's DTS (in case of DM_ETH) and the kernel's DTS need to undergo a fixup. This patch set applies cleanly on top of the following, yet unnaccepted, patch: https://patchwork.ozlabs.org/project/uboot/patch/20210417180332.1164345-1-wasim.k...@oss.nxp.com/ Changes in v2: - in 1/4: trigger the i2c node fixup if the board rev is 'C' or greater Florin Chiculita (3): board: fsl: lx2160ardb: add api for obtaining board revision board: fsl: lx2160ardb: add support for lx2160ardb revC board board: fsl: lx2160ardb: add dts fixup function for RevC Ioana Ciornei (1): board: fsl: lx2160ardb: add dts fixup for RevC board/freescale/lx2160a/eth_lx2160ardb.c | 160 ++- board/freescale/lx2160a/lx2160a.c| 21 ++- board/freescale/lx2160a/lx2160a.h| 7 +- include/configs/lx2160ardb.h | 5 +- 4 files changed, 186 insertions(+), 7 deletions(-) -- 2.17.1
[PATCH 3/4] board: fsl: lx2160ardb: add dts fixup function for RevC
From: Florin Chiculita
Since the new RevC LX2160A-RDB board has its 10G Aquantia PHYs at
different MDIO bus addresses, we must update both the kernel DTS and
u-boot's DTS (in case of DM_ETH) in case the board is indeed RevC.
Use the newly introduced get_board_rev() function to trigger a fixup
of the kernel DTS to properly match the actual PHY addresses.
All this is encapsulated in the fdt_fixup_board_phy_revc() function
which will be used in the next patch.
Signed-off-by: Florin Chiculita
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/eth_lx2160ardb.c | 106 +++
board/freescale/lx2160a/lx2160a.h| 1 +
2 files changed, 107 insertions(+)
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c
b/board/freescale/lx2160a/eth_lx2160ardb.c
index cc4c94702c2b..1add00687a31 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -231,6 +231,112 @@ void reset_phy(void)
}
#endif /* CONFIG_RESET_PHY_R */
+static int fdt_get_dpmac_node(void *fdt, int dpmac_id)
+{
+ char dpmac_str[] = "dpmacs@00";
+ int offset, dpmacs_offset;
+
+ /* get the dpmac offset */
+ dpmacs_offset = fdt_path_offset(fdt, "/soc/fsl-mc/dpmacs");
+ if (dpmacs_offset < 0)
+ dpmacs_offset = fdt_path_offset(fdt, "/fsl-mc/dpmacs");
+
+ if (dpmacs_offset < 0) {
+ printf("dpmacs node not found in device tree\n");
+ return dpmacs_offset;
+ }
+
+ sprintf(dpmac_str, "dpmac@%x", dpmac_id);
+ offset = fdt_subnode_offset(fdt, dpmacs_offset, dpmac_str);
+ if (offset < 0) {
+ sprintf(dpmac_str, "ethernet@%x", dpmac_id);
+ offset = fdt_subnode_offset(fdt, dpmacs_offset, dpmac_str);
+ if (offset < 0) {
+ printf("dpmac@%x/ethernet@%x node not found in device
tree\n",
+ dpmac_id, dpmac_id);
+ return offset;
+ }
+ }
+
+ return offset;
+}
+
+static int fdt_update_phy_addr(void *fdt, int dpmac_id, int phy_addr)
+{
+ char dpmac_str[] = "dpmacs@00";
+ const u32 *phyhandle;
+ int offset;
+ int err;
+
+ /* get the dpmac offset */
+ offset = fdt_get_dpmac_node(fdt, dpmac_id);
+ if (offset < 0)
+ return offset;
+
+ /* get dpmac phy-handle */
+ sprintf(dpmac_str, "dpmac@%x", dpmac_id);
+ phyhandle = (u32 *)fdt_getprop(fdt, offset, "phy-handle", NULL);
+ if (!phyhandle) {
+ printf("%s node not found in device tree\n", dpmac_str);
+ return offset;
+ }
+
+ offset = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*phyhandle));
+ if (offset < 0) {
+ printf("Could not get the ph node offset for dpmac %d\n",
+ dpmac_id);
+ return offset;
+ }
+
+ phy_addr = cpu_to_fdt32(phy_addr);
+ err = fdt_setprop(fdt, offset, "reg", _addr, sizeof(phy_addr));
+ if (err < 0) {
+ printf("Could not set phy node's reg for dpmac %d: %s.\n",
+ dpmac_id, fdt_strerror(err));
+ return err;
+ }
+
+ return 0;
+}
+
+static int fdt_delete_phy_handle(void *fdt, int dpmac_id)
+{
+ const u32 *phyhandle;
+ int offset;
+
+ /* get the dpmac offset */
+ offset = fdt_get_dpmac_node(fdt, dpmac_id);
+ if (offset < 0)
+ return offset;
+
+ /* verify if the node has a phy-handle */
+ phyhandle = (u32 *)fdt_getprop(fdt, offset, "phy-handle", NULL);
+ if (!phyhandle)
+ return 0;
+
+ return fdt_delprop(fdt, offset, "phy-handle");
+}
+
+int fdt_fixup_board_phy_revc(void *fdt)
+{
+ int ret;
+
+ if (get_board_rev() != 'C')
+ return 0;
+
+ /* DPMACs 3,4 have their Aquantia PHYs at new addresses */
+ ret = fdt_update_phy_addr(fdt, 3, AQR113C_PHY_ADDR1);
+ if (ret)
+ return ret;
+
+ ret = fdt_update_phy_addr(fdt, 4, AQR113C_PHY_ADDR2);
+ if (ret)
+ return ret;
+
+ /* There is no PHY for the DPMAC2, so remove the phy-handle */
+ return fdt_delete_phy_handle(fdt, 2);
+}
+
int fdt_fixup_board_phy(void *fdt)
{
int mdio_offset;
diff --git a/board/freescale/lx2160a/lx2160a.h
b/board/freescale/lx2160a/lx2160a.h
index 26a94e4c176a..43f96597c3a7 100644
--- a/board/freescale/lx2160a/lx2160a.h
+++ b/board/freescale/lx2160a/lx2160a.h
@@ -60,6 +60,7 @@
#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
u8 get_board_rev(void);
+int fdt_fixup_board_phy_revc(void *fdt);
#endif
#endif /* __LX2160_H */
--
2.17.1
[PATCH 0/4] board: fsl: lx2160ardb: add networking support for RevC
This patch set adds networking support for the LX2160A-RDB revC board. The main difference is that the 10G Aquantia PHYs are at different MDIO bus addresses. To address this, the u-boot's DTS (in case of DM_ETH) and the kernel's DTS need to undergo a fixup. This patch set applies cleanly on top of the following, yet unnaccepted, patch: https://patchwork.ozlabs.org/project/uboot/patch/20210417180332.1164345-1-wasim.k...@oss.nxp.com/ Florin Chiculita (3): board: fsl: lx2160ardb: add api for obtaining board revision board: fsl: lx2160ardb: add support for lx2160ardb revC board board: fsl: lx2160ardb: add dts fixup function for RevC Ioana Ciornei (1): board: fsl: lx2160ardb: add dts fixup for RevC board/freescale/lx2160a/eth_lx2160ardb.c | 158 ++- board/freescale/lx2160a/lx2160a.c| 21 ++- board/freescale/lx2160a/lx2160a.h| 5 + include/configs/lx2160ardb.h | 6 +- 4 files changed, 185 insertions(+), 5 deletions(-) -- 2.17.1
[PATCH 4/4] board: fsl: lx2160ardb: add dts fixup for RevC
Use the newly fdt_fixup_board_phy_revc() function introduced to updated
both kernel's DTS and u-boot's DTS in case we are running with DM_ETH.
Signed-off-by: Ioana Ciornei
Signed-off-by: Florin Chiculita
---
board/freescale/lx2160a/eth_lx2160ardb.c | 2 +-
board/freescale/lx2160a/lx2160a.c| 8
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c
b/board/freescale/lx2160a/eth_lx2160ardb.c
index 1add00687a31..552cba09e190 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -366,5 +366,5 @@ int fdt_fixup_board_phy(void *fdt)
}
}
- return ret;
+ return fdt_fixup_board_phy_revc(fdt);
}
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index 97e0021b0c53..c8c5c9bf1acb 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -189,6 +189,11 @@ int board_fix_fdt(void *fdt)
"fsl,lx2160a-pcie");
}
+ /* Fixup u-boot's DTS in case this is a revC board and
+* we're using DM_ETH.
+*/
+ if (IS_ENABLED(CONFIG_TARGET_LX2160ARDB) && IS_ENABLED(CONFIG_DM_ETH))
+ fdt_fixup_board_phy_revc(fdt);
return 0;
}
#endif
@@ -723,6 +728,9 @@ void fdt_fixup_board_enet(void *fdt)
fdt_status_okay(fdt, offset);
#ifndef CONFIG_DM_ETH
fdt_fixup_board_phy(fdt);
+#else
+ if (IS_ENABLED(CONFIG_TARGET_LX2160ARDB))
+ fdt_fixup_board_phy_revc(fdt);
#endif
} else {
fdt_status_fail(fdt, offset);
--
2.17.1
[PATCH 2/4] board: fsl: lx2160ardb: add support for lx2160ardb revC board
From: Florin Chiculita
New RevC LX2160A-RDB board doesn't have any 40G PHY and the 10G Aquantia
PHYs have different MDIO bus addresses, thus a different init is
required.
This patch adds support for the non-DM_ETH use of the LX2160ARDB RevC
board.
Signed-off-by: Florin Chiculita
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/eth_lx2160ardb.c | 50
include/configs/lx2160ardb.h | 6 ++-
2 files changed, 55 insertions(+), 1 deletion(-)
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c
b/board/freescale/lx2160a/eth_lx2160ardb.c
index 15cbc58d59a7..cc4c94702c2b 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -41,6 +41,49 @@ static bool get_inphi_phy_id(struct mii_dev *bus, int addr,
int devad)
return false;
}
+int setup_eth_rev_c(u32 srds_p)
+{
+ struct mii_dev *bus;
+ int i;
+
+ /* difference between SerDes1 protocols 18/19 is 4x10G vs. 40G */
+ switch (srds_p) {
+ case 19:
+ wriop_init_dpmac_enet_if(WRIOP1_DPMAC2,
+PHY_INTERFACE_MODE_XLAUI);
+ break;
+ case 18:
+ for (i = WRIOP1_DPMAC7; i <= WRIOP1_DPMAC10; i++)
+ wriop_init_dpmac_enet_if(i, PHY_INTERFACE_MODE_XFI);
+ break;
+ default:
+ printf("SerDes1 protocol 0x%x is not supported on LX2160ARDB\n",
+ srds_p);
+ return -1;
+ }
+
+ /* common interfaces for SerDes1 protocols 18 and 19 initialization */
+ wriop_set_phy_address(WRIOP1_DPMAC3, 0, AQR113C_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC4, 0, AQR113C_PHY_ADDR2);
+ wriop_set_phy_address(WRIOP1_DPMAC5, 0, INPHI_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC6, 0, INPHI_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC17, 0, RGMII_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC18, 0, RGMII_PHY_ADDR2);
+
+ /* assign DPMAC/PHY to MDIO bus */
+ bus = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME);
+ wriop_set_mdio(WRIOP1_DPMAC3, bus);
+ wriop_set_mdio(WRIOP1_DPMAC4, bus);
+ wriop_set_mdio(WRIOP1_DPMAC17, bus);
+ wriop_set_mdio(WRIOP1_DPMAC18, bus);
+
+ bus = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME);
+ wriop_set_mdio(WRIOP1_DPMAC5, bus);
+ wriop_set_mdio(WRIOP1_DPMAC6, bus);
+
+ return 0;
+}
+
int board_eth_init(struct bd_info *bis)
{
#if defined(CONFIG_FSL_MC_ENET)
@@ -70,6 +113,13 @@ int board_eth_init(struct bd_info *bis)
fm_memac_mdio_init(bis, _info);
dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME);
+
+ /* new LX2160A-RDB2 revC board uses phy-less 25G/40G interfaces */
+ if (get_board_rev() == 'C') {
+ setup_eth_rev_c(srds_s1);
+ goto next;
+ }
+
switch (srds_s1) {
case 19:
wriop_set_phy_address(WRIOP1_DPMAC2, 0,
diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h
index 097f1224c90f..2baae1ff98df 100644
--- a/include/configs/lx2160ardb.h
+++ b/include/configs/lx2160ardb.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2018,2020 NXP
+ * Copyright 2018-2021 NXP
*/
#ifndef __LX2_RDB_H
@@ -21,6 +21,10 @@
#if defined(CONFIG_FSL_MC_ENET)
#define CONFIG_MII
#define CONFIG_ETHPRIME"DPMAC1@xgmii"
+
+#define AQR113C_PHY_ADDR1 0x0
+#define AQR113C_PHY_ADDR2 0x08
+
#endif
/* EMC2305 */
--
2.17.1
[PATCH 1/4] board: fsl: lx2160ardb: add api for obtaining board revision
From: Florin Chiculita
Add new API for obtaining board revision and trigger the i2c node
fixup with this new API.
Signed-off-by: Florin Chiculita
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/lx2160a.c | 13 ++---
board/freescale/lx2160a/lx2160a.h | 4
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index 8f75b48f956b..97e0021b0c53 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -564,6 +564,15 @@ int config_board_mux(void)
}
#endif
+#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
+u8 get_board_rev(void)
+{
+ u8 board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A';
+
+ return board_rev;
+}
+#endif
+
unsigned long get_board_sys_clk(void)
{
#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS)
@@ -847,7 +856,6 @@ int ft_board_setup(void *blob, struct bd_info *bd)
u64 mc_memory_base = 0;
u64 mc_memory_size = 0;
u16 total_memory_banks;
- u8 board_rev;
ft_cpu_setup(blob, bd);
@@ -903,8 +911,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
fdt_fixup_icid(blob);
if (IS_ENABLED(CONFIG_TARGET_LX2160ARDB)) {
- board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A';
- if (board_rev == 'C')
+ if (get_board_rev() == 'C')
fdt_fixup_i2c_thermal_node(blob);
}
diff --git a/board/freescale/lx2160a/lx2160a.h
b/board/freescale/lx2160a/lx2160a.h
index 52b020765dc6..26a94e4c176a 100644
--- a/board/freescale/lx2160a/lx2160a.h
+++ b/board/freescale/lx2160a/lx2160a.h
@@ -58,4 +58,8 @@
#endif
#endif
+#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
+u8 get_board_rev(void);
+#endif
+
#endif /* __LX2160_H */
--
2.17.1
[PATCH] net: memac_phy: add a timeout to MDIO operations
We have encountered circumstances when a board design does not include
pull-up resistors on the external MDIO buses which are not used. This
leads to the MDIO data line not being pulled-up, thus the MDIO controller
will always see the line as busy.
Without a timeout in the MDIO bus driver, the execution is stuck in an
infinite loop when any access is initiated on that external bus.
Add a timeout in the driver so that we are protected in this
circumstance. This is similar to what is being done in the Linux
xgmac_mdio driver.
Signed-off-by: Ioana Ciornei
---
drivers/net/fm/memac_phy.c | 76 +-
1 file changed, 58 insertions(+), 18 deletions(-)
diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index c2ef1b4e737e..b92a012ce79f 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -22,6 +22,8 @@
#define memac_setbits_32(a, v) setbits_be32(a, v)
#endif
+#define MAX_NUM_RETRIES1000
+
static u32 memac_in_32(u32 *reg)
{
#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
@@ -31,6 +33,42 @@ static u32 memac_in_32(u32 *reg)
#endif
}
+/*
+ * Wait until the MDIO bus is free
+ */
+static int memac_wait_until_free(struct memac_mdio_controller *regs)
+{
+ unsigned int timeout = MAX_NUM_RETRIES;
+
+ while ((memac_in_32(>mdio_stat) & MDIO_STAT_BSY) && timeout--)
+ ;
+
+ if (!timeout) {
+ printf("timeout waiting for MDIO bus to be free\n");
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+/*
+ * Wait till the MDIO read or write operation is complete
+ */
+static int memac_wait_until_done(struct memac_mdio_controller *regs)
+{
+ unsigned int timeout = MAX_NUM_RETRIES;
+
+ while ((memac_in_32(>mdio_data) & MDIO_DATA_BSY) && timeout--)
+ ;
+
+ if (!timeout) {
+ printf("timeout waiting for MDIO operation to complete\n");
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
/*
* Write value to the PHY for this device to the register at regnum, waiting
* until the write is done before it returns. All PHY configuration has to be
@@ -42,6 +80,7 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int
dev_addr,
u32 mdio_ctl;
struct memac_mdio_controller *regs = bus->priv;
u32 c45 = 1; /* Default to 10G interface */
+ int err;
if (dev_addr == MDIO_DEVAD_NONE) {
c45 = 0; /* clause 22 */
@@ -50,9 +89,9 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int
dev_addr,
} else
memac_setbits_32(>mdio_stat, MDIO_STAT_ENC);
- /* Wait till the bus is free */
- while ((memac_in_32(>mdio_stat)) & MDIO_STAT_BSY)
- ;
+ err = memac_wait_until_free(regs);
+ if (err)
+ return err;
/* Set the port and dev addr */
mdio_ctl = MDIO_CTL_PORT_ADDR(port_addr) | MDIO_CTL_DEV_ADDR(dev_addr);
@@ -62,16 +101,16 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr,
int dev_addr,
if (c45)
memac_out_32(>mdio_addr, regnum & 0x);
- /* Wait till the bus is free */
- while ((memac_in_32(>mdio_stat)) & MDIO_STAT_BSY)
- ;
+ err = memac_wait_until_free(regs);
+ if (err)
+ return err;
/* Write the value to the register */
memac_out_32(>mdio_data, MDIO_DATA(value));
- /* Wait till the MDIO write is complete */
- while ((memac_in_32(>mdio_data)) & MDIO_DATA_BSY)
- ;
+ err = memac_wait_until_done(regs);
+ if (err)
+ return err;
return 0;
}
@@ -87,6 +126,7 @@ int memac_mdio_read(struct mii_dev *bus, int port_addr, int
dev_addr,
u32 mdio_ctl;
struct memac_mdio_controller *regs = bus->priv;
u32 c45 = 1;
+ int err;
if (dev_addr == MDIO_DEVAD_NONE) {
if (!strcmp(bus->name, DEFAULT_FM_TGEC_MDIO_NAME))
@@ -97,9 +137,9 @@ int memac_mdio_read(struct mii_dev *bus, int port_addr, int
dev_addr,
} else
memac_setbits_32(>mdio_stat, MDIO_STAT_ENC);
- /* Wait till the bus is free */
- while ((memac_in_32(>mdio_stat)) & MDIO_STAT_BSY)
- ;
+ err = memac_wait_until_free(regs);
+ if (err)
+ return err;
/* Set the Port and Device Addrs */
mdio_ctl = MDIO_CTL_PORT_ADDR(port_addr) | MDIO_CTL_DEV_ADDR(dev_addr);
@@ -109,17 +149,17 @@ int memac_mdio_read(struct mii_dev *bus, int port_addr,
int dev_addr,
if (c45)
memac_out_32(>mdio_addr, regnum & 0x);
- /* Wait till the bus is free */
- while ((memac_in_32(>mdio_stat)) & MDIO_STAT_BSY)
- ;
+ err = memac_wait_until_free(regs);
+ if (err)
+
[PATCH] configs: ls1088a: enable CMD_MDIO
Enable the CMD_MDIO Kconfig option by removing the "is not set" indication from all the defconfigs for this SoC. Signed-off-by: Ioana Ciornei --- configs/ls1088aqds_qspi_SECURE_BOOT_defconfig| 1 - configs/ls1088aqds_qspi_defconfig| 1 - configs/ls1088aqds_sdcard_qspi_defconfig | 1 - configs/ls1088aqds_tfa_defconfig | 1 - configs/ls1088ardb_qspi_SECURE_BOOT_defconfig| 1 - configs/ls1088ardb_qspi_defconfig| 1 - configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 - configs/ls1088ardb_sdcard_qspi_defconfig | 1 - configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 1 - configs/ls1088ardb_tfa_defconfig | 1 - 10 files changed, 10 deletions(-) diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 0d35e91fedde..84348c2554c3 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -31,7 +31,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index fcb7678585b9..2976162f312f 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -32,7 +32,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 6558c165fe8f..a264bc8872d8 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -42,7 +42,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index 582cd85765f2..b5f995e85f16 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -36,7 +36,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index 4d0785ad92d7..7676a98bf818 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -33,7 +33,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index a80f72bc9e8f..147d53cdc19a 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -34,7 +34,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 29aa87f55abe..7ac113fa7aeb 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -45,7 +45,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 81e360734b97..9434c916d5f8 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -44,7 +44,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 22edd9558e16..fe016ba6962d 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -35,7 +35,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index 3c9719df12d4..6fa850bad096 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y -- 2.17.1
[PATCH] drivers: net: ldpaa_eth: lx2160a: fix bug in checking if a DPMAC is enabled
From: Grigore Popescu
The next DPMAC was always verified if it is enabled. In case of
DPMAC@6, the DPMAC@7 is verified. As DPMAC@7 is disabled, DPMAC@6 will
be considered disabled and not detected by uboot.
Signed-off-by: Grigore Popescu
Signed-off-by: Ioana Ciornei
---
drivers/net/ldpaa_eth/lx2160a.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ldpaa_eth/lx2160a.c b/drivers/net/ldpaa_eth/lx2160a.c
index 9432b6eb85c7..1e62c642039e 100644
--- a/drivers/net/ldpaa_eth/lx2160a.c
+++ b/drivers/net/ldpaa_eth/lx2160a.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2018 NXP
+ * Copyright 2018, 2020 NXP
*/
#include
#include
@@ -57,7 +57,7 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int
lane_prtcl)
{
enum srds_prtcl;
- if (is_device_disabled(dpmac_id + 1))
+ if (is_device_disabled(dpmac_id))
return PHY_INTERFACE_MODE_NONE;
if (lane_prtcl >= SGMII1 && lane_prtcl <= SGMII18)
--
2.17.1
[PATCH v3 3/3] configs: ls2080aqds_tfa_defconfig: enable DM_ETH and related
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the LS2080AQDS board. Signed-off-by: Ioana Ciornei --- Changes in v3: - none configs/ls2088aqds_tfa_defconfig | 8 1 file changed, 8 insertions(+) diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index a3486e4a5010..ad17ef1703d4 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -34,6 +35,8 @@ CONFIG_MP=y # CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_OF_LIST="fsl-ls2080a-qds-42-x" +CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -62,9 +65,14 @@ CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y CONFIG_PHY_TERANETICS=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_MDIO_MUX_I2CREG=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y -- 2.17.1
[PATCH v3 1/3] board: ls2080aqds: transition to DM_ETH
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2
Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH
is activated. Also, force the PCI devices to be enumerated at probe
time.
Signed-off-by: Ioana Ciornei
---
Changes in v3:
- fixed a build warning
board/freescale/ls2080aqds/eth.c| 15 ---
board/freescale/ls2080aqds/ls2080aqds.c | 4
2 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index bbb70a859a1e..2b1b106b0732 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -24,6 +24,8 @@
#define MC_BOOT_ENV_VAR "mcinitcmd"
+#ifndef CONFIG_DM_ETH
+
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
* Bank 1 -> Lanes A, B, C, D, E, F, G, H
@@ -889,10 +891,11 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
}
}
#endif
+#endif // !CONFIG_DM_ETH
int board_eth_init(bd_t *bis)
{
- int error;
+#ifndef CONFIG_DM_ETH
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
int serdes1_prtcl = (in_le32(>rcwsr[28]) &
@@ -906,6 +909,7 @@ int board_eth_init(bd_t *bis)
struct memac_mdio_info *memac_mdio1_info;
unsigned int i;
char *env_hwconfig;
+ int error;
env_hwconfig = env_get("hwconfig");
@@ -970,8 +974,13 @@ int board_eth_init(bd_t *bis)
sgmii_configure_repeater(2);
}
#endif
- error = pci_eth_init(bis);
- return error;
+#endif // !CONFIG_DM_ETH
+
+#ifdef CONFIG_DM_ETH
+ return 0;
+#else
+ return pci_eth_init(bis);
+#endif
}
#if defined(CONFIG_RESET_PHY_R)
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
b/board/freescale/ls2080aqds/ls2080aqds.c
index 4034bdee2842..1c91c5b7f052 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -251,6 +251,10 @@ int board_init(void)
ppa_init();
#endif
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+ pci_init();
+#endif
+
return 0;
}
--
2.17.1
[PATCH v3 2/3] arm: dts: ls2080aqds: add CONFIG_MULTI_DTB_FIT support
Add support for selecting the appropriate DTS file depending on the
SERDES protocol used.
The fsl-ls2080a-qds DTS will be used by default if there isn't a DTS
file specifically made for the current SERDES protocol.
This patch adds the necessary DPMAC nodes (DPMAC 1-8) for
protocol 42 (0x2A) on SD#1.
Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled
implement the board_fit_config_name_match() function in order to choose
the appropriate DTS.
Signed-off-by: Ioana Ciornei
---
Changes in v3:
- none
arch/arm/dts/Makefile| 1 +
arch/arm/dts/fsl-ls2080a-qds-42-x.dts| 16
arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi | 48
arch/arm/dts/fsl-ls2080a-qds.dts | 72 +-
arch/arm/dts/fsl-ls2080a-qds.dtsi| 77 +++
board/freescale/ls2080aqds/eth.c | 97
6 files changed, 241 insertions(+), 70 deletions(-)
create mode 100644 arch/arm/dts/fsl-ls2080a-qds-42-x.dts
create mode 100644 arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
create mode 100644 arch/arm/dts/fsl-ls2080a-qds.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5be6acb108be..7a766924e98d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -374,6 +374,7 @@ dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \
ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \
ls1021a-iot-duart.dtb ls1021a-tsn.dtb
dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
+ fsl-ls2080a-qds-42-x.dtb \
fsl-ls2080a-rdb.dtb \
fsl-ls2081a-rdb.dtb \
fsl-ls2088a-rdb-qspi.dtb \
diff --git a/arch/arm/dts/fsl-ls2080a-qds-42-x.dts
b/arch/arm/dts/fsl-ls2080a-qds-42-x.dts
new file mode 100644
index ..bd46c395d45c
--- /dev/null
+++ b/arch/arm/dts/fsl-ls2080a-qds-42-x.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS2080AQDS device tree source for SERDES protocol 42.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls2080a-qds-sd1-42.dtsi"
+
+/ {
+ model = "NXP Layerscape LS2080AQDS Board (DTS 42-x)";
+ compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
+};
diff --git a/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
b/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
new file mode 100644
index ..ccbb5de1eaef
--- /dev/null
+++ b/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS2080aQDS device tree source for SERDES block #1 - protocol 42 (0x2a)
+ *
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls2080a-qds.dtsi"
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b/arch/arm/dts/fsl-ls2080a-qds.dts
index f91a48d9fddb..a1196f929287 100644
--- a/arch/arm/dts/fsl-ls2080a-qds.dts
+++ b/arch/arm/dts/fsl-ls2080a-qds.dts
@@ -1,13 +1,13 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Freescale ls2080a QDS board device tree source
+ * Freescale ls2080a QDS defaul board device tree source
*
* Copyright 2013-2015 Freescale Semiconductor, Inc.
*/
/dts-v1/;
-#include "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a-qds.dtsi"
/ {
model = "Freescale Layerscape 2080a QDS Board";
@@ -18,71 +18,3 @@
spi1 =
};
};
-
- {
- status = "okay";
- pca9547@77 {
- compatible = "nxp,pca9547";
- reg = <0x77>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x00>;
- rtc@68 {
- compatible = "dallas,ds3232";
- reg = <0x68>;
- };
- };
- };
-};
-
- {
- bus-num = <0>;
- status = "okay";
-
- dflash0: n25q128a {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <300>;
-
[PATCH v3 0/3] boards: ls2080aqds: transition to CONFIG_DM_ETH
This patch set targets to add support for CONFIG_DM_ETH for the NXP LS2080AQDS board. The main focus is on changing the DTS based on the SERDES protocol used. In order to accomplish this, the MULTI_DTB_FIT feature is employed and the appropriate DTS is chosed on boot from a list of predefined files. Any unnecessary configurations made for the DPAA2 ethernet devices in the board files are compiled out when CONFIG_DM_ETH is enabled. This is because any information necessary is available in its associated DTS node. This patch set depends on another series that adds support for DM_ETH in the ldpaa_eth driver and the RDB boards: https://patchwork.ozlabs.org/project/uboot/list/?series=165158=* For the moment, when CONFIG_DM_ETH is enabled DPAA2 networking is supported only for the SERDES block #1 protocol 42 (0x2a). Changes in v2: - rebased on top of u-boot-fsl-qoriq/next Changes in v3: - fixed a build warning in patch 1/3 Ioana Ciornei (3): board: ls2080aqds: transition to DM_ETH arm: dts: ls2080aqds: add CONFIG_MULTI_DTB_FIT support configs: ls2080aqds_tfa_defconfig: enable DM_ETH and related arch/arm/dts/Makefile| 1 + arch/arm/dts/fsl-ls2080a-qds-42-x.dts| 16 arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi | 48 ++ arch/arm/dts/fsl-ls2080a-qds.dts | 72 +-- arch/arm/dts/fsl-ls2080a-qds.dtsi| 77 board/freescale/ls2080aqds/eth.c | 112 ++- board/freescale/ls2080aqds/ls2080aqds.c | 4 + configs/ls2088aqds_tfa_defconfig | 8 ++ 8 files changed, 265 insertions(+), 73 deletions(-) create mode 100644 arch/arm/dts/fsl-ls2080a-qds-42-x.dts create mode 100644 arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi create mode 100644 arch/arm/dts/fsl-ls2080a-qds.dtsi -- 2.17.1
RE: [PATCH v2 1/3] board: ls2080aqds: transition to DM_ETH
> Subject: RE: [PATCH v2 1/3] board: ls2080aqds: transition to DM_ETH
>
> >-Original Message-----
> >From: Ioana Ciornei
> >Sent: Friday, May 15, 2020 12:27 PM
> >To: Priyanka Jain ; u-boot@lists.denx.de
> >Cc: Ioana Ciornei
> >Subject: [PATCH v2 1/3] board: ls2080aqds: transition to DM_ETH
> >
> >In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2
> >Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH
> >is activated. Also, force the PCI devices to be enumerated at probe time.
> >
> >Signed-off-by: Ioana Ciornei
> >---
> > board/freescale/ls2080aqds/eth.c| 13 +++--
> > board/freescale/ls2080aqds/ls2080aqds.c | 4
> > 2 files changed, 15 insertions(+), 2 deletions(-)
> >
> >diff --git a/board/freescale/ls2080aqds/eth.c
> >b/board/freescale/ls2080aqds/eth.c
> >index bbb70a859a1e..47f57d94b847 100644
> >--- a/board/freescale/ls2080aqds/eth.c
> >+++ b/board/freescale/ls2080aqds/eth.c
> >@@ -24,6 +24,8 @@
> >
> > #define MC_BOOT_ENV_VAR "mcinitcmd"
> >
> >+#ifndef CONFIG_DM_ETH
> >+
> > #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
> > /* - In LS2080A there are only 16 SERDES lanes, spread across 2
> >SERDES banks.
> > * Bank 1 -> Lanes A, B, C, D, E, F, G, H
> >@@ -889,9 +891,11 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
> > }
> > }
> > #endif
> >+#endif // !CONFIG_DM_ETH
> >
> > int board_eth_init(bd_t *bis)
> > {
> >+#ifndef CONFIG_DM_ETH
> > int error;
> > #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
> > struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
> @@
> >-970,8 +974,13 @@ int board_eth_init(bd_t *bis)
> > sgmii_configure_repeater(2);
> > }
> > #endif
> >-error = pci_eth_init(bis);
> >-return error;
> >+#endif // !CONFIG_DM_ETH
> >+
> >+#ifdef CONFIG_DM_ETH
> >+return 0;
> >+#else
> >+return pci_eth_init(bis);
> >+#endif
> > }
> >
> > #if defined(CONFIG_RESET_PHY_R)
> >diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
> >b/board/freescale/ls2080aqds/ls2080aqds.c
> >index 4034bdee2842..1c91c5b7f052 100644
> >--- a/board/freescale/ls2080aqds/ls2080aqds.c
> >+++ b/board/freescale/ls2080aqds/ls2080aqds.c
> >@@ -251,6 +251,10 @@ int board_init(void)
> > ppa_init();
> > #endif
> >
> >+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
> >+pci_init();
> >+#endif
> >+
> > return 0;
> > }
> >
> >--
> >2.17.1
> Please fix below build warning:
>
> -(ls2080aqds_nand ls2080aqds_sdcard) int error;
> -(ls2080aqds_nand ls2080aqds_sdcard) ^
> w-(ls2080aqds_nand ls2080aqds_sdcard) ../board/freescale/ls2080aqds/eth.c:
> In function â board_eth_initâ :
> w-(ls2080aqds_nand ls2080aqds_sdcard)
> ../board/freescale/ls2080aqds/eth.c:899:6: warning: unused variable â errorâ
> [-
> Wunused-variable]
>
> Regards
> Priyanka
Sure, I'll fix it. Sorry for missing it myself.
Ioana
[PATCH v2 3/3] configs: ls2080aqds_tfa_defconfig: enable DM_ETH and related
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the LS2080AQDS board. Signed-off-by: Ioana Ciornei --- configs/ls2088aqds_tfa_defconfig | 8 1 file changed, 8 insertions(+) diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index a3486e4a5010..ad17ef1703d4 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -34,6 +35,8 @@ CONFIG_MP=y # CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_OF_LIST="fsl-ls2080a-qds-42-x" +CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -62,9 +65,14 @@ CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y CONFIG_PHY_TERANETICS=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_MDIO_MUX_I2CREG=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y -- 2.17.1
[PATCH v2 3/3] configs: ls1088aqds_tfa_defconfig: enable DM_ETH and related
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the LS1088AQDS board. Signed-off-by: Ioana Ciornei --- configs/ls1088aqds_tfa_defconfig | 8 1 file changed, 8 insertions(+) diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index e4e20affec07..c184843a6d97 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_MEMTEST_START=0x8000 CONFIG_SYS_MEMTEST_END=0x9fff +CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y @@ -35,6 +36,8 @@ CONFIG_CMD_USB=y CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" +CONFIG_OF_LIST="fsl-ls1088a-qds-21-x fsl-ls1088a-qds-29-x" +CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y @@ -66,8 +69,13 @@ CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y CONFIG_PHY_TERANETICS=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_MDIO_MUX_I2CREG=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y -- 2.17.1
[PATCH v2 2/3] arm: dts: ls2080aqds: add CONFIG_MULTI_DTB_FIT support
Add support for selecting the appropriate DTS file depending on the
SERDES protocol used.
The fsl-ls2080a-qds DTS will be used by default if there isn't a DTS
file specifically made for the current SERDES protocol.
This patch adds the necessary DPMAC nodes (DPMAC 1-8) for
protocol 42 (0x2A) on SD#1.
Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled
implement the board_fit_config_name_match() function in order to choose
the appropriate DTS.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/fsl-ls2080a-qds-42-x.dts| 16
arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi | 48
arch/arm/dts/fsl-ls2080a-qds.dts | 72 +-
arch/arm/dts/fsl-ls2080a-qds.dtsi| 77 +++
board/freescale/ls2080aqds/eth.c | 97
6 files changed, 241 insertions(+), 70 deletions(-)
create mode 100644 arch/arm/dts/fsl-ls2080a-qds-42-x.dts
create mode 100644 arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
create mode 100644 arch/arm/dts/fsl-ls2080a-qds.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5be6acb108be..7a766924e98d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -374,6 +374,7 @@ dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \
ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \
ls1021a-iot-duart.dtb ls1021a-tsn.dtb
dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
+ fsl-ls2080a-qds-42-x.dtb \
fsl-ls2080a-rdb.dtb \
fsl-ls2081a-rdb.dtb \
fsl-ls2088a-rdb-qspi.dtb \
diff --git a/arch/arm/dts/fsl-ls2080a-qds-42-x.dts
b/arch/arm/dts/fsl-ls2080a-qds-42-x.dts
new file mode 100644
index ..bd46c395d45c
--- /dev/null
+++ b/arch/arm/dts/fsl-ls2080a-qds-42-x.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS2080AQDS device tree source for SERDES protocol 42.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls2080a-qds-sd1-42.dtsi"
+
+/ {
+ model = "NXP Layerscape LS2080AQDS Board (DTS 42-x)";
+ compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
+};
diff --git a/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
b/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
new file mode 100644
index ..ccbb5de1eaef
--- /dev/null
+++ b/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS2080aQDS device tree source for SERDES block #1 - protocol 42 (0x2a)
+ *
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls2080a-qds.dtsi"
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b/arch/arm/dts/fsl-ls2080a-qds.dts
index f91a48d9fddb..a1196f929287 100644
--- a/arch/arm/dts/fsl-ls2080a-qds.dts
+++ b/arch/arm/dts/fsl-ls2080a-qds.dts
@@ -1,13 +1,13 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Freescale ls2080a QDS board device tree source
+ * Freescale ls2080a QDS defaul board device tree source
*
* Copyright 2013-2015 Freescale Semiconductor, Inc.
*/
/dts-v1/;
-#include "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a-qds.dtsi"
/ {
model = "Freescale Layerscape 2080a QDS Board";
@@ -18,71 +18,3 @@
spi1 =
};
};
-
- {
- status = "okay";
- pca9547@77 {
- compatible = "nxp,pca9547";
- reg = <0x77>;
- #address-cells = <1>;
- #size-cells = <0>;
- i2c@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x00>;
- rtc@68 {
- compatible = "dallas,ds3232";
- reg = <0x68>;
- };
- };
- };
-};
-
- {
- bus-num = <0>;
- status = "okay";
-
- dflash0: n25q128a {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <300>;
- spi-cpol;
- spi
[PATCH v2 0/3] boards: ls1088aqds: transition to CONFIG_DM_ETH
This patch set targets to add support for CONFIG_DM_ETH for the NXP LS1088AQDS board. The main focus is on changing the DTS based on the SERDES protocol used. In order to accomplish this, the MULTI_DTB_FIT feature is employed and the appropriate DTS is chosed on boot from a list of predefined files. Any unnecessary configurations made for the DPAA2 ethernet devices in the board files are compiled out when CONFIG_DM_ETH is enabled. This is because any information necessary is available in its associated DTS node. This patch set depends on another series that adds support for DM_ETH in the ldpaa_eth driver and the RDB boards: https://patchwork.ozlabs.org/project/uboot/list/?series=165158=* For the moment, when CONFIG_DM_ETH is enabled DPAA2 networking is supported only for the SERDES block #1 protocol 21 (0x15) and protocol 29 (0x1d). Changes in v2: - rebased on top of u-boot-fsl-qoriq/next Ioana Ciornei (3): arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support board: ls1088aqds: transition to DM_ETH configs: ls1088aqds_tfa_defconfig: enable DM_ETH and related arch/arm/dts/Makefile| 2 + arch/arm/dts/fsl-ls1088a-qds-21-x.dts| 16 ++ arch/arm/dts/fsl-ls1088a-qds-29-x.dts| 16 ++ arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi | 30 arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi | 19 +++ arch/arm/dts/fsl-ls1088a-qds.dts | 123 +-- arch/arm/dts/fsl-ls1088a-qds.dtsi| 186 +++ board/freescale/ls1088a/eth_ls1088aqds.c | 89 +++ configs/ls1088aqds_tfa_defconfig | 8 + 9 files changed, 369 insertions(+), 120 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1088a-qds-21-x.dts create mode 100644 arch/arm/dts/fsl-ls1088a-qds-29-x.dts create mode 100644 arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi create mode 100644 arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi create mode 100644 arch/arm/dts/fsl-ls1088a-qds.dtsi -- 2.17.1
[PATCH v2 1/3] arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support
Add support for selecting the appropriate DTS file depending on the
SERDES protocol used. The fsl-ls2088a-qds DTS will be used by default if
there isn't a DTS file specifically made for the current SERDES
protocol.
This patch adds support for the on-board ports (DPMAC 1,2 and 4,5) found
on the SERDES protocols 21(0x15) and 29(0x1d) for SD#1.
On the LS1088AQDS board EMDIO1 is used with two onboard RGMII PHYs
(Realtek RTL8211FD-CG), as well as 2 input/output connectors for
mezzanine cards. Configuration signals from the Qixis FPGA control the
routing of the external MDIOs.
Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one
of the 2 IO slots. As a consequence, a new node is added to
describe register 0x54 as a MDIO mux controlled with child nodes
describing all the IO slots as MDIO buses.
Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled
implement the board_fit_config_name_match() function in order to choose
the appropriate DTS.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/Makefile| 2 +
arch/arm/dts/fsl-ls1088a-qds-21-x.dts| 16 ++
arch/arm/dts/fsl-ls1088a-qds-29-x.dts| 16 ++
arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi | 30
arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi | 19 +++
arch/arm/dts/fsl-ls1088a-qds.dts | 123 +--
arch/arm/dts/fsl-ls1088a-qds.dtsi| 186 +++
board/freescale/ls1088a/eth_ls1088aqds.c | 87 +++
8 files changed, 359 insertions(+), 120 deletions(-)
create mode 100644 arch/arm/dts/fsl-ls1088a-qds-21-x.dts
create mode 100644 arch/arm/dts/fsl-ls1088a-qds-29-x.dts
create mode 100644 arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
create mode 100644 arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
create mode 100644 arch/arm/dts/fsl-ls1088a-qds.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7a766924e98d..f246f493a314 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -380,6 +380,8 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
fsl-ls2088a-rdb-qspi.dtb \
fsl-ls1088a-rdb.dtb \
fsl-ls1088a-qds.dtb \
+ fsl-ls1088a-qds-21-x.dtb \
+ fsl-ls1088a-qds-29-x.dtb \
fsl-ls1028a-rdb.dtb \
fsl-ls1028a-qds-duart.dtb \
fsl-ls1028a-qds-lpuart.dtb \
diff --git a/arch/arm/dts/fsl-ls1088a-qds-21-x.dts
b/arch/arm/dts/fsl-ls1088a-qds-21-x.dts
new file mode 100644
index ..a87796451199
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-21-x.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES protocol 21.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls1088a-qds-sd1-21.dtsi"
+
+/ {
+ model = "NXP Layerscape 1088a QDS Board (DTS 21-x)";
+ compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds-29-x.dts
b/arch/arm/dts/fsl-ls1088a-qds-29-x.dts
new file mode 100644
index ..29c4ec59fe50
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-29-x.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES protocol 29.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls1088a-qds-sd1-29.dtsi"
+
+/ {
+ model = "NXP Layerscape 1088a QDS Board (DTS 29-x)";
+ compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
b/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
new file mode 100644
index ..e0a6c04835bf
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES block #1 - protocol 21 (0x15)
+ *
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls1088a-qds.dtsi"
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-handle = <_phy1>;
+ phy-connection-type = "rgmii-id";
+};
+
+ {
+ status = "okay";
+ phy-handle = <_phy2>;
+ phy-connection-type = "rgmii-id";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
b/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
new file mode 100644
index ..25a6af875eef
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES block #1 - protocol 29 (0x1d)
+ *
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls1088a-qds.dtsi"
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
di
[PATCH v2 1/3] board: ls2080aqds: transition to DM_ETH
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2
Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH
is activated. Also, force the PCI devices to be enumerated at probe
time.
Signed-off-by: Ioana Ciornei
---
board/freescale/ls2080aqds/eth.c| 13 +++--
board/freescale/ls2080aqds/ls2080aqds.c | 4
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index bbb70a859a1e..47f57d94b847 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -24,6 +24,8 @@
#define MC_BOOT_ENV_VAR "mcinitcmd"
+#ifndef CONFIG_DM_ETH
+
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
* Bank 1 -> Lanes A, B, C, D, E, F, G, H
@@ -889,9 +891,11 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
}
}
#endif
+#endif // !CONFIG_DM_ETH
int board_eth_init(bd_t *bis)
{
+#ifndef CONFIG_DM_ETH
int error;
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
@@ -970,8 +974,13 @@ int board_eth_init(bd_t *bis)
sgmii_configure_repeater(2);
}
#endif
- error = pci_eth_init(bis);
- return error;
+#endif // !CONFIG_DM_ETH
+
+#ifdef CONFIG_DM_ETH
+ return 0;
+#else
+ return pci_eth_init(bis);
+#endif
}
#if defined(CONFIG_RESET_PHY_R)
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
b/board/freescale/ls2080aqds/ls2080aqds.c
index 4034bdee2842..1c91c5b7f052 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -251,6 +251,10 @@ int board_init(void)
ppa_init();
#endif
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+ pci_init();
+#endif
+
return 0;
}
--
2.17.1
[PATCH v2 0/3] boards: ls2080aqds: transition to CONFIG_DM_ETH
This patch set targets to add support for CONFIG_DM_ETH for the NXP LS2080AQDS board. The main focus is on changing the DTS based on the SERDES protocol used. In order to accomplish this, the MULTI_DTB_FIT feature is employed and the appropriate DTS is chosed on boot from a list of predefined files. Any unnecessary configurations made for the DPAA2 ethernet devices in the board files are compiled out when CONFIG_DM_ETH is enabled. This is because any information necessary is available in its associated DTS node. This patch set depends on another series that adds support for DM_ETH in the ldpaa_eth driver and the RDB boards: https://patchwork.ozlabs.org/project/uboot/list/?series=165158=* For the moment, when CONFIG_DM_ETH is enabled DPAA2 networking is supported only for the SERDES block #1 protocol 42 (0x2a). Changes in v2: - rebased on top of u-boot-fsl-qoriq/next Ioana Ciornei (3): board: ls2080aqds: transition to DM_ETH arm: dts: ls2080aqds: add CONFIG_MULTI_DTB_FIT support configs: ls2080aqds_tfa_defconfig: enable DM_ETH and related arch/arm/dts/Makefile| 1 + arch/arm/dts/fsl-ls2080a-qds-42-x.dts| 16 arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi | 48 ++ arch/arm/dts/fsl-ls2080a-qds.dts | 72 +-- arch/arm/dts/fsl-ls2080a-qds.dtsi| 77 board/freescale/ls2080aqds/eth.c | 110 ++- board/freescale/ls2080aqds/ls2080aqds.c | 4 + configs/ls2088aqds_tfa_defconfig | 8 ++ 8 files changed, 264 insertions(+), 72 deletions(-) create mode 100644 arch/arm/dts/fsl-ls2080a-qds-42-x.dts create mode 100644 arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi create mode 100644 arch/arm/dts/fsl-ls2080a-qds.dtsi -- 2.17.1
[PATCH v2 2/3] board: ls1088aqds: transition to DM_ETH
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2 Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH is activated. Also, force the PCI devices to be enumerated at probe time. Signed-off-by: Ioana Ciornei --- board/freescale/ls1088a/eth_ls1088aqds.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c index c0bcf7129929..7456f67f3d60 100644 --- a/board/freescale/ls1088a/eth_ls1088aqds.c +++ b/board/freescale/ls1088a/eth_ls1088aqds.c @@ -24,6 +24,7 @@ #include "ls1088a_qixis.h" +#ifndef CONFIG_DM_ETH #ifdef CONFIG_FSL_MC_ENET #define SFP_TX 0 @@ -735,6 +736,7 @@ int board_eth_init(bd_t *bis) error = pci_eth_init(bis); return error; } +#endif // !CONFIG_DM_ETH #if defined(CONFIG_RESET_PHY_R) void reset_phy(void) -- 2.17.1
RE: [PATCH 3/3] configs: ls2080aqds_tfa_defconfig: enable DM_ETH and related
> Subject: RE: [PATCH 3/3] configs: ls2080aqds_tfa_defconfig: enable DM_ETH > and related > > >-Original Message- > >From: U-Boot On Behalf Of Ioana Ciornei > >Sent: Wednesday, April 29, 2020 4:03 PM > >To: u-boot@lists.denx.de; Priyanka Jain > >Cc: Alexandru Marginean ; Madalin Bucur > >; Florin Laurentiu Chiculita > >; Razvan Ionut Cirjan > >; Ioana Ciornei > >Subject: [PATCH 3/3] configs: ls2080aqds_tfa_defconfig: enable DM_ETH > >and related > > > >Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the > >LS2080AQDS board. > > > >Signed-off-by: Ioana Ciornei > >--- > > configs/ls2088aqds_tfa_defconfig | 10 +- > > 1 file changed, 9 insertions(+), 1 deletion(-) > > > >diff --git a/configs/ls2088aqds_tfa_defconfig > >b/configs/ls2088aqds_tfa_defconfig > >index 9f49736b4f31..9eb7effce56d 100644 > >--- a/configs/ls2088aqds_tfa_defconfig > >+++ b/configs/ls2088aqds_tfa_defconfig > >@@ -3,8 +3,8 @@ CONFIG_TARGET_LS2080AQDS=y CONFIG_TFABOOT=y > > CONFIG_SYS_TEXT_BASE=0x8200 > > CONFIG_ENV_SIZE=0x2 > >-CONFIG_ENV_SECT_SIZE=0x2 > > CONFIG_ENV_OFFSET=0x50 > >+CONFIG_ENV_SECT_SIZE=0x2 > > > Why you need above change? > > Regards > Priyanka The change above resulted from a make savedefconfig. It's not needed but it would be good to have the defconfigs aligned with the result of the make command. Regards, Ioana
[PATCH 2/3] board: ls1088aqds: transition to DM_ETH
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2 Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH is activated. Also, force the PCI devices to be enumerated at probe time. Signed-off-by: Ioana Ciornei --- board/freescale/ls1088a/eth_ls1088aqds.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c index c0bcf7129929..7456f67f3d60 100644 --- a/board/freescale/ls1088a/eth_ls1088aqds.c +++ b/board/freescale/ls1088a/eth_ls1088aqds.c @@ -24,6 +24,7 @@ #include "ls1088a_qixis.h" +#ifndef CONFIG_DM_ETH #ifdef CONFIG_FSL_MC_ENET #define SFP_TX 0 @@ -735,6 +736,7 @@ int board_eth_init(bd_t *bis) error = pci_eth_init(bis); return error; } +#endif // !CONFIG_DM_ETH #if defined(CONFIG_RESET_PHY_R) void reset_phy(void) -- 2.17.1
[PATCH 1/3] arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support
Add support for selecting the appropriate DTS file depending on the
SERDES protocol used. The fsl-ls2088a-qds DTS will be used by default if
there isn't a DTS file specifically made for the current SERDES
protocol.
This patch adds support for the on-board ports (DPMAC 1,2 and 4,5) found
on the SERDES protocols 21(0x15) and 29(0x1d) for SD#1.
On the LS1088AQDS board EMDIO1 is used with two onboard RGMII PHYs
(Realtek RTL8211FD-CG), as well as 2 input/output connectors for
mezzanine cards. Configuration signals from the Qixis FPGA control the
routing of the external MDIOs.
Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one
of the 2 IO slots. As a consequence, a new node is added to
describe register 0x54 as a MDIO mux controlled with child nodes
describing all the IO slots as MDIO buses.
Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled
implement the board_fit_config_name_match() function in order to choose
the appropriate DTS.
Signed-off-by: Ioana Ciornei
---
arch/arm/dts/Makefile| 2 +
arch/arm/dts/fsl-ls1088a-qds-21-x.dts| 16 ++
arch/arm/dts/fsl-ls1088a-qds-29-x.dts| 16 ++
arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi | 30
arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi | 19 +++
arch/arm/dts/fsl-ls1088a-qds.dts | 124 +--
arch/arm/dts/fsl-ls1088a-qds.dtsi| 187 +++
board/freescale/ls1088a/eth_ls1088aqds.c | 87 +++
8 files changed, 359 insertions(+), 122 deletions(-)
create mode 100644 arch/arm/dts/fsl-ls1088a-qds-21-x.dts
create mode 100644 arch/arm/dts/fsl-ls1088a-qds-29-x.dts
create mode 100644 arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
create mode 100644 arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
create mode 100644 arch/arm/dts/fsl-ls1088a-qds.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b6df24fdb2ac..ad2e975a9b66 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -375,6 +375,8 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
fsl-ls2088a-rdb-qspi.dtb \
fsl-ls1088a-rdb.dtb \
fsl-ls1088a-qds.dtb \
+ fsl-ls1088a-qds-21-x.dtb \
+ fsl-ls1088a-qds-29-x.dtb \
fsl-ls1028a-rdb.dtb \
fsl-ls1028a-qds.dtb \
fsl-lx2160a-rdb.dtb \
diff --git a/arch/arm/dts/fsl-ls1088a-qds-21-x.dts
b/arch/arm/dts/fsl-ls1088a-qds-21-x.dts
new file mode 100644
index ..a87796451199
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-21-x.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES protocol 21.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls1088a-qds-sd1-21.dtsi"
+
+/ {
+ model = "NXP Layerscape 1088a QDS Board (DTS 21-x)";
+ compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds-29-x.dts
b/arch/arm/dts/fsl-ls1088a-qds-29-x.dts
new file mode 100644
index ..29c4ec59fe50
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-29-x.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES protocol 29.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls1088a-qds-sd1-29.dtsi"
+
+/ {
+ model = "NXP Layerscape 1088a QDS Board (DTS 29-x)";
+ compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
b/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
new file mode 100644
index ..e0a6c04835bf
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES block #1 - protocol 21 (0x15)
+ *
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls1088a-qds.dtsi"
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-handle = <_phy1>;
+ phy-connection-type = "rgmii-id";
+};
+
+ {
+ status = "okay";
+ phy-handle = <_phy2>;
+ phy-connection-type = "rgmii-id";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
b/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
new file mode 100644
index ..25a6af875eef
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES block #1 - protocol 29 (0x1d)
+ *
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls1088a-qds.dtsi"
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
+ {
+ status = "okay";
+ phy-connection-type = "xfi";
+};
+
diff --git a/
[PATCH 0/3] boards: ls1088aqds: transition to CONFIG_DM_ETH
This patch set targets to add support for CONFIG_DM_ETH for the NXP LS1088AQDS board. The main focus is on changing the DTS based on the SERDES protocol used. In order to accomplish this, the MULTI_DTB_FIT feature is employed and the appropriate DTS is chosed on boot from a list of predefined files. Any unnecessary configurations made for the DPAA2 ethernet devices in the board files are compiled out when CONFIG_DM_ETH is enabled. This is because any information necessary is available in its associated DTS node. This patch set depends on another series that adds support for DM_ETH in the ldpaa_eth driver and the RDB boards: https://patchwork.ozlabs.org/project/uboot/list/?series=165158=* For the moment, when CONFIG_DM_ETH is enabled DPAA2 networking is supported only for the SERDES block #1 protocol 21 (0x15) and protocol 29 (0x1d). Ioana Ciornei (3): arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support board: ls1088aqds: transition to DM_ETH configs: ls1088aqds_tfa_defconfig: enable DM_ETH and related arch/arm/dts/Makefile| 2 + arch/arm/dts/fsl-ls1088a-qds-21-x.dts| 16 ++ arch/arm/dts/fsl-ls1088a-qds-29-x.dts| 16 ++ arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi | 30 arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi | 19 +++ arch/arm/dts/fsl-ls1088a-qds.dts | 124 +-- arch/arm/dts/fsl-ls1088a-qds.dtsi| 187 +++ board/freescale/ls1088a/eth_ls1088aqds.c | 89 +++ configs/ls1088aqds_tfa_defconfig | 11 +- include/configs/ls1088aqds.h | 2 + 10 files changed, 373 insertions(+), 123 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1088a-qds-21-x.dts create mode 100644 arch/arm/dts/fsl-ls1088a-qds-29-x.dts create mode 100644 arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi create mode 100644 arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi create mode 100644 arch/arm/dts/fsl-ls1088a-qds.dtsi -- 2.17.1
[PATCH 3/3] configs: ls1088aqds_tfa_defconfig: enable DM_ETH and related
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the LS1088AQDS board. Signed-off-by: Ioana Ciornei --- configs/ls1088aqds_tfa_defconfig | 11 ++- include/configs/ls1088aqds.h | 2 ++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index 1144cba983c6..a1f3d14980dc 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -4,8 +4,8 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x8200 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_ENV_SIZE=0x2 -CONFIG_ENV_SECT_SIZE=0x4 CONFIG_ENV_OFFSET=0x50 +CONFIG_ENV_SECT_SIZE=0x4 CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -24,6 +24,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y @@ -31,6 +32,8 @@ CONFIG_CMD_USB=y CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" +CONFIG_OF_LIST="fsl-ls1088a-qds-21-x fsl-ls1088a-qds-29-x" +CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y @@ -57,8 +60,14 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_MDIO_MUX_I2CREG=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 4ac4a8d85686..122504fb407e 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -549,7 +549,9 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_FSL_MC_ENET #define CONFIG_FSL_MEMAC +#ifndef CONFIG_TARGET_LS1088AQDS #defineCONFIG_PHYLIB +#endif #define CONFIG_PHYLIB_10G #define CONFIG_PHY_VITESSE #define CONFIG_PHY_REALTEK -- 2.17.1
RE: [PATCH] net: fsl-mc: fixup DPC: add /board/ports node if missing
> Subject: [PATCH] net: fsl-mc: fixup DPC: add /board/ports node if missing
>
> The DPC fixup for MAC address and enet_if is not made if /board/ports node is
> missing in DPC file.
> Add /board/ports or /ports nodes if them are missing.
>
> Signed-off-by: Razvan Ionut Cirjan
Reviewed-by: Ioana Ciornei
> ---
> drivers/net/fsl-mc/mc.c | 17 ++---
> 1 file changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index
> 07bbcc9b2311..a9bccdd1b04e 100644
> --- a/drivers/net/fsl-mc/mc.c
> +++ b/drivers/net/fsl-mc/mc.c
> @@ -1,7 +1,7 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> * Copyright 2014 Freescale Semiconductor, Inc.
> - * Copyright 2017-2018 NXP
> + * Copyright 2017-2018, 2020 NXP
> */
> #include
> #include
> @@ -439,8 +439,19 @@ static int mc_fixup_dpc(u64 dpc_addr)
>
> /* fixup MAC addresses for dpmac ports */
> nodeoffset = fdt_path_offset(blob, "/board_info/ports");
> - if (nodeoffset < 0)
> - goto out;
> + if (nodeoffset < 0) {
> + err = fdt_increase_size(blob, 512);
> + if (err) {
> + printf("fdt_increase_size: err=%s\n",
> +fdt_strerror(err));
> + goto out;
> + }
> + nodeoffset = fdt_path_offset(blob, "/board_info");
> + if (nodeoffset < 0)
> + nodeoffset = fdt_add_subnode(blob, 0, "board_info");
> +
> + nodeoffset = fdt_add_subnode(blob, nodeoffset, "ports");
> + }
>
> err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPC);
>
> --
> 1.9.1
