Re: [U-Boot] [PATCH] rockchip: config: update part table

[Jacob Chen]

Hi,

2017-11-01 8:36 GMT+08:00 Eddie Cai :
> Hi Kever
> The reserved partition is not only for U-Boot but also for system.
> There are customers using reserved partition in system now.
>


It's ok to hide them, since we just use offset, not partition index.


> 2017-10-31 16:52 GMT+08:00 Kever Yang :
>> User do not need to access the reserved part in system, remove them
>> from partition table.
>> Rename atf to trust as generic name for armv7 do not use ATF.
>>
>> Signed-off-by: Kever Yang 
>> ---
>>
>>  include/configs/rockchip-common.h | 6 ++
>>  1 file changed, 2 insertions(+), 4 deletions(-)
>>
>> diff --git a/include/configs/rockchip-common.h 
>> b/include/configs/rockchip-common.h
>> index 35d948a..4139a7b 100644
>> --- a/include/configs/rockchip-common.h
>> +++ b/include/configs/rockchip-common.h
>> @@ -52,10 +52,8 @@
>>  #define PARTS_DEFAULT \
>> "uuid_disk=${uuid_gpt_disk};" \
>> "name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
>> -   "name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
>> -   "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
>> -   "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
>> -   "name=atf,size=4M,uuid=${uuid_gpt_atf};" \
>> +   "name=loader2,start=8MB,size=4MB,uuid=${uuid_gpt_loader2};" \
>> +   "name=trust,size=4M,uuid=${uuid_gpt_atf};" \
>> "name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \
>> "name=rootfs,size=-,uuid="ROOT_UUID
>>
>> --
>> 1.9.1
>>
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Re: [U-Boot] [PATCH v3 2/3] rockchip: firefly: Add "usb start" to auto-start USB device

[Jacob Chen]

HI leo,


Leo Wen wrote on 2017年07月25日 13:53:

Add "usb start" to #define PREBOOT,you don't need to input "usb start"
in command line of u-boot console,it can auto-start the USB device,
after that usb keyboard can work.

Change-Id: I40f6d81a6e8478703cb03c44e0f00fc2d26df33a


Change-Id should be removed.


Signed-off-by: Leo Wen 
---
  include/configs/rk3288_common.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index ac268cd..23d7389 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -113,6 +113,6 @@
BOOTENV
  #endif
  
-#define CONFIG_PREBOOT

+#define CONFIG_PREBOOT "usb start"
  


It should not be set in here, it will affect all rockchip bords.

You can append "preboot=usb start;" to ROCKCHIP_DEVICE_SETTINGS.
https://github.com/rockchip-linux/u-boot/blob/release/include/configs/firefly-rk3288.h#L10



  #endif



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Re: [U-Boot] [PATCH] rockchip: rk8xx: allocate priv structure for driver

[Jacob Chen]

Hi,


2017-05-05 14:50 GMT+08:00 Kever Yang <kever.y...@rock-chips.com>:
> The rk8xx_priv structure need to allocate for driver, or else
> it will cause data abort when CPU access it.
>
> This is a bug fix for below patch set:
> https://www.mail-archive.com/u-boot@lists.denx.de/msg247345.html
>
> Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
> ---
>
>  drivers/power/pmic/rk8xx.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
> index 394e2ff..850c66f 100644
> --- a/drivers/power/pmic/rk8xx.c
> +++ b/drivers/power/pmic/rk8xx.c
> @@ -113,6 +113,7 @@ U_BOOT_DRIVER(pmic_rk8xx) = {
>  #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
> .bind = rk8xx_bind,
>  #endif
> +   .priv_auto_alloc_size   = sizeof(struct rk8xx_priv),
> .probe = rk8xx_probe,
> .ops = _ops,
>  };
> --
> 1.9.1
>
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Sorry for mistakes, Tested-by: Jacob Chen <jacob2.c...@rock-chips.com>.
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Re: [U-Boot] [PATCH] power: rk8xx: fix auto-allocation of priv

[Jacob Chen]

Hi,

2017-05-06 3:28 GMT+08:00 Philipp Tomsich
:
> The recent changes to the RK808 driver caused our BSP to sync-abort in
> the regulator framework, when setting (or rather 'auto-setting') some
> of the LDOs.
>
> Turns out that the auto-allocation of the priv-structure in the rk8xx
> driver was never properly wired up... this commit fixes this issue
> by setting the .priv_auto_alloc_size-field in the driver structure.
>
> X-AffectedPlatforms: RK3399-Q7
> Signed-off-by: Philipp Tomsich 
>
> ---
>
>  drivers/power/pmic/rk8xx.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
> index 394e2ff..ff3bff0 100644
> --- a/drivers/power/pmic/rk8xx.c
> +++ b/drivers/power/pmic/rk8xx.c
> @@ -115,4 +115,5 @@ U_BOOT_DRIVER(pmic_rk8xx) = {
>  #endif
> .probe = rk8xx_probe,
> .ops = _ops,
> +   .priv_auto_alloc_size = sizeof(struct rk8xx_priv),
>  };
> --
> 1.9.1
>
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Sorry for untest patches.
Kever had send a same patch, "rockchip: rk8xx: allocate priv structure
for driver".
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Re: [U-Boot] [PATCH] power: rk808: fix ldo register offset

[Jacob Chen]

Hi,

2017-05-07 3:21 GMT+08:00 Heiko Stuebner <he...@sntech.de>:
> Till now get_ldo_reg did a return _ldo[num - 1]; to return
> the ldo register offset but didn't take into account that its
> calling functions already created the ldo as ldo = dev->driver_data - 1.
>
> This resulted in the setting for ldo8 writing to the register of ldo7
> and so on. So fix this and get the correct ldo register data.
>
> Signed-off-by: Heiko Stuebner <he...@sntech.de>
> ---
>  drivers/power/regulator/rk8xx.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
> index e655c2d91f..c1ece96b66 100644
> --- a/drivers/power/regulator/rk8xx.c
> +++ b/drivers/power/regulator/rk8xx.c
> @@ -92,9 +92,9 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct 
> udevice *pmic,
> struct rk8xx_priv *priv = dev_get_priv(pmic);
> switch (priv->variant) {
> case RK818_ID:
> -   return _ldo[num - 1];
> +   return _ldo[num];
> default:
> -   return _ldo[num - 1];
> +   return _ldo[num];
> }
>  }
>
> --
> 2.11.0
>
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Sorry for untest patches, Reviewed-by: Jacob Chen <jacob2.c...@rock-chips.com>.
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Re: [U-Boot] [PATCH v2 2/5] power: pmic: rk808: add RK818 support

[Jacob Chen]

2017-05-02 14:54 GMT+08:00 Jacob Chen <jacob-c...@iotwrt.com>:
> The RK818 chip is a Power Management IC (PMIC) for multimedia and handheld
> devices.
>
> For boards use rk818, the input current should be set in the early stage, 
> before
> ddr initialization.
>
> Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
> ---
>
> Changes in v2:
> - remove input current selection in probe, it should be configured
> in board_init_f by manual.
>

Maybe we'd better provide a function here, like `rk808_spl_configure_buck`
It could be `rk8xx_spl_init(pmic, parm)`


>  drivers/power/pmic/rk808.c | 16 
>  include/power/rk808_pmic.h | 12 
>  2 files changed, 28 insertions(+)
>
> diff --git a/drivers/power/pmic/rk808.c b/drivers/power/pmic/rk808.c
> index 3f5f316..582e456 100644
> --- a/drivers/power/pmic/rk808.c
> +++ b/drivers/power/pmic/rk808.c
> @@ -80,6 +80,20 @@ static int rk808_bind(struct udevice *dev)
>  }
>  #endif
>
> +static int rk808_probe(struct udevice *dev)
> +{
> +   struct rk808_priv *priv = dev_get_priv(dev);
> +   uint8_t msb, lsb;
> +
> +   /* read Chip variant */
> +   rk808_read(dev, ID_MSB, , 1);
> +   rk808_read(dev, ID_LSB, , 1);
> +
> +   priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
> +
> +   return 0;
> +}
> +
>  static struct dm_pmic_ops rk808_ops = {
> .reg_count = rk808_reg_count,
> .read = rk808_read,
> @@ -88,6 +102,7 @@ static struct dm_pmic_ops rk808_ops = {
>
>  static const struct udevice_id rk808_ids[] = {
> { .compatible = "rockchip,rk808" },
> +   { .compatible = "rockchip,rk818" },
> { }
>  };
>
> @@ -98,5 +113,6 @@ U_BOOT_DRIVER(pmic_rk808) = {
>  #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
> .bind = rk808_bind,
>  #endif
> +   .probe = rk808_probe,
> .ops = _ops,
>  };
> diff --git a/include/power/rk808_pmic.h b/include/power/rk808_pmic.h
> index d29c2b3..c370c32 100644
> --- a/include/power/rk808_pmic.h
> +++ b/include/power/rk808_pmic.h
> @@ -170,12 +170,24 @@ enum {
> RK808_NUM_OF_REGS,
>  };
>
> +enum {
> +   RK805_ID = 0x8050,
> +   RK808_ID = 0x,
> +   RK818_ID = 0x8180,
> +};
> +
> +#define RK8XX_ID_MSK   0xfff0
> +
>  struct rk808_reg_table {
> char *name;
> u8 reg_ctl;
> u8 reg_vol;
>  };
>
> +struct rk808_priv {
> +   int variant;
> +};
> +
>  int rk808_spl_configure_buck(struct udevice *pmic, int buck, int uvolt);
>
>  #endif
> --
> 2.7.4
>
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Re: [U-Boot] [PATCH v2 4/5] power: regulator: rk808: add rk818 support

[Jacob Chen]

2017-05-02 14:54 GMT+08:00 Jacob Chen <jacob-c...@iotwrt.com>:
> Add support for the rk818 regulator. The regulator module consists
> of 4 DCDCs, 9 LDOs, 1 switch and 1 BOOST converter which is used to
> power OTG and HDMI5V.
>
>
>
> Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> ---
>
> Changes in v2: None
>
>  drivers/power/regulator/rk808.c | 55 
> ++---
>  1 file changed, 51 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/power/regulator/rk808.c b/drivers/power/regulator/rk808.c
> index 441806c..71ab76e 100644
> --- a/drivers/power/regulator/rk808.c
> +++ b/drivers/power/regulator/rk808.c
> @@ -25,6 +25,12 @@
>  #define RK808_BUCK4_VSEL_MASK  0xf
>  #define RK808_LDO_VSEL_MASK0x1f
>
> +#define RK818_BUCK_VSEL_MASK   0x3f
> +#define RK818_BUCK4_VSEL_MASK  0x1f
> +#define RK818_LDO_VSEL_MASK0x1f
> +#define RK818_LDO3_ON_VSEL_MASK0xf
> +#define RK818_BOOST_ON_VSEL_MASK   0xe0
> +
>  struct rk808_reg_info {
> uint min_uv;
> uint step_uv;
> @@ -50,10 +56,51 @@ static const struct rk808_reg_info rk808_ldo[] = {
> { 180, 10, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
>  };
>
> +static const struct rk808_reg_info rk818_buck[] = {
> +   { 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
> +   { 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
> +   { 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
> +   { 180, 10, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
> +};
> +
> +static const struct rk808_reg_info rk818_ldo[] = {
> +   { 180, 10, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
> +   { 180, 10, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
> +   { 80, 10, REG_LDO3_ON_VSEL, RK818_LDO3_ON_VSEL_MASK, },
> +   { 180, 10, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
> +   { 180, 10, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
> +   { 80, 10, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
> +   { 80, 10, REG_LDO7_ON_VSEL, RK818_LDO_VSEL_MASK, },
> +   { 180, 10, REG_LDO8_ON_VSEL, RK818_LDO_VSEL_MASK, },
> +};
> +
> +static const struct rk808_reg_info *get_buck_reg(struct udevice *pmic,
> +int num)
> +{
> +   struct rk808_priv *rk808 = dev_get_priv(pmic);
> +   switch (rk808->variant) {
> +   case RK818_ID:
> +   return _buck[num];
> +   default:
> +   return _buck[num];
> +   }
> +}
> +
> +static const struct rk808_reg_info *get_ldo_reg(struct udevice *pmic,
> +int num)
> +{
> +   struct rk808_priv *rk808 = dev_get_priv(pmic);
> +   switch (rk808->variant) {
> +   case RK818_ID:
> +   return _ldo[num - 1];
> +   default:
> +   return _ldo[num - 1];
> +   }
> +}
>
>  static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
>  {
> -   const struct rk808_reg_info *info = _buck[buck - 1];
> +   const struct rk808_reg_info *info = get_buck_reg(pmic, buck - 1);
> int mask = info->vsel_mask;
> int val;
>
> @@ -89,7 +136,7 @@ static int _buck_set_enable(struct udevice *pmic, int 
> buck, bool enable)
>  static int buck_get_value(struct udevice *dev)
>  {
> int buck = dev->driver_data - 1;
> -   const struct rk808_reg_info *info = _buck[buck];
> +   const struct rk808_reg_info *info = get_buck_reg(dev->parent, buck);
> int mask = info->vsel_mask;
> int ret, val;
>
> @@ -135,7 +182,7 @@ static bool buck_get_enable(struct udevice *dev)
>  static int ldo_get_value(struct udevice *dev)
>  {
> int ldo = dev->driver_data - 1;
> -   const struct rk808_reg_info *info = _ldo[ldo];
> +   const struct rk808_reg_info *info = get_ldo_reg(dev->parent, ldo);
> int mask = info->vsel_mask;
> int ret, val;
>
> @@ -152,7 +199,7 @@ static int ldo_get_value(struct udevice *dev)
>  static int ldo_set_value(struct udevice *dev, int uvolt)
>  {
> int ldo = dev->driver_data - 1;
> -   const struct rk808_reg_info *info = _ldo[ldo];
> +   const struct rk808_reg_info *info = get_ldo_reg(dev->parent, ldo);
> int mask = info->vsel_mask;
> int val;
>
> --
> 2.7.4
>

It have some toubles to support DCDC_BOOST, since it don't use num as suffix.
The problem about LDO9 is that it don't have same register map with
others, and i don't want to change much code...
We only need a basic support, i think it's ok to ignore them.
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[U-Boot] [PATCH v2 3/5] power: regulator: rk808: replace vsel_bits with vsel_mask

[Jacob Chen]

Using mask is more flexible than bits.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---

Changes in v2: None

 drivers/power/regulator/rk808.c | 39 ++-
 1 file changed, 22 insertions(+), 17 deletions(-)

diff --git a/drivers/power/regulator/rk808.c b/drivers/power/regulator/rk808.c
index f1a00c5..441806c 100644
--- a/drivers/power/regulator/rk808.c
+++ b/drivers/power/regulator/rk808.c
@@ -20,36 +20,41 @@
 #define ENABLE_DRIVER
 #endif
 
+/* Field Definitions */
+#define RK808_BUCK_VSEL_MASK   0x3f
+#define RK808_BUCK4_VSEL_MASK  0xf
+#define RK808_LDO_VSEL_MASK0x1f
+
 struct rk808_reg_info {
uint min_uv;
uint step_uv;
s8 vsel_reg;
-   u8 vsel_bits;
+   u8 vsel_mask;
 };
 
 static const struct rk808_reg_info rk808_buck[] = {
-   { 712500, 12500, REG_BUCK1_ON_VSEL, 6, },
-   { 712500, 12500, REG_BUCK2_ON_VSEL, 6, },
-   { 712500, 12500, -1, 6, },
-   { 180, 10, REG_BUCK4_ON_VSEL, 4, },
+   { 712500, 12500, REG_BUCK1_ON_VSEL, RK808_BUCK_VSEL_MASK, },
+   { 712500, 12500, REG_BUCK2_ON_VSEL, RK808_BUCK_VSEL_MASK, },
+   { 712500, 12500, -1, RK808_BUCK_VSEL_MASK, },
+   { 180, 10, REG_BUCK4_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk808_reg_info rk808_ldo[] = {
-   { 180, 10, REG_LDO1_ON_VSEL, 5, },
-   { 180, 10, REG_LDO2_ON_VSEL, 5, },
-   { 80, 10, REG_LDO3_ON_VSEL, 4, },
-   { 180, 10, REG_LDO4_ON_VSEL, 5, },
-   { 180, 10, REG_LDO5_ON_VSEL, 5, },
-   { 80, 10, REG_LDO6_ON_VSEL, 5, },
-   { 80, 10, REG_LDO7_ON_VSEL, 5, },
-   { 180, 10, REG_LDO8_ON_VSEL, 5, },
+   { 180, 10, REG_LDO1_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO2_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO3_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
+   { 180, 10, REG_LDO4_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO5_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO6_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO7_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
 };
 
 
 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 {
const struct rk808_reg_info *info = _buck[buck - 1];
-   int mask = (1 << info->vsel_bits) - 1;
+   int mask = info->vsel_mask;
int val;
 
if (info->vsel_reg == -1)
@@ -85,7 +90,7 @@ static int buck_get_value(struct udevice *dev)
 {
int buck = dev->driver_data - 1;
const struct rk808_reg_info *info = _buck[buck];
-   int mask = (1 << info->vsel_bits) - 1;
+   int mask = info->vsel_mask;
int ret, val;
 
if (info->vsel_reg == -1)
@@ -131,7 +136,7 @@ static int ldo_get_value(struct udevice *dev)
 {
int ldo = dev->driver_data - 1;
const struct rk808_reg_info *info = _ldo[ldo];
-   int mask = (1 << info->vsel_bits) - 1;
+   int mask = info->vsel_mask;
int ret, val;
 
if (info->vsel_reg == -1)
@@ -148,7 +153,7 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 {
int ldo = dev->driver_data - 1;
const struct rk808_reg_info *info = _ldo[ldo];
-   int mask = (1 << info->vsel_bits) - 1;
+   int mask = info->vsel_mask;
int val;
 
if (info->vsel_reg == -1)
-- 
2.7.4

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[U-Boot] [PATCH v2 5/5] power: rk808: rename to rk8xx

[Jacob Chen]

Since this driver can be used for rk8xx series pmic,
let's rename rk808 to rk8xx, to make it clear.

Configs parts are done by sed -i "s/RK808/RK8XX/g" `grep RK808 -lr ./`

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

Changes in v2:
- rename rk808 to rk8xx

 arch/arm/mach-rockchip/rk3288/sdram_rk3288.c |  6 +--
 configs/chromebit_mickey_defconfig   |  4 +-
 configs/chromebook_jerry_defconfig   |  4 +-
 configs/chromebook_minnie_defconfig  |  4 +-
 configs/fennec-rk3288_defconfig  |  4 +-
 configs/popmetal-rk3288_defconfig|  4 +-
 configs/sandbox_defconfig|  4 +-
 configs/sandbox_noblk_defconfig  |  4 +-
 configs/sandbox_spl_defconfig|  4 +-
 configs/tinker-rk3288_defconfig  |  4 +-
 drivers/power/pmic/Kconfig   |  6 +--
 drivers/power/pmic/Makefile  |  2 +-
 drivers/power/pmic/{rk808.c => rk8xx.c}  | 46 +-
 drivers/power/regulator/Kconfig  |  8 ++--
 drivers/power/regulator/Makefile |  2 +-
 drivers/power/regulator/{rk808.c => rk8xx.c} | 70 ++--
 include/power/{rk808_pmic.h => rk8xx_pmic.h} | 10 ++--
 17 files changed, 93 insertions(+), 93 deletions(-)
 rename drivers/power/pmic/{rk808.c => rk8xx.c} (65%)
 rename drivers/power/regulator/{rk808.c => rk8xx.c} (82%)
 rename include/power/{rk808_pmic.h => rk8xx_pmic.h} (95%)

diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c 
b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
index 8549b28..2feda61 100644
--- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
@@ -24,7 +24,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -981,11 +981,11 @@ static int veyron_init(struct dram_info *priv)
return ret;
 
/* Slowly raise to max CPU voltage to prevent overshoot */
-   ret = rk808_spl_configure_buck(pmic, 1, 120);
+   ret = rk8xx_spl_configure_buck(pmic, 1, 120);
if (ret)
return ret;
udelay(175);/* Must wait for voltage to stabilize, 2mV/us */
-   ret = rk808_spl_configure_buck(pmic, 1, 140);
+   ret = rk8xx_spl_configure_buck(pmic, 1, 140);
if (ret)
return ret;
udelay(100);/* Must wait for voltage to stabilize, 2mV/us */
diff --git a/configs/chromebit_mickey_defconfig 
b/configs/chromebit_mickey_defconfig
index 7b212ff..5d14c1b 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -54,10 +54,10 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_PMIC_RK808=y
+CONFIG_PMIC_RK8XX=y
 CONFIG_SPL_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK808=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
diff --git a/configs/chromebook_jerry_defconfig 
b/configs/chromebook_jerry_defconfig
index 8bb73a0..72b5ae7 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -55,9 +55,9 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_PMIC_RK808=y
+CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK808=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
diff --git a/configs/chromebook_minnie_defconfig 
b/configs/chromebook_minnie_defconfig
index 497d7f5..5706a1a 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -55,9 +55,9 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_PMIC_RK808=y
+CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK808=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index bfc3917..51152da 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -49,9 +49,9 @@ CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
-CONFIG_PMIC_RK808=y
+CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK808=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
diff --git a/configs/popmetal-rk3288_defconfig 
b/configs/popmetal-rk3288_defconfig
index dfc84b9..f8130b2 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -50,9 +50,9 @@ CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
-CONFIG_PMIC_RK808=y
+CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK808=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CON

[U-Boot] [PATCH v2 0/5] Add Basic support for RK818

[Jacob Chen]

The RK818 chip is a power management IC for multimedia and handheld
devices. It contains the following components:

- Regulators
- RTC
- Clkout
- battery support

This series patch just give it a basic support, to make rk818 board work.


Changes in v2:
- remove input current selection in probe, it should be configured
in board_init_f by manual.
- rename rk808 to rk8xx

Jacob Chen (5):
  power: pmic: append rk818 regs to rk808
  power: pmic: rk808: add RK818 support
  power: regulator: rk808: replace vsel_bits with vsel_mask
  power: regulator: rk808: add rk818 support
  power: rk808: rename to rk8xx

 arch/arm/mach-rockchip/rk3288/sdram_rk3288.c |   6 +-
 configs/chromebit_mickey_defconfig   |   4 +-
 configs/chromebook_jerry_defconfig   |   4 +-
 configs/chromebook_minnie_defconfig  |   4 +-
 configs/fennec-rk3288_defconfig  |   4 +-
 configs/popmetal-rk3288_defconfig|   4 +-
 configs/sandbox_defconfig|   4 +-
 configs/sandbox_noblk_defconfig  |   4 +-
 configs/sandbox_spl_defconfig|   4 +-
 configs/tinker-rk3288_defconfig  |   4 +-
 drivers/power/pmic/Kconfig   |   6 +-
 drivers/power/pmic/Makefile  |   2 +-
 drivers/power/pmic/{rk808.c => rk8xx.c}  |  52 +---
 drivers/power/regulator/Kconfig  |   8 +-
 drivers/power/regulator/Makefile |   2 +-
 drivers/power/regulator/{rk808.c => rk8xx.c} | 142 +---
 include/power/rk808_pmic.h   |  77 ---
 include/power/rk8xx_pmic.h   | 193 +++
 18 files changed, 354 insertions(+), 170 deletions(-)
 rename drivers/power/pmic/{rk808.c => rk8xx.c} (59%)
 rename drivers/power/regulator/{rk808.c => rk8xx.c} (55%)
 delete mode 100644 include/power/rk808_pmic.h
 create mode 100644 include/power/rk8xx_pmic.h

-- 
2.7.4

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[U-Boot] [PATCH v2 1/5] power: pmic: append rk818 regs to rk808

[Jacob Chen]

Both RK808 and RK818 chips are using a similar register map,
so we can reuse them.

I have also add reg prefix to exist registers, to keep them same style.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---

Changes in v2: None

 drivers/power/regulator/rk808.c |  18 ++---
 include/power/rk808_pmic.h  | 164 
 2 files changed, 143 insertions(+), 39 deletions(-)

diff --git a/drivers/power/regulator/rk808.c b/drivers/power/regulator/rk808.c
index adef8f5..f1a00c5 100644
--- a/drivers/power/regulator/rk808.c
+++ b/drivers/power/regulator/rk808.c
@@ -35,14 +35,14 @@ static const struct rk808_reg_info rk808_buck[] = {
 };
 
 static const struct rk808_reg_info rk808_ldo[] = {
-   { 180, 10, LDO1_ON_VSEL, 5, },
-   { 180, 10, LDO2_ON_VSEL, 5, },
-   { 80, 10, LDO3_ON_VSEL, 4, },
-   { 180, 10, LDO4_ON_VSEL, 5, },
-   { 180, 10, LDO5_ON_VSEL, 5, },
-   { 80, 10, LDO6_ON_VSEL, 5, },
-   { 80, 10, LDO7_ON_VSEL, 5, },
-   { 180, 10, LDO8_ON_VSEL, 5, },
+   { 180, 10, REG_LDO1_ON_VSEL, 5, },
+   { 180, 10, REG_LDO2_ON_VSEL, 5, },
+   { 80, 10, REG_LDO3_ON_VSEL, 4, },
+   { 180, 10, REG_LDO4_ON_VSEL, 5, },
+   { 180, 10, REG_LDO5_ON_VSEL, 5, },
+   { 80, 10, REG_LDO6_ON_VSEL, 5, },
+   { 80, 10, REG_LDO7_ON_VSEL, 5, },
+   { 180, 10, REG_LDO8_ON_VSEL, 5, },
 };
 
 
@@ -69,7 +69,7 @@ static int _buck_set_enable(struct udevice *pmic, int buck, 
bool enable)
buck--;
mask = 1 << buck;
if (enable) {
-   ret = pmic_clrsetbits(pmic, DCDC_ILMAX, 0, 3 << (buck * 2));
+   ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX, 0, 3 << (buck * 2));
if (ret)
return ret;
ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT, 1 << buck, 0);
diff --git a/include/power/rk808_pmic.h b/include/power/rk808_pmic.h
index fb0800b..d29c2b3 100644
--- a/include/power/rk808_pmic.h
+++ b/include/power/rk808_pmic.h
@@ -9,12 +9,37 @@
 #define _PMIC_RK808_H_
 
 enum {
-   REG_DCDC_EN = 0x23,
+   REG_SECONDS = 0x00,
+   REG_MINUTES,
+   REG_HOURS,
+   REG_DAYS,
+   REG_MONTHS,
+   REG_YEARS,
+   REG_WEEKS,
+   REG_ALARM_SECONDS,
+   REG_ALARM_MINUTES,
+   REG_ALARM_HOURS,
+   REG_ALARM_DAYS,
+   REG_ALARM_MONTHS,
+   REG_ALARM_YEARS,
+
+   REG_RTC_CTRL= 0x10,
+   REG_RTC_STATUS,
+   REG_RTC_INT,
+   REG_RTC_COMP_LSB,
+   REG_RTC_COMP_MSB,
+
+   ID_MSB  = 0x17,
+   ID_LSB,
+
+   REG_CLK32OUT= 0x20,
+   REG_VB_MON,
+   REG_THERMAL,
+   REG_DCDC_EN,
REG_LDO_EN,
REG_SLEEP_SET_OFF1,
REG_SLEEP_SET_OFF2,
REG_DCDC_UV_STS,
-
REG_DCDC_UV_ACT,
REG_LDO_UV_STS,
REG_LDO_UV_ACT,
@@ -23,7 +48,6 @@ enum {
REG_VOUT_MON_TDB,
REG_BUCK1_CONFIG,
REG_BUCK1_ON_VSEL,
-
REG_BUCK1_SLP_VSEL,
REG_BUCK1_DVS_VSEL,
REG_BUCK2_CONFIG,
@@ -32,37 +56,117 @@ enum {
REG_BUCK2_DVS_VSEL,
REG_BUCK3_CONFIG,
REG_BUCK4_CONFIG,
-
REG_BUCK4_ON_VSEL,
REG_BUCK4_SLP_VSEL,
-   LDO1_ON_VSEL= 0x3b,
-   LDO1_SLP_VSEL,
-   LDO2_ON_VSEL,
-   LDO2_SLP_VSEL,
-   LDO3_ON_VSEL,
-
-   LDO3_SLP_VSEL,
-   LDO4_ON_VSEL,
-   LDO4_SLP_VSEL,
-   LDO5_ON_VSEL,
-   LDO5_SLP_VSEL,
-   LDO6_ON_VSEL,
-   LDO6_SLP_VSEL,
-   LDO7_ON_VSEL,
-
-   LDO7_SLP_VSEL,
-   LDO8_ON_VSEL,
-   LDO8_SLP_VSEL,
-   DEVCTRL,
-   INT_STS1,
-   INT_STS_MSK1,
-   INT_STS2,
-   INT_STS_MSK2,
-   IO_POL,
+   REG_BOOST_CONFIG_REG,
+   REG_LDO1_ON_VSEL,
+   REG_LDO1_SLP_VSEL,
+   REG_LDO2_ON_VSEL,
+   REG_LDO2_SLP_VSEL,
+   REG_LDO3_ON_VSEL,
+   REG_LDO3_SLP_VSEL,
+   REG_LDO4_ON_VSEL,
+   REG_LDO4_SLP_VSEL,
+   REG_LDO5_ON_VSEL,
+   REG_LDO5_SLP_VSEL,
+   REG_LDO6_ON_VSEL,
+   REG_LDO6_SLP_VSEL,
+   REG_LDO7_ON_VSEL,
+   REG_LDO7_SLP_VSEL,
+   REG_LDO8_ON_VSEL,
+   REG_LDO8_SLP_VSEL,
+   REG_DEVCTRL,
+   REG_INT_STS1,
+   REG_INT_STS_MSK1,
+   REG_INT_STS2,
+   REG_INT_STS_MSK2,
+   REG_IO_POL,
+   REG_OTP_VDD_EN,
+   REG_H5V_EN,
+   REG_SLEEP_SET_OFF,
+   REG_BOOST_LDO9_ON_VSEL,
+   REG_BOOST_LDO9_SLP_VSEL,
+   REG_BOOST_CTRL,
 
/* Not sure what this does */
-   DCDC_ILMAX  = 0x90,
-
+   REG_DCDC_ILMAX  = 0x90,
+   REG_CHRG_COMP   = 0x9a,
+   REG_SUP_STS = 0xa0,
+   

[U-Boot] [PATCH v2 2/5] power: pmic: rk808: add RK818 support

[Jacob Chen]

The RK818 chip is a Power Management IC (PMIC) for multimedia and handheld
devices.

For boards use rk818, the input current should be set in the early stage, before
ddr initialization.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

Changes in v2:
- remove input current selection in probe, it should be configured
in board_init_f by manual.

 drivers/power/pmic/rk808.c | 16 
 include/power/rk808_pmic.h | 12 
 2 files changed, 28 insertions(+)

diff --git a/drivers/power/pmic/rk808.c b/drivers/power/pmic/rk808.c
index 3f5f316..582e456 100644
--- a/drivers/power/pmic/rk808.c
+++ b/drivers/power/pmic/rk808.c
@@ -80,6 +80,20 @@ static int rk808_bind(struct udevice *dev)
 }
 #endif
 
+static int rk808_probe(struct udevice *dev)
+{
+   struct rk808_priv *priv = dev_get_priv(dev);
+   uint8_t msb, lsb;
+
+   /* read Chip variant */
+   rk808_read(dev, ID_MSB, , 1);
+   rk808_read(dev, ID_LSB, , 1);
+
+   priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
+
+   return 0;
+}
+
 static struct dm_pmic_ops rk808_ops = {
.reg_count = rk808_reg_count,
.read = rk808_read,
@@ -88,6 +102,7 @@ static struct dm_pmic_ops rk808_ops = {
 
 static const struct udevice_id rk808_ids[] = {
{ .compatible = "rockchip,rk808" },
+   { .compatible = "rockchip,rk818" },
{ }
 };
 
@@ -98,5 +113,6 @@ U_BOOT_DRIVER(pmic_rk808) = {
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
.bind = rk808_bind,
 #endif
+   .probe = rk808_probe,
.ops = _ops,
 };
diff --git a/include/power/rk808_pmic.h b/include/power/rk808_pmic.h
index d29c2b3..c370c32 100644
--- a/include/power/rk808_pmic.h
+++ b/include/power/rk808_pmic.h
@@ -170,12 +170,24 @@ enum {
RK808_NUM_OF_REGS,
 };
 
+enum {
+   RK805_ID = 0x8050,
+   RK808_ID = 0x,
+   RK818_ID = 0x8180,
+};
+
+#define RK8XX_ID_MSK   0xfff0
+
 struct rk808_reg_table {
char *name;
u8 reg_ctl;
u8 reg_vol;
 };
 
+struct rk808_priv {
+   int variant;
+};
+
 int rk808_spl_configure_buck(struct udevice *pmic, int buck, int uvolt);
 
 #endif
-- 
2.7.4

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[U-Boot] [PATCH v2 4/5] power: regulator: rk808: add rk818 support

[Jacob Chen]

Add support for the rk818 regulator. The regulator module consists
of 4 DCDCs, 9 LDOs, 1 switch and 1 BOOST converter which is used to
power OTG and HDMI5V.



Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---

Changes in v2: None

 drivers/power/regulator/rk808.c | 55 ++---
 1 file changed, 51 insertions(+), 4 deletions(-)

diff --git a/drivers/power/regulator/rk808.c b/drivers/power/regulator/rk808.c
index 441806c..71ab76e 100644
--- a/drivers/power/regulator/rk808.c
+++ b/drivers/power/regulator/rk808.c
@@ -25,6 +25,12 @@
 #define RK808_BUCK4_VSEL_MASK  0xf
 #define RK808_LDO_VSEL_MASK0x1f
 
+#define RK818_BUCK_VSEL_MASK   0x3f
+#define RK818_BUCK4_VSEL_MASK  0x1f
+#define RK818_LDO_VSEL_MASK0x1f
+#define RK818_LDO3_ON_VSEL_MASK0xf
+#define RK818_BOOST_ON_VSEL_MASK   0xe0
+
 struct rk808_reg_info {
uint min_uv;
uint step_uv;
@@ -50,10 +56,51 @@ static const struct rk808_reg_info rk808_ldo[] = {
{ 180, 10, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
 };
 
+static const struct rk808_reg_info rk818_buck[] = {
+   { 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+   { 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+   { 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
+   { 180, 10, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
+};
+
+static const struct rk808_reg_info rk818_ldo[] = {
+   { 180, 10, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO3_ON_VSEL, RK818_LDO3_ON_VSEL_MASK, },
+   { 180, 10, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO7_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO8_ON_VSEL, RK818_LDO_VSEL_MASK, },
+};
+
+static const struct rk808_reg_info *get_buck_reg(struct udevice *pmic,
+int num)
+{
+   struct rk808_priv *rk808 = dev_get_priv(pmic);
+   switch (rk808->variant) {
+   case RK818_ID:
+   return _buck[num];
+   default:
+   return _buck[num];
+   }
+}
+
+static const struct rk808_reg_info *get_ldo_reg(struct udevice *pmic,
+int num)
+{
+   struct rk808_priv *rk808 = dev_get_priv(pmic);
+   switch (rk808->variant) {
+   case RK818_ID:
+   return _ldo[num - 1];
+   default:
+   return _ldo[num - 1];
+   }
+}
 
 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 {
-   const struct rk808_reg_info *info = _buck[buck - 1];
+   const struct rk808_reg_info *info = get_buck_reg(pmic, buck - 1);
int mask = info->vsel_mask;
int val;
 
@@ -89,7 +136,7 @@ static int _buck_set_enable(struct udevice *pmic, int buck, 
bool enable)
 static int buck_get_value(struct udevice *dev)
 {
int buck = dev->driver_data - 1;
-   const struct rk808_reg_info *info = _buck[buck];
+   const struct rk808_reg_info *info = get_buck_reg(dev->parent, buck);
int mask = info->vsel_mask;
int ret, val;
 
@@ -135,7 +182,7 @@ static bool buck_get_enable(struct udevice *dev)
 static int ldo_get_value(struct udevice *dev)
 {
int ldo = dev->driver_data - 1;
-   const struct rk808_reg_info *info = _ldo[ldo];
+   const struct rk808_reg_info *info = get_ldo_reg(dev->parent, ldo);
int mask = info->vsel_mask;
int ret, val;
 
@@ -152,7 +199,7 @@ static int ldo_get_value(struct udevice *dev)
 static int ldo_set_value(struct udevice *dev, int uvolt)
 {
int ldo = dev->driver_data - 1;
-   const struct rk808_reg_info *info = _ldo[ldo];
+   const struct rk808_reg_info *info = get_ldo_reg(dev->parent, ldo);
int mask = info->vsel_mask;
int val;
 
-- 
2.7.4

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Re: [U-Boot] [PATCH v1 3/3] rockchip: dts: evb_rk3288: Add mipi display support

[Jacob Chen]

Hi eric,


2017-04-28 15:46 GMT+08:00 Eric Gao :
> Add mipi dsi configuration for evb-rk3288 device tree.
>
> Signed-off-by: Eric Gao 
>
> ---
>
> Changes in v1:
> -Add dts configuration.
>
>  arch/arm/dts/rk3288-evb.dtsi | 88 
> 
>  arch/arm/dts/rk3288.dtsi | 41 +
>  2 files changed, 129 insertions(+)
>
> diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
> index 4960f33..b37b570 100644
> --- a/arch/arm/dts/rk3288-evb.dtsi
> +++ b/arch/arm/dts/rk3288-evb.dtsi
> @@ -85,6 +85,16 @@
> regulator-always-on;
> vin-supply = <_5v>;
> };
> +
> +   backlight: backlight {
> +   compatible = "pwm-backlight";
> +   status = "disabled";
> +   };
> +
> +   panel: panel {
> +   compatible = "simple-panel";
> +   status = "disabled";
> +   };

I think it should be renamed to mipi_panel.

>  };
>
>   {
> @@ -318,6 +328,10 @@
> };
>  };
>
> + {
> +   status = "okay";
> +};
> +
>   {
> vref-supply = <_18>;
> status = "okay";
> @@ -396,6 +410,80 @@
> status = "okay";
>  };
>
> + {
> +   power-supply = <_sys>;
> +   enable-gpios = < 2 GPIO_ACTIVE_HIGH>;
> +   brightness-levels = <
> + 0   1   2   3   4   5   6   7
> + 8   9  10  11  12  13  14  15
> +16  17  18  19  20  21  22  23
> +24  25  26  27  28  29  30  31
> +32  33  34  35  36  37  38  39
> +40  41  42  43  44  45  46  47
> +48  49  50  51  52  53  54  55
> +56  57  58  59  60  61  62  63
> +64  65  66  67  68  69  70  71
> +72  73  74  75  76  77  78  79
> +80  81  82  83  84  85  86  87
> +88  89  90  91  92  93  94  95
> +96  97  98  99 100 101 102 103
> +   104 105 106 107 108 109 110 111
> +   112 113 114 115 116 117 118 119
> +   120 121 122 123 124 125 126 127
> +   128 129 130 131 132 133 134 135
> +   136 137 138 139 140 141 142 143
> +   144 145 146 147 148 149 150 151
> +   152 153 154 155 156 157 158 159
> +   160 161 162 163 164 165 166 167
> +   168 169 170 171 172 173 174 175
> +   176 177 178 179 180 181 182 183
> +   184 185 186 187 188 189 190 191
> +   192 193 194 195 196 197 198 199
> +   200 201 202 203 204 205 206 207
> +   208 209 210 211 212 213 214 215
> +   216 217 218 219 220 221 222 223
> +   224 225 226 227 228 229 230 231
> +   232 233 234 235 236 237 238 239
> +   240 241 242 243 244 245 246 247
> +   248 249 250 251 252 253 254 255>;
> +   default-brightness-level = <50>;
> +   pwms = < 0 25000 0>;
> +   pinctrl-names = "default";
> +   pinctrl-0 = <_pin>;
> +   pwm-delay-us = <1>;
> +   status = "okay";
> +   };
> +

It should be added directly to the front node, like
https://github.com/rockchip-linux/kernel/blob/release-develop/arch/arm/boot/dts/rk3288-evb.dtsi#L50

> + {
> +   power-supply = <_io>;
> +   backlight = <>;
> +   enable-gpios = < 3 GPIO_ACTIVE_HIGH>;
> +   status = "okay";
> +};
> +
> +_dsi0 {
> +   status = "okay";
> +   rockchip,panel = <>;
> +   display-timings {
> +   timing0 {
> +   bits-per-pixel = <24>;
> +   clock-frequency = <16000>;
> +   hfront-porch = <120>;
> +   hsync-len = <20>;
> +   hback-porch = <21>;
> +   hactive = <1200>;
> +   vfront-porch = <21>;
> +   vsync-len = <3>;
> +   vback-porch = <18>;
> +   vactive = <1920>;
> +   hsync-active = <0>;
> +   vsync-active = <0>;
> +   de-active = <1>;
> +   pixelclk-active = <0>;
> +   };
> +   };
> +};
> +

Please don't enable it by default, it will cause errors in edp board.
Just leave it disabled.


>   {
> status = "okay";
>  };
> diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
> index bcf051a..64aa07d 100644
> --- a/arch/arm/dts/rk3288.dtsi
> +++ b/arch/arm/dts/rk3288.dtsi
> @@ -664,6 +664,7 @@
> };
>
> vopb: vop@ff93 {
> +   u-boot,dm-pre-reloc;
> compatible = "rockchip,rk3288-vop";
>  

Re: [U-Boot] [PATCH 0/4] Add Basic support for RK808

[Jacob Chen]

ok - -wrong title.. It's  Add Basic support for RK818

2017-04-21 11:34 GMT+08:00 Jacob Chen <jacob-c...@iotwrt.com>:
>
> The RK818 chip is a power management IC for multimedia and handheld
> devices. It contains the following components:
>
> - Regulators
> - RTC
> - Clkout
> - battery support
>
> This series patch just give it a basic support, to make rk818 board work.
>
>
> Jacob Chen (4):
>   power: pmic: append rk818 regs to rk808
>   power: pmic: rk808: add RK818 support
>   power: regulator: rk808: replace vsel_bits with vsel_mask
>   power: regulator: rk808: add rk818 support
>
>  drivers/power/pmic/rk808.c  |  29 +++
>  drivers/power/regulator/rk808.c |  96 +-
>  include/power/rk808_pmic.h  | 176 
> +---
>  3 files changed, 249 insertions(+), 52 deletions(-)
>
> --
> 2.7.4
>
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[U-Boot] [PATCH 4/4] power: regulator: rk808: add rk818 support

[Jacob Chen]

Add support for the rk818 regulator. The regulator module consists
of 4 DCDCs, 9 LDOs, 1 switch and 1 BOOST converter which is used to
power OTG and HDMI5V.

TODO: I don't know how to deal with BOOST and LDO9,
so just ignore them now.


Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

 drivers/power/regulator/rk808.c | 55 ++---
 1 file changed, 51 insertions(+), 4 deletions(-)

diff --git a/drivers/power/regulator/rk808.c b/drivers/power/regulator/rk808.c
index 441806c..71ab76e 100644
--- a/drivers/power/regulator/rk808.c
+++ b/drivers/power/regulator/rk808.c
@@ -25,6 +25,12 @@
 #define RK808_BUCK4_VSEL_MASK  0xf
 #define RK808_LDO_VSEL_MASK0x1f
 
+#define RK818_BUCK_VSEL_MASK   0x3f
+#define RK818_BUCK4_VSEL_MASK  0x1f
+#define RK818_LDO_VSEL_MASK0x1f
+#define RK818_LDO3_ON_VSEL_MASK0xf
+#define RK818_BOOST_ON_VSEL_MASK   0xe0
+
 struct rk808_reg_info {
uint min_uv;
uint step_uv;
@@ -50,10 +56,51 @@ static const struct rk808_reg_info rk808_ldo[] = {
{ 180, 10, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
 };
 
+static const struct rk808_reg_info rk818_buck[] = {
+   { 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+   { 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+   { 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
+   { 180, 10, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
+};
+
+static const struct rk808_reg_info rk818_ldo[] = {
+   { 180, 10, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO3_ON_VSEL, RK818_LDO3_ON_VSEL_MASK, },
+   { 180, 10, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO7_ON_VSEL, RK818_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO8_ON_VSEL, RK818_LDO_VSEL_MASK, },
+};
+
+static const struct rk808_reg_info *get_buck_reg(struct udevice *pmic,
+int num)
+{
+   struct rk808_priv *rk808 = dev_get_priv(pmic);
+   switch (rk808->variant) {
+   case RK818_ID:
+   return _buck[num];
+   default:
+   return _buck[num];
+   }
+}
+
+static const struct rk808_reg_info *get_ldo_reg(struct udevice *pmic,
+int num)
+{
+   struct rk808_priv *rk808 = dev_get_priv(pmic);
+   switch (rk808->variant) {
+   case RK818_ID:
+   return _ldo[num - 1];
+   default:
+   return _ldo[num - 1];
+   }
+}
 
 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 {
-   const struct rk808_reg_info *info = _buck[buck - 1];
+   const struct rk808_reg_info *info = get_buck_reg(pmic, buck - 1);
int mask = info->vsel_mask;
int val;
 
@@ -89,7 +136,7 @@ static int _buck_set_enable(struct udevice *pmic, int buck, 
bool enable)
 static int buck_get_value(struct udevice *dev)
 {
int buck = dev->driver_data - 1;
-   const struct rk808_reg_info *info = _buck[buck];
+   const struct rk808_reg_info *info = get_buck_reg(dev->parent, buck);
int mask = info->vsel_mask;
int ret, val;
 
@@ -135,7 +182,7 @@ static bool buck_get_enable(struct udevice *dev)
 static int ldo_get_value(struct udevice *dev)
 {
int ldo = dev->driver_data - 1;
-   const struct rk808_reg_info *info = _ldo[ldo];
+   const struct rk808_reg_info *info = get_ldo_reg(dev->parent, ldo);
int mask = info->vsel_mask;
int ret, val;
 
@@ -152,7 +199,7 @@ static int ldo_get_value(struct udevice *dev)
 static int ldo_set_value(struct udevice *dev, int uvolt)
 {
int ldo = dev->driver_data - 1;
-   const struct rk808_reg_info *info = _ldo[ldo];
+   const struct rk808_reg_info *info = get_ldo_reg(dev->parent, ldo);
int mask = info->vsel_mask;
int val;
 
-- 
2.7.4

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[U-Boot] [PATCH 2/4] power: pmic: rk808: add RK818 support

[Jacob Chen]

The RK818 chip is a Power Management IC (PMIC) for multimedia and handheld
devices.

For boards use rk818, the input current should be set in the early stage, before
ddr initialization.

To use rk818,below configs should be enabled:
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
and rk818 device should probe in spl board_init_f.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

 drivers/power/pmic/rk808.c | 29 +
 include/power/rk808_pmic.h | 12 
 2 files changed, 41 insertions(+)

diff --git a/drivers/power/pmic/rk808.c b/drivers/power/pmic/rk808.c
index 3f5f316..2d764d9 100644
--- a/drivers/power/pmic/rk808.c
+++ b/drivers/power/pmic/rk808.c
@@ -80,6 +80,33 @@ static int rk808_bind(struct udevice *dev)
 }
 #endif
 
+static int rk808_probe(struct udevice *dev)
+{
+   struct rk808_priv *priv = dev_get_priv(dev);
+   uint8_t msb, lsb;
+
+   /* read Chip variant */
+   rk808_read(dev, ID_MSB, , 1);
+   rk808_read(dev, ID_LSB, , 1);
+
+   priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
+
+#ifdef CONFIG_SPL_BUILD
+   if (priv->variant == RK818_ID) {
+   uint8_t txdata;
+   /*
+* Increase USB input current selection to 2A and close charger
+* when usb lower then 3.4V.
+*/
+   txdata = 0x77;
+   rk808_write(dev, REG_USB_CTRL, , 1);
+   udelay(3);
+   }
+#endif
+
+   return 0;
+}
+
 static struct dm_pmic_ops rk808_ops = {
.reg_count = rk808_reg_count,
.read = rk808_read,
@@ -88,6 +115,7 @@ static struct dm_pmic_ops rk808_ops = {
 
 static const struct udevice_id rk808_ids[] = {
{ .compatible = "rockchip,rk808" },
+   { .compatible = "rockchip,rk818" },
{ }
 };
 
@@ -98,5 +126,6 @@ U_BOOT_DRIVER(pmic_rk808) = {
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
.bind = rk808_bind,
 #endif
+   .probe = rk808_probe,
.ops = _ops,
 };
diff --git a/include/power/rk808_pmic.h b/include/power/rk808_pmic.h
index d29c2b3..c370c32 100644
--- a/include/power/rk808_pmic.h
+++ b/include/power/rk808_pmic.h
@@ -170,12 +170,24 @@ enum {
RK808_NUM_OF_REGS,
 };
 
+enum {
+   RK805_ID = 0x8050,
+   RK808_ID = 0x,
+   RK818_ID = 0x8180,
+};
+
+#define RK8XX_ID_MSK   0xfff0
+
 struct rk808_reg_table {
char *name;
u8 reg_ctl;
u8 reg_vol;
 };
 
+struct rk808_priv {
+   int variant;
+};
+
 int rk808_spl_configure_buck(struct udevice *pmic, int buck, int uvolt);
 
 #endif
-- 
2.7.4

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[U-Boot] [PATCH 1/4] power: pmic: append rk818 regs to rk808

[Jacob Chen]

Both RK808 and RK818 chips are using a similar register map,
so we can reuse them.

I have also add reg prefix to exist registers, to keep them same style.


Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

 drivers/power/regulator/rk808.c |  18 ++---
 include/power/rk808_pmic.h  | 164 
 2 files changed, 143 insertions(+), 39 deletions(-)

diff --git a/drivers/power/regulator/rk808.c b/drivers/power/regulator/rk808.c
index adef8f5..f1a00c5 100644
--- a/drivers/power/regulator/rk808.c
+++ b/drivers/power/regulator/rk808.c
@@ -35,14 +35,14 @@ static const struct rk808_reg_info rk808_buck[] = {
 };
 
 static const struct rk808_reg_info rk808_ldo[] = {
-   { 180, 10, LDO1_ON_VSEL, 5, },
-   { 180, 10, LDO2_ON_VSEL, 5, },
-   { 80, 10, LDO3_ON_VSEL, 4, },
-   { 180, 10, LDO4_ON_VSEL, 5, },
-   { 180, 10, LDO5_ON_VSEL, 5, },
-   { 80, 10, LDO6_ON_VSEL, 5, },
-   { 80, 10, LDO7_ON_VSEL, 5, },
-   { 180, 10, LDO8_ON_VSEL, 5, },
+   { 180, 10, REG_LDO1_ON_VSEL, 5, },
+   { 180, 10, REG_LDO2_ON_VSEL, 5, },
+   { 80, 10, REG_LDO3_ON_VSEL, 4, },
+   { 180, 10, REG_LDO4_ON_VSEL, 5, },
+   { 180, 10, REG_LDO5_ON_VSEL, 5, },
+   { 80, 10, REG_LDO6_ON_VSEL, 5, },
+   { 80, 10, REG_LDO7_ON_VSEL, 5, },
+   { 180, 10, REG_LDO8_ON_VSEL, 5, },
 };
 
 
@@ -69,7 +69,7 @@ static int _buck_set_enable(struct udevice *pmic, int buck, 
bool enable)
buck--;
mask = 1 << buck;
if (enable) {
-   ret = pmic_clrsetbits(pmic, DCDC_ILMAX, 0, 3 << (buck * 2));
+   ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX, 0, 3 << (buck * 2));
if (ret)
return ret;
ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT, 1 << buck, 0);
diff --git a/include/power/rk808_pmic.h b/include/power/rk808_pmic.h
index fb0800b..d29c2b3 100644
--- a/include/power/rk808_pmic.h
+++ b/include/power/rk808_pmic.h
@@ -9,12 +9,37 @@
 #define _PMIC_RK808_H_
 
 enum {
-   REG_DCDC_EN = 0x23,
+   REG_SECONDS = 0x00,
+   REG_MINUTES,
+   REG_HOURS,
+   REG_DAYS,
+   REG_MONTHS,
+   REG_YEARS,
+   REG_WEEKS,
+   REG_ALARM_SECONDS,
+   REG_ALARM_MINUTES,
+   REG_ALARM_HOURS,
+   REG_ALARM_DAYS,
+   REG_ALARM_MONTHS,
+   REG_ALARM_YEARS,
+
+   REG_RTC_CTRL= 0x10,
+   REG_RTC_STATUS,
+   REG_RTC_INT,
+   REG_RTC_COMP_LSB,
+   REG_RTC_COMP_MSB,
+
+   ID_MSB  = 0x17,
+   ID_LSB,
+
+   REG_CLK32OUT= 0x20,
+   REG_VB_MON,
+   REG_THERMAL,
+   REG_DCDC_EN,
REG_LDO_EN,
REG_SLEEP_SET_OFF1,
REG_SLEEP_SET_OFF2,
REG_DCDC_UV_STS,
-
REG_DCDC_UV_ACT,
REG_LDO_UV_STS,
REG_LDO_UV_ACT,
@@ -23,7 +48,6 @@ enum {
REG_VOUT_MON_TDB,
REG_BUCK1_CONFIG,
REG_BUCK1_ON_VSEL,
-
REG_BUCK1_SLP_VSEL,
REG_BUCK1_DVS_VSEL,
REG_BUCK2_CONFIG,
@@ -32,37 +56,117 @@ enum {
REG_BUCK2_DVS_VSEL,
REG_BUCK3_CONFIG,
REG_BUCK4_CONFIG,
-
REG_BUCK4_ON_VSEL,
REG_BUCK4_SLP_VSEL,
-   LDO1_ON_VSEL= 0x3b,
-   LDO1_SLP_VSEL,
-   LDO2_ON_VSEL,
-   LDO2_SLP_VSEL,
-   LDO3_ON_VSEL,
-
-   LDO3_SLP_VSEL,
-   LDO4_ON_VSEL,
-   LDO4_SLP_VSEL,
-   LDO5_ON_VSEL,
-   LDO5_SLP_VSEL,
-   LDO6_ON_VSEL,
-   LDO6_SLP_VSEL,
-   LDO7_ON_VSEL,
-
-   LDO7_SLP_VSEL,
-   LDO8_ON_VSEL,
-   LDO8_SLP_VSEL,
-   DEVCTRL,
-   INT_STS1,
-   INT_STS_MSK1,
-   INT_STS2,
-   INT_STS_MSK2,
-   IO_POL,
+   REG_BOOST_CONFIG_REG,
+   REG_LDO1_ON_VSEL,
+   REG_LDO1_SLP_VSEL,
+   REG_LDO2_ON_VSEL,
+   REG_LDO2_SLP_VSEL,
+   REG_LDO3_ON_VSEL,
+   REG_LDO3_SLP_VSEL,
+   REG_LDO4_ON_VSEL,
+   REG_LDO4_SLP_VSEL,
+   REG_LDO5_ON_VSEL,
+   REG_LDO5_SLP_VSEL,
+   REG_LDO6_ON_VSEL,
+   REG_LDO6_SLP_VSEL,
+   REG_LDO7_ON_VSEL,
+   REG_LDO7_SLP_VSEL,
+   REG_LDO8_ON_VSEL,
+   REG_LDO8_SLP_VSEL,
+   REG_DEVCTRL,
+   REG_INT_STS1,
+   REG_INT_STS_MSK1,
+   REG_INT_STS2,
+   REG_INT_STS_MSK2,
+   REG_IO_POL,
+   REG_OTP_VDD_EN,
+   REG_H5V_EN,
+   REG_SLEEP_SET_OFF,
+   REG_BOOST_LDO9_ON_VSEL,
+   REG_BOOST_LDO9_SLP_VSEL,
+   REG_BOOST_CTRL,
 
/* Not sure what this does */
-   DCDC_ILMAX  = 0x90,
-
+   REG_DCDC_ILMAX  = 0x90,
+   REG_CHRG_COMP   = 0x9a,
+   REG_SUP_STS = 0xa0,
+   REG_USB_CTRL,
+   REG1_CHRG_CTRL,
+   REG2_CHRG_CTRL,
+   REG3_C

[U-Boot] [PATCH 3/4] power: regulator: rk808: replace vsel_bits with vsel_mask

[Jacob Chen]

Using mask is more flexible than bits.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

 drivers/power/regulator/rk808.c | 39 ++-
 1 file changed, 22 insertions(+), 17 deletions(-)

diff --git a/drivers/power/regulator/rk808.c b/drivers/power/regulator/rk808.c
index f1a00c5..441806c 100644
--- a/drivers/power/regulator/rk808.c
+++ b/drivers/power/regulator/rk808.c
@@ -20,36 +20,41 @@
 #define ENABLE_DRIVER
 #endif
 
+/* Field Definitions */
+#define RK808_BUCK_VSEL_MASK   0x3f
+#define RK808_BUCK4_VSEL_MASK  0xf
+#define RK808_LDO_VSEL_MASK0x1f
+
 struct rk808_reg_info {
uint min_uv;
uint step_uv;
s8 vsel_reg;
-   u8 vsel_bits;
+   u8 vsel_mask;
 };
 
 static const struct rk808_reg_info rk808_buck[] = {
-   { 712500, 12500, REG_BUCK1_ON_VSEL, 6, },
-   { 712500, 12500, REG_BUCK2_ON_VSEL, 6, },
-   { 712500, 12500, -1, 6, },
-   { 180, 10, REG_BUCK4_ON_VSEL, 4, },
+   { 712500, 12500, REG_BUCK1_ON_VSEL, RK808_BUCK_VSEL_MASK, },
+   { 712500, 12500, REG_BUCK2_ON_VSEL, RK808_BUCK_VSEL_MASK, },
+   { 712500, 12500, -1, RK808_BUCK_VSEL_MASK, },
+   { 180, 10, REG_BUCK4_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk808_reg_info rk808_ldo[] = {
-   { 180, 10, REG_LDO1_ON_VSEL, 5, },
-   { 180, 10, REG_LDO2_ON_VSEL, 5, },
-   { 80, 10, REG_LDO3_ON_VSEL, 4, },
-   { 180, 10, REG_LDO4_ON_VSEL, 5, },
-   { 180, 10, REG_LDO5_ON_VSEL, 5, },
-   { 80, 10, REG_LDO6_ON_VSEL, 5, },
-   { 80, 10, REG_LDO7_ON_VSEL, 5, },
-   { 180, 10, REG_LDO8_ON_VSEL, 5, },
+   { 180, 10, REG_LDO1_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO2_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO3_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
+   { 180, 10, REG_LDO4_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO5_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO6_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 80, 10, REG_LDO7_ON_VSEL, RK808_LDO_VSEL_MASK, },
+   { 180, 10, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
 };
 
 
 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 {
const struct rk808_reg_info *info = _buck[buck - 1];
-   int mask = (1 << info->vsel_bits) - 1;
+   int mask = info->vsel_mask;
int val;
 
if (info->vsel_reg == -1)
@@ -85,7 +90,7 @@ static int buck_get_value(struct udevice *dev)
 {
int buck = dev->driver_data - 1;
const struct rk808_reg_info *info = _buck[buck];
-   int mask = (1 << info->vsel_bits) - 1;
+   int mask = info->vsel_mask;
int ret, val;
 
if (info->vsel_reg == -1)
@@ -131,7 +136,7 @@ static int ldo_get_value(struct udevice *dev)
 {
int ldo = dev->driver_data - 1;
const struct rk808_reg_info *info = _ldo[ldo];
-   int mask = (1 << info->vsel_bits) - 1;
+   int mask = info->vsel_mask;
int ret, val;
 
if (info->vsel_reg == -1)
@@ -148,7 +153,7 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 {
int ldo = dev->driver_data - 1;
const struct rk808_reg_info *info = _ldo[ldo];
-   int mask = (1 << info->vsel_bits) - 1;
+   int mask = info->vsel_mask;
int val;
 
if (info->vsel_reg == -1)
-- 
2.7.4

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[U-Boot] [PATCH 0/4] Add Basic support for RK808

[Jacob Chen]

The RK818 chip is a power management IC for multimedia and handheld
devices. It contains the following components:

- Regulators
- RTC
- Clkout
- battery support

This series patch just give it a basic support, to make rk818 board work.


Jacob Chen (4):
  power: pmic: append rk818 regs to rk808
  power: pmic: rk808: add RK818 support
  power: regulator: rk808: replace vsel_bits with vsel_mask
  power: regulator: rk808: add rk818 support

 drivers/power/pmic/rk808.c  |  29 +++
 drivers/power/regulator/rk808.c |  96 +-
 include/power/rk808_pmic.h  | 176 +---
 3 files changed, 249 insertions(+), 52 deletions(-)

-- 
2.7.4

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Re: [U-Boot] [PATCH 5/7] Add mipi display support for rk3399 && rk3288

[Jacob Chen]

Hi eric,

2017-04-01 22:42 GMT+08:00  :
> From: "eric.gao" 
>
> Signed-off-by: eric.gao 
> ---
>
>  arch/arm/dts/rk3399-evb.dts  |  33 ++
>  arch/arm/dts/rk3399.dtsi |  72 +
>  arch/arm/include/asm/arch-rockchip/cru_rk3399.h  |   2 +-
>  arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 203 +
>  arch/arm/include/asm/arch-rockchip/vop_rk3288.h  |   1 +
>  configs/evb-rk3399_defconfig |   4 +
>  drivers/video/Kconfig|   2 +
>  drivers/video/rockchip/Kconfig   |  44 +++
>  drivers/video/rockchip/Makefile  |   7 +-
>  drivers/video/rockchip/panel.c   |  81 +
>  drivers/video/rockchip/rk_mipi.c | 371 
> +++
>  drivers/video/rockchip/rk_vop.c  |  12 +-
>  12 files changed, 827 insertions(+), 5 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
>  create mode 100644 drivers/video/rockchip/Kconfig
>  create mode 100644 drivers/video/rockchip/panel.c
>  create mode 100644 drivers/video/rockchip/rk_mipi.c
>
> diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
> index 7a889c7..abb00e8 100644
> --- a/arch/arm/dts/rk3399-evb.dts
> +++ b/arch/arm/dts/rk3399-evb.dts
> @@ -52,6 +52,10 @@
> gpio = < 25 GPIO_ACTIVE_HIGH>;
> };
>
> +   panel:panel {
> +   compatible = "BOE,TV080WUM";
> +   status = "disabled";
> +   };
> vccsys: vccsys {
> compatible = "regulator-fixed";
> regulator-name = "vccsys";
> @@ -218,6 +222,35 @@
> };
>  };
>
> + {
> +   backlight_en = < 13 GPIO_ACTIVE_HIGH>;
> +   backlight_pwm = < 18 GPIO_ACTIVE_HIGH>;
> +   power-supply = <_lcd>;
> +   status = "okay";
> +};
> +
> +_dsi {
> +   status = "okay";
> +   display-timings {
> +   timing0 {
> +   bits-per-pixel = <24>;
> +   clock-frequency = <16000>;
> +   hfront-porch = <120>;
> +   hsync-len = <20>;
> +   hback-porch = <21>;
> +   hactive = <1200>;
> +   vfront-porch = <21>;
> +   vsync-len = <3>;
> +   vback-porch = <18>;
> +   vactive = <1920>;
> +   hsync-active = <0>;
> +   vsync-active = <0>;
> +   de-active = <1>;
> +   pixelclk-active = <0>;
> +   };
> +   };
> +};
> +

Evb board can use different screens, so we'd better not hard-code the choice.
And, Please split dts changes to a separate patch.


>   {
> pmic {
> pmic_int_l: pmic-int-l {
> diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
> index 93e3bf4..c82e674 100644
> --- a/arch/arm/dts/rk3399.dtsi
> +++ b/arch/arm/dts/rk3399.dtsi
> @@ -667,6 +667,78 @@
> status = "disabled";
> };
>
> +   vopl: vop@ff8f {
> +   u-boot,dm-pre-reloc;
> +   compatible = "rockchip,rk3399-vop-lit";
> +   reg = <0x0 0xff8f 0x0 0x3efc>;
> +   interrupts = ;
> +   clocks = < ACLK_VOP1>, < DCLK_VOP1>, < HCLK_VOP1>;
> +   clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
> +   resets = < SRST_A_VOP1>, < SRST_H_VOP1>, < 
> SRST_D_VOP1>;
> +   reset-names = "axi", "ahb", "dclk";
> +   status = "okay";
> +   vopl_out: port {
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   vopl_out_mipi: endpoint@0 {
> +   reg = <3>;
> +   remote-endpoint = <_in_vopl>;
> +   };
> +   };
> +   };
> +
> +   vopb: vop@ff90 {
> +   u-boot,dm-pre-reloc;
> +   compatible = "rockchip,rk3399-vop-big";
> +   reg = <0x0 0xff90 0x0 0x3efc>;
> +   interrupts = ;
> +   clocks = < ACLK_VOP0>, < DCLK_VOP0>, < HCLK_VOP0>;
> +   #clock-cells = <0>;
> +   clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
> +   resets = < SRST_A_VOP0>, < SRST_H_VOP0>, < 
> SRST_D_VOP0>;
> +   reset-names = "axi", "ahb", "dclk";
> +   /*power-domains = < RK3399_PD_VOPB>;*/
> +   status = "okay";
> +   vopb_out: port {
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   vopb_out_mipi: endpoint@0 {
> +   reg = <3>;
> +   remote-endpoint = <_in_vopb>;
> +   };
> +   };
> +   };
> +
> +   mipi_dsi: mipi@ff96 {
> +   compatible = 

[U-Boot] [PATCH v2] net: designware: Add phy supply support

[Jacob Chen]

Some board need a regulator for gmac phy, so add this code to handle it.
Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 drivers/net/designware.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index f9fb8e0..0fcd125 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "designware.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -661,6 +662,22 @@ int designware_eth_probe(struct udevice *dev)
ulong ioaddr;
int ret;
 
+#if defined(CONFIG_DM_REGULATOR)
+   struct udevice *phy_supply;
+
+   ret = device_get_supply_regulator(dev, "phy-supply",
+ _supply);
+   if (ret) {
+   debug("%s: No phy supply\n", dev->name);
+   } else {
+   ret = regulator_set_enable(phy_supply, true);
+   if (ret) {
+   puts("Error enabling phy supply\n");
+   return ret;
+   }
+   }
+#endif
+
 #ifdef CONFIG_DM_PCI
/*
 * If we are on PCI bus, either directly attached to a PCI root port,
-- 
1.9.1

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Re: [U-Boot] [PATCH 2/2] net: gmac_rockchip: Add phy supply support

[Jacob Chen]

2017-03-22 2:56 GMT+08:00 Joe Hershberger <joe.hershber...@gmail.com>:
> On Wed, Mar 15, 2017 at 4:28 AM, Jacob Chen <jacob2.c...@rock-chips.com> 
> wrote:
>> Some board need a regulator for gmac phy, so add this code to handle it.
>>
>> Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
>> ---
>>
>>  drivers/net/gmac_rockchip.c | 17 +
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
>> index e9b202a..639 100644
>> --- a/drivers/net/gmac_rockchip.c
>> +++ b/drivers/net/gmac_rockchip.c
>> @@ -17,6 +17,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  #include "designware.h"
>>
>>  DECLARE_GLOBAL_DATA_PTR;
>> @@ -79,6 +80,22 @@ static int gmac_rockchip_probe(struct udevice *dev)
>> struct clk clk;
>> int ret;
>>
>> +#if defined(CONFIG_DM_REGULATOR)
>> +   struct udevice *phy_supply;
>> +
>> +   ret = device_get_supply_regulator(dev, "phy-supply",
>> + _supply);
>> +   if (ret) {
>> +   debug("%s: No phy supply\n", dev->name);
>> +   } else {
>> +   ret = regulator_set_enable(phy_supply, true);
>> +   if (ret) {
>> +   puts("Error enabling phy supply\n");
>> +   return ret;
>> +   }
>> +   }
>> +#endif
>> +
>
> This seems pretty generic. Is there maybe a more common place this
> could live? Or is the phy-supply binding in DT only defined for
> rockchip?
>

I have look kernel driver and phy-supply is set in "
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c".
So i think it might not be generic.


>> ret = clk_get_by_index(dev, 0, );
>> if (ret)
>> return ret;
>> --
>> 1.9.1
>>
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[U-Boot] [PATCH 2/2] net: gmac_rockchip: Add phy supply support

[Jacob Chen]

Some board need a regulator for gmac phy, so add this code to handle it.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 drivers/net/gmac_rockchip.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index e9b202a..639 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "designware.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -79,6 +80,22 @@ static int gmac_rockchip_probe(struct udevice *dev)
struct clk clk;
int ret;
 
+#if defined(CONFIG_DM_REGULATOR)
+   struct udevice *phy_supply;
+
+   ret = device_get_supply_regulator(dev, "phy-supply",
+ _supply);
+   if (ret) {
+   debug("%s: No phy supply\n", dev->name);
+   } else {
+   ret = regulator_set_enable(phy_supply, true);
+   if (ret) {
+   puts("Error enabling phy supply\n");
+   return ret;
+   }
+   }
+#endif
+
ret = clk_get_by_index(dev, 0, );
if (ret)
return ret;
-- 
1.9.1

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[U-Boot] [PATCH 1/2] rockchip: configs: correct mmc env dev for rk3288 based boards

[Jacob Chen]

we are using mmc alias , so mmc index have been changed.
now mmc dev 0 is emmc and mmc dev 1 is sdmmc.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 include/configs/evb_rk3288.h  | 2 +-
 include/configs/fennec_rk3288.h   | 2 +-
 include/configs/popmetal_rk3288.h | 2 +-
 include/configs/tinker_rk3288.h   | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 6a068bb..bbd54a1 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -11,7 +11,7 @@
 #include 
 
 #define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_SYS_MMC_ENV_DEV 0
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 6a068bb..bbd54a1 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -11,7 +11,7 @@
 #include 
 
 #define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_SYS_MMC_ENV_DEV 0
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 
diff --git a/include/configs/popmetal_rk3288.h 
b/include/configs/popmetal_rk3288.h
index 6a068bb..bbd54a1 100644
--- a/include/configs/popmetal_rk3288.h
+++ b/include/configs/popmetal_rk3288.h
@@ -11,7 +11,7 @@
 #include 
 
 #define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_SYS_MMC_ENV_DEV 0
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 
diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h
index c398e07..5228528 100644
--- a/include/configs/tinker_rk3288.h
+++ b/include/configs/tinker_rk3288.h
@@ -16,7 +16,7 @@
func(MMC, mmc, 1)
 
 #define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_SYS_MMC_ENV_DEV 1
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 
-- 
1.9.1

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Re: [U-Boot] [PATCH] rockchip: firefly: configs: add a new config to keep non-of-platdata

[Jacob Chen]

Hi Simon,


2017-02-22 11:59 GMT+08:00 Simon Glass <s...@chromium.org>:
> Hi Jacob,
>
> On 20 February 2017 at 03:26, Jacob Chen <jacob2.c...@rock-chips.com> wrote:
>> The firefly config have been changed to use SPL_BACK_TO_BROM, but we also 
>> want keep
>> CONFIG_SPL_OF_PLATDATA as an example.
>>
>> So add this separate defconfig to show how both way works.
>>
>> Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
>> ---
>>
>>  configs/firefly-nodtb-rk3288_defconfig | 78 
>> ++
>>  1 file changed, 78 insertions(+)
>>  create mode 100644 configs/firefly-nodtb-rk3288_defconfig
>
> Thanks for this - can you also please add a MAINTAINERS file?
>
> Regards,
> Simon
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Could i just append a line to "board/firefly/firefly-rk3288/MAINTAINERS"?
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[U-Boot] [PATCH 2/2] rockchip: configs: Enable networking support on rk3288 boards

[Jacob Chen]

At current, only firefly and rock2 have network enabled.
Let's enable other boards.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 configs/evb-rk3288_defconfig  | 5 -
 configs/fennec-rk3288_defconfig   | 5 -
 configs/miniarm-rk3288_defconfig  | 4 
 configs/popmetal-rk3288_defconfig | 4 
 4 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index df58996..1b516de 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -45,8 +45,11 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
-# CONFIG_PINCTRL_FULL is not set
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_ROCKCHIP_RK3288_PINCTRL=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 21a5df7..5471970 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -44,8 +44,11 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
-# CONFIG_PINCTRL_FULL is not set
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_ROCKCHIP_RK3288_PINCTRL=y
diff --git a/configs/miniarm-rk3288_defconfig b/configs/miniarm-rk3288_defconfig
index 2b6bd0b..8b86ae5 100644
--- a/configs/miniarm-rk3288_defconfig
+++ b/configs/miniarm-rk3288_defconfig
@@ -44,6 +44,10 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
diff --git a/configs/popmetal-rk3288_defconfig 
b/configs/popmetal-rk3288_defconfig
index c4bf33a..c25b60a 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -44,6 +44,10 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-- 
1.9.1

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[U-Boot] [PATCH 1/2] ARM: dts: rockchip: enable gmac for rk3288 boards

[Jacob Chen]

Enable gmac interface for rk3288 board dts.
use "okay" not "ok"

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 arch/arm/dts/rk3288-evb.dtsi  | 22 ++
 arch/arm/dts/rk3288-miniarm.dtsi  |  2 +-
 arch/arm/dts/rk3288-popmetal.dtsi |  2 +-
 3 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index cb7d03e..4960f33 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -11,6 +11,13 @@
reg = <0 0x8000>;
};
 
+   ext_gmac: external-gmac-clock {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <12500>;
+   clock-output-names = "ext_gmac";
+   };
+
keys: gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
@@ -98,6 +105,21 @@
status = "okay";
 };
 
+ {
+   phy-mode = "rgmii";
+   clock_in_out = "input";
+   snps,reset-gpio = < 7 0>;
+   snps,reset-active-low;
+   snps,reset-delays-us = <0 1 100>;
+   assigned-clocks = < SCLK_MAC>;
+   assigned-clock-parents = <_gmac>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   tx_delay = <0x30>;
+   rx_delay = <0x10>;
+   status = "okay";
+};
+
  {
ddc-i2c-bus = <>;
status = "okay";
diff --git a/arch/arm/dts/rk3288-miniarm.dtsi b/arch/arm/dts/rk3288-miniarm.dtsi
index ceb4e2b..527493c 100644
--- a/arch/arm/dts/rk3288-miniarm.dtsi
+++ b/arch/arm/dts/rk3288-miniarm.dtsi
@@ -149,7 +149,7 @@
pinctrl-0 = <_pins>;
tx_delay = <0x30>;
rx_delay = <0x10>;
-   status = "ok";
+   status = "okay";
 };
 
  {
diff --git a/arch/arm/dts/rk3288-popmetal.dtsi 
b/arch/arm/dts/rk3288-popmetal.dtsi
index e5be4cb..dd6ce8b 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -203,7 +203,7 @@
pinctrl-0 = <_pins>;
tx_delay = <0x30>;
rx_delay = <0x10>;
-   status = "ok";
+   status = "okay";
 };
 
  {
-- 
1.9.1

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Re: [U-Boot] [PATCH] rockchip: firefly: configs: remove config_spl_of_platdata

[Jacob Chen]

Hi,

2017-02-17 4:44 GMT+08:00 Simon Glass <s...@chromium.org>:
> Hi,
>
> On 14 February 2017 at 23:41, Jacob Chen <jacob2.c...@rock-chips.com> wrote:
>> Hi Kever,
>>
>>
>> Kever Yang wrote on 2017年02月15日 14:13:
>>>
>>> Hi Jacob,
>>>
>>> On 02/15/2017 11:06 AM, Jacob Chen wrote:
>>>>
>>>> We should remove config_spl_of_platdata to build u-boot-spl-dtb.bin
>>>> rather than u-boot-spl-nodtb.bin
>>>> since we use spl_back_to_brom.
>>>
>>>
>>> Have you try with CONFIG_SPL_OF_PLATDATA on and without SPL_BACK_TO_BROM?
>>>
>>> If this works on firefly, then we can still leave it as an example to show
>>> how both way works.
>>>
>>
>> Firefly had been using CONFIG_SPL_OF_PLATDATA and it works well.
>> Just it will make trouble for other things to generate the u-boot blob,
>> like yocto, sdk build scripts, guides...
>>
>> At first, I also want to keep  CONFIG_SPL_OF_PLATDATA in firefly, but later
>> I find that i have to do a lot of unnecessary work to deal with it,
>> so now I would like one chip use one way to generate the u-boot blob.
>
> How about having a separate board config like firefly-rk3288-dt so
> that we keep the non-of-platdata alive? It only needs a separate
> defconfig, which is pretty esay.
>
> Regards,
> Simon
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I send a  patch "rockchip: firefly: configs: add a new config to keep
non-of-platdata" to save old config.
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[U-Boot] [PATCH] rockchip: firefly: configs: add a new config to keep non-of-platdata

[Jacob Chen]

The firefly config have been changed to use SPL_BACK_TO_BROM, but we also want 
keep
CONFIG_SPL_OF_PLATDATA as an example.

So add this separate defconfig to show how both way works.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 configs/firefly-nodtb-rk3288_defconfig | 78 ++
 1 file changed, 78 insertions(+)
 create mode 100644 configs/firefly-nodtb-rk3288_defconfig

diff --git a/configs/firefly-nodtb-rk3288_defconfig 
b/configs/firefly-nodtb-rk3288_defconfig
new file mode 100644
index 000..3ed17b4
--- /dev/null
+++ b/configs/firefly-nodtb-rk3288_defconfig
@@ -0,0 +1,78 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_TARGET_FIREFLY_RK3288=y
+CONFIG_SPL_STACK_R_ADDR=0x8
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
+CONFIG_SILENT_CONSOLE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_OF_PLATDATA=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_ACT8846=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xff69
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_ROCKCHIP_SERIAL=y
+CONFIG_SYSRESET=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_CONSOLE_SCROLL_LINES=10
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+# CONFIG_SPL_OF_LIBFDT is not set
-- 
1.9.1

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Re: [U-Boot] [PATCH] rockchip: firefly: configs: remove config_spl_of_platdata

[Jacob Chen]

Hi Kever,


Kever Yang wrote on 2017年02月15日 14:13:

Hi Jacob,

On 02/15/2017 11:06 AM, Jacob Chen wrote:
We should remove config_spl_of_platdata to build u-boot-spl-dtb.bin 
rather than u-boot-spl-nodtb.bin

since we use spl_back_to_brom.


Have you try with CONFIG_SPL_OF_PLATDATA on and without SPL_BACK_TO_BROM?

If this works on firefly, then we can still leave it as an example to 
show how both way works.




Firefly had been using CONFIG_SPL_OF_PLATDATA and it works well.
Just it will make trouble for other things to generate the u-boot blob,  
like yocto, sdk build scripts, guides...


At first, I also want to keep  CONFIG_SPL_OF_PLATDATA in firefly, but 
later I find that i have to do a lot of unnecessary work to deal with it,

so now I would like one chip use one way to generate the u-boot blob.


Thanks,
- Kever


I miss it because i forget to clean build-dir..

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

  configs/firefly-rk3288_defconfig | 1 -
  1 file changed, 1 deletion(-)

diff --git a/configs/firefly-rk3288_defconfig 
b/configs/firefly-rk3288_defconfig

index 18e050d..e5222da 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -32,7 +32,6 @@ CONFIG_CMD_FAT=y
  CONFIG_CMD_FS_GENERIC=y
  CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates 
assigned-clock-parents"

-CONFIG_SPL_OF_PLATDATA=y
  CONFIG_REGMAP=y
  CONFIG_SPL_REGMAP=y
  CONFIG_SYSCON=y







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[U-Boot] [PATCH] rockchip: firefly: configs: remove config_spl_of_platdata

[Jacob Chen]

We should remove config_spl_of_platdata to build u-boot-spl-dtb.bin rather than 
u-boot-spl-nodtb.bin
since we use spl_back_to_brom.

I miss it because i forget to clean build-dir..

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

 configs/firefly-rk3288_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 18e050d..e5222da 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -32,7 +32,6 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
-- 
2.7.4

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[U-Boot] [U-boot] [PATCH 2/2] rockchip: firefly: configs: use spl back to brom

[Jacob Chen]

Keep it same with other boards otherwise i have to write special script for it..

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 configs/firefly-rk3288_defconfig | 2 +-
 include/configs/firefly-rk3288.h | 5 -
 2 files changed, 1 insertion(+), 6 deletions(-)

diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 3ed17b4..18e050d 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
+CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
 CONFIG_TARGET_FIREFLY_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x8
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
@@ -75,4 +76,3 @@ CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h
index 14fdead..ec555dd 100644
--- a/include/configs/firefly-rk3288.h
+++ b/include/configs/firefly-rk3288.h
@@ -16,11 +16,6 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 
-- 
1.9.1

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[U-Boot] [U-boot] [PATCH 1/2] rockchip: configs: move env offset to common header

[Jacob Chen]

To reduce redundant code.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 include/configs/evb_rk3288.h  | 14 --
 include/configs/fennec_rk3288.h   | 14 --
 include/configs/kylin_rk3036.h| 14 --
 include/configs/miniarm_rk3288.h  | 14 --
 include/configs/popmetal_rk3288.h | 14 --
 include/configs/rock2.h   | 14 --
 include/configs/rockchip-common.h | 14 ++
 7 files changed, 14 insertions(+), 84 deletions(-)

diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 554ca0e..6a068bb 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -13,20 +13,6 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
-
 #define CONFIG_SYS_WHITE_ON_BLACK
 
 #endif
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 554ca0e..6a068bb 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -13,20 +13,6 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
-
 #define CONFIG_SYS_WHITE_ON_BLACK
 
 #endif
diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index bc28525..088aced 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -20,20 +20,6 @@
 #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
 #define CONFIG_SYS_MMC_ENV_PART0 /* user area */
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
-
 #endif
 
 #endif
diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h
index 5a623ca..860eb40 100644
--- a/include/configs/miniarm_rk3288.h
+++ b/include/configs/miniarm_rk3288.h
@@ -18,20 +18,6 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
-
 #define CONFIG_SYS_WHITE_ON_BLACK
 
 #endif
diff --git a/include/configs/popmetal_rk3288.h 
b/include/configs/popmetal_rk3288.h
index 554ca0e..6a068bb 100644
--- a/include/configs/popmetal_rk3288.h
+++ b/include/configs/popmetal_rk3288.h
@@ -13,20 +13,6 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
-
 #define CONFIG_SYS_WHITE_ON_BLACK
 
 #endif
diff --git a/include/configs/rock2.h b/include/configs/rock2.h
index b9c2290..ec555dd 100644
--- a/include/configs/rock2.h
+++ b/include/configs/rock2.h
@@ -17,20 +17,6 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
-
 #define CONFIG_SYS_WHITE_ON_BLACK
 
 #endif
diff --git a/include/configs/rockchip-common.h 
b/include/configs/rockchip-common.h
index be53e65..eb5f1ef 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -34,4 +34,18 @@
 
 #endif
 
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
+/* SPL @ 32k for ~36k
+ * ENV @ 96k
+ * u-boot @ 128K
+ */
+#define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
+
 #endif /* _ROCKCHIP_COMMON_H_ */
-- 
1.9.1

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Re: [U-Boot] [PATCH 1/3] dts: rk3288: correct sdram setting for miniarm

[Jacob Chen]

2016-11-18 9:13 GMT+08:00 Simon Glass <s...@chromium.org>:
> On 14 November 2016 at 21:01, Jacob Chen <jacob2.c...@rock-chips.com> wrote:
>> miniarm board use lpddr3
>>
>> Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
>> ---
>>
>>  arch/arm/dts/rk3288-miniarm.dts | 16 
>>  1 file changed, 8 insertions(+), 8 deletions(-)
>
> Acked-by: Simon Glass <s...@chromium.org>
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Hi,

Sorry for sending patch in disorder. It seems this patch have been ignored.
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[U-Boot] [PATCH v2 2/2] rockchip: configs: make rk3036 env config same as rk3288

[Jacob Chen]

To make rockchip soc keep the same partition map


Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

Changes in v2:
- add a commit message

 include/configs/kylin_rk3036.h | 17 ++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index 4f0bd84..bc28525 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -19,9 +19,20 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
 #define CONFIG_SYS_MMC_ENV_PART0 /* user area */
-#define CONFIG_ENV_OFFSET  (SZ_4M - SZ_64K) /* reserved area */
-#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
+/* SPL @ 32k for ~36k
+ * ENV @ 96k
+ * u-boot @ 128K
+ */
+#define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #endif
 
-- 
1.9.1

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[U-Boot] [PATCH v2 1/2] rockchip: configs: correct env offset when enable CONFIG_ROCKCHIP_SPL_BACK_TO_BROM

[Jacob Chen]

With CONFIG_ROCKCHIP_SPL_BACK_TO_BROM enabled,
the environment is inside u-boot.
So solve it by moving environment after u-boot.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

Changes in v2:
- add a commit message

 include/configs/evb_rk3288.h  | 9 +
 include/configs/fennec_rk3288.h   | 9 +
 include/configs/miniarm_rk3288.h  | 9 +
 include/configs/popmetal_rk3288.h | 9 +
 4 files changed, 36 insertions(+)

diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 390c243..90b810a 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -12,11 +12,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 390c243..90b810a 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -12,11 +12,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h
index aa259db..645d023 100644
--- a/include/configs/miniarm_rk3288.h
+++ b/include/configs/miniarm_rk3288.h
@@ -17,11 +17,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
diff --git a/include/configs/popmetal_rk3288.h 
b/include/configs/popmetal_rk3288.h
index 390c243..90b810a 100644
--- a/include/configs/popmetal_rk3288.h
+++ b/include/configs/popmetal_rk3288.h
@@ -12,11 +12,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
-- 
1.9.1

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[U-Boot] [PATCH v2 2/3] rockchip: configs: make rk3036 env config same as rk3288

[Jacob Chen]

To make rockchip soc keep the same partition map


Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

Changes in v2:
- add a commit message

 include/configs/kylin_rk3036.h | 17 ++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index 4f0bd84..bc28525 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -19,9 +19,20 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
 #define CONFIG_SYS_MMC_ENV_PART0 /* user area */
-#define CONFIG_ENV_OFFSET  (SZ_4M - SZ_64K) /* reserved area */
-#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
+/* SPL @ 32k for ~36k
+ * ENV @ 96k
+ * u-boot @ 128K
+ */
+#define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #endif
 
-- 
1.9.1

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[U-Boot] [PATCH v2 1/3] rockchip: configs: correct env offset when enable CONFIG_ROCKCHIP_SPL_BACK_TO_BROM

[Jacob Chen]

With CONFIG_ROCKCHIP_SPL_BACK_TO_BROM enabled,
the environment is inside u-boot.
So solve it by moving environment after u-boot.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

Changes in v2:
- add a commit message

 include/configs/evb_rk3288.h  | 9 +
 include/configs/fennec_rk3288.h   | 9 +
 include/configs/miniarm_rk3288.h  | 9 +
 include/configs/popmetal_rk3288.h | 9 +
 4 files changed, 36 insertions(+)

diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 390c243..90b810a 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -12,11 +12,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 390c243..90b810a 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -12,11 +12,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h
index aa259db..645d023 100644
--- a/include/configs/miniarm_rk3288.h
+++ b/include/configs/miniarm_rk3288.h
@@ -17,11 +17,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
diff --git a/include/configs/popmetal_rk3288.h 
b/include/configs/popmetal_rk3288.h
index 390c243..90b810a 100644
--- a/include/configs/popmetal_rk3288.h
+++ b/include/configs/popmetal_rk3288.h
@@ -12,11 +12,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
-- 
1.9.1

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[U-Boot] [PATCH v2 3/3] rockchip: configs: correct partitions 'boot' size

[Jacob Chen]

It should be 112M, to make rootfs start at 0x4

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
Acked-by: Simon Glass <s...@chromium.org>
---

Changes in v2: None

 include/configs/rockchip-common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/rockchip-common.h 
b/include/configs/rockchip-common.h
index 86c81b0..d077824 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -28,7 +28,7 @@
"name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
"name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
"name=atf,size=4M,uuid=${uuid_gpt_atf};" \
-   "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \
+   "name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \
"name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
 
 #endif
-- 
1.9.1

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[U-Boot] [PATCH] rockchip: configs: correct partitions 'boot' size

[Jacob Chen]

It should be 112M, to make rootfs start at 0x4

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 include/configs/rockchip-common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/rockchip-common.h 
b/include/configs/rockchip-common.h
index 86c81b0..d077824 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -28,7 +28,7 @@
"name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
"name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
"name=atf,size=4M,uuid=${uuid_gpt_atf};" \
-   "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \
+   "name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \
"name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
 
 #endif
-- 
1.9.1

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[U-Boot] [PATCH 1/3] dts: rk3288: correct sdram setting for miniarm

[Jacob Chen]

miniarm board use lpddr3

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 arch/arm/dts/rk3288-miniarm.dts | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/dts/rk3288-miniarm.dts b/arch/arm/dts/rk3288-miniarm.dts
index 9083028..3dd40e6 100644
--- a/arch/arm/dts/rk3288-miniarm.dts
+++ b/arch/arm/dts/rk3288-miniarm.dts
@@ -17,14 +17,14 @@
 };
 
  {
-   rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
-   0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
-   0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
-   0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
-   0x5 0x0>;
-   rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
-   0xa60 0x40 0x10 0x0>;
-   rockchip,sdram-params = <0x30B25564 0x627 3 66600 3 9 1>;
+   rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
+   0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
+   0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
+   0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
+   0x8 0x1f4>;
+   rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
+   0x0 0xc3 0x6 0x2>;
+   rockchip,sdram-params = <0x20d266a4 0x5b6 2 53300 6 9 0>;
 };
 
 
-- 
1.9.1

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[U-Boot] [PATCH 2/3] rockchip: configs: correct env offset when enable CONFIG_ROCKCHIP_SPL_BACK_TO_BROM

[Jacob Chen]

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 include/configs/evb_rk3288.h  | 9 +
 include/configs/fennec_rk3288.h   | 9 +
 include/configs/miniarm_rk3288.h  | 9 +
 include/configs/popmetal_rk3288.h | 9 +
 4 files changed, 36 insertions(+)

diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 390c243..90b810a 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -12,11 +12,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 390c243..90b810a 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -12,11 +12,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h
index aa259db..645d023 100644
--- a/include/configs/miniarm_rk3288.h
+++ b/include/configs/miniarm_rk3288.h
@@ -17,11 +17,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
diff --git a/include/configs/popmetal_rk3288.h 
b/include/configs/popmetal_rk3288.h
index 390c243..90b810a 100644
--- a/include/configs/popmetal_rk3288.h
+++ b/include/configs/popmetal_rk3288.h
@@ -12,11 +12,20 @@
 
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
 /* SPL @ 32k for ~36k
  * ENV @ 96k
  * u-boot @ 128K
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES10
-- 
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[U-Boot] [PATCH 3/3] rockchip: configs: make rk3036 env config same with rk3288

[Jacob Chen]

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 include/configs/kylin_rk3036.h | 17 ++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index 4f0bd84..bc28525 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -19,9 +19,20 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
 #define CONFIG_SYS_MMC_ENV_PART0 /* user area */
-#define CONFIG_ENV_OFFSET  (SZ_4M - SZ_64K) /* reserved area */
-#define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* SPL @ 32k for 34k
+ * u-boot directly after @ 68k for 400k or so
+ * ENV @ 992k
+ */
+#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
+#else
+/* SPL @ 32k for ~36k
+ * ENV @ 96k
+ * u-boot @ 128K
+ */
+#define CONFIG_ENV_OFFSET (96 * 1024)
+#endif
 
 #endif
 
-- 
1.9.1

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[U-Boot] [PATCH v3 2/2] rockchip: doc: add GPT partition layout

[Jacob Chen]

A simple introduction.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
Acked-by: Simon Glass <s...@chromium.org>
---

Changes in v3: None
Changes in v2: None

 doc/README.rockchip | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 69b926c..06ec80e 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -149,7 +149,6 @@ Note: rk3036 SDMMC and debug uart use the same iomux, so if 
you boot from SD, th
 
 Using fastboot on rk3288
 
-- Define GPT partition layout like kylin_rk3036(see 
include/configs/kylin_rk3036.h)
 - Write GPT partition layout to mmc device which fastboot want to use it to
 store the image
 
@@ -212,7 +211,6 @@ When booting you should see something like:
Err:   serial@ff69
=>
 
-
 Future work
 ===
 
@@ -298,6 +296,15 @@ overhead and in SPL with a 32KB size limit some shortcuts 
have been taken.
 In general all Rockchip drivers should use these features, with SPL-specific
 modifications where required.
 
+GPT partition layout
+
+
+Rockchip use a unified GPT partition layout  in open source support.
+With this GPT partition layout, uboot can be compatilbe with other components,
+like miniloader, trusted-os, arm-trust-firmware.
+
+There are some documents about partitions in the links below.
+http://rockchip.wikidot.com/partitions
 
 --
 Simon Glass <s...@chromium.org>
-- 
1.9.1

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[U-Boot] [PATCH v3 1/2] rockchip: use rockchip linux partitions layout

[Jacob Chen]

Unify the partitions of each chip then it will be more easy for us to 
write scripts, tools or guides for rockchip chips.

Those extra partitions mostly are used to be compatible with our 
internal loaders (such as miniloader which was same as spl,  or 
android loader then we can support dual boot)

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

Changes in v3:
- correct the copyright

Changes in v2:
- put macro in a rockchip_common.h

 include/configs/rk3036_common.h   | 17 +
 include/configs/rk3288_common.h   | 17 +
 include/configs/rk3399_common.h   | 16 ++--
 include/configs/rockchip-common.h | 35 +++
 4 files changed, 39 insertions(+), 46 deletions(-)
 create mode 100644 include/configs/rockchip-common.h

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 73830e4..29d56ff 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -7,6 +7,7 @@
 #define __CONFIG_RK3036_COMMON_H
 
 #include 
+#include "rockchip-common.h"
 
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_NR_DRAM_BANKS   1
@@ -79,11 +80,6 @@
 #define CONFIG_G_DNL_VENDOR_NUM0x2207
 #define CONFIG_G_DNL_PRODUCT_NUM   0x310a
 
-/* Enable gpt partition table */
-#define CONFIG_CMD_GPT
-
-#include 
-
 #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x6000\0" \
"pxefile_addr_r=0x6010\0" \
@@ -91,17 +87,6 @@
"kernel_addr_r=0x6200\0" \
"ramdisk_addr_r=0x6400\0"
 
-#define CONFIG_RANDOM_UUID
-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
-   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
-
-/* First try to boot from SD (index 0), then eMMC (index 1 */
-#define BOOT_TARGET_DEVICES(func) \
-   func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
-
 #include 
 
 /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 9ddfe1d..630f218 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -8,6 +8,7 @@
 #define __CONFIG_RK3288_COMMON_H
 
 #include 
+#include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 #define CONFIG_SYS_NO_FLASH
@@ -96,11 +97,6 @@
 #define CONFIG_G_DNL_VENDOR_NUM0x2207
 #define CONFIG_G_DNL_PRODUCT_NUM   0x320a
 
-/* Enable gpt partition table */
-#define CONFIG_CMD_GPT
-
-#include 
-
 #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x\0" \
"pxefile_addr_r=0x0010\0" \
@@ -108,17 +104,6 @@
"kernel_addr_r=0x0200\0" \
"ramdisk_addr_r=0x0400\0"
 
-#define CONFIG_RANDOM_UUID
-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
-   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
-
-/* First try to boot from SD (index 0), then eMMC (index 1 */
-#define BOOT_TARGET_DEVICES(func) \
-   func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
-
 #include 
 
 /* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index b026122..68b9391 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -7,6 +7,8 @@
 #ifndef __CONFIG_RK3399_COMMON_H
 #define __CONFIG_RK3399_COMMON_H
 
+#include "rockchip-common.h"
+
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_NR_DRAM_BANKS   1
 #define CONFIG_ENV_SIZE0x2000
@@ -53,7 +55,6 @@
 #define CONFIG_SF_DEFAULT_SPEED 2000
 
 #ifndef CONFIG_SPL_BUILD
-#include 
 
 #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x\0" \
@@ -62,19 +63,6 @@
"kernel_addr_r=0x0200\0" \
"ramdisk_addr_r=0x0400\0"
 
-#define CONFIG_CMD_GPT
-#define CONFIG_RANDOM_UUID
-#define CONFIG_PARTITION_UUIDS
-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=16M,size=32M,bootable;" \
-   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
-
-/* First try to boot from SD (index 0), then eMMC (index 1) */
-#define BOOT_TARGET_DEVICES(func) \
-   func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
-
 #include 
 #define CONFIG_EXTRA_ENV_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \
diff --git a/include/configs/rockchip-common.h 
b/include/configs/rockchip-common.h
new file mode 100644
index 000..7ca1696
--- /dev/null
+++ b/include/configs/rockchip-common.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GP

[U-Boot] [PATCH v2 2/2] rockchip: doc: add GPT partition layout

[Jacob Chen]

A simple introduction.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
Acked-by: Simon Glass <s...@chromium.org>
---

Changes in v2: None

 doc/README.rockchip | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 69b926c..06ec80e 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -149,7 +149,6 @@ Note: rk3036 SDMMC and debug uart use the same iomux, so if 
you boot from SD, th
 
 Using fastboot on rk3288
 
-- Define GPT partition layout like kylin_rk3036(see 
include/configs/kylin_rk3036.h)
 - Write GPT partition layout to mmc device which fastboot want to use it to
 store the image
 
@@ -212,7 +211,6 @@ When booting you should see something like:
Err:   serial@ff69
=>
 
-
 Future work
 ===
 
@@ -298,6 +296,15 @@ overhead and in SPL with a 32KB size limit some shortcuts 
have been taken.
 In general all Rockchip drivers should use these features, with SPL-specific
 modifications where required.
 
+GPT partition layout
+
+
+Rockchip use a unified GPT partition layout  in open source support.
+With this GPT partition layout, uboot can be compatilbe with other components,
+like miniloader, trusted-os, arm-trust-firmware.
+
+There are some documents about partitions in the links below.
+http://rockchip.wikidot.com/partitions
 
 --
 Simon Glass <s...@chromium.org>
-- 
1.9.1

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[U-Boot] [PATCH v2 1/2] rockchip: use rockchip linux partitions layout

[Jacob Chen]

Unify the partitions of each chip then it will be more easy for us to write 
scripts, tools or guides
 for rockchip chips.

Those extra partitions mostly are used to be compatible with our internal 
loaders (such as miniloader
 which was same as spl,  or android loader then we can support dual boot)

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

Changes in v2:
- put macro in a rockchip_common.h

 include/configs/rk3036_common.h   | 17 +
 include/configs/rk3288_common.h   | 17 +
 include/configs/rk3399_common.h   | 16 ++--
 include/configs/rockchip-common.h | 36 
 4 files changed, 40 insertions(+), 46 deletions(-)
 create mode 100644 include/configs/rockchip-common.h

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 73830e4..29d56ff 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -7,6 +7,7 @@
 #define __CONFIG_RK3036_COMMON_H
 
 #include 
+#include "rockchip-common.h"
 
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_NR_DRAM_BANKS   1
@@ -79,11 +80,6 @@
 #define CONFIG_G_DNL_VENDOR_NUM0x2207
 #define CONFIG_G_DNL_PRODUCT_NUM   0x310a
 
-/* Enable gpt partition table */
-#define CONFIG_CMD_GPT
-
-#include 
-
 #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x6000\0" \
"pxefile_addr_r=0x6010\0" \
@@ -91,17 +87,6 @@
"kernel_addr_r=0x6200\0" \
"ramdisk_addr_r=0x6400\0"
 
-#define CONFIG_RANDOM_UUID
-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
-   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
-
-/* First try to boot from SD (index 0), then eMMC (index 1 */
-#define BOOT_TARGET_DEVICES(func) \
-   func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
-
 #include 
 
 /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 9ddfe1d..630f218 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -8,6 +8,7 @@
 #define __CONFIG_RK3288_COMMON_H
 
 #include 
+#include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 #define CONFIG_SYS_NO_FLASH
@@ -96,11 +97,6 @@
 #define CONFIG_G_DNL_VENDOR_NUM0x2207
 #define CONFIG_G_DNL_PRODUCT_NUM   0x320a
 
-/* Enable gpt partition table */
-#define CONFIG_CMD_GPT
-
-#include 
-
 #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x\0" \
"pxefile_addr_r=0x0010\0" \
@@ -108,17 +104,6 @@
"kernel_addr_r=0x0200\0" \
"ramdisk_addr_r=0x0400\0"
 
-#define CONFIG_RANDOM_UUID
-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
-   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
-
-/* First try to boot from SD (index 0), then eMMC (index 1 */
-#define BOOT_TARGET_DEVICES(func) \
-   func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
-
 #include 
 
 /* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index b026122..68b9391 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -7,6 +7,8 @@
 #ifndef __CONFIG_RK3399_COMMON_H
 #define __CONFIG_RK3399_COMMON_H
 
+#include "rockchip-common.h"
+
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_NR_DRAM_BANKS   1
 #define CONFIG_ENV_SIZE0x2000
@@ -53,7 +55,6 @@
 #define CONFIG_SF_DEFAULT_SPEED 2000
 
 #ifndef CONFIG_SPL_BUILD
-#include 
 
 #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x\0" \
@@ -62,19 +63,6 @@
"kernel_addr_r=0x0200\0" \
"ramdisk_addr_r=0x0400\0"
 
-#define CONFIG_CMD_GPT
-#define CONFIG_RANDOM_UUID
-#define CONFIG_PARTITION_UUIDS
-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=16M,size=32M,bootable;" \
-   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
-
-/* First try to boot from SD (index 0), then eMMC (index 1) */
-#define BOOT_TARGET_DEVICES(func) \
-   func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
-
 #include 
 #define CONFIG_EXTRA_ENV_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \
diff --git a/include/configs/rockchip-common.h 
b/include/configs/rockchip-common.h
new file mode 100644
index 000..86c81b0
--- /dev/null
+++ b/include/configs/rockchip-common.h
@@ -0,0 +1,36 @@
+/*
+ *  (C) Copyright 2010-2012
+ *  NVIDIA Corporation 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_COMM

[U-Boot] [PATCH 2/2] rockchip: doc: add GPT partition layout

[Jacob Chen]

A simple introduction.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 doc/README.rockchip | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 69b926c..06ec80e 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -149,7 +149,6 @@ Note: rk3036 SDMMC and debug uart use the same iomux, so if 
you boot from SD, th
 
 Using fastboot on rk3288
 
-- Define GPT partition layout like kylin_rk3036(see 
include/configs/kylin_rk3036.h)
 - Write GPT partition layout to mmc device which fastboot want to use it to
 store the image
 
@@ -212,7 +211,6 @@ When booting you should see something like:
Err:   serial@ff69
=>
 
-
 Future work
 ===
 
@@ -298,6 +296,15 @@ overhead and in SPL with a 32KB size limit some shortcuts 
have been taken.
 In general all Rockchip drivers should use these features, with SPL-specific
 modifications where required.
 
+GPT partition layout
+
+
+Rockchip use a unified GPT partition layout  in open source support.
+With this GPT partition layout, uboot can be compatilbe with other components,
+like miniloader, trusted-os, arm-trust-firmware.
+
+There are some documents about partitions in the links below.
+http://rockchip.wikidot.com/partitions
 
 --
 Simon Glass <s...@chromium.org>
-- 
1.9.1

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[U-Boot] [PATCH 1/2] rockchip: use rockchip linux partitions layout

[Jacob Chen]

Unify the partitions of each chip then it will be more easy for us to write 
scripts, tools or guides
 for rockchip chips.

Those extra partitions mostly are used to be compatible with our internal 
loaders (such as miniloader
 which was same as spl,  or android loader then we can support dual boot)

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 include/configs/rk3036_common.h | 7 ++-
 include/configs/rk3288_common.h | 7 ++-
 include/configs/rk3399_common.h | 7 ++-
 3 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 6ddf0d9..17335f6 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -94,7 +94,12 @@
 #define CONFIG_RANDOM_UUID
 #define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
+   "name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
+   "name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
+   "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
+   "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
+   "name=atf,size=4M,uuid=${uuid_gpt_atf};" \
+   "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \
"name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
 
 /* First try to boot from SD (index 0), then eMMC (index 1 */
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index e8bf987..4b19e9d 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -111,7 +111,12 @@
 #define CONFIG_RANDOM_UUID
 #define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
+   "name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
+   "name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
+   "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
+   "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
+   "name=atf,size=4M,uuid=${uuid_gpt_atf};" \
+   "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \
"name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
 
 /* First try to boot from SD (index 0), then eMMC (index 1 */
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 93d5856..5a41c93 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -67,7 +67,12 @@
 #define CONFIG_PARTITION_UUIDS
 #define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=16M,size=32M,bootable;" \
+   "name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
+   "name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
+   "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
+   "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
+   "name=atf,size=4M,uuid=${uuid_gpt_atf};" \
+   "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \
"name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
 
 /* First try to boot from SD (index 0), then eMMC (index 1) */
-- 
1.9.1

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[U-Boot] [PATCH] rockchip: enable SPL_OF_PLATDATA for rk3288 board

[Jacob Chen]

It seems ddr auto detect make SPL image to large.
So we have to use SPL_OF_PLATDATA to reduce size.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 configs/evb-rk3288_defconfig | 4 
 configs/fennec-rk3288_defconfig  | 3 +++
 configs/miniarm-rk3288_defconfig | 3 +++
 3 files changed, 10 insertions(+)

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index c7396a5..89cf3c1 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -29,10 +29,12 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
+# CONFIG_SPL_SIMPLE_BUS is not set
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
@@ -59,7 +61,9 @@ CONFIG_DEBUG_UART_BASE=0xff69
 CONFIG_DEBUG_UART_CLOCK=2400
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_ROCKCHIP_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index a5c089b..0ff7264 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -58,7 +59,9 @@ CONFIG_DEBUG_UART_BASE=0xff69
 CONFIG_DEBUG_UART_CLOCK=2400
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_ROCKCHIP_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/miniarm-rk3288_defconfig b/configs/miniarm-rk3288_defconfig
index 6354d1a..c8939a8 100644
--- a/configs/miniarm-rk3288_defconfig
+++ b/configs/miniarm-rk3288_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -57,7 +58,9 @@ CONFIG_DEBUG_UART_BASE=0xff69
 CONFIG_DEBUG_UART_CLOCK=2400
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_ROCKCHIP_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_SPL_OF_LIBFDT is not set
-- 
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[U-Boot] [PATCH] clk: rk3399: fix rockchip_get_cru

[Jacob Chen]

clk_rk3399 is driver name, not device name

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 drivers/clk/rockchip/clk_rk3399.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk_rk3399.c 
b/drivers/clk/rockchip/clk_rk3399.c
index ea0ce2a..8efb892 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -786,7 +786,9 @@ void *rockchip_get_cru(void)
fdt_addr_t *addr;
int ret;
 
-   ret = uclass_get_device_by_name(UCLASS_CLK, "clk_rk3399", );
+   ret = uclass_get_device_by_driver(UCLASS_CLK,
+   DM_GET_DRIVER(clk_rk3399), );
+
if (ret)
return ERR_PTR(ret);
 
-- 
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[U-Boot] [PATCH 3/4] rockchip: move common function from board-file to rk3036-board.c

[Jacob Chen]

To keep it same with 3288

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 arch/arm/mach-rockchip/Makefile|  1 +
 arch/arm/mach-rockchip/rk3036-board.c  | 83 ++
 board/rockchip/evb_rk3036/evb_rk3036.c | 66 
 board/rockchip/kylin_rk3036/kylin_rk3036.c | 66 
 4 files changed, 84 insertions(+), 132 deletions(-)
 create mode 100644 arch/arm/mach-rockchip/rk3036-board.c

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index e31b8de..6e79fed 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
 obj-$(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) += save_boot_param.o
 else
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
+obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
 endif
 ifndef CONFIG_ARM64
 obj-y += rk_timer.o
diff --git a/arch/arm/mach-rockchip/rk3036-board.c 
b/arch/arm/mach-rockchip/rk3036-board.c
new file mode 100644
index 000..b63f9c0
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3036-board.c
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+   return 0;
+}
+
+int dram_init(void)
+{
+   gd->ram_size = sdram_size();
+
+   return 0;
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+   /* Enable D-cache. I-cache is already enabled in start.S */
+   dcache_enable();
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include 
+#include 
+
+static struct dwc2_plat_otg_data rk3036_otg_data = {
+   .rx_fifo_sz = 512,
+   .np_tx_fifo_sz  = 16,
+   .tx_fifo_sz = 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+   int node;
+   const char *mode;
+   bool matched = false;
+   const void *blob = gd->fdt_blob;
+
+   /* find the usb_otg node */
+   node = fdt_node_offset_by_compatible(blob, -1,
+   "rockchip,rk3288-usb");
+
+   while (node > 0) {
+   mode = fdt_getprop(blob, node, "dr_mode", NULL);
+   if (mode && strcmp(mode, "otg") == 0) {
+   matched = true;
+   break;
+   }
+
+   node = fdt_node_offset_by_compatible(blob, node,
+   "rockchip,rk3288-usb");
+   }
+   if (!matched) {
+   debug("Not found usb_otg device\n");
+   return -ENODEV;
+   }
+   rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+   return dwc2_udc_probe(_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+   return 0;
+}
+#endif
diff --git a/board/rockchip/evb_rk3036/evb_rk3036.c 
b/board/rockchip/evb_rk3036/evb_rk3036.c
index e5582b4..288370a 100644
--- a/board/rockchip/evb_rk3036/evb_rk3036.c
+++ b/board/rockchip/evb_rk3036/evb_rk3036.c
@@ -27,69 +27,3 @@ void get_ddr_config(struct rk3036_ddr_config *config)
/* 16bit bw */
config->bw = 1;
 }
-
-int board_init(void)
-{
-   return 0;
-}
-
-int dram_init(void)
-{
-   gd->ram_size = sdram_size();
-
-   return 0;
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-   /* Enable D-cache. I-cache is already enabled in start.S */
-   dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include 
-#include 
-
-static struct dwc2_plat_otg_data rk3036_otg_data = {
-   .rx_fifo_sz = 512,
-   .np_tx_fifo_sz  = 16,
-   .tx_fifo_sz = 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-   int node;
-   const char *mode;
-   bool matched = false;
-   const void *blob = gd->fdt_blob;
-
-   /* find the usb_otg node */
-   node = fdt_node_offset_by_compatible(blob, -1,
-   "rockchip,rk3288-usb");
-
-   while (node > 0) {
-   mode = fdt_getprop(blob, node, "dr_mode", NULL);
-   if (mode && strcmp(mode, "otg") == 0) {
-   matched = true;
-   break;
-   }
-
-   node = fdt_node_offset_by_compatible(blob, node,
-   "rockchip,rk3288-usb");
-   }
-   if (!matched) {
-   debug("Not found usb_otg device\n");
-   return -ENODEV;
-   }
-   rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-   return dwc2_udc_probe(_o

[U-Boot] [PATCH 0/4] boot-mode support in rockchip platform

[Jacob Chen]

This patch add boot-mode support for rk3036,rk3288 (fastboot, ums)
The corresponding commit in the kernel:
https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/commit/?h=v4.9-armsoc/dts32=b60ab70bbeced9a780ba297ffc555bc3a8ae6045

This patch also make some work to let rk3036 and rk3288 more same , so easy to 
maintain



Jacob Chen (4):
  rockchip: move partitons define from 3036-kylin to 3036-commn
  rockchip: rename board.c to rk3288-board.c
  rockchip: move common function from board-file to rk3036-board.c
  rockchip: add boot-mode support for rk3288,rk3036

 arch/arm/include/asm/arch-rockchip/boot_mode.h |  19 
 arch/arm/mach-rockchip/Makefile|   3 +-
 arch/arm/mach-rockchip/rk3036-board.c  | 122 +
 arch/arm/mach-rockchip/{board.c => rk3288-board.c} |  50 -
 board/rockchip/evb_rk3036/evb_rk3036.c |  66 ---
 board/rockchip/kylin_rk3036/kylin_rk3036.c |  80 +-
 include/configs/kylin_rk3036.h |  27 -
 include/configs/rk3036_common.h|  13 +++
 include/configs/rk3288_common.h|   3 +
 9 files changed, 206 insertions(+), 177 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/boot_mode.h
 create mode 100644 arch/arm/mach-rockchip/rk3036-board.c
 rename arch/arm/mach-rockchip/{board.c => rk3288-board.c} (80%)

-- 
1.9.1

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[U-Boot] [PATCH 4/4] rockchip: add boot-mode support for rk3288, rk3036

[Jacob Chen]

rockchip platform have a protocol to pass the the kernel reboot mode to 
bootloader
by some special registers when system reboot. In bootloader we should read it 
and take action.

We can only setup boot_mode in board_late_init becasue "setenv" need env 
setuped.
So add CONFIG_BOARD_LATE_INIT to common header and use a entry 
"rk_board_late_init"
to replace "board_late_init" in board file.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 arch/arm/include/asm/arch-rockchip/boot_mode.h | 19 ++
 arch/arm/mach-rockchip/rk3036-board.c  | 39 
 arch/arm/mach-rockchip/rk3288-board.c  | 50 +++---
 board/rockchip/kylin_rk3036/kylin_rk3036.c | 14 ++--
 include/configs/kylin_rk3036.h |  3 --
 include/configs/rk3036_common.h|  3 ++
 include/configs/rk3288_common.h|  3 ++
 7 files changed, 111 insertions(+), 20 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/boot_mode.h

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h 
b/arch/arm/include/asm/arch-rockchip/boot_mode.h
new file mode 100644
index 000..bd65f60
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -0,0 +1,19 @@
+#ifndef __REBOOT_MODE_H
+#define __REBOOT_MODE_H
+
+/* high 24 bits is tag, low 8 bits is type */
+#define REBOOT_FLAG0x5242C300
+/* normal boot */
+#define BOOT_NORMAL(REBOOT_FLAG + 0)
+/* enter loader rockusb mode */
+#define BOOT_LOADER(REBOOT_FLAG + 1)
+/* enter recovery */
+#define BOOT_RECOVERY  (REBOOT_FLAG + 3)
+/* enter fastboot mode */
+#define BOOT_FASTBOOT  (REBOOT_FLAG + 9)
+/* enter charging mode */
+#define BOOT_CHARGING  (REBOOT_FLAG + 11)
+/* enter usb mass storage mode */
+#define BOOT_UMS   (REBOOT_FLAG + 12)
+
+#endif
diff --git a/arch/arm/mach-rockchip/rk3036-board.c 
b/arch/arm/mach-rockchip/rk3036-board.c
index b63f9c0..bf2b268 100644
--- a/arch/arm/mach-rockchip/rk3036-board.c
+++ b/arch/arm/mach-rockchip/rk3036-board.c
@@ -11,11 +11,50 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 #include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define GRF_BASE   0x20008000
+
+static void setup_boot_mode(void)
+{
+   struct rk3036_grf *const grf = (void *)GRF_BASE;
+   int boot_mode = readl(>os_reg[4]);
+
+   debug("boot mode %x.\n", boot_mode);
+
+   /* Clear boot mode */
+   writel(BOOT_NORMAL, >os_reg[4]);
+
+   switch (boot_mode) {
+   case BOOT_FASTBOOT:
+   printf("enter fastboot!\n");
+   setenv("preboot", "setenv preboot; fastboot usb0");
+   break;
+   case BOOT_UMS:
+   printf("enter UMS!\n");
+   setenv("preboot", "setenv preboot; ums mmc 0");
+   break;
+   }
+}
+
+__weak int rk_board_late_init(void)
+{
+   return 0;
+}
+
+int board_late_init(void)
+{
+   setup_boot_mode();
+
+   return rk_board_late_init();
+}
+
 int board_init(void)
 {
return 0;
diff --git a/arch/arm/mach-rockchip/rk3288-board.c 
b/arch/arm/mach-rockchip/rk3288-board.c
index bec756d..d24c090 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -8,25 +8,65 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define PMU_BASE   0xff73
+
+static void setup_boot_mode(void)
+{
+   struct rk3288_pmu *const pmu = (void *)PMU_BASE;
+   int boot_mode = readl(>sys_reg[0]);
+
+   debug("boot mode %x.\n", boot_mode);
+
+   /* Clear boot mode */
+   writel(BOOT_NORMAL, >sys_reg[0]);
+
+   switch (boot_mode) {
+   case BOOT_FASTBOOT:
+   printf("enter fastboot!\n");
+   setenv("preboot", "setenv preboot; fastboot usb0");
+   break;
+   case BOOT_UMS:
+   printf("enter UMS!\n");
+   setenv("preboot", "setenv preboot; if mmc dev 0;"
+  "then ums mmc 0; else ums mmc 1;fi");
+   break;
+   }
+}
+
+__weak int rk_board_late_init(void)
+{
+   return 0;
+}
+
+int board_late_init(void)
+{
+   setup_boot_mode();
+
+   return rk_board_late_init();
+}
+
 int board_init(void)
 {
 #ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
struct udevice *pinctrl;
int ret;
 
-/*
- * We need to implement sdcard iomux here for the further
- * initlization, otherwise, it'll hit sdcard command sending
- * timeout exception.
- */
+   /*
+* We need to implement sdcard iomux here for the further
+* initlization, otherwise, it'll hit sdcard command sending
+   

[U-Boot] [PATCH 1/4] rockchip: move partitons define from 3036-kylin to 3036-common

[Jacob Chen]

To keep it same with 3288.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 include/configs/kylin_rk3036.h  | 24 
 include/configs/rk3036_common.h | 10 ++
 2 files changed, 10 insertions(+), 24 deletions(-)

diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index e8ca76d..39fb239 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -23,30 +23,6 @@
 #define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 
-/* Enable gpt partition table */
-#define CONFIG_CMD_GPT
-#define CONFIG_RANDOM_UUID
-#define PARTS_DEFAULT \
-   "uuid_disk=${uuid_gpt_disk};" \
-   "name=loader,start=32K,size=4000K,uuid=${uuid_gpt_loader};" \
-   "name=reserved,size=64K,uuid=${uuid_gpt_reserved};" \
-   "name=misc,size=4M,uuid=${uuid_gpt_misc};" \
-   "name=recovery,size=32M,uuid=${uuid_gpt_recovery};" \
-   "name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
-   "name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \
-   "name=system_a,size=818M,uuid=${uuid_gpt_system_a};" \
-   "name=system_b,size=818M,uuid=${uuid_gpt_system_b};" \
-   "name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
-   "name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
-   "name=cache,size=100M,uuid=${uuid_gpt_cache};" \
-   "name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
-   "name=persist,size=4M,uuid=${uuid_gpt_persist};" \
-   "name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
-
-#undef CONFIG_EXTRA_ENV_SETTINGS
-#define CONFIG_EXTRA_ENV_SETTINGS \
-   "partitions=" PARTS_DEFAULT \
-
 #endif
 
 #define CONFIG_BOARD_LATE_INIT
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 101a3ed..22fc55c 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -77,6 +77,9 @@
 #define CONFIG_G_DNL_VENDOR_NUM0x2207
 #define CONFIG_G_DNL_PRODUCT_NUM   0x310a
 
+/* Enable gpt partition table */
+#define CONFIG_CMD_GPT
+
 #include 
 
 #define ENV_MEM_LAYOUT_SETTINGS \
@@ -86,6 +89,12 @@
"kernel_addr_r=0x6200\0" \
"ramdisk_addr_r=0x6400\0"
 
+#define CONFIG_RANDOM_UUID
+#define PARTS_DEFAULT \
+   "uuid_disk=${uuid_gpt_disk};" \
+   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
+   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
+
 /* First try to boot from SD (index 0), then eMMC (index 1 */
 #define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
@@ -97,6 +106,7 @@
  * so limit the fdt reallocation to that */
 #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x7fff\0" \
+   "partitions=" PARTS_DEFAULT \
ENV_MEM_LAYOUT_SETTINGS \
BOOTENV
 #endif
-- 
1.9.1

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[U-Boot] [PATCH 2/4] rockchip: rename board.c to rk3288-board.c

[Jacob Chen]

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 arch/arm/mach-rockchip/Makefile| 2 +-
 arch/arm/mach-rockchip/{board.c => rk3288-board.c} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename arch/arm/mach-rockchip/{board.c => rk3288-board.c} (100%)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 157d42f..e31b8de 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -9,7 +9,7 @@ obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
 obj-$(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) += save_boot_param.o
 else
-obj-$(CONFIG_ROCKCHIP_RK3288) += board.o
+obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
 endif
 ifndef CONFIG_ARM64
 obj-y += rk_timer.o
diff --git a/arch/arm/mach-rockchip/board.c 
b/arch/arm/mach-rockchip/rk3288-board.c
similarity index 100%
rename from arch/arm/mach-rockchip/board.c
rename to arch/arm/mach-rockchip/rk3288-board.c
-- 
1.9.1

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[U-Boot] [PATCH 1/3] mmc: dw_mmc: change the read/write order under fifo mode

[Jacob Chen]

From: "jacob2.chen" 

The former implement have a bug.
It will cause wrong data reading sometimes.


Signed-off-by: jacob2.chen 
---

 drivers/mmc/dw_mmc.c | 32 +---
 1 file changed, 17 insertions(+), 15 deletions(-)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index afc674d..f072739 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -120,35 +120,37 @@ static int dwmci_data_transfer(struct dwmci_host *host, 
struct mmc_data *data)
 
if (host->fifo_mode && size) {
len = 0;
-   if (data->flags == MMC_DATA_READ) {
-   if ((dwmci_readl(host, DWMCI_RINTSTS) &
-DWMCI_INTMSK_RXDR)) {
+   if (data->flags == MMC_DATA_READ &&
+   (mask & DWMCI_INTMSK_RXDR)) {
+   while (size) {
len = dwmci_readl(host, DWMCI_STATUS);
len = (len >> DWMCI_FIFO_SHIFT) &
-   DWMCI_FIFO_MASK;
+   DWMCI_FIFO_MASK;
len = min(size, len);
for (i = 0; i < len; i++)
*buf++ =
-   dwmci_readl(host, DWMCI_DATA);
-   dwmci_writel(host, DWMCI_RINTSTS,
-DWMCI_INTMSK_RXDR);
+   dwmci_readl(host,
+   DWMCI_DATA);
+   size = size > len ? (size - len) : 0;
}
-   } else {
-   if ((dwmci_readl(host, DWMCI_RINTSTS) &
-DWMCI_INTMSK_TXDR)) {
+   dwmci_writel(host, DWMCI_RINTSTS,
+DWMCI_INTMSK_RXDR);
+   } else if (data->flags == MMC_DATA_WRITE &&
+  (mask & DWMCI_INTMSK_TXDR)) {
+   while (size) {
len = dwmci_readl(host, DWMCI_STATUS);
len = fifo_depth - ((len >>
-  DWMCI_FIFO_SHIFT) &
-  DWMCI_FIFO_MASK);
+DWMCI_FIFO_SHIFT) &
+   DWMCI_FIFO_MASK);
len = min(size, len);
for (i = 0; i < len; i++)
dwmci_writel(host, DWMCI_DATA,
 *buf++);
-   dwmci_writel(host, DWMCI_RINTSTS,
-DWMCI_INTMSK_TXDR);
+   size = size > len ? (size - len) : 0;
}
+   dwmci_writel(host, DWMCI_RINTSTS,
+DWMCI_INTMSK_TXDR);
}
-   size = size > len ? (size - len) : 0;
}
 
/* Data arrived correctly. */
-- 
2.7.4



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[U-Boot] [PATCH 2/3] rockchip: add usb mass storage feature support for rk3036

[Jacob Chen]

From: "jacob2.chen" 

Enable ums feature for rk3036 boards, so that we can mount the mmc
device to PC.

Signed-off-by: jacob2.chen 
---

 include/configs/rk3036_common.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 21d4683..dea4acb 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -74,6 +74,10 @@
 #define CONFIG_FASTBOOT_BUF_ADDR   CONFIG_SYS_LOAD_ADDR
 #define CONFIG_FASTBOOT_BUF_SIZE   0x0800
 
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_CMD_USB_MASS_STORAGE
+
 #define CONFIG_USB_GADGET_DOWNLOAD
 #define CONFIG_G_DNL_MANUFACTURER  "Rockchip"
 #define CONFIG_G_DNL_VENDOR_NUM0x2207
-- 
2.7.4



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[U-Boot] [PATCH 3/3] rockchip: use rockchip linux partitions map

[Jacob Chen]

From: "jacob2.chen" 

Below link contains documents about rockchip linux partitions.
http://rockchip.wikidot.com/partitions

Signed-off-by: jacob2.chen 
---

 include/configs/kylin_rk3036.h  | 25 +
 include/configs/rk3288_common.h |  7 ++-
 2 files changed, 15 insertions(+), 17 deletions(-)

diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index e8ca76d..e08654b 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -18,7 +18,6 @@
 #undef CONFIG_ENV_IS_NOWHERE
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */
-#define CONFIG_SYS_MMC_ENV_PART0 /* user area */
 #define CONFIG_ENV_OFFSET  (SZ_4M - SZ_64K) /* reserved area */
 #define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
@@ -28,25 +27,19 @@
 #define CONFIG_RANDOM_UUID
 #define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
-   "name=loader,start=32K,size=4000K,uuid=${uuid_gpt_loader};" \
-   "name=reserved,size=64K,uuid=${uuid_gpt_reserved};" \
-   "name=misc,size=4M,uuid=${uuid_gpt_misc};" \
-   "name=recovery,size=32M,uuid=${uuid_gpt_recovery};" \
-   "name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
-   "name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \
-   "name=system_a,size=818M,uuid=${uuid_gpt_system_a};" \
-   "name=system_b,size=818M,uuid=${uuid_gpt_system_b};" \
-   "name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
-   "name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
-   "name=cache,size=100M,uuid=${uuid_gpt_cache};" \
-   "name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
-   "name=persist,size=4M,uuid=${uuid_gpt_persist};" \
-   "name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
+   "name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
+   "name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
+   "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
+   "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
+   "name=atf,size=4M,uuid=${uuid_gpt_atf};" \
+   "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \
+   "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
 
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS \
"partitions=" PARTS_DEFAULT \
-
+   ENV_MEM_LAYOUT_SETTINGS \
+   BOOTENV
 #endif
 
 #define CONFIG_BOARD_LATE_INIT
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index d3d4c68..cf5ab59 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -120,7 +120,12 @@
 #define CONFIG_RANDOM_UUID
 #define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
-   "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
+   "name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
+   "name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
+   "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
+   "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
+   "name=atf,size=4M,uuid=${uuid_gpt_atf};" \
+   "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \
"name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
 
 /* First try to boot from SD (index 0), then eMMC (index 1 */
-- 
2.7.4

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[U-Boot] [PATCH v1] rockchip: rk3288-firefly: enable boot from eMMC

[Jacob Chen]

Add eMMC dt node and define fallback boot devices.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 arch/arm/dts/rk3288-firefly.dts   | 4 
 board/firefly/firefly-rk3288/firefly-rk3288.c | 8 
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/dts/rk3288-firefly.dts b/arch/arm/dts/rk3288-firefly.dts
index 3176d50..b54359e 100644
--- a/arch/arm/dts/rk3288-firefly.dts
+++ b/arch/arm/dts/rk3288-firefly.dts
@@ -67,6 +67,10 @@
u-boot,dm-pre-reloc;
 };
 
+ {
+   u-boot,dm-pre-reloc;
+};
+
  {
u-boot,dm-pre-reloc;
 };
diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c 
b/board/firefly/firefly-rk3288/firefly-rk3288.c
index 5119e95..3e89389 100644
--- a/board/firefly/firefly-rk3288/firefly-rk3288.c
+++ b/board/firefly/firefly-rk3288/firefly-rk3288.c
@@ -5,3 +5,11 @@
  */
 
 #include 
+#include 
+
+void board_boot_order(u32 *spl_boot_list)
+{
+   /* eMMC prior to sdcard. */
+   spl_boot_list[0] = BOOT_DEVICE_MMC2;
+   spl_boot_list[1] = BOOT_DEVICE_MMC1;
+}
-- 
1.9.1

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[U-Boot] [PATCH] rockchip: rk3288-firefly: enable boot from eMMC

[Jacob Chen]

Add eMMC dt node and define fallback boot devices.

Signed-off-by: Jacob Chen <jacob2.c...@rock-chips.com>
---

 arch/arm/dts/rk3288-firefly.dts   | 5 +
 board/firefly/firefly-rk3288/firefly-rk3288.c | 8 
 2 files changed, 13 insertions(+)

diff --git a/arch/arm/dts/rk3288-firefly.dts b/arch/arm/dts/rk3288-firefly.dts
index 3176d50..27f348e 100644
--- a/arch/arm/dts/rk3288-firefly.dts
+++ b/arch/arm/dts/rk3288-firefly.dts
@@ -67,6 +67,11 @@
u-boot,dm-pre-reloc;
 };
 
+ {
+   u-boot,dm-pre-reloc;
+};
+
+
  {
u-boot,dm-pre-reloc;
 };
diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c 
b/board/firefly/firefly-rk3288/firefly-rk3288.c
index 5119e95..3e89389 100644
--- a/board/firefly/firefly-rk3288/firefly-rk3288.c
+++ b/board/firefly/firefly-rk3288/firefly-rk3288.c
@@ -5,3 +5,11 @@
  */
 
 #include 
+#include 
+
+void board_boot_order(u32 *spl_boot_list)
+{
+   /* eMMC prior to sdcard. */
+   spl_boot_list[0] = BOOT_DEVICE_MMC2;
+   spl_boot_list[1] = BOOT_DEVICE_MMC1;
+}
-- 
1.9.1

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[U-Boot] [PATCH v3 6/6] doc: dt-bindings: Describe rockchip LVDS interface

[Jacob Chen]

I didn't have a common board to enable LVDS.
So add this dcocument to help others who want to enable LVDS in their board.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Acked-by: Simon Glass <s...@chromium.org>
---

Changes in v3:
- None

Changes in v2:
- Correct file
- Change description since the using of bingding file

 doc/device-tree-bindings/video/rockchip-lvds.txt | 77 
 1 file changed, 77 insertions(+)
 create mode 100644 doc/device-tree-bindings/video/rockchip-lvds.txt

diff --git a/doc/device-tree-bindings/video/rockchip-lvds.txt 
b/doc/device-tree-bindings/video/rockchip-lvds.txt
new file mode 100644
index 000..07e3d3f
--- /dev/null
+++ b/doc/device-tree-bindings/video/rockchip-lvds.txt
@@ -0,0 +1,77 @@
+Rockchip LVDS interface
+--
+
+Required properties:
+- compatible: "rockchip,rk3288-lvds";
+
+- reg: physical base address of the controller and length
+   of memory mapped region.
+- clocks: must include clock specifiers corresponding to entries in the
+   clock-names property.
+- clock-names: must contain "pclk_lvds"
+
+- rockchip,grf: phandle to the general register files syscon
+
+- rockchip,data-mapping: should be  or  ,
+   This describes how the color bits are laid out in the
+   serialized LVDS signal.
+- rockchip,data-width : should be <18> or <24>;
+- rockchip,output: should be ,  or
+   , This describes the output face.
+
+- display-timings : described by
+   doc/devicetree/device-tree-bindings/video/display-timing.txt.
+
+Example:
+   lvds: lvds@ff96c000 {
+   compatible = "rockchip,rk3288-lvds";
+   reg = <0xff96c000 0x4000>;
+   clocks = < PCLK_LVDS_PHY>;
+   clock-names = "pclk_lvds";
+   pinctrl-names = "default";
+   pinctrl-0 = <_ctl>;
+   rockchip,grf = <>;
+   status = "disabled";
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   lvds_in: port@0 {
+   reg = <0>;
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   lvds_in_vopb: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = <_out_lvds>;
+   };
+   lvds_in_vopl: endpoint@1 {
+   reg = <1>;
+   remote-endpoint = <_out_lvds>;
+   };
+   };
+   };
+   };
+
+{
+   rockchip,data-mapping = ;
+   rockchip,data-width = <24>;
+   rockchip,output = ;
+   rockchip,panel = <>;
+   status = "okay";
+
+   display-timings {
+   timing@0 {
+   clock-frequency = <4000>;
+   hactive = <1920>;
+   vactive = <1080>;
+   hsync-len = <44>;
+   hfront-porch = <88>;
+   hback-porch = <148>;
+   vfront-porch = <4>;
+   vback-porch = <36>;
+   vsync-len = <5>;
+   };
+   };
+   };
-- 
1.9.1

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[U-Boot] [PATCH v3 2/6] rockchip: Add a binding file for rk3288 video

[Jacob Chen]

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Acked-by: Simon Glass <s...@chromium.org>
---

Changes in v3:
- Move dts change to another patch

Changes in v2:
- New

 include/dt-bindings/video/rk3288.h | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 include/dt-bindings/video/rk3288.h

diff --git a/include/dt-bindings/video/rk3288.h 
b/include/dt-bindings/video/rk3288.h
new file mode 100644
index 000..7bfd247
--- /dev/null
+++ b/include/dt-bindings/video/rk3288.h
@@ -0,0 +1,11 @@
+#ifndef __DT_BINDINGS_VIDEO_RK3288_H__
+#define __DT_BINDINGS_VIDEO_RK3288_H__
+
+#define LVDS_OUTPUT_RGB 0
+#define LVDS_OUTPUT_SINGLE  1
+#define LVDS_OUTPUT_DUAL2
+
+#define LVDS_FORMAT_VESA0
+#define LVDS_FORMAT_JEIDA   1
+
+#endif
-- 
1.9.1

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[U-Boot] [PATCH v3 5/6] rockchip: video: Add LVDS support in vop driver

[Jacob Chen]

LVDS have a different display out mode, add code to get right flag.

The vop_ip decied  display device and the remote_vop_id decied which vop was 
being used.
So we should use  the remote_vop_id to set DCLK_VOP.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Acked-by: Simon Glass <s...@chromium.org>
---

Changes in v3:
- None

Changes in v2:
- None

 arch/arm/include/asm/arch-rockchip/vop_rk3288.h |  1 +
 drivers/video/rockchip/rk_vop.c | 16 ++--
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h 
b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index 0104ba3..0ce3d67 100644
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -89,6 +89,7 @@ enum {
 enum vop_modes {
VOP_MODE_EDP = 0,
VOP_MODE_HDMI,
+   VOP_MODE_LVDS,
VOP_MODE_NONE,
VOP_MODE_AUTO_DETECT,
VOP_MODE_UNKNOWN,
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index adbc68f..a54af17 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -102,6 +102,7 @@ void rkvop_mode_set(struct rk3288_vop *regs,
u32 hfront_porch = edid->hfront_porch.typ;
u32 vfront_porch = edid->vfront_porch.typ;
uint flags;
+   int mode_flags;
 
switch (mode) {
case VOP_MODE_HDMI:
@@ -113,9 +114,20 @@ void rkvop_mode_set(struct rk3288_vop *regs,
clrsetbits_le32(>sys_ctrl, M_ALL_OUT_EN,
V_EDP_OUT_EN(1));
break;
+   case VOP_MODE_LVDS:
+   clrsetbits_le32(>sys_ctrl, M_ALL_OUT_EN,
+   V_RGB_OUT_EN(1));
+   break;
}
 
-   flags = V_DSP_OUT_MODE(15) |
+   if (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)
+   /* RGBaaa */
+   mode_flags = 15;
+   else
+   /* RGB888 */
+   mode_flags = 0;
+
+   flags = V_DSP_OUT_MODE(mode_flags) |
V_DSP_HSYNC_POL(!!(edid->flags & DISPLAY_FLAGS_HSYNC_HIGH)) |
V_DSP_VSYNC_POL(!!(edid->flags & DISPLAY_FLAGS_VSYNC_HIGH));
 
@@ -227,7 +239,7 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
 
ret = rkclk_get_clk(CLK_NEW, );
if (!ret) {
-   ret = clk_set_periph_rate(clk, DCLK_VOP0 + vop_id,
+   ret = clk_set_periph_rate(clk, DCLK_VOP0 + remote_vop_id,
  timing.pixelclock.typ);
}
if (ret) {
-- 
1.9.1

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[U-Boot] [PATCH v3 1/6] dm: video: Add a operation to display uclass

[Jacob Chen]

The current display class only allow to get timing from edid.
So add a operation to get timing directly from driver.
In driver, I will use fdtdec_decode_display_timing to get timing.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Acked-by: Simon Glass <s...@chromium.org>
---

Changes in v3:
- None

Changes in v2:
- None

 drivers/video/display-uclass.c |  3 +++
 include/display.h  | 11 ++-
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/video/display-uclass.c b/drivers/video/display-uclass.c
index 31522ea..e4763de 100644
--- a/drivers/video/display-uclass.c
+++ b/drivers/video/display-uclass.c
@@ -36,6 +36,9 @@ int display_read_timing(struct udevice *dev, struct 
display_timing *timing)
u8 buf[EDID_EXT_SIZE];
int ret;
 
+   if (ops && ops->read_timing)
+   return ops->read_timing(dev, timing);
+
if (!ops || !ops->read_edid)
return -ENOSYS;
ret = ops->read_edid(dev, buf, sizeof(buf));
diff --git a/include/display.h b/include/display.h
index c180e76..b1c4766 100644
--- a/include/display.h
+++ b/include/display.h
@@ -23,7 +23,7 @@ struct display_plat {
 };
 
 /**
- * display_read_timing() - Read timing information from EDID
+ * display_read_timing() - Read timing information
  *
  * @dev:   Device to read from
  * @return 0 if OK, -ve on error
@@ -43,6 +43,15 @@ int display_enable(struct udevice *dev, int panel_bpp,
 
 struct dm_display_ops {
/**
+* read_timing() - Read information directly
+*
+* @dev:Device to read from
+* @timing: Display timings
+* @return 0 if OK, -ve on error
+*/
+   int (*read_timing)(struct udevice *dev, struct display_timing *timing);
+
+   /**
 * read_edid() - Read information from EDID
 *
 * @dev:Device to read from
-- 
1.9.1

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[U-Boot] [PATCH v3 4/6] rockchip: dts: Add LVDS support

[Jacob Chen]

Add these node to be used in rockchip LVDS and VOP driver.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Acked-by: Simon Glass <s...@chromium.org>
---

Changes in v3:
- Include bingding file in dts

Changes in v2:
- None

 arch/arm/dts/rk3288.dtsi | 47 ++-
 1 file changed, 46 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index e51c75c..3dab0fc 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "skeleton.dtsi"
 
 / {
@@ -683,6 +684,10 @@
reg = <1>;
remote-endpoint = <_in_vopb>;
};
+   vopb_out_lvds: endpoint@2 {
+   reg = <2>;
+   remote-endpoint = <_in_vopb>;
+   };
};
};
 
@@ -719,7 +724,10 @@
reg = <1>;
remote-endpoint = <_in_vopl>;
};
-
+   vopl_out_lvds: endpoint@2 {
+   reg = <2>;
+   remote-endpoint = <_in_vopl>;
+   };
};
};
 
@@ -786,6 +794,34 @@
};
};
 
+   lvds: lvds@ff96c000 {
+   compatible = "rockchip,rk3288-lvds";
+   reg = <0xff96c000 0x4000>;
+   clocks = < PCLK_LVDS_PHY>;
+   clock-names = "pclk_lvds";
+   pinctrl-names = "default";
+   pinctrl-0 = <_ctl>;
+   rockchip,grf = <>;
+   status = "disabled";
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   lvds_in: port@0 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   lvds_in_vopb: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = <_out_lvds>;
+   };
+   lvds_in_vopl: endpoint@1 {
+   reg = <1>;
+   remote-endpoint = <_out_lvds>;
+   };
+   };
+   };
+   };
+
hdmi_audio: hdmi_audio {
compatible = "rockchip,rk3288-hdmi-audio";
i2s-controller = <>;
@@ -1109,6 +1145,15 @@
};
};
 
+   lcdc0 {
+   lcdc0_ctl: lcdc0-ctl {
+   rockchip,pins = <1 24 RK_FUNC_1 
_pull_none>,
+   <1 25 RK_FUNC_1 
_pull_none>,
+   <1 26 RK_FUNC_1 
_pull_none>,
+   <1 27 RK_FUNC_1 
_pull_none>;
+   };
+   };
+
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 
_pull_none>;
-- 
1.9.1

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[U-Boot] [PATCH v2 1/3] Add a binding file for rockchip video

[Jacob Chen]

and include it in rk3288 device tree

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

 arch/arm/dts/rk3288.dtsi   |  1 +
 include/dt-bindings/video/rk3288.h | 11 +++
 2 files changed, 12 insertions(+)
 create mode 100644 include/dt-bindings/video/rk3288.h

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index ba29b38..3dab0fc 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "skeleton.dtsi"
 
 / {
diff --git a/include/dt-bindings/video/rk3288.h 
b/include/dt-bindings/video/rk3288.h
new file mode 100644
index 000..7bfd247
--- /dev/null
+++ b/include/dt-bindings/video/rk3288.h
@@ -0,0 +1,11 @@
+#ifndef __DT_BINDINGS_VIDEO_RK3288_H__
+#define __DT_BINDINGS_VIDEO_RK3288_H__
+
+#define LVDS_OUTPUT_RGB 0
+#define LVDS_OUTPUT_SINGLE  1
+#define LVDS_OUTPUT_DUAL2
+
+#define LVDS_FORMAT_VESA0
+#define LVDS_FORMAT_JEIDA   1
+
+#endif
-- 
2.3.5

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[U-Boot] [PATCH v2 2/3] rockchip: video: Add a display driver for rockchip LVDS

[Jacob Chen]

Some Rockchip SoCs support LVDS output. Add a display driver for this so
that these displays can be used on supported boards.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
---

 arch/arm/include/asm/arch-rockchip/lvds_rk3288.h |  97 +
 drivers/video/rockchip/Makefile  |   2 +-
 drivers/video/rockchip/rk_lvds.c | 254 +++
 3 files changed, 352 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
 create mode 100644 drivers/video/rockchip/rk_lvds.c

diff --git a/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h 
b/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
new file mode 100644
index 000..121a898
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright 2016 Rockchip Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_LVDS_RK3288_H
+#define _ASM_ARCH_LVDS_RK3288_H
+
+#define RK3288_LVDS_CH0_REG0   0x00
+#define RK3288_LVDS_CH0_REG0_LVDS_EN   BIT(7)
+#define RK3288_LVDS_CH0_REG0_TTL_ENBIT(6)
+#define RK3288_LVDS_CH0_REG0_LANECK_EN BIT(5)
+#define RK3288_LVDS_CH0_REG0_LANE4_EN  BIT(4)
+#define RK3288_LVDS_CH0_REG0_LANE3_EN  BIT(3)
+#define RK3288_LVDS_CH0_REG0_LANE2_EN  BIT(2)
+#define RK3288_LVDS_CH0_REG0_LANE1_EN  BIT(1)
+#define RK3288_LVDS_CH0_REG0_LANE0_EN  BIT(0)
+
+#define RK3288_LVDS_CH0_REG1   0x04
+#define RK3288_LVDS_CH0_REG1_LANECK_BIAS   BIT(5)
+#define RK3288_LVDS_CH0_REG1_LANE4_BIASBIT(4)
+#define RK3288_LVDS_CH0_REG1_LANE3_BIASBIT(3)
+#define RK3288_LVDS_CH0_REG1_LANE2_BIASBIT(2)
+#define RK3288_LVDS_CH0_REG1_LANE1_BIASBIT(1)
+#define RK3288_LVDS_CH0_REG1_LANE0_BIASBIT(0)
+
+#define RK3288_LVDS_CH0_REG2   0x08
+#define RK3288_LVDS_CH0_REG2_RESERVE_ONBIT(7)
+#define RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE  BIT(6)
+#define RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE   BIT(5)
+#define RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE   BIT(4)
+#define RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE   BIT(3)
+#define RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE   BIT(2)
+#define RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE   BIT(1)
+#define RK3288_LVDS_CH0_REG2_PLL_FBDIV8BIT(0)
+
+#define RK3288_LVDS_CH0_REG3   0x0c
+#define RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK0xff
+
+#define RK3288_LVDS_CH0_REG4   0x10
+#define RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE   BIT(5)
+#define RK3288_LVDS_CH0_REG4_LANE4_TTL_MODEBIT(4)
+#define RK3288_LVDS_CH0_REG4_LANE3_TTL_MODEBIT(3)
+#define RK3288_LVDS_CH0_REG4_LANE2_TTL_MODEBIT(2)
+#define RK3288_LVDS_CH0_REG4_LANE1_TTL_MODEBIT(1)
+#define RK3288_LVDS_CH0_REG4_LANE0_TTL_MODEBIT(0)
+
+#define RK3288_LVDS_CH0_REG5   0x14
+#define RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA   BIT(5)
+#define RK3288_LVDS_CH0_REG5_LANE4_TTL_DATABIT(4)
+#define RK3288_LVDS_CH0_REG5_LANE3_TTL_DATABIT(3)
+#define RK3288_LVDS_CH0_REG5_LANE2_TTL_DATABIT(2)
+#define RK3288_LVDS_CH0_REG5_LANE1_TTL_DATABIT(1)
+#define RK3288_LVDS_CH0_REG5_LANE0_TTL_DATABIT(0)
+
+#define RK3288_LVDS_CFG_REGC   0x30
+#define RK3288_LVDS_CFG_REGC_PLL_ENABLE0x00
+#define RK3288_LVDS_CFG_REGC_PLL_DISABLE   0xff
+
+#define RK3288_LVDS_CH0_REGD   0x34
+#define RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK   0x1f
+
+#define RK3288_LVDS_CH0_REG20  0x80
+#define RK3288_LVDS_CH0_REG20_MSB  0x45
+#define RK3288_LVDS_CH0_REG20_LSB  0x44
+
+#define RK3288_LVDS_CFG_REG21  0x84
+#define RK3288_LVDS_CFG_REG21_TX_ENABLE0x92
+#define RK3288_LVDS_CFG_REG21_TX_DISABLE   0x00
+
+/* fbdiv value is split over 2 registers, with bit8 in reg2 */
+#define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \
+   (_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0)
+#define RK3288_LVDS_PLL_FBDIV_REG3(_fbd) \
+   (_fbd & RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK)
+#define RK3288_LVDS_PLL_PREDIV_REGD(_pd) \
+   (_pd & RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK)
+
+#define RK3288_LVDS_SOC_CON6_SEL_VOP_LIT   BIT(3)
+
+#define LVDS_FMT_MASK  (7 << 16)
+#define LVDS_MSB   (1 << 3)
+#define LVDS_DUAL  (1 << 4)
+#define LVDS_FMT_1 (1 << 5)
+#define LVDS_TTL_EN(1 << 6)
+#define LVDS_START_PHASE_RST_1 (1 << 7)
+#define LVDS_DCLK_INV  (1 << 8)
+#define LVDS_CH0_EN(1 << 11)
+#define LVDS_CH1_EN(1 << 12)
+#define LVDS_PWRDN (1 << 15)
+
+#define LVDS_24BIT (0 << 1)
+#define LVDS_18BIT (1 << 1)

[U-Boot] [PATCH v2 0/3] Add LVDS support for rk3288

[Jacob Chen]

This series patches add LVDS support for rk3288.


Jacob Chen (3):
  Add a bingding file for rockchip video
  rockchip: video: Add a display driver for rockchip LVDS
  doc: dt-bindings: Describe rockchip LVDS interface

 arch/arm/dts/rk3288.dtsi |   1 +
 arch/arm/include/asm/arch-rockchip/lvds_rk3288.h |  97 +
 doc/device-tree-bindings/video/rockchip-lvds.txt |  77 +++
 drivers/video/rockchip/Makefile  |   2 +-
 drivers/video/rockchip/rk_lvds.c | 254 +++
 include/dt-bindings/video/rk3288.h   |  11 +
 6 files changed, 441 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
 create mode 100644 doc/device-tree-bindings/video/rockchip-lvds.txt
 create mode 100644 drivers/video/rockchip/rk_lvds.c
 create mode 100644 include/dt-bindings/video/rk3288.h

-- 
2.3.5

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[U-Boot] [PATCH 4/5] rockchip: video: Add LVDS support in vop driver

[Jacob Chen]

LVDS have a different display out mode, add code to get right flag.

The vop_ip decied  display device and the remote_vop_id decied which vop was 
being used.
So we should use  the remote_vop_id to set DCLK_VOP.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Signed-off-by: jacob <jacob-c...@iotwrt.com>
---

 arch/arm/include/asm/arch-rockchip/vop_rk3288.h |  1 +
 drivers/video/rockchip/rk_vop.c | 16 ++--
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h 
b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index 0104ba3..0ce3d67 100644
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -89,6 +89,7 @@ enum {
 enum vop_modes {
VOP_MODE_EDP = 0,
VOP_MODE_HDMI,
+   VOP_MODE_LVDS,
VOP_MODE_NONE,
VOP_MODE_AUTO_DETECT,
VOP_MODE_UNKNOWN,
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index adbc68f..a54af17 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -102,6 +102,7 @@ void rkvop_mode_set(struct rk3288_vop *regs,
u32 hfront_porch = edid->hfront_porch.typ;
u32 vfront_porch = edid->vfront_porch.typ;
uint flags;
+   int mode_flags;
 
switch (mode) {
case VOP_MODE_HDMI:
@@ -113,9 +114,20 @@ void rkvop_mode_set(struct rk3288_vop *regs,
clrsetbits_le32(>sys_ctrl, M_ALL_OUT_EN,
V_EDP_OUT_EN(1));
break;
+   case VOP_MODE_LVDS:
+   clrsetbits_le32(>sys_ctrl, M_ALL_OUT_EN,
+   V_RGB_OUT_EN(1));
+   break;
}
 
-   flags = V_DSP_OUT_MODE(15) |
+   if (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)
+   /* RGBaaa */
+   mode_flags = 15;
+   else
+   /* RGB888 */
+   mode_flags = 0;
+
+   flags = V_DSP_OUT_MODE(mode_flags) |
V_DSP_HSYNC_POL(!!(edid->flags & DISPLAY_FLAGS_HSYNC_HIGH)) |
V_DSP_VSYNC_POL(!!(edid->flags & DISPLAY_FLAGS_VSYNC_HIGH));
 
@@ -227,7 +239,7 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
 
ret = rkclk_get_clk(CLK_NEW, );
if (!ret) {
-   ret = clk_set_periph_rate(clk, DCLK_VOP0 + vop_id,
+   ret = clk_set_periph_rate(clk, DCLK_VOP0 + remote_vop_id,
  timing.pixelclock.typ);
}
if (ret) {
-- 
2.3.5

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[U-Boot] [PATCH 5/5] doc: dt-bindings: Describe rockchip LVDS interface

[Jacob Chen]

I didn't have a common board to enable LVDS.
So add this dcocument to help others who want to enable LVDS in their board.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Signed-off-by: jacob <jacob-c...@iotwrt.com>
---

 doc/device-tree-bindings/video/rockchip-lvds.txt | 77 
 1 file changed, 77 insertions(+)
 create mode 100644 doc/device-tree-bindings/video/rockchip-lvds.txt

diff --git a/doc/device-tree-bindings/video/rockchip-lvds.txt 
b/doc/device-tree-bindings/video/rockchip-lvds.txt
new file mode 100644
index 000..60437f2
--- /dev/null
+++ b/doc/device-tree-bindings/video/rockchip-lvds.txt
@@ -0,0 +1,77 @@
+Rockchip LVDS interface
+--
+
+(Required properties:
+- compatible: "rockchip,rk3288-lvds";
+
+- reg: physical base address of the controller and length
+   of memory mapped region.
+- clocks: must include clock specifiers corresponding to entries in the
+   clock-names property.
+- clock-names: must contain "pclk_lvds"
+
+- rockchip,grf: phandle to the general register files syscon
+
+- rockchip,data-mapping: should be <0> for "vesa" or  <1> for "jeida",
+   This describes how the color bits are laid out in the
+   serialized LVDS signal.
+- rockchip,data-width : should be <18> or <24>;
+- rockchip,output: should be <0> for "rgb", <1> for "lvds" or <2> for 
"duallvds",
+   This describes the output face.
+
+- display-timings : described by
+   doc/devicetree/device-tree-bindings/video/display-timing.txt.
+
+Example:
+   lvds: lvds@ff96c000 {
+   compatible = "rockchip,rk3288-lvds";
+   reg = <0xff96c000 0x4000>;
+   clocks = < PCLK_LVDS_PHY>;
+   clock-names = "pclk_lvds";
+   pinctrl-names = "default";
+   pinctrl-0 = <_ctl>;
+   rockchip,grf = <>;
+   status = "disabled";
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   lvds_in: port@0 {
+   reg = <0>;
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   lvds_in_vopb: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = <_out_lvds>;
+   };
+   lvds_in_vopl: endpoint@1 {
+   reg = <1>;
+   remote-endpoint = <_out_lvds>;
+   };
+   };
+   };
+   };
+
+{
+   rockchip,data-mapping = <0>;
+   rockchip,data-width = <24>;
+   rockchip,output = <2>;
+   rockchip,panel = <>;
+   status = "okay";
+
+   display-timings {
+   timing@0 {
+   clock-frequency = <4000>;
+   hactive = <1920>;
+   vactive = <1080>;
+   hsync-len = <44>;
+   hfront-porch = <88>;
+   hback-porch = <148>;
+   vfront-porch = <4>;
+   vback-porch = <36>;
+   vsync-len = <5>;
+   };
+   };
+   };
\ No newline at end of file
-- 
2.3.5

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[U-Boot] [PATCH 3/5] rockchip: dts: Add LVDS support

[Jacob Chen]

Add these node to be used in rockchip LVDS and VOP driver.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Signed-off-by: jacob <jacob-c...@iotwrt.com>
---

 arch/arm/dts/rk3288.dtsi | 46 +-
 1 file changed, 45 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index e51c75c..ba29b38 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -683,6 +683,10 @@
reg = <1>;
remote-endpoint = <_in_vopb>;
};
+   vopb_out_lvds: endpoint@2 {
+   reg = <2>;
+   remote-endpoint = <_in_vopb>;
+   };
};
};
 
@@ -719,7 +723,10 @@
reg = <1>;
remote-endpoint = <_in_vopl>;
};
-
+   vopl_out_lvds: endpoint@2 {
+   reg = <2>;
+   remote-endpoint = <_in_vopl>;
+   };
};
};
 
@@ -786,6 +793,34 @@
};
};
 
+   lvds: lvds@ff96c000 {
+   compatible = "rockchip,rk3288-lvds";
+   reg = <0xff96c000 0x4000>;
+   clocks = < PCLK_LVDS_PHY>;
+   clock-names = "pclk_lvds";
+   pinctrl-names = "default";
+   pinctrl-0 = <_ctl>;
+   rockchip,grf = <>;
+   status = "disabled";
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   lvds_in: port@0 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   lvds_in_vopb: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = <_out_lvds>;
+   };
+   lvds_in_vopl: endpoint@1 {
+   reg = <1>;
+   remote-endpoint = <_out_lvds>;
+   };
+   };
+   };
+   };
+
hdmi_audio: hdmi_audio {
compatible = "rockchip,rk3288-hdmi-audio";
i2s-controller = <>;
@@ -1109,6 +1144,15 @@
};
};
 
+   lcdc0 {
+   lcdc0_ctl: lcdc0-ctl {
+   rockchip,pins = <1 24 RK_FUNC_1 
_pull_none>,
+   <1 25 RK_FUNC_1 
_pull_none>,
+   <1 26 RK_FUNC_1 
_pull_none>,
+   <1 27 RK_FUNC_1 
_pull_none>;
+   };
+   };
+
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 
_pull_none>;
-- 
2.3.5

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[U-Boot] [PATCH 1/5] dm: video: Add a operation to display uclass

[Jacob Chen]

The current display class only allow to get timing from edid.
So add a operation to get timing directly from driver.
In driver, I will use fdtdec_decode_display_timing to get timing.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Signed-off-by: jacob <jacob-c...@iotwrt.com>
---

 drivers/video/display-uclass.c |  3 +++
 include/display.h  | 11 ++-
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/video/display-uclass.c b/drivers/video/display-uclass.c
index 31522ea..e4763de 100644
--- a/drivers/video/display-uclass.c
+++ b/drivers/video/display-uclass.c
@@ -36,6 +36,9 @@ int display_read_timing(struct udevice *dev, struct 
display_timing *timing)
u8 buf[EDID_EXT_SIZE];
int ret;
 
+   if (ops && ops->read_timing)
+   return ops->read_timing(dev, timing);
+
if (!ops || !ops->read_edid)
return -ENOSYS;
ret = ops->read_edid(dev, buf, sizeof(buf));
diff --git a/include/display.h b/include/display.h
index c180e76..b1c4766 100644
--- a/include/display.h
+++ b/include/display.h
@@ -23,7 +23,7 @@ struct display_plat {
 };
 
 /**
- * display_read_timing() - Read timing information from EDID
+ * display_read_timing() - Read timing information
  *
  * @dev:   Device to read from
  * @return 0 if OK, -ve on error
@@ -43,6 +43,15 @@ int display_enable(struct udevice *dev, int panel_bpp,
 
 struct dm_display_ops {
/**
+* read_timing() - Read information directly
+*
+* @dev:Device to read from
+* @timing: Display timings
+* @return 0 if OK, -ve on error
+*/
+   int (*read_timing)(struct udevice *dev, struct display_timing *timing);
+
+   /**
 * read_edid() - Read information from EDID
 *
 * @dev:Device to read from
-- 
2.3.5

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[U-Boot] [PATCH 0/5] Add LVDS support for rk3288.

[Jacob Chen]

From: jacob <jacob-c...@iotwrt.com>

This series patches add LVDS support for rk3288.
I'm a newbie in submiting patches.
If there are something wrong, hope to get help.



Jacob Chen (5):
  dm: video: Add a operation to display uclass
  rockchip: video: Add a display driver for rockchip LVDS
  rockchip: dts: Add LVDS support
  rockchip: video: Add LVDS support in vop driver
  doc: dt-bindings: Describe rockchip LVDS interface

 arch/arm/dts/rk3288.dtsi |  46 -
 arch/arm/include/asm/arch-rockchip/lvds_rk3288.h |  99 +
 arch/arm/include/asm/arch-rockchip/vop_rk3288.h  |   1 +
 doc/device-tree-bindings/video/rockchip-lvds.txt |  77 +++
 drivers/video/display-uclass.c   |   3 +
 drivers/video/rockchip/Makefile  |   2 +-
 drivers/video/rockchip/rk_lvds.c | 246 +++
 drivers/video/rockchip/rk_vop.c  |  16 +-
 include/display.h|  11 +-
 9 files changed, 496 insertions(+), 5 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
 create mode 100644 doc/device-tree-bindings/video/rockchip-lvds.txt
 create mode 100644 drivers/video/rockchip/rk_lvds.c

-- 
2.3.5

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[U-Boot] [PATCH 2/5] rockchip: video: Add a display driver for rockchip LVDS

[Jacob Chen]

Some Rockchip SoCs support LVDS output. Add a display driver for this so
that these displays can be used on supported boards.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Signed-off-by: jacob <jacob-c...@iotwrt.com>
---

 arch/arm/include/asm/arch-rockchip/lvds_rk3288.h |  99 +
 drivers/video/rockchip/Makefile  |   2 +-
 drivers/video/rockchip/rk_lvds.c | 246 +++
 3 files changed, 346 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
 create mode 100644 drivers/video/rockchip/rk_lvds.c

diff --git a/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h 
b/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
new file mode 100644
index 000..de16f3d
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
@@ -0,0 +1,99 @@
+/*
+ * Copyright 2016 Rockchip Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_LVDS_RK3288_H
+#define _ASM_ARCH_LVDS_RK3288_H
+
+#define RK3288_LVDS_CH0_REG0   0x00
+#define RK3288_LVDS_CH0_REG0_LVDS_EN   BIT(7)
+#define RK3288_LVDS_CH0_REG0_TTL_ENBIT(6)
+#define RK3288_LVDS_CH0_REG0_LANECK_EN BIT(5)
+#define RK3288_LVDS_CH0_REG0_LANE4_EN  BIT(4)
+#define RK3288_LVDS_CH0_REG0_LANE3_EN  BIT(3)
+#define RK3288_LVDS_CH0_REG0_LANE2_EN  BIT(2)
+#define RK3288_LVDS_CH0_REG0_LANE1_EN  BIT(1)
+#define RK3288_LVDS_CH0_REG0_LANE0_EN  BIT(0)
+
+#define RK3288_LVDS_CH0_REG1   0x04
+#define RK3288_LVDS_CH0_REG1_LANECK_BIAS   BIT(5)
+#define RK3288_LVDS_CH0_REG1_LANE4_BIASBIT(4)
+#define RK3288_LVDS_CH0_REG1_LANE3_BIASBIT(3)
+#define RK3288_LVDS_CH0_REG1_LANE2_BIASBIT(2)
+#define RK3288_LVDS_CH0_REG1_LANE1_BIASBIT(1)
+#define RK3288_LVDS_CH0_REG1_LANE0_BIASBIT(0)
+
+#define RK3288_LVDS_CH0_REG2   0x08
+#define RK3288_LVDS_CH0_REG2_RESERVE_ONBIT(7)
+#define RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE  BIT(6)
+#define RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE   BIT(5)
+#define RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE   BIT(4)
+#define RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE   BIT(3)
+#define RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE   BIT(2)
+#define RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE   BIT(1)
+#define RK3288_LVDS_CH0_REG2_PLL_FBDIV8BIT(0)
+
+#define RK3288_LVDS_CH0_REG3   0x0c
+#define RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK0xff
+
+#define RK3288_LVDS_CH0_REG4   0x10
+#define RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE   BIT(5)
+#define RK3288_LVDS_CH0_REG4_LANE4_TTL_MODEBIT(4)
+#define RK3288_LVDS_CH0_REG4_LANE3_TTL_MODEBIT(3)
+#define RK3288_LVDS_CH0_REG4_LANE2_TTL_MODEBIT(2)
+#define RK3288_LVDS_CH0_REG4_LANE1_TTL_MODEBIT(1)
+#define RK3288_LVDS_CH0_REG4_LANE0_TTL_MODEBIT(0)
+
+#define RK3288_LVDS_CH0_REG5   0x14
+#define RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA   BIT(5)
+#define RK3288_LVDS_CH0_REG5_LANE4_TTL_DATABIT(4)
+#define RK3288_LVDS_CH0_REG5_LANE3_TTL_DATABIT(3)
+#define RK3288_LVDS_CH0_REG5_LANE2_TTL_DATABIT(2)
+#define RK3288_LVDS_CH0_REG5_LANE1_TTL_DATABIT(1)
+#define RK3288_LVDS_CH0_REG5_LANE0_TTL_DATABIT(0)
+
+#define RK3288_LVDS_CFG_REGC   0x30
+#define RK3288_LVDS_CFG_REGC_PLL_ENABLE0x00
+#define RK3288_LVDS_CFG_REGC_PLL_DISABLE   0xff
+
+#define RK3288_LVDS_CH0_REGD   0x34
+#define RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK   0x1f
+
+#define RK3288_LVDS_CH0_REG20  0x80
+#define RK3288_LVDS_CH0_REG20_MSB  0x45
+#define RK3288_LVDS_CH0_REG20_LSB  0x44
+
+#define RK3288_LVDS_CFG_REG21  0x84
+#define RK3288_LVDS_CFG_REG21_TX_ENABLE0x92
+#define RK3288_LVDS_CFG_REG21_TX_DISABLE   0x00
+
+/* fbdiv value is split over 2 registers, with bit8 in reg2 */
+#define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \
+   (_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0)
+#define RK3288_LVDS_PLL_FBDIV_REG3(_fbd) \
+   (_fbd & RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK)
+#define RK3288_LVDS_PLL_PREDIV_REGD(_pd) \
+   (_pd & RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK)
+
+#define RK3288_LVDS_SOC_CON6_SEL_VOP_LIT   BIT(3)
+
+#define LVDS_FMT_MASK  (0x07 << 16)
+#define LVDS_MSB   (0x01 << 3)
+#define LVDS_DUAL  (0x01 << 4)
+#define LVDS_FMT_1 (0x01 << 5)
+#define LVDS_TTL_EN(0x01 << 6)
+#define LVDS_START_PHASE_RST_1 (0x01 << 7)
+#define LVDS_DCLK_INV  (0x01 << 8)
+#define LVDS_CH0_EN(0x01 << 11)
+#define LVDS_CH1_EN(0x01 << 12)
+#define LVDS_PWRDN (0x01 << 15)
+
+#defi