Re: [U-Boot] NDS32 toolchain?
2018-05-28 14:45 GMT+08:00 Rick Chen : > 2018-05-14 19:16 GMT+08:00 Tom Rini : >> On Mon, May 14, 2018 at 04:31:27PM +0800, Rick Chen wrote: >>> >> > > > > Related, is there a QEMU target for nds32 that we could leverage >>> >> > > > > so that once the toolchain issue is resolved we can update >>> >> > > > > .travis.yml to run >>> >> > > tests on it? >>> >> > > > > Thanks! >>> >> > > > >>> >> > > > I am applying the QEMU offering permit. >>> >> > > > If it is ok. I will prepare it for you. >>> >> > > >>> >> > >>> >> > Because I always verify NDS32 on board (AG101P or AE3XX). >>> >> > I never verify it on NDS32 QEMU. >>> >> > It seem still have some problems, maybe need some time to debug for >>> >> > work. >>> >> > >>> >> > But the RISC-V QEMU is available noe. >>> >> > Maybe I can give it to you for trying. >>> >> >>> >> Adding riscv to the test.py + QEMU section of .travis.yml would be great! >>> >> >>> > >>> > I find it seem get qemu from upstream in .travis.yml >>> > git clone git://git.qemu.org/qemu.git >>> > But I am not sure if Andes have any schedule to push qemu to upstream. >>> > I will keep study it and try to add. >>> >>> Hi Tom >>> >>> After studing test.py and find it will clone >>> git://github.com/swarren/uboot-test-hooks.git in travis flow. >>> It seem that I shall create some files (eq conf.qemu-nx25_na) in >>> uboot-test-hooks\bin\travis-ci\ >>> May I ask how shall I submit these files into the uboot-test-hooks git repo >>> ? >> >> The usual github workflow, fork the repository and then submit a PR >> there with your changes. Thanks again! >> >> -- >> Tom > > Hi Tom > > cmchen have send 2 patch (one for riscv, one for nds32) to > uboot-test-hooks.git > > After the patch has been accepted.I can verify the trivas flow. > Then I will send patchs to support riscv and nds32 QEMU in test.py > > > > Following are the running message in my local env (not in travis flow) > > (venv) > rick@atcsqa06[/NOBACKUP/sqa3/User/rick/v5-qemu/ae250/tmp/u-boot-riscv](13:57)$ > python ./test/py/test.py --bd qemu-ax25 --build > +make > O=/NOBACKUP/sqa3/User/rick/v5-qemu/ae250/tmp/u-boot-riscv/build-qemu-ax25 > -s qemu-ax25_defconfig > +make > O=/NOBACKUP/sqa3/User/rick/v5-qemu/ae250/tmp/u-boot-riscv/build-qemu-ax25 > -s -j8 > make[1]: Warning: File '.config' has modification time 0.74 s in the future > make[2]: Warning: File 'include/config/auto.conf' has modification > time 1.1 s in the future > make[2]: warning: Clock skew detected. Your build may be incomplete. > make[1]: Warning: File 'include/autoconf.mk' has modification time > 0.63 s in the future > make[2]: Warning: File 'include/autoconf.mk' has modification time > 0.42 s in the future > make[2]: warning: Clock skew detected. Your build may be incomplete. > make[2]: Warning: File 'include/autoconf.mk' has modification time > 0.41 s in the future > make[2]: Warning: File 'include/config/auto.conf' has modification > time 0.47 s in the future > make[3]: Warning: File 'include/autoconf.mk' has modification time 0.3 > s in the future > make[2]: warning: Clock skew detected. Your build may be incomplete. > make[3]: warning: Clock skew detected. Your build may be incomplete. > make[2]: warning: Clock skew detected. Your build may be incomplete. > make[3]: Warning: File 'drivers/crypto/fsl/built-in.o' has > modification time 0.96 s in the future > make[3]: warning: Clock skew detected. Your build may be incomplete. > make[2]: Warning: File 'drivers/mmc/built-in.o' has modification time > 0.99 s in the future > make[3]: Warning: File 'arch/riscv/dts/.ae350.dtb.cmd' has > modification time 1 s in the future > make[3]: warning: Clock skew detected. Your build may be incomplete. > make[2]: warning: Clock skew detected. Your build may be incomplete. > make[2]: Warning: File 'lib/efi_selftest/built-in.o' has modification > time 0.94 s in the future > riscv64-linux-ld.bfd: > Warning: Init __global_pointer$ failed. Can not find __global_pointer$ > and .sdata section. > > make[2]: warning: Clock skew detected. Your build may be incomplete. > make[1]: warning: Clock skew detecte
Re: [U-Boot] [PATCH 1/2] net: Add option to prefer bootp/dhcp serverip
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Wednesday, June 06, 2018 8:32 PM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); Joe Hershberger; Simon Glass
> Subject: [PATCH 1/2] net: Add option to prefer bootp/dhcp serverip
>
> Currently we can choose between 2 different types of behavior for the serverip
> variable:
>
> 1) Always overwrite it with the DHCP server IP address (default)
> 2) Ignore what the DHCP server says (CONFIG_BOOTP_SERVERIP)
>
> This patch adds a 3rd option:
>
> 3) Use serverip from DHCP if no serverip is given
> (CONFIG_BOOTP_PREFER_SERVERIP)
>
> With this new option, we can have the default case that a boot file gets
> loaded
> from the DHCP provided TFTP server work while allowing users to specify their
> own serverip variable to explicitly use a different tftp server.
>
> Signed-off-by: Alexander Graf
> ---
> README | 5 +
> cmd/Kconfig | 9 +
> net/bootp.c | 7 ++-
> 3 files changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/README b/README
> index fb331f910d..d8a99281ca 100644
> --- a/README
> +++ b/README
> @@ -1511,10 +1511,15 @@ The following options need to be configured:
> CONFIG_BOOTP_TIMEOFFSET
> CONFIG_BOOTP_VENDOREX
> CONFIG_BOOTP_MAY_FAIL
> + CONFIG_BOOTP_PREFER_SERVERIP
>
> CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
> environment variable, not the BOOTP server.
>
> + CONFIG_BOOTP_PREFER_SERVERIP - TFTP server will be the
> + serverip environment variable if previously unset, otherwise
> + the DHCP provided serverip is used.
> +
> CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
> after the configured retry count, the call will fail
> instead of starting over. This can be used to fail over diff
> --git
> a/cmd/Kconfig b/cmd/Kconfig index e283cb9a8a..e77a4131b3 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -1121,6 +1121,15 @@ config BOOTP_HOSTNAME
> help
> The name may or may not be qualified with the local domain name.
>
> +config BOOTP_PREFER_SERVERIP
> + bool "Leave serverip variable in place if existing"
> + default n
> + depends on CMD_BOOTP
> + help
> + By default a BOOTP/DHCP reply will overwrite the tftp target ip
> + address. With this option enabled, it will leave it alone if
> + already specified, but populate it if no serverip is specified.
> +
> config BOOTP_SUBNETMASK
> bool "Request & store 'netmask' from BOOTP/DHCP server"
> default y
> diff --git a/net/bootp.c b/net/bootp.c
> index 9d7cb5d30c..91de4cd426 100644
> --- a/net/bootp.c
> +++ b/net/bootp.c
> @@ -147,9 +147,14 @@ static void store_net_params(struct bootp_hdr *bp)
> { #if !defined(CONFIG_BOOTP_SERVERIP)
> struct in_addr tmp_ip;
> + bool overwrite_serverip = true;
> +
> +#if defined(CONFIG_BOOTP_PREFER_SERVERIP)
> + overwrite_serverip = false;
> +#endif
>
> net_copy_ip(&tmp_ip, &bp->bp_siaddr);
> - if (tmp_ip.s_addr != 0)
> + if (tmp_ip.s_addr != 0 && (overwrite_serverip ||
> +!net_server_ip.s_addr))
> net_copy_ip(&net_server_ip, &bp->bp_siaddr);
> memcpy(net_server_ethaddr,
> ((struct ethernet_hdr *)net_rx_packet)->et_src, 6);
> --
> 2.12.3
Hi Alex
I have apply those two patchs and verify
U-Boot-1-2-net-Add-option-to-prefer-bootp-dhcp-serverip.patch
U-Boot-2-2-ax25-Switch-to-CONFIG_BOOTP_PREFER_SERVERIP.patch
But it still fail in dhcp command as below
case 1
serverip is null
RISC-V # set serverip
RISC-V # env print
baudrate=38400
bootcmd=fatload mmc 0:1 0x2000 ae350_64.dtb;fatload mmc 0:1 0x0
bbl-ae350.bin;go 0x0
bootdelay=3
bootfile=pxelinux.0
ethact=mac@e010
fdtcontroladdr=3fedf290
fileaddr=60
filesize=1bb7d34
stderr=serial@f030
stdin=serial@f030
stdout=serial@f030
Environment size: 304/8188 bytes
RISC-V # dhcp 0x60 10.0.4.97:boomimage-310y-ag101p.bin
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
DHCP client bound to address 10.0.4.191 (4603 ms)
Using mac@e010 device
TFTP from server 255.255.255.255; our IP address is 10.0.4.191;
sending through gateway 10.0.4.254
Filename 'pxelinux.0'.
Load address: 0x60
Loading: *
TFTP error: 'File not found' (1)
Not retrying...
TFTP error: 'File not found' (1)
Not retrying...
case 2
serverip has value
RISC-V # setenv serverip 10.0.4.97 ;
RISC-V # dhcp 0x60 boomimage-310y-ag101p.bin
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
DHCP client bound to address 10.0.4.191 (4592 ms)
Using mac@e010 device
TFTP from server 10.0.4.97; our IP address is 10.0.4.191
Filename 'pxelinux.0'.
Load address: 0x60
Loading: *
TFTP error: 'File not found' (1)
Not retrying...
TFTP error: 'File not found' (1)
Not retrying...
RISC-V #
Rick
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Re: [U-Boot] [PATCH] ax25: Remove CONFIG_BOOTP_SERVERIP
> From: Alexander Graf [mailto:ag...@suse.de] > Sent: Wednesday, June 06, 2018 1:21 AM > To: u-boot@lists.denx.de > Cc: Rick Jian-Zhi Chen(陳建志) > Subject: [PATCH] ax25: Remove CONFIG_BOOTP_SERVERIP > > The config variable CONFIG_BOOTP_SERVERIP indicates on DHCP-TFTP fetches > that the serverip variable is supposed to be used rather than the IP of the > DHCP > server that replied. > > Given that in the default environment no serverip is provided, that option > does > not make a lot of sense and instead breaks the default dhcp boot flow. > > Let's just remove it. > > Signed-off-by: Alexander Graf > --- > include/configs/ax25-ae350.h | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index > b1ca5ac11a..b230896734 100644 > --- a/include/configs/ax25-ae350.h > +++ b/include/configs/ax25-ae350.h > @@ -11,7 +11,6 @@ > * CPU and Board Configuration Options > */ > #define CONFIG_BOOTP_SEND_HOSTNAME > -#define CONFIG_BOOTP_SERVERIP > > /* > * Miscellaneous configurable options > -- > 2.12.3 Hi Alex I have try to remove CONFIG_BOOTP_SERVERIP and verify dhcp command. But it always fail in my test as below: RISC-V # env print baudrate=38400 bootdelay=3 ethact=mac@e010 fdtcontroladdr=3fedf290 fileaddr=60 filesize=1bb7d34 serverip=10.0.4.97 stderr=serial@f030 stdin=serial@f030 stdout=serial@f030 Environment size: 303/8188 bytes case 1 RISC-V # dhcp 0x60 boomimage-310y-ag101p.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.185 (4641 ms) Using mac@e010 device TFTP from server 255.255.255.255; our IP address is 10.0.4.185; sending through gateway 10.0.4.254 Filename 'pxelinux.0'. Load address: 0x60 Loading: * TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... case 2 RISC-V # dhcp 0x60 10.0.4.97:boomimage-310y-ag101p.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.185 (4591 ms) Using mac@e010 device TFTP from server 255.255.255.255; our IP address is 10.0.4.185; sending through gateway 10.0.4.254 Filename 'pxelinux.0'. Load address: 0x60 Loading: * TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... TFTP error: 'File not found' (1) Not retrying... RISC-V # But it pass with CONFIG_BOOTP_SERVERIP RISC-V # env print baudrate=38400 bootcmd=fatload mmc 0:1 0x2000 ae350_64.dtb;fatload mmc 0:1 0x0 bbl-ae350.bin;go 0x0 bootdelay=3 fdtcontroladdr=3fedf290 fileaddr=60 filesize=1bb7d34 stderr=serial@f030 stdin=serial@f030 stdout=serial@f030 Environment size: 260/8188 bytes RISC-V # dhcp 0x60 10.0.4.97:boomimage-310y-ag101p.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.180 (4592 ms) Using mac@e010 device TFTP from server 10.0.4.97; our IP address is 10.0.4.180 Filename 'boomimage-310y-ag101p.bin'. Load address: 0x60 Loading: ## Abort RISC-V # Rick ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] riscv: Add support for HI20 PE relocations
2018-06-06 17:18 GMT+08:00 Alexander Graf :
>
>
> On 06.06.18 11:15, Rick Chen wrote:
>>> -Original Message-
>>> From: Alexander Graf [mailto:ag...@suse.de]
>>> Sent: Wednesday, June 06, 2018 1:21 AM
>>> To: u-boot@lists.denx.de
>>> Cc: Rick Jian-Zhi Chen(陳建志)
>>> Subject: [PATCH] riscv: Add support for HI20 PE relocations
>>>
>>> The PE standard allows for HI20/LOW12 relocations. Within the efi_loader
>>> target
>>> we always know that our relocation target is 4k aligned, so we don't need to
>>> worry about the LOW12 part.
>>>
>>> This patch adds support for the respective relocations. With this and a few
>>> grub
>>> patches I have cooking in parallel I'm able to run grub on RISC-V.
>>>
>>> Signed-off-by: Alexander Graf
>>> ---
>>> include/pe.h | 3 +++
>>> lib/efi_loader/efi_image_loader.c | 14 ++
>>> 2 files changed, 17 insertions(+)
>>>
>>> diff --git a/include/pe.h b/include/pe.h index d73eb142cb..36e1908b7e 100644
>>> --- a/include/pe.h
>>> +++ b/include/pe.h
>>> @@ -201,10 +201,13 @@ typedef struct _IMAGE_RELOCATION
>>> #define IMAGE_REL_BASED_MIPS_JMPADDR5
>>> #define IMAGE_REL_BASED_ARM_MOV32A 5 /* yes, 5 too */
>>> #define IMAGE_REL_BASED_ARM_MOV32 5 /* yes, 5 too */
>>> +#define IMAGE_REL_BASED_RISCV_HI20 5 /* yes, 5 too */
>>> #define IMAGE_REL_BASED_SECTION 6
>>> #define IMAGE_REL_BASED_REL 7
>>> #define IMAGE_REL_BASED_ARM_MOV32T 7 /* yes, 7 too */
>>> #define IMAGE_REL_BASED_THUMB_MOV32 7 /* yes, 7 too */
>>> +#define IMAGE_REL_BASED_RISCV_LOW12I 7 /* yes, 7 too */
>>> +#define IMAGE_REL_BASED_RISCV_LOW12S 8
>>> #define IMAGE_REL_BASED_MIPS_JMPADDR16 9
>>> #define IMAGE_REL_BASED_IA64_IMM64 9 /* yes, 9 too */
>>> #define IMAGE_REL_BASED_DIR64 10
>>> diff --git a/lib/efi_loader/efi_image_loader.c
>>> b/lib/efi_loader/efi_image_loader.c
>>> index 3cffe9ef46..6892171ccd 100644
>>> --- a/lib/efi_loader/efi_image_loader.c
>>> +++ b/lib/efi_loader/efi_image_loader.c
>>> @@ -126,6 +126,20 @@ static efi_status_t efi_loader_relocate(const
>>> IMAGE_BASE_RELOCATION *rel,
>>> case IMAGE_REL_BASED_DIR64:
>>> *x64 += (uint64_t)delta;
>>> break;
>>> +#ifdef __riscv
>>> + case IMAGE_REL_BASED_RISCV_HI20:
>>> + *x32 = ((*x32 & 0xf000) +
>>> (uint32_t)delta) |
>>> + (*x32 & 0x0fff);
>>> + break;
>>> + case IMAGE_REL_BASED_RISCV_LOW12I:
>>> + case IMAGE_REL_BASED_RISCV_LOW12S:
>>> + /* We know that we're 4k aligned */
>>> + if (delta & 0xfff) {
>>> + printf("Unsupported reloc offset\n");
>>> + return EFI_LOAD_ERROR;
>>> + }
>>> + break;
>>> +#endif
>>> default:
>>> printf("Unknown Relocation off %x type %x\n",
>>> offset, type);
>>> --
>>> 2.12.3
>>
>> Hi Alex
>>
>> The title of this patch seems to be as" efi_loader: Add support for
>> HI20 PE relocations for RISC-V "
>> And I am not sure if it shall belong to efi tree.
>
> I'll be happy to take it via the efi tree, yes. It only affects the efi
> PE loader.
>
>
Hi Alex
Thanks a lot. :)
Rick
> Alex
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Re: [U-Boot] [PATCH] riscv: Add support for HI20 PE relocations
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Wednesday, June 06, 2018 1:21 AM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志)
> Subject: [PATCH] riscv: Add support for HI20 PE relocations
>
> The PE standard allows for HI20/LOW12 relocations. Within the efi_loader
> target
> we always know that our relocation target is 4k aligned, so we don't need to
> worry about the LOW12 part.
>
> This patch adds support for the respective relocations. With this and a few
> grub
> patches I have cooking in parallel I'm able to run grub on RISC-V.
>
> Signed-off-by: Alexander Graf
> ---
> include/pe.h | 3 +++
> lib/efi_loader/efi_image_loader.c | 14 ++
> 2 files changed, 17 insertions(+)
>
> diff --git a/include/pe.h b/include/pe.h index d73eb142cb..36e1908b7e 100644
> --- a/include/pe.h
> +++ b/include/pe.h
> @@ -201,10 +201,13 @@ typedef struct _IMAGE_RELOCATION
> #define IMAGE_REL_BASED_MIPS_JMPADDR5
> #define IMAGE_REL_BASED_ARM_MOV32A 5 /* yes, 5 too */
> #define IMAGE_REL_BASED_ARM_MOV32 5 /* yes, 5 too */
> +#define IMAGE_REL_BASED_RISCV_HI20 5 /* yes, 5 too */
> #define IMAGE_REL_BASED_SECTION 6
> #define IMAGE_REL_BASED_REL 7
> #define IMAGE_REL_BASED_ARM_MOV32T 7 /* yes, 7 too */
> #define IMAGE_REL_BASED_THUMB_MOV32 7 /* yes, 7 too */
> +#define IMAGE_REL_BASED_RISCV_LOW12I 7 /* yes, 7 too */
> +#define IMAGE_REL_BASED_RISCV_LOW12S 8
> #define IMAGE_REL_BASED_MIPS_JMPADDR16 9
> #define IMAGE_REL_BASED_IA64_IMM64 9 /* yes, 9 too */
> #define IMAGE_REL_BASED_DIR64 10
> diff --git a/lib/efi_loader/efi_image_loader.c
> b/lib/efi_loader/efi_image_loader.c
> index 3cffe9ef46..6892171ccd 100644
> --- a/lib/efi_loader/efi_image_loader.c
> +++ b/lib/efi_loader/efi_image_loader.c
> @@ -126,6 +126,20 @@ static efi_status_t efi_loader_relocate(const
> IMAGE_BASE_RELOCATION *rel,
> case IMAGE_REL_BASED_DIR64:
> *x64 += (uint64_t)delta;
> break;
> +#ifdef __riscv
> + case IMAGE_REL_BASED_RISCV_HI20:
> + *x32 = ((*x32 & 0xf000) + (uint32_t)delta) |
> + (*x32 & 0x0fff);
> + break;
> + case IMAGE_REL_BASED_RISCV_LOW12I:
> + case IMAGE_REL_BASED_RISCV_LOW12S:
> + /* We know that we're 4k aligned */
> + if (delta & 0xfff) {
> + printf("Unsupported reloc offset\n");
> + return EFI_LOAD_ERROR;
> + }
> + break;
> +#endif
> default:
> printf("Unknown Relocation off %x type %x\n",
> offset, type);
> --
> 2.12.3
Hi Alex
The title of this patch seems to be as" efi_loader: Add support for
HI20 PE relocations for RISC-V "
And I am not sure if it shall belong to efi tree.
Rick
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Re: [U-Boot] NDS32 toolchain?
2018-05-14 19:16 GMT+08:00 Tom Rini : > On Mon, May 14, 2018 at 04:31:27PM +0800, Rick Chen wrote: >> >> > > > > Related, is there a QEMU target for nds32 that we could leverage >> >> > > > > so that once the toolchain issue is resolved we can update >> >> > > > > .travis.yml to run >> >> > > tests on it? >> >> > > > > Thanks! >> >> > > > >> >> > > > I am applying the QEMU offering permit. >> >> > > > If it is ok. I will prepare it for you. >> >> > > >> >> > >> >> > Because I always verify NDS32 on board (AG101P or AE3XX). >> >> > I never verify it on NDS32 QEMU. >> >> > It seem still have some problems, maybe need some time to debug for >> >> > work. >> >> > >> >> > But the RISC-V QEMU is available noe. >> >> > Maybe I can give it to you for trying. >> >> >> >> Adding riscv to the test.py + QEMU section of .travis.yml would be great! >> >> >> > >> > I find it seem get qemu from upstream in .travis.yml >> > git clone git://git.qemu.org/qemu.git >> > But I am not sure if Andes have any schedule to push qemu to upstream. >> > I will keep study it and try to add. >> >> Hi Tom >> >> After studing test.py and find it will clone >> git://github.com/swarren/uboot-test-hooks.git in travis flow. >> It seem that I shall create some files (eq conf.qemu-nx25_na) in >> uboot-test-hooks\bin\travis-ci\ >> May I ask how shall I submit these files into the uboot-test-hooks git repo ? > > The usual github workflow, fork the repository and then submit a PR > there with your changes. Thanks again! > > -- > Tom Hi Tom cmchen have send 2 patch (one for riscv, one for nds32) to uboot-test-hooks.git After the patch has been accepted.I can verify the trivas flow. Then I will send patchs to support riscv and nds32 QEMU in test.py Following are the running message in my local env (not in travis flow) (venv) rick@atcsqa06[/NOBACKUP/sqa3/User/rick/v5-qemu/ae250/tmp/u-boot-riscv](13:57)$ python ./test/py/test.py --bd qemu-ax25 --build +make O=/NOBACKUP/sqa3/User/rick/v5-qemu/ae250/tmp/u-boot-riscv/build-qemu-ax25 -s qemu-ax25_defconfig +make O=/NOBACKUP/sqa3/User/rick/v5-qemu/ae250/tmp/u-boot-riscv/build-qemu-ax25 -s -j8 make[1]: Warning: File '.config' has modification time 0.74 s in the future make[2]: Warning: File 'include/config/auto.conf' has modification time 1.1 s in the future make[2]: warning: Clock skew detected. Your build may be incomplete. make[1]: Warning: File 'include/autoconf.mk' has modification time 0.63 s in the future make[2]: Warning: File 'include/autoconf.mk' has modification time 0.42 s in the future make[2]: warning: Clock skew detected. Your build may be incomplete. make[2]: Warning: File 'include/autoconf.mk' has modification time 0.41 s in the future make[2]: Warning: File 'include/config/auto.conf' has modification time 0.47 s in the future make[3]: Warning: File 'include/autoconf.mk' has modification time 0.3 s in the future make[2]: warning: Clock skew detected. Your build may be incomplete. make[3]: warning: Clock skew detected. Your build may be incomplete. make[2]: warning: Clock skew detected. Your build may be incomplete. make[3]: Warning: File 'drivers/crypto/fsl/built-in.o' has modification time 0.96 s in the future make[3]: warning: Clock skew detected. Your build may be incomplete. make[2]: Warning: File 'drivers/mmc/built-in.o' has modification time 0.99 s in the future make[3]: Warning: File 'arch/riscv/dts/.ae350.dtb.cmd' has modification time 1 s in the future make[3]: warning: Clock skew detected. Your build may be incomplete. make[2]: warning: Clock skew detected. Your build may be incomplete. make[2]: Warning: File 'lib/efi_selftest/built-in.o' has modification time 0.94 s in the future riscv64-linux-ld.bfd: Warning: Init __global_pointer$ failed. Can not find __global_pointer$ and .sdata section. make[2]: warning: Clock skew detected. Your build may be incomplete. make[1]: warning: Clock skew detected. Your build may be incomplete. +u-boot-test-flash qemu-ax25 na test session starts platform linux2 -- Python 2.7.12, pytest-3.5.1, py-1.5.3, pluggy-0.6.0 rootdir: /NOBACKUP/sqa3/User/rick/v5-qemu/ae250/tmp/u-boot-riscv/test/py, inifile: pytest.ini collected 110 items test/py/tests/test_000_version.py . [ 0%] test/py/tests/test_dfu.py s
Re: [U-Boot] NDS32 toolchain?
>> > > > > Related, is there a QEMU target for nds32 that we could leverage >> > > > > so that once the toolchain issue is resolved we can update >> > > > > .travis.yml to run >> > > tests on it? >> > > > > Thanks! >> > > > >> > > > I am applying the QEMU offering permit. >> > > > If it is ok. I will prepare it for you. >> > > >> > >> > Because I always verify NDS32 on board (AG101P or AE3XX). >> > I never verify it on NDS32 QEMU. >> > It seem still have some problems, maybe need some time to debug for work. >> > >> > But the RISC-V QEMU is available noe. >> > Maybe I can give it to you for trying. >> >> Adding riscv to the test.py + QEMU section of .travis.yml would be great! >> > > I find it seem get qemu from upstream in .travis.yml > git clone git://git.qemu.org/qemu.git > But I am not sure if Andes have any schedule to push qemu to upstream. > I will keep study it and try to add. > Hi Tom After studing test.py and find it will clone git://github.com/swarren/uboot-test-hooks.git in travis flow. It seem that I shall create some files (eq conf.qemu-nx25_na) in uboot-test-hooks\bin\travis-ci\ May I ask how shall I submit these files into the uboot-test-hooks git repo ? Rick ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/8] riscv: Enable efi_loader support
2018-05-10 15:00 GMT+08:00 Rick Chen : > 2018-05-10 14:03 GMT+08:00 Alexander Graf : >> >> >> Am 10.05.2018 um 05:27 schrieb Rick Chen : >> >>>>> >>>>> Then I think if I don't want enter this auto flow, what can I do ? >>>>> >>>>> 1 Remove CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig But it >>>>> still enter auto flow. >>>>> >>>>> 2 Add #ifdef CONFIG_DISTRO_DEFAULTS to encapsulate the >>>>> CONFIG_EXTRA_ENV_SETTINGS in nx25-ae250.h And Remove >>>>> CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig And it will NOT >>>>> enter auto flow >>>>> >>>>> #ifdef CONFIG_DISTRO_DEFAULTS >>>>> /* Enable distro boot */ >>>>> #define BOOT_TARGET_DEVICES(func) \ >>>>>func(MMC, mmc, 0) \ >>>>>func(DHCP, dhcp, na) >>>>> >>>>> #include >>>>> >>>>> #define CONFIG_EXTRA_ENV_SETTINGS \ >>>>>"kernel_addr_r=0x0008\0" \ >>>>>"pxefile_addr_r=0x01f0\0" \ >>>>>"scriptaddr=0x01f0\0" \ >>>>>"fdt_addr_r=0x0200\0" \ >>>>>"ramdisk_addr_r=0x0280\0" \ >>>>>BOOTENV #endif >>>>> >>>>> 3 Add #ifdef CONFIG_DISTRO_DEFAULTS to encapsulate the >>>>> CONFIG_EXTRA_ENV_SETTINGS in nx25-ae250.h And do NOT Remove >>>>> CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig But disable >>>> CONFIG_DISTRO_DEFAULTS from make menuconfig >>>>> General setup ---> >>>>> [ ] Select defaults suitable for booting general purpose Linux >>>>> distributions And it still enter auto flow >>>>> >>>>> Offering this information for you. >>>> >>>> This is the same for all distro enabled boards. The basic idea is that >>>> U-Boot ships >>>> with something that "just boots" for simple use cases. >>>> >>>> If you want something more advanced, you usually want to put something very >>>> target specific in there anyway, such as "bootm $nor_flash". In that case, >>>> you >>>> adapt the CONFIG_BOOTCOMMAND parameter to whatever you want. >>>> >>>> The boot command can also be overridden using the environment. So if you >>>> have >>>> working environment store, you can change the U-Boot variable "bootcmd" and >>>> U-Boot will run that instead when it boots. >>>> >>>> The alternative to this default behavior would be no bootcmd at all which >>>> means >>>> you just get dropped into the U-Boot prompt. While that's reasonably >>>> useful for >>>> developers, it isn't for people deploying U-Boot on real target systems :). >>>> >>>> >>>> Alex >>> >>> Thanks for your advises. >>> >>> After you send those patchs into main trunk. >>> I will fetch and push them to u-boot-riscv.git :) >> >> The usual flow would be the other way around: You apply them to >> u-boot-riscv.git with your Signed-off-by and send a pull request for the >> current merge window :). >> >> Unless I misunderstood your earlier reply and you would prefer to have me >> propagate them to mainline via the efi-next tree? >> >> >> Alex >> > > Yes. I prefer that you propagate them to mainline via the efi-next tree. > Then you can grasp the schedule by yourself. > > When you ask "Via which tree do you want to push it? " > I misunderstood it and reply preferring to u-boot-nds32.git. > Sorry about that ~ ~ > > But maybe I need to send patch-sets to change cpu and board nane. > For example: rename nx25-ae250.h to ax25-ae350.h > > Will it affect your submitting flow ? > I am wondering how to deal with the conflicts between the different patch-sets > > Rick I just modify what I want base on your patch-sets and that will be fine. I think too complicated. :) Rick ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/8] riscv: Enable efi_loader support
2018-05-10 14:03 GMT+08:00 Alexander Graf : > > > Am 10.05.2018 um 05:27 schrieb Rick Chen : > >>>> >>>> Then I think if I don't want enter this auto flow, what can I do ? >>>> >>>> 1 Remove CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig But it >>>> still enter auto flow. >>>> >>>> 2 Add #ifdef CONFIG_DISTRO_DEFAULTS to encapsulate the >>>> CONFIG_EXTRA_ENV_SETTINGS in nx25-ae250.h And Remove >>>> CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig And it will NOT >>>> enter auto flow >>>> >>>> #ifdef CONFIG_DISTRO_DEFAULTS >>>> /* Enable distro boot */ >>>> #define BOOT_TARGET_DEVICES(func) \ >>>>func(MMC, mmc, 0) \ >>>>func(DHCP, dhcp, na) >>>> >>>> #include >>>> >>>> #define CONFIG_EXTRA_ENV_SETTINGS \ >>>>"kernel_addr_r=0x0008\0" \ >>>>"pxefile_addr_r=0x01f0\0" \ >>>>"scriptaddr=0x01f0\0" \ >>>>"fdt_addr_r=0x0200\0" \ >>>>"ramdisk_addr_r=0x0280\0" \ >>>>BOOTENV #endif >>>> >>>> 3 Add #ifdef CONFIG_DISTRO_DEFAULTS to encapsulate the >>>> CONFIG_EXTRA_ENV_SETTINGS in nx25-ae250.h And do NOT Remove >>>> CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig But disable >>> CONFIG_DISTRO_DEFAULTS from make menuconfig >>>> General setup ---> >>>> [ ] Select defaults suitable for booting general purpose Linux >>>> distributions And it still enter auto flow >>>> >>>> Offering this information for you. >>> >>> This is the same for all distro enabled boards. The basic idea is that >>> U-Boot ships >>> with something that "just boots" for simple use cases. >>> >>> If you want something more advanced, you usually want to put something very >>> target specific in there anyway, such as "bootm $nor_flash". In that case, >>> you >>> adapt the CONFIG_BOOTCOMMAND parameter to whatever you want. >>> >>> The boot command can also be overridden using the environment. So if you >>> have >>> working environment store, you can change the U-Boot variable "bootcmd" and >>> U-Boot will run that instead when it boots. >>> >>> The alternative to this default behavior would be no bootcmd at all which >>> means >>> you just get dropped into the U-Boot prompt. While that's reasonably useful >>> for >>> developers, it isn't for people deploying U-Boot on real target systems :). >>> >>> >>> Alex >> >> Thanks for your advises. >> >> After you send those patchs into main trunk. >> I will fetch and push them to u-boot-riscv.git :) > > The usual flow would be the other way around: You apply them to > u-boot-riscv.git with your Signed-off-by and send a pull request for the > current merge window :). > > Unless I misunderstood your earlier reply and you would prefer to have me > propagate them to mainline via the efi-next tree? > > > Alex > Yes. I prefer that you propagate them to mainline via the efi-next tree. Then you can grasp the schedule by yourself. When you ask "Via which tree do you want to push it? " I misunderstood it and reply preferring to u-boot-nds32.git. Sorry about that ~ ~ But maybe I need to send patch-sets to change cpu and board nane. For example: rename nx25-ae250.h to ax25-ae350.h Will it affect your submitting flow ? I am wondering how to deal with the conflicts between the different patch-sets Rick ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/8] riscv: Enable efi_loader support
> > > > Then I think if I don't want enter this auto flow, what can I do ? > > > > 1 Remove CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig But it > > still enter auto flow. > > > > 2 Add #ifdef CONFIG_DISTRO_DEFAULTS to encapsulate the > > CONFIG_EXTRA_ENV_SETTINGS in nx25-ae250.h And Remove > > CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig And it will NOT > > enter auto flow > > > > #ifdef CONFIG_DISTRO_DEFAULTS > > /* Enable distro boot */ > > #define BOOT_TARGET_DEVICES(func) \ > > func(MMC, mmc, 0) \ > > func(DHCP, dhcp, na) > > > > #include > > > > #define CONFIG_EXTRA_ENV_SETTINGS \ > > "kernel_addr_r=0x0008\0" \ > > "pxefile_addr_r=0x01f0\0" \ > > "scriptaddr=0x01f0\0" \ > > "fdt_addr_r=0x0200\0" \ > > "ramdisk_addr_r=0x0280\0" \ > > BOOTENV #endif > > > > 3 Add #ifdef CONFIG_DISTRO_DEFAULTS to encapsulate the > > CONFIG_EXTRA_ENV_SETTINGS in nx25-ae250.h And do NOT Remove > > CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig But disable > CONFIG_DISTRO_DEFAULTS from make menuconfig > >General setup ---> > > [ ] Select defaults suitable for booting general purpose Linux > > distributions And it still enter auto flow > > > > Offering this information for you. > > This is the same for all distro enabled boards. The basic idea is that U-Boot > ships > with something that "just boots" for simple use cases. > > If you want something more advanced, you usually want to put something very > target specific in there anyway, such as "bootm $nor_flash". In that case, you > adapt the CONFIG_BOOTCOMMAND parameter to whatever you want. > > The boot command can also be overridden using the environment. So if you have > working environment store, you can change the U-Boot variable "bootcmd" and > U-Boot will run that instead when it boots. > > The alternative to this default behavior would be no bootcmd at all which > means > you just get dropped into the U-Boot prompt. While that's reasonably useful > for > developers, it isn't for people deploying U-Boot on real target systems :). > > > Alex Thanks for your advises. After you send those patchs into main trunk. I will fetch and push them to u-boot-riscv.git :) Rick ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 4/4] dt-bindings: timer: Add andestech atcpit100 timer
Add a document to describe Andestech atcpit100 timer and
binding information.
Signed-off-by: rick
Signed-off-by: Rick Chen
Reviewed-by: Simon Glass
---
doc/device-tree-bindings/timer/atcpit100_timer.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 doc/device-tree-bindings/timer/atcpit100_timer.txt
diff --git a/doc/device-tree-bindings/timer/atcpit100_timer.txt
b/doc/device-tree-bindings/timer/atcpit100_timer.txt
new file mode 100644
index 000..620814e
--- /dev/null
+++ b/doc/device-tree-bindings/timer/atcpit100_timer.txt
@@ -0,0 +1,31 @@
+Andestech ATCPIT100 timer
+--
+ATCPIT100 is a generic IP block from Andes Technology, embedded in
+Andestech AE3XX, AE250 platforms and other designs.
+
+This timer is a set of compact multi-function timers, which can be
+used as pulse width modulators (PWM) as well as simple timers.
+
+It supports up to 4 PIT channels. Each PIT channel is a
+multi-function timer and provide the following usage scenarios:
+One 32-bit timer
+Two 16-bit timers
+Four 8-bit timers
+One 16-bit PWM
+One 16-bit timer and one 8-bit PWM
+Two 8-bit timer and one 8-bit PWM
+
+Required properties:
+- compatible : Should be "andestech,atcpit100"
+- reg : Address and length of the register set
+- interrupts : Reference to the timer interrupt
+- clock-frequency : The rate in HZ in input of the Andestech ATCPIT100 timer
+
+Examples:
+
+timer0: timer@f040 {
+ compatible = "andestech,atcpit100";
+ reg = <0xf040 0x1000>;
+ interrupts = <2 4>;
+ clock-frequency = <3000>;
+}:
--
2.7.4
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[U-Boot] [PATCH v3 2/4] cosmetic: atcpit100_timer: Rename function name as atcpit100
Integrate function and struct name as atcpit100 will be
more reasonable.
Signed-off-by: rick
Signed-off-by: Rick Chen
---
drivers/timer/atcpit100_timer.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c
index b710c28..d5146dd 100644
--- a/drivers/timer/atcpit100_timer.c
+++ b/drivers/timer/atcpit100_timer.c
@@ -67,51 +67,51 @@ struct atctmr_timer_regs {
u32 int_mask; /* 0x38 */
};
-struct atftmr_timer_platdata {
+struct atcpit_timer_platdata {
u32 *regs;
};
-static int atftmr_timer_get_count(struct udevice *dev, u64 *count)
+static int atcpit_timer_get_count(struct udevice *dev, u64 *count)
{
- struct atftmr_timer_platdata *plat = dev->platdata;
+ struct atcpit_timer_platdata *plat = dev->platdata;
u32 val;
val = ~(REG32_TMR(CH_CNT(1))+0x);
*count = timer_conv_64(val);
return 0;
}
-static int atctmr_timer_probe(struct udevice *dev)
+static int atcpit_timer_probe(struct udevice *dev)
{
- struct atftmr_timer_platdata *plat = dev->platdata;
+ struct atcpit_timer_platdata *plat = dev->platdata;
REG32_TMR(CH_REL(1)) = 0x;
REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
return 0;
}
-static int atctme_timer_ofdata_to_platdata(struct udevice *dev)
+static int atcpit_timer_ofdata_to_platdata(struct udevice *dev)
{
- struct atftmr_timer_platdata *plat = dev_get_platdata(dev);
+ struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
plat->regs = map_physmem(devfdt_get_addr(dev) , 0x100 , MAP_NOCACHE);
return 0;
}
-static const struct timer_ops ag101p_timer_ops = {
- .get_count = atftmr_timer_get_count,
+static const struct timer_ops atcpit_timer_ops = {
+ .get_count = atcpit_timer_get_count,
};
-static const struct udevice_id ag101p_timer_ids[] = {
+static const struct udevice_id atcpit_timer_ids[] = {
{ .compatible = "andestech,atcpit100" },
{}
};
-U_BOOT_DRIVER(altera_timer) = {
- .name = "ae3xx_timer",
+U_BOOT_DRIVER(atcpit100_timer) = {
+ .name = "atcpit100_timer",
.id = UCLASS_TIMER,
- .of_match = ag101p_timer_ids,
- .ofdata_to_platdata = atctme_timer_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct atftmr_timer_platdata),
- .probe = atctmr_timer_probe,
- .ops= &ag101p_timer_ops,
+ .of_match = atcpit_timer_ids,
+ .ofdata_to_platdata = atcpit_timer_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct atcpit_timer_platdata),
+ .probe = atcpit_timer_probe,
+ .ops= &atcpit_timer_ops,
.flags = DM_FLAG_PRE_RELOC,
};
--
2.7.4
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[U-Boot] [PATCH v3 3/4] cosmetic: atcpit100_timer: Use device api to get platdata
Use dev_get_platdata to get private platdata.
Signed-off-by: rick
Signed-off-by: Rick Chen
---
drivers/timer/atcpit100_timer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c
index d5146dd..963f978 100644
--- a/drivers/timer/atcpit100_timer.c
+++ b/drivers/timer/atcpit100_timer.c
@@ -73,7 +73,7 @@ struct atcpit_timer_platdata {
static int atcpit_timer_get_count(struct udevice *dev, u64 *count)
{
- struct atcpit_timer_platdata *plat = dev->platdata;
+ struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
u32 val;
val = ~(REG32_TMR(CH_CNT(1))+0x);
*count = timer_conv_64(val);
@@ -82,7 +82,7 @@ static int atcpit_timer_get_count(struct udevice *dev, u64
*count)
static int atcpit_timer_probe(struct udevice *dev)
{
- struct atcpit_timer_platdata *plat = dev->platdata;
+ struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
REG32_TMR(CH_REL(1)) = 0x;
REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
--
2.7.4
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[U-Boot] [PATCH v3 0/4] Rename AE3XX timer to ATCPIT100
Changelog v3 - Patch 1/4: No change. - Patch 2/4: No change. - Patch 3/4: New. - Patch 4/4: No change. Patch 3/4 1. Use dev_get_platdata to get dev private platdata. Rick Chen (4): ae3xx: timer: Rename AE3XX to ATCPIT100 cosmetic: atcpit100_timer: Rename function name as atcpit100 cosmetic: atcpit100_timer: Use device api to get platdata dt-bindings: timer: Add andestech atcpit100 timer configs/adp-ae3xx_defconfig| 2 +- doc/device-tree-bindings/timer/atcpit100_timer.txt | 31 ++ drivers/timer/Kconfig | 7 +- drivers/timer/Makefile | 2 +- drivers/timer/ae3xx_timer.c| 117 - drivers/timer/atcpit100_timer.c| 117 + 6 files changed, 154 insertions(+), 122 deletions(-) create mode 100644 doc/device-tree-bindings/timer/atcpit100_timer.txt delete mode 100644 drivers/timer/ae3xx_timer.c create mode 100644 drivers/timer/atcpit100_timer.c -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 3/4] cosmetic: atcpit100_timer: Use device api to get platdata
Use dev_get_platdata to get private platdata.
Signed-off-by: rick
Signed-off-by: Rick Chen
---
drivers/timer/atcpit100_timer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c
index d5146dd..963f978 100644
--- a/drivers/timer/atcpit100_timer.c
+++ b/drivers/timer/atcpit100_timer.c
@@ -73,7 +73,7 @@ struct atcpit_timer_platdata {
static int atcpit_timer_get_count(struct udevice *dev, u64 *count)
{
- struct atcpit_timer_platdata *plat = dev->platdata;
+ struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
u32 val;
val = ~(REG32_TMR(CH_CNT(1))+0x);
*count = timer_conv_64(val);
@@ -82,7 +82,7 @@ static int atcpit_timer_get_count(struct udevice *dev, u64
*count)
static int atcpit_timer_probe(struct udevice *dev)
{
- struct atcpit_timer_platdata *plat = dev->platdata;
+ struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
REG32_TMR(CH_REL(1)) = 0x;
REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
--
2.7.4
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[U-Boot] [PATCH v3 1/4] ae3xx: timer: Rename AE3XX to ATCPIT100
ATCPIT100 is Andestech timer IP which is embeded
in AE3XX and AE250 boards. So rename AE3XX to
ATCPIT100 will be more make sence.
Signed-off-by: rick
Signed-off-by: Rick Chen
Reviewed-by: Simon Glass
---
configs/adp-ae3xx_defconfig | 2 +-
drivers/timer/Kconfig | 7 +--
drivers/timer/Makefile | 2 +-
drivers/timer/ae3xx_timer.c | 117
drivers/timer/atcpit100_timer.c | 117
5 files changed, 123 insertions(+), 122 deletions(-)
delete mode 100644 drivers/timer/ae3xx_timer.c
create mode 100644 drivers/timer/atcpit100_timer.c
diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
index a3a40bf..337cee1 100644
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -35,4 +35,4 @@ CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_NDS_AE3XX_SPI=y
CONFIG_TIMER=y
-CONFIG_AE3XX_TIMER=y
+CONFIG_ATCPIT100_TIMER=y
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 6305bbf..fcfdf4e 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -105,11 +105,12 @@ config AG101P_TIMER
help
Select this to enable a timer for AG01P devices.
-config AE3XX_TIMER
- bool "AE3XX timer support"
+config ATCPIT100_TIMER
+ bool "ATCPIT100 timer support"
depends on TIMER && NDS32
help
- Select this to enable a timer for AE3XX devices.
+ Select this to enable a ATCPIT100 timer which will be embeded
+ in AE3XX, AE250 boards.
config ROCKCHIP_TIMER
bool "Rockchip timer support"
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index 69e8961..15e5154 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -13,6 +13,6 @@ obj-$(CONFIG_AST_TIMER) += ast_timer.o
obj-$(CONFIG_STI_TIMER)+= sti-timer.o
obj-$(CONFIG_ARC_TIMER)+= arc_timer.o
obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o
-obj-$(CONFIG_AE3XX_TIMER) += ae3xx_timer.o
+obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o
diff --git a/drivers/timer/ae3xx_timer.c b/drivers/timer/ae3xx_timer.c
deleted file mode 100644
index b710c28..000
--- a/drivers/timer/ae3xx_timer.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Andestech ATCPIT100 timer driver
- *
- * (C) Copyright 2016
- * Rick Chen, NDS32 Software Engineering, r...@andestech.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define REG32_TMR(x) (*(u32 *) ((plat->regs) + (x>>2)))
-
-/*
- * Definition of register offsets
- */
-
-/* ID and Revision Register */
-#define ID_REV 0x0
-
-/* Configuration Register */
-#define CFG0x10
-
-/* Interrupt Enable Register */
-#define INT_EN 0x14
-#define CH_INT_EN(c , i) ((1<platdata;
- u32 val;
- val = ~(REG32_TMR(CH_CNT(1))+0x);
- *count = timer_conv_64(val);
- return 0;
-}
-
-static int atctmr_timer_probe(struct udevice *dev)
-{
- struct atftmr_timer_platdata *plat = dev->platdata;
- REG32_TMR(CH_REL(1)) = 0x;
- REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
- REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
- return 0;
-}
-
-static int atctme_timer_ofdata_to_platdata(struct udevice *dev)
-{
- struct atftmr_timer_platdata *plat = dev_get_platdata(dev);
- plat->regs = map_physmem(devfdt_get_addr(dev) , 0x100 , MAP_NOCACHE);
- return 0;
-}
-
-static const struct timer_ops ag101p_timer_ops = {
- .get_count = atftmr_timer_get_count,
-};
-
-static const struct udevice_id ag101p_timer_ids[] = {
- { .compatible = "andestech,atcpit100" },
- {}
-};
-
-U_BOOT_DRIVER(altera_timer) = {
- .name = "ae3xx_timer",
- .id = UCLASS_TIMER,
- .of_match = ag101p_timer_ids,
- .ofdata_to_platdata = atctme_timer_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct atftmr_timer_platdata),
- .probe = atctmr_timer_probe,
- .ops= &ag101p_timer_ops,
- .flags = DM_FLAG_PRE_RELOC,
-};
diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c
new file mode 100644
index 000..b710c28
--- /dev/null
+++ b/drivers/timer/atcpit100_timer.c
@@ -0,0 +1,117 @@
+/*
+ * Andestech ATCPIT100 timer driver
+ *
+ * (C) Copyright 2016
+ * Rick Chen, NDS32 Software Engineering, r...@andestech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define REG32_TMR(x) (*(u32 *) ((plat->regs) + (x>>2)))
+
+/*
+ * Definition of register offsets
+ */
+
+/* ID and Revision Register */
+#define ID_REV 0x0
+
+/* Configuration Register */
+#define CFG
[U-Boot] [PATCH v3 4/4] dt-bindings: timer: Add andestech atcpit100 timer
Add a document to describe Andestech atcpit100 timer and
binding information.
Signed-off-by: rick
Signed-off-by: Rick Chen
Reviewed-by: Simon Glass
---
doc/device-tree-bindings/timer/atcpit100_timer.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 doc/device-tree-bindings/timer/atcpit100_timer.txt
diff --git a/doc/device-tree-bindings/timer/atcpit100_timer.txt
b/doc/device-tree-bindings/timer/atcpit100_timer.txt
new file mode 100644
index 000..620814e
--- /dev/null
+++ b/doc/device-tree-bindings/timer/atcpit100_timer.txt
@@ -0,0 +1,31 @@
+Andestech ATCPIT100 timer
+--
+ATCPIT100 is a generic IP block from Andes Technology, embedded in
+Andestech AE3XX, AE250 platforms and other designs.
+
+This timer is a set of compact multi-function timers, which can be
+used as pulse width modulators (PWM) as well as simple timers.
+
+It supports up to 4 PIT channels. Each PIT channel is a
+multi-function timer and provide the following usage scenarios:
+One 32-bit timer
+Two 16-bit timers
+Four 8-bit timers
+One 16-bit PWM
+One 16-bit timer and one 8-bit PWM
+Two 8-bit timer and one 8-bit PWM
+
+Required properties:
+- compatible : Should be "andestech,atcpit100"
+- reg : Address and length of the register set
+- interrupts : Reference to the timer interrupt
+- clock-frequency : The rate in HZ in input of the Andestech ATCPIT100 timer
+
+Examples:
+
+timer0: timer@f040 {
+ compatible = "andestech,atcpit100";
+ reg = <0xf040 0x1000>;
+ interrupts = <2 4>;
+ clock-frequency = <3000>;
+}:
--
2.7.4
___
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[U-Boot] [PATCH v3 2/4] cosmetic: atcpit100_timer: Rename function name as atcpit100
Integrate function and struct name as atcpit100 will be
more reasonable.
Signed-off-by: rick
Signed-off-by: Rick Chen
---
drivers/timer/atcpit100_timer.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c
index b710c28..d5146dd 100644
--- a/drivers/timer/atcpit100_timer.c
+++ b/drivers/timer/atcpit100_timer.c
@@ -67,51 +67,51 @@ struct atctmr_timer_regs {
u32 int_mask; /* 0x38 */
};
-struct atftmr_timer_platdata {
+struct atcpit_timer_platdata {
u32 *regs;
};
-static int atftmr_timer_get_count(struct udevice *dev, u64 *count)
+static int atcpit_timer_get_count(struct udevice *dev, u64 *count)
{
- struct atftmr_timer_platdata *plat = dev->platdata;
+ struct atcpit_timer_platdata *plat = dev->platdata;
u32 val;
val = ~(REG32_TMR(CH_CNT(1))+0x);
*count = timer_conv_64(val);
return 0;
}
-static int atctmr_timer_probe(struct udevice *dev)
+static int atcpit_timer_probe(struct udevice *dev)
{
- struct atftmr_timer_platdata *plat = dev->platdata;
+ struct atcpit_timer_platdata *plat = dev->platdata;
REG32_TMR(CH_REL(1)) = 0x;
REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
return 0;
}
-static int atctme_timer_ofdata_to_platdata(struct udevice *dev)
+static int atcpit_timer_ofdata_to_platdata(struct udevice *dev)
{
- struct atftmr_timer_platdata *plat = dev_get_platdata(dev);
+ struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
plat->regs = map_physmem(devfdt_get_addr(dev) , 0x100 , MAP_NOCACHE);
return 0;
}
-static const struct timer_ops ag101p_timer_ops = {
- .get_count = atftmr_timer_get_count,
+static const struct timer_ops atcpit_timer_ops = {
+ .get_count = atcpit_timer_get_count,
};
-static const struct udevice_id ag101p_timer_ids[] = {
+static const struct udevice_id atcpit_timer_ids[] = {
{ .compatible = "andestech,atcpit100" },
{}
};
-U_BOOT_DRIVER(altera_timer) = {
- .name = "ae3xx_timer",
+U_BOOT_DRIVER(atcpit100_timer) = {
+ .name = "atcpit100_timer",
.id = UCLASS_TIMER,
- .of_match = ag101p_timer_ids,
- .ofdata_to_platdata = atctme_timer_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct atftmr_timer_platdata),
- .probe = atctmr_timer_probe,
- .ops= &ag101p_timer_ops,
+ .of_match = atcpit_timer_ids,
+ .ofdata_to_platdata = atcpit_timer_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct atcpit_timer_platdata),
+ .probe = atcpit_timer_probe,
+ .ops= &atcpit_timer_ops,
.flags = DM_FLAG_PRE_RELOC,
};
--
2.7.4
___
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[U-Boot] [PATCH v3 0/4] Rename AE3XX timer to ATCPIT100
Changelog v3 - Patch 1/4: No change. - Patch 2/4: No change. - Patch 3/4: New. - Patch 4/4: No change. Patch 3/4 1. Use dev_get_platdata to get dev private platdata. Rick Chen (4): ae3xx: timer: Rename AE3XX to ATCPIT100 cosmetic: atcpit100_timer: Rename function name as atcpit100 cosmetic: atcpit100_timer: Use device api to get platdata dt-bindings: timer: Add andestech atcpit100 timer configs/adp-ae3xx_defconfig| 2 +- doc/device-tree-bindings/timer/atcpit100_timer.txt | 31 ++ drivers/timer/Kconfig | 7 +- drivers/timer/Makefile | 2 +- drivers/timer/ae3xx_timer.c| 117 - drivers/timer/atcpit100_timer.c| 117 + 6 files changed, 154 insertions(+), 122 deletions(-) create mode 100644 doc/device-tree-bindings/timer/atcpit100_timer.txt delete mode 100644 drivers/timer/ae3xx_timer.c create mode 100644 drivers/timer/atcpit100_timer.c -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 1/4] ae3xx: timer: Rename AE3XX to ATCPIT100
ATCPIT100 is Andestech timer IP which is embeded
in AE3XX and AE250 boards. So rename AE3XX to
ATCPIT100 will be more make sence.
Signed-off-by: rick
Signed-off-by: Rick Chen
Reviewed-by: Simon Glass
---
configs/adp-ae3xx_defconfig | 2 +-
drivers/timer/Kconfig | 7 +--
drivers/timer/Makefile | 2 +-
drivers/timer/ae3xx_timer.c | 117
drivers/timer/atcpit100_timer.c | 117
5 files changed, 123 insertions(+), 122 deletions(-)
delete mode 100644 drivers/timer/ae3xx_timer.c
create mode 100644 drivers/timer/atcpit100_timer.c
diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
index a3a40bf..337cee1 100644
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -35,4 +35,4 @@ CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_NDS_AE3XX_SPI=y
CONFIG_TIMER=y
-CONFIG_AE3XX_TIMER=y
+CONFIG_ATCPIT100_TIMER=y
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 6305bbf..fcfdf4e 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -105,11 +105,12 @@ config AG101P_TIMER
help
Select this to enable a timer for AG01P devices.
-config AE3XX_TIMER
- bool "AE3XX timer support"
+config ATCPIT100_TIMER
+ bool "ATCPIT100 timer support"
depends on TIMER && NDS32
help
- Select this to enable a timer for AE3XX devices.
+ Select this to enable a ATCPIT100 timer which will be embeded
+ in AE3XX, AE250 boards.
config ROCKCHIP_TIMER
bool "Rockchip timer support"
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index 69e8961..15e5154 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -13,6 +13,6 @@ obj-$(CONFIG_AST_TIMER) += ast_timer.o
obj-$(CONFIG_STI_TIMER)+= sti-timer.o
obj-$(CONFIG_ARC_TIMER)+= arc_timer.o
obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o
-obj-$(CONFIG_AE3XX_TIMER) += ae3xx_timer.o
+obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o
diff --git a/drivers/timer/ae3xx_timer.c b/drivers/timer/ae3xx_timer.c
deleted file mode 100644
index b710c28..000
--- a/drivers/timer/ae3xx_timer.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Andestech ATCPIT100 timer driver
- *
- * (C) Copyright 2016
- * Rick Chen, NDS32 Software Engineering, r...@andestech.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define REG32_TMR(x) (*(u32 *) ((plat->regs) + (x>>2)))
-
-/*
- * Definition of register offsets
- */
-
-/* ID and Revision Register */
-#define ID_REV 0x0
-
-/* Configuration Register */
-#define CFG0x10
-
-/* Interrupt Enable Register */
-#define INT_EN 0x14
-#define CH_INT_EN(c , i) ((1<platdata;
- u32 val;
- val = ~(REG32_TMR(CH_CNT(1))+0x);
- *count = timer_conv_64(val);
- return 0;
-}
-
-static int atctmr_timer_probe(struct udevice *dev)
-{
- struct atftmr_timer_platdata *plat = dev->platdata;
- REG32_TMR(CH_REL(1)) = 0x;
- REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
- REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
- return 0;
-}
-
-static int atctme_timer_ofdata_to_platdata(struct udevice *dev)
-{
- struct atftmr_timer_platdata *plat = dev_get_platdata(dev);
- plat->regs = map_physmem(devfdt_get_addr(dev) , 0x100 , MAP_NOCACHE);
- return 0;
-}
-
-static const struct timer_ops ag101p_timer_ops = {
- .get_count = atftmr_timer_get_count,
-};
-
-static const struct udevice_id ag101p_timer_ids[] = {
- { .compatible = "andestech,atcpit100" },
- {}
-};
-
-U_BOOT_DRIVER(altera_timer) = {
- .name = "ae3xx_timer",
- .id = UCLASS_TIMER,
- .of_match = ag101p_timer_ids,
- .ofdata_to_platdata = atctme_timer_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct atftmr_timer_platdata),
- .probe = atctmr_timer_probe,
- .ops= &ag101p_timer_ops,
- .flags = DM_FLAG_PRE_RELOC,
-};
diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c
new file mode 100644
index 000..b710c28
--- /dev/null
+++ b/drivers/timer/atcpit100_timer.c
@@ -0,0 +1,117 @@
+/*
+ * Andestech ATCPIT100 timer driver
+ *
+ * (C) Copyright 2016
+ * Rick Chen, NDS32 Software Engineering, r...@andestech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define REG32_TMR(x) (*(u32 *) ((plat->regs) + (x>>2)))
+
+/*
+ * Definition of register offsets
+ */
+
+/* ID and Revision Register */
+#define ID_REV 0x0
+
+/* Configuration Register */
+#define CFG
