Re: [U-Boot] U-Boot

[Yang, Wenyou]

On 2018/2/28 0:55, Mariano Coromac wrote:
Hmmm, by sequential number do you mean the Specification Version? This 
one is correct.

Here's my eMMC info.
=> mmc info
Device: sdio-host@a000
Manufacturer ID: eb
OEM: 10d
Name: eMMC
Tran Speed: 5200
Rd Block Len: 512
MMC version 5.0
High Capacity: Yes
Capacity: 3.6 GiB
Bus Width: 4-bit
Erase Group Size: 512 KiB
HC WP Group Size: 8 MiB
User Capacity: 3.6 GiB
Boot Capacity: 2 MiB ENH
RPMB Capacity: 512 KiB ENH

This is right, did you try the command,
=> mmc read addr blk# cnt
does it work?

Best Regards,
Wenyou Yang
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Re: [U-Boot] U-Boot

[Yang, Wenyou]

Hi Mariano,

On 2018/2/27 1:09, Mariano Coromac wrote:

Hello Again,
I have been working with UBoot but now when I try to boot my Linux 
kernel image that's inside my eMMC it displays the following:

=> boot
CMD_SEND:0
        ARG             0x
        RET             -110
mmc_init: -110, time 10
** Bad device mmc 1 **
CMD_SEND:0
        ARG             0x
        RET             -110
mmc_init: -110, time 11
** Bad device mmc 1 **

I know it is a timeout error and I also know that the error occurs 
inside mmc-uclass line 31. I'm aware send_cmd() is defined in mmc.h 
but I honestly don't know how to dig deeper into this error.


mmc info works fine. Here's the mmc rescan log if it makes any use:
=> mmc rescan
CMD_SEND:0
        ARG             0x
        MMC_RSP_NONE
CMD_SEND:8
        ARG             0x01AA
        RET             -110
CMD_SEND:55
        ARG             0x
        RET             -110
CMD_SEND:0
        ARG             0x
        MMC_RSP_NONE
CMD_SEND:1
        ARG             0x
        MMC_RSP_R3,4         0x00FF8080
CMD_SEND:1
        ARG             0x40360080
        MMC_RSP_R3,4         0xC0FF8080
CMD_SEND:2
        ARG             0x
        MMC_RSP_R2         0xEB010D65
                   0x4D4D4320
                   0x205000AC
                   0x008E7300

                    DUMPING DATA
                    000 - EB 01 0D 65
                    004 - 4D 4D 43 20
                    008 - 20 50 00 AC
                    012 - 00 8E 73 00
CMD_SEND:3
        ARG             0x0001
        MMC_RSP_R1,5,6,7      0x0500
CMD_SEND:9
        ARG             0x0001
        MMC_RSP_R2         0xD04F0132
                   0x0F5903FF
                   0xFFEF
                   0x8A40

                    DUMPING DATA
                    000 - D0 4F 01 32
                    004 - 0F 59 03 FF
                    008 - FF FF FF EF
                    012 - 8A 40 00 00
CMD_SEND:13
        ARG             0x0001
        MMC_RSP_R1,5,6,7      0x0700
CURR STATE:3
CMD_SEND:7
        ARG             0x0001
        MMC_RSP_R1,5,6,7      0x0700
CMD_SEND:8
        ARG             0x
        MMC_RSP_R1,5,6,7      0x0900
CMD_SEND:8
        ARG             0x
        MMC_RSP_R1,5,6,7      0x0900
CMD_SEND:6
        ARG             0x03B90100
        MMC_RSP_R1b         0x0800
CMD_SEND:13
        ARG             0x0001
        MMC_RSP_R1,5,6,7      0x0900
CURR STATE:4
CMD_SEND:8
        ARG             0x
        MMC_RSP_R1,5,6,7      0x0900
CMD_SEND:6
        ARG             0x03B70100
        MMC_RSP_R1b         0x0800
CMD_SEND:13
        ARG             0x0001
        MMC_RSP_R1,5,6,7      0x0900
CURR STATE:4
CMD_SEND:8
        ARG             0x
        MMC_RSP_R1,5,6,7      0x0900
CMD_SEND:16
        ARG             0x0200
        MMC_RSP_R1,5,6,7      0x0900
CMD_SEND:17
        ARG             0x
        MMC_RSP_R1,5,6,7      0x0900

Any guidance would be appreciated.
Please check if there is a pin conflict to configure, or if the mmc 
sequential number is correct.


On sama5d2 Xplained board, the eMMC works with the commands,

=> mmc info
Device: sdio-host@a000
Manufacturer ID: fe
OEM: 14e
Name: MMC04
Tran Speed: 5200
Rd Block Len: 512
MMC version 4.4.1
High Capacity: Yes
Capacity: 3.7 GiB
Bus Width: 4-bit
Erase Group Size: 512 KiB
HC WP Group Size: 4 MiB
User Capacity: 3.7 GiB
Boot Capacity: 1 MiB ENH
RPMB Capacity: 128 KiB ENH



Thank you.

On Wed, Feb 14, 2018 at 3:27 PM, Mariano Coromac > wrote:


Forget it guys, I just realized what was wrong.
reg = <0xf8038200 0x200>;
Before it was
reg = <0xf8038200 0x100>;
So if anyone else (that wants to use the flexcom uart) asks you
about this now there's another thing you can point to.
If I encounter another problem or something I'll get back to you.




--
Mariano Coromac 
I of Electronics Engineer
mcoro...@stsa.info 
+502 41544712
www.gps.gt 



Best Regards,
Wenyou Yang
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Re: [U-Boot] [RFC 0/5] sf: Update spi-nor framework

[Yang, Wenyou]

On 2018/1/4 18:34, Prabhakar Kushwaha wrote:

Thanks Jagan

Dear Yang Wenyou,


-Original Message-
From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
Sent: Thursday, January 04, 2018 3:57 PM
To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
Cc: Yang, Wenyou <wenyou.y...@microchip.com>; u-boot@lists.denx.de;
cyrille.pitc...@atmel.com; Suresh Gupta <suresh.gu...@nxp.com>
Subject: Re: [U-Boot] [RFC 0/5] sf: Update spi-nor framework

On Thu, Jan 4, 2018 at 3:54 PM, Prabhakar Kushwaha
<prabhakar.kushw...@nxp.com> wrote:

Thanks Wenyou for the references.

I will check them while porting my patch-set to u-boot-spi.git.


-Original Message-
From: Yang, Wenyou [mailto:wenyou.y...@microchip.com]
Sent: Thursday, January 04, 2018 7:28 AM
To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
b...@lists.denx.de
Cc: Suresh Gupta <suresh.gu...@nxp.com>; cyrille.pitc...@atmel.com
Subject: Re: [U-Boot] [RFC 0/5] sf: Update spi-nor framework

Hi,

On this topic, Cyrille has a patches here, as a reference.

https://lists.denx.de/pipermail/u-boot/2017-July/299409.html



Any idea why these patches were not accepted?
Is it because of pending review/rework

Are you planning to submit v4 patch in near future
Or
may I pick few of your patches while porting to my patch-set on u-boot-spi.git.
Please note I am  also planning to add support of read_proto, write_proto 
similar to what supported in Linux.

No, we don't have plan to submit v4 patch.
You are free to pick them.

Best Regards,
Wenyou Yang



--pk




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Re: [U-Boot] [RFC 0/5] sf: Update spi-nor framework

[Yang, Wenyou]

Hi,

On this topic, Cyrille has a patches here, as a reference.

https://lists.denx.de/pipermail/u-boot/2017-July/299409.html

On 2017/12/11 13:57, Prabhakar Kushwaha wrote:

SPI-NOR framework currently supports-
  - (1-1-1, 1-1-2, 1-1-4) read protocols
  - read latency(dummy bytes) are hardcoded with the assumption
  that the flash would support it.
  - No support of mode bits.
  - No support of flash size above 128Mib

This patch set add support of 1-2-2, 1-4-4 read protocols.
It ports Linux commits "mtd: spi-nor: add a stateless method to support
memory size above 128Mib" and "mtd: spi-nor: parse Serial Flash
Discoverable Parameters (SFDP) tables". It enables 4byte address opcode
and run time flash parameters discovery including dummy cycle and mode
cycle.

Finally it update fsl-quadspi driver to store(set_mode) spi bus mode and
provision for run-time LUTs creation.

Note: This patch-set is only **compliation** tested. Sending RFC to get
early feed-back on the approach.

Prabhakar Kushwaha (5):
   sf: Add support of 1-2-2, 1-4-4 IO READ protocols
   sf: add method to support memory size above 128Mib
   sf: parse Serial Flash Discoverable Parameters (SFDP) tables
   sf: fsl_qspi: Add support of fsl_qspi_set_mode
   sf: fsl_quadspi: Configue LUT based on padding information

  drivers/mtd/spi/sf_internal.h   | 230 +++-
  drivers/mtd/spi/spi_flash.c | 574 +++-
  drivers/spi/fsl_qspi.c  |  85 +-
  include/spi_flash.h |   2 +
  5 files changed, 875 insertions(+), 18 deletions(-)



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Re: [U-Boot] [PATCH 2/2] i2c: at91_i2c: remove the .probe_chip function

[Yang, Wenyou]

On 2017/11/29 11:25, Alan Ott wrote:

The .probe_chip function is supposed to probe an i2c device on the bus to
determine whether a device is answering to a particular address.
at91_i2c_probe_chip() did not do anything resembling this and always
returned 0.

It looks as though at91_i2c_probe_chip() was intended to be a .probe
function for the controller, as it was copied-and-pasted to become
at91_i2c_probe() in 0bc8f640a4d7ed.

Removing the at91_i2c_probe_chip() function makes the higher layer
(i2c_probe_chip()) try a zero-length read transfer to test for the
presence of a device instead, which does work.

Signed-off-by: Alan Ott 
---

Acked-by: Wenyou Yang 

Thank you for your patch.


  drivers/i2c/at91_i2c.c | 22 --
  1 file changed, 22 deletions(-)

diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
index 20d0929..7917ca1 100644
--- a/drivers/i2c/at91_i2c.c
+++ b/drivers/i2c/at91_i2c.c
@@ -201,27 +201,6 @@ static int at91_i2c_enable_clk(struct udevice *dev)
return 0;
  }
  
-static int at91_i2c_probe_chip(struct udevice *dev, uint chip, uint chip_flags)

-{
-   struct at91_i2c_bus *bus = dev_get_priv(dev);
-   struct at91_i2c_regs *reg = bus->regs;
-   int ret;
-
-   ret = at91_i2c_enable_clk(dev);
-   if (ret)
-   return ret;
-
-   writel(TWI_CR_SWRST, >cr);
-
-   at91_calc_i2c_clock(dev, bus->clock_frequency);
-
-   writel(bus->cwgr_val, >cwgr);
-   writel(TWI_CR_MSEN, >cr);
-   writel(TWI_CR_SVDIS, >cr);
-
-   return 0;
-}
-
  static int at91_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)
  {
struct at91_i2c_bus *bus = dev_get_priv(dev);
@@ -256,7 +235,6 @@ static int at91_i2c_ofdata_to_platdata(struct udevice *dev)
  
  static const struct dm_i2c_ops at91_i2c_ops = {

.xfer   = at91_i2c_xfer,
-   .probe_chip = at91_i2c_probe_chip,
.set_bus_speed  = at91_i2c_set_bus_speed,
.get_bus_speed  = at91_i2c_get_bus_speed,
  };

Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 1/2] i2c: at91_i2c: Wait for TXRDY after sending the first byte

[Yang, Wenyou]

On 2017/11/29 11:25, Alan Ott wrote:

The driver must wait for TXRDY after each byte is pushed into
the i2c FIFO before pushing the next byte. Previously this was
not done for the first byte, causing a race condition with zeros
sometimes being sent for the next byte (which is typically the
first actual data byte).

Signed-off-by: Alan Ott 
---

Acked-by:  Wenyou Yang 

Thank you for your patch.


  drivers/i2c/at91_i2c.c | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
index d394044..20d0929 100644
--- a/drivers/i2c/at91_i2c.c
+++ b/drivers/i2c/at91_i2c.c
@@ -72,6 +72,8 @@ static int at91_i2c_xfer_msg(struct at91_i2c_bus *bus, struct 
i2c_msg *msg)
  
  	} else {

writel(msg->buf[0], >thr);
+   ret = at91_wait_for_xfer(bus, TWI_SR_TXRDY);
+
for (i = 1; !ret && (i < msg->len); i++) {
writel(msg->buf[i], >thr);
ret = at91_wait_for_xfer(bus, TWI_SR_TXRDY);


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 2/4] spi: Drop CONFIG_ATMEL_DATAFLASH_SPI

[Yang, Wenyou]

Hi Tuomas,


On 2017/10/11 2:59, Tuomas Tynkkynen wrote:

Last user of this option went away in commit:

fdc7718999 ("board: usb_a9263: Update to support DT and DM")

It is okay for me.
Acked-by: Wenyou Yang 


Signed-off-by: Tuomas Tynkkynen 
---
  drivers/spi/Makefile  |   1 -
  drivers/spi/atmel_dataflash_spi.c | 184 --
  2 files changed, 185 deletions(-)
  delete mode 100644 drivers/spi/atmel_dataflash_spi.c

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index cd7c7556a7..ad56203cd6 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -17,7 +17,6 @@ endif
  
  obj-$(CONFIG_ALTERA_SPI) += altera_spi.o

  obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
-obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
  obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
  obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
  obj-$(CONFIG_CF_SPI) += cf_spi.o
diff --git a/drivers/spi/atmel_dataflash_spi.c 
b/drivers/spi/atmel_dataflash_spi.c
deleted file mode 100644
index a2e9c00ea6..00
--- a/drivers/spi/atmel_dataflash_spi.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-/*
- * This driver desperately needs rework:
- *
- * - use structure SoC access
- * - get rid of including asm/arch/at91_spi.h
- * - remove asm/arch/at91_spi.h
- * - get rid of all CONFIG_ATMEL_LEGACY defines and uses
- *
- * 02-Aug-2010 Reinhard Meyer 
- */
-
-#include 
-#ifndef CONFIG_ATMEL_LEGACY
-# define CONFIG_ATMEL_LEGACY
-#endif
-#include 
-#include 
-
-#include 
-
-#include 
-#include 
-
-#include "atmel_spi.h"
-
-#include 
-#include 
-#include 
-
-#include 
-
-#define AT91_SPI_PCS0_DATAFLASH_CARD   0xE /* Chip Select 0: NPCS0%1110 */
-#define AT91_SPI_PCS1_DATAFLASH_CARD   0xD /* Chip Select 1: NPCS1%1101 */
-#define AT91_SPI_PCS2_DATAFLASH_CARD   0xB /* Chip Select 2: NPCS2%1011 */
-#define AT91_SPI_PCS3_DATAFLASH_CARD   0x7 /* Chip Select 3: NPCS3%0111 */
-
-void AT91F_SpiInit(void)
-{
-   /* Reset the SPI */
-   writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-
-   /* Configure SPI in Master Mode with No CS selected !!! */
-   writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
-  ATMEL_BASE_SPI0 + AT91_SPI_MR);
-
-   /* Configure CS0 */
-   writel(AT91_SPI_NCPHA |
-  (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-  (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-  ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-  ATMEL_BASE_SPI0 + AT91_SPI_CSR(0));
-
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
-   /* Configure CS1 */
-   writel(AT91_SPI_NCPHA |
-  (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-  (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-  ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-  ATMEL_BASE_SPI0 + AT91_SPI_CSR(1));
-#endif
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
-   /* Configure CS2 */
-   writel(AT91_SPI_NCPHA |
-  (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-  (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-  ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-  ATMEL_BASE_SPI0 + AT91_SPI_CSR(2));
-#endif
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
-   /* Configure CS3 */
-   writel(AT91_SPI_NCPHA |
-  (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-  (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-  ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-  ATMEL_BASE_SPI0 + AT91_SPI_CSR(3));
-#endif
-
-   /* SPI_Enable */
-   writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-
-   while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_SPIENS))
-   ;
-
-   /*
-* Add tempo to get SPI in a safe state.
-* Should not be needed for new silicon (Rev B)
-*/
-   udelay(50);
-   readl(ATMEL_BASE_SPI0 + AT91_SPI_SR);
-   readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR);
-
-}
-
-void AT91F_SpiEnable(int cs)
-{
-   unsigned long mode;
-
-   mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
-   mode &= ~AT91_SPI_PCS;
-
-   switch (cs) {
-   case 0:
-   mode |= AT91_SPI_PCS0_DATAFLASH_CARD << 16;
-   break;
-   case 1:
-   mode |= AT91_SPI_PCS1_DATAFLASH_CARD << 16;
-   break;
-   case 2:
-   mode |= AT91_SPI_PCS2_DATAFLASH_CARD << 16;
-   break;
-   case 3:
-   mode |= AT91_SPI_PCS3_DATAFLASH_CARD << 16;
-   break;
-   }
-
-   writel(mode, ATMEL_BASE_SPI0 + AT91_SPI_MR);
-
-   /* SPI_Enable */
-   writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-}
-
-unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
-
-unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
-{
-   unsigned 

Re: [U-Boot] [U-Boot, 1/5] ARM: at91: Move CONFIG_AT91FAMILY option to Kconfig

[Yang, Wenyou]

Hi Tom


On 2017/9/13 20:25, Tom Rini wrote:

On Fri, Aug 04, 2017 at 09:20:01AM +0800, Wenyou Yang wrote:


From: Wenyou Yang 

Move the CONFIG_AT91FAMILY option from include/mach/.h header
file to Kconfig.

Signed-off-by: Wenyou Yang 

Can you please rebase this series on top of master?  Thanks!

I will send new version to rebase.

Thank you for your mail.

Best Regards,
Wenyou Yang

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Re: [U-Boot] [PATCH 0/7] board: atmel: Convert to support DM_VIDEO

[Yang, Wenyou]

Hi

On 2017/7/31 14:02, Wenyou Yang wrote:

Add a common code to display the company's logo and board information
by using the API from DM_VIDEO under the board/$(VENDOR)/common
folder, and the logo files can be used by the API from DM_VIDEO, and
then convert the board to enable the driver model support for
LCD/video.

It is based on the patch series:
[PATCH v2 0/3] board: atmel: Set the ethernet mac address from eeprom
https://lists.denx.de/pipermail/u-boot/2017-July/300527.html

Do you have any comments on this patch set?

Best Regards,
Wenyou Yang



Wenyou Yang (7):
   lib: at91: Add logo files used by API from DM_VIDEO
   atmel: common: Add function to display via DM_VIDEO's API
   board: sama5d2_xplained: Convert to support DM_VIDEO
   board: sama5d3xek: Convert to support DM_VIDEO
   board: sama5d4ek: Convert to support DM_VIDEO
   board: sama5d4_xplained: Convert to support DM_VIDEO
   board: at91sam9x5ek: Convert to support DM_VIDEO

  arch/arm/dts/at91-sama5d2_xplained.dts  |   60 ++
  arch/arm/dts/at91-sama5d4_xplained.dts  |   25 +
  arch/arm/dts/at91-sama5d4ek.dts |   26 +
  arch/arm/dts/sama5d2.dtsi   |7 +
  arch/arm/dts/sama5d36ek_cmp.dts |1 +
  arch/arm/dts/sama5d3_lcd.dtsi   |   21 +-
  arch/arm/dts/sama5d3xdm.dtsi|   26 +
  arch/arm/dts/sama5d4.dtsi   |   21 +-
  arch/arm/mach-at91/Kconfig  |4 +
  arch/arm/mach-at91/include/mach/at91_common.h   |1 +
  board/atmel/at91sam9x5ek/at91sam9x5ek.c |  111 +-
  board/atmel/common/Makefile |1 +
  board/atmel/common/video_display.c  |   72 ++
  board/atmel/sama5d2_xplained/sama5d2_xplained.c |   95 +-
  board/atmel/sama5d3xek/sama5d3xek.c |   93 +-
  board/atmel/sama5d4_xplained/sama5d4_xplained.c |  102 +-
  board/atmel/sama5d4ek/sama5d4ek.c   |   97 +-
  configs/at91sam9x5ek_dataflash_defconfig|3 +-
  configs/at91sam9x5ek_mmc_defconfig  |3 +-
  configs/at91sam9x5ek_nandflash_defconfig|3 +-
  configs/at91sam9x5ek_spiflash_defconfig |3 +-
  configs/sama5d2_xplained_mmc_defconfig  |2 +
  configs/sama5d2_xplained_spiflash_defconfig |2 +
  configs/sama5d36ek_cmp_mmc_defconfig|3 +-
  configs/sama5d36ek_cmp_nandflash_defconfig  |3 +-
  configs/sama5d36ek_cmp_spiflash_defconfig   |3 +-
  configs/sama5d3xek_mmc_defconfig|3 +-
  configs/sama5d3xek_nandflash_defconfig  |3 +-
  configs/sama5d3xek_spiflash_defconfig   |3 +-
  configs/sama5d4_xplained_mmc_defconfig  |2 +
  configs/sama5d4_xplained_nandflash_defconfig|2 +
  configs/sama5d4_xplained_spiflash_defconfig |2 +
  configs/sama5d4ek_mmc_defconfig |3 +-
  configs/sama5d4ek_nandflash_defconfig   |3 +-
  configs/sama5d4ek_spiflash_defconfig|3 +-
  include/atmel_lcd.h |9 +
  include/configs/at91sam9x5ek.h  |   10 -
  include/configs/sama5d2_xplained.h  |   12 -
  include/configs/sama5d3xek.h|   12 -
  include/configs/sama5d4_xplained.h  |   11 -
  include/configs/sama5d4ek.h |9 -
  lib/Makefile|1 +
  lib/at91/Makefile   |8 +
  lib/at91/at91.c |   30 +
  lib/at91/atmel_logo_8bpp.h  | 1310 +++
  lib/at91/microchip_logo_8bpp.h  | 1082 +++
  tools/logos/microchip.bmp   |  Bin 0 -> 12726 bytes
  47 files changed, 2729 insertions(+), 577 deletions(-)
  create mode 100644 board/atmel/common/video_display.c
  create mode 100644 lib/at91/Makefile
  create mode 100644 lib/at91/at91.c
  create mode 100644 lib/at91/atmel_logo_8bpp.h
  create mode 100644 lib/at91/microchip_logo_8bpp.h
  create mode 100644 tools/logos/microchip.bmp



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Re: [U-Boot] [PATCH 0/2] misc: i2c_eeprom: Add compatibles

[Yang, Wenyou]

Hi,

Can be accepted?


On 2017/7/31 11:25, Wenyou Yang wrote:

Add the compatibles to support the I2C EEPROM 24AA02E48 and AT24MAC402
respectively.
  - microchip,24aa02e48
  - atmel,24mac402


Wenyou Yang (2):
   misc: i2c_eeprom: Add compatible for 24AA02E48
   misc: i2c_eeprom: Add compatible for AT24MAC402

  drivers/misc/i2c_eeprom.c | 2 ++
  1 file changed, 2 insertions(+)


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH] misc: Kconfig: Add SPL_I2C_EEPROM option

[Yang, Wenyou]

Hi,

Do you have any comments?


On 2017/8/3 9:00, Wenyou Yang wrote:

This option is an SPL-variant of the I2C_EEPROM option to enable
the driver for generic I2C-attached EEPROMs for SPL.

Signed-off-by: Wenyou Yang 
---

  drivers/misc/Kconfig  | 8 
  drivers/misc/Makefile | 2 +-
  2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index d1ddbbe157..e441031d04 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -196,4 +196,12 @@ config I2C_EEPROM
depends on MISC
help
  Enable a generic driver for EEPROMs attached via I2C.
+
+config SPL_I2C_EEPROM
+   bool "Enable driver for generic I2C-attached EEPROMs for SPL"
+   depends on MISC && SPL && SPL_DM
+   help
+ This option is an SPL-variant of the I2C_EEPROM option.
+ See the help of I2C_EEPROM for details.
+
  endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 10265c8fb4..21f7e6c6f5 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
  endif
  obj-$(CONFIG_FSL_IIM) += fsl_iim.o
  obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
-obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o
+obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
  obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
  obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
  obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o


Best Regards,
Wenyou Yang

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Re: [U-Boot] [PATCH v3 0/8] sf: improve support of (Q)SPI flash memories

[Yang, Wenyou]

On 2017/8/30 13:41, Bin Meng wrote:

On Wed, Aug 30, 2017 at 1:27 PM, Yang, Wenyou <wenyou.y...@microchip.com> wrote:


On 2017/8/30 11:43, Bin Meng wrote:

On Wed, Aug 30, 2017 at 11:25 AM, Yang, Wenyou
<wenyou.y...@microchip.com> wrote:


On 2017/8/26 14:34, Jagan Teki wrote:

Hi,

Thanks for the changes.

On Tue, Jul 25, 2017 at 12:30 PM, Wenyou Yang
<wenyou.y...@microchip.com>
wrote:

This series of patches are based and have been tested on the 'master'
branch of the u-boot.git tree.

Tests were passed with a sama5d2 xplained board which embeds both SPI
and
QSPI controllers.

The following tests have been passed:

- QSPI0 + Macronix MX25L25673G:
 + probe: OK
 + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
 + Page Program 1-1-4 at offset 0x1: OK
   The Macronix datasheet tells that only Page Program 1-4-4 is
   supported, not Page Program 1-1-4, however it worked, I don't
know
   why...

- QSPI0 + Microchip SST26
 + probe: OK
 + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
 + Page Program 1-1-1 at offset 0x1: OK
   SST26 memories support Page Program 1-4-4 but with the op code of
   Page Program 1-1-4, which is not standard so I don't use it.

- QSPI0 + Adesto AT25DF321A
 + probe: OK
 + Fast Read 1-1-1 at offset 0x1 (u-boot env): OK
 + Page Program 1-1-1 at offset 0x1: OK

- SPI0 + Adesto AT25DF321A
 + probe: OK
 + Fast Read 1-1-1 at offset 0x6000 (u-boot env): OK
 + Page Program 1-1-1 at offest 0x6000: OK

- SPI1 + Atmel AT45
 + probe: OK
 + Read at offset 0 and other than 0: OK
 + Write at offset 0 and other than 0: OK

During my tests, I used:
 - setenv/saveenv, reboot, printenv
 or
 - sf probe, sf read, sf write, sf erase and sf update.

Changes in v3:
- Add the include  to fix build error for corvus_defconfig.

Changes in v2:
- Rebase on the latest u-boot/master(2710d54f5).

Cyrille Pitchen (8):
 spi: add support of SPI flash commands
 sf: describe all SPI flash commands with 'struct spi_flash_command'
 sf: select the relevant SPI flash protocol for read and write
commands
 sf: differentiate Page Program 1-1-4 and 1-4-4
 sf: add 'addr_len' member to 'struct spi_flash'
 sf: add new option to support SPI flash above 16MiB
 sf: add support to Microchip SST26 QSPI memories
 sf: add driver for Atmel QSPI controller

Comments:
How about writing struct spi_flash_command in spi_flash area
(include/spi_flash.h)? and then write atmel_qspi with
UCLASS_SPI_FLASH?

Testing:
Basic testing works fine.

Issues:
- Build issue: with zynq_microzed_defconfig
drivers/mtd/spi/spi_flash.c: In function ‘spi_flash_scan’:
drivers/mtd/spi/spi_flash.c:1049:7: warning: variable ‘above_16MB’ set
but not used [-Wunused-but-set-variable]
 bool above_16MB;
  ^~
 CC  spl/lib/membuff.o

- issue with spi_flash_cmd_read_ops 4BAIS
Need to calculate bank length only if BAR is in use. Otherwise,
consider the given len as read_len.

Will send separate patch for this.

Will You send a separate patch? or I include it in this patch set?

This should not be a separate patch. Since every patch needs to pass
buildman testing.

But it is not introduced by this patch set. So should be a separate patch to
fix.

Do you mean the build warnings exist in current u-boot/master?
Here are two issue, one is the build warning, other is the issue with 
spi_flash_cmd_read_ops.
The build warning is related with this patch, I will fix it in the next 
version.
But  the issue with spi_flash_cmd_read_ops on bank length is not related 
with this patch.




If so, Jagan can you please explain why you mention this? This is
nothing related to this patch review.

Regards,
Bin


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v3 0/8] sf: improve support of (Q)SPI flash memories

[Yang, Wenyou]

On 2017/8/30 11:43, Bin Meng wrote:

On Wed, Aug 30, 2017 at 11:25 AM, Yang, Wenyou
<wenyou.y...@microchip.com> wrote:


On 2017/8/26 14:34, Jagan Teki wrote:

Hi,

Thanks for the changes.

On Tue, Jul 25, 2017 at 12:30 PM, Wenyou Yang <wenyou.y...@microchip.com>
wrote:

This series of patches are based and have been tested on the 'master'
branch of the u-boot.git tree.

Tests were passed with a sama5d2 xplained board which embeds both SPI and
QSPI controllers.

The following tests have been passed:

- QSPI0 + Macronix MX25L25673G:
+ probe: OK
+ Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
+ Page Program 1-1-4 at offset 0x1: OK
  The Macronix datasheet tells that only Page Program 1-4-4 is
  supported, not Page Program 1-1-4, however it worked, I don't know
  why...

- QSPI0 + Microchip SST26
+ probe: OK
+ Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
+ Page Program 1-1-1 at offset 0x1: OK
  SST26 memories support Page Program 1-4-4 but with the op code of
  Page Program 1-1-4, which is not standard so I don't use it.

- QSPI0 + Adesto AT25DF321A
+ probe: OK
+ Fast Read 1-1-1 at offset 0x1 (u-boot env): OK
+ Page Program 1-1-1 at offset 0x1: OK

- SPI0 + Adesto AT25DF321A
+ probe: OK
+ Fast Read 1-1-1 at offset 0x6000 (u-boot env): OK
+ Page Program 1-1-1 at offest 0x6000: OK

- SPI1 + Atmel AT45
+ probe: OK
+ Read at offset 0 and other than 0: OK
+ Write at offset 0 and other than 0: OK

During my tests, I used:
- setenv/saveenv, reboot, printenv
or
- sf probe, sf read, sf write, sf erase and sf update.

Changes in v3:
   - Add the include  to fix build error for corvus_defconfig.

Changes in v2:
   - Rebase on the latest u-boot/master(2710d54f5).

Cyrille Pitchen (8):
spi: add support of SPI flash commands
sf: describe all SPI flash commands with 'struct spi_flash_command'
sf: select the relevant SPI flash protocol for read and write commands
sf: differentiate Page Program 1-1-4 and 1-4-4
sf: add 'addr_len' member to 'struct spi_flash'
sf: add new option to support SPI flash above 16MiB
sf: add support to Microchip SST26 QSPI memories
sf: add driver for Atmel QSPI controller

Comments:
How about writing struct spi_flash_command in spi_flash area
(include/spi_flash.h)? and then write atmel_qspi with
UCLASS_SPI_FLASH?

Testing:
Basic testing works fine.

Issues:
- Build issue: with zynq_microzed_defconfig
drivers/mtd/spi/spi_flash.c: In function ‘spi_flash_scan’:
drivers/mtd/spi/spi_flash.c:1049:7: warning: variable ‘above_16MB’ set
but not used [-Wunused-but-set-variable]
bool above_16MB;
 ^~
CC  spl/lib/membuff.o

- issue with spi_flash_cmd_read_ops 4BAIS
Need to calculate bank length only if BAR is in use. Otherwise,
consider the given len as read_len.

Will send separate patch for this.

Will You send a separate patch? or I include it in this patch set?

This should not be a separate patch. Since every patch needs to pass
buildman testing.
But it is not introduced by this patch set. So should be a separate 
patch to fix.



diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 89ceae2..b5d8ef3 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -558,13 +558,15 @@ int spi_flash_cmd_read_ops(struct spi_flash
*flash, u32 offset,
   if (ret < 0)
   return ret;
   bank_sel = flash->bank_curr;
-#endif
   remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
   (bank_sel + 1)) - offset;
   if (len < remain_len)
   read_len = len;
   else
   read_len = remain_len;
+#else
+read_len = len;
+#endif

   cmd.addr = read_addr;
   cmd.data_len = read_len;


Regards,
Bin


Best Regards,
Wenyou Yang

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Re: [U-Boot] [PATCH v3 0/8] sf: improve support of (Q)SPI flash memories

[Yang, Wenyou]

On 2017/8/26 14:34, Jagan Teki wrote:

Hi,

Thanks for the changes.

On Tue, Jul 25, 2017 at 12:30 PM, Wenyou Yang  wrote:

This series of patches are based and have been tested on the 'master'
branch of the u-boot.git tree.

Tests were passed with a sama5d2 xplained board which embeds both SPI and
QSPI controllers.

The following tests have been passed:

- QSPI0 + Macronix MX25L25673G:
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-4 at offset 0x1: OK
 The Macronix datasheet tells that only Page Program 1-4-4 is
 supported, not Page Program 1-1-4, however it worked, I don't know
 why...

- QSPI0 + Microchip SST26
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK
 SST26 memories support Page Program 1-4-4 but with the op code of
 Page Program 1-1-4, which is not standard so I don't use it.

- QSPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK

- SPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x6000 (u-boot env): OK
   + Page Program 1-1-1 at offest 0x6000: OK

- SPI1 + Atmel AT45
   + probe: OK
   + Read at offset 0 and other than 0: OK
   + Write at offset 0 and other than 0: OK

During my tests, I used:
   - setenv/saveenv, reboot, printenv
   or
   - sf probe, sf read, sf write, sf erase and sf update.

Changes in v3:
  - Add the include  to fix build error for corvus_defconfig.

Changes in v2:
  - Rebase on the latest u-boot/master(2710d54f5).

Cyrille Pitchen (8):
   spi: add support of SPI flash commands
   sf: describe all SPI flash commands with 'struct spi_flash_command'
   sf: select the relevant SPI flash protocol for read and write commands
   sf: differentiate Page Program 1-1-4 and 1-4-4
   sf: add 'addr_len' member to 'struct spi_flash'
   sf: add new option to support SPI flash above 16MiB
   sf: add support to Microchip SST26 QSPI memories
   sf: add driver for Atmel QSPI controller

Comments:
How about writing struct spi_flash_command in spi_flash area
(include/spi_flash.h)? and then write atmel_qspi with
UCLASS_SPI_FLASH?

Testing:
Basic testing works fine.

Issues:
- Build issue: with zynq_microzed_defconfig
drivers/mtd/spi/spi_flash.c: In function ‘spi_flash_scan’:
drivers/mtd/spi/spi_flash.c:1049:7: warning: variable ‘above_16MB’ set
but not used [-Wunused-but-set-variable]
   bool above_16MB;
^~
   CC  spl/lib/membuff.o

- issue with spi_flash_cmd_read_ops 4BAIS
Need to calculate bank length only if BAR is in use. Otherwise,
consider the given len as read_len.

Will send separate patch for this.

Will You send a separate patch? or I include it in this patch set?

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 89ceae2..b5d8ef3 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -558,13 +558,15 @@ int spi_flash_cmd_read_ops(struct spi_flash
*flash, u32 offset,
  if (ret < 0)
  return ret;
  bank_sel = flash->bank_curr;
-#endif
  remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
  (bank_sel + 1)) - offset;
  if (len < remain_len)
  read_len = len;
  else
  read_len = remain_len;
+#else
+read_len = len;
+#endif

  cmd.addr = read_addr;
  cmd.data_len = read_len;

thanks!


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v3 0/8] sf: improve support of (Q)SPI flash memories

[Yang, Wenyou]

Hi Jagan,

On 2017/8/26 14:34, Jagan Teki wrote:

Hi,

Thanks for the changes.

On Tue, Jul 25, 2017 at 12:30 PM, Wenyou Yang  wrote:

This series of patches are based and have been tested on the 'master'
branch of the u-boot.git tree.

Tests were passed with a sama5d2 xplained board which embeds both SPI and
QSPI controllers.

The following tests have been passed:

- QSPI0 + Macronix MX25L25673G:
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-4 at offset 0x1: OK
 The Macronix datasheet tells that only Page Program 1-4-4 is
 supported, not Page Program 1-1-4, however it worked, I don't know
 why...

- QSPI0 + Microchip SST26
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK
 SST26 memories support Page Program 1-4-4 but with the op code of
 Page Program 1-1-4, which is not standard so I don't use it.

- QSPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK

- SPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x6000 (u-boot env): OK
   + Page Program 1-1-1 at offest 0x6000: OK

- SPI1 + Atmel AT45
   + probe: OK
   + Read at offset 0 and other than 0: OK
   + Write at offset 0 and other than 0: OK

During my tests, I used:
   - setenv/saveenv, reboot, printenv
   or
   - sf probe, sf read, sf write, sf erase and sf update.

Changes in v3:
  - Add the include  to fix build error for corvus_defconfig.

Changes in v2:
  - Rebase on the latest u-boot/master(2710d54f5).

Cyrille Pitchen (8):
   spi: add support of SPI flash commands
   sf: describe all SPI flash commands with 'struct spi_flash_command'
   sf: select the relevant SPI flash protocol for read and write commands
   sf: differentiate Page Program 1-1-4 and 1-4-4
   sf: add 'addr_len' member to 'struct spi_flash'
   sf: add new option to support SPI flash above 16MiB
   sf: add support to Microchip SST26 QSPI memories
   sf: add driver for Atmel QSPI controller

Comments:
How about writing struct spi_flash_command in spi_flash area
(include/spi_flash.h)? and then write atmel_qspi with
UCLASS_SPI_FLASH?
The spi_flash_command struct describes the relevant features of the spi 
controller, instead of the spi_flash device.
The purpose of patch set is used to supersede the spi_xfer() function to 
access the spi_flash device.
So putting it in include/spi.h is suitable, we should not move it in the 
spi_flash area.


Moreover, why do we write atmel_qspi with  UCLASS_SPI_FLASH?  It is not 
easy to understand.


Testing:
Basic testing works fine.

Issues:
- Build issue: with zynq_microzed_defconfig
drivers/mtd/spi/spi_flash.c: In function ‘spi_flash_scan’:
drivers/mtd/spi/spi_flash.c:1049:7: warning: variable ‘above_16MB’ set
but not used [-Wunused-but-set-variable]
   bool above_16MB;


Will send a new version to fix it.  Thanks a lot.


^~
   CC  spl/lib/membuff.o

- issue with spi_flash_cmd_read_ops 4BAIS
Need to calculate bank length only if BAR is in use. Otherwise,
consider the given len as read_len.

Will send separate patch for this.

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 89ceae2..b5d8ef3 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -558,13 +558,15 @@ int spi_flash_cmd_read_ops(struct spi_flashmake
*flash, u32 offset,
  if (ret < 0)
  return ret;
  bank_sel = flash->bank_curr;
-#endif
  remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
  (bank_sel + 1)) - offset;
  if (len < remain_len)
  read_len = len;
  else
  read_len = remain_len;
+#else
+read_len = len;
+#endif

  cmd.addr = read_addr;
  cmd.data_len = read_len;
thanks!


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v3 0/8] sf: improve support of (Q)SPI flash memories

[Yang, Wenyou]

Hi,

This patch set has been here for a long time, could you have a look and 
take it?



Best Regards,

Wenyou Yang


On 2017/7/25 15:00, Wenyou Yang wrote:

This series of patches are based and have been tested on the 'master'
branch of the u-boot.git tree.

Tests were passed with a sama5d2 xplained board which embeds both SPI and
QSPI controllers.

The following tests have been passed:

- QSPI0 + Macronix MX25L25673G:
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-4 at offset 0x1: OK
 The Macronix datasheet tells that only Page Program 1-4-4 is
 supported, not Page Program 1-1-4, however it worked, I don't know
 why...

- QSPI0 + Microchip SST26
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK
 SST26 memories support Page Program 1-4-4 but with the op code of
 Page Program 1-1-4, which is not standard so I don't use it.

- QSPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK

- SPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x6000 (u-boot env): OK
   + Page Program 1-1-1 at offest 0x6000: OK

- SPI1 + Atmel AT45
   + probe: OK
   + Read at offset 0 and other than 0: OK
   + Write at offset 0 and other than 0: OK

During my tests, I used:
   - setenv/saveenv, reboot, printenv
   or
   - sf probe, sf read, sf write, sf erase and sf update.

Changes in v3:
  - Add the include  to fix build error for corvus_defconfig.

Changes in v2:
  - Rebase on the latest u-boot/master(2710d54f5).

Cyrille Pitchen (8):
   spi: add support of SPI flash commands
   sf: describe all SPI flash commands with 'struct spi_flash_command'
   sf: select the relevant SPI flash protocol for read and write commands
   sf: differentiate Page Program 1-1-4 and 1-4-4
   sf: add 'addr_len' member to 'struct spi_flash'
   sf: add new option to support SPI flash above 16MiB
   sf: add support to Microchip SST26 QSPI memories
   sf: add driver for Atmel QSPI controller

  drivers/mtd/spi/Kconfig |  16 +-
  drivers/mtd/spi/sf.c|  78 ++--
  drivers/mtd/spi/sf_dataflash.c  | 119 ++--
  drivers/mtd/spi/sf_internal.h   |  48 +++--
  drivers/mtd/spi/spi_flash.c | 341 +++--
  drivers/mtd/spi/spi_flash_ids.c |   5 +
  drivers/spi/Kconfig |   7 +
  drivers/spi/Makefile|   1 +
  drivers/spi/atmel_qspi.c| 404 
  drivers/spi/atmel_qspi.h| 169 +
  drivers/spi/spi-uclass.c|  40 
  drivers/spi/spi.c   |  13 ++
  include/spi.h   | 168 +
  include/spi_flash.h |   7 +
  14 files changed, 1226 insertions(+), 190 deletions(-)
  create mode 100644 drivers/spi/atmel_qspi.c
  create mode 100644 drivers/spi/atmel_qspi.h



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Re: [U-Boot] [PATCH v2 0/6] board: atmel: Add new board SAMA5D27-SOM1-EK board.

[Yang, Wenyou]

Hi,

Do you have comments on this patch series?


Best Regards,
Wenyou Yang

On 2017/7/31 14:57, Wenyou Yang wrote:

The SAMA5D27-SOM1-EK board embeds a SAMA5D27 SOM1 module, which includes
a SAMA5D27-SiP chip and QSPI flash, Phy and MAC EEPROM. The SAMA5D27 SiP
integrates the SAMA5D2 with 1Gbit DDR2-SDRAM in a single package.
It is based on
1./ [PATCH v2 0/8] sf: improve support of (Q)SPI flash memories
https://lists.denx.de/pipermail/u-boot/2017-July/298806.html
2./ [PATCH v2 0/3] board: atmel: Set the ethernet mac address from 
eeprom
https://lists.denx.de/pipermail/u-boot/2017-July/300527.html
3./ [PATCH 0/7] board: atmel: Convert to support DM_VIDEO
https://lists.denx.de/pipermail/u-boot/2017-July/300533.html

Changes in v2:
  - Add the reviewed-by tag.
  - Add the help in Kconfig to describe the board and peripherals.
  - Add the code to display the company's logo and board information.
  - Replace the code to set the ethernet mac address with the common
code from the board/atmel/common folder.

Wenyou Yang (6):
   ARM: at91: spl: Adjust switching to oscillator for SAMA5D2
   ARM: at91: spl: Add mck function to lower rate while switching
   ARM: at91: spl: Add boot device for boot from QSPI
   ARM: at91: mach: Add missing defines of MPDDRC
   ARM: at91: Get the Chip ID of SAMA5D2 SiP
   board: atmel: Add SAMA5D27 SOM1 EK board

  arch/arm/dts/Makefile   |   3 +
  arch/arm/dts/at91-sama5d27_som1_ek.dts  | 215 
  arch/arm/dts/sama5d2.dtsi   |  20 +++
  arch/arm/dts/sama5d27_som1.dtsi | 159 ++
  arch/arm/mach-at91/Kconfig  |  14 ++
  arch/arm/mach-at91/armv7/clock.c|  36 
  arch/arm/mach-at91/armv7/sama5d2_devices.c  |  26 ++-
  arch/arm/mach-at91/include/mach/at91_common.h   |   1 +
  arch/arm/mach-at91/include/mach/at91_pmc.h  |   2 +
  arch/arm/mach-at91/include/mach/atmel_mpddrc.h  |   4 +
  arch/arm/mach-at91/include/mach/sama5d2.h   |   7 +-
  arch/arm/mach-at91/spl.c|   2 +
  arch/arm/mach-at91/spl_atmel.c  |  18 +-
  board/atmel/sama5d27_som1_ek/Kconfig|  15 ++
  board/atmel/sama5d27_som1_ek/MAINTAINERS|   6 +
  board/atmel/sama5d27_som1_ek/Makefile   |   8 +
  board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 189 +
  configs/sama5d27_som1_ek_mmc_defconfig  |  86 ++
  configs/sama5d27_som1_ek_spiflash_defconfig |  86 ++
  include/configs/sama5d27_som1_ek.h  |  95 +++
  20 files changed, 988 insertions(+), 4 deletions(-)
  create mode 100644 arch/arm/dts/at91-sama5d27_som1_ek.dts
  create mode 100644 arch/arm/dts/sama5d27_som1.dtsi
  create mode 100644 board/atmel/sama5d27_som1_ek/Kconfig
  create mode 100644 board/atmel/sama5d27_som1_ek/MAINTAINERS
  create mode 100644 board/atmel/sama5d27_som1_ek/Makefile
  create mode 100644 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
  create mode 100644 configs/sama5d27_som1_ek_mmc_defconfig
  create mode 100644 configs/sama5d27_som1_ek_spiflash_defconfig
  create mode 100644 include/configs/sama5d27_som1_ek.h



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Re: [U-Boot] SAMA5D2 series

[Yang, Wenyou]

Hi Andy,


On 2017/8/24 14:52, Andy Pont wrote:

Hello Wenyou,

We are looking at using one of the SAMA5D2 family in an upcoming design and
I have a couple of questions...

In a recent U-Boot patch set you mentioned the SAMA5D27 SOM1 SiP module.  Is
this something that is available yet as I can't find it on the Microchip
website?

If we choose to use the processor, memory, etc. as discrete devices is the
boot process still AT91Bootstrap -> U-Boot -> Linux or does it now support
U-Boot SPL and Falcon boot mode?


The SAMA5D27 SOM1 SiP haven't officially released yet, it is planned to 
release next month, so the stuff is available soon at the website.


Yes, it supports U-Boot SPL, and I didn't test Falcom boot mode so far.



The current mainline implementation of arch/arm/mach-at91/spl.c seems to
suggest that booting from a QSPI device isn't supported.  Which of the
supported boot devices will give the fastest boot time?

Booting from a QSPI device is supported.

For the source code, I suggest you visit the following git repository.
https://github.com/linux4sam/at91bootstrap
https://github.com/linux4sam/u-boot-at91
https://github.com/linux4sam/linux-at91

For the fastest booting, frankly,  I have no idea. Maybe QSPI is better.



Thanks,

Andy.


Best Regards,
Wenyou Yang

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Re: [U-Boot] [PATCH 0/5] configs: at91: Remove value of CONFIG_SYS_EXTRA_OPTIONS option

[Yang, Wenyou]

Hi

Please comment this patch series.


On 2017/8/4 9:20, Wenyou Yang wrote:

The CONFIG_SYS_EXTRA_OPTIONS option is deprecated, remove the value
of this option from the board default config files.


Wenyou Yang (5):
   ARM: at91: Move CONFIG_AT91FAMILY option to Kconfig
   ARM: at91: Add the SoC options to Kconfig
   ARM: at91: Remove hardware.h included in configs
   ARM: at91: spl: Add macro CONFIG__BOOT support
   configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment

  arch/arm/mach-at91/Kconfig  | 111 ++--
  arch/arm/mach-at91/atmel_sfr.c  |   1 +
  arch/arm/mach-at91/include/mach/at91rm9200.h|   1 -
  arch/arm/mach-at91/include/mach/at91sam9260.h   |   5 --
  arch/arm/mach-at91/include/mach/at91sam9261.h   |   5 --
  arch/arm/mach-at91/include/mach/at91sam9263.h   |   5 --
  arch/arm/mach-at91/include/mach/at91sam9g45.h   |   5 --
  arch/arm/mach-at91/include/mach/at91sam9rl.h|   5 --
  arch/arm/mach-at91/include/mach/at91sam9x5.h|   2 -
  arch/arm/mach-at91/include/mach/sama5d2.h   |   5 --
  arch/arm/mach-at91/include/mach/sama5d3.h   |   5 --
  arch/arm/mach-at91/include/mach/sama5d4.h   |   5 --
  arch/arm/mach-at91/matrix.c |   1 +
  arch/arm/mach-at91/phy.c|   1 +
  arch/arm/mach-at91/spl.c|  16 ++--
  board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c |   4 +-
  board/atmel/at91sam9n12ek/at91sam9n12ek.c   |   6 +-
  board/atmel/at91sam9x5ek/at91sam9x5ek.c |   4 +-
  board/atmel/sama5d2_ptc/sama5d2_ptc.c   |   4 +-
  board/atmel/sama5d3_xplained/sama5d3_xplained.c |   4 +-
  board/atmel/sama5d3xek/sama5d3xek.c |   2 +-
  board/atmel/sama5d4_xplained/sama5d4_xplained.c |   2 +-
  board/atmel/sama5d4ek/sama5d4ek.c   |   2 +-
  configs/at91sam9m10g45ek_mmc_defconfig  |   2 +-
  configs/at91sam9m10g45ek_nandflash_defconfig|   2 +-
  configs/at91sam9n12ek_mmc_defconfig |   2 +-
  configs/at91sam9n12ek_nandflash_defconfig   |   2 +-
  configs/at91sam9n12ek_spiflash_defconfig|   2 +-
  configs/at91sam9x5ek_dataflash_defconfig|   2 +-
  configs/at91sam9x5ek_mmc_defconfig  |   2 +-
  configs/at91sam9x5ek_nandflash_defconfig|   2 +-
  configs/at91sam9x5ek_spiflash_defconfig |   2 +-
  configs/ma5d4evk_defconfig  |   2 +-
  configs/sama5d2_ptc_nandflash_defconfig |   2 +-
  configs/sama5d2_ptc_spiflash_defconfig  |   2 +-
  configs/sama5d2_xplained_mmc_defconfig  |   4 +-
  configs/sama5d2_xplained_spiflash_defconfig |   2 +-
  configs/sama5d36ek_cmp_mmc_defconfig|   2 +-
  configs/sama5d36ek_cmp_nandflash_defconfig  |   2 +-
  configs/sama5d36ek_cmp_spiflash_defconfig   |   2 +-
  configs/sama5d3_xplained_mmc_defconfig  |   2 +-
  configs/sama5d3_xplained_nandflash_defconfig|   2 +-
  configs/sama5d3xek_mmc_defconfig|   2 +-
  configs/sama5d3xek_nandflash_defconfig  |   2 +-
  configs/sama5d3xek_spiflash_defconfig   |   2 +-
  configs/sama5d4_xplained_mmc_defconfig  |   2 +-
  configs/sama5d4_xplained_nandflash_defconfig|   2 +-
  configs/sama5d4_xplained_spiflash_defconfig |   2 +-
  configs/sama5d4ek_mmc_defconfig |   2 +-
  configs/sama5d4ek_nandflash_defconfig   |   2 +-
  configs/sama5d4ek_spiflash_defconfig|   2 +-
  configs/vinco_defconfig |   2 +-
  drivers/pinctrl/pinctrl-at91.c  |   1 +
  include/configs/at91-sama5_common.h |   8 +-
  include/configs/at91sam9m10g45ek.h  |  12 ++-
  include/configs/at91sam9n12ek.h |  29 +++
  include/configs/at91sam9x5ek.h  |  27 +++---
  include/configs/ma5d4evk.h  |   9 +-
  include/configs/sama5d2_ptc.h   |  16 ++--
  include/configs/sama5d2_xplained.h  |   8 +-
  include/configs/sama5d3_xplained.h  |  21 +++--
  include/configs/sama5d3xek.h|  29 +++
  include/configs/sama5d4_xplained.h  |  24 ++---
  include/configs/sama5d4ek.h |  24 ++---
  include/configs/vinco.h |  13 +--
  65 files changed, 245 insertions(+), 237 deletions(-)



Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 0/5] configs: at91: Remove value of CONFIG_SYS_EXTRA_OPTIONS option

[Yang, Wenyou]

Hi All,

Do you have any comments on this patch set?


Best Regards,
Wenyou Yang

On 2017/8/4 9:20, Wenyou Yang wrote:

The CONFIG_SYS_EXTRA_OPTIONS option is deprecated, remove the value
of this option from the board default config files.


Wenyou Yang (5):
   ARM: at91: Move CONFIG_AT91FAMILY option to Kconfig
   ARM: at91: Add the SoC options to Kconfig
   ARM: at91: Remove hardware.h included in configs
   ARM: at91: spl: Add macro CONFIG__BOOT support
   configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment

  arch/arm/mach-at91/Kconfig  | 111 ++--
  arch/arm/mach-at91/atmel_sfr.c  |   1 +
  arch/arm/mach-at91/include/mach/at91rm9200.h|   1 -
  arch/arm/mach-at91/include/mach/at91sam9260.h   |   5 --
  arch/arm/mach-at91/include/mach/at91sam9261.h   |   5 --
  arch/arm/mach-at91/include/mach/at91sam9263.h   |   5 --
  arch/arm/mach-at91/include/mach/at91sam9g45.h   |   5 --
  arch/arm/mach-at91/include/mach/at91sam9rl.h|   5 --
  arch/arm/mach-at91/include/mach/at91sam9x5.h|   2 -
  arch/arm/mach-at91/include/mach/sama5d2.h   |   5 --
  arch/arm/mach-at91/include/mach/sama5d3.h   |   5 --
  arch/arm/mach-at91/include/mach/sama5d4.h   |   5 --
  arch/arm/mach-at91/matrix.c |   1 +
  arch/arm/mach-at91/phy.c|   1 +
  arch/arm/mach-at91/spl.c|  16 ++--
  board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c |   4 +-
  board/atmel/at91sam9n12ek/at91sam9n12ek.c   |   6 +-
  board/atmel/at91sam9x5ek/at91sam9x5ek.c |   4 +-
  board/atmel/sama5d2_ptc/sama5d2_ptc.c   |   4 +-
  board/atmel/sama5d3_xplained/sama5d3_xplained.c |   4 +-
  board/atmel/sama5d3xek/sama5d3xek.c |   2 +-
  board/atmel/sama5d4_xplained/sama5d4_xplained.c |   2 +-
  board/atmel/sama5d4ek/sama5d4ek.c   |   2 +-
  configs/at91sam9m10g45ek_mmc_defconfig  |   2 +-
  configs/at91sam9m10g45ek_nandflash_defconfig|   2 +-
  configs/at91sam9n12ek_mmc_defconfig |   2 +-
  configs/at91sam9n12ek_nandflash_defconfig   |   2 +-
  configs/at91sam9n12ek_spiflash_defconfig|   2 +-
  configs/at91sam9x5ek_dataflash_defconfig|   2 +-
  configs/at91sam9x5ek_mmc_defconfig  |   2 +-
  configs/at91sam9x5ek_nandflash_defconfig|   2 +-
  configs/at91sam9x5ek_spiflash_defconfig |   2 +-
  configs/ma5d4evk_defconfig  |   2 +-
  configs/sama5d2_ptc_nandflash_defconfig |   2 +-
  configs/sama5d2_ptc_spiflash_defconfig  |   2 +-
  configs/sama5d2_xplained_mmc_defconfig  |   4 +-
  configs/sama5d2_xplained_spiflash_defconfig |   2 +-
  configs/sama5d36ek_cmp_mmc_defconfig|   2 +-
  configs/sama5d36ek_cmp_nandflash_defconfig  |   2 +-
  configs/sama5d36ek_cmp_spiflash_defconfig   |   2 +-
  configs/sama5d3_xplained_mmc_defconfig  |   2 +-
  configs/sama5d3_xplained_nandflash_defconfig|   2 +-
  configs/sama5d3xek_mmc_defconfig|   2 +-
  configs/sama5d3xek_nandflash_defconfig  |   2 +-
  configs/sama5d3xek_spiflash_defconfig   |   2 +-
  configs/sama5d4_xplained_mmc_defconfig  |   2 +-
  configs/sama5d4_xplained_nandflash_defconfig|   2 +-
  configs/sama5d4_xplained_spiflash_defconfig |   2 +-
  configs/sama5d4ek_mmc_defconfig |   2 +-
  configs/sama5d4ek_nandflash_defconfig   |   2 +-
  configs/sama5d4ek_spiflash_defconfig|   2 +-
  configs/vinco_defconfig |   2 +-
  drivers/pinctrl/pinctrl-at91.c  |   1 +
  include/configs/at91-sama5_common.h |   8 +-
  include/configs/at91sam9m10g45ek.h  |  12 ++-
  include/configs/at91sam9n12ek.h |  29 +++
  include/configs/at91sam9x5ek.h  |  27 +++---
  include/configs/ma5d4evk.h  |   9 +-
  include/configs/sama5d2_ptc.h   |  16 ++--
  include/configs/sama5d2_xplained.h  |   8 +-
  include/configs/sama5d3_xplained.h  |  21 +++--
  include/configs/sama5d3xek.h|  29 +++
  include/configs/sama5d4_xplained.h  |  24 ++---
  include/configs/sama5d4ek.h |  24 ++---
  include/configs/vinco.h |  13 +--
  65 files changed, 245 insertions(+), 237 deletions(-)



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Re: [U-Boot] board: atmel: Enable to use new timer driver

[Yang, Wenyou]

Hi Tom,

On 2017/8/14 0:00, Tom Rini wrote:

On Fri, Aug 04, 2017 at 08:39:33AM +0800, wenyou.y...@microchip.com wrote:


Use the Atmel PIT timer driver which supports the driver model
and device tree.

Signed-off-by: Wenyou Yang 

As-is this breaks:
at91sam9x5ek_nandflash sama5d36ek_cmp_spiflash at91sam9x5ek_mmc
sama5d4ek_nandflash sama5d3xek_nandflash sama5d3xek_spiflash
at91sam9n12ek_nandflash at91sam9n12ek_spiflash sama5d4_xplained_mmc
sama5d4ek_spiflash at91sam9n12ek_mmc at91sam9m10g45ek_nandflash
sama5d4_xplained_nandflash sama5d3xek_mmc at91sam9x5ek_spiflash
sama5d2_xplained_spiflash sama5d2_xplained_mmc sama5d36ek_cmp_nandflash
sama5d4ek_mmc sama5d4_xplained_spiflash at91sam9m10g45ek_mmc
sama5d3_xplained_nandflash sama5d36ek_cmp_mmc at91sam9x5ek_dataflash
gurnard sama5d3_xplained_mmc

Will fix in the new version.

Thank you.

Wenyou Yang
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Re: [U-Boot] [PATCH v3 0/8] sf: improve support of (Q)SPI flash memories

[Yang, Wenyou]

Hi All,

Do you have some comment on it?


On 2017/7/25 15:00, Wenyou Yang wrote:

This series of patches are based and have been tested on the 'master'
branch of the u-boot.git tree.

Tests were passed with a sama5d2 xplained board which embeds both SPI and
QSPI controllers.

The following tests have been passed:

- QSPI0 + Macronix MX25L25673G:
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-4 at offset 0x1: OK
 The Macronix datasheet tells that only Page Program 1-4-4 is
 supported, not Page Program 1-1-4, however it worked, I don't know
 why...

- QSPI0 + Microchip SST26
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK
 SST26 memories support Page Program 1-4-4 but with the op code of
 Page Program 1-1-4, which is not standard so I don't use it.

- QSPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK

- SPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x6000 (u-boot env): OK
   + Page Program 1-1-1 at offest 0x6000: OK

- SPI1 + Atmel AT45
   + probe: OK
   + Read at offset 0 and other than 0: OK
   + Write at offset 0 and other than 0: OK

During my tests, I used:
   - setenv/saveenv, reboot, printenv
   or
   - sf probe, sf read, sf write, sf erase and sf update.

Changes in v3:
  - Add the include  to fix build error for corvus_defconfig.

Changes in v2:
  - Rebase on the latest u-boot/master(2710d54f5).

Cyrille Pitchen (8):
   spi: add support of SPI flash commands
   sf: describe all SPI flash commands with 'struct spi_flash_command'
   sf: select the relevant SPI flash protocol for read and write commands
   sf: differentiate Page Program 1-1-4 and 1-4-4
   sf: add 'addr_len' member to 'struct spi_flash'
   sf: add new option to support SPI flash above 16MiB
   sf: add support to Microchip SST26 QSPI memories
   sf: add driver for Atmel QSPI controller

  drivers/mtd/spi/Kconfig |  16 +-
  drivers/mtd/spi/sf.c|  78 ++--
  drivers/mtd/spi/sf_dataflash.c  | 119 ++--
  drivers/mtd/spi/sf_internal.h   |  48 +++--
  drivers/mtd/spi/spi_flash.c | 341 +++--
  drivers/mtd/spi/spi_flash_ids.c |   5 +
  drivers/spi/Kconfig |   7 +
  drivers/spi/Makefile|   1 +
  drivers/spi/atmel_qspi.c| 404 
  drivers/spi/atmel_qspi.h| 169 +
  drivers/spi/spi-uclass.c|  40 
  drivers/spi/spi.c   |  13 ++
  include/spi.h   | 168 +
  include/spi_flash.h |   7 +
  14 files changed, 1226 insertions(+), 190 deletions(-)
  create mode 100644 drivers/spi/atmel_qspi.c
  create mode 100644 drivers/spi/atmel_qspi.h


Best Regards,
Wenyou Yang

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Re: [U-Boot] board: sama5d2_xplained: Make SPL work on spiflash

[Yang, Wenyou]

Hi Tom,


On 2017/8/7 21:55, Tom Rini wrote:

On Thu, Jul 20, 2017 at 04:28:47PM +0800, wenyou.y...@microchip.com wrote:


Because before switching to a lower clock source, we must switch
the clock source first instead of last. So before configuring the
PMC_MCKR register, invoke at91_mck_init_down() first.

As said in datasheet, the the size of SPL must not exceed the maximum
size allowed(64Kbytes).

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 
---
The patch is based on
 [PATCH 0/6] board: atmel: Add new board: SAMA5D27-SOM1-EK board
 https://lists.denx.de/pipermail/u-boot/2017-July/298815.html

  board/atmel/sama5d2_xplained/sama5d2_xplained.c | 10 ++
  include/configs/sama5d2_xplained.h  |  2 +-
  2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c 
b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 48f45b35ce..8fd7eb8af1 100644
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -285,6 +285,16 @@ void at91_pmc_init(void)
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
u32 tmp;
  
+	/*

+* while coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz
+* so we need to slow down and configure MCKR accordingly.
+* This is why we have a special flavor of the switching function.
+*/
+   tmp = AT91_PMC_MCKR_PLLADIV_2 |
+ AT91_PMC_MCKR_MDIV_3 |
+ AT91_PMC_MCKR_CSS_MAIN;
+   at91_mck_init_down(tmp);

What patch adds the at91_mck_init_down function?  Thanks!

It is in the patch,
https://lists.denx.de/pipermail/u-boot/2017-August/30.html

Best Regards,
Wenyou Yang
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Re: [U-Boot] board: ethernut5: Update to support DT and DM

[Yang, Wenyou]

On 2017/8/7 21:55, Tom Rini wrote:

On Fri, Jul 21, 2017 at 02:30:57PM +0800, wenyou.y...@microchip.com wrote:


Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 

Applied to u-boot/master.  However:
Warning (reg_format): "reg" property in /i2c-gpio-0/pcf8563@50 has
invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells
value for /i2c-gpio-0/pcf8563@50
Warning (avoid_default_addr_size): Relying on default #size-cells value
for /i2c-gpio-0/pcf8563@50

Please fix and push to the kernel as well as U-Boot, thanks!

Yes, I will send the patch.


Best Regards,
Wenyou Yang

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Re: [U-Boot] [PATCH] misc: Makefile: Add condition on build i2c_eeprom

[Yang, Wenyou]

Hi Tom,


On 2017/8/2 23:31, Tom Rini wrote:

On Wed, Aug 02, 2017 at 03:47:58PM +0800, Wenyou Yang wrote:


The i2c_eeprom isn't always necessary when building for SPL,
add the condition on build i2c_eeprom.

Signed-off-by: Wenyou Yang 
---

  drivers/misc/Makefile | 6 ++
  1 file changed, 6 insertions(+)

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 10265c8fb4..ccc84c38fc 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -20,7 +20,13 @@ obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
  endif
  obj-$(CONFIG_FSL_IIM) += fsl_iim.o
  obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
+ifdef CONFIG_SPL_BUILD
+ifneq ($(CONFIG_SPL_I2C_SUPPORT),)
+obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o
+endif
+else
  obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o
+endif
  obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
  obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
  obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o

What's wrong with building this when not required?  Build failure?  If
so, we should add SPL_I2C_EEPROM and then the above becomes
obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
or so.  Thanks!

Yes, build failure.
if CONFIG_SPL_I2C_SUPPORT isn't enabled, it failed to build u-boot-spl 
with the following error.

---8<---
drivers/built-in.o: In function `i2c_eeprom_std_read':
/home/wyang/work/linux4sam/u-boot-at91/drivers/misc/i2c_eeprom.c:36: 
undefined reference to `dm_i2c_read'

scripts/Makefile.spl:333: recipe for target 'spl/u-boot-spl' failed
--->8---

Add  SPL_I2C_EEPROM is a good idea, I will send a patch.

Thank you.

Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v3 0/8] sf: improve support of (Q)SPI flash memories

[Yang, Wenyou]

Hi,

Do you have comments?


Best Regards,
Wenyou Yang

On 2017/7/25 15:00, Wenyou Yang wrote:

This series of patches are based and have been tested on the 'master'
branch of the u-boot.git tree.

Tests were passed with a sama5d2 xplained board which embeds both SPI and
QSPI controllers.

The following tests have been passed:

- QSPI0 + Macronix MX25L25673G:
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-4 at offset 0x1: OK
 The Macronix datasheet tells that only Page Program 1-4-4 is
 supported, not Page Program 1-1-4, however it worked, I don't know
 why...

- QSPI0 + Microchip SST26
   + probe: OK
   + Fast Read 1-1-4 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK
 SST26 memories support Page Program 1-4-4 but with the op code of
 Page Program 1-1-4, which is not standard so I don't use it.

- QSPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x1 (u-boot env): OK
   + Page Program 1-1-1 at offset 0x1: OK

- SPI0 + Adesto AT25DF321A
   + probe: OK
   + Fast Read 1-1-1 at offset 0x6000 (u-boot env): OK
   + Page Program 1-1-1 at offest 0x6000: OK

- SPI1 + Atmel AT45
   + probe: OK
   + Read at offset 0 and other than 0: OK
   + Write at offset 0 and other than 0: OK

During my tests, I used:
   - setenv/saveenv, reboot, printenv
   or
   - sf probe, sf read, sf write, sf erase and sf update.

Changes in v3:
  - Add the include  to fix build error for corvus_defconfig.

Changes in v2:
  - Rebase on the latest u-boot/master(2710d54f5).

Cyrille Pitchen (8):
   spi: add support of SPI flash commands
   sf: describe all SPI flash commands with 'struct spi_flash_command'
   sf: select the relevant SPI flash protocol for read and write commands
   sf: differentiate Page Program 1-1-4 and 1-4-4
   sf: add 'addr_len' member to 'struct spi_flash'
   sf: add new option to support SPI flash above 16MiB
   sf: add support to Microchip SST26 QSPI memories
   sf: add driver for Atmel QSPI controller

  drivers/mtd/spi/Kconfig |  16 +-
  drivers/mtd/spi/sf.c|  78 ++--
  drivers/mtd/spi/sf_dataflash.c  | 119 ++--
  drivers/mtd/spi/sf_internal.h   |  48 +++--
  drivers/mtd/spi/spi_flash.c | 341 +++--
  drivers/mtd/spi/spi_flash_ids.c |   5 +
  drivers/spi/Kconfig |   7 +
  drivers/spi/Makefile|   1 +
  drivers/spi/atmel_qspi.c| 404 
  drivers/spi/atmel_qspi.h| 169 +
  drivers/spi/spi-uclass.c|  40 
  drivers/spi/spi.c   |  13 ++
  include/spi.h   | 168 +
  include/spi_flash.h |   7 +
  14 files changed, 1226 insertions(+), 190 deletions(-)
  create mode 100644 drivers/spi/atmel_qspi.c
  create mode 100644 drivers/spi/atmel_qspi.h



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Re: [U-Boot] [PATCH 6/6] board: atmel: Add SAMA5D27 SOM1 EK board

[Yang, Wenyou]

Hi Simon,


On 2017/7/28 12:20, Simon Glass wrote:

Hi Wenyou,

On 20 July 2017 at 02:13, Wenyou Yang  wrote:

From: Wenyou Yang 

The SAMA5D27-SiP (System in Package) integrates the SAMA5D2
with 1Gbit DDR2-SDRAM in a single package.

The SAMA5D27 SOM1 embeds a 64Mbit QSPI flash, KSZ8081 Phy and
Mac-address EEPROM.

Signed-off-by: Wenyou Yang 
---

  arch/arm/dts/Makefile   |   3 +
  arch/arm/dts/at91-sama5d27_som1_ek.dts  | 155 ++
  arch/arm/dts/sama5d2.dtsi   |  20 +++
  arch/arm/dts/sama5d27_som1.dtsi | 154 ++
  arch/arm/mach-at91/Kconfig  |   7 +
  board/atmel/sama5d27_som1_ek/Kconfig|  15 ++
  board/atmel/sama5d27_som1_ek/MAINTAINERS|   6 +
  board/atmel/sama5d27_som1_ek/Makefile   |   8 +
  board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 206 
  configs/sama5d27_som1_ek_mmc_defconfig  |  82 ++
  configs/sama5d27_som1_ek_spiflash_defconfig |  82 ++
  include/configs/sama5d27_som1_ek.h  | 100 
  12 files changed, 838 insertions(+)
  create mode 100644 arch/arm/dts/at91-sama5d27_som1_ek.dts
  create mode 100644 arch/arm/dts/sama5d27_som1.dtsi
  create mode 100644 board/atmel/sama5d27_som1_ek/Kconfig
  create mode 100644 board/atmel/sama5d27_som1_ek/MAINTAINERS
  create mode 100644 board/atmel/sama5d27_som1_ek/Makefile
  create mode 100644 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
  create mode 100644 configs/sama5d27_som1_ek_mmc_defconfig
  create mode 100644 configs/sama5d27_som1_ek_spiflash_defconfig
  create mode 100644 include/configs/sama5d27_som1_ek.h
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 033c1efd2b..a9fd0fae2b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -98,6 +98,12 @@ config TARGET_SAMA5D2_XPLAINED
 select SUPPORT_SPL
 select BOARD_EARLY_INIT_F

+config TARGET_SAMA5D27_SOM1_EK
+   bool "SAMA5D27 SOM1 EK board"
+   select CPU_V7
+   select SUPPORT_SPL
+   select BOARD_EARLY_INIT_F
+

Add help here to describe the board and peripherals.

Will add in next version.




  config TARGET_SAMA5D3_XPLAINED
 bool "SAMA5D3 Xplained board"
 select CPU_V7
@@ -180,6 +186,7 @@ source "board/atmel/at91sam9rlek/Kconfig"
  source "board/atmel/at91sam9x5ek/Kconfig"
  source "board/atmel/sama5d2_ptc/Kconfig"
  source "board/atmel/sama5d2_xplained/Kconfig"
+source "board/atmel/sama5d27_som1_ek/Kconfig"
  source "board/atmel/sama5d3_xplained/Kconfig"
  source "board/atmel/sama5d3xek/Kconfig"
  source "board/atmel/sama5d4_xplained/Kconfig"
diff --git a/board/atmel/sama5d27_som1_ek/Kconfig 
b/board/atmel/sama5d27_som1_ek/Kconfig
new file mode 100644
index 00..3276214d8c
--- /dev/null
+++ b/board/atmel/sama5d27_som1_ek/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_SAMA5D27_SOM1_EK
+
+config SYS_BOARD
+   default "sama5d27_som1_ek"
+
+config SYS_VENDOR
+   default "atmel"
+
+config SYS_SOC
+   default "at91"
+
+config SYS_CONFIG_NAME
+   default "sama5d27_som1_ek"
+
+endif
diff --git a/board/atmel/sama5d27_som1_ek/MAINTAINERS 
b/board/atmel/sama5d27_som1_ek/MAINTAINERS
new file mode 100644
index 00..609583c341
--- /dev/null
+++ b/board/atmel/sama5d27_som1_ek/MAINTAINERS
@@ -0,0 +1,6 @@
+SAMA5D27 SOM1 EK BOARD
+M: Wenyou Yang 
+S: Maintained
+F: board/atmel/sama5d27_som1_ek/
+F: include/configs/sama5d27_som1_ek.h
+F: configs/sama5d27_som1_ek_mmc_defconfig
diff --git a/board/atmel/sama5d27_som1_ek/Makefile 
b/board/atmel/sama5d27_som1_ek/Makefile
new file mode 100644
index 00..4ab242c4ac
--- /dev/null
+++ b/board/atmel/sama5d27_som1_ek/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2017 Microchip Corporation
+#   Wenyou Yang 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += sama5d27_som1_ek.o
diff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c 
b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
new file mode 100644
index 00..1d39b65a99
--- /dev/null
+++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright (C) 2017 Microchip Corporation
+ *   Wenyou.Yang 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void board_usb_hw_init(void)
+{
+   atmel_pio4_set_pio_output(AT91_PIO_PORTB, 10, 1);
+}
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+static void board_uart1_hw_init(void)
+{
+   atmel_pio4_set_a_periph(AT91_PIO_PORTD, 2, 1);  /* URXD1 */
+   atmel_pio4_set_a_periph(AT91_PIO_PORTD, 3, 0);  /* UTXD1 */
+
+   

Re: [U-Boot] [PATCH 2/6] ARM: at91: spl: Add mck function to lower rate while switching

[Yang, Wenyou]

Hi Simon,


On 2017/7/28 12:20, Simon Glass wrote:

Hi Wenyou,

On 20 July 2017 at 02:12, Wenyou Yang  wrote:

Refer to the commit 70f8c8316ad(PMC: add new mck function to lower
rate while switching) from AT91Bootstrap.

While switching to a lower clock source, we must switch the clock
source first instead of last. Otherwise, we could end up with
too high frequency on internal bus and peripherals.
This happen on SAMA5D2 as we exit from ROM code @396MHz.

Add a function pmc_mck_init_down() to allow this sequence.

Signed-off-by: Wenyou Yang 
---

  arch/arm/mach-at91/armv7/clock.c  | 36 +++
  arch/arm/mach-at91/include/mach/at91_common.h |  1 +
  2 files changed, 37 insertions(+)

Can this move into a clock driver instead?


This is used for SPL, due to the limitation of the size of SRAM, it is 
not easy to move to the clock driver.




Regards,
Simon


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH] atmel, at91: fix taurus board

[Yang, Wenyou]

On 2017/6/28 17:24, Heiko Schocher wrote:

since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support"

taurus board comes not up anymore. Fix it.

Signed-off-by: Heiko Schocher 

Thank you.

Acked-by: Wenyou Yang 


---

  arch/arm/dts/at91sam9g20-taurus.dts | 2 ++
  board/siemens/taurus/taurus.c   | 9 -
  configs/taurus_defconfig| 3 +++
  3 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/arch/arm/dts/at91sam9g20-taurus.dts 
b/arch/arm/dts/at91sam9g20-taurus.dts
index f27d772..7931c0a 100644
--- a/arch/arm/dts/at91sam9g20-taurus.dts
+++ b/arch/arm/dts/at91sam9g20-taurus.dts
@@ -18,6 +18,7 @@
compatible = "atmel,at91sam9g20ek", "atmel,at91sam9g20", 
"atmel,at91sam9";
  
  	chosen {

+   u-boot,dm-pre-reloc;
stdout-path = 
};
  
@@ -48,6 +49,7 @@

};
  
  			dbgu: serial@f200 {

+   u-boot,dm-pre-reloc;
status = "okay";
};
  
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c

index 8da24be..4aa8d64 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -448,12 +448,3 @@ U_BOOT_CMD(
  );
  #endif
  #endif
-
-static struct atmel_serial_platdata at91sam9260_serial_plat = {
-   .base_addr = ATMEL_BASE_DBGU,
-};
-
-U_BOOT_DEVICE(at91sam9260_serial) = {
-   .name   = "serial_atmel",
-   .platdata = _serial_plat,
-};
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 2de9cad..70d44a7 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_TAURUS=y
  CONFIG_SPL_GPIO_SUPPORT=y
  CONFIG_SPL_LIBCOMMON_SUPPORT=y
  CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
  CONFIG_SPL_SERIAL_SUPPORT=y
  CONFIG_SPL_NAND_SUPPORT=y
  CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -36,6 +37,8 @@ CONFIG_CMD_PING=y
  # CONFIG_DOS_PARTITION is not set
  CONFIG_OF_CONTROL=y
  CONFIG_OF_EMBED=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
  CONFIG_DFU_NAND=y
  # CONFIG_MMC is not set
  CONFIG_SPI_FLASH=y

Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v2 2/2] atmel, at91: fix smartweb board

[Yang, Wenyou]

On 2017/6/24 2:13, Heiko Schocher wrote:

since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support"

smartweb board comes not up anymore. Fix it.

Signed-off-by: Heiko Schocher 


Acked-by: Wenyou Yang 

---

Changes in v2: None

  arch/arm/dts/at91sam9260-smartweb.dts | 2 ++
  board/siemens/smartweb/smartweb.c | 9 -
  configs/smartweb_defconfig| 3 +++
  include/configs/smartweb.h| 3 +++
  4 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/arch/arm/dts/at91sam9260-smartweb.dts 
b/arch/arm/dts/at91sam9260-smartweb.dts
index faed763..e59781b 100644
--- a/arch/arm/dts/at91sam9260-smartweb.dts
+++ b/arch/arm/dts/at91sam9260-smartweb.dts
@@ -18,6 +18,7 @@
compatible = "atmel,at91sam9260", "atmel,at91sam9";
  
  	chosen {

+   u-boot,dm-pre-reloc;
stdout-path = 
};
  
@@ -48,6 +49,7 @@

};
  
  			dbgu: serial@f200 {

+   u-boot,dm-pre-reloc;
status = "okay";
};
  
diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c

index 78a7946..718ccc7 100644
--- a/board/siemens/smartweb/smartweb.c
+++ b/board/siemens/smartweb/smartweb.c
@@ -256,12 +256,3 @@ void mem_init(void)
sdramc_initialize(ATMEL_BASE_CS1, );
  }
  #endif
-
-static struct atmel_serial_platdata at91sam9260_serial_plat = {
-   .base_addr = ATMEL_BASE_DBGU,
-};
-
-U_BOOT_DEVICE(at91sam9260_serial) = {
-   .name   = "serial_atmel",
-   .platdata = _serial_plat,
-};
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 48c8781..a769fc5 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_SMARTWEB=y
  CONFIG_SPL_GPIO_SUPPORT=y
  CONFIG_SPL_LIBCOMMON_SUPPORT=y
  CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
  CONFIG_SPL_NAND_SUPPORT=y
  CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
  CONFIG_FIT=y
@@ -33,6 +34,8 @@ CONFIG_CMD_FAT=y
  # CONFIG_DOS_PARTITION is not set
  CONFIG_OF_CONTROL=y
  CONFIG_OF_EMBED=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
  CONFIG_DFU_NAND=y
  # CONFIG_MMC is not set
  CONFIG_USB=y
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 1236da7..8400278 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -211,6 +211,9 @@
  #define CONFIG_SYS_INIT_SP_ADDR   0x301000
  #define CONFIG_SPL_STACK_R
  #define CONFIG_SPL_STACK_R_ADDR   CONFIG_SYS_TEXT_BASE
+/* we have only 4k sram in SPL, so cut SYS_MALLOC_F_LEN */
+#undef CONFIG_SYS_MALLOC_F_LEN
+#define CONFIG_SYS_MALLOC_F_LEN 0x400
  #else
  /*
   * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,


Best Regards,
Wenyou Yang

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Re: [U-Boot] at91: smartweb board fails with current HEAD

[Yang, Wenyou]

Hello Wolfgang,


On 2017/6/22 15:07, Wolfgang Denk wrote:

Dear Wenyou,

In message  
you wrote:

After supporting the driver model and device tree, the size of SPL is beyond 4K.
SPL is not suitable in 4K internal SRAM

If you are aware of this situation, you should not post patches that
break a number of existing boards.

Instead, we should search for a compromise.
It is my fault, I learned the lesson, I will more careful while posting 
patches.


Thank you for your reminder.

We will have to do this now. But that should have been done before
upstreaming this code.

Thanks.

Wolfgang Denk


Best Regards,
Wenyou Yang

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Re: [U-Boot] spi: Drop atmel_dataflash_spi.c

[Yang, Wenyou]

On 2017/6/6 19:11, Tom Rini wrote:

On Tue, Jun 06, 2017 at 09:07:51AM +, wenyou.y...@microchip.com wrote:

Hi Tom,


On Mon, Jun 05, 2017 at 09:32:28PM +0200, Stelian Pop wrote:

Hi everybody,


The problem here is that you need to remove the boards in question
as well.  I see the baord maintainer was Cc'd on this email, so this
is a bit stronger of a poke, as I guess we need to drop these boards..

It looks like I'm still listed as the maintainer, although I haven't
been involved in u-boot development for years...

I no longer have access to any AT91 board, so if someone wants to take
over, it's ok to me. Otherwise, you can mark those boards as orphaned,
or remove them from the tree.

Thanks Stelian.  Wenyou, you've done some changes to some of these boards
recently, would you care to pick them up, or should I go ahead and remove them?

Please don't remove these boards.

We agree to drop atmel_dataflash_spi.c, and I will convert these
boards by using the new dataflash driver.

Please do the conversion and then we can drop the old file (otherwise
the build fails), and please send a patch updating the MAINTAINERS file
soon, thanks!

All right, thanks.




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Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 8/8] sf: add driver for Atmel QSPI controller

[Yang, Wenyou]

On 2017/5/19 22:59, Cyrille Pitchen wrote:

This patch adds support to the Atmel Quad SPI controller.

Signed-off-by: Cyrille Pitchen 


Acked-by Wenyou Yang 


Best Regards,
Wenyou Yang

---
  drivers/spi/Kconfig  |   7 +
  drivers/spi/Makefile |   1 +
  drivers/spi/atmel_qspi.c | 404 +++
  drivers/spi/atmel_qspi.h | 169 
  4 files changed, 581 insertions(+)
  create mode 100644 drivers/spi/atmel_qspi.c
  create mode 100644 drivers/spi/atmel_qspi.h

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index f3f7dbe0897b..73f2e5c26bfb 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -32,6 +32,13 @@ config ATH79_SPI
  uses driver model and requires a device tree binding to operate.
  please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
  
+config ATMEL_QSPI

+   bool "Atmel QSPI driver"
+   depends on ARCH_AT91
+   help
+ Enable the Ateml Quad-SPI (QSPI) driver. This driver can only be
+ used to access SPI NOR flashes.
+
  config ATMEL_SPI
bool "Atmel SPI driver"
depends on ARCH_AT91
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c090562c7732..af75fa41c82f 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -18,6 +18,7 @@ endif
  obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
  obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
  obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
+obj-$(CONFIG_ATMEL_QSPI) += atmel_qspi.o
  obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
  obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
  obj-$(CONFIG_CF_SPI) += cf_spi.o
diff --git a/drivers/spi/atmel_qspi.c b/drivers/spi/atmel_qspi.c
new file mode 100644
index ..6c265d0a4714
--- /dev/null
+++ b/drivers/spi/atmel_qspi.c
@@ -0,0 +1,404 @@
+/*
+ * Copyright (C) 2017 Atmel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "atmel_qspi.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void atmel_qspi_memcpy_fromio(void *dst, unsigned long src, size_t len)
+{
+   u8 *d = (u8 *)dst;
+
+   while (len--) {
+   *d++ = readb(src);
+   src++;
+   }
+}
+
+static void atmel_qspi_memcpy_toio(unsigned long dst, const void *src,
+  size_t len)
+{
+   const u8 *s = (const u8 *)src;
+
+   while (len--) {
+   writeb(*s, dst);
+   dst++;
+   s++;
+   }
+}
+
+static int atmel_qspi_set_ifr_tfrtype(u8 flags, u32 *ifr)
+{
+   u32 ifr_tfrtype;
+
+   switch (flags & SPI_FCMD_TYPE) {
+   case SPI_FCMD_READ:
+   ifr_tfrtype = QSPI_IFR_TFRTYPE_READ_MEMORY;
+   break;
+
+   case SPI_FCMD_WRITE:
+   ifr_tfrtype = QSPI_IFR_TFRTYPE_WRITE_MEMORY;
+   break;
+
+   case SPI_FCMD_ERASE:
+   case SPI_FCMD_WRITE_REG:
+   ifr_tfrtype = QSPI_IFR_TFRTYPE_WRITE;
+   break;
+
+   case SPI_FCMD_READ_REG:
+   ifr_tfrtype = QSPI_IFR_TFRTYPE_READ;
+   break;
+
+   default:
+   return -EINVAL;
+   }
+
+   *ifr = (*ifr & ~QSPI_IFR_TFRTYPE) | ifr_tfrtype;
+   return 0;
+}
+
+static int atmel_qpsi_set_ifr_width(enum spi_flash_protocol proto, u32 *ifr)
+{
+   u32 ifr_width;
+
+   switch (proto) {
+   case SPI_FPROTO_1_1_1:
+   ifr_width = QSPI_IFR_WIDTH_SINGLE_BIT_SPI;
+   break;
+
+   case SPI_FPROTO_1_1_2:
+   ifr_width = QSPI_IFR_WIDTH_DUAL_OUTPUT;
+   break;
+
+   case SPI_FPROTO_1_2_2:
+   ifr_width = QSPI_IFR_WIDTH_DUAL_IO;
+   break;
+
+   case SPI_FPROTO_2_2_2:
+   ifr_width = QSPI_IFR_WIDTH_DUAL_CMD;
+   break;
+
+   case SPI_FPROTO_1_1_4:
+   ifr_width = QSPI_IFR_WIDTH_QUAD_OUTPUT;
+   break;
+
+   case SPI_FPROTO_1_4_4:
+   ifr_width = QSPI_IFR_WIDTH_QUAD_IO;
+   break;
+
+   case SPI_FPROTO_4_4_4:
+   ifr_width = QSPI_IFR_WIDTH_QUAD_CMD;
+   break;
+
+   default:
+   return -EINVAL;
+   }
+
+   *ifr = (*ifr & ~QSPI_IFR_WIDTH) | ifr_width;
+   return 0;
+}
+
+static int atmel_qspi_xfer(struct udevice *dev, unsigned int bitlen,
+  const void *dout, void *din, unsigned long flags)
+{
+   /* This controller can only be used with SPI NOR flashes. */
+   return -EINVAL;
+}
+
+static int atmel_qspi_set_speed(struct udevice *bus, uint hz)
+{
+   struct atmel_qspi_priv *aq = dev_get_priv(bus);
+   u32 scr, scbr, mask, new_value;
+
+   /* Compute the QSPI baudrate */
+   scbr = DIV_ROUND_UP(aq->bus_clk_rate, hz);
+   if (scbr > 0)
+   scbr--;
+
+   new_value = 

Re: [U-Boot] [PATCH 6/8] sf: add new option to support SPI flash above 16MiB

[Yang, Wenyou]

On 2017/5/19 22:59, Cyrille Pitchen wrote:

The patch provides an alternative method to support SPI flash size greater
than 16MiB (128Mib).

Indeed using the Base Address Register (BAR) is stateful. Hence, once the
BAR has been modified, if a spurious CPU reset occurs with no reset/power
off at the SPI flash side, early boot loarders may try to read from offset
0 but fails because of the new BAR value.

On the other hand, using the 4-byte address instruction set is stateless.
When supported by the SPI flash memory, it allows us to access memory data
area above 16MiB without changing the internal state of this SPI flash
memory. Then if a spirious reboot occurs, early boot loaders can still
access data from offset 0.

Signed-off-by: Cyrille Pitchen 


Acked-by Wenyou Yang 


Best Regards,
Wenyou Yang

---
  drivers/mtd/spi/Kconfig   | 15 ++-
  drivers/mtd/spi/sf_internal.h | 18 +
  drivers/mtd/spi/spi_flash.c   | 92 ---
  3 files changed, 118 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 5ca0a712d84a..c11e83263b16 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -34,14 +34,27 @@ config SPI_FLASH
  
  	  If unsure, say N
  
+choice

+   prompt "Support SPI flash above 16MiB"
+   depends on SPI_FLASH
+   optional
+
  config SPI_FLASH_BAR
bool "SPI flash Bank/Extended address register support"
-   depends on SPI_FLASH
help
  Enable the SPI flash Bank/Extended address register support.
  Bank/Extended address registers are used to access the flash
  which has size > 16MiB in 3-byte addressing.
  
+config SPI_FLASH_4BAIS

+   bool "SPI flash 4-byte address instruction set support"
+   help
+ Convert the selected 3-byte address op codes into their associated
+ 4-byte address op codes. Using this instruction set does not change
+ the internal state of the SPI flash device.
+
+endchoice
+
  if SPI_FLASH
  
  config SPI_FLASH_ATMEL

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 8b8c951bcc55..30994f9f460c 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -27,6 +27,7 @@ enum spi_nor_option_flags {
  };
  
  #define SPI_FLASH_3B_ADDR_LEN		3

+#define SPI_FLASH_4B_ADDR_LEN  4
  #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN + 16)
  #define SPI_FLASH_16MB_BOUN   0x100
  
@@ -64,6 +65,19 @@ enum spi_nor_option_flags {

  #define CMD_READ_CONFIG   0x35
  #define CMD_FLAG_STATUS   0x70
  
+/* 4-byte address instruction set */

+#define CMD_READ_ARRAY_SLOW_4B 0x13
+#define CMD_READ_ARRAY_FAST_4B 0x0c
+#define CMD_READ_DUAL_OUTPUT_FAST_4B   0x3c
+#define CMD_READ_DUAL_IO_FAST_4B   0xbc
+#define CMD_READ_QUAD_OUTPUT_FAST_4B   0x6c
+#define CMD_READ_QUAD_IO_FAST_4B   0xec
+#define CMD_PAGE_PROGRAM_4B0x12
+#define CMD_PAGE_PROGRAM_1_1_4_4B  0x34
+#define CMD_PAGE_PROGRAM_1_4_4_4B  0x3e
+#define CMD_ERASE_4K_4B0x21
+#define CMD_ERASE_64K_4B   0xdc
+
  /* Bank addr access commands */
  #ifdef CONFIG_SPI_FLASH_BAR
  # define CMD_BANKADDR_BRWR0x17
@@ -133,6 +147,10 @@ struct spi_flash_info {
  #define RD_QUADIO BIT(6)  /* use Quad IO Read */
  #define RD_DUALIO BIT(7)  /* use Dual IO Read */
  #define RD_FULL   (RD_QUAD | RD_DUAL | RD_QUADIO | 
RD_DUALIO)
+#define NO_4BAIS   BIT(8)  /*
+* 4-byte address instruction set
+* NOT supported
+*/
  };
  
  extern const struct spi_flash_info spi_flash_ids[];

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index c5e00772f241..695c8555db3f 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -176,6 +176,67 @@ bar_end:
  }
  #endif
  
+#ifdef CONFIG_SPI_FLASH_4BAIS

+static u8 spi_flash_convert_opcode(u8 opcode, const u8 table[][2], size_t size)
+{
+   size_t i;
+
+   for (i = 0; i < size; i++)
+   if (table[i][0] == opcode)
+   return table[i][1];
+
+   /* No conversion found, keep input op code. */
+   return opcode;
+}
+
+static u8 spi_flash_convert_3to4_read(u8 opcode)
+{
+   static const u8 spi_flash_3to4_read[][2] = {
+   {CMD_READ_ARRAY_SLOW,   CMD_READ_ARRAY_SLOW_4B},
+   {CMD_READ_ARRAY_FAST,   CMD_READ_ARRAY_FAST_4B},
+   {CMD_READ_DUAL_OUTPUT_FAST, CMD_READ_DUAL_OUTPUT_FAST_4B},
+   {CMD_READ_DUAL_IO_FAST, CMD_READ_DUAL_IO_FAST_4B},
+   {CMD_READ_QUAD_OUTPUT_FAST, CMD_READ_QUAD_OUTPUT_FAST_4B},
+   

Re: [U-Boot] [PATCH 7/8] sf: add support to Microchip SST26 QSPI memories

[Yang, Wenyou]

On 2017/5/19 22:59, Cyrille Pitchen wrote:

This patch adds support to Microchip SST26 QSPI memories.

Erase blocks are protected at power up and must be unlocked first before
being erased then programmed.

Also, the erase block sizes are not uniform. The memory layout is uniform
only for the 4K sector blocks. The 64K Block Erase (D8h) op code cannot be
used as currently done by the SPI FLASH sub-system.
The 4K Sector Erase (20h) op code should be chosen instead even if
CONFIG_SPI_FLASH_USE_4K_SECTORS is not set.

Signed-off-by: Cyrille Pitchen 


Acked-by Wenyou Yang 


Best Regards,
Wenyou Yang

---
  drivers/mtd/spi/sf_internal.h   |  3 +++
  drivers/mtd/spi/spi_flash.c | 33 ++---
  drivers/mtd/spi/spi_flash_ids.c |  5 +
  3 files changed, 38 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 30994f9f460c..4354a2aa532f 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -104,6 +104,7 @@ enum spi_nor_option_flags {
  #ifdef CONFIG_SPI_FLASH_SST
  # define CMD_SST_BP   0x02/* Byte Program */
  # define CMD_SST_AAI_WP   0xAD/* Auto Address Incr Word 
Program */
+# define CMD_SST_ULBPR 0x98/* Global Block Protection Unlock */
  
  int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,

const void *buf);
@@ -151,6 +152,8 @@ struct spi_flash_info {
 * 4-byte address instruction set
 * NOT supported
 */
+#define SECT_4K_ONLY   BIT(9)  /* use only CMD_ERASE_4K */
+#define SST_ULBPR  BIT(10) /* use SST unlock block protection */
  };
  
  extern const struct spi_flash_info spi_flash_ids[];

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 695c8555db3f..307e4140826b 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -891,6 +891,22 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t 
len)
  }
  #endif
  
+#ifdef CONFIG_SPI_FLASH_SST

+static int sst26_unlock(struct spi_flash *flash)
+{
+   struct spi_flash_command cmd;
+   int ret;
+
+   spi_flash_command_init(, CMD_SST_ULBPR, 0, SPI_FCMD_WRITE_REG);
+   ret = spi_flash_write_common(flash, );
+   if (ret) {
+   debug("SF: SST26 is still locked (read-only)\n");
+   return ret;
+   }
+
+   return 0;
+}
+#endif
  
  #ifdef CONFIG_SPI_FLASH_MACRONIX

  static int macronix_quad_enable(struct spi_flash *flash)
@@ -920,7 +936,8 @@ static int macronix_quad_enable(struct spi_flash *flash)
  }
  #endif
  
-#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)

+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) ||\
+defined(CONFIG_SPI_FLASH_SST)
  static int spansion_quad_enable(struct spi_flash *flash)
  {
u8 qeb_status;
@@ -981,9 +998,11 @@ static int set_quad_mode(struct spi_flash *flash,
case SPI_FLASH_CFI_MFR_MACRONIX:
return macronix_quad_enable(flash);
  #endif
-#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) ||\
+defined(CONFIG_SPI_FLASH_SST)
case SPI_FLASH_CFI_MFR_SPANSION:
case SPI_FLASH_CFI_MFR_WINBOND:
+   case SPI_FLASH_CFI_MFR_SST:
return spansion_quad_enable(flash);
  #endif
  #ifdef CONFIG_SPI_FLASH_STMICRO
@@ -1040,6 +1059,11 @@ int spi_flash_scan(struct spi_flash *flash)
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
write_sr(flash, 0);
  
+#ifdef CONFIG_SPI_FLASH_SST

+   if (info->flags & SST_ULBPR)
+   sst26_unlock(flash);
+#endif
+
flash->name = info->name;
flash->memory_map = spi->memory_map;
  
@@ -1099,7 +1123,10 @@ int spi_flash_scan(struct spi_flash *flash)

flash->erase_size = 4096 << flash->shift;
} else
  #endif
-   {
+   if (info->flags & SECT_4K_ONLY) {
+   flash->erase_cmd = CMD_ERASE_4K;
+   flash->erase_size = 4096 << flash->shift;
+   } else {
flash->erase_cmd = CMD_ERASE_64K;
flash->erase_size = flash->sector_size;
}
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index edca94e30cf0..3d3132bc3b22 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -146,6 +146,11 @@ const struct spi_flash_info spi_flash_ids[] = {
{"sst25wf040",   INFO(0xbf2504, 0x0,  64 * 1024, 8, SECT_4K 
| SST_WR) },
{"sst25wf040b",  INFO(0x621613, 0x0,  64 * 1024, 8, 
SECT_4K) },
{"sst25wf080",   INFO(0xbf2505, 0x0,  64 * 1024,16, SECT_4K 
| SST_WR) },
+   {"sst26vf016b",

Re: [U-Boot] [PATCH 5/8] sf: add 'addr_len' member to 'struct spi_flash'

[Yang, Wenyou]

On 2017/5/19 22:59, Cyrille Pitchen wrote:

This is a transitional patch to prepare the SPI FLASH sub-system to
support the 4-byte address instruction set later.
For now, flash->addr_len is always set to SPI_FLASH_3B_ADDR_LEN.

Signed-off-by: Cyrille Pitchen 


Acked-by Wenyou Yang 


Best Regards,
Wenyou Yang

---
  drivers/mtd/spi/spi_flash.c | 13 -
  include/spi_flash.h |  2 ++
  2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index ec998166017d..c5e00772f241 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -322,7 +322,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 
offset, size_t len)
}
}
  
-	spi_flash_command_init(, flash->erase_cmd, SPI_FLASH_3B_ADDR_LEN,

+   spi_flash_command_init(, flash->erase_cmd, flash->addr_len,
   SPI_FCMD_ERASE);
while (len) {
erase_addr = offset;
@@ -377,7 +377,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 
offset,
}
}
  
-	spi_flash_command_init(, flash->write_cmd, SPI_FLASH_3B_ADDR_LEN,

+   spi_flash_command_init(, flash->write_cmd, flash->addr_len,
   SPI_FCMD_WRITE);
cmd.proto = flash->write_proto;
for (actual = 0; actual < len; actual += chunk_len) {
@@ -481,7 +481,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 
offset,
return 0;
}
  
-	spi_flash_command_init(, flash->read_cmd, SPI_FLASH_3B_ADDR_LEN,

+   spi_flash_command_init(, flash->read_cmd, flash->addr_len,
   SPI_FCMD_READ);
cmd.proto = flash->read_proto;
cmd.num_wait_states = flash->dummy_byte * 8;
@@ -529,7 +529,7 @@ static int sst_byte_write(struct spi_flash *flash, u32 
offset, const void *buf)
int ret;
u8 sr = 0xFFu;
  
-	spi_flash_command_init(, CMD_SST_BP, SPI_FLASH_3B_ADDR_LEN,

+   spi_flash_command_init(, CMD_SST_BP, flash->addr_len,
   SPI_FCMD_WRITE);
cmd.addr = offset;
cmd.data_len = 1;
@@ -580,7 +580,7 @@ int sst_write_wp(struct spi_flash *flash, u32 offset, 
size_t len,
if (ret)
goto done;
  
-	spi_flash_command_init(, CMD_SST_AAI_WP, SPI_FLASH_3B_ADDR_LEN,

+   spi_flash_command_init(, CMD_SST_AAI_WP, flash->addr_len,
   SPI_FCMD_WRITE);
cmd.addr = offset;
cmd.data_len = 2;
@@ -1103,6 +1103,9 @@ int spi_flash_scan(struct spi_flash *flash)
flash->flags |= SNOR_F_USE_FSR;
  #endif
  
+	/* Set the address length */

+   flash->addr_len = SPI_FLASH_3B_ADDR_LEN;
+
/* Configure the BAR - discover bank cmds and read current bank */
  #ifdef CONFIG_SPI_FLASH_BAR
ret = read_bar(flash, info);
diff --git a/include/spi_flash.h b/include/spi_flash.h
index ac2b37f0202f..9168fca8f96d 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -44,6 +44,7 @@ struct spi_slave;
   * @bank_read_cmd:Bank read cmd
   * @bank_write_cmd:   Bank write cmd
   * @bank_curr:Current flash bank
+ * @addr_len:  Number of bytes for the address
   * @erase_cmd:Erase cmd 4K, 32K, 64K
   * @read_cmd: Read cmd - Array Fast, Extn read and quad read.
   * @write_cmd:Write cmd - page and quad program.
@@ -81,6 +82,7 @@ struct spi_flash {
u8 bank_write_cmd;
u8 bank_curr;
  #endif
+   u8 addr_len;
u8 erase_cmd;
u8 read_cmd;
u8 write_cmd;


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Re: [U-Boot] [PATCH 3/8] sf: select the relevant SPI flash protocol for read and write commands

[Yang, Wenyou]

On 2017/5/19 22:59, Cyrille Pitchen wrote:

SPI controller drivers should not check the instruction op code byte to
guess which SPI x-y-z protocol is to be used for Fast Read or Page Program
operations.

Indeed, the op code values are not so reliable. For instance, the 32h op
code is generally used for Page Program 1-1-4 operations. However
Microchip SST26 memories use this 32h op code for their Page Program 1-4-4
operations. There are many other examples of those SPI flash manufacturer
quirks.

Instead, the SPI FLASH sub-system now fills the 'proto' member
of 'struct spi_flash_command' with flash->read_proto for Fast Read
operations and flash->write_proto for Page Program operations.

Signed-off-by: Cyrille Pitchen 


Acked-by Wenyou Yang 


Best Regards,
Wenyou Yang


---
  drivers/mtd/spi/spi_flash.c | 24 
  include/spi_flash.h |  4 
  2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index d0634e5b28c7..7e35fb9f4802 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -379,6 +379,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 
offset,
  
  	spi_flash_command_init(, flash->write_cmd, SPI_FLASH_3B_ADDR_LEN,

   SPI_FCMD_WRITE);
+   cmd.proto = flash->write_proto;
for (actual = 0; actual < len; actual += chunk_len) {
write_addr = offset;
  
@@ -482,6 +483,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
  
  	spi_flash_command_init(, flash->read_cmd, SPI_FLASH_3B_ADDR_LEN,

   SPI_FCMD_READ);
+   cmd.proto = flash->read_proto;
cmd.num_wait_states = flash->dummy_byte * 8;
while (len) {
read_addr = offset;
@@ -1045,24 +1047,30 @@ int spi_flash_scan(struct spi_flash *flash)
  
  	/* Look for read commands */

flash->read_cmd = CMD_READ_ARRAY_FAST;
-   if (spi->mode & SPI_RX_SLOW)
+   flash->read_proto = SPI_FPROTO_1_1_1;
+   if (spi->mode & SPI_RX_SLOW) {
flash->read_cmd = CMD_READ_ARRAY_SLOW;
-   else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD)
+   } else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD) {
flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
-   else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL)
+   flash->read_proto = SPI_FPROTO_1_1_4;
+   } else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL) {
flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
+   flash->read_proto = SPI_FPROTO_1_1_2;
+   }
  
  	/* Look for write commands */

-   if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
+   if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD) {
flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
-   else
+   flash->write_proto = SPI_FPROTO_1_1_4;
+   } else {
/* Go for default supported write cmd */
flash->write_cmd = CMD_PAGE_PROGRAM;
+   flash->write_proto = SPI_FPROTO_1_1_1;
+   }
  
  	/* Set the quad enable bit - only for quad commands */

-   if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
-   (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
-   (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
+   if (spi_flash_protocol_get_data_nbits(flash->read_proto) == 4 ||
+   spi_flash_protocol_get_data_nbits(flash->write_proto) == 4) {
ret = set_quad_mode(flash, info);
if (ret) {
debug("SF: Fail to set QEB for %02x\n",
diff --git a/include/spi_flash.h b/include/spi_flash.h
index be2fe3f84cb9..ac2b37f0202f 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -48,6 +48,8 @@ struct spi_slave;
   * @read_cmd: Read cmd - Array Fast, Extn read and quad read.
   * @write_cmd:Write cmd - page and quad program.
   * @dummy_byte:   Dummy cycles for read operation.
+ * @read_proto:SPI x-y-z protocol for flash read ops
+ * @write_proto:   SPI x-y-z protocol for flash write ops
   * @memory_map:   Address of read-only SPI flash access
   * @flash_lock:   lock a region of the SPI Flash
   * @flash_unlock: unlock a region of the SPI Flash
@@ -83,6 +85,8 @@ struct spi_flash {
u8 read_cmd;
u8 write_cmd;
u8 dummy_byte;
+   enum spi_flash_protocol read_proto;
+   enum spi_flash_protocol write_proto;
  
  	void *memory_map;
  


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Re: [U-Boot] [PATCH 4/8] sf: differentiate Page Program 1-1-4 and 1-4-4

[Yang, Wenyou]

On 2017/5/19 22:59, Cyrille Pitchen wrote:

This patch simply renames the ambiguous CMD_QUAD_PAGE_PROGRAM macro
into the more explicit CMD_PAGE_PROGRAM_1_1_4.
Also it defines the CMD_PAGE_PROGRAM_1_4_4 macro to the standard 38h op
code.

Signed-off-by: Cyrille Pitchen 


Acked-by Wenyou Yang 


Best Regards,
Wenyou Yang

---
  drivers/mtd/spi/sf_internal.h | 3 ++-
  drivers/mtd/spi/spi_flash.c   | 2 +-
  2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 5c551089d673..8b8c951bcc55 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -48,7 +48,8 @@ enum spi_nor_option_flags {
  #define CMD_PAGE_PROGRAM  0x02
  #define CMD_WRITE_DISABLE 0x04
  #define CMD_WRITE_ENABLE  0x06
-#define CMD_QUAD_PAGE_PROGRAM  0x32
+#define CMD_PAGE_PROGRAM_1_1_4 0x32
+#define CMD_PAGE_PROGRAM_1_4_4 0x38
  
  /* Read commands */

  #define CMD_READ_ARRAY_SLOW   0x03
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 7e35fb9f4802..ec998166017d 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1060,7 +1060,7 @@ int spi_flash_scan(struct spi_flash *flash)
  
  	/* Look for write commands */

if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD) {
-   flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
+   flash->write_cmd = CMD_PAGE_PROGRAM_1_1_4;
flash->write_proto = SPI_FPROTO_1_1_4;
} else {
/* Go for default supported write cmd */


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Re: [U-Boot] [PATCH 2/8] sf: describe all SPI flash commands with 'struct spi_flash_command'

[Yang, Wenyou]

On 2017/5/19 22:59, Cyrille Pitchen wrote:

Now that the SPI sub-system API has been extended with
'struct spi_flash_command' and spi_is_flash_command_supported() /
spi_exec_flash_command() functions, we update the SPI FLASH sub-system to
use this new API.

Signed-off-by: Cyrille Pitchen 


Acked-by Wenyou Yang 


Best Regards,
Wenyou Yang

---
  drivers/mtd/spi/sf.c   |  78 +
  drivers/mtd/spi/sf_dataflash.c | 119 +-
  drivers/mtd/spi/sf_internal.h  |  24 +++---
  drivers/mtd/spi/spi_flash.c| 184 +++--
  4 files changed, 236 insertions(+), 169 deletions(-)

diff --git a/drivers/mtd/spi/sf.c b/drivers/mtd/spi/sf.c
index d5e175ca..6178b0aa9824 100644
--- a/drivers/mtd/spi/sf.c
+++ b/drivers/mtd/spi/sf.c
@@ -9,46 +9,88 @@
  
  #include 

  #include 
+#include 
  
-static int spi_flash_read_write(struct spi_slave *spi,

-   const u8 *cmd, size_t cmd_len,
-   const u8 *data_out, u8 *data_in,
-   size_t data_len)
+#include "sf_internal.h"
+
+static void spi_flash_addr(u32 addr, u8 addr_len, u8 *cmd_buf)
  {
+   u8 i;
+
+   for (i = 0; i < addr_len; i++)
+   cmd_buf[i] = addr >> ((addr_len - 1 - i) * 8);
+}
+
+static u8 spi_compute_num_dummy_bytes(enum spi_flash_protocol proto,
+ u8 num_dummy_clock_cycles)
+{
+   int shift = fls(spi_flash_protocol_get_addr_nbits(proto)) - 1;
+
+   if (shift < 0)
+   shift = 0;
+   return (num_dummy_clock_cycles << shift) >> 3;
+}
+
+static int spi_flash_exec(struct spi_flash *flash,
+ const struct spi_flash_command *cmd)
+{
+   struct spi_slave *spi = flash->spi;
+   u8 cmd_buf[SPI_FLASH_CMD_LEN];
+   size_t cmd_len, num_dummy_bytes;
unsigned long flags = SPI_XFER_BEGIN;
int ret;
  
-	if (data_len == 0)

+   if (spi_is_flash_command_supported(spi, cmd))
+   return spi_exec_flash_command(spi, cmd);
+
+   if (cmd->data_len == 0)
flags |= SPI_XFER_END;
  
-	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);

+   cmd_buf[0] = cmd->inst;
+   spi_flash_addr(cmd->addr, cmd->addr_len, cmd_buf + 1);
+   cmd_len = 1 + cmd->addr_len;
+
+   num_dummy_bytes = spi_compute_num_dummy_bytes(cmd->proto,
+ cmd->num_mode_cycles +
+ cmd->num_wait_states);
+   memset(cmd_buf + cmd_len, 0xff, num_dummy_bytes);
+   cmd_len += num_dummy_bytes;
+
+   ret = spi_xfer(spi, cmd_len * 8, cmd_buf, NULL, flags);
if (ret) {
debug("SF: Failed to send command (%zu bytes): %d\n",
  cmd_len, ret);
-   } else if (data_len != 0) {
-   ret = spi_xfer(spi, data_len * 8, data_out, data_in,
-   SPI_XFER_END);
+   } else if (cmd->data_len != 0) {
+   ret = spi_xfer(spi, cmd->data_len * 8,
+  cmd->tx_data, cmd->rx_data,
+  SPI_XFER_END);
if (ret)
debug("SF: Failed to transfer %zu bytes of data: %d\n",
- data_len, ret);
+ cmd->data_len, ret);
}
  
  	return ret;

  }
  
-int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,

-   size_t cmd_len, void *data, size_t data_len)
+int spi_flash_cmd_read(struct spi_flash *flash,
+  const struct spi_flash_command *cmd)
  {
-   return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
+   return spi_flash_exec(flash, cmd);
  }
  
-int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)

+int spi_flash_cmd(struct spi_flash *flash, u8 instr, void *response, size_t 
len)
  {
-   return spi_flash_cmd_read(spi, , 1, response, len);
+   struct spi_flash_command cmd;
+   u8 flags = (response && len) ? SPI_FCMD_READ_REG : SPI_FCMD_WRITE_REG;
+
+   spi_flash_command_init(, instr, 0, flags);
+   cmd.data_len = len;
+   cmd.rx_data = response;
+   return spi_flash_exec(flash, );
  }
  
-int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,

-   const void *data, size_t data_len)
+int spi_flash_cmd_write(struct spi_flash *flash,
+   const struct spi_flash_command *cmd)
  {
-   return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
+   return spi_flash_exec(flash, cmd);
  }
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c
index bcddfa07556b..b2166ad4e5ff 100644
--- a/drivers/mtd/spi/sf_dataflash.c
+++ b/drivers/mtd/spi/sf_dataflash.c
@@ -73,7 +73,7 @@ struct dataflash {
  };
  
  /* Return the 

Re: [U-Boot] [PATCH 1/8] spi: add support of SPI flash commands

[Yang, Wenyou]

On 2017/5/19 22:59, Cyrille Pitchen wrote:

This patch introduces 'struct spi_flash_command' and functions
spi_is_flash_command_supported() / spi_exec_flash_command().

The 'struct spi_flash_command' describes all the relevant parameters to
execute any SPI flash command:
- the instruction op code
- the number of bytes used to send the address: 0, 3 or 4 bytes
- the number of mode and wait-state clock cycles, also called dummy cycles
- the number and values of data bytes to be sent or received
- the SPI x-y-z protocol [1]
- the flash command type [2]

[1] SPI x-y-z protocol:
- x is the number of I/O lines used to send the instruction op code.
- y is the number of I/O lines used during address, mode and wait-state
   clock cycles.
- z is the number of I/O lines used to send or received data.

[2] Flash command type:
The flash command type is provided to differenciate "memory"
read/write/erase operations from "flash internal register" read/write
operations. Indeed some SPI controller drivers handle those command type
in different ways.
However SPI controller drivers should not check the value of the
instruction op code to guess the actual kind of flash command to perform.
Many instruction op codes are SPI flash manufacturer specific and only
drivers/mtd/spi/spi_flash.c should have the knowledge of all of them.

Besides, more and more QSPI controllers, like those of TI and Candence,
have special way to support (Fast) Read operations using some
"memory like" area mapped into the system bus. Hence, if those drivers
choose to override the default implementation of
spi_is_flash_command_supported() so that their own functions return true
only for a "memory read" flash command type, then spi_exec_flash_command()
might be used to implement the read from the "memory like" area mapped
into the system bus.
It means that spi_exec_flash_command() could be used to supersede the
actual flash->memory_map mechanism; spi_is_flash_command_supported() /
spi_exec_flash_command() being more generic and covering more use cases.

For instance, the Atmel QSPI hardware controller uses its "memory like"
area mapped ino the system to perform not only (Fast) Read operations but
actually all other types of flash commands. Hence the regular SPI API
based on the spi_xfer() function is not suited to support the Atmel QSPI
controller.

Signed-off-by: Cyrille Pitchen 


Acked-by Wenyou Yang 


Best Regards,
Wenyou Yang


---
  drivers/spi/spi-uclass.c |  40 +++
  drivers/spi/spi.c|  13 
  include/spi.h| 168 +++
  3 files changed, 221 insertions(+)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index c061c05443d4..b8092538e9b0 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -92,6 +92,30 @@ int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags);
  }
  
+bool dm_spi_is_flash_command_supported(struct udevice *dev,

+  const struct spi_flash_command *cmd)
+{
+   struct udevice *bus = dev->parent;
+   struct dm_spi_ops *ops = spi_get_ops(bus);
+
+   if (ops->is_flash_command_supported)
+   return ops->is_flash_command_supported(dev, cmd);
+
+   return false;
+}
+
+int dm_spi_exec_flash_command(struct udevice *dev,
+ const struct spi_flash_command *cmd)
+{
+   struct udevice *bus = dev->parent;
+   struct dm_spi_ops *ops = spi_get_ops(bus);
+
+   if (ops->exec_flash_command)
+   return ops->exec_flash_command(dev, cmd);
+
+   return -EINVAL;
+}
+
  int spi_claim_bus(struct spi_slave *slave)
  {
return dm_spi_claim_bus(slave->dev);
@@ -108,6 +132,18 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
return dm_spi_xfer(slave->dev, bitlen, dout, din, flags);
  }
  
+bool spi_is_flash_command_supported(struct spi_slave *slave,

+   const struct spi_flash_command *cmd)
+{
+   return dm_spi_is_flash_command_supported(slave->dev, cmd);
+}
+
+int spi_exec_flash_command(struct spi_slave *slave,
+  const struct spi_flash_command *cmd)
+{
+   return dm_spi_exec_flash_command(slave->dev, cmd);
+}
+
  #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  static int spi_child_post_bind(struct udevice *dev)
  {
@@ -147,6 +183,10 @@ static int spi_post_probe(struct udevice *bus)
ops->set_mode += gd->reloc_off;
if (ops->cs_info)
ops->cs_info += gd->reloc_off;
+   if (ops->is_flash_command_supported)
+   ops->is_flash_command_supported += gd->reloc_off;
+   if (ops->exec_flash_command)
+   ops->exec_flash_command += gd->reloc_off;
  #endif
  
  	return 0;

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 7d81fbd7f8f5..e47acdc9e414 100644
--- 

Re: [U-Boot] [PATCH] mmc: atmel_sdhci: Enable the quirk SDHCI_QUIRK_WAIT_SEND_CMD

[Yang, Wenyou]

Hi Jaehoon,


On 2017/5/10 19:43, Jaehoon Chung wrote:

Hi Wenyou,

On 05/10/2017 10:19 AM, Wenyou Yang wrote:

To fix the timeout of sending the write command, enable the quirk
SDHCI_QUIRK_WAIT_SEND_CMD.

This patch is for fixing timeout error, doesn't need to set quirk into 
atmel_sdhci_init()?

Yes, it does.
Thank you for pointing out.



Best Regards,
Jaehoon Chung


Signed-off-by: Wenyou Yang 
---

  drivers/mmc/atmel_sdhci.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c
index 852255782f..25f4559f24 100644
--- a/drivers/mmc/atmel_sdhci.c
+++ b/drivers/mmc/atmel_sdhci.c
@@ -74,7 +74,7 @@ static int atmel_sdhci_probe(struct udevice *dev)
host->name = dev->name;
host->ioaddr = (void *)dev_get_addr(dev);
  
-	host->quirks = 0;

+   host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
host->bus_width  = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 "bus-width", 4);
  


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v4 3/3] board: at91sam9263ek: Enable early debug UART

[Yang, Wenyou]

Hi Simon,

The patches has been rebased on the master branch of u-boot-dm git tree

Could you help take them?


Best Regards,

Wenyou Yang

On 2017/4/18 15:31, Wenyou Yang wrote:

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 
---

Changes in v4:
  - Rebase on the master branch(ad46af0e76) of u-boot-dm git tree.
  - Update the cover-letter.
  - Add Reviewed-by tag.

Changes in v3:
  - Rebase on the master branch (22e10be45) of u-boot-dm git tree.
  - Update the cover-letter

Changes in v2:
  - Add [PATCH]: board: at91sam9263ek: Enable early debug UART.
  - Move out [PATCH] ARM: dts: at91: add dts files for at91sam9263ek.

  board/atmel/at91sam9263ek/at91sam9263ek.c | 13 +
  configs/at91sam9263ek_dataflash_cs0_defconfig |  6 ++
  configs/at91sam9263ek_dataflash_defconfig |  6 ++
  configs/at91sam9263ek_nandflash_defconfig |  6 ++
  configs/at91sam9263ek_norflash_boot_defconfig |  6 ++
  configs/at91sam9263ek_norflash_defconfig  |  6 ++
  6 files changed, 43 insertions(+)

diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c 
b/board/atmel/at91sam9263ek/at91sam9263ek.c
index 2aafafe35e..3de978311d 100644
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -7,6 +7,7 @@
   */
  
  #include 

+#include 
  #include 
  #include 
  #include 
@@ -176,10 +177,22 @@ void lcd_show_board_info(void)
  #endif /* CONFIG_LCD_INFO */
  #endif
  
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT

+void board_debug_uart_init(void)
+{
+   at91_seriald_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
  int board_early_init_f(void)
  {
+#ifdef CONFIG_DEBUG_UART
+   debug_uart_init();
+#endif
return 0;
  }
+#endif
  
  int board_init(void)

  {
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig 
b/configs/at91sam9263ek_dataflash_cs0_defconfig
index 701a49b115..02e91148ce 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -36,6 +36,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xee00
+CONFIG_DEBUG_UART_CLOCK=1
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_USB=y
  CONFIG_DM_USB=y
diff --git a/configs/at91sam9263ek_dataflash_defconfig 
b/configs/at91sam9263ek_dataflash_defconfig
index 701a49b115..02e91148ce 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -36,6 +36,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xee00
+CONFIG_DEBUG_UART_CLOCK=1
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_USB=y
  CONFIG_DM_USB=y
diff --git a/configs/at91sam9263ek_nandflash_defconfig 
b/configs/at91sam9263ek_nandflash_defconfig
index 951f08d662..2ddcf2b714 100644
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -36,6 +36,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xee00
+CONFIG_DEBUG_UART_CLOCK=1
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_USB=y
  CONFIG_DM_USB=y
diff --git a/configs/at91sam9263ek_norflash_boot_defconfig 
b/configs/at91sam9263ek_norflash_boot_defconfig
index 4f8d19b9b1..21480c5d07 100644
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -36,6 +36,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xee00
+CONFIG_DEBUG_UART_CLOCK=1
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_MTD_NOR_FLASH=y
  CONFIG_USB=y
diff --git a/configs/at91sam9263ek_norflash_defconfig 
b/configs/at91sam9263ek_norflash_defconfig
index a39d096187..824c366c44 100644
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -36,6 +36,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xee00
+CONFIG_DEBUG_UART_CLOCK=1
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_MTD_NOR_FLASH=y
  CONFIG_USB=y


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Re: [U-Boot] [PATCH v4 3/3] board: at91sam9rlek: Enable early debug UART

[Yang, Wenyou]

Hi Simon,

The patches has been rebased on the master branch of u-boot-dm git tree

Could you help take them?


Best Regards,

Wenyou Yang

On 2017/4/18 15:28, Wenyou Yang wrote:

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 
---

Changes in v4:
  - Rebase on the master branch(ad46af0e76) of u-boot-dm git tree.
  - Update the cover-letter.
  - Add Reviewed-by tag.

Changes in v3:
  - Rebase on the master branch (22e10be45) of u-boot-dm git tree.
  - Update the cover-letter.

Changes in v2:
  - Add [PATCH]: board: at91sam9rlek: Enable early debug UART.
  - Move out [PATCH]: ARM: dts: at91: add dts files for at91sam9rlek.

  board/atmel/at91sam9rlek/at91sam9rlek.c  | 13 +
  configs/at91sam9rlek_dataflash_defconfig |  6 ++
  configs/at91sam9rlek_mmc_defconfig   |  6 ++
  configs/at91sam9rlek_nandflash_defconfig |  6 ++
  4 files changed, 31 insertions(+)

diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c 
b/board/atmel/at91sam9rlek/at91sam9rlek.c
index 0c4d51765e..0b603ed13a 100644
--- a/board/atmel/at91sam9rlek/at91sam9rlek.c
+++ b/board/atmel/at91sam9rlek/at91sam9rlek.c
@@ -7,6 +7,7 @@
   */
  
  #include 

+#include 
  #include 
  #include 
  #include 
@@ -155,10 +156,22 @@ void lcd_show_board_info(void)
  #endif /* CONFIG_LCD_INFO */
  #endif
  
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT

+void board_debug_uart_init(void)
+{
+   at91_seriald_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
  int board_early_init_f(void)
  {
+#ifdef CONFIG_DEBUG_UART
+   debug_uart_init();
+#endif
return 0;
  }
+#endif
  
  int board_init(void)

  {
diff --git a/configs/at91sam9rlek_dataflash_defconfig 
b/configs/at91sam9rlek_dataflash_defconfig
index 24fbfe619c..d4abb2a2fd 100644
--- a/configs/at91sam9rlek_dataflash_defconfig
+++ b/configs/at91sam9rlek_dataflash_defconfig
@@ -34,5 +34,11 @@ CONFIG_GENERIC_ATMEL_MCI=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=1
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_LCD=y
diff --git a/configs/at91sam9rlek_mmc_defconfig 
b/configs/at91sam9rlek_mmc_defconfig
index a46deac284..9a40c41f36 100644
--- a/configs/at91sam9rlek_mmc_defconfig
+++ b/configs/at91sam9rlek_mmc_defconfig
@@ -34,5 +34,11 @@ CONFIG_GENERIC_ATMEL_MCI=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=1
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_LCD=y
diff --git a/configs/at91sam9rlek_nandflash_defconfig 
b/configs/at91sam9rlek_nandflash_defconfig
index b6400d0317..d68b562b0e 100644
--- a/configs/at91sam9rlek_nandflash_defconfig
+++ b/configs/at91sam9rlek_nandflash_defconfig
@@ -34,5 +34,11 @@ CONFIG_GENERIC_ATMEL_MCI=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=1
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_LCD=y


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Re: [U-Boot] [PATCH v4 3/3] board: at91sam9m10g45ek: Enable early debug UART

[Yang, Wenyou]

Hi Simon,

The patches has been rebased on the master branch of u-boot-dm git tree

Could you help take them?


Best Regards,

Wenyou Yang

On 2017/4/18 15:15, Wenyou Yang wrote:

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 
---

Changes in v4:
  - Rebase on the master branch(ad46af0e76) of u-boot-dm git tree.
  - Update the cover-letter.
  - Add Reviewed-by tag

Changes in v3:
  - Rebase on the master branch (22e10be45) of u-boot-dm git tree.
  - Update the cover-letter.

Changes in v2:
  - Move out [PATCH] ARM: dts: at91: Add dts files for at91sam9m10g45ek.
  - Add [PATCH] board: at91sam9m10g45ek: Enable early debug UART

  board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 13 +
  configs/at91sam9m10g45ek_mmc_defconfig  |  6 ++
  configs/at91sam9m10g45ek_nandflash_defconfig|  6 ++
  3 files changed, 25 insertions(+)

diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c 
b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
index 2e8ea053fc..d3bc5c69d4 100644
--- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
@@ -7,6 +7,7 @@
   */
  
  #include 

+#include 
  #include 
  #include 
  #include 
@@ -242,10 +243,22 @@ void lcd_show_board_info(void)
  #endif /* CONFIG_LCD_INFO */
  #endif
  
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT

+void board_debug_uart_init(void)
+{
+   at91_seriald_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
  int board_early_init_f(void)
  {
+#ifdef CONFIG_DEBUG_UART
+   debug_uart_init();
+#endif
return 0;
  }
+#endif
  
  int board_init(void)

  {
diff --git a/configs/at91sam9m10g45ek_mmc_defconfig 
b/configs/at91sam9m10g45ek_mmc_defconfig
index b0933406af..18b6ddf7cf 100644
--- a/configs/at91sam9m10g45ek_mmc_defconfig
+++ b/configs/at91sam9m10g45ek_mmc_defconfig
@@ -37,6 +37,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xee00
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_USB=y
  CONFIG_DM_USB=y
diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig 
b/configs/at91sam9m10g45ek_nandflash_defconfig
index e8324e71f3..eda54a4f39 100644
--- a/configs/at91sam9m10g45ek_nandflash_defconfig
+++ b/configs/at91sam9m10g45ek_nandflash_defconfig
@@ -37,6 +37,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xee00
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_USB=y
  CONFIG_DM_USB=y


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Re: [U-Boot] [PATCH v5 3/3] board: at91sam9260ek/9g20ek: Enable early debug UART

[Yang, Wenyou]

Hi Simon,

The patches has been rebased on the master branch of u-boot-dm git tree

Could you help take them?


Best Regards,

Wenyou Yang

On 2017/4/18 15:18, Wenyou Yang wrote:

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 
---

Changes in v5:
  - Rebase on the master branch(ad46af0e76) of u-boot-dm git tree.
  - Update the cover-letter.
  - Add Reviewed-by tag.

Changes in v4:
  - Rebase on the master branch (22e10be45) of u-boot-dm git tree.
  - Update the cover-letter.

Changes in v3:
  - Move out [PATCH 1/3] ARM: dts: at91: add dts file for 
at91sam9g20/at91sam9260.
  - Add [PATCH]: board: at91sam9260ek/9g20ek: Enable early debug UART.

Changes in v2: None

  board/atmel/at91sam9260ek/at91sam9260ek.c  | 13 +
  configs/at91sam9260ek_dataflash_cs0_defconfig  |  6 ++
  configs/at91sam9260ek_dataflash_cs1_defconfig  |  6 ++
  configs/at91sam9260ek_nandflash_defconfig  |  6 ++
  configs/at91sam9g20ek_2mmc_defconfig   |  6 ++
  configs/at91sam9g20ek_2mmc_nandflash_defconfig |  6 ++
  configs/at91sam9g20ek_dataflash_cs0_defconfig  |  6 ++
  configs/at91sam9g20ek_dataflash_cs1_defconfig  |  6 ++
  configs/at91sam9g20ek_nandflash_defconfig  |  6 ++
  configs/at91sam9xeek_dataflash_cs0_defconfig   |  6 ++
  configs/at91sam9xeek_dataflash_cs1_defconfig   |  6 ++
  configs/at91sam9xeek_nandflash_defconfig   |  6 ++
  12 files changed, 79 insertions(+)

diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c 
b/board/atmel/at91sam9260ek/at91sam9260ek.c
index e28242f034..b087fce9b8 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -7,6 +7,7 @@
   */
  
  #include 

+#include 
  #include 
  #include 
  #include 
@@ -61,10 +62,22 @@ static void at91sam9260ek_nand_hw_init(void)
  }
  #endif
  
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT

+void board_debug_uart_init(void)
+{
+   at91_seriald_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
  int board_early_init_f(void)
  {
+#ifdef CONFIG_DEBUG_UART
+   debug_uart_init();
+#endif
return 0;
  }
+#endif
  
  int board_init(void)

  {
diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig 
b/configs/at91sam9260ek_dataflash_cs0_defconfig
index 6d34e215ff..cc3f0a8b34 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -31,6 +31,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_USB=y
  CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig 
b/configs/at91sam9260ek_dataflash_cs1_defconfig
index 85f01f34d2..cb621dfb9f 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -31,6 +31,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_USB=y
  CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9260ek_nandflash_defconfig 
b/configs/at91sam9260ek_nandflash_defconfig
index d9a7a48e88..20d3565377 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -31,6 +31,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_USB=y
  CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9g20ek_2mmc_defconfig 
b/configs/at91sam9g20ek_2mmc_defconfig
index ef7bd402c7..18e88a7445 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -33,6 +33,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_USB=y
  CONFIG_DM_USB=y
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig 
b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index 398be7e60a..fb0d87ab4b 100644
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -33,6 +33,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y

Re: [U-Boot] [PATCH v4 3/3] board: at91sam9n12ek: Enable early debug UART

[Yang, Wenyou]

Hi Simon,

The patches has been rebased on the master branch of u-boot-dm git tree

Could you help take them?


Best Regards,

Wenyou Yang

On 2017/4/18 14:54, Wenyou Yang wrote:

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 
---

Changes in v4:
  - Rebase on the master branch(ad46af0e76) of u-boot-dm git tree.
  - Update the cover-letter.
  - Add Reviewed-by tag.

Changes in v3:
  - Rebase on the master branch (22e10be45) of u-boot-dm git tree.
  - Update the cover-letter.

Changes in v2:
  - Use CONFIG_DEBUG_UART_CLOCK as the input clock for the early
debug UART.
  - Move out [PATCH 1/4] ARM: dts: at91: add dts files for at91sam9n12ek.

  board/atmel/at91sam9n12ek/at91sam9n12ek.c | 13 +
  configs/at91sam9n12ek_mmc_defconfig   |  6 ++
  configs/at91sam9n12ek_nandflash_defconfig |  6 ++
  configs/at91sam9n12ek_spiflash_defconfig  |  6 ++
  4 files changed, 31 insertions(+)

diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c 
b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
index 02b7790627..1105428986 100644
--- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c
+++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
@@ -13,6 +13,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -162,10 +163,22 @@ void at91sam9n12ek_usb_hw_init(void)
  }
  #endif
  
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT

+void board_debug_uart_init(void)
+{
+   at91_seriald_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
  int board_early_init_f(void)
  {
+#ifdef CONFIG_DEBUG_UART
+   debug_uart_init();
+#endif
return 0;
  }
+#endif
  
  int board_init(void)

  {
diff --git a/configs/at91sam9n12ek_mmc_defconfig 
b/configs/at91sam9n12ek_mmc_defconfig
index abb07260be..e7e8a014c6 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -35,6 +35,12 @@ CONFIG_SPI_FLASH_ATMEL=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_DM_SPI=y
  CONFIG_ATMEL_SPI=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig 
b/configs/at91sam9n12ek_nandflash_defconfig
index 1b420e62b8..e626805591 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -35,6 +35,12 @@ CONFIG_SPI_FLASH_ATMEL=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_DM_SPI=y
  CONFIG_ATMEL_SPI=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig 
b/configs/at91sam9n12ek_spiflash_defconfig
index 9048b14de4..a5abcd1f3b 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -35,6 +35,12 @@ CONFIG_SPI_FLASH_ATMEL=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_DM_SPI=y
  CONFIG_ATMEL_SPI=y


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Re: [U-Boot] [PATCH v5 3/3] board: at91sam9x5ek: Enable early debug UART

[Yang, Wenyou]

Hi Simon,

The patches has been rebased on the master branch of u-boot-dm git tree,

and you added Reviewed-by tag before.

Could you help take them?


Best Regards,

Wenyou Yang

On 2017/4/18 14:51, Wenyou Yang wrote:

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 
---

Changes in v5:
  - Rebase on the master branch(ad46af0e76) of u-boot-dm git tree.
  - Update the cover-letter.

Changes in v4:
  - Rebase on the master branch (22e10be45) of u-boot-dm git tree.
  - Update the cover-letter.

Changes in v3:
  - Use CONFIG_DEBUG_UART_CLOCK as the input clock for the early
debug UART.
  - Drop [PATCH 4/5] configs: at91sam9x5ek: move SYS_NO_FLASH to defconfig.

Changes in v2:
  - Rebase on the patch set:
 [RESEND PATCH v2] ARM: at91: add default config file for sama5d36ek 
CMP board
 http://lists.denx.de/pipermail/u-boot/2017-February/280525.html

  board/atmel/at91sam9x5ek/at91sam9x5ek.c  | 14 +-
  configs/at91sam9x5ek_dataflash_defconfig |  6 ++
  configs/at91sam9x5ek_mmc_defconfig   |  6 ++
  configs/at91sam9x5ek_nandflash_defconfig |  6 ++
  configs/at91sam9x5ek_spiflash_defconfig  |  6 ++
  5 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c 
b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
index 235b33725d..c661c77f83 100644
--- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
@@ -12,6 +12,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #ifdef CONFIG_LCD_INFO
@@ -182,11 +183,22 @@ void lcd_show_board_info(void)
  #endif /* CONFIG_LCD_INFO */
  #endif /* CONFIG_LCD */
  
-int board_early_init_f(void)

+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
  {
at91_seriald_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+   debug_uart_init();
+#endif
return 0;
  }
+#endif
  
  int board_init(void)

  {
diff --git a/configs/at91sam9x5ek_dataflash_defconfig 
b/configs/at91sam9x5ek_dataflash_defconfig
index 7850b994d5..64707dbdaa 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -40,6 +40,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_DM_SPI=y
  CONFIG_ATMEL_SPI=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig 
b/configs/at91sam9x5ek_mmc_defconfig
index 5990778ada..ddfa1e 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -40,6 +40,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_DM_SPI=y
  CONFIG_ATMEL_SPI=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig 
b/configs/at91sam9x5ek_nandflash_defconfig
index 816fe69834..a26b38f330 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -40,6 +40,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_DM_SPI=y
  CONFIG_ATMEL_SPI=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig 
b/configs/at91sam9x5ek_spiflash_defconfig
index 8574525bc2..75d25d8e61 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -40,6 +40,12 @@ CONFIG_MACB=y
  CONFIG_PINCTRL=y
  CONFIG_PINCTRL_AT91=y
  CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf200
+CONFIG_DEBUG_UART_CLOCK=13200
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
  CONFIG_ATMEL_USART=y
  CONFIG_DM_SPI=y
  CONFIG_ATMEL_SPI=y


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Re: [U-Boot] [PATCH v3 0/6] ARM: dts: at91: Add dts files for AT91 SoCs' boards

[Yang, Wenyou]

Hi Simon,

The patches has been rebased on the master branch of u-boot-dm git tree

Could you help take them?


Best Regards,

Wenyou Yang


On 2017/4/18 13:49, Wenyou Yang wrote:

The device tree source files of AT91 SoCs's board are copied from
the Linux v4.10, and have some changes.

Changes in v3:
  - Add Reviewed-by tag.
  - Rebase on the master branch(ad46af0e76) of u-boot-dm git tree.

Changes in v2:
  - Rebase on the master branch (22e10be45) of u-boot-dm git tree.

Wenyou Yang (6):
   ARM: dts: at91: Add dts files for at91sam9x5ek
   ARM: dts: at91: Add dts files for at91sam9n12ek
   ARM: dts: at91: Add dts files for at91sam9m10g45ek
   ARM: dts: at91: Add dts files for at91sam9260ek/9g20ek
   ARM: dts: at91: Add dts files for at91sam9rlek
   ARM: dts: at91: Add dts files for at91sam9263ek

  arch/arm/dts/Makefile  |   20 +
  arch/arm/dts/at91sam9260.dtsi  |  149 ++--
  arch/arm/dts/at91sam9260ek.dts |  215 ++
  arch/arm/dts/at91sam9263.dtsi  |  198 ++---
  arch/arm/dts/at91sam9263ek.dts |  229 ++
  arch/arm/dts/at91sam9g15.dtsi  |   29 +
  arch/arm/dts/at91sam9g15ek.dts |   26 +
  arch/arm/dts/at91sam9g20.dtsi  |4 +-
  arch/arm/dts/at91sam9g20ek.dts |   29 +
  arch/arm/dts/at91sam9g20ek_2mmc.dts|   56 ++
  arch/arm/dts/at91sam9g20ek_common.dtsi |  227 ++
  arch/arm/dts/at91sam9g25.dtsi  |   31 +
  arch/arm/dts/at91sam9g25ek.dts |   69 ++
  arch/arm/dts/at91sam9g35.dtsi  |   30 +
  arch/arm/dts/at91sam9g35ek.dts |   31 +
  arch/arm/dts/at91sam9g45.dtsi  |  218 +++---
  arch/arm/dts/at91sam9m10g45ek.dts  |  359 +
  arch/arm/dts/at91sam9n12.dtsi  | 1064 ++
  arch/arm/dts/at91sam9n12ek.dts |  265 +++
  arch/arm/dts/at91sam9rl.dtsi   | 1139 
  arch/arm/dts/at91sam9rlek.dts  |  239 ++
  arch/arm/dts/at91sam9x25.dtsi  |   32 +
  arch/arm/dts/at91sam9x25ek.dts |   30 +
  arch/arm/dts/at91sam9x35.dtsi  |   31 +
  arch/arm/dts/at91sam9x35ek.dts |   30 +
  arch/arm/dts/at91sam9x5.dtsi   | 1302 
  arch/arm/dts/at91sam9x5_can.dtsi   |   71 ++
  arch/arm/dts/at91sam9x5_isi.dtsi   |   72 ++
  arch/arm/dts/at91sam9x5_lcd.dtsi   |  146 
  arch/arm/dts/at91sam9x5_macb0.dtsi |   67 ++
  arch/arm/dts/at91sam9x5_macb1.dtsi |   55 ++
  arch/arm/dts/at91sam9x5_usart3.dtsi|   69 ++
  arch/arm/dts/at91sam9x5cm.dtsi |  100 +++
  arch/arm/dts/at91sam9x5dm.dtsi |   66 ++
  arch/arm/dts/at91sam9x5ek.dtsi |  167 
  35 files changed, 6603 insertions(+), 262 deletions(-)
  create mode 100644 arch/arm/dts/at91sam9260ek.dts
  create mode 100644 arch/arm/dts/at91sam9263ek.dts
  create mode 100644 arch/arm/dts/at91sam9g15.dtsi
  create mode 100644 arch/arm/dts/at91sam9g15ek.dts
  create mode 100644 arch/arm/dts/at91sam9g20ek.dts
  create mode 100644 arch/arm/dts/at91sam9g20ek_2mmc.dts
  create mode 100644 arch/arm/dts/at91sam9g20ek_common.dtsi
  create mode 100644 arch/arm/dts/at91sam9g25.dtsi
  create mode 100644 arch/arm/dts/at91sam9g25ek.dts
  create mode 100644 arch/arm/dts/at91sam9g35.dtsi
  create mode 100644 arch/arm/dts/at91sam9g35ek.dts
  create mode 100644 arch/arm/dts/at91sam9m10g45ek.dts
  create mode 100644 arch/arm/dts/at91sam9n12.dtsi
  create mode 100644 arch/arm/dts/at91sam9n12ek.dts
  create mode 100644 arch/arm/dts/at91sam9rl.dtsi
  create mode 100644 arch/arm/dts/at91sam9rlek.dts
  create mode 100644 arch/arm/dts/at91sam9x25.dtsi
  create mode 100644 arch/arm/dts/at91sam9x25ek.dts
  create mode 100644 arch/arm/dts/at91sam9x35.dtsi
  create mode 100644 arch/arm/dts/at91sam9x35ek.dts
  create mode 100644 arch/arm/dts/at91sam9x5.dtsi
  create mode 100644 arch/arm/dts/at91sam9x5_can.dtsi
  create mode 100644 arch/arm/dts/at91sam9x5_isi.dtsi
  create mode 100644 arch/arm/dts/at91sam9x5_lcd.dtsi
  create mode 100644 arch/arm/dts/at91sam9x5_macb0.dtsi
  create mode 100644 arch/arm/dts/at91sam9x5_macb1.dtsi
  create mode 100644 arch/arm/dts/at91sam9x5_usart3.dtsi
  create mode 100644 arch/arm/dts/at91sam9x5cm.dtsi
  create mode 100644 arch/arm/dts/at91sam9x5dm.dtsi
  create mode 100644 arch/arm/dts/at91sam9x5ek.dtsi



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Re: [U-Boot] [PATCH v4 0/7] board: sama5d4: convert boards to support DM/DT

[Yang, Wenyou]

Hi Simon,

Sorry for the inconvenience caused.

This patch set is based on the following patch sets.
1 ./ [PATCH v3 0/2] mtd: nand: atmel: use another functions to set gpio 
value

https://lists.denx.de/pipermail/u-boot/2017-March/284597.html

2./ [U-Boot] [PATCH v8 0/2] pinctrl: at91: Add pinctrl driver
https://lists.denx.de/pipermail/u-boot/2017-March/284577.html

3./ [PATCH v4 0/3] gpio: at91_gpio: add option and clock support
https://lists.denx.de/pipermail/u-boot/2017-March/284580.html

4./ [PATCH v5 0/4] ARM: dts: at91: add dts files for the boards of SAMA5D3/4
https://lists.denx.de/pipermail/u-boot/2017-March/284598.html

5./ [PATCH v2 0/4] ARM: SPL: at91: update to support DM/DT
https://lists.denx.de/pipermail/u-boot/2017-March/284764.html

I will send a new version to include these information.

Thank you so much.


On 2017/4/13 8:36, Simon Glass wrote:

Hi Wenyou,

On 11 April 2017 at 23:00, Yang, Wenyou <wenyou.y...@microchip.com> wrote:

Hi Simon,


On 2017/4/11 21:56, Simon Glass wrote:

Hi,

On 10 April 2017 at 00:57, Yang, Wenyou <wenyou.y...@microchip.com> wrote:

Hi Simon,


On 2017/4/10 3:28, Simon Glass wrote:

+Tom

Hi,

On 7 April 2017 at 01:28, Yang, Wenyou <wenyou.y...@microchip.com>
wrote:

Hi Andreas,

Could you help find a time to take these patch series?

They are here for a long time.


Tom might be able to take it, or if not I could bring it in via DM I
suppose, since it is a conversion.


I truly appreciate you if you take these patches.

OK I've assigned these to myself in patchwork and will pick them up at
some point.


Thank you very much.
Any question, please let me know.


Andreas, please feel free to grab these yourself if you like.

I picked these up and pushed to u-boot-dm/testing but got various
merge conflicts and the build error below. Can you please take a look
and resend the series?

04: board: sama5d4_xplained: clean up code
-  at91_set_pio_output(AT91_PIO_PORTC, 3, 0);
-  at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* SPI0_MISO */
-board/atmel/sama5d4_xplained/built-in.o: In function
`sama5d4_xplained_macb0_hw_init':
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:244:
undefined reference to `at91_set_a_periph'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:245:
undefined reference to `at91_set_a_periph'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:246:
undefined reference to `at91_set_a_periph'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:247:
undefined reference to `at91_set_a_periph'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:248:
undefined reference to `at91_set_a_periph'
-board/atmel/sama5d4_xplained/built-in.o:build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:249:
more undefined references to `at91_set_a_periph' follow
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:262:
undefined reference to `at91_set_b_periph'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:263:
undefined reference to `at91_set_b_periph'
-board/atmel/sama5d4_xplained/built-in.o: In function
`sama5d4_xplained_spi0_hw_init':
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:54:
undefined reference to `at91_set_pio_output'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:87:
undefined reference to `at91_set_a_periph'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:88:
undefined reference to `at91_set_a_periph'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:89:
undefined reference to `at91_set_a_periph'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:90:
undefined reference to `at91_set_a_periph'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:91:
undefined reference to `at91_set_a_periph'
-board/atmel/sama5d4_xplained/built-in.o:build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:92:
more undefined references to `at91_set_a_periph' follow
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:107:
undefined reference to `at91_set_pio_output'
-build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:108:
undefined reference to `at91_set_pio_output'
+  at91_set_a_periph(AT91_PIO_PORTC, 5, 0); /* D0 */
+  at91_set_pio_output(AT91_PIO_PORTE, 11, 1);
+build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:170:
undefined reference to `at91_set_b_periph'
+build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:171:
undefined reference to `at91_set_b_periph'
+build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:53:
undefined reference to `at91_set_a_periph'
+build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:54:
undefined reference to `at91_set_a_periph'
+board/atmel/sama5d4_xplained/built-in.o:build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:55:
more undefined references to `at91_set_a_periph' follow
+build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:70:
undefined reference to `at91_set_pio_output'
+build/../board/atmel/sama5d4_xplained/sama5d4_xplained.c:71:
undefined reference to `at91_set_pio_

Re: [U-Boot] [PATCH v4 0/7] board: sama5d4: convert boards to support DM/DT

[Yang, Wenyou]

Hi Simon,


On 2017/4/11 21:56, Simon Glass wrote:

Hi,

On 10 April 2017 at 00:57, Yang, Wenyou <wenyou.y...@microchip.com> wrote:

Hi Simon,


On 2017/4/10 3:28, Simon Glass wrote:

+Tom

Hi,

On 7 April 2017 at 01:28, Yang, Wenyou <wenyou.y...@microchip.com> wrote:

Hi Andreas,

Could you help find a time to take these patch series?

They are here for a long time.


Tom might be able to take it, or if not I could bring it in via DM I
suppose, since it is a conversion.


I truly appreciate you if you take these patches.

OK I've assigned these to myself in patchwork and will pick them up at
some point.


Thank you very much.
Any question, please let me know.



Andreas, please feel free to grab these yourself if you like.

Regards,
Simon


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v4 0/7] board: sama5d4: convert boards to support DM/DT

[Yang, Wenyou]

Hi Simon,


On 2017/4/10 3:28, Simon Glass wrote:

+Tom

Hi,

On 7 April 2017 at 01:28, Yang, Wenyou <wenyou.y...@microchip.com> wrote:

Hi Andreas,

Could you help find a time to take these patch series?

They are here for a long time.


Tom might be able to take it, or if not I could bring it in via DM I
suppose, since it is a conversion.


I truly appreciate you if you take these patches.



Regards,
Simon


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v4 0/7] board: sama5d4: convert boards to support DM/DT

[Yang, Wenyou]

Hi Andreas,

Could you help find a time to take these patch series?

They are here for a long time.


Thank you!

Best Regards,
Wenyou Yang

On 2017/3/23 14:10, Wenyou Yang wrote:

The purpose of patch set is to convert the board to support device
tree and driver model, and enable the early debug UART as well.
It is based on the patch set:
[PATCH v8 0/2] pinctrl: at91: Add pinctrl driver
https://lists.denx.de/pipermail/u-boot/2017-March/284577.html

Changes in v4:
  - Convert the macb to support DM and clean up macb init code.
  - Remain the SPI speed macros.
  - Update the config options for SPL.
  - Update the commit log.
  - Remove the unneeded dbgu init during board_early_init_f stage.
  - Use CONFIG_DEBUG_UART_CLOCK as the input clock for the early
debug uart.
  - Drop [PATCH] configs: sama5d4: move CONFIG_SYS_NO_FLASH to *defconfig
  - Rebase on v2017.03.

Changes in v3:
  - add the Reviewed-by tags.
  - rebase on the patch:
 [PATCH v2] ARM: dts: at91: add device tree files for at91sam9x5ek
 http://lists.denx.de/pipermail/u-boot/2017-February/280504.html

Changes in v2:
  - Restore the wrong removal #define CONFIG_USB_ETHER.
  - Update the commit log.
  - Restore the wrong removal of USB related code.
  - Update the commit log.
  - Restore wrong removal of #define CONFIG_USB_ETHER.
  - Update the commit log.
  - Restore the wrong removal USB related code.
  - Update the commit log.

Wenyou Yang (7):
   configs: at91-sama5_common: fix for CONFIG_AT91_GPIO
   board: sama5d4_xplained: update to support DM/DT
   board: sama5d4_xplained: clean up code
   board: sama5d4_xplained: enable early debug UART
   board: sama5d4ek: update to support DM/DT
   board: sama5d4ek: clean up code
   board: sama5d4ek: enable early debug UART

  board/atmel/sama5d4_xplained/sama5d4_xplained.c | 145 +++-
  board/atmel/sama5d4ek/sama5d4ek.c   | 145 +++-
  configs/sama5d4_xplained_mmc_defconfig  |  37 +-
  configs/sama5d4_xplained_nandflash_defconfig|  36 +-
  configs/sama5d4_xplained_spiflash_defconfig |  37 +-
  configs/sama5d4ek_mmc_defconfig |  37 ++
  configs/sama5d4ek_nandflash_defconfig   |  38 ++-
  configs/sama5d4ek_spiflash_defconfig|  38 ++-
  include/configs/at91-sama5_common.h |   2 +
  include/configs/sama5d4_xplained.h  |  45 +---
  include/configs/sama5d4ek.h |  45 +---
  11 files changed, 253 insertions(+), 352 deletions(-)



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Re: [U-Boot] [PATCH v5] mmc: gen_atmel_mci: add driver model support for mci

[Yang, Wenyou]

Hi Jaehoon,


On 2017/3/30 12:30, Jaehoon Chung wrote:

Hi Wenyou,

On 03/23/2017 01:48 PM, Wenyou Yang wrote:

Add the driver model support for Atmel mci while retaining the
existing legacy code. This allows the driver to support boards
that have converted to driver model as well as those that have not.

Signed-off-by: Wenyou Yang 

If Andreas is ok, i will pick this. Otherwise, pick this with my ack.
Let me know, plz.


Andreas, are you okay?



Acked-by: Jaehoon Chung 

Best Regards,
Jaehoon Chung


---

Changes in v5:
  - Rebase on v2017.03.

Changes in v4:
  - Remove unneeded #ifdef CONFIG_DM_MMC.

Changes in v3:
  - Use unified #ifdef CONFIG_DM_MMC #else...#endif, instead of #ifndef 
CONFIG_DM_MMC
#else...#endif.

Changes in v2:
  - Change the return type of atmel_mci_setup_cfg() from int to void.
  - Add comments on the features depends on the IP version.
  - Add the error handle path of clock.
  - Fix the missing use priv->bus_clk_rate.
  - Return from mmc_bind() directly, instead of checking its return.

  drivers/mmc/Kconfig |   9 +++
  drivers/mmc/gen_atmel_mci.c | 158 +++-
  2 files changed, 166 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 01d1dbfb1b..cb9937b4eb 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -336,6 +336,15 @@ config MMC_SUNXI
  This selects support for the SD/MMC Host Controller on
  Allwinner sunxi SoCs.
  
+config GENERIC_ATMEL_MCI

+   bool "Atmel Multimedia Card Interface support"
+   depends on DM_MMC && BLK && DM_MMC_OPS && ARCH_AT91
+   help
+ This enables support for Atmel High Speed Multimedia Card Interface
+ (HSMCI), which supports the MultiMedia Card (MMC) Specification V4.3,
+ the SD Memory Card Specification V2.0, the SDIO V2.0 specification
+ and CE-ATA V1.1.
+
  endif
  
  endmenu

diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index 7dc4a5de74..c25d9ed96e 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -10,6 +10,7 @@
   */
  
  #include 

+#include 
  #include 
  #include 
  #include 
@@ -18,8 +19,11 @@
  #include 
  #include 
  #include 
+#include 
  #include "atmel_mci.h"
  
+DECLARE_GLOBAL_DATA_PTR;

+
  #ifndef CONFIG_SYS_MMC_CLK_OD
  # define CONFIG_SYS_MMC_CLK_OD15
  #endif
@@ -37,6 +41,10 @@ struct atmel_mci_priv {
struct atmel_mci*mci;
unsigned intinitialized:1;
unsigned intcurr_clk;
+#ifdef CONFIG_DM_MMC
+   struct mmc  mmc;
+   ulong   bus_clk_rate;
+#endif
  };
  
  /* Read Atmel MCI IP version */

@@ -58,11 +66,19 @@ static void dump_cmd(u32 cmdr, u32 arg, u32 status, const 
char* msg)
  }
  
  /* Setup for MCI Clock and Block Size */

+#ifdef CONFIG_DM_MMC
+static void mci_set_mode(struct atmel_mci_priv *priv, u32 hz, u32 blklen)
+{
+   struct mmc *mmc = >mmc;
+   u32 bus_hz = priv->bus_clk_rate;
+#else
  static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
  {
struct atmel_mci_priv *priv = mmc->priv;
-   atmel_mci_t *mci = priv->mci;
u32 bus_hz = get_mci_clk_rate();
+#endif
+
+   atmel_mci_t *mci = priv->mci;
u32 clkdiv = 255;
unsigned int version = atmel_mci_get_version(mci);
u32 clkodd = 0;
@@ -202,10 +218,18 @@ io_fail:
   * Sends a command out on the bus and deals with the block data.
   * Takes the mmc pointer, a command pointer, and an optional data pointer.
   */
+#ifdef CONFIG_DM_MMC
+static int atmel_mci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+   struct atmel_mci_priv *priv = dev_get_priv(dev);
+   struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
  static int
  mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
  {
struct atmel_mci_priv *priv = mmc->priv;
+#endif
atmel_mci_t *mci = priv->mci;
u32 cmdr;
u32 error_flags = 0;
@@ -335,17 +359,28 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct 
mmc_data *data)
return 0;
  }
  
+#ifdef CONFIG_DM_MMC

+static int atmel_mci_set_ios(struct udevice *dev)
+{
+   struct atmel_mci_priv *priv = dev_get_priv(dev);
+   struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
  /* Entered into mmc structure during driver init */
  static int mci_set_ios(struct mmc *mmc)
  {
struct atmel_mci_priv *priv = mmc->priv;
+#endif
atmel_mci_t *mci = priv->mci;
int bus_width = mmc->bus_width;
unsigned int version = atmel_mci_get_version(mci);
int busw;
  
  	/* Set the clock speed */

+#ifdef CONFIG_DM_MMC
+   mci_set_mode(priv, mmc->clock, MMC_DEFAULT_BLKLEN);
+#else
mci_set_mode(mmc, mmc->clock, MMC_DEFAULT_BLKLEN);
+#endif
  
  	/*

 * set the bus width and select slot for this interface

Re: [U-Boot] [PATCH v4] mmc: atmel_sdhci: Convert to the driver model support

[Yang, Wenyou]

Hi Simon,

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年6月26日 10:53
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Andreas Bießmann
> <andr...@biessmann.org>
> Subject: Re: [PATCH v4] mmc: atmel_sdhci: Convert to the driver model support
> 
> Hi Wenyou,
> 
> On 19 June 2016 at 20:09, Wenyou Yang <wenyou.y...@atmel.com> wrote:
> > Convert the driver to the driver model while retaining the existing
> > legacy code. This allows the driver to support boards that have
> > converted to driver model as well as those that have not.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> > Changes in v4:
> >  - Update the clk API based on [PATCH] clk: convert API to match
> >reset/mailbox fstyle (http://patchwork.ozlabs.org/patch/625342/).
> >  - Remove check on dev_get_parent() return.
> >  - Fixed the return value, such as -ENODEV->-EINVAL.
> >
> > Changes in v3:
> >  - Remove the redundant log print.
> >
> > Changes in v2:
> >  - Add clock support, include enabling peripheral clock and
> >generated clock.
> >  - Retain the existing legacy code to support boards which have not
> >converted to driver model.
> >
> >  drivers/mmc/Kconfig   | 10 +
> >  drivers/mmc/atmel_sdhci.c | 99
> > +++
> >  2 files changed, 109 insertions(+)
> >
> 
> Reviewed-by: Simon Glass <s...@chromium.org>
> 
> Please see question below.
> 
> > diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index
> > c80efc3..518c624 100644
> > --- a/drivers/mmc/Kconfig
> > +++ b/drivers/mmc/Kconfig
> > @@ -25,6 +25,16 @@ config MSM_SDHCI
> >SD 3.0 specifications. Both SD and eMMC devices are supported.
> >   Card-detect gpios are not supported.
> >
> > +config ATMEL_SDHCI
> > +   bool "Atmel SDHCI controller support"
> > +   depends on DM_MMC && ARCH_AT91
> > +   help
> > + This enables support for the Atmel SDHCI controller, which 
> > supports
> > + the embedded MultiMedia Card (e.MMC) Specification V4.51, the SD
> > + Memory Card Specification V3.0, and the SDIO V3.0 specification.
> > + It is compliant with the SD Host Controller Standard V3.0
> > + specification.
> > +
> >  config ROCKCHIP_DWMMC
> > bool "Rockchip SD/MMC controller support"
> > depends on DM_MMC && OF_CONTROL diff --git
> > a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index
> > 24b68b6..a68d192 100644
> > --- a/drivers/mmc/atmel_sdhci.c
> > +++ b/drivers/mmc/atmel_sdhci.c
> > @@ -6,12 +6,16 @@
> >   */
> >
> >  #include 
> > +#include 
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> >
> >  #define ATMEL_SDHC_MIN_FREQ40
> >
> > +#ifndef CONFIG_DM_MMC
> > +
> >  int atmel_sdhci_init(void *regbase, u32 id)  {
> > struct sdhci_host *host;
> > @@ -38,3 +42,98 @@ int atmel_sdhci_init(void *regbase, u32 id)
> >
> > return 0;
> >  }
> > +
> > +#else
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +static int atmel_sdhci_probe(struct udevice *dev) {
> > +   struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
> > +   struct sdhci_host *host = dev_get_priv(dev);
> > +   u32 max_clk, min_clk = ATMEL_SDHC_MIN_FREQ;
> > +   u32 caps0, caps1;
> > +   u32 clk_base, clk_mul;
> > +   u32 gck_rate;
> > +   struct udevice *dev_clk;
> > +   struct clk clk;
> > +   int periph, ret;
> > +
> > +   ret = clk_get_by_index(dev, 0, );
> > +   if (ret)
> > +   return ret;
> > +
> > +   periph = fdtdec_get_uint(gd->fdt_blob, clk.dev->of_offset, "reg", 
> > -1);
> > +   if (periph < 0)
> > +   return -EINVAL;
> > +
> > +   dev_clk = dev_get_parent(clk.dev);
> > +   ret = clk_request(dev_clk, );
> > +   if (ret)
> > +   return ret;
> > +
> > +   clk.id = periph;
> > +   ret = clk_enable();
> > +   if (ret)
> > +   return ret;
> > +
> > +   host->name = (char *)dev->name;
> > +   host->ioaddr = (void *)dev_get_addr(dev);
> > +
> &g

Re: [U-Boot] [PATCH v2 2/2] clk: at91: Add new clock driver

[Yang, Wenyou]

Hi Simon,

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年6月10日 8:34
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Andreas Bießmann
> <andr...@biessmann.org>; Stephen Warren <swar...@wwwdotorg.org>
> Subject: Re: [PATCH v2 2/2] clk: at91: Add new clock driver
> 
> +Stephen
> 
> Hi Wenyou,
> 
> On 7 June 2016 at 01:11, Wenyou Yang <wenyou.y...@atmel.com> wrote:
> > The patch is referred to at91 clock driver of Linux, to make the clock
> > node descriptions in dt are aligned with the Linux.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> > Changes in v2:
> >  - Remove the redundant log print.
> >
> >  arch/arm/mach-at91/include/mach/at91_pmc.h |  11 ++-
> >  drivers/clk/Kconfig|   1 +
> >  drivers/clk/Makefile   |   1 +
> >  drivers/clk/at91/Kconfig   |  14 +++
> >  drivers/clk/at91/Makefile  |  11 +++
> >  drivers/clk/at91/clk-generated.c   | 138
> +
> >  drivers/clk/at91/clk-h32mx.c   |  56 
> >  drivers/clk/at91/clk-main.c|  55 
> >  drivers/clk/at91/clk-master.c  |  33 +++
> >  drivers/clk/at91/clk-peripheral.c  |  68 ++
> >  drivers/clk/at91/clk-plla.c|  55 
> >  drivers/clk/at91/clk-slow.c|  37 
> >  drivers/clk/at91/clk-system.c  |  65 ++
> >  drivers/clk/at91/clk-utmi.c|  67 ++
> >  drivers/clk/at91/pmc.c |  49 ++
> >  drivers/clk/at91/pmc.h |  17 
> >  drivers/clk/at91/sckc.c|  30 +++
> >  17 files changed, 705 insertions(+), 3 deletions(-)  create mode
> > 100644 drivers/clk/at91/Kconfig  create mode 100644
> > drivers/clk/at91/Makefile  create mode 100644
> > drivers/clk/at91/clk-generated.c  create mode 100644
> > drivers/clk/at91/clk-h32mx.c  create mode 100644
> > drivers/clk/at91/clk-main.c  create mode 100644
> > drivers/clk/at91/clk-master.c  create mode 100644
> > drivers/clk/at91/clk-peripheral.c  create mode 100644
> > drivers/clk/at91/clk-plla.c  create mode 100644
> > drivers/clk/at91/clk-slow.c  create mode 100644
> > drivers/clk/at91/clk-system.c  create mode 100644
> > drivers/clk/at91/clk-utmi.c  create mode 100644 drivers/clk/at91/pmc.c
> > create mode 100644 drivers/clk/at91/pmc.h  create mode 100644
> > drivers/clk/at91/sckc.c
> >
> > diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h
> > b/arch/arm/mach-at91/include/mach/at91_pmc.h
> > index 7684f09..d02f3e1 100644
> > --- a/arch/arm/mach-at91/include/mach/at91_pmc.h
> > +++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
> > @@ -149,6 +149,9 @@ typedef struct at91_pmc {
> >
> >  #define AT91_PMC_PCR_PID_MASK  (0x3f)
> >  #define AT91_PMC_PCR_GCKCSS(0x7 << 8)
> > +#define AT91_PMC_PCR_GCKCSS_MASK   0x07
> > +#define AT91_PMC_PCR_GCKCSS_OFFSET 8
> > +#define AT91_PMC_PCR_GCKCSS_(x)((x & 0x07) << 8)
> >  #defineAT91_PMC_PCR_GCKCSS_SLOW_CLK(0x0 << 8)
> >  #defineAT91_PMC_PCR_GCKCSS_MAIN_CLK(0x1 << 8)
> >  #defineAT91_PMC_PCR_GCKCSS_PLLA_CLK(0x2 << 8)
> > @@ -158,8 +161,9 @@ typedef struct at91_pmc {
> >  #define AT91_PMC_PCR_CMD_WRITE (0x1 << 12)
> >  #define AT91_PMC_PCR_DIV   (0x3 << 16)
> >  #define AT91_PMC_PCR_GCKDIV(0xff << 20)
> > -#defineAT91_PMC_PCR_GCKDIV_(x) ((x & 0xff) << 20)
> > -#defineAT91_PMC_PCR_GCKDIV_OFFSET  20
> > +#define AT91_PMC_PCR_GCKDIV_MASK   0xff
> > +#define AT91_PMC_PCR_GCKDIV_OFFSET 20
> > +#define AT91_PMC_PCR_GCKDIV_(x)((x & 0xff) << 20)
> >  #define AT91_PMC_PCR_EN(0x1 << 28)
> >  #define AT91_PMC_PCR_GCKEN (0x1 << 29)
> >
> > @@ -243,8 +247,9 @@ typedef struct at91_pmc {
> >  #defineAT91_PMC_PCK1RDY(1 <<  9)   /*
> Programmable Clock 1 */
> >  #defineAT91_PMC_PCK2RDY(1 << 10)   /*
> Programmable Clock 2 */
> >  #defineAT91_PMC_PCK3RDY(1 << 11)  

Re: [U-Boot] [PATCH v2 1/2] clk: clk-uclass: Add post binding for CLK uclass

[Yang, Wenyou]

HI Simon,

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年6月16日 10:44
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Andreas Bießmann
> <andr...@biessmann.org>
> Subject: Re: [PATCH v2 1/2] clk: clk-uclass: Add post binding for CLK uclass
> 
> Hi Wenyou,
> 
> On 15 June 2016 at 19:08, Yang, Wenyou <wenyou.y...@atmel.com> wrote:
> >
> >
> >> -Original Message-
> >> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> >> Sent: 2016年6月10日 8:34
> >> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Andreas Bießmann
> >> <andr...@biessmann.org>
> >> Subject: Re: [PATCH v2 1/2] clk: clk-uclass: Add post binding for CLK
> >> uclass
> >>
> >> Hi Wenyou,
> >>
> >> On 7 June 2016 at 01:11, Wenyou Yang <wenyou.y...@atmel.com> wrote:
> >> > Add post binding support for CLK uclass to recursively bind its
> >> > children as clk devices.
> >> >
> >> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> >> > ---
> >> >
> >> > Changes in v2: None
> >> >
> >> >  drivers/clk/clk-uclass.c | 51
> >> > 
> >> >  1 file changed, 51 insertions(+)
> >>
> >>
> >> Can you please explain what this is for? We would normally call
> >> dm_scan_fdt_node() for this, but it seems that you are specifically
> >> to create drivers for things with no compatible strings.
> >
> > Yes, for pheriph32ck node have a lot of child nodes with no compatible 
> > strings.
> > This patch purpose is to bind these children nodes. Otherwise these nodes 
> > will
> not be bound.
> >
> > For example,
> >
> > ---8<
> > ahb {
> > apb {
> > pmc: pmc@f0014000 {
> >
> > [snip]
> >
> > periph32ck {
> > compatible = 
> > "atmel,at91sam9x5-clk-peripheral";
> > #address-cells = <1>;
> > #size-cells = <0>;
> > clocks = <>;
> >
> > macb0_clk: macb0_clk {
> > #clock-cells = <0>;
> > reg = <5>;
> > atmel,clk-output-range = <0 
> > 8300>;
> > };
> >
> > [snip]
> >
> > pioA_clk: pioA_clk {
> > #clock-cells = <0>;
> > reg = <18>;
> > atmel,clk-output-range = <0 
> > 8300>;
> > };
> >
> > [snip]
> >
> > spi0_clk: spi0_clk {
> > #clock-cells = <0>;
> > reg = <33>;
> > atmel,clk-output-range = <0 
> > 8300>;
> > };
> >
> > [snip]
> > };
> > };
> >
> > spi0: spi@f800 {
> > compatible = "atmel,at91rm9200-spi";
> > reg = <0xf800 0x100>;
> > clocks = <_clk>;
> > clock-names = "spi_clk";
> > #address-cells = <1>;
> > #size-cells = <0>;
> > status = "disabled";
> > };
> >
> > macb0: ethernet@f8008000 {
> > comp

Re: [U-Boot] [PATCH v2 1/2] clk: clk-uclass: Add post binding for CLK uclass

[Yang, Wenyou]

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年6月10日 8:34
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Andreas Bießmann
> <andr...@biessmann.org>
> Subject: Re: [PATCH v2 1/2] clk: clk-uclass: Add post binding for CLK uclass
> 
> Hi Wenyou,
> 
> On 7 June 2016 at 01:11, Wenyou Yang <wenyou.y...@atmel.com> wrote:
> > Add post binding support for CLK uclass to recursively bind its
> > children as clk devices.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> > Changes in v2: None
> >
> >  drivers/clk/clk-uclass.c | 51
> > 
> >  1 file changed, 51 insertions(+)
> 
> 
> Can you please explain what this is for? We would normally call
> dm_scan_fdt_node() for this, but it seems that you are specifically to create
> drivers for things with no compatible strings.

Yes, for pheriph32ck node have a lot of child nodes with no compatible strings.
This patch purpose is to bind these children nodes. Otherwise these nodes will 
not be bound.

For example,

---8<
ahb {
apb {
pmc: pmc@f0014000 {

[snip]  

periph32ck {
compatible = 
"atmel,at91sam9x5-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <>;

macb0_clk: macb0_clk {
#clock-cells = <0>;
reg = <5>;
atmel,clk-output-range = <0 
8300>;
};

[snip]

pioA_clk: pioA_clk {
#clock-cells = <0>;
reg = <18>;
atmel,clk-output-range = <0 
8300>;
};

[snip]

spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <33>;
atmel,clk-output-range = <0 
8300>;
};

[snip]
};
};

spi0: spi@f800 {
compatible = "atmel,at91rm9200-spi";
reg = <0xf800 0x100>;
clocks = <_clk>;
clock-names = "spi_clk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};

macb0: ethernet@f8008000 {
compatible = "cdns,macb";
reg = <0xf8008000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <_clk>, <_clk>;
clock-names = "hclk", "pclk";
status = "disabled";
};

[snip]  

pioA: gpio@fc038000 {
compatible = "atmel,sama5d2-gpio";
reg = <0xfc038000 0x600>;
clocks = <_clk>;
gpio-controller;
#gpio-cells = <2>;

pinctrl {
compatible = "atmel,sama5d2-pinctrl";
};
};
};
};

>8-

> 
> >
> > diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index
> > b483c1e..ee568e4 100644
> > --- a/drivers/clk/clk-uclass.c
> > +++ b/drivers/clk/clk-uclass.c
> > @@ -106,7 +106,58 @@ int clk_ge

Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver model

[Yang, Wenyou]

Hi Simon,

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年5月6日 1:19
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Joe Hershberger
> <joe.hershber...@ni.com>; h...@denx.de
> Subject: Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver model
> 
> Hi,
> 
> On 4 May 2016 at 21:37, Yang, Wenyou <wenyou.y...@atmel.com> wrote:
> > Hi,
> >
> >
> > On 2016/5/5 11:18, Simon Glass wrote:
> >
> > Hi,
> >
> > On May 4, 2016 21:15, "Yang, Wenyou" <wenyou.y...@atmel.com> wrote:
> >>
> >> Hi Simon,
> >>
> >> > -Original Message-
> >> > From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon
> >> > Glass
> >> > Sent: 2016年5月5日 10:38
> >> > To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> > Cc: h...@denx.de; U-Boot Mailing List <u-boot@lists.denx.de>; Joe
> >> > Hershberger <joe.hershber...@ni.com>
> >> > Subject: Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver
> >> > model
> >> >
> >> > Hi,
> >> >
> >> > On 4 May 2016 at 01:32, Yang, Wenyou <wenyou.y...@atmel.com> wrote:
> >> > >
> >> > > Hi
> >> > >
> >> > > > -Original Message-
> >> > > > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of
> >> > > > Heiko Schocher
> >> > > > Sent: 2016年5月3日 15:54
> >> > > > To: Simon Glass <s...@chromium.org>
> >> > > > Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Joe Hershberger
> >> > > > <joe.hershber...@ni.com>
> >> > > > Subject: Re: [U-Boot] [PATCH 07/18] net: macb: Convert to
> >> > > > driver model
> >> > > >
> >> > > > Hello Simon,
> >> > > >
> >> > > > Am 03.05.2016 um 08:40 schrieb Simon Glass:
> >> > > > > Add driver-model support to this driver. The old code remains
> >> > > > > for now so that we can convert boards one at a time.
> >> > > > >
> >> > > > > Signed-off-by: Simon Glass <s...@chromium.org>
> >> > > > > ---
> >> > > > >
> >> > > > >   drivers/net/macb.c | 119
> >> > > > +
> >> > > > >   1 file changed, 119 insertions(+)
> >> > > >
> >> > > > Thanks!
> >> > > >
> >> > > > Reviewed-by: Heiko Schocher <h...@denx.de>
> >> > > >
> >> > > > tested on the smartweb, corvus, taurus and axm board
> >> > > >
> >> > > > Tested-by: Heiko Schocher <h...@denx.de>
> >> > >
> >> > > I tried to test this patch series on SAMA5D2 Xplained board, but
> >> > > I have the
> >> > compile warning below. Did you experience it?
> >> > >
> >> > > ---8<-
> >> > > drivers/net/macb.c: In function 'macb_phy_init':
> >> > > drivers/net/macb.c:487:9: warning: passing argument 3 of 'phy_connect'
> >> > > from incompatible pointer type [enabled by default] In file
> >> > > included from
> >> > include/miiphy.h:22:0,
> >> > >  from drivers/net/macb.c:36:
> >> > > include/phy.h:226:20: note: expected 'struct udevice *' but
> >> > > argument is of type
> >> > 'const struct device **'
> >> > > --->8
> >> >
> >> > No I don't see that problem. I did a full build test. What is the
> >> > board config name you are using?
> >>
> >> The board is SAMA5D2 Xplained board, the .config file is attached.
> >>
> >> I noticed that in include/phy.h file,  phy_connect() has different
> >> prototype for enabling CONFIG_DM_ETH or not.
> >>
> >> So, I think this issue should be exist.
> >
> > Is that board in mainline?
> >
> > Yes, in mainline.
> >
> > The type of 'dev' parameter of phy_connect() is struct udevice *,
> > instead of struct eth_device * when enabling CONFIG_DM_ETH.
> 
> OK, sounds like it needs a patch. Can you fix it when you enable DM_ETH for 
> that
> board?

Okay, I will try to fix it.


Best Regards,
Wenyou Yang


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Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver model

[Yang, Wenyou]

Hi,

On 2016/5/5 11:18, Simon Glass wrote:


Hi,

On May 4, 2016 21:15, "Yang, Wenyou" <wenyou.y...@atmel.com 
<mailto:wenyou.y...@atmel.com>> wrote:

>
> Hi Simon,
>
> > -Original Message-
> > From: s...@google.com <mailto:s...@google.com> 
[mailto:s...@google.com <mailto:s...@google.com>] On Behalf Of Simon Glass

> > Sent: 2016年5月5日 10:38
> > To: Yang, Wenyou <wenyou.y...@atmel.com 
<mailto:wenyou.y...@atmel.com>>
> > Cc: h...@denx.de <mailto:h...@denx.de>; U-Boot Mailing List 
<u-boot@lists.denx.de <mailto:u-boot@lists.denx.de>>; Joe Hershberger

> > <joe.hershber...@ni.com <mailto:joe.hershber...@ni.com>>
> > Subject: Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver model
> >
> > Hi,
> >
> > On 4 May 2016 at 01:32, Yang, Wenyou <wenyou.y...@atmel.com 
<mailto:wenyou.y...@atmel.com>> wrote:

> > >
> > > Hi
> > >
> > > > -Original Message-
> > > > From: U-Boot [mailto:u-boot-boun...@lists.denx.de 
<mailto:u-boot-boun...@lists.denx.de>] On Behalf Of

> > > > Heiko Schocher
> > > > Sent: 2016年5月3日 15:54
> > > > To: Simon Glass <s...@chromium.org <mailto:s...@chromium.org>>
> > > > Cc: U-Boot Mailing List <u-boot@lists.denx.de 
<mailto:u-boot@lists.denx.de>>; Joe Hershberger

> > > > <joe.hershber...@ni.com <mailto:joe.hershber...@ni.com>>
> > > > Subject: Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver
> > > > model
> > > >
> > > > Hello Simon,
> > > >
> > > > Am 03.05.2016 um 08:40 schrieb Simon Glass:
> > > > > Add driver-model support to this driver. The old code 
remains for

> > > > > now so that we can convert boards one at a time.
> > > > >
> > > > > Signed-off-by: Simon Glass <s...@chromium.org 
<mailto:s...@chromium.org>>

> > > > > ---
> > > > >
> > > > >   drivers/net/macb.c | 119
> > > > +
> > > > >   1 file changed, 119 insertions(+)
> > > >
> > > > Thanks!
> > > >
> > > > Reviewed-by: Heiko Schocher <h...@denx.de <mailto:h...@denx.de>>
> > > >
> > > > tested on the smartweb, corvus, taurus and axm board
> > > >
> > > > Tested-by: Heiko Schocher <h...@denx.de <mailto:h...@denx.de>>
> > >
> > > I tried to test this patch series on SAMA5D2 Xplained board, but 
I have the

> > compile warning below. Did you experience it?
> > >
> > > ---8<-
> > > drivers/net/macb.c: In function 'macb_phy_init':
> > > drivers/net/macb.c:487:9: warning: passing argument 3 of 
'phy_connect'
> > > from incompatible pointer type [enabled by default] In file 
included from

> > include/miiphy.h:22:0,
> > >  from drivers/net/macb.c:36:
> > > include/phy.h:226:20: note: expected 'struct udevice *' but 
argument is of type

> > 'const struct device **'
> > > --->8
> >
> > No I don't see that problem. I did a full build test. What is the 
board config name

> > you are using?
>
> The board is SAMA5D2 Xplained board, the .config file is attached.
>
> I noticed that in include/phy.h file,  phy_connect() has different 
prototype for enabling CONFIG_DM_ETH or not.

>
> So, I think this issue should be exist.

Is that board in mainline?


Yes, in mainline.

The type of 'dev' parameter of phy_connect() is struct udevice *, 
instead of struct eth_device * when enabling CONFIG_DM_ETH.



>
> > >
> > > Thanks.
> > >
> > > >
> > > > bye,
> > > > Heiko
> > > > --
> > > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> > > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell,
> > > > Germany ___
> > > > U-Boot mailing list
> > > > U-Boot@lists.denx.de <mailto:U-Boot@lists.denx.de>
> > > > http://lists.denx.de/mailman/listinfo/u-boot

Regards,
Simon



Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver model

[Yang, Wenyou]

Hi Simon,

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年5月5日 10:38
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: h...@denx.de; U-Boot Mailing List <u-boot@lists.denx.de>; Joe Hershberger
> <joe.hershber...@ni.com>
> Subject: Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver model
> 
> Hi,
> 
> On 4 May 2016 at 01:32, Yang, Wenyou <wenyou.y...@atmel.com> wrote:
> >
> > Hi
> >
> > > -Original Message-
> > > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of
> > > Heiko Schocher
> > > Sent: 2016年5月3日 15:54
> > > To: Simon Glass <s...@chromium.org>
> > > Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Joe Hershberger
> > > <joe.hershber...@ni.com>
> > > Subject: Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver
> > > model
> > >
> > > Hello Simon,
> > >
> > > Am 03.05.2016 um 08:40 schrieb Simon Glass:
> > > > Add driver-model support to this driver. The old code remains for
> > > > now so that we can convert boards one at a time.
> > > >
> > > > Signed-off-by: Simon Glass <s...@chromium.org>
> > > > ---
> > > >
> > > >   drivers/net/macb.c | 119
> > > +
> > > >   1 file changed, 119 insertions(+)
> > >
> > > Thanks!
> > >
> > > Reviewed-by: Heiko Schocher <h...@denx.de>
> > >
> > > tested on the smartweb, corvus, taurus and axm board
> > >
> > > Tested-by: Heiko Schocher <h...@denx.de>
> >
> > I tried to test this patch series on SAMA5D2 Xplained board, but I have the
> compile warning below. Did you experience it?
> >
> > ---8<-
> > drivers/net/macb.c: In function 'macb_phy_init':
> > drivers/net/macb.c:487:9: warning: passing argument 3 of 'phy_connect'
> > from incompatible pointer type [enabled by default] In file included from
> include/miiphy.h:22:0,
> >  from drivers/net/macb.c:36:
> > include/phy.h:226:20: note: expected 'struct udevice *' but argument is of 
> > type
> 'const struct device **'
> > --->8
> 
> No I don't see that problem. I did a full build test. What is the board 
> config name
> you are using?

The board is SAMA5D2 Xplained board, the .config file is attached.

I noticed that in include/phy.h file,  phy_connect() has different prototype 
for enabling CONFIG_DM_ETH or not.

So, I think this issue should be exist.

> >
> > Thanks.
> >
> > >
> > > bye,
> > > Heiko
> > > --
> > > DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell,
> > > Germany ___
> > > U-Boot mailing list
> > > U-Boot@lists.denx.de
> > > http://lists.denx.de/mailman/listinfo/u-boot
> >
> >
> > Best Regards,
> > Wenyou Yang
> 
> Regards,
> Simon


Best Regards,
Wenyou Yang


config.gz
Description: config.gz
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Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver model

[Yang, Wenyou]

Hi

> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Heiko
> Schocher
> Sent: 2016年5月3日 15:54
> To: Simon Glass 
> Cc: U-Boot Mailing List ; Joe Hershberger
> 
> Subject: Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver model
> 
> Hello Simon,
> 
> Am 03.05.2016 um 08:40 schrieb Simon Glass:
> > Add driver-model support to this driver. The old code remains for now
> > so that we can convert boards one at a time.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> >   drivers/net/macb.c | 119
> +
> >   1 file changed, 119 insertions(+)
> 
> Thanks!
> 
> Reviewed-by: Heiko Schocher 
> 
> tested on the smartweb, corvus, taurus and axm board
> 
> Tested-by: Heiko Schocher 

I tried to test this patch series on SAMA5D2 Xplained board, but I have the 
compile warning below. Did you experience it?

---8<-
drivers/net/macb.c: In function 'macb_phy_init':
drivers/net/macb.c:487:9: warning: passing argument 3 of 'phy_connect' from 
incompatible pointer type [enabled by default]
In file included from include/miiphy.h:22:0,
 from drivers/net/macb.c:36:
include/phy.h:226:20: note: expected 'struct udevice *' but argument is of type 
'const struct device **'
--->8

Thanks.

> 
> bye,
> Heiko
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> ___
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 07/18] net: macb: Convert to driver model

[Yang, Wenyou]

Hi,

On 2016/5/3 15:53, Heiko Schocher wrote:

Hello Simon,

Am 03.05.2016 um 08:40 schrieb Simon Glass:

Add driver-model support to this driver. The old code remains for now so
that we can convert boards one at a time.

Signed-off-by: Simon Glass 
---

  drivers/net/macb.c | 119 
+

  1 file changed, 119 insertions(+)


Thanks!

Reviewed-by: Heiko Schocher 

tested on the smartweb, corvus, taurus and axm board

Tested-by: Heiko Schocher 


I tried to test this patch series on SAMA5D2 Xplained board, but I have 
the following compile warning , did you experience it.


8<---
drivers/net/macb.c: In function 'macb_phy_init':
drivers/net/macb.c:487:9: warning: passing argument 3 of 'phy_connect' 
from incompatible pointer type [enabled by default]

In file included from include/miiphy.h:22:0,
 from drivers/net/macb.c:36:
include/phy.h:226:20: note: expected 'struct udevice *' but argument is 
of type 'const struct device **'

--->8



bye,
Heiko


Best Regards,
Wenyou Yang

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Re: [U-Boot] [PATCH] gpio: atmel_pio4: rework to support driver model & DT

[Yang, Wenyou]

Hi Andreas,


> -Original Message-
> From: Andreas Bießmann [mailto:andr...@biessmann.org]
> Sent: 2016年5月3日 19:20
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH] gpio: atmel_pio4: rework to support driver 
> model &
> DT
> 
> Dear Wenyou,
> 
> On 2016-04-15 02:49, Wenyou Yang wrote:
> > Rework the driver to support the driver model and the device tree.
> 
> Could you please put this one into a series with the pinctrl driver?

Accepted, thank you.

> 
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >  drivers/gpio/Kconfig  |   2 +-
> >  drivers/gpio/atmel_pio4.c | 106
> > +-
> >  2 files changed, 86 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index
> > 2311309..62e730d 100644
> > --- a/drivers/gpio/Kconfig
> > +++ b/drivers/gpio/Kconfig
> > @@ -30,7 +30,7 @@ config DWAPB_GPIO
> >
> >  config ATMEL_PIO4
> > bool "ATMEL PIO4 driver"
> > -   depends on DM
> > +   depends on DM_GPIO
> > default n
> > help
> >   Say yes here to support the Atmel PIO4 driver.
> > diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
> > index d71f525..543b037 100644
> > --- a/drivers/gpio/atmel_pio4.c
> > +++ b/drivers/gpio/atmel_pio4.c
> > @@ -9,9 +9,12 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> >  #define ATMEL_PIO4_PINS_PER_BANK   32
> >
> >  /*
> > @@ -200,14 +203,38 @@ int atmel_pio4_get_pio_input(u32 port, u32 pin)
> > }
> >
> >  #ifdef CONFIG_DM_GPIO
> > +
> > +struct atmel_pioctrl_data {
> > +   u32 nbanks;
> > +};
> > +
> > +struct atmel_pio4_platdata {
> > +   struct atmel_pio4_port *reg_base;
> > +};
> > +
> > +static struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice
> > *dev,
> > +   u32 bank)
> > +{
> > +   struct atmel_pio4_platdata *plat = dev_get_platdata(dev);
> > +   struct atmel_pio4_port *port_base =
> > +   (struct atmel_pio4_port *)((u32)plat->reg_base +
> > +   ATMEL_PIO_BANK_OFFSET * bank);
> > +
> > +   return port_base;
> > +}
> > +
> >  static int atmel_pio4_direction_input(struct udevice *dev, unsigned
> > offset)
> >  {
> > -   struct at91_port_platdata *plat = dev_get_platdata(dev);
> > -   struct atmel_pio4_port *port_base = (atmel_pio4_port
> > *)plat->base_addr;
> > -   u32 mask = 0x01 << offset;
> > -   u32 reg = ATMEL_PIO4_CFGR_FUNC_GPIO;
> > +   u32 bank = ATMEL_PIO_BANK(offset);
> > +   u32 line = ATMEL_PIO_LINE(offset);
> > +   struct atmel_pio4_port *port_base = atmel_pio4_bank_base(dev, bank);
> > +   u32 mask = BIT(line);
> > +   u32 reg;
> >
> > writel(mask, _base->mskr);
> > +   reg = readl(_base->cfgr);
> > +   reg &= ~ATMEL_PIO_CFGR_FUNC_MASK;
> > +   reg &= ~ATMEL_PIO_DIR_MASK;
> > writel(reg, _base->cfgr);
> >
> > return 0;
> > @@ -216,12 +243,16 @@ static int atmel_pio4_direction_input(struct
> > udevice *dev, unsigned offset)  static int
> > atmel_pio4_direction_output(struct udevice *dev,
> >unsigned offset, int value)  {
> > -   struct at91_port_platdata *plat = dev_get_platdata(dev);
> > -   struct atmel_pio4_port *port_base = (atmel_pio4_port
> > *)plat->base_addr;
> > -   u32 mask = 0x01 << offset;
> > -   u32 reg = ATMEL_PIO4_CFGR_FUNC_GPIO | ATMEL_PIO4_CFGR_DIR;
> > +   u32 bank = ATMEL_PIO_BANK(offset);
> > +   u32 line = ATMEL_PIO_LINE(offset);
> > +   struct atmel_pio4_port *port_base = atmel_pio4_bank_base(dev, bank);
> > +   u32 mask = BIT(line);
> > +   u32 reg;
> >
> > writel(mask, _base->mskr);
> > +   reg = readl(_base->cfgr);
> > +   reg &= ~ATMEL_PIO_CFGR_FUNC_MASK;
> > +   reg |= ATMEL_PIO_DIR_MASK;
> > writel(reg, _base->cfgr);
> >
> > if (value)
> > @@ -234,9 +265,10 @@ static int atmel_pio4_direction_output(struct
> > udevice *dev,
> >
> >  static int atmel_pio4_get_value(struct udevice *dev, unsigned offset)
> > {
> > -   struct at91_port_platdata *plat = dev_get_platdata(dev);
>

Re: [U-Boot] [PATCH 1/2] pinctrl: at91-pio4: add pinctrl driver

[Yang, Wenyou]

Hi Andreas,

Thank you for your review.


> -Original Message-
> From: Andreas Bießmann [mailto:andr...@biessmann.org]
> Sent: 2016年5月3日 19:18
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH 1/2] pinctrl: at91-pio4: add pinctrl driver
> 
> Dear Wenyou,
> 
> On 2016-04-07 04:15, Wenyou Yang wrote:
> > AT91 PIO4 controller is a combined gpio-controller, pin-mux and
> > pin-config module. The peripherals are assigned pins through per-pin
> > based muxing logic. And the pin configuration are performed on
> > specific registers which are shared along with the gpio controller.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >  arch/arm/mach-at91/include/mach/atmel_pio4.h |  35 ++
> >  drivers/pinctrl/Kconfig  |   7 ++
> >  drivers/pinctrl/Makefile |   1 +
> >  drivers/pinctrl/pinctrl-at91-pio4.c  | 164
> > +++
> >  4 files changed, 207 insertions(+)
> >  create mode 100644 drivers/pinctrl/pinctrl-at91-pio4.c
> >
> > diff --git a/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > b/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > index 8bb4b12..6760bec 100644
> > --- a/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > +++ b/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > @@ -29,6 +29,41 @@ struct atmel_pio4_port {
> >
> >  #endif
> >
> > +/*
> > + * PIO Configuration Register Fields
> > + */
> > +#define ATMEL_PIO_CFGR_FUNC_MASK   GENMASK(2, 0)
> > +#define ATMEL_PIO_CFGR_FUNC_GPIO   (0x0 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_A   (0x1 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_B   (0x2 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_C   (0x3 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_D   (0x4 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_E   (0x5 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_F   (0x6 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_G   (0x7 << 0)
> > +#define ATMEL_PIO_DIR_MASK BIT(8)
> > +#define ATMEL_PIO_PUEN_MASKBIT(9)
> > +#define ATMEL_PIO_PDEN_MASKBIT(10)
> > +#define ATMEL_PIO_IFEN_MASKBIT(12)
> > +#define ATMEL_PIO_IFSCEN_MASK  BIT(13)
> > +#define ATMEL_PIO_OPD_MASK BIT(14)
> > +#define ATMEL_PIO_SCHMITT_MASK BIT(15)
> > +#define ATMEL_PIO_CFGR_EVTSEL_MASK GENMASK(26, 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_FALLING  (0 << 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_RISING   (1 << 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_BOTH (2 << 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_LOW  (3 << 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_HIGH (4 << 24)
> 
> just realized that most of these definitions are already in the existing GPIO 
> driver.
> Could you please put another patch before moving these definitions from the
> driver code to the header. It is ok for me to rephrase them when doing so.

Add a new patch to handle it.

Thank you.


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 1/2] pinctrl: at91-pio4: add pinctrl driver

[Yang, Wenyou]

Hi Andreas,

All accepted except the output path for gpio.

I don't think we need to configure the output path for gpio from pinconf.
We can use GPIO driver to handle the gpio output.
Are you agree?

> -Original Message-
> From: Andreas Bießmann [mailto:andr...@biessmann.org]
> Sent: 2016年5月3日 18:48
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH 1/2] pinctrl: at91-pio4: add pinctrl driver
> 
> Dear Wenyou,
> 
> On 2016-04-07 04:15, Wenyou Yang wrote:
> > AT91 PIO4 controller is a combined gpio-controller, pin-mux and
> > pin-config module. The peripherals are assigned pins through per-pin
> > based muxing logic. And the pin configuration are performed on
> > specific registers which are shared along with the gpio controller.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >  arch/arm/mach-at91/include/mach/atmel_pio4.h |  35 ++
> >  drivers/pinctrl/Kconfig  |   7 ++
> >  drivers/pinctrl/Makefile |   1 +
> >  drivers/pinctrl/pinctrl-at91-pio4.c  | 164
> > +++
> >  4 files changed, 207 insertions(+)
> >  create mode 100644 drivers/pinctrl/pinctrl-at91-pio4.c
> >
> > diff --git a/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > b/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > index 8bb4b12..6760bec 100644
> > --- a/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > +++ b/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > @@ -29,6 +29,41 @@ struct atmel_pio4_port {
> >
> >  #endif
> >
> > +/*
> > + * PIO Configuration Register Fields
> > + */
> > +#define ATMEL_PIO_CFGR_FUNC_MASK   GENMASK(2, 0)
> > +#define ATMEL_PIO_CFGR_FUNC_GPIO   (0x0 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_A   (0x1 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_B   (0x2 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_C   (0x3 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_D   (0x4 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_E   (0x5 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_F   (0x6 << 0)
> > +#define ATMEL_PIO_CFGR_FUNC_PERIPH_G   (0x7 << 0)
> > +#define ATMEL_PIO_DIR_MASK BIT(8)
> > +#define ATMEL_PIO_PUEN_MASKBIT(9)
> > +#define ATMEL_PIO_PDEN_MASKBIT(10)
> > +#define ATMEL_PIO_IFEN_MASKBIT(12)
> > +#define ATMEL_PIO_IFSCEN_MASK  BIT(13)
> > +#define ATMEL_PIO_OPD_MASK BIT(14)
> > +#define ATMEL_PIO_SCHMITT_MASK BIT(15)
> > +#define ATMEL_PIO_CFGR_EVTSEL_MASK GENMASK(26, 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_FALLING  (0 << 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_RISING   (1 << 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_BOTH (2 << 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_LOW  (3 << 24)
> > +#define ATMEL_PIO_CFGR_EVTSEL_HIGH (4 << 24)
> > +
> > +#define ATMEL_PIO_NPINS_PER_BANK   32
> > +#define ATMEL_PIO_BANK(pin_id) (pin_id /
> ATMEL_PIO_NPINS_PER_BANK)
> > +#define ATMEL_PIO_LINE(pin_id) (pin_id %
> ATMEL_PIO_NPINS_PER_BANK)
> > +#define ATMEL_PIO_BANK_OFFSET  0x40
> > +
> > +#define ATMEL_GET_PIN_NO(pinfunc)  ((pinfunc) & 0xff)
> > +#define ATMEL_GET_PIN_FUNC(pinfunc)((pinfunc >> 16) & 0xf)
> > +#define ATMEL_GET_PIN_IOSET(pinfunc)   ((pinfunc >> 20) & 0xf)
> > +
> >  #define AT91_PIO_PORTA 0x0
> >  #define AT91_PIO_PORTB 0x1
> >  #define AT91_PIO_PORTC 0x2
> > diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index
> > 2a69bab..e71f298 100644
> > --- a/drivers/pinctrl/Kconfig
> > +++ b/drivers/pinctrl/Kconfig
> > @@ -105,6 +105,13 @@ config SPL_PINCONF
> >
> >  if PINCTRL || SPL_PINCTRL
> >
> > +config PINCTRL_AT91PIO4
> > +   bool "AT91 PIO4 pinctrl driver"
> > +   depends on DM
> > +   help
> > + This option is to enable the AT91 pinctrl driver for AT91 PIO4
> > + controller which is available on SAMA5D2 SoC.
> > +
> >  config ROCKCHIP_PINCTRL
> > bool "Rockchip pin control driver"
> > depends on DM
> > diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index
> > 37dc904..bd0dea2 100644
> > --- a/drivers/pinctrl/Makefile
> > +++ b/drivers/pinctrl/Makefile
> > @@ -5,6 +5,7 @@
> >  obj-y

Re: [U-Boot] [PATCH 2/2] atmel: bring in at91 pio4 device tree file and bindings

[Yang, Wenyou]

Hi Andreas,

> -Original Message-
> From: Andreas Bießmann [mailto:andr...@biessmann.org]
> Sent: 2016年5月3日 18:15
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH 2/2] atmel: bring in at91 pio4 device tree file 
> and
> bindings
> 
> Dear Wenyou,
> 
> On 2016-04-07 04:16, Wenyou Yang wrote:
> > Bring in required device tree files from Linux.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> 
> There is a small typo below ...

Sorry, I didn't find the typo. Please point to me, thanks.

> 
> > ---
> >
> >  arch/arm/dts/sama5d2-pinfunc.h | 880
> > +
> >  .../pinctrl/atmel,at91-pio4-pinctrl.txt|  65 ++
> >  2 files changed, 945 insertions(+)
> >  create mode 100644 arch/arm/dts/sama5d2-pinfunc.h  create mode 100644
> > doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
> 
> 
> 
> > diff --git
> > a/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
> > b/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
> > new file mode 100644
> > index 000..b048eac
> > --- /dev/null
> > +++ b/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
> > @@ -0,0 +1,65 @@
> > +* Atmel PIO4 Controller
> > +
> > +The Atmel PIO4 controller is used to select the function of a pin and
> > to
> > +configure it.
> > +
> > +Required properties:
> > +- compatible: "atmel,sama5d2-pinctrl".
> > +- reg: base address and length of the PIO controller.
> > +- interrupts: interrupt outputs from the controller, one for each
> > bank.
> > +- interrupt-controller: mark the device node as an interrupt
> > controller.
> > +- #interrupt-cells: should be two.
> > +- gpio-controller: mark the device node as a gpio controller.
> > +- #gpio-cells: should be two.
> > +
> > +Please refer to ../gpio/gpio.txt and
> > ../interrupt-controller/interrupts.txt for
> > +a general description of GPIO and interrupt bindings.
> > +
> > +Please refer to pinctrl-bindings.txt in this directory for details of
> > the
> > +common pinctrl bindings used by client devices.
> > +
> > +Subnode format
> > +Each node (or subnode) will list the pins it needs and how to
> > configured these
> 
> ... how to configure ...

Add more detailed example to show how to configure more clearly.

> 
> Would you upstream this via linux kernel?

Yes. I think so.

> 
> Reviewed-by: Andreas Bießmann <andr...@biessmann.org>
> 
> I'll pick this these days in a next branch for 2016.07, hopefully with a
> lot more dt bindings.
> 
> Best Regards
> 
> Andreas


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH] dm: at91: Add driver model support for the spi driver

[Yang, Wenyou]

Hi Simon,

Thank you for your support.

> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2016年5月2日 2:56
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH] dm: at91: Add driver model support for the spi
> driver
> 
> Hi Wenyou,
> 
> On 24 April 2016 at 21:48, Wenyou Yang <wenyou.y...@atmel.com> wrote:
> > Add driver model support while retaining the existing legacy code.
> > This allows the driver to support boards that have converted to driver
> > model as well as those that have not.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> 
> It is possible to combine this into the existing driver and reuse much of the 
> code?

Yes, it is.

As you know, it will take a long time to complete the DT & DM conversion. There 
is a question,
I don't know how to make all the boards works, inclusive ones which doesn't 
convert to DT.

> 
> BTW I have WIP patches to convert macb Ethernet and video. See u-boot-
> dm/gurnard-working. I plan to post these next week.

Thank you for your information. It is very important for me.

> 
> Regards,
> Simon


Best Regards,
Wenyou Yang
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Re: [U-Boot] SAMA5D2 xplained SD/eMMC boot

[Yang, Wenyou]

> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 2016年4月25日 18:30
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> 
> On 04/25/2016 02:55 AM, Yang, Wenyou wrote:
> > Hi Marek,
> >
> >> -Original Message-
> >> From: Marek Vasut [mailto:ma...@denx.de]
> >> Sent: 2016年4月22日 20:18
> >> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> Cc: u-boot@lists.denx.de
> >> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> >>
> >> On 04/22/2016 02:54 AM, Yang, Wenyou wrote:
> >>> Hi Marek,
> >>
> >> Hi!
> >>
> >>>> -Original Message-
> >>>> From: Marek Vasut [mailto:ma...@denx.de]
> >>>> Sent: 2016年4月21日 10:59
> >>>> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >>>> Cc: u-boot@lists.denx.de
> >>>> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> >>>>
> >>>> On 04/21/2016 04:46 AM, Yang, Wenyou wrote:
> >>>>> Hi,
> >>>>
> >>>> Hi!
> >>>>
> >>>> [...]
> >>>> pile of unnecessary email headers redacted.
> >>>> [...]
> >>>>
> >>>>>>>>>>>> Hi!
> >>>>>>>>>>>>
> >>>>>>>>>>>> I've been playing around with latest mainline u-boot on
> >>>>>>>>>>>> sama5d2 xplained ultra. I noticed that if I want to boot
> >>>>>>>>>>>> the board from SD card (SDHCI1), the board will indeed load
> >>>>>>>>>>>> the SPL from it, but SPL will try to load u-boot.img from
> >>>>>>>>>>>> eMMC
> >>>>>>>>>>>> (SDHCI0) and fail, as my eMMC is blank.
> >>>>>>>>>>>
> >>>>>>>>>>> Yes, there is some issue to load u-boot.img. I found there
> >>>>>>>>>>> is something to do on
> >>>>>>>>>> sdhci.c.
> >>>>>>>>>>>
> >>>>>>>>>>> You can try this branch, it should works.
> >>>>>>>>>>>
> >>>>>>>>>>> https://github.com/linux4sam/u-boot-at91/commits/u-boot-2016
> >>>>>>>>>>> .0
> >>>>>>>>>>> 3-
> >>>>>>>>>>> at
> >>>>>>>>>>> 91
> >>>>>>>>>>
> >>>>>>>>>> I am not interested in using non-mainline stuff. Do you have
> >>>>>>>>>> any particular patch/commit which I can refer to ? I do not
> >>>>>>>>>> think this has anything to do with sdhci.c driver at all, it
> >>>>>>>>>> has to do with detecting the boot device from which SPL was
> >>>>>>>>>> started and loading u-boot.img from the same boot device
> >>>>>>>>>> instead of always using
> >>>> SDHCI0.
> >>>>>>>>>
> >>>>>>>>> I will test the mainline code. I will let you know when I get 
> >>>>>>>>> something.
> >>>>>>>>
> >>>>>>>> OK.
> >>>>>>>>
> >>>>>>>> Does the SoC have any sort of register which lists the current
> >>>>>>>> boot
> >> device ?
> >>>>>>>
> >>>>>>> In this SoC, there is not register to list the current boot device.
> >>>>>>
> >>>>>> And thus, it is not possible to detect at runtime from which
> >>>>>> device the SoC booted and thus load u-boot.img from the same device.
> Correct ?
> >>>>>
> >>>>> Yes,
> >>>>
> >>>> Ha, thanks for confirming.
> >>>
> >>> Sorry, can I correct what I said yesterday?
> >>
> >> What if I said "no" ? :-)
> >>
> >>> There is a register to list the boot information exported by ROMCode.
> >>>
> >>> The boot information is stored in R4 register when the ROMCode jumps
> >>> to the
> >> bootstrap.
> >>
> >> Ha, so the U-Boot SPL can save the r4 register early in the boot and
> >> extract the boot device from it. That's neat. Thanks!
> >>
> >>> Here is the contents definitions R4 on the SAMA5D2 (improved
> >>> compared to old
> >> MPUs to take care of IOSet features).
> >>
> >> Is this stuff somewhere in the SAMA5Dx datasheet ? It'd be nice to
> >> know/have this information for other SAMA5Dx too (d3 and d4).
> >
> > It seems it is not included in the in the SAMA5Dx datasheet.
> 
> So where did you get these numbers from ?

Yes, it is not included in the datasheet now. We are not recommend to use them.

If it is helpful for you,  please reference the previous mail.

> 
> > This feature is available since AT91SAM9G45, inclusive d3 and d4.
> 
> Oh cool, so the numbers are the same for all these chips ?

Yes, basically same, only d2 includes additional ioset information.


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 0/2] ARM: AT91: add AT91 PIO4 pinctrl driver

[Yang, Wenyou]

Hi Andreas,

This patch set is here for a while, could you  make time to review it and give 
me some advice? 

So that I can move forward on this topic.

> -Original Message-
> From: Andreas Bießmann [mailto:andr...@biessmann.de]
> Sent: 2016年4月7日 12:21
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH 0/2] ARM: AT91: add AT91 PIO4 pinctrl driver
> 
> Hi Wenyou,
> 
> Really cool to see the first dm based driver for atmel devices! I'll dive 
> into this
> weekend.
> 
> Best regards
> 
> Andreas
> 
> > Am 07.04.2016 um 04:15 schrieb Wenyou Yang <wenyou.y...@atmel.com>:
> >
> > AT91 PIO4 controller is a combined gpio-controller, pin-mux and
> > pin-config module. This patch is to add the pinctrl driver with driver
> > model and device tree support.
> >
> >
> > Wenyou Yang (2):
> >  pinctrl: at91-pio4: add pinctrl driver
> >  atmel: bring in at91 pio4 device tree file and bindings
> >
> > arch/arm/dts/sama5d2-pinfunc.h | 880 
> > +
> > arch/arm/mach-at91/include/mach/atmel_pio4.h   |  35 +
> > .../pinctrl/atmel,at91-pio4-pinctrl.txt|  65 ++
> > drivers/pinctrl/Kconfig|   7 +
> > drivers/pinctrl/Makefile   |   1 +
> > drivers/pinctrl/pinctrl-at91-pio4.c| 164 
> > 6 files changed, 1152 insertions(+)
> > create mode 100644 arch/arm/dts/sama5d2-pinfunc.h create mode 100644
> > doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
> > create mode 100644 drivers/pinctrl/pinctrl-at91-pio4.c
> >
> > --
> > 2.7.4
> >
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot


Best Regards,
Wenyou Yang

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Re: [U-Boot] SAMA5D2 xplained SD/eMMC boot

[Yang, Wenyou]

Hi Marek,

> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 2016年4月22日 20:18
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> 
> On 04/22/2016 02:54 AM, Yang, Wenyou wrote:
> > Hi Marek,
> 
> Hi!
> 
> >> -Original Message-
> >> From: Marek Vasut [mailto:ma...@denx.de]
> >> Sent: 2016年4月21日 10:59
> >> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> Cc: u-boot@lists.denx.de
> >> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> >>
> >> On 04/21/2016 04:46 AM, Yang, Wenyou wrote:
> >>> Hi,
> >>
> >> Hi!
> >>
> >> [...]
> >> pile of unnecessary email headers redacted.
> >> [...]
> >>
> >>>>>>>>>> Hi!
> >>>>>>>>>>
> >>>>>>>>>> I've been playing around with latest mainline u-boot on
> >>>>>>>>>> sama5d2 xplained ultra. I noticed that if I want to boot the
> >>>>>>>>>> board from SD card (SDHCI1), the board will indeed load the
> >>>>>>>>>> SPL from it, but SPL will try to load u-boot.img from eMMC
> >>>>>>>>>> (SDHCI0) and fail, as my eMMC is blank.
> >>>>>>>>>
> >>>>>>>>> Yes, there is some issue to load u-boot.img. I found there is
> >>>>>>>>> something to do on
> >>>>>>>> sdhci.c.
> >>>>>>>>>
> >>>>>>>>> You can try this branch, it should works.
> >>>>>>>>>
> >>>>>>>>> https://github.com/linux4sam/u-boot-at91/commits/u-boot-2016.0
> >>>>>>>>> 3-
> >>>>>>>>> at
> >>>>>>>>> 91
> >>>>>>>>
> >>>>>>>> I am not interested in using non-mainline stuff. Do you have
> >>>>>>>> any particular patch/commit which I can refer to ? I do not
> >>>>>>>> think this has anything to do with sdhci.c driver at all, it
> >>>>>>>> has to do with detecting the boot device from which SPL was
> >>>>>>>> started and loading u-boot.img from the same boot device
> >>>>>>>> instead of always using
> >> SDHCI0.
> >>>>>>>
> >>>>>>> I will test the mainline code. I will let you know when I get 
> >>>>>>> something.
> >>>>>>
> >>>>>> OK.
> >>>>>>
> >>>>>> Does the SoC have any sort of register which lists the current boot
> device ?
> >>>>>
> >>>>> In this SoC, there is not register to list the current boot device.
> >>>>
> >>>> And thus, it is not possible to detect at runtime from which device
> >>>> the SoC booted and thus load u-boot.img from the same device. Correct ?
> >>>
> >>> Yes,
> >>
> >> Ha, thanks for confirming.
> >
> > Sorry, can I correct what I said yesterday?
> 
> What if I said "no" ? :-)
> 
> > There is a register to list the boot information exported by ROMCode.
> >
> > The boot information is stored in R4 register when the ROMCode jumps to the
> bootstrap.
> 
> Ha, so the U-Boot SPL can save the r4 register early in the boot and extract 
> the
> boot device from it. That's neat. Thanks!
> 
> > Here is the contents definitions R4 on the SAMA5D2 (improved compared to old
> MPUs to take care of IOSet features).
> 
> Is this stuff somewhere in the SAMA5Dx datasheet ? It'd be nice to know/have 
> this
> information for other SAMA5Dx too (d3 and d4).

It seems it is not included in the in the SAMA5Dx datasheet.

This feature is available since AT91SAM9G45, inclusive d3 and d4.

> 
> > /* bootFrom ID Definitions */
> > #define BOOT_FROM_KEY   (0xBAu << 24)
> >
> > #define BOOT_FROM_SPI   (0x0u << 0)
> > #define BOOT_FROM_MCI   (0x1u << 0)
> > #define BOOT_FROM_SMC   (0x2u << 0)
> > #define BOOT_FROM_TWI   (0x3u << 0)
> > #define BOOT_FROM_QSPI  (0x4u << 0)
> >
> > /* ID number of the IP from the data sheet */
> > #define BOO

Re: [U-Boot] SAMA5D2 xplained SD/eMMC boot

[Yang, Wenyou]

Hi Marek,

> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 2016年4月21日 10:59
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> 
> On 04/21/2016 04:46 AM, Yang, Wenyou wrote:
> > Hi,
> 
> Hi!
> 
> [...]
> pile of unnecessary email headers redacted.
> [...]
> 
> >>>>>>>> Hi!
> >>>>>>>>
> >>>>>>>> I've been playing around with latest mainline u-boot on sama5d2
> >>>>>>>> xplained ultra. I noticed that if I want to boot the board from
> >>>>>>>> SD card (SDHCI1), the board will indeed load the SPL from it,
> >>>>>>>> but SPL will try to load u-boot.img from eMMC
> >>>>>>>> (SDHCI0) and fail, as my eMMC is blank.
> >>>>>>>
> >>>>>>> Yes, there is some issue to load u-boot.img. I found there is
> >>>>>>> something to do on
> >>>>>> sdhci.c.
> >>>>>>>
> >>>>>>> You can try this branch, it should works.
> >>>>>>>
> >>>>>>> https://github.com/linux4sam/u-boot-at91/commits/u-boot-2016.03-
> >>>>>>> at
> >>>>>>> 91
> >>>>>>
> >>>>>> I am not interested in using non-mainline stuff. Do you have any
> >>>>>> particular patch/commit which I can refer to ? I do not think
> >>>>>> this has anything to do with sdhci.c driver at all, it has to do
> >>>>>> with detecting the boot device from which SPL was started and
> >>>>>> loading u-boot.img from the same boot device instead of always using
> SDHCI0.
> >>>>>
> >>>>> I will test the mainline code. I will let you know when I get something.
> >>>>
> >>>> OK.
> >>>>
> >>>> Does the SoC have any sort of register which lists the current boot 
> >>>> device ?
> >>>
> >>> In this SoC, there is not register to list the current boot device.
> >>
> >> And thus, it is not possible to detect at runtime from which device
> >> the SoC booted and thus load u-boot.img from the same device. Correct ?
> >
> > Yes,
> 
> Ha, thanks for confirming.

Sorry, can I correct what I said yesterday? There is a register to list the 
boot information exported by ROMCode.

The boot information is stored in R4 register when the ROMCode jumps to the 
bootstrap. 

Here is the contents definitions R4 on the SAMA5D2 (improved compared to old 
MPUs to take care of IOSet features).

/* bootFrom ID Definitions */
#define BOOT_FROM_KEY   (0xBAu << 24)

#define BOOT_FROM_SPI   (0x0u << 0)
#define BOOT_FROM_MCI   (0x1u << 0)
#define BOOT_FROM_SMC   (0x2u << 0)
#define BOOT_FROM_TWI   (0x3u << 0)
#define BOOT_FROM_QSPI  (0x4u << 0)

/* ID number of the IP from the data sheet */
#define BOOT_FROM_ID0   (0x0u << 4)
#define BOOT_FROM_ID1   (0x1u << 4)
#define BOOT_FROM_ID2   (0x2u << 4)
#define BOOT_FROM_ID3   (0x3u << 4)
#define BOOT_FROM_ID4   (0x4u << 4)

#define BOOT_FROM_ID_Pos4
#define BOOT_FROM_ID_Msk(0xfu << BOOT_FROM_ID_Pos)
#define BOOT_FROM_ID(value) ((BOOT_FROM_ID_Msk & ((value) << 
BOOT_FROM_ID_Pos)))

#define BOOT_FROM_TYPE_SD_OR_AT25   (0x0u << 8)
#define BOOT_FROM_TYPE_MMC_OR_AT45  (0x1u << 8)
#define BOOT_FROM_TYPE_EMMC (0x2u << 8)

/* QSPI serial flashes */
#define BOOT_FROM_TYPE_SPANSION (0x0u << 8)
#define BOOT_FROM_TYPE_MICRON   (0x1u << 8)
#define BOOT_FROM_TYPE_MACRONIX (0x2u << 8)

/* Chip Select or (MCI) Slot identifier used in code by the IP. */
#define BOOT_FROM_CS0   (0x0u << 12) // Slot A
#define BOOT_FROM_CS1   (0x1u << 12) // Slot B
#define BOOT_FROM_CS2   (0x2u << 12) // Slot C
#define BOOT_FROM_CS3   (0x3u << 12) // Slot D
#define BOOT_FROM_CS4   (0x4u << 12)

#define BOOT_FROM_CS_Pos12
#define BOOT_FROM_CS_Msk(0xfu << BOOT_FROM_CS_Pos)
#define BOOT_FROM_CS(value) ((BOOT_FROM_CS_Msk & ((value) << 
BOOT_FROM_CS_Pos)))

#define BOOT_FROM_IOSET_Pos 16
#define BOOT_FROM_IOSET_Msk (0x3u << BOOT_FROM_IOSET_Pos)
#define BOOT_FROM_IOSET(value)   ((BOOT_FROM_IOSET_Msk & ((value) << 
BOOT_FROM_IOSET_Pos)))>>


> [...]
> 
> --
> Best regards,
> Marek Vasut

Sorry for incorrect information before.


Best Regards,
Wenyou Yang
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Re: [U-Boot] SAMA5D2 xplained SD/eMMC boot

[Yang, Wenyou]

Hi,

> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 2016年4月21日 10:41
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> 
> On 04/21/2016 04:30 AM, Yang, Wenyou wrote:
> > Hi Marek,
> 
> Hi!
> 
> >> -Original Message-
> >> From: Marek Vasut [mailto:ma...@denx.de]
> >> Sent: 2016年4月20日 17:37
> >> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> Cc: u-boot@lists.denx.de
> >> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> 
> Can you fix your mailer so it doesn't insert this crap into each and every 
> message ?
> Pretty please ?
> 
> >> On 04/20/2016 03:17 AM, Yang, Wenyou wrote:
> >>> Hi Marek,
> >>>
> >>>> -Original Message-
> >>>> From: Marek Vasut [mailto:ma...@denx.de]
> >>>> Sent: 2016年4月20日 0:34
> >>>> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >>>> Cc: u-boot@lists.denx.de
> >>>> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> >>>>
> >>>> On 04/19/2016 05:22 AM, Yang, Wenyou wrote:
> >>>>> Hi Marek,
> >>>>>
> >>>>>> -Original Message-
> >>>>>> From: Marek Vasut [mailto:marek.va...@gmail.com]
> >>>>>> Sent: 2016年4月18日 23:30
> >>>>>> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >>>>>> Cc: u-boot@lists.denx.de
> >>>>>> Subject: SAMA5D2 xplained SD/eMMC boot
> >>>>>>
> >>>>>> Hi!
> >>>>>>
> >>>>>> I've been playing around with latest mainline u-boot on sama5d2
> >>>>>> xplained ultra. I noticed that if I want to boot the board from
> >>>>>> SD card (SDHCI1), the board will indeed load the SPL from it, but
> >>>>>> SPL will try to load u-boot.img from eMMC
> >>>>>> (SDHCI0) and fail, as my eMMC is blank.
> >>>>>
> >>>>> Yes, there is some issue to load u-boot.img. I found there is
> >>>>> something to do on
> >>>> sdhci.c.
> >>>>>
> >>>>> You can try this branch, it should works.
> >>>>>
> >>>>> https://github.com/linux4sam/u-boot-at91/commits/u-boot-2016.03-at
> >>>>> 91
> >>>>
> >>>> I am not interested in using non-mainline stuff. Do you have any
> >>>> particular patch/commit which I can refer to ? I do not think this
> >>>> has anything to do with sdhci.c driver at all, it has to do with
> >>>> detecting the boot device from which SPL was started and loading
> >>>> u-boot.img from the same boot device instead of always using SDHCI0.
> >>>
> >>> I will test the mainline code. I will let you know when I get something.
> >>
> >> OK.
> >>
> >> Does the SoC have any sort of register which lists the current boot device 
> >> ?
> >
> > In this SoC, there is not register to list the current boot device.
> 
> And thus, it is not possible to detect at runtime from which device the SoC 
> booted
> and thus load u-boot.img from the same device. Correct ?

Yes, 

> 
> You should add such register, it's a few lines of HDL ...

Good suggestion.

Recorded.

Thank you.

> 
> [...]
> Best regards,
> Marek Vasut


Best Regards
Wenyou Yang
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Re: [U-Boot] SAMA5D2 xplained SD/eMMC boot

[Yang, Wenyou]

Hi Marek,

> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 2016年4月20日 17:37
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> 
> On 04/20/2016 03:17 AM, Yang, Wenyou wrote:
> > Hi Marek,
> >
> >> -Original Message-
> >> From: Marek Vasut [mailto:ma...@denx.de]
> >> Sent: 2016年4月20日 0:34
> >> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> Cc: u-boot@lists.denx.de
> >> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> >>
> >> On 04/19/2016 05:22 AM, Yang, Wenyou wrote:
> >>> Hi Marek,
> >>>
> >>>> -Original Message-
> >>>> From: Marek Vasut [mailto:marek.va...@gmail.com]
> >>>> Sent: 2016年4月18日 23:30
> >>>> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >>>> Cc: u-boot@lists.denx.de
> >>>> Subject: SAMA5D2 xplained SD/eMMC boot
> >>>>
> >>>> Hi!
> >>>>
> >>>> I've been playing around with latest mainline u-boot on sama5d2
> >>>> xplained ultra. I noticed that if I want to boot the board from SD
> >>>> card (SDHCI1), the board will indeed load the SPL from it, but SPL
> >>>> will try to load u-boot.img from eMMC
> >>>> (SDHCI0) and fail, as my eMMC is blank.
> >>>
> >>> Yes, there is some issue to load u-boot.img. I found there is
> >>> something to do on
> >> sdhci.c.
> >>>
> >>> You can try this branch, it should works.
> >>>
> >>> https://github.com/linux4sam/u-boot-at91/commits/u-boot-2016.03-at91
> >>
> >> I am not interested in using non-mainline stuff. Do you have any
> >> particular patch/commit which I can refer to ? I do not think this
> >> has anything to do with sdhci.c driver at all, it has to do with
> >> detecting the boot device from which SPL was started and loading
> >> u-boot.img from the same boot device instead of always using SDHCI0.
> >
> > I will test the mainline code. I will let you know when I get something.
> 
> OK.
> 
> Does the SoC have any sort of register which lists the current boot device ?

In this SoC, there is not register to list the current boot device.

> 
> > Thank you.
> >
> >>
> >>>> This is a result of hard-coding boot device to
> >>>> BOOT_DEVICE_MMC1 in arch/arm/mach-at91/spl.c spl_boot_device() I
> think.
> >>>>
> >>>> Is there any way to discern from which SDHCI the board booted to
> >>>> continue loading u-boot.img from the correct one ? This would let
> >>>> us implement
> >>>> board_boot_order() and boot from correct SDHCI.
> >>>>
> >>>> --
> >>>> Best regards,
> >>>> Marek Vasut
> >>>
> >>>
> >>> Best Regards,
> >>> Wenyou Yang
> >>>
> >>
> >>
> >> --
> >> Best regards,
> >> Marek Vasut
> >
> >
> > Best Regards,
> > Wenyou Yang
> >
> 
> 
> --
> Best regards,
> Marek Vasut


Best Regards,
Wenyou Yang
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Re: [U-Boot] SAMA5D2 xplained SD/eMMC boot

[Yang, Wenyou]

Hi Marek,

> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 2016年4月20日 0:34
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: SAMA5D2 xplained SD/eMMC boot
> 
> On 04/19/2016 05:22 AM, Yang, Wenyou wrote:
> > Hi Marek,
> >
> >> -Original Message-
> >> From: Marek Vasut [mailto:marek.va...@gmail.com]
> >> Sent: 2016年4月18日 23:30
> >> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> Cc: u-boot@lists.denx.de
> >> Subject: SAMA5D2 xplained SD/eMMC boot
> >>
> >> Hi!
> >>
> >> I've been playing around with latest mainline u-boot on sama5d2
> >> xplained ultra. I noticed that if I want to boot the board from SD
> >> card (SDHCI1), the board will indeed load the SPL from it, but SPL
> >> will try to load u-boot.img from eMMC
> >> (SDHCI0) and fail, as my eMMC is blank.
> >
> > Yes, there is some issue to load u-boot.img. I found there is something to 
> > do on
> sdhci.c.
> >
> > You can try this branch, it should works.
> >
> > https://github.com/linux4sam/u-boot-at91/commits/u-boot-2016.03-at91
> 
> I am not interested in using non-mainline stuff. Do you have any particular
> patch/commit which I can refer to ? I do not think this has anything to do 
> with
> sdhci.c driver at all, it has to do with detecting the boot device from which 
> SPL
> was started and loading u-boot.img from the same boot device instead of always
> using SDHCI0.

I will test the mainline code. I will let you know when I get something.

Thank you.

> 
> >> This is a result of hard-coding boot
> >> device to
> >> BOOT_DEVICE_MMC1 in arch/arm/mach-at91/spl.c spl_boot_device() I think.
> >>
> >> Is there any way to discern from which SDHCI the board booted to
> >> continue loading u-boot.img from the correct one ? This would let us
> >> implement
> >> board_boot_order() and boot from correct SDHCI.
> >>
> >> --
> >> Best regards,
> >> Marek Vasut
> >
> >
> > Best Regards,
> > Wenyou Yang
> >
> 
> 
> --
> Best regards,
> Marek Vasut


Best Regards,
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Re: [U-Boot] SAMA5D2 xplained SD/eMMC boot

[Yang, Wenyou]

Hi Marek,

> -Original Message-
> From: Marek Vasut [mailto:marek.va...@gmail.com]
> Sent: 2016年4月18日 23:30
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: u-boot@lists.denx.de
> Subject: SAMA5D2 xplained SD/eMMC boot
> 
> Hi!
> 
> I've been playing around with latest mainline u-boot on sama5d2 xplained 
> ultra. I
> noticed that if I want to boot the board from SD card (SDHCI1), the board will
> indeed load the SPL from it, but SPL will try to load u-boot.img from eMMC
> (SDHCI0) and fail, as my eMMC is blank. 

Yes, there is some issue to load u-boot.img. I found there is something to do 
on sdhci.c.

You can try this branch, it should works.

https://github.com/linux4sam/u-boot-at91/commits/u-boot-2016.03-at91

> This is a result of hard-coding boot
> device to
> BOOT_DEVICE_MMC1 in arch/arm/mach-at91/spl.c spl_boot_device() I think.
> 
> Is there any way to discern from which SDHCI the board booted to continue
> loading u-boot.img from the correct one ? This would let us implement
> board_boot_order() and boot from correct SDHCI.
> 
> --
> Best regards,
> Marek Vasut


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 0/2] ARM: AT91: add AT91 PIO4 pinctrl driver

[Yang, Wenyou]

Hi Andreas,

> -Original Message-
> From: Andreas Bießmann [mailto:andr...@biessmann.de]
> Sent: 2016年4月7日 12:21
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH 0/2] ARM: AT91: add AT91 PIO4 pinctrl driver
> 
> Hi Wenyou,
> 
> Really cool to see the first dm based driver for atmel devices! I'll dive 
> into this
> weekend.

Thank you for your encouragement.

We have a plan that more dm based drivers for atmel devices will be sent in 
next few months, :)

> 
> Best regards
> 
> Andreas
> 
> > Am 07.04.2016 um 04:15 schrieb Wenyou Yang <wenyou.y...@atmel.com>:
> >
> > AT91 PIO4 controller is a combined gpio-controller, pin-mux and
> > pin-config module. This patch is to add the pinctrl driver with driver
> > model and device tree support.
> >
> >
> > Wenyou Yang (2):
> >  pinctrl: at91-pio4: add pinctrl driver
> >  atmel: bring in at91 pio4 device tree file and bindings
> >
> > arch/arm/dts/sama5d2-pinfunc.h | 880 
> > +
> > arch/arm/mach-at91/include/mach/atmel_pio4.h   |  35 +
> > .../pinctrl/atmel,at91-pio4-pinctrl.txt|  65 ++
> > drivers/pinctrl/Kconfig|   7 +
> > drivers/pinctrl/Makefile   |   1 +
> > drivers/pinctrl/pinctrl-at91-pio4.c| 164 
> > 6 files changed, 1152 insertions(+)
> > create mode 100644 arch/arm/dts/sama5d2-pinfunc.h create mode 100644
> > doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
> > create mode 100644 drivers/pinctrl/pinctrl-at91-pio4.c
> >
> > --
> > 2.7.4
> >
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot

Best Regards,
Wenyou Yang

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Re: [U-Boot] [PATCH v2] ARM: at91: sama5d2: configure the L2 cache memory

[Yang, Wenyou]

> -Original Message-
> From: Samuel Mescoff [mailto:samuel.mesc...@mobile-devices.fr]
> Sent: 2016年2月16日 16:45
> To: u-boot@lists.denx.de
> Cc: Samuel Mescoff <samuel.mesc...@mobile-devices.fr>;
> andreas.de...@googlemail.com; Yang, Wenyou <wenyou.y...@atmel.com>;
> Ferre, Nicolas <nicolas.fe...@atmel.com>
> Subject: [U-Boot] [PATCH v2] ARM: at91: sama5d2: configure the L2 cache
> memory
> 
> The SAMA5D2 has a second internal SRAM that can be reassigned as a L2 cache
> memory.
> Make sure it is configured as a L2 cache memory when booting from a SPL image.
> 
> Based on the commit b5ea95ef2b5b from the at91bootstrap repository.
> 
> Signed-off-by: Samuel Mescoff <samuel.mesc...@mobile-devices.fr>

It is OK for me.

Reviewed-by: Wenyou Yang <wenyou.y...@atmel.com>


> ---
> 
> Changes for v2:
>  - removed useless #ifdef CONFIG_SAMA5D2
> 
>  arch/arm/mach-at91/atmel_sfr.c| 7 +++
>  arch/arm/mach-at91/include/mach/at91_common.h | 1 +
>  arch/arm/mach-at91/include/mach/sama5_sfr.h   | 1 +
>  arch/arm/mach-at91/spl_atmel.c| 4 
>  4 files changed, 13 insertions(+)
> 
> diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c
> index 2bccb84..adf44c6 100644
> --- a/arch/arm/mach-at91/atmel_sfr.c
> +++ b/arch/arm/mach-at91/atmel_sfr.c
> @@ -19,3 +19,10 @@ void redirect_int_from_saic_to_aic(void)
>   writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), >aicredir);
>   }
>  }
> +
> +void configure_2nd_sram_as_l2_cache(void)
> +{
> + struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
> +
> + writel(1, >l2cc_hramc);
> +}
> diff --git a/arch/arm/mach-at91/include/mach/at91_common.h b/arch/arm/mach-
> at91/include/mach/at91_common.h
> index efcd74e..0742ffc 100644
> --- a/arch/arm/mach-at91/include/mach/at91_common.h
> +++ b/arch/arm/mach-at91/include/mach/at91_common.h
> @@ -34,5 +34,6 @@ void at91_spl_board_init(void);  void 
> at91_disable_wdt(void);
> void matrix_init(void);  void redirect_int_from_saic_to_aic(void);
> +void configure_2nd_sram_as_l2_cache(void);
> 
>  #endif /* AT91_COMMON_H */
> diff --git a/arch/arm/mach-at91/include/mach/sama5_sfr.h b/arch/arm/mach-
> at91/include/mach/sama5_sfr.h
> index 7b19a20..b040256 100644
> --- a/arch/arm/mach-at91/include/mach/sama5_sfr.h
> +++ b/arch/arm/mach-at91/include/mach/sama5_sfr.h
> @@ -25,6 +25,7 @@ struct atmel_sfr {
>   u32 sn0;/* 0x4c */
>   u32 sn1;/* 0x50 */
>   u32 aicredir;   /* 0x54 */
> + u32 l2cc_hramc; /* 0x58 */
>  };
> 
>  /* Bit field in DDRCFG */
> diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c
> index b2fb51d..688289e 100644
> --- a/arch/arm/mach-at91/spl_atmel.c
> +++ b/arch/arm/mach-at91/spl_atmel.c
> @@ -79,6 +79,10 @@ void board_init_f(ulong dummy)  {
>   switch_to_main_crystal_osc();
> 
> +#ifdef CONFIG_SAMA5D2
> + configure_2nd_sram_as_l2_cache();
> +#endif
> +
>   /* disable watchdog */
>   at91_disable_wdt();
> 
> --
> 2.5.0


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH] ARM: at91: sama5d2: configure the L2 cache memory

[Yang, Wenyou]

> -Original Message-
> From: Samuel Mescoff [mailto:samuel.mesc...@mobile-devices.fr]
> Sent: 2016年2月16日 0:54
> To: u-boot@lists.denx.de
> Cc: Samuel Mescoff <samuel.mesc...@mobile-devices.fr>;
> andreas.de...@googlemail.com; Yang, Wenyou <wenyou.y...@atmel.com>;
> Ferre, Nicolas <nicolas.fe...@atmel.com>
> Subject: [U-Boot] [PATCH] ARM: at91: sama5d2: configure the L2 cache memory
> 
> The SAMA5D2 has a second internal SRAM that can be reassigned as a L2 cache
> memory.
> Make sure it is configured as a L2 cache memory when booting from a SPL image.
> 
> Based on the commit b5ea95ef2b5b from the at91bootstrap repository.
> 
> Signed-off-by: Samuel Mescoff <samuel.mesc...@mobile-devices.fr>
> ---
>  arch/arm/mach-at91/atmel_sfr.c| 9 +
>  arch/arm/mach-at91/include/mach/at91_common.h | 3 +++
>  arch/arm/mach-at91/include/mach/sama5_sfr.h   | 3 +++
>  arch/arm/mach-at91/spl_atmel.c| 4 
>  4 files changed, 19 insertions(+)
> 
> diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c
> index 2bccb84..71aa643 100644
> --- a/arch/arm/mach-at91/atmel_sfr.c
> +++ b/arch/arm/mach-at91/atmel_sfr.c
> @@ -19,3 +19,12 @@ void redirect_int_from_saic_to_aic(void)
>   writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), >aicredir);
>   }
>  }
> +
> +#ifdef CONFIG_SAMA5D2
> +void configure_2nd_sram_as_l2_cache(void)
> +{
> + struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
> +
> + writel(1, >l2cc_hramc);
> +}
> +#endif

This #ifdef ... #endif can be removed.

> diff --git a/arch/arm/mach-at91/include/mach/at91_common.h b/arch/arm/mach-
> at91/include/mach/at91_common.h
> index efcd74e..0967ce7 100644
> --- a/arch/arm/mach-at91/include/mach/at91_common.h
> +++ b/arch/arm/mach-at91/include/mach/at91_common.h
> @@ -34,5 +34,8 @@ void at91_spl_board_init(void);  void 
> at91_disable_wdt(void);
> void matrix_init(void);  void redirect_int_from_saic_to_aic(void);
> +#ifdef CONFIG_SAMA5D2
> +void configure_2nd_sram_as_l2_cache(void);
> +#endif
> 
>  #endif /* AT91_COMMON_H */
> diff --git a/arch/arm/mach-at91/include/mach/sama5_sfr.h b/arch/arm/mach-
> at91/include/mach/sama5_sfr.h
> index 7b19a20..ec2c216 100644
> --- a/arch/arm/mach-at91/include/mach/sama5_sfr.h
> +++ b/arch/arm/mach-at91/include/mach/sama5_sfr.h
> @@ -25,6 +25,9 @@ struct atmel_sfr {
>   u32 sn0;/* 0x4c */
>   u32 sn1;/* 0x50 */
>   u32 aicredir;   /* 0x54 */
> +#ifdef CONFIG_SAMA5D2
> + u32 l2cc_hramc; /* 0x58 */
> +#endif

Ditto.

>  };
> 
>  /* Bit field in DDRCFG */
> diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c
> index b2fb51d..688289e 100644
> --- a/arch/arm/mach-at91/spl_atmel.c
> +++ b/arch/arm/mach-at91/spl_atmel.c
> @@ -79,6 +79,10 @@ void board_init_f(ulong dummy)  {
>   switch_to_main_crystal_osc();
> 
> +#ifdef CONFIG_SAMA5D2
> + configure_2nd_sram_as_l2_cache();
> +#endif
> +
>   /* disable watchdog */
>   at91_disable_wdt();
> 
> --
> 2.5.0


Best Regards,
Wenyou Yang

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Re: [U-Boot] [RESEND PATCH v3 2/5] ARM: at91: clock: add a new file to handle clock

[Yang, Wenyou]

Hi Andreas,

> -Original Message-
> From: Andreas Bießmann [mailto:andreas.de...@googlemail.com]
> Sent: 2016年2月2日 16:23
> To: Yang, Wenyou <wenyou.y...@atmel.com>; U-Boot Mailing List  b...@lists.denx.de>
> Cc: Heiko Schocher <h...@denx.de>; andreas.de...@googlemail.com
> Subject: Re: [RESEND PATCH v3 2/5] ARM: at91: clock: add a new file to handle
> clock
> 
> Hi Wenyou,
> 
> On 02.02.2016 03:31, Wenyou Yang wrote:
> > To reduce the duplicated code, add a new file to accommodate the
> > peripheral's and system's clock handle code, shared with the SoCs with
> > different ARM core.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > Tested-by: Heiko Schocher <h...@denx.de>
> > ---
> >
> > Changes in v3:
> >  - fix incorrectly used the indicator '&' to achieve the variable
> >pointer of pmc->pcer and pmc->pcdr.
> >
> > Changes in v2: None
> >
> >  arch/arm/mach-at91/Makefile   |1 +
> >  arch/arm/mach-at91/arm926ejs/clock.c  |7 
> >  arch/arm/mach-at91/armv7/clock.c  |   26 
> >  arch/arm/mach-at91/clock.c|   72
> +
> >  arch/arm/mach-at91/include/mach/clk.h |2 +
> >  5 files changed, 75 insertions(+), 33 deletions(-)  create mode
> > 100644 arch/arm/mach-at91/clock.c
> >
> > diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> > index 5b89617..d071072 100644
> > --- a/arch/arm/mach-at91/Makefile
> > +++ b/arch/arm/mach-at91/Makefile
> > @@ -14,6 +14,7 @@ obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
> > matrix.o atmel_sfr.o  obj-y += spl.o  endif
> >
> > +obj-y += clock.o
> >  obj-$(CONFIG_CPU_ARM920T)  += arm920t/
> >  obj-$(CONFIG_CPU_ARM926EJS)+= arm926ejs/
> >  obj-$(CONFIG_CPU_V7)   += armv7/
> > diff --git a/arch/arm/mach-at91/arm926ejs/clock.c
> > b/arch/arm/mach-at91/arm926ejs/clock.c
> > index 8d6934e..c8b5e10 100644
> > --- a/arch/arm/mach-at91/arm926ejs/clock.c
> > +++ b/arch/arm/mach-at91/arm926ejs/clock.c
> > @@ -242,10 +242,3 @@ void at91_mck_init(u32 mckr)
> > while (!(readl(>sr) & AT91_PMC_MCKRDY))
> > ;
> >  }
> > -
> > -void at91_periph_clk_enable(int id)
> > -{
> > -   struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> > -
> > -   writel(1 << id, >pcer);
> > -}
> > diff --git a/arch/arm/mach-at91/armv7/clock.c
> > b/arch/arm/mach-at91/armv7/clock.c
> > index 41dbf16..81e9f69 100644
> > --- a/arch/arm/mach-at91/armv7/clock.c
> > +++ b/arch/arm/mach-at91/armv7/clock.c
> > @@ -150,32 +150,6 @@ void at91_mck_init(u32 mckr)
> > ;
> >  }
> >
> > -void at91_periph_clk_enable(int id)
> > -{
> > -   struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> > -   u32 regval;
> > -
> > -   if (id > AT91_PMC_PCR_PID_MASK)
> > -   return;
> > -
> > -   regval = AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD_WRITE | id;
> > -
> > -   writel(regval, >pcr);
> > -}
> > -
> > -void at91_periph_clk_disable(int id)
> > -{
> > -   struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> > -   u32 regval;
> > -
> > -   if (id > AT91_PMC_PCR_PID_MASK)
> > -   return;
> > -
> > -   regval = AT91_PMC_PCR_CMD_WRITE | id;
> > -
> > -   writel(regval, >pcr);
> > -}
> > -
> >  int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)
> > {
> > struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; diff --git
> > a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c new file
> > mode 100644 index 000..d1c4b76
> > --- /dev/null
> > +++ b/arch/arm/mach-at91/clock.c
> > @@ -0,0 +1,72 @@
> > +/*
> > + * Copyright (C) 2015 Atmel Corporation
> > + *   Wenyou Yang <wenyou.y...@atmel.com>
> > + *
> > + * SPDX-License-Identifier:GPL-2.0+
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +void at91_periph_clk_enable(int id)
> > +{
> > +   struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> > +
> > +#ifdef CPU_HAS_PCR
> > +   u32 regval;
> > +   u32 div_value;
> > +
> > +   if (id > AT91_PMC_PCR_PID_MASK)
> > +   return;
> > +
> > +   writel(id, >pcr);
> > +
> > +   div_value = readl(>pcr) & AT91_PMC_PCR_DIV;
> > +
> 

Re: [U-Boot] [PATCH v3 1/3] ARM: at91: clock: add PLLB enable/disable functions

[Yang, Wenyou]

Hello Heiko,

Thank you very much for your test.

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2016年2月2日 13:33
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH v3 1/3] ARM: at91: clock: add PLLB enable/disable
> functions
> 
> Hello Wenyou,
> 
> Am 02.02.2016 um 04:35 schrieb Wenyou Yang:
> > To avoid the duplicated code, add the PLLB handle functions.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > Reviewed-by: Andreas Bießmann <andreas.de...@googlemail.com>
> > ---
> >
> > Changes in v3: None
> > Changes in v2: None
> >
> >   arch/arm/mach-at91/arm926ejs/clock.c  |   38
> +
> >   arch/arm/mach-at91/include/mach/clk.h |2 ++
> >   2 files changed, 40 insertions(+)
> 
> Tested-by: Heiko Schocher <h...@denx.de>
> 
> bye,
> Heiko
> >
> > diff --git a/arch/arm/mach-at91/arm926ejs/clock.c
> > b/arch/arm/mach-at91/arm926ejs/clock.c
> > index c8b5e10..c8d24ae 100644
> > --- a/arch/arm/mach-at91/arm926ejs/clock.c
> > +++ b/arch/arm/mach-at91/arm926ejs/clock.c
> > @@ -18,6 +18,8 @@
> >   # error You need to define CONFIG_AT91FAMILY in your board config!
> >   #endif
> >
> > +#define EN_PLLB_TIMEOUT500
> > +
> >   DECLARE_GLOBAL_DATA_PTR;
> >
> >   static unsigned long at91_css_to_rate(unsigned long css) @@ -242,3
> > +244,39 @@ void at91_mck_init(u32 mckr)
> > while (!(readl(>sr) & AT91_PMC_MCKRDY))
> > ;
> >   }
> > +
> > +int at91_pllb_clk_enable(u32 pllbr)
> > +{
> > +   struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> > +   ulong start_time, tmp_time;
> > +
> > +   start_time = get_timer(0);
> > +   writel(pllbr, >pllbr);
> > +   while ((readl(>sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) {
> > +   tmp_time = get_timer(0);
> > +   if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
> > +   printf("ERROR: failed to enable PLLB\n");
> > +   return -1;
> > +   }
> > +   }
> > +
> > +   return 0;
> > +}
> > +
> > +int at91_pllb_clk_disable(void)
> > +{
> > +   struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> > +   ulong start_time, tmp_time;
> > +
> > +   start_time = get_timer(0);
> > +   writel(0, >pllbr);
> > +   while ((readl(>sr) & AT91_PMC_LOCKB) != 0) {
> > +   tmp_time = get_timer(0);
> > +   if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
> > +   printf("ERROR: failed to disable PLLB\n");
> > +   return -1;
> > +   }
> > +   }
> > +
> > +   return 0;
> > +}
> > diff --git a/arch/arm/mach-at91/include/mach/clk.h
> > b/arch/arm/mach-at91/include/mach/clk.h
> > index b2604ef..64dec52 100644
> > --- a/arch/arm/mach-at91/include/mach/clk.h
> > +++ b/arch/arm/mach-at91/include/mach/clk.h
> > @@ -133,5 +133,7 @@ void at91_system_clk_disable(int sys_clk);
> >   int at91_upll_clk_enable(void);
> >   int at91_upll_clk_disable(void);
> >   void at91_usb_clk_init(u32 value);
> > +int at91_pllb_clk_enable(u32 pllbr);
> > +int at91_pllb_clk_disable(void);
> >
> >   #endif /* __ASM_ARM_ARCH_CLK_H__ */
> >
> 
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v2 1/3] ARM: at91: clock: add PLLB enable/disable functions

[Yang, Wenyou]

Hello Heiko,

Thank you for your test.

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2016年1月27日 14:31
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH v2 1/3] ARM: at91: clock: add PLLB enable/disable
> functions
> 
> Hello Wenyou,
> 
> Am 27.01.2016 um 03:04 schrieb Wenyou Yang:
> > To avoid the duplicated code, add the PLLB handle functions.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > Reviewed-by: Andreas Bießmann <andreas.de...@googlemail.com>
> > ---
> >
> > Changes in v2: None
> >
> >   arch/arm/mach-at91/arm926ejs/clock.c  |   38
> +
> >   arch/arm/mach-at91/include/mach/clk.h |2 ++
> >   2 files changed, 40 insertions(+)
> 
> Tested on the smartweb board, so:
> 
> Tested-by: Heiko Schocher <h...@denx.de>
> 
> bye,
> Heiko
> 
> [1] testlog
> http://xeidos.ddns.net/buildbot/builders/smartweb_dfu/builds/48/steps/shell/logs/tb
> otlog
> 
> >
> > diff --git a/arch/arm/mach-at91/arm926ejs/clock.c
> > b/arch/arm/mach-at91/arm926ejs/clock.c
> > index c8b5e10..c8d24ae 100644
> > --- a/arch/arm/mach-at91/arm926ejs/clock.c
> > +++ b/arch/arm/mach-at91/arm926ejs/clock.c
> > @@ -18,6 +18,8 @@
> >   # error You need to define CONFIG_AT91FAMILY in your board config!
> >   #endif
> >
> > +#define EN_PLLB_TIMEOUT500
> > +
> >   DECLARE_GLOBAL_DATA_PTR;
> >
> >   static unsigned long at91_css_to_rate(unsigned long css) @@ -242,3
> > +244,39 @@ void at91_mck_init(u32 mckr)
> > while (!(readl(>sr) & AT91_PMC_MCKRDY))
> > ;
> >   }
> > +
> > +int at91_pllb_clk_enable(u32 pllbr)
> > +{
> > +   struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> > +   ulong start_time, tmp_time;
> > +
> > +   start_time = get_timer(0);
> > +   writel(pllbr, >pllbr);
> > +   while ((readl(>sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) {
> > +   tmp_time = get_timer(0);
> > +   if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
> > +   printf("ERROR: failed to enable PLLB\n");
> > +   return -1;
> > +   }
> > +   }
> > +
> > +   return 0;
> > +}
> > +
> > +int at91_pllb_clk_disable(void)
> > +{
> > +   struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> > +   ulong start_time, tmp_time;
> > +
> > +   start_time = get_timer(0);
> > +   writel(0, >pllbr);
> > +   while ((readl(>sr) & AT91_PMC_LOCKB) != 0) {
> > +   tmp_time = get_timer(0);
> > +   if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
> > +   printf("ERROR: failed to disable PLLB\n");
> > +   return -1;
> > +   }
> > +   }
> > +
> > +   return 0;
> > +}
> > diff --git a/arch/arm/mach-at91/include/mach/clk.h
> > b/arch/arm/mach-at91/include/mach/clk.h
> > index b2604ef..64dec52 100644
> > --- a/arch/arm/mach-at91/include/mach/clk.h
> > +++ b/arch/arm/mach-at91/include/mach/clk.h
> > @@ -133,5 +133,7 @@ void at91_system_clk_disable(int sys_clk);
> >   int at91_upll_clk_enable(void);
> >   int at91_upll_clk_disable(void);
> >   void at91_usb_clk_init(u32 value);
> > +int at91_pllb_clk_enable(u32 pllbr);
> > +int at91_pllb_clk_disable(void);
> >
> >   #endif /* __ASM_ARM_ARCH_CLK_H__ */
> >
> 
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 1/4] atmel_nand: use nand ecc_{strength, step}_ds instead of our own function

[Yang, Wenyou]

Hi Andreas,

Thank you for your review.

As Josh have left our company, I will follow up this patches.

> -Original Message-
> From: Andreas Bießmann [mailto:andreas.de...@googlemail.com]
> Sent: 2016年1月25日 5:23
> To: Wu, Josh <josh...@atmel.com>; Scott Wood <scottw...@freescale.com>;
> U-Boot Mailing List <u-boot@lists.denx.de>
> Cc: Yang, Wenyou <wenyou.y...@atmel.com>; Bo Shen
> <voice.s...@gmail.com>
> Subject: Re: [PATCH 1/4] atmel_nand: use nand ecc_{strength,step}_ds instead
> of our own function
> 
> On 24.11.15 09:26, Josh Wu wrote:
> > Since ecc_{strength,step}_ds is introduced in nand_chip structure for
> > minimum ecc requirements. So we can use them directly and remove our
> > own get_onfi_ecc_param function.
> >
> > Signed-off-by: Josh Wu <josh...@atmel.com>
> 
> Reviewed-by: Andreas Bießmann <andreas.de...@googlemail.com>
> 
> > ---
> >
> >  drivers/mtd/nand/atmel_nand.c | 44
> > +++
> >  1 file changed, 7 insertions(+), 37 deletions(-)


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 3/4] atmel_nand: increase more delay to support MT29F32G08CBADA

[Yang, Wenyou]

Hi Andreas,

> -Original Message-
> From: Andreas Bießmann [mailto:andreas.de...@googlemail.com]
> Sent: 2016年1月25日 5:42
> To: Wu, Josh <josh...@atmel.com>; Scott Wood <scottw...@freescale.com>;
> U-Boot Mailing List <u-boot@lists.denx.de>
> Cc: Yang, Wenyou <wenyou.y...@atmel.com>; Bo Shen
> <voice.s...@gmail.com>
> Subject: Re: [PATCH 3/4] atmel_nand: increase more delay to support
> MT29F32G08CBADA
> 
> Hi Josh,
> 
> On 24.11.15 09:26, Josh Wu wrote:
> > The tR is 100us in the datasheet section: Array Characteristics
> >
> 
> I've seen 50us for tR. Which datasheet do you have?

The datasheet is downloaded from micron official website.

https://www.micron.com/parts/nand-flash/mass-storage/mt29f32g08cbadawp?pc=%7B80EFFAAD-26CB-4D06-84BC-0E3274B960A9%7D

This device requires the number of bits ECC correctability is 40 bits,

but the maximum error correction capability of PMECC IP of SAMA5D2 is 32 bits.

That is,  SAMA5D2 can't support this device.

So, I suggest to drop this patch.

> 
> Andreas
> 
> > Signed-off-by: Josh Wu <josh...@atmel.com>
> > ---
> >
> >  drivers/mtd/nand/atmel_nand.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/nand/atmel_nand.c
> > b/drivers/mtd/nand/atmel_nand.c index 5226acf..266dfd9 100644
> > --- a/drivers/mtd/nand/atmel_nand.c
> > +++ b/drivers/mtd/nand/atmel_nand.c
> > @@ -1492,7 +1492,7 @@ int atmel_nand_chip_init(int devnum, ulong
> > base_addr)  #ifdef CONFIG_SYS_NAND_READY_PIN
> > nand->dev_ready = at91_nand_ready;
> >  #endif
> > -   nand->chip_delay = 75;
> > +   nand->chip_delay = 100;
> >  #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
> > nand->bbt_options |= NAND_BBT_USE_FLASH;  #endif
> >

Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 1/3] ARM: at91: clock: add PLLB enable/disable functions

[Yang, Wenyou]

Hi Heiko,

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月10日 17:34
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH 1/3] ARM: at91: clock: add PLLB enable/disable
> functions
> 
> Hello Wenyou,
> 
> Am 09.12.2015 um 05:29 schrieb Wenyou Yang:
> > To avoid the duplicated code, add the PLLB handle functions.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >   arch/arm/mach-at91/arm926ejs/clock.c  |   38
> +
> >   arch/arm/mach-at91/include/mach/clk.h |2 ++
> >   2 files changed, 40 insertions(+)
> 
> Tested on the smartweb board, see log:
> http://xeidos.ddns.net/buildbot/builders/smartweb_dfu/builds/29/steps/shell/logs/tb
> otlog
> 
> Tested-by: Heiko Schocher <h...@denx.de>

Thank you very much for your effort for ALL series.

> 
> bye,
> Heiko
> >
> > diff --git a/arch/arm/mach-at91/arm926ejs/clock.c
> > b/arch/arm/mach-at91/arm926ejs/clock.c
> > index c8b5e10..c8d24ae 100644
> > --- a/arch/arm/mach-at91/arm926ejs/clock.c
> > +++ b/arch/arm/mach-at91/arm926ejs/clock.c
> > @@ -18,6 +18,8 @@
> >   # error You need to define CONFIG_AT91FAMILY in your board config!
> >   #endif
> >
> > +#define EN_PLLB_TIMEOUT500
> > +
> >   DECLARE_GLOBAL_DATA_PTR;
> >
> >   static unsigned long at91_css_to_rate(unsigned long css) @@ -242,3
> > +244,39 @@ void at91_mck_init(u32 mckr)
> > while (!(readl(>sr) & AT91_PMC_MCKRDY))
> > ;
> >   }
> > +
> > +int at91_pllb_clk_enable(u32 pllbr)
> > +{
> > +   struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> > +   ulong start_time, tmp_time;
> > +
> > +   start_time = get_timer(0);
> > +   writel(pllbr, >pllbr);
> > +   while ((readl(>sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) {
> > +   tmp_time = get_timer(0);
> > +   if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
> > +   printf("ERROR: failed to enable PLLB\n");
> > +   return -1;
> > +   }
> > +   }
> > +
> > +   return 0;
> > +}
> > +
> > +int at91_pllb_clk_disable(void)
> > +{
> > +   struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> > +   ulong start_time, tmp_time;
> > +
> > +   start_time = get_timer(0);
> > +   writel(0, >pllbr);
> > +   while ((readl(>sr) & AT91_PMC_LOCKB) != 0) {
> > +   tmp_time = get_timer(0);
> > +   if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
> > +   printf("ERROR: failed to disable PLLB\n");
> > +   return -1;
> > +   }
> > +   }
> > +
> > +   return 0;
> > +}
> > diff --git a/arch/arm/mach-at91/include/mach/clk.h
> > b/arch/arm/mach-at91/include/mach/clk.h
> > index b2604ef..64dec52 100644
> > --- a/arch/arm/mach-at91/include/mach/clk.h
> > +++ b/arch/arm/mach-at91/include/mach/clk.h
> > @@ -133,5 +133,7 @@ void at91_system_clk_disable(int sys_clk);
> >   int at91_upll_clk_enable(void);
> >   int at91_upll_clk_disable(void);
> >   void at91_usb_clk_init(u32 value);
> > +int at91_pllb_clk_enable(u32 pllbr);
> > +int at91_pllb_clk_disable(void);
> >
> >   #endif /* __ASM_ARM_ARCH_CLK_H__ */
> >
> 
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH] defconfig: taurus_defconfig: disable SPL

[Yang, Wenyou]

Hello Heiko,

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月9日 16:46
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; andreas.de...@googlemail.com;
> Meier, Roger <r.me...@siemens.com>
> Subject: Re: [PATCH] defconfig: taurus_defconfig: disable SPL
> 
> Hello Wenyou,
> 
> Am 09.12.2015 um 09:34 schrieb Yang, Wenyou:
> > Hi
> >
> >> -Original Message-
> >> From: Heiko Schocher [mailto:h...@denx.de]
> >> Sent: 2015年12月9日 16:00
> >> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> Cc: U-Boot Mailing List <u-boot@lists.denx.de>;
> >> andreas.de...@googlemail.com; Meier, Roger <r.me...@siemens.com>
> >> Subject: Re: [PATCH] defconfig: taurus_defconfig: disable SPL
> >>
> >> Hello Wenyou,
> >>
> >> Am 09.12.2015 um 08:43 schrieb Yang, Wenyou:
> >>> Hello Heiko,
> >>>
> >>>> -Original Message-
> >>>> From: Heiko Schocher [mailto:h...@denx.de]
> >>>> Sent: 2015年12月9日 15:39
> >>>> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >>>> Cc: U-Boot Mailing List <u-boot@lists.denx.de>;
> >>>> andreas.de...@googlemail.com; Meier, Roger <r.me...@siemens.com>
> >>>> Subject: Re: [PATCH] defconfig: taurus_defconfig: disable SPL
> >>>>
> >>>> Hello Wenyou,
> >>>>
> >>>> Am 09.12.2015 um 08:15 schrieb Wenyou Yang:
> >>>>> Build SPL with taurus_defconfig defconfig file.
> >>>>> It build fails with following log message:
> >>>>>
> >>>>> ---8< 
> >>>>> $ make mrproper
> >>>>> $ make taurus_defconfig
> >>>>> $ make SPL
> >>>>> [...]
> >>>>> LD  spl/lib/built-in.o
> >>>>> LDS spl/u-boot-spl.lds
> >>>>> LD  spl/u-boot-spl
> >>>>> arm-none-linux-gnueabi-ld: SPL image too big
> >>>>> make[1]: *** [spl/u-boot-spl] Error 1
> >>>>> make: *** [spl/u-boot-spl] Error 2
> >>>>> --->8
> >>>>>
> >>>>> This board code is not ready for SPL for now, so disable CONFIG_SPL.
> >>>>>
> >>>>> Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> >>>>> ---
> >>>>>
> >>>>> configs/taurus_defconfig |1 -
> >>>>> 1 file changed, 1 deletion(-)
> >>>>
> >>>> NACK.
> >>>>
> >>>> With which toolchain?
> >>>
> >>> The toolchain is Sourcery CodeBench Lite 2013.05-24. Here is  the
> >>> toolchain information,
> >>>
> >>> ---8<-
> >>> $ arm-none-linux-gnueabi-gcc -v
> >>> Using built-in specs.
> >>> COLLECT_GCC=arm-none-linux-gnueabi-gcc
> >>> COLLECT_LTO_WRAPPER=/home/wyang/opt/arm-
> >> 2013.05/bin/../libexec/gcc/arm
> >>> -none-linux-gnueabi/4.7.3/lto-wrapper
> >>> Target: arm-none-linux-gnueabi
> >>> Configured with:
> >>> /scratch/jbrown/2013.05-arm-linux-release/src/gcc-4.7-2013.05/config
> >>> ur e --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu
> >>> --target=arm-none-linux-gnueabi --enable-threads
> >>> --disable-libmudflap --disable-libssp --disable-libstdcxx-pch
> >>> --enable-extra-sgxxlite-multilibs --with-arch=armv5te --with-gnu-as
> >>> --with-gnu-ld --with-specs='%{save-temps: -fverbose-asm}
> >>> %{funwind-tables|fno-unwind-tables|mabi=*|ffreestanding|nostdlib:;:-
> >>> fu nwind-tables} -D__CS_SOURCERYGXX_MAJ__=2013 -
> >> D__CS_SOURCERYGXX_MIN__=5
> >>> -D__CS_SOURCERYGXX_REV__=24 %{O2:%{!fno-remove-local-statics:
> >>> -fremove-local-statics}}
> >>> %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics:
> >>> -fremove-local-statics}}}' --enable-languages=c,c++ --enable-shared
> >>> --enable-lto --enable-symvers=gnu --enable-__cxa_atexit
> >>> --with-pkgversion='Sourcery CodeBench Lite 2013.05-24'
> >>> --with-bugurl=https://sourcery.mentor.com/GNUToolchain/
> >>> --disable-nls --prefix=/opt/codesourcery
> >>> --with-sysroot=/opt/codesourcery/arm-none-linux-gnueabi/libc --w
> >>   i
> >> th-build-sysroot=/scratch/jbrown/2013.05-arm-linux-release/install/ar
> >> m-n

Re: [U-Boot] [PATCH] defconfig: taurus_defconfig: disable SPL

[Yang, Wenyou]

Hi 

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月9日 16:00
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; andreas.de...@googlemail.com;
> Meier, Roger <r.me...@siemens.com>
> Subject: Re: [PATCH] defconfig: taurus_defconfig: disable SPL
> 
> Hello Wenyou,
> 
> Am 09.12.2015 um 08:43 schrieb Yang, Wenyou:
> > Hello Heiko,
> >
> >> -Original Message-
> >> From: Heiko Schocher [mailto:h...@denx.de]
> >> Sent: 2015年12月9日 15:39
> >> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> Cc: U-Boot Mailing List <u-boot@lists.denx.de>;
> >> andreas.de...@googlemail.com; Meier, Roger <r.me...@siemens.com>
> >> Subject: Re: [PATCH] defconfig: taurus_defconfig: disable SPL
> >>
> >> Hello Wenyou,
> >>
> >> Am 09.12.2015 um 08:15 schrieb Wenyou Yang:
> >>> Build SPL with taurus_defconfig defconfig file.
> >>> It build fails with following log message:
> >>>
> >>> ---8< 
> >>> $ make mrproper
> >>> $ make taurus_defconfig
> >>> $ make SPL
> >>> [...]
> >>> LD  spl/lib/built-in.o
> >>> LDS spl/u-boot-spl.lds
> >>> LD  spl/u-boot-spl
> >>> arm-none-linux-gnueabi-ld: SPL image too big
> >>> make[1]: *** [spl/u-boot-spl] Error 1
> >>> make: *** [spl/u-boot-spl] Error 2
> >>> --->8
> >>>
> >>> This board code is not ready for SPL for now, so disable CONFIG_SPL.
> >>>
> >>> Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> >>> ---
> >>>
> >>>configs/taurus_defconfig |1 -
> >>>1 file changed, 1 deletion(-)
> >>
> >> NACK.
> >>
> >> With which toolchain?
> >
> > The toolchain is Sourcery CodeBench Lite 2013.05-24. Here is  the
> > toolchain information,
> >
> > ---8<-
> > $ arm-none-linux-gnueabi-gcc -v
> > Using built-in specs.
> > COLLECT_GCC=arm-none-linux-gnueabi-gcc
> > COLLECT_LTO_WRAPPER=/home/wyang/opt/arm-
> 2013.05/bin/../libexec/gcc/arm
> > -none-linux-gnueabi/4.7.3/lto-wrapper
> > Target: arm-none-linux-gnueabi
> > Configured with:
> > /scratch/jbrown/2013.05-arm-linux-release/src/gcc-4.7-2013.05/configur
> > e --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu
> > --target=arm-none-linux-gnueabi --enable-threads --disable-libmudflap
> > --disable-libssp --disable-libstdcxx-pch
> > --enable-extra-sgxxlite-multilibs --with-arch=armv5te --with-gnu-as
> > --with-gnu-ld --with-specs='%{save-temps: -fverbose-asm}
> > %{funwind-tables|fno-unwind-tables|mabi=*|ffreestanding|nostdlib:;:-fu
> > nwind-tables} -D__CS_SOURCERYGXX_MAJ__=2013 -
> D__CS_SOURCERYGXX_MIN__=5
> > -D__CS_SOURCERYGXX_REV__=24 %{O2:%{!fno-remove-local-statics:
> > -fremove-local-statics}}
> > %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics:
> > -fremove-local-statics}}}' --enable-languages=c,c++ --enable-shared
> > --enable-lto --enable-symvers=gnu --enable-__cxa_atexit
> > --with-pkgversion='Sourcery CodeBench Lite 2013.05-24'
> > --with-bugurl=https://sourcery.mentor.com/GNUToolchain/ --disable-nls
> > --prefix=/opt/codesourcery
> > --with-sysroot=/opt/codesourcery/arm-none-linux-gnueabi/libc --w
>  i
> th-build-sysroot=/scratch/jbrown/2013.05-arm-linux-release/install/arm-none-linux-
> gnueabi/libc --with-gmp=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-
> 2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-arm-none-linux-
> gnueabi.extras/host-libs-i686-pc-linux-gnu/usr --with-
> mpfr=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-2013.05-24-arm-none-
> linux-gnueabi/arm-2013.05-24-arm-none-linux-gnueabi.extras/host-libs-i686-pc-
> linux-gnu/usr --with-mpc=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-
> 2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-arm-none-linux-
> gnueabi.extras/host-libs-i686-pc-linux-gnu/usr 
> --with-ppl=/scratch/jbrown/2013.05-
> arm-linux-release/obj/pkg-2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-
> arm-none-linux-gnueabi.extras/host-libs-i686-pc-linux-gnu/usr --with-host-
> libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-
> cloog=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-2013.05-24-arm-none-
> linux-gnueabi/arm-2013.05-24-arm-none-linux-gnueabi.extr
>  a
> s/host-libs-i686-pc-linux-gnu/usr 
> --with-libelf=/scratch/jbrown/2013.05-arm-linux-
> release/obj/pkg-2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-ar

Re: [U-Boot] [PATCH v2 0/5] ARM: at91: improve peripheral and system clock handle functions

[Yang, Wenyou]

Hi Heiko,


> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月9日 18:01
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; andreas.de...@googlemail.com
> Subject: Re: [PATCH v2 0/5] ARM: at91: improve peripheral and system clock
> handle functions
> 
> Hello Wenyou,
> 
> Am 09.12.2015 um 08:48 schrieb Wenyou Yang:
> > To reduce the duplicated code, rework the peripheral's and system's
> > clock handle functions, use these functions to replace the clock
> > handle code.
> >
> > Changes in v2:
> >   - fix checkpatch warning.
> >
> > Wenyou Yang (5):
> >ARM: at91: asm/at91_pmc.h: fix trival register offset
> >ARM: at91: clock: add a new file to handle clock
> >ARM: cpu: at91: clean up peripheral clock code
> >board: atmel: clean up peripheral clock code
> >drivers: at91: clean up peripheral clock code
> >
> >   arch/arm/mach-at91/Makefile|1 +
> >   arch/arm/mach-at91/arm920t/at91rm9200_devices.c|   13 +---
> >   arch/arm/mach-at91/arm920t/timer.c |4 +-
> >   arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c |   36 +++---
> >   arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c |   28 ++--
> >   arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c |   37 +++---
> >   .../mach-at91/arm926ejs/at91sam9m10g45_devices.c   |   33 +++--
> >   arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c |   40 +++
> >   arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c  |   28 ++--
> >   arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c  |   38 +++
> >   arch/arm/mach-at91/arm926ejs/clock.c   |7 --
> >   arch/arm/mach-at91/arm926ejs/cpu.c |1 -
> >   arch/arm/mach-at91/arm926ejs/timer.c   |5 +-
> >   arch/arm/mach-at91/armv7/clock.c   |   26 ---
> >   arch/arm/mach-at91/armv7/cpu.c |1 -
> >   arch/arm/mach-at91/armv7/timer.c   |1 -
> >   arch/arm/mach-at91/clock.c |   72 
> > 
> >   arch/arm/mach-at91/include/mach/at91_pmc.h |8 +--
> >   arch/arm/mach-at91/include/mach/clk.h  |2 +
> >   arch/arm/mach-at91/phy.c   |1 -
> >   arch/arm/mach-at91/sdram.c |1 -
> >   board/atmel/at91rm9200ek/at91rm9200ek.c|1 -
> >   board/atmel/at91rm9200ek/led.c |5 +-
> >   board/atmel/at91sam9260ek/at91sam9260ek.c  |   15 ++--
> >   board/atmel/at91sam9261ek/at91sam9261ek.c  |8 +--
> >   board/atmel/at91sam9261ek/led.c|6 +-
> >   board/atmel/at91sam9263ek/at91sam9263ek.c  |   23 ++-
> >   board/atmel/at91sam9263ek/led.c|9 +--
> >   board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c|   20 ++
> >   board/atmel/at91sam9m10g45ek/led.c |7 +-
> >   board/atmel/at91sam9n12ek/at91sam9n12ek.c  |6 +-
> >   board/atmel/at91sam9rlek/at91sam9rlek.c|   18 ++---
> >   board/atmel/at91sam9rlek/led.c |7 +-
> >   board/atmel/at91sam9x5ek/at91sam9x5ek.c|   10 +--
> >   board/atmel/sama5d2_xplained/sama5d2_xplained.c|1 -
> >   board/atmel/sama5d3_xplained/sama5d3_xplained.c|5 +-
> >   board/atmel/sama5d3xek/sama5d3xek.c|5 +-
> >   board/atmel/sama5d4_xplained/sama5d4_xplained.c|5 +-
> >   board/atmel/sama5d4ek/sama5d4ek.c  |5 +-
> >   board/bluewater/snapper9260/snapper9260.c  |   15 ++--
> >   board/calao/usb_a9263/usb_a9263.c  |   11 ++-
> >   board/egnite/ethernut5/ethernut5.c |   20 +++---
> >   board/esd/meesc/meesc.c|   15 ++--
> >   board/mini-box/picosam9g45/led.c   |7 +-
> >   board/mini-box/picosam9g45/picosam9g45.c   |   17 ++---
> >   board/ronetix/pm9261/led.c |7 +-
> >   board/ronetix/pm9261/pm9261.c  |   22 ++
> >   board/ronetix/pm9263/led.c |7 +-
> >   board/ronetix/pm9263/pm9263.c  |   19 ++
> >   board/ronetix/pm9g45/pm9g45.c  |   20 ++
> >   board/siemens/corvus/board.c   |6 +-
> >   board/siemens/smartweb/smartweb.c  |3 +-
> >   board/siemens/t

Re: [U-Boot] [PATCH v2 0/5] ARM: at91: improve peripheral and system clock handle functions

[Yang, Wenyou]

Hi Heiko,

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月10日 14:02
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; andreas.de...@googlemail.com;
> Meier, Roger <r.me...@siemens.com>
> Subject: Re: [PATCH v2 0/5] ARM: at91: improve peripheral and system clock
> handle functions
> 
> Hello Wenyou,
> 
> Am 10.12.2015 um 03:15 schrieb Yang, Wenyou:
> > Hi Heiko,
> >
> >
> >> -Original Message-
> >> From: Heiko Schocher [mailto:h...@denx.de]
> >> Sent: 2015年12月9日 18:01
> >> To: Yang, Wenyou <wenyou.y...@atmel.com>
> >> Cc: U-Boot Mailing List <u-boot@lists.denx.de>;
> >> andreas.de...@googlemail.com
> >> Subject: Re: [PATCH v2 0/5] ARM: at91: improve peripheral and system
> >> clock handle functions
> >>
> >> Hello Wenyou,
> >>
> >> Am 09.12.2015 um 08:48 schrieb Wenyou Yang:
> >>> To reduce the duplicated code, rework the peripheral's and system's
> >>> clock handle functions, use these functions to replace the clock
> >>> handle code.
> >>>
> >>> Changes in v2:
> >>>- fix checkpatch warning.
> >>>
> >>> Wenyou Yang (5):
> >>> ARM: at91: asm/at91_pmc.h: fix trival register offset
> >>> ARM: at91: clock: add a new file to handle clock
> >>> ARM: cpu: at91: clean up peripheral clock code
> >>> board: atmel: clean up peripheral clock code
> >>> drivers: at91: clean up peripheral clock code
> >>>
> >>>arch/arm/mach-at91/Makefile|1 +
> >>>arch/arm/mach-at91/arm920t/at91rm9200_devices.c|   13 +---
> >>>arch/arm/mach-at91/arm920t/timer.c |4 +-
> >>>arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c |   36 +++---
> >>>arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c |   28 ++--
> >>>arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c |   37 +++---
> >>>.../mach-at91/arm926ejs/at91sam9m10g45_devices.c   |   33 +++--
> >>>arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c |   40 +++
> >>>arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c  |   28 ++--
> >>>arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c  |   38 +++
> >>>arch/arm/mach-at91/arm926ejs/clock.c   |7 --
> >>>arch/arm/mach-at91/arm926ejs/cpu.c |1 -
> >>>arch/arm/mach-at91/arm926ejs/timer.c   |5 +-
> >>>arch/arm/mach-at91/armv7/clock.c   |   26 ---
> >>>arch/arm/mach-at91/armv7/cpu.c |1 -
> >>>arch/arm/mach-at91/armv7/timer.c   |1 -
> >>>arch/arm/mach-at91/clock.c |   72
> 
> >>>arch/arm/mach-at91/include/mach/at91_pmc.h |8 +--
> >>>arch/arm/mach-at91/include/mach/clk.h  |2 +
> >>>arch/arm/mach-at91/phy.c   |1 -
> >>>arch/arm/mach-at91/sdram.c |1 -
> >>>board/atmel/at91rm9200ek/at91rm9200ek.c|1 -
> >>>board/atmel/at91rm9200ek/led.c |5 +-
> >>>board/atmel/at91sam9260ek/at91sam9260ek.c  |   15 ++--
> >>>board/atmel/at91sam9261ek/at91sam9261ek.c  |8 +--
> >>>board/atmel/at91sam9261ek/led.c|6 +-
> >>>board/atmel/at91sam9263ek/at91sam9263ek.c  |   23 ++-
> >>>board/atmel/at91sam9263ek/led.c|9 +--
> >>>board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c|   20 ++
> >>>board/atmel/at91sam9m10g45ek/led.c |7 +-
> >>>board/atmel/at91sam9n12ek/at91sam9n12ek.c  |6 +-
> >>>board/atmel/at91sam9rlek/at91sam9rlek.c|   18 ++---
> >>>board/atmel/at91sam9rlek/led.c |7 +-
> >>>board/atmel/at91sam9x5ek/at91sam9x5ek.c|   10 +--
> >>>board/atmel/sama5d2_xplained/sama5d2_xplained.c|1 -
> >>>board/atmel/sama5d3_xplained/sama5d3_xplained.c|5 +-
> >>>board/atmel/sama5d3xek/sama5d3xek.c|5 +-
> >>>board/atmel/sama5d4_xplained/sama5d4_xplained.c|  

Re: [U-Boot] [PATCH 0/3] ARM: at91: add PMC_PLLICPR init function

[Yang, Wenyou]

Hi Heiko,

Thank you very much for your review.

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月9日 13:32
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH 0/3] ARM: at91: add PMC_PLLICPR init function
> 
> Hello Wenyou,
> 
> Am 09.12.2015 um 05:36 schrieb Wenyou Yang:
> > To reduce the duplicated code, add PLLICPR init function, use the
> > function to clean up the PMC_PLLICPR directly writing code.
> >
> > It is based on the following patch set.
> > [PATCH 0/5] ARM: at91: improve peripheral and system clock handle
> functions
> > [PATCH 0/4] ARM: at91: add UTMI PLL handle functions
> > [PATCH 0/3] ARM: at91: add PLLB handle functions
> >
> >
> > Wenyou Yang (3):
> >ARM: at91: clock: add PMC_PLLICPR init function
> >ARM: at91: clean up the PMC_PLLICPR init code
> >board: atmel: clean up the PMC_PLLICPR init code
> >
> >   arch/arm/mach-at91/armv7/clock.c|7 +++
> >   arch/arm/mach-at91/include/mach/at91_pmc.h  |7 +++
> >   arch/arm/mach-at91/include/mach/clk.h   |1 +
> >   arch/arm/mach-at91/spl_at91.c   |5 +
> >   board/atmel/sama5d3_xplained/sama5d3_xplained.c |4 +---
> >   board/atmel/sama5d3xek/sama5d3xek.c |4 +---
> >   board/atmel/sama5d4_xplained/sama5d4_xplained.c |4 +---
> >   board/atmel/sama5d4ek/sama5d4ek.c   |4 +---
> >   8 files changed, 20 insertions(+), 16 deletions(-)
> 
> I applied all your at91 patches from:
> 
>   It is based on the following patch set.
>   [PATCH 0/5] ARM: at91: improve peripheral and system clock handle
> functions
>   [PATCH 0/4] ARM: at91: add UTMI PLL handle functions
>   [PATCH 0/3] ARM: at91: add PLLB handle functions
> 
> also this series, and compiled it for the smartweb board. This build fails:

It is my fault, the build is not covered all Atmel  boards.

I will fix it in next version, thanks.

> 
>LD  spl/u-boot-spl
> arch/arm/mach-at91/built-in.o: In function `board_init_f':
> /home/hs/zug/u-boot/arch/arm/mach-at91/spl_at91.c:86: undefined reference to
> `at91_pllicpr_init'
> /home/hs/zug/u-boot/scripts/Makefile.spl:244: recipe for target 
> 'spl/u-boot-spl'
> failed
> make[2]: *** [spl/u-boot-spl] Error 1
> /home/hs/zug/u-boot/Makefile:1330: recipe for target 'spl/u-boot-spl' failed
> make[1]: *** [spl/u-boot-spl] Error 2
> make[1]: Leaving directory '/work/hs/compile/u-boot/zug/smartweb'
> Makefile:150: recipe for target 'sub-make' failed
> make: *** [sub-make] Error 2
> make failed
> pollux:u-boot hs [20151209] $
> 
> Please do a build for all at91 boards, before posting your patches again. 
> Also try
> to have a look at the codesize ... the smartweb board have only 4k for the SPL
> image...
> 
> Thanks!
> 
> bye,
> Heiko
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Best Regards,
Wenyou Yang
___
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U-Boot@lists.denx.de
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Re: [U-Boot] [PATCH 4/5] board: atmel: clean up peripheral clock code

[Yang, Wenyou]

Hello Heiko,

Thank you for your review.

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月9日 14:56
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [U-Boot] [PATCH 4/5] board: atmel: clean up peripheral clock code
> 
> Hello Wenyou,
> 
> Am 09.12.2015 um 04:45 schrieb Wenyou Yang:
> > Due to introducing the new peripheral clock handle functions, use
> > these functions to reduce duplicated code.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >   board/atmel/at91rm9200ek/at91rm9200ek.c |1 -
> >   board/atmel/at91rm9200ek/led.c  |5 +
> >   board/atmel/at91sam9260ek/at91sam9260ek.c   |   15 +--
> >   board/atmel/at91sam9261ek/at91sam9261ek.c   |8 ++--
> >   board/atmel/at91sam9261ek/led.c |6 ++
> >   board/atmel/at91sam9263ek/at91sam9263ek.c   |   23 
> > +++
> >   board/atmel/at91sam9263ek/led.c |9 +++--
> >   board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c |   20 +-
> --
> >   board/atmel/at91sam9m10g45ek/led.c  |7 ++-
> >   board/atmel/at91sam9n12ek/at91sam9n12ek.c   |6 ++
> >   board/atmel/at91sam9rlek/at91sam9rlek.c |   18 ++
> >   board/atmel/at91sam9rlek/led.c  |7 ++-
> >   board/atmel/at91sam9x5ek/at91sam9x5ek.c |   10 +++---
> >   board/atmel/sama5d2_xplained/sama5d2_xplained.c |1 -
> >   board/atmel/sama5d3_xplained/sama5d3_xplained.c |5 ++---
> >   board/atmel/sama5d3xek/sama5d3xek.c |5 ++---
> >   board/atmel/sama5d4_xplained/sama5d4_xplained.c |5 ++---
> >   board/atmel/sama5d4ek/sama5d4ek.c   |5 ++---
> >   board/bluewater/snapper9260/snapper9260.c   |   15 +--
> >   board/calao/usb_a9263/usb_a9263.c   |   11 ---
> >   board/egnite/ethernut5/ethernut5.c  |   20 
> > 
> >   board/esd/meesc/meesc.c |   15 ++-
> >   board/mini-box/picosam9g45/led.c|7 ++-
> >   board/mini-box/picosam9g45/picosam9g45.c|   17 -
> >   board/ronetix/pm9261/led.c  |7 ++-
> >   board/ronetix/pm9261/pm9261.c   |   22 
> > ++
> >   board/ronetix/pm9263/led.c  |7 ++-
> >   board/ronetix/pm9263/pm9263.c   |   19 +--
> >   board/ronetix/pm9g45/pm9g45.c   |   20 
> > ++--
> >   board/siemens/corvus/board.c|6 ++
> >   board/siemens/smartweb/smartweb.c   |3 +--
> >   board/siemens/taurus/taurus.c   |3 +--
> >   32 files changed, 102 insertions(+), 226 deletions(-)
> 
> Sorry this patch has checkpatcherrors:
> 
> 2015-12-09 07:49:38,661:  hs@pollux [ 7:49:38] ttbott >
> 2015-12-09 07:49:39,790:  wget http://patchwork.ozlabs.org/patch/554219/mbox
> 2015-12-09 07:49:39,791:  --2015-12-09 07:49:39--
> http://patchwork.ozlabs.org/patch/554219/mbox
> 2015-12-09 07:49:39,791:  Resolving patchwork.ozlabs.org
> (patchwork.ozlabs.org)... 103.22.144.67,
> 2401:3900:2:1::2
> 2015-12-09 07:49:40,106:  Connecting to patchwork.ozlabs.org
> (patchwork.ozlabs.org)|103.22.144.67|:80... connected.
> 2015-12-09 07:49:40,420:  HTTP request sent, awaiting response... 301 MOVED
> PERMANENTLY
> 2015-12-09 07:49:40,421:  Location:
> http://patchwork.ozlabs.org/patch/554219/mbox/ [following]
> 2015-12-09 07:49:40,421:  --2015-12-09 07:49:40--
> http://patchwork.ozlabs.org/patch/554219/mbox/
> 2015-12-09 07:49:40,421:  Reusing existing connection to
> patchwork.ozlabs.org:80.
> 2015-12-09 07:49:40,786:  HTTP request sent, awaiting response... 200 OK
> 2015-12-09 07:49:40,786:  Length: unspecified [text/plain]
> 2015-12-09 07:49:40,786:  Saving to: ‘mbox’
> 2015-12-09 07:49:40,786:
> 2015-12-09 07:49:40,787:
> 2015-12-09 07:49:41,101:  mbox[<=>   ]
>0  --.-KB/s
> 2015-12-09 07:49:41,133:  mbox[ <=>  ]  
> 15.15K  45.0KB/s
> 2015-12-09 07:49:41,134:  mbox[  <=> ]  
> 41.60K   111KB/s
> in 0.4s
> 2015-12-09 07:49:41,134:
> 2015-12-09 07:49:41,134:  2015-12-09 07:49:41 (111 KB/s) - ‘mbox’ saved 
> [42603]
> 2015-12-09 07:49:41,134:
> 201

Re: [U-Boot] [PATCH] defconfig: taurus_defconfig: disable SPL

[Yang, Wenyou]

Hello Heiko,

> -Original Message-
> From: Heiko Schocher [mailto:h...@denx.de]
> Sent: 2015年12月9日 15:39
> To: Yang, Wenyou <wenyou.y...@atmel.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; andreas.de...@googlemail.com;
> Meier, Roger <r.me...@siemens.com>
> Subject: Re: [PATCH] defconfig: taurus_defconfig: disable SPL
> 
> Hello Wenyou,
> 
> Am 09.12.2015 um 08:15 schrieb Wenyou Yang:
> > Build SPL with taurus_defconfig defconfig file.
> > It build fails with following log message:
> >
> > ---8< 
> > $ make mrproper
> > $ make taurus_defconfig
> > $ make SPL
> > [...]
> > LD  spl/lib/built-in.o
> > LDS spl/u-boot-spl.lds
> > LD  spl/u-boot-spl
> > arm-none-linux-gnueabi-ld: SPL image too big
> > make[1]: *** [spl/u-boot-spl] Error 1
> > make: *** [spl/u-boot-spl] Error 2
> > --->8
> >
> > This board code is not ready for SPL for now, so disable CONFIG_SPL.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >   configs/taurus_defconfig |1 -
> >   1 file changed, 1 deletion(-)
> 
> NACK.
> 
> With which toolchain?

The toolchain is Sourcery CodeBench Lite 2013.05-24. Here is  the toolchain 
information,

---8<-
$ arm-none-linux-gnueabi-gcc -v
Using built-in specs.
COLLECT_GCC=arm-none-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/home/wyang/opt/arm-2013.05/bin/../libexec/gcc/arm-none-linux-gnueabi/4.7.3/lto-wrapper
Target: arm-none-linux-gnueabi
Configured with: 
/scratch/jbrown/2013.05-arm-linux-release/src/gcc-4.7-2013.05/configure 
--build=i686-pc-linux-gnu --host=i686-pc-linux-gnu 
--target=arm-none-linux-gnueabi --enable-threads --disable-libmudflap 
--disable-libssp --disable-libstdcxx-pch --enable-extra-sgxxlite-multilibs 
--with-arch=armv5te --with-gnu-as --with-gnu-ld --with-specs='%{save-temps: 
-fverbose-asm} 
%{funwind-tables|fno-unwind-tables|mabi=*|ffreestanding|nostdlib:;:-funwind-tables}
 -D__CS_SOURCERYGXX_MAJ__=2013 -D__CS_SOURCERYGXX_MIN__=5 
-D__CS_SOURCERYGXX_REV__=24 %{O2:%{!fno-remove-local-statics: 
-fremove-local-statics}} %{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics: 
-fremove-local-statics}}}' --enable-languages=c,c++ --enable-shared 
--enable-lto --enable-symvers=gnu --enable-__cxa_atexit 
--with-pkgversion='Sourcery CodeBench Lite 2013.05-24' 
--with-bugurl=https://sourcery.mentor.com/GNUToolchain/ --disable-nls 
--prefix=/opt/codesourcery 
--with-sysroot=/opt/codesourcery/arm-none-linux-gnueabi/libc 
--with-build-sysroot=/scratch/jbrown/2013.05-arm-linux-release/install/arm-none-linux-gnueabi/libc
 
--with-gmp=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-arm-none-linux-gnueabi.extras/host-libs-i686-pc-linux-gnu/usr
 
--with-mpfr=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-arm-none-linux-gnueabi.extras/host-libs-i686-pc-linux-gnu/usr
 
--with-mpc=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-arm-none-linux-gnueabi.extras/host-libs-i686-pc-linux-gnu/usr
 
--with-ppl=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-arm-none-linux-gnueabi.extras/host-libs-i686-pc-linux-gnu/usr
 --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' 
--with-cloog=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-arm-none-linux-gnueabi.extras/host-libs-i686-pc-linux-gnu/usr
 
--with-libelf=/scratch/jbrown/2013.05-arm-linux-release/obj/pkg-2013.05-24-arm-none-linux-gnueabi/arm-2013.05-24-arm-none-linux-gnueabi.extras/host-libs-i686-pc-linux-gnu/usr
 --disable-libgomp --disable-libitm --enable-poison-system-directories 
--with-build-time-tools=/scratch/jbrown/2013.05-arm-linux-release/install/arm-none-linux-gnueabi/bin
 
--with-build-time-tools=/scratch/jbrown/2013.05-arm-linux-release/install/arm-none-linux-gnueabi/bin
Thread model: posix
gcc version 4.7.3 (Sourcery CodeBench Lite 2013.05-24)
--->8-

> 
> Here current build of u-boot on travis-ci.org:
> with eldk-5.4:
> https://travis-ci.org/u-boot/u-boot/jobs/95590341
> https://travis-ci.org/u-boot/u-boot/jobs/95590311
> 
> bye,
> Heiko
> >
> > diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index
> > d59912c..557b066 100644
> > --- a/configs/taurus_defconfig
> > +++ b/configs/taurus_defconfig
> > @@ -1,7 +1,6 @@
> >   CONFIG_ARM=y
> >   CONFIG_ARCH_AT91=y
> >   CONFIG_TARGET_TAURUS=y
> > -CONFIG_SPL=y
> >
> CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_
> TAURUS"
> >   CONFIG_SYS_PROMPT="U-Boot> "
> >   # CONFIG_CMD_BDI is not set
> >
> 
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 2/3] arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initialization

[Yang, Wenyou]

Hi Andreas,

Thank you very much for your review.

> -Original Message-
> From: Andreas Bießmann [mailto:andreas.de...@googlemail.com]
> Sent: 2015年11月28日 5:37
> To: Yang, Wenyou; U-Boot Mailing List
> Subject: Re: [PATCH 2/3] arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM
> initialization
> 
> Hi Wenyou,
> 
> On 04.11.15 07:32, Wenyou Yang wrote:
> > The implementation conforms to DDR3-SRAM/DDR3L-SDRAM
> typo --^
> 
> > initialization section described in the SAMA5D2 datasheet.
> >
> > Add registers and definitions of mpddrc controller, which is used to
> > support DDR3 devices.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >  arch/arm/mach-at91/include/mach/atmel_mpddrc.h |   88
> +---
> >  arch/arm/mach-at91/mpddrc.c|   87
> +++
> >  2 files changed, 167 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h
> > b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h
> > index 47b4cd4..e777e67 100644
> > --- a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h
> > +++ b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h
> > @@ -2,6 +2,9 @@
> >   * Copyright (C) 2013 Atmel Corporation
> >   *   Bo Shen <voice.s...@atmel.com>
> >   *
> > + * Copyright (C) 2015 Atmel Corporation
> > + *   Wenyou Yang <wenyou.y...@atmel.com>
> > + *
> >   * SPDX-License-Identifier:GPL-2.0+
> >   */
> >
> > @@ -23,14 +26,38 @@ struct atmel_mpddrc_config {
> >   * If other register needed, will add them later
> 
> This comment should be removed
> 
> >   */
> >  struct atmel_mpddr {
> > -   u32 mr;
> > -   u32 rtr;
> > -   u32 cr;
> > -   u32 tpr0;
> > -   u32 tpr1;
> > -   u32 tpr2;
> > -   u32 reserved[2];
> > -   u32 md;
> > +   u32 mr; /* 0x00: Mode Register */
> > +   u32 rtr;/* 0x04: Refresh Timer Register */
> > +   u32 cr; /* 0x08: Configuration Register */
> > +   u32 tpr0;   /* 0x0c: Timing Parameter 0 Register */
> > +   u32 tpr1;   /* 0x10: Timing Parameter 1 Register */
> > +   u32 tpr2;   /* 0x14: Timing Parameter 2 Register */
> > +   u32 reserved;   /* 0x18: Reserved */
> > +   u32 lpr;/* 0x1c: Low-power Register */
> > +   u32 md; /* 0x20: Memory Device Register */
> > +   u32 reserved1;  /* 0x24: Reserved */
> 
> This is the MPDDRC High Speed Register for sama5d3
> 
> > +   u32 lpddr23_lpr;/* 0x28: LPDDR2-LPDDR3 Low-power Register*/
> > +   u32 cal_mr4;/* 0x2c: LPDDR2 LPDDR3 and DDR3 Calibration
> and MR4 Register */
> > +   u32 tim_cal;/* 0x30: LPDDR2 LPDDR3 and DDR3 Timing
> Calibration Register */
> > +   u32 io_calibr;  /* 0x34: IO Calibration */
> > +   u32 ocms;   /* 0x38: OCMS Register */
> > +   u32 ocms_key1;  /* 0x3c: OCMS KEY1 Register */
> > +   u32 ocms_key2;  /* 0x40: OCMS KEY2 Register */
> > +   u32 conf_arbiter;   /* 0x44: Configuration Arbiter Register */
> > +   u32 timeout;/* 0x48: Timeout Port 0/1/2/3 Register */
> > +   u32 req_port0123;   /* 0x4c: Request Port 0/1/2/3 Register */
> > +   u32 req_port4567;   /* 0x50: Request Port 4/5/6/7 Register */
> > +   u32 bdw_port0123;   /* 0x54: Bandwidth Port 0/1/2/3 Register */
> > +   u32 bdw_port4567;   /* 0x58: Bandwidth Port 4/5/6/7 Register */
> > +   u32 rd_data_path;   /* 0x5c: Read Datapath Register */
> > +   u32 mcfgr;  /* 0x60: Monitor Configuration */
> > +   u32 maddr[8];   /* 0x64 ~ 0x80: Monitor Address High/Low
> port0~7 */
> > +   u32 minfo[8];   /* 0x84 ~ 0xa0: Monitor Information port0~7 */
> 
> ... here it seems the two variants (sama5d3 and sama5d2) are way different

Yes, you are right. I read their datasheets, they have different definitions.

Luckily, these registers (mcfgr, maddr[8], minfo[8]) are not used in the 
initialization sequence.

I want to replace them with reserved[17]. Do you agree? Or other advice?

Thanks.

> 
> > +   u32 reserved2[16];
> > +   u32 wpmr;   /* 0xe4: Write Protection Mode Register */
> > +   u32 wpsr;   /* 0xe8: Write Protection Status Register */
> > +   u32 reserved3[4];
> > +   u32 version;/* 0xfc: IP version */
> >  };
> >
> >
> > @@ -38,6 +65,9 @@ int

Re: [U-Boot] [U-Boot, v2, 1/5] arm: at91/spl: matrix: move matrix init to separate file

[Yang, Wenyou]

Dear Andreas,

Thank you for your review and apply for series.

> -Original Message-
> From: Andreas Bießmann [mailto:andreas.de...@googlemail.com]
> Sent: 2015年12月1日 5:29
> To: u-boot@lists.denx.de; Yang, Wenyou
> Subject: Re: [U-Boot, v2, 1/5] arm: at91/spl: matrix: move matrix init to 
> separate
> file
> 
> Dear Wenyou Yang,
> 
> Wenyou Yang <wenyou.y...@atmel.com> writes:
> >To make the matrix initialization code sharing with other SoCs, move it
> >from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a
> >separate file, mach-at91/matrix.c
> >
> >Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> >Reviewed-by: Andreas Bießmann <andreas.de...@googlemail.com>
> >---
> >
> >Changes in v2: None
> >
> > arch/arm/mach-at91/Makefile|2 +-
> > arch/arm/mach-at91/armv7/sama5d4_devices.c |   42 ---
> > arch/arm/mach-at91/matrix.c|   51
> 
> > 3 files changed, 52 insertions(+), 43 deletions(-) create mode 100644
> > arch/arm/mach-at91/matrix.c
> 
> applied to u-boot-atmel/master, thanks!
> 
> Best regards,
> Andreas Bießmann

Best Regards
Wenyou Yang
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Re: [U-Boot] [PATCH v6] arm: atmel: Add SAMA5D2 Xplained board

[Yang, Wenyou]

Hi Andreas,

> -Original Message-
> From: Andreas Bießmann [mailto:andreas.de...@googlemail.com]
> Sent: 2015年11月24日 0:29
> To: Yang, Wenyou; U-Boot Mailing List
> Cc: Bo Shen
> Subject: Re: [U-Boot] [PATCH v6] arm: atmel: Add SAMA5D2 Xplained board
> 
> Hi Wenyou,
> 
> On 30.10.15 02:55, Wenyou Yang wrote:
> > The board supports following features:
> >  - Boot media support: SD card/e.MMC/SPI flash,
> >  - Support LCD display (optional, disabled by default),
> >  - Support ethernet,
> >  - Support USB mass storage.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> 
> I'll fix a few checkpatch warnings while applying

Thank you very much for your review and your help, 

> 
> Andreas
> 
> > ---
> > The patch is based on the following patches sent in mailing list.
> > [PATCH] gpio: atmel: Add the PIO4 driver support
> > [PATCH] arm: at91: Change the Chip ID registers' addresses
> > [PATCH v4] mmc: atmel: Add atmel sdhci support
> > [PATCH v3] arm: at91: clock: Add the generated clock support
> >
> > Changes in v6:
> >  1./ change function invocation due to its declaration change,
> > at91_enable_periph_generated_clk().
> >
> > Changes in v5:
> >  1./ remove wrong pin config for USB hw init.
> >
> > Changes in v4:
> >  1./ remove __weak attribute for has_lcdc() added in v3.
> >  2./ remove unused goto err_exit.
> >
> > Changes in v3:
> >  1./ change defines-->definitions for more clearly in asm/arch/sama5d2.h.
> >  2./ remove unused cpu_is_sama5d2x() macros.
> >  3./ fix spelling error "adress".
> >  4./ add __weak attribute for has_lcdc().
> >  5./ remove SPL configs.
> >
> > Changes in v2:
> >  1./ re-order SAMA5D2 statements alphabetically.
> >  2./ remove redundant "Unknown CPU type".
> >  3./ rework sama5d2's macros.
> >  4./ remove some #ifdef before functions.
> >  5./ move CONFIG_CMD_SF to Kconfig.
> >  6./ remove NAND macros from config file.
> >  7./ CONFIG_BOOTCOMMAND for sf uses defines in at91-sama5_common.h.
> >
> >  arch/arm/mach-at91/Kconfig   |5 +
> >  arch/arm/mach-at91/armv7/Makefile|1 +
> >  arch/arm/mach-at91/armv7/sama5d2_devices.c   |   59 +
> >  arch/arm/mach-at91/include/mach/at91_pmc.h   |9 +-
> >  arch/arm/mach-at91/include/mach/atmel_usba_udc.h |3 +-
> >  arch/arm/mach-at91/include/mach/hardware.h   |2 +
> >  arch/arm/mach-at91/include/mach/sama5d2.h|  203 
> >  board/atmel/sama5d2_xplained/Kconfig |   15 ++
> >  board/atmel/sama5d2_xplained/MAINTAINERS |7 +
> >  board/atmel/sama5d2_xplained/Makefile|8 +
> >  board/atmel/sama5d2_xplained/sama5d2_xplained.c  |  284
> ++
> >  configs/sama5d2_xplained_mmc_defconfig   |   11 +
> >  configs/sama5d2_xplained_spiflash_defconfig  |   11 +
> >  include/configs/sama5d2_xplained.h   |  122 ++
> >  14 files changed, 734 insertions(+), 6 deletions(-)  create mode
> > 100644 arch/arm/mach-at91/armv7/sama5d2_devices.c
> >  create mode 100644 arch/arm/mach-at91/include/mach/sama5d2.h
> >  create mode 100644 board/atmel/sama5d2_xplained/Kconfig
> >  create mode 100644 board/atmel/sama5d2_xplained/MAINTAINERS
> >  create mode 100644 board/atmel/sama5d2_xplained/Makefile
> >  create mode 100644 board/atmel/sama5d2_xplained/sama5d2_xplained.c
> >  create mode 100644 configs/sama5d2_xplained_mmc_defconfig
> >  create mode 100644 configs/sama5d2_xplained_spiflash_defconfig
> >  create mode 100644 include/configs/sama5d2_xplained.h


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH 3/3] arm: at91: spl/atmel_sfr: move saic redirect to separate file

[Yang, Wenyou]

Hi Josh,

Thank you for your review.

> -Original Message-
> From: Wu, Josh
> Sent: 2015年11月5日 10:59
> To: Yang, Wenyou; U-Boot Mailing List
> Subject: Re: [U-Boot] [PATCH 3/3] arm: at91: spl/atmel_sfr: move saic 
> redirect to
> separate file
> 
> Hi, Wenyou
> 
> On 11/4/2015 2:28 PM, Wenyou Yang wrote:
> > To make saic redirect code sharing with other SoCs, move the saic
> > redirect code from SAMA5D4 particular file,
> > mach-at91/armv7/sama5d4_devices.c to a separate file,
> > mach-at91/atmel_sfr.c
> 
> maybe move it as mach-at91/armv7/atmel_sfr.c?
The explanation is given at the previous mail.

> 
> Best Regards,
> Josh Wu
> >
> > Move ATMEL_SFR_AICREDIR_KEY definition to sama5d4.h, because each
> SoC
> > has its own value.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >   arch/arm/mach-at91/Makefile |2 +-
> >   arch/arm/mach-at91/armv7/sama5d4_devices.c  |   13 -
> >   arch/arm/mach-at91/atmel_sfr.c  |   21 +
> >   arch/arm/mach-at91/include/mach/sama5_sfr.h |1 -
> >   arch/arm/mach-at91/include/mach/sama5d4.h   |3 +++
> >   5 files changed, 25 insertions(+), 15 deletions(-)
> >   create mode 100644 arch/arm/mach-at91/atmel_sfr.c
> >
> > diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> > index 649aff2..ca60397 100644
> > --- a/arch/arm/mach-at91/Makefile
> > +++ b/arch/arm/mach-at91/Makefile
> > @@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o
> spl_at91.o
> >   obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
> >   obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
> >   obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
> > -obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o
> > +obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
> >   obj-y += spl.o
> >   endif
> >
> > diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c
> > b/arch/arm/mach-at91/armv7/sama5d4_devices.c
> > index 52f4862..ce33cd4 100644
> > --- a/arch/arm/mach-at91/armv7/sama5d4_devices.c
> > +++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c
> > @@ -45,16 +45,3 @@ void at91_udp_hw_init(void)
> > at91_periph_clk_enable(ATMEL_ID_UDPHS);
> >   }
> >   #endif
> > -
> > -#ifdef CONFIG_SPL_BUILD
> > -void redirect_int_from_saic_to_aic(void)
> > -{
> > -   struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
> > -   u32 key32;
> > -
> > -   if (!(readl(>aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) {
> > -   key32 = readl(>sn1) ^ ATMEL_SFR_AICREDIR_KEY;
> > -   writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), >aicredir);
> > -   }
> > -}
> > -#endif
> > diff --git a/arch/arm/mach-at91/atmel_sfr.c
> > b/arch/arm/mach-at91/atmel_sfr.c new file mode 100644 index
> > 000..2bccb84
> > --- /dev/null
> > +++ b/arch/arm/mach-at91/atmel_sfr.c
> > @@ -0,0 +1,21 @@
> > +/*
> > + * Copyright (C) 2015 Atmel Corporation
> > + *   Wenyou Yang <wenyou.y...@atmel.com>
> > + *
> > + * SPDX-License-Identifier:GPL-2.0+
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +
> > +void redirect_int_from_saic_to_aic(void)
> > +{
> > +   struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
> > +   u32 key32;
> > +
> > +   if (!(readl(>aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) {
> > +   key32 = readl(>sn1) ^ ATMEL_SFR_AICREDIR_KEY;
> > +   writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), >aicredir);
> > +   }
> > +}
> > diff --git a/arch/arm/mach-at91/include/mach/sama5_sfr.h
> > b/arch/arm/mach-at91/include/mach/sama5_sfr.h
> > index 3081d37..7b19a20 100644
> > --- a/arch/arm/mach-at91/include/mach/sama5_sfr.h
> > +++ b/arch/arm/mach-at91/include/mach/sama5_sfr.h
> > @@ -32,7 +32,6 @@ struct atmel_sfr {
> >   #define ATMEL_SFR_DDRCFG_FDQSIEN  0x0002
> >
> >   /* Bit field in AICREDIR */
> > -#define ATMEL_SFR_AICREDIR_KEY 0x5F67B102
> >   #define ATMEL_SFR_AICREDIR_NSAIC  0x0001
> >
> >   #endif
> > diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h
> > b/arch/arm/mach-at91/include/mach/sama5d4.h
> > index 449cf0e..90085da 100644
> > --- a/arch/arm/mach-at91/include/mach/sama5d4.h
> > +++ b/arch/arm/mach-at91/include/mach/sama5d4.h
> > @@ -204,6 +204,9 @@
> >   #define H32MX_SLAVE_USB   5   /* USB Device &
> Host */
> >   #define H32MX_SLAVE_SMD   6   /* Soft Modem
> (SMD) */
> >
> > +/* AICREDIR Unlock Key */
> > +#define ATMEL_SFR_AICREDIR_KEY 0x5F67B102
> > +
> >   /* sama5d4 series chip id definitions */
> >   #define ARCH_ID_SAMA5D4   0x8a5c07c0
> >   #define ARCH_EXID_SAMA5D410x0001

Best Regards,
Wenyou Yang

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Re: [U-Boot] [PATCH 1/3] arm: at91/spl: matrix: move matrix init to separate file

[Yang, Wenyou]

Hi Josh,

Thank you for your review.

> -Original Message-
> From: Wu, Josh
> Sent: 2015年11月5日 10:53
> To: Yang, Wenyou; U-Boot Mailing List
> Subject: Re: [U-Boot] [PATCH 1/3] arm: at91/spl: matrix: move matrix init to
> separate file
> 
> Hi, Wenyou
> 
> On 11/4/2015 2:28 PM, Wenyou Yang wrote:
> > To make the matrix initialization code sharing with other SoCs, move
> > it from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to
> > a separate file, mach-at91/matrix.c
> is it possible just move it to mach-at91/armv7/matrix.c, as it is only used by
> armv7 core?
As you know, the at91 spl code is placed at the directory, mach-at91/, so place 
matrix.c here is acceptable.
Yes,  we should consider a separate directory to accommodate the at91 spl code 
in the future.

> 
> Best Regards,
> Josh Wu
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >   arch/arm/mach-at91/Makefile|2 +-
> >   arch/arm/mach-at91/armv7/sama5d4_devices.c |   42 ---
> >   arch/arm/mach-at91/matrix.c|   51
> 
> >   3 files changed, 52 insertions(+), 43 deletions(-)
> >   create mode 100644 arch/arm/mach-at91/matrix.c
> >
> > diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> > index 313eb47..649aff2 100644
> > --- a/arch/arm/mach-at91/Makefile
> > +++ b/arch/arm/mach-at91/Makefile
> > @@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o
> spl_at91.o
> >   obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
> >   obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
> >   obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
> > -obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
> > +obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o
> >   obj-y += spl.o
> >   endif
> >
> > diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c
> > b/arch/arm/mach-at91/armv7/sama5d4_devices.c
> > index 76301d6..52f4862 100644
> > --- a/arch/arm/mach-at91/armv7/sama5d4_devices.c
> > +++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c
> > @@ -10,7 +10,6 @@
> >   #include 
> >   #include 
> >   #include 
> > -#include 
> >   #include 
> >   #include 
> >
> > @@ -48,47 +47,6 @@ void at91_udp_hw_init(void)
> >   #endif
> >
> >   #ifdef CONFIG_SPL_BUILD
> > -void matrix_init(void)
> > -{
> > -   struct atmel_matrix *h64mx = (struct atmel_matrix
> *)ATMEL_BASE_MATRIX0;
> > -   struct atmel_matrix *h32mx = (struct atmel_matrix
> *)ATMEL_BASE_MATRIX1;
> > -   int i;
> > -
> > -   /* Disable the write protect */
> > -   writel(ATMEL_MATRIX_WPMR_WPKEY &
> ~ATMEL_MATRIX_WPMR_WPEN, >wpmr);
> > -   writel(ATMEL_MATRIX_WPMR_WPKEY &
> ~ATMEL_MATRIX_WPMR_WPEN, >wpmr);
> > -
> > -   /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
> > -   for (i = 4; i <= 10; i++) {
> > -   writel(0x000f0f0f, >ssr[i]);
> > -   writel(0x, >sassr[i]);
> > -   writel(0x000f, >srtsr[i]);
> > -   }
> > -
> > -   /* CS3 */
> > -   writel(0x00c0c0c0, >ssr[3]);
> > -   writel(0xff00, >sassr[3]);
> > -   writel(0xff00, >srtsr[3]);
> > -
> > -   /* NFC SRAM */
> > -   writel(0x00010101, >ssr[4]);
> > -   writel(0x0001, >sassr[4]);
> > -   writel(0x0001, >srtsr[4]);
> > -
> > -   /* Configure Programmable Security peripherals on matrix 64 */
> > -   writel(readl(>spselr[0]) | 0x0008, >spselr[0]);
> > -   writel(readl(>spselr[1]) | 0x0018, >spselr[1]);
> > -   writel(readl(>spselr[2]) | 0x0008, >spselr[2]);
> > -
> > -   /* Configure Programmable Security peripherals on matrix 32 */
> > -   writel(readl(>spselr[0]) | 0xFFC0, >spselr[0]);
> > -   writel(readl(>spselr[1]) | 0x60E3, >spselr[1]);
> > -
> > -   /* Enable the write protect */
> > -   writel(ATMEL_MATRIX_WPMR_WPKEY |
> ATMEL_MATRIX_WPMR_WPEN, >wpmr);
> > -   writel(ATMEL_MATRIX_WPMR_WPKEY |
> ATMEL_MATRIX_WPMR_WPEN, >wpmr);
> > -}
> > -
> >   void redirect_int_from_saic_to_aic(void)
> >   {
> > struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; diff
> > --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c new
> > file mode 100644 index 000..cf36386
> > --- /dev/null
> > +++ b/arch/arm/mach-at91/matrix.c
> > @@ -0,0 +1,51 @@
> > +/*
> > + * Copyright (C) 2015 Atmel Corporation
> > + * 

Re: [U-Boot] [PATCH 2/3] arm: at91/spl: matrix: improve implementation of matrix

[Yang, Wenyou]

Hi Josh,

Thank you for your review.

> -Original Message-
> From: Wu, Josh
> Sent: 2015年11月5日 10:54
> To: Yang, Wenyou; U-Boot Mailing List
> Subject: Re: [U-Boot] [PATCH 2/3] arm: at91/spl: matrix: improve 
> implementation
> of matrix
> 
> Hi, Wenyou
> 
> On 11/4/2015 2:28 PM, Wenyou Yang wrote:
> > To make matrix initialization code sharing with others, use the matrix
> > slave id macros, instead of hard-coding.
> it is better if you split the following 'removing code' as another patch.
Thank you for your advice, next version I will handle it.

> 
> Best Regards,
> Josh Wu
> > Remove the write protection mode code, it is unneeded for writing
> > registers.
> >
> > Remove the security peripheral selecting code, it is unneeded for SPL
> > use-case.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >   arch/arm/mach-at91/include/mach/sama5d4.h |   25
> +
> >   arch/arm/mach-at91/matrix.c   |   35 
> > -
> >   2 files changed, 34 insertions(+), 26 deletions(-)
> >
> > diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h
> > b/arch/arm/mach-at91/include/mach/sama5d4.h
> > index 3da8aff..449cf0e 100644
> > --- a/arch/arm/mach-at91/include/mach/sama5d4.h
> > +++ b/arch/arm/mach-at91/include/mach/sama5d4.h
> > @@ -179,6 +179,31 @@
> >   #define CPU_HAS_PCR
> >   #define CPU_HAS_H32MXDIV
> >
> > +/* MATRIX0(H64MX) slave id definitions */
> > +#define H64MX_SLAVE_AXIMX_BRIDGE   0   /* Bridge from H64MX to
> AXIMX */
> > +#define H64MX_SLAVE_PERIPH_BRIDGE  1   /* H64MX Peripheral
> Bridge */
> > +#define H64MX_SLAVE_VDEC   2   /* Video Decoder */
> > +#define H64MX_SLAVE_DDRC_PORT0 3   /* DDR2 Port0-
> AESOTF */
> > +#define H64MX_SLAVE_DDRC_PORT1 4   /* DDR2 Port1 */
> > +#define H64MX_SLAVE_DDRC_PORT2 5   /* DDR2 Port2 */
> > +#define H64MX_SLAVE_DDRC_PORT3 6   /* DDR2 Port3 */
> > +#define H64MX_SLAVE_DDRC_PORT4 7   /* DDR2 Port4 */
> > +#define H64MX_SLAVE_DDRC_PORT5 8   /* DDR2 Port5 */
> > +#define H64MX_SLAVE_DDRC_PORT6 9   /* DDR2 Port6 */
> > +#define H64MX_SLAVE_DDRC_PORT7 10  /* DDR2 Port7 */
> > +#define H64MX_SLAVE_SRAM   11  /* Internal SRAM 128K */
> > +#define H64MX_SLAVE_H32MX_BRIDGE   12  /* Bridge from H64MX to
> H32MX */
> > +
> > +/* MATRIX1(H32MX) slave id definitions */
> > +#define H32MX_SLAVE_H64MX_BRIDGE   0   /* Bridge from H32MX to
> H64MX */
> > +#define H32MX_SLAVE_PERIPH_BRIDGE0 1   /* H32MX Peripheral
> Bridge 0 */
> > +#define H32MX_SLAVE_PERIPH_BRIDGE1 2   /* H32MX Peripheral
> Bridge 1 */
> > +#define H32MX_SLAVE_EBI3   /* External Bus 
> > Interface
> */
> > +#define H32MX_SLAVE_NFC_CMD3   /* NFC command
> Register */
> > +#define H32MX_SLAVE_NFC_SRAM   4   /* NFC SRAM */
> > +#define H32MX_SLAVE_USB5   /* USB Device &
> Host */
> > +#define H32MX_SLAVE_SMD6   /* Soft Modem
> (SMD) */
> > +
> >   /* sama5d4 series chip id definitions */
> >   #define ARCH_ID_SAMA5D4   0x8a5c07c0
> >   #define ARCH_EXID_SAMA5D410x0001
> > diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c
> > index cf36386..57d7270 100644
> > --- a/arch/arm/mach-at91/matrix.c
> > +++ b/arch/arm/mach-at91/matrix.c
> > @@ -15,37 +15,20 @@ void matrix_init(void)
> > struct atmel_matrix *h32mx = (struct atmel_matrix
> *)ATMEL_BASE_MATRIX1;
> > int i;
> >
> > -   /* Disable the write protect */
> > -   writel(ATMEL_MATRIX_WPMR_WPKEY &
> ~ATMEL_MATRIX_WPMR_WPEN, >wpmr);
> > -   writel(ATMEL_MATRIX_WPMR_WPKEY &
> ~ATMEL_MATRIX_WPMR_WPEN, >wpmr);
> > -
> > -   /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
> > -   for (i = 4; i <= 10; i++) {
> > +   /* DDR port 1 ~ port 7 */
> > +   for (i = H64MX_SLAVE_DDRC_PORT1; i <=
> H64MX_SLAVE_DDRC_PORT7; i++) {
> > writel(0x000f0f0f, >ssr[i]);
> > writel(0x, >sassr[i]);
> > writel(0x000f, >srtsr[i]);
> > }
> >
> > -   /* CS3 */
> > -   writel(0x00c0c0c0, >ssr[3]);
> > -   writel(0xff00, >sassr[3]);
> > -   writel(0xff00, >srtsr[3]);
> > +   /* EBI CS3 (NANDFlash 128M) and NFC Command Re

Re: [U-Boot] [PATCH] gpio: atmel: Add the PIO4 driver support

[Yang, Wenyou]

Hi Andreas,

Thank you very much for your review.

Your concerns are fixed  in the v2 patch.

> -Original Message-
> From: Andreas Bießmann [mailto:andreas.de...@googlemail.com]
> Sent: 2015年11月1日 5:54
> To: Yang, Wenyou; U-Boot Mailing List
> Subject: Re: [PATCH] gpio: atmel: Add the PIO4 driver support
> 
> Hi Wenyou,
> 
> sorry for long delay ...
> 
> On 08.09.15 08:33, Wenyou Yang wrote:
> > The PIO4 is introduced from SAMA5D2, as a new version for Atmel PIO
> > controller.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> >
> >  arch/arm/mach-at91/include/mach/atmel_pio4.h |   48 +
> >  drivers/gpio/Kconfig |   11 +
> >  drivers/gpio/Makefile|1 +
> >  drivers/gpio/atmel_pio4.c|  278 
> > ++
> >  4 files changed, 338 insertions(+)
> >  create mode 100644 arch/arm/mach-at91/include/mach/atmel_pio4.h
> >  create mode 100644 drivers/gpio/atmel_pio4.c
> >
> > diff --git a/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > b/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > new file mode 100644
> > index 000..5748da6
> > --- /dev/null
> > +++ b/arch/arm/mach-at91/include/mach/atmel_pio4.h
> > @@ -0,0 +1,48 @@
> > +/*
> > + * Copyright (C) 2015 Atmel Corporation.
> > + *   Wenyou Yang <wenyou.y...@atmel.com>
> > + *
> > + * SPDX-License-Identifier:GPL-2.0+
> > + */
> > +
> > +#ifndef __ATMEL_PIO4_H
> > +#define __ATMEL_PIO4_H
> > +
> > +#ifndef __ASSEMBLY__
> > +
> > +struct atmel_pio4_port {
> > +   u32 mskr;   /* 0x00 PIO Mask Register */
> > +   u32 cfgr;   /* 0x04 PIO Configuration Register */
> > +   u32 pdsr;   /* 0x08 PIO Pin Data Status Register */
> > +   u32 locksr; /* 0x0C PIO Lock Status Register */
> > +   u32 sodr;   /* 0x10 PIO Set Output Data Register */
> > +   u32 codr;   /* 0x14 PIO Clear Output Data Register */
> > +   u32 odsr;   /* 0x18 PIO Output Data Status Register */
> > +   u32 reserved0;
> > +   u32 ier;/* 0x20 PIO Interrupt Enable Register */
> > +   u32 idr;/* 0x24 PIO Interrupt Disable Register */
> > +   u32 imr;/* 0x28 PIO Interrupt Mask Register */
> > +   u32 isr;/* 0x2C PIO Interrupt Status Register */
> > +   u32 reserved1[3];
> > +   u32 iofr;   /* 0x3C PIO I/O Freeze Register */
> > +};
> > +
> > +#endif
> > +
> > +#define AT91_PIO_PORTA 0x0
> > +#define AT91_PIO_PORTB 0x1
> > +#define AT91_PIO_PORTC 0x2
> > +#define AT91_PIO_PORTD 0x3
> > +
> > +int atmel_pio4_set_gpio(u32 port, u32 pin, u32 use_pullup); int
> > +atmel_pio4_set_a_periph(u32 port, u32 pin, u32 use_pullup); int
> > +atmel_pio4_set_b_periph(u32 port, u32 pin, u32 use_pullup); int
> > +atmel_pio4_set_c_periph(u32 port, u32 pin, u32 use_pullup); int
> > +atmel_pio4_set_d_periph(u32 port, u32 pin, u32 use_pullup); int
> > +atmel_pio4_set_e_periph(u32 port, u32 pin, u32 use_pullup); int
> > +atmel_pio4_set_f_periph(u32 port, u32 pin, u32 use_pullup); int
> > +atmel_pio4_set_g_periph(u32 port, u32 pin, u32 use_pullup); void
> > +atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value);
> > +u32 atmel_pio4_get_pio_input(u32 port, u32 pin);
> > +
> > +#endif
> > diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index
> > ef57a89..ddc47c6 100644
> > --- a/drivers/gpio/Kconfig
> > +++ b/drivers/gpio/Kconfig
> > @@ -21,6 +21,17 @@ config DWAPB_GPIO
> > help
> >   Support for the Designware APB GPIO driver.
> >
> > +config ATMEL_PIO4
> > +   bool "ATMEL PIO4 driver"
> > +   depends on DM
> > +   default n
> > +   help
> > + Say yes here to support the Atmel PIO4 driver.
> > + The PIO4 is new version of Atmel PIO controller, which manages
> > + up to 128 fully programmable input/output lines. Each I/O line
> > + may be dedicated as a general purpose I/O or be assigned to
> > + a function of an embedded peripheral.
> > +
> >  config LPC32XX_GPIO
> > bool "LPC32XX GPIO driver"
> > depends on DM
> > diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index
> > c58aa4d..fb4fd25 100644
> > --- a/drivers/gpio/Makefile
> > +++ b/drivers/gpio/Makefile
> > @@ -12,6 +12,7 @@ endif
> > 

Re: [U-Boot] [PATCH v2] arm: at91: clock: Add the generated clock support

[Yang, Wenyou]

Hi Bo Shen,

> -Original Message-
> From: Bo Shen [mailto:voice.s...@gmail.com]
> Sent: 2015年10月29日 12:06
> To: Yang, Wenyou
> Cc: U-Boot Mailing List; andreas.de...@googlemail.com
> Subject: Re: [PATCH v2] arm: at91: clock: Add the generated clock support
> 
> Hi Wenyou,
> 
> On 10/28/2015 13:25 PM, Yang, Wenyou wrote:
> >>> @@ -173,3 +174,67 @@ void at91_periph_clk_disable(int id)
> >>> > >
> >>> > >   writel(regval, >pcr);
> >>> > >   }
> >>> > >+
> >>> > >+void at91_enable_periph_generated_clk(u32 id) {
> >>> > >+  struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> >>> > >+  u32 regval, status;
> >>> > >+  u32 timeout = 1000;
> >>> > >+
> >>> > >+  if (id > AT91_PMC_PCR_PID_MASK)
> >>> > >+  return;
> >>> > >+
> >>> > >+  writel(id, >pcr);
> >>> > >+  regval = readl(>pcr);
> >>> > >+  regval &= ~AT91_PMC_PCR_GCKCSS;
> >>> > >+  regval &= ~AT91_PMC_PCR_GCKDIV;
> >>> > >+  regval |= AT91_PMC_PCR_GCKCSS_PLLA_CLK |
> >>> > >+AT91_PMC_PCR_CMD_WRITE |
> >>> > >+AT91_PMC_PCR_GCKDIV_(1) |
> >>> > >+AT91_PMC_PCR_GCKEN;
> >> >
> >> >You hard code the GCKCSS and GCKDIV. Would it be OK for all
> >> >peripheral which need this kind of clock? Can you make it as a parameter?
> > As you know,  our use-case is not complex, it is only used for one or
> > two peripherals for now, So to make it simple, use hard-code.
> >
> > Maybe we will improve it in the future, but now it is enough.
> 
> I think if this can be dealt now, that will be better.
Thank you for your advice.

The changes is in v3, please help review. Thanks.

> 
> > Anyway, thank you for your advice.
> 
> You are welcome.
> 
> Best Regards,
> Bo Shen


Best Regards,
Wenyou Yang
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Re: [U-Boot] [PATCH v4] arm: atmel: Add SAMA5D2 Xplained board

[Yang, Wenyou]

Hi Bo Shen,

Thank you for your feedback.

> -Original Message-
> From: Bo Shen [mailto:voice.s...@gmail.com]
> Sent: 2015年10月28日 11:07
> To: Yang, Wenyou
> Cc: U-Boot Mailing List; andreas.de...@googlemail.com
> Subject: Re: [PATCH v4] arm: atmel: Add SAMA5D2 Xplained board
> 
> Hi Wenyou,
> 
> On 10/27/2015 17:59 PM, Wenyou Yang wrote:
> > The board supports following features:
> >   - Boot media support: SD card/e.MMC/SPI flash,
> >   - Support LCD display (optional, disabled by default),
> >   - Support ethernet,
> >   - Support USB mass storage.
> >
> > Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> > ---
> > The patch is based on the following patches sent in mailing list.
> > [PATCH] gpio: atmel: Add the PIO4 driver support
> > [PATCH] arm: at91: Change the Chip ID registers' addresses
> > [PATCH v3] mmc: atmel: Add atmel sdhci support
> > [PATCH v2] arm: at91: clock: Add the generated clock support
> >
> > Changes in v4:
> >   1./ remove __weak attribute for has_lcdc() added in v3.
> >   2./ remove unused goto err_exit.
> >
> > Changes in v3:
> >   1./ change defines-->definitions for more clearly in asm/arch/sama5d2.h.
> >   2./ remove unused cpu_is_sama5d2x() macros.
> >   3./ fix spelling error "adress".
> >   4./ add __weak attribute for has_lcdc().
> >   5./ remove SPL configs.
> >
> > Changes in v2:
> >   1./ re-order SAMA5D2 statements alphabetically.
> >   2./ remove redundant "Unknown CPU type".
> >   3./ rework sama5d2's macros.
> >   4./ remove some #ifdef before functions.
> >   5./ move CONFIG_CMD_SF to Kconfig.
> >   6./ remove NAND macros from config file.
> >   7./ CONFIG_BOOTCOMMAND for sf uses defines in at91-sama5_common.h.
> >
> >   arch/arm/mach-at91/Kconfig   |5 +
> >   arch/arm/mach-at91/armv7/Makefile|1 +
> >   arch/arm/mach-at91/armv7/sama5d2_devices.c   |   59 +
> >   arch/arm/mach-at91/include/mach/at91_pmc.h   |9 +-
> >   arch/arm/mach-at91/include/mach/atmel_usba_udc.h |3 +-
> >   arch/arm/mach-at91/include/mach/hardware.h   |2 +
> >   arch/arm/mach-at91/include/mach/sama5d2.h|  203 
> >   board/atmel/sama5d2_xplained/Kconfig |   15 ++
> >   board/atmel/sama5d2_xplained/MAINTAINERS |7 +
> >   board/atmel/sama5d2_xplained/Makefile|8 +
> >   board/atmel/sama5d2_xplained/sama5d2_xplained.c  |  282
> ++
> >   configs/sama5d2_xplained_mmc_defconfig   |   11 +
> >   configs/sama5d2_xplained_spiflash_defconfig  |   11 +
> >   include/configs/sama5d2_xplained.h   |  122 ++
> >   14 files changed, 732 insertions(+), 6 deletions(-)
> >   create mode 100644 arch/arm/mach-at91/armv7/sama5d2_devices.c
> >   create mode 100644 arch/arm/mach-at91/include/mach/sama5d2.h
> >   create mode 100644 board/atmel/sama5d2_xplained/Kconfig
> >   create mode 100644 board/atmel/sama5d2_xplained/MAINTAINERS
> >   create mode 100644 board/atmel/sama5d2_xplained/Makefile
> >   create mode 100644 board/atmel/sama5d2_xplained/sama5d2_xplained.c
> >   create mode 100644 configs/sama5d2_xplained_mmc_defconfig
> >   create mode 100644 configs/sama5d2_xplained_spiflash_defconfig
> >   create mode 100644 include/configs/sama5d2_xplained.h
> >
> > diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> > index fdaf328..c333647 100644
> > --- a/arch/arm/mach-at91/Kconfig
> > +++ b/arch/arm/mach-at91/Kconfig
> > @@ -71,6 +71,10 @@ config TARGET_AT91SAM9X5EK
> > select CPU_ARM926EJS
> > select SUPPORT_SPL
> >
> > +config TARGET_SAMA5D2_XPLAINED
> > +   bool "SAMA5D2 Xplained board"
> > +   select CPU_V7
> > +
> >   config TARGET_SAMA5D3_XPLAINED
> > bool "SAMA5D3 Xplained board"
> > select CPU_V7
> > @@ -123,6 +127,7 @@ source "board/atmel/at91sam9m10g45ek/Kconfig"
> >   source "board/atmel/at91sam9n12ek/Kconfig"
> >   source "board/atmel/at91sam9rlek/Kconfig"
> >   source "board/atmel/at91sam9x5ek/Kconfig"
> > +source "board/atmel/sama5d2_xplained/Kconfig"
> >   source "board/atmel/sama5d3_xplained/Kconfig"
> >   source "board/atmel/sama5d3xek/Kconfig"
> >   source "board/atmel/sama5d4_xplained/Kconfig"
> > diff --git a/arch/arm/mach-at91/armv7/Makefile
> > b/arch/arm/mach-at91/armv7/Makefile
> > in