Re: [U-Boot] [PATCH] ARM: tegra: Add support for TK1-SOM board from Colorado Engineering

2016-08-30 Thread Peter.Chubb 
> "Stephen" == Stephen Warren  writes:

Stephen> On 08/29/2016 06:51 PM, peter.ch...@data61.csiro.au wrote:
>> The Colorado TK1 SOM is a small form factor board similar to the
>> Jetson TK1.  The main differences lie in the pinmux, and in that
>> the PCIe controller is set to use in 4lanes+1lane, rather than 2+2.
>> 
>> The pinmux header here was generated from a spreadsheet provided by
>> Colorado Engineering using the tegra-pinmux scripts.  The
>> spreadsheet was converted from v09 to v11 by me.

>> diff --git a/arch/arm/mach-tegra/tegra124/Kconfig
>> b/arch/arm/mach-tegra/tegra124/Kconfig

>> +config TARGET_CEI_TK1_SOM + bool "Colorado/NVIDIA Tegra124 TK1-som
>> board"

Stephen> I think that should say:

Stephen>bool "Colorado Engineering Inc TK1-som board"

Stephen> I assume that NVIDIA had no part in creating this derivative;
Stephen> they simply created the board it was based on.

As far a I know that's the case.  It's an NVIDIA SoC though.

>> diff --git a/include/configs/cei-tk1-som.h
>> b/include/configs/cei-tk1-som.h

>> + * (C) Copyright 2016 Peter Chubb
>> + * Based on the jetson-tk1.h which is

Stephen> There's trailing whitespace on that line.

Stephen> I might suggest adding a : to the end of the line, so it's
Stephen> more obvious (when looking at just the added lines) that it's
Stephen> referring to the next line rather than a statement that
Stephen> wasn't finished.

OK.  I need to fix the copyright header too (my employer wants a
mention, which is fair enough as they're paying for me to do this work))


Stephen> Is that true? I'd like to see a patch for
Stephen> tegra-pinmux-scripts that adds the config file for this board
Stephen> too.

It's on its way.  I'm currently trying to get the Linux DTS part working.

Stephen> Aside from those minor issues, Acked-by: Stephen Warren
Stephen> 

Thanks.
-- 
Dr Peter Chubb Tel: +61 2 9490 5852  http://www.data61.csiro.au
http://ts.data61.csiro.au  Software Systems Research Group/NICTA/Data61
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Re: [U-Boot] [PATCH] ARM: tegra: Add support for TK1-SOM board from Colorado Engineering

2016-08-30 Thread Stephen Warren 

On 08/29/2016 06:51 PM, peter.ch...@data61.csiro.au wrote:

The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1.  The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.

The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts.  The spreadsheet
was converted from v09 to v11 by me.



diff --git a/arch/arm/mach-tegra/tegra124/Kconfig 
b/arch/arm/mach-tegra/tegra124/Kconfig



+config TARGET_CEI_TK1_SOM
+   bool "Colorado/NVIDIA Tegra124 TK1-som board"


I think that should say:

bool "Colorado Engineering Inc TK1-som board"

I assume that NVIDIA had no part in creating this derivative; they 
simply created the board it was based on.



diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h



+ * (C) Copyright 2016 Peter Chubb
+ * Based on the jetson-tk1.h which is


There's trailing whitespace on that line.

I might suggest adding a : to the end of the line, so it's more obvious 
(when looking at just the added lines) that it's referring to the next 
line rather than a statement that wasn't finished.



diff --git a/board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h 
b/board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h



+/*
+ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
+ *
+ * To generate this file, use the tegra-pinmux-scripts tool available from
+ * https://github.com/NVIDIA/tegra-pinmux-scripts
+ * Run "board-to-uboot.py cei-tk1-som".
+ */


Is that true? I'd like to see a patch for tegra-pinmux-scripts that adds 
the config file for this board too.


Aside from those minor issues,
Acked-by: Stephen Warren 
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[U-Boot] [PATCH] ARM: tegra: Add support for TK1-SOM board from Colorado Engineering

2016-08-29 Thread Peter.Chubb 
The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1.  The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.

The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts.  The spreadsheet
was converted from v09 to v11 by me.

Signed-off-by: Peter Chubb 
---
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/tegra124-cei-tk1-som.dts | 477 ++
 arch/arm/mach-tegra/tegra124/Kconfig  |  11 +
 board/cei/cei-tk1-som/Kconfig |  12 +
 board/cei/cei-tk1-som/MAINTAINERS |   6 +
 board/cei/cei-tk1-som/Makefile|   9 +
 board/cei/cei-tk1-som/cei-tk1-som.c   |  65 +++
 board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h | 301 ++
 board/nvidia/venice2/as3722_init.h|   8 +-
 configs/cei-tk1-som_defconfig |  47 +++
 include/configs/cei-tk1-som.h |  71 
 11 files changed, 1004 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/dts/tegra124-cei-tk1-som.dts
 create mode 100644 board/cei/cei-tk1-som/Kconfig
 create mode 100644 board/cei/cei-tk1-som/MAINTAINERS
 create mode 100644 board/cei/cei-tk1-som/Makefile
 create mode 100644 board/cei/cei-tk1-som/cei-tk1-som.c
 create mode 100644 board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h
 create mode 100644 configs/cei-tk1-som_defconfig
 create mode 100644 include/configs/cei-tk1-som.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7d1944f..25fc22f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -57,6 +57,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra114-dalmore.dtb \
tegra124-jetson-tk1.dtb \
tegra124-nyan-big.dtb \
+   tegra124-cei-tk1-som.dtb \
tegra124-venice2.dtb \
tegra186-p2771--a02.dtb \
tegra186-p2771--b00.dtb \
diff --git a/arch/arm/dts/tegra124-cei-tk1-som.dts 
b/arch/arm/dts/tegra124-cei-tk1-som.dts
new file mode 100644
index 000..d22c0ca
--- /dev/null
+++ b/arch/arm/dts/tegra124-cei-tk1-som.dts
@@ -0,0 +1,477 @@
+/dts-v1/;
+
+#include "tegra124.dtsi"
+
+/ {
+   model = "Colorado Engineering TK1-SOM";
+   compatible = "nvidia,cei-tk1-som", "nvidia,tegra124";
+
+   chosen {
+   stdout-path = 
+   };
+
+   aliases {
+   i2c0 = "/i2c@7000d000";
+   i2c1 = "/i2c@7000c000";
+   i2c2 = "/i2c@7000c400";
+   i2c3 = "/i2c@7000c500";
+   i2c4 = "/i2c@7000c700";
+   sdhci0 = "/sdhci@700b0600";
+   sdhci1 = "/sdhci@700b0400";
+   spi0 = "/spi@7000d400";
+   spi1 = "/spi@7000da00";
+   usb0 = "/usb@7d00";
+   usb1 = "/usb@7d008000";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x8000>;
+   };
+
+   pcie-controller@01003000 {
+   status = "okay";
+
+   avddio-pex-supply = <_1v05_run>;
+   dvddio-pex-supply = <_1v05_run>;
+   avdd-pex-pll-supply = <_1v05_run>;
+   hvdd-pex-supply = <_3v3_lp0>;
+   hvdd-pex-pll-e-supply = <_3v3_lp0>;
+   vddio-pex-ctl-supply = <_3v3_lp0>;
+   avdd-pll-erefe-supply = <_1v05_run>;
+
+   pci@1,0 {
+   status = "okay";
+   nvidia,num-lanes = <4>;
+   };
+
+   pci@2,0 {
+   status = "okay";
+   };
+   };
+
+   i2c@7000c000 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c@7000c400 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c@7000c500 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c@7000c700 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   /* Expansion PWR_I2C_*, on-board components */
+   i2c@7000d000 {
+   status = "okay";
+   clock-frequency = <40>;
+
+   pmic: pmic@40 {
+   compatible = "ams,as3722";
+   reg = <0x40>;
+   interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+
+   ams,system-power-controller;
+
+   #interrupt-cells = <2>;
+   interrupt-controller;
+
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_default>;
+
+   as3722_default: pinmux {
+   gpio0 {
+