Re: [U-Boot] [PATCH] USB: ehci-mx6: Add proper IO accessors
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Fabio Estevam Sent: Tuesday, March 20, 2012 6:36 AM To: u-boot@lists.denx.de Cc: ma...@denx.de; Estevam Fabio-R49496; w...@denx.de Subject: [U-Boot] [PATCH] USB: ehci-mx6: Add proper IO accessors Add proper IO accessors for mx6 usb registers. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- This patch depends on [PATCH v5] mx6: Read silicon revision from register drivers/usb/host/ehci-mx6.c | 13 - 1 files changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index b7bf49d..5dec673 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -46,13 +46,9 @@ #define USBPHY_CTRL_ENUTMILEVEL3 0x8000 #define USBPHY_CTRL_ENUTMILEVEL2 0x4000 -#define ANADIG_USB2_CHRG_DETECT 0x0210 #define ANADIG_USB2_CHRG_DETECT_EN_B 0x0010 #define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B0x0008 -#define ANADIG_USB2_PLL_480_CTRL 0x0020 -#define ANADIG_USB2_PLL_480_CTRL_SET 0x0024 -#define ANADIG_USB2_PLL_480_CTRL_CLR 0x0028 #define ANADIG_USB2_PLL_480_CTRL_BYPASS 0x0001 #define ANADIG_USB2_PLL_480_CTRL_ENABLE 0x2000 #define ANADIG_USB2_PLL_480_CTRL_POWER0x1000 @@ -77,8 +73,7 @@ static void usbh1_internal_phy_clock_gate(int on) static void usbh1_power_config(void) { - void __iomem *anatop_base = (void __iomem *)ANATOP_BASE_ADDR; - + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; /* * Some phy and power's special controls for host1 * 1. The external charger detector needs to be disabled @@ -89,15 +84,15 @@ static void usbh1_power_config(void) */ __raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B | ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B, - anatop_base + ANADIG_USB2_CHRG_DETECT); + anatop-usb2_chrg_detect); __raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS, - anatop_base + ANADIG_USB2_PLL_480_CTRL_CLR); + anatop-usb2_pll_480_ctrl); __raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE | ANADIG_USB2_PLL_480_CTRL_POWER | ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS, - anatop_base + ANADIG_USB2_PLL_480_CTRL_SET); + anatop-usb2_pll_480_ctrl_set); } static int usbh1_phy_enable(void) Acked-by: Jason Liu r64...@freescale.com -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] USB: ehci-mx6: Add proper IO accessors
On 19/03/2012 23:36, Fabio Estevam wrote: Add proper IO accessors for mx6 usb registers. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- This patch depends on [PATCH v5] mx6: Read silicon revision from register drivers/usb/host/ehci-mx6.c | 13 - 1 files changed, 4 insertions(+), 9 deletions(-) Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] USB: ehci-mx6: Add proper IO accessors
On 19/03/2012 23:36, Fabio Estevam wrote: Add proper IO accessors for mx6 usb registers. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- This patch depends on [PATCH v5] mx6: Read silicon revision from register drivers/usb/host/ehci-mx6.c | 13 - 1 files changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index b7bf49d..5dec673 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -46,13 +46,9 @@ #define USBPHY_CTRL_ENUTMILEVEL3 0x8000 #define USBPHY_CTRL_ENUTMILEVEL2 0x4000 -#define ANADIG_USB2_CHRG_DETECT 0x0210 #define ANADIG_USB2_CHRG_DETECT_EN_B 0x0010 #define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B 0x0008 -#define ANADIG_USB2_PLL_480_CTRL 0x0020 -#define ANADIG_USB2_PLL_480_CTRL_SET 0x0024 -#define ANADIG_USB2_PLL_480_CTRL_CLR 0x0028 #define ANADIG_USB2_PLL_480_CTRL_BYPASS 0x0001 #define ANADIG_USB2_PLL_480_CTRL_ENABLE 0x2000 #define ANADIG_USB2_PLL_480_CTRL_POWER 0x1000 @@ -77,8 +73,7 @@ static void usbh1_internal_phy_clock_gate(int on) static void usbh1_power_config(void) { - void __iomem *anatop_base = (void __iomem *)ANATOP_BASE_ADDR; - + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; /* * Some phy and power's special controls for host1 * 1. The external charger detector needs to be disabled @@ -89,15 +84,15 @@ static void usbh1_power_config(void) */ __raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B | ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B, - anatop_base + ANADIG_USB2_CHRG_DETECT); + anatop-usb2_chrg_detect); __raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS, - anatop_base + ANADIG_USB2_PLL_480_CTRL_CLR); + anatop-usb2_pll_480_ctrl); __raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE | ANADIG_USB2_PLL_480_CTRL_POWER | ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS, - anatop_base + ANADIG_USB2_PLL_480_CTRL_SET); + anatop-usb2_pll_480_ctrl_set); } static int usbh1_phy_enable(void) Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] USB: ehci-mx6: Add proper IO accessors
Dear Stefano Babic, On 19/03/2012 23:36, Fabio Estevam wrote: Add proper IO accessors for mx6 usb registers. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- This patch depends on [PATCH v5] mx6: Read silicon revision from register drivers/usb/host/ehci-mx6.c | 13 - 1 files changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index b7bf49d..5dec673 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -46,13 +46,9 @@ #define USBPHY_CTRL_ENUTMILEVEL3 0x8000 #define USBPHY_CTRL_ENUTMILEVEL2 0x4000 -#define ANADIG_USB2_CHRG_DETECT0x0210 #define ANADIG_USB2_CHRG_DETECT_EN_B 0x0010 #define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B 0x0008 -#define ANADIG_USB2_PLL_480_CTRL 0x0020 -#define ANADIG_USB2_PLL_480_CTRL_SET 0x0024 -#define ANADIG_USB2_PLL_480_CTRL_CLR 0x0028 #define ANADIG_USB2_PLL_480_CTRL_BYPASS0x0001 #define ANADIG_USB2_PLL_480_CTRL_ENABLE0x2000 #define ANADIG_USB2_PLL_480_CTRL_POWER 0x1000 @@ -77,8 +73,7 @@ static void usbh1_internal_phy_clock_gate(int on) static void usbh1_power_config(void) { - void __iomem *anatop_base = (void __iomem *)ANATOP_BASE_ADDR; - + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; /* * Some phy and power's special controls for host1 * 1. The external charger detector needs to be disabled @@ -89,15 +84,15 @@ static void usbh1_power_config(void) */ __raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B | ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B, -anatop_base + ANADIG_USB2_CHRG_DETECT); +anatop-usb2_chrg_detect); __raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS, -anatop_base + ANADIG_USB2_PLL_480_CTRL_CLR); +anatop-usb2_pll_480_ctrl); __raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE | ANADIG_USB2_PLL_480_CTRL_POWER | ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS, -anatop_base + ANADIG_USB2_PLL_480_CTRL_SET); +anatop-usb2_pll_480_ctrl_set); } static int usbh1_phy_enable(void) Acked-by: Stefano Babic sba...@denx.de Agreed Acked-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot