[PATCH 02/33] arm: stm32mp: migrate cmd_stm32prog to log macro
Change debug and pr_ macro to log macro.
Signed-off-by: Patrick Delaunay
---
.../cmd_stm32prog/cmd_stm32prog.c | 4 +-
.../mach-stm32mp/cmd_stm32prog/stm32prog.c| 112 +-
.../mach-stm32mp/cmd_stm32prog/stm32prog.h| 2 +-
.../cmd_stm32prog/stm32prog_serial.c | 24 ++--
.../cmd_stm32prog/stm32prog_usb.c | 14 +--
5 files changed, 78 insertions(+), 78 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
index 49dd25b28f..34a6be66c3 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
@@ -56,7 +56,7 @@ static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, int
argc,
link = LINK_SERIAL;
if (link == LINK_UNDEFINED) {
- pr_err("not supported link=%s\n", argv[1]);
+ log_err("not supported link=%s\n", argv[1]);
return CMD_RET_USAGE;
}
@@ -90,7 +90,7 @@ static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, int
argc,
data = (struct stm32prog_data *)malloc(sizeof(*data));
if (!data) {
- pr_err("Alloc failed.");
+ log_err("Alloc failed.");
return CMD_RET_FAILURE;
}
stm32prog_data = data;
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index ec3355d816..7defe78689 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -97,28 +97,28 @@ u8 stm32prog_header_check(struct raw_header_s *raw_header,
header->image_length = 0x0;
if (!raw_header || !header) {
- pr_debug("%s:no header data\n", __func__);
+ log_debug("%s:no header data\n", __func__);
return -1;
}
if (raw_header->magic_number !=
(('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
- pr_debug("%s:invalid magic number : 0x%x\n",
-__func__, raw_header->magic_number);
+ log_debug("%s:invalid magic number : 0x%x\n",
+ __func__, raw_header->magic_number);
return -2;
}
/* only header v1.0 supported */
if (raw_header->header_version != 0x0001) {
- pr_debug("%s:invalid header version : 0x%x\n",
-__func__, raw_header->header_version);
+ log_debug("%s:invalid header version : 0x%x\n",
+ __func__, raw_header->header_version);
return -3;
}
if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
- pr_debug("%s:invalid reserved field\n", __func__);
+ log_debug("%s:invalid reserved field\n", __func__);
return -4;
}
for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
if (raw_header->padding[i] != 0) {
- pr_debug("%s:invalid padding field\n", __func__);
+ log_debug("%s:invalid padding field\n", __func__);
return -5;
}
}
@@ -376,7 +376,7 @@ static int parse_flash_layout(struct stm32prog_data *data,
last = start + size;
*last = 0x0; /* force null terminated string */
- pr_debug("flash layout =\n%s\n", start);
+ log_debug("flash layout =\n%s\n", start);
/* calculate expected number of partitions */
part_list_size = 1;
@@ -584,11 +584,11 @@ static int init_device(struct stm32prog_data *data,
last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
block_dev->blksz;
}
- pr_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
-block_dev->lba, block_dev->blksz);
- pr_debug(" available address = 0x%llx..0x%llx\n",
-first_addr, last_addr);
- pr_debug(" full_update = %d\n", dev->full_update);
+ log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
+ block_dev->lba, block_dev->blksz);
+ log_debug(" available address = 0x%llx..0x%llx\n",
+ first_addr, last_addr);
+ log_debug(" full_update = %d\n", dev->full_update);
break;
case STM32PROG_NOR:
case STM32PROG_NAND:
@@ -598,7 +598,7 @@ static int init_device(struct stm32prog_data *data,
return -ENODEV;
}
get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
- pr_debug("%s\n", mtd_id);
+ log_debug("%s\n", mtd_id);
mtdparts_init();
mtd = get_mtd_device_nm(mtd_id);
@@ -609,10 +609,10 @@ static int
[PATCH 04/33] pinctrl: stm32: migrate trace to log macro
Change debug to log macro and define LOG_CATEGORY.
Remove "%s:" with __func__ as it is managed by log macro
(CONFIG_LOGF_FUNC)
Signed-off-by: Patrick Delaunay
---
drivers/pinctrl/pinctrl_stm32.c | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index dbea99532c..5f944d5bc5 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -3,6 +3,8 @@
* Copyright (C) 2017-2020 STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY UCLASS_PINCTRL
+
#include
#include
#include
@@ -256,8 +258,8 @@ static int stm32_pinctrl_probe(struct udevice *dev)
/* hwspinlock property is optional, just log the error */
ret = hwspinlock_get_by_index(dev, 0, >hws);
if (ret)
- debug("%s: hwspinlock_get_by_index may have failed (%d)\n",
- __func__, ret);
+ dev_dbg(dev, "hwspinlock_get_by_index may have failed (%d)\n",
+ ret);
return 0;
}
@@ -305,8 +307,7 @@ static int prep_gpio_dsc(struct stm32_gpio_dsc *gpio_dsc,
u32 port_pin)
{
gpio_dsc->port = (port_pin & 0x1F000) >> 12;
gpio_dsc->pin = (port_pin & 0x0F00) >> 8;
- debug("%s: GPIO:port= %d, pin= %d\n", __func__, gpio_dsc->port,
- gpio_dsc->pin);
+ log_debug("GPIO:port= %d, pin= %d\n", gpio_dsc->port, gpio_dsc->pin);
return 0;
}
@@ -347,9 +348,9 @@ static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl,
u32 gpio_fn,
else
gpio_ctl->pupd = STM32_GPIO_PUPD_NO;
- debug("%s: gpio fn= %d, slew-rate= %x, op type= %x, pull-upd is = %x\n",
- __func__, gpio_fn, gpio_ctl->speed, gpio_ctl->otype,
-gpio_ctl->pupd);
+ log_debug("gpio fn= %d, slew-rate= %x, op type= %x, pull-upd is = %x\n",
+ gpio_fn, gpio_ctl->speed, gpio_ctl->otype,
+ gpio_ctl->pupd);
return 0;
}
@@ -373,7 +374,7 @@ static int stm32_pinctrl_config(ofnode node)
if (rv < 0)
return rv;
len = rv / sizeof(pin_mux[0]);
- debug("%s: no of pinmux entries= %d\n", __func__, len);
+ log_debug("No of pinmux entries= %d\n", len);
if (len > MAX_PINS_ONE_IP)
return -EINVAL;
rv = ofnode_read_u32_array(subnode, "pinmux", pin_mux, len);
@@ -382,7 +383,7 @@ static int stm32_pinctrl_config(ofnode node)
for (i = 0; i < len; i++) {
struct gpio_desc desc;
- debug("%s: pinmux = %x\n", __func__, *(pin_mux + i));
+ log_debug("pinmux = %x\n", *(pin_mux + i));
prep_gpio_dsc(_dsc, *(pin_mux + i));
prep_gpio_ctl(_ctl, *(pin_mux + i), subnode);
rv = uclass_get_device_by_seq(UCLASS_GPIO,
@@ -392,7 +393,7 @@ static int stm32_pinctrl_config(ofnode node)
return rv;
desc.offset = gpio_dsc.pin;
rv = stm32_gpio_config(, _ctl);
- debug("%s: rv = %d\n\n", __func__, rv);
+ log_debug("rv = %d\n\n", rv);
if (rv)
return rv;
}
@@ -408,7 +409,7 @@ static int stm32_pinctrl_bind(struct udevice *dev)
int ret;
dev_for_each_subnode(node, dev) {
- debug("%s: bind %s\n", __func__, ofnode_get_name(node));
+ dev_dbg(dev, "bind %s\n", ofnode_get_name(node));
ofnode_get_property(node, "gpio-controller", );
if (ret < 0)
@@ -424,7 +425,7 @@ static int stm32_pinctrl_bind(struct udevice *dev)
if (ret)
return ret;
- debug("%s: bind %s\n", __func__, name);
+ dev_dbg(dev, "bind %s\n", name);
}
return 0;
@@ -448,7 +449,7 @@ static int stm32_pinctrl_set_state_simple(struct udevice
*dev,
if (!list)
return -EINVAL;
- debug("%s: periph->name = %s\n", __func__, periph->name);
+ dev_dbg(dev, "periph->name = %s\n", periph->name);
size /= sizeof(*list);
for (i = 0; i < size; i++) {
@@ -456,7 +457,8 @@ static int stm32_pinctrl_set_state_simple(struct udevice
*dev,
config_node = ofnode_get_by_phandle(phandle);
if (!ofnode_valid(config_node)) {
- pr_err("prop pinctrl-0 index %d invalid phandle\n", i);
+ dev_err(periph,
+ "prop pinctrl-0 index %d invalid phandle\n", i);
return -EINVAL;
}
--
2.17.1
[PATCH 06/33] remoproc: stm32: migrate trace to log macro
Define LOG_CATEGORY and remove unneeded pr_fmt macro with the dev macro as dev->name is displayed and CONFIG_LOGF_FUNC can be activated for log macro. Signed-off-by: Patrick Delaunay --- drivers/remoteproc/stm32_copro.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/stm32_copro.c b/drivers/remoteproc/stm32_copro.c index 33b574b1bd..1e09bb6387 100644 --- a/drivers/remoteproc/stm32_copro.c +++ b/drivers/remoteproc/stm32_copro.c @@ -2,7 +2,8 @@ /* * Copyright (C) 2019, STMicroelectronics - All Rights Reserved */ -#define pr_fmt(fmt) "%s: " fmt, __func__ +#define LOG_CATEGORY UCLASS_REMOTEPROC + #include #include #include -- 2.17.1
[PATCH 01/33] arm: stm32mp: migrate trace to log macro
Change debug and pr_ macro to log macro and define LOG_CATEGORY.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/boot_params.c | 8 +---
arch/arm/mach-stm32mp/cmd_stm32key.c | 3 ++-
arch/arm/mach-stm32mp/cpu.c | 18 ++
arch/arm/mach-stm32mp/dram_init.c | 8 +---
arch/arm/mach-stm32mp/fdt.c | 17 ++---
arch/arm/mach-stm32mp/pwr_regulator.c | 2 ++
arch/arm/mach-stm32mp/spl.c | 16 +---
7 files changed, 43 insertions(+), 29 deletions(-)
diff --git a/arch/arm/mach-stm32mp/boot_params.c
b/arch/arm/mach-stm32mp/boot_params.c
index 37ee9e1612..13322e34d6 100644
--- a/arch/arm/mach-stm32mp/boot_params.c
+++ b/arch/arm/mach-stm32mp/boot_params.c
@@ -3,6 +3,8 @@
* Copyright (C) 2019, STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY LOGC_ARCH
+
#include
#include
#include
@@ -32,15 +34,15 @@ void save_boot_params(unsigned long r0, unsigned long r1,
unsigned long r2,
*/
void *board_fdt_blob_setup(void)
{
- debug("%s: nt_fw_dtb=%lx\n", __func__, nt_fw_dtb);
+ log_debug("%s: nt_fw_dtb=%lx\n", __func__, nt_fw_dtb);
/* use external device tree only if address is valid */
if (nt_fw_dtb >= STM32_DDR_BASE) {
if (fdt_magic(nt_fw_dtb) == FDT_MAGIC)
return (void *)nt_fw_dtb;
- debug("%s: DTB not found.\n", __func__);
+ log_debug("%s: DTB not found.\n", __func__);
}
- debug("%s: fall back to builtin DTB, %p\n", __func__, &_end);
+ log_debug("%s: fall back to builtin DTB, %p\n", __func__, &_end);
return (void *)&_end;
}
diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c
b/arch/arm/mach-stm32mp/cmd_stm32key.c
index f191085a12..86307a9ae8 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32key.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
@@ -6,6 +6,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -34,7 +35,7 @@ static void fuse_hash_value(u32 addr, bool print)
DM_GET_DRIVER(stm32mp_bsec),
);
if (ret) {
- pr_err("Can't find stm32mp_bsec driver\n");
+ log_err("Can't find stm32mp_bsec driver\n");
return;
}
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index f19e5c3f33..ad9f633a29 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -2,6 +2,9 @@
/*
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
+
+#define LOG_CATEGORY LOGC_ARCH
+
#include
#include
#include
@@ -462,8 +465,8 @@ static void setup_boot_mode(void)
struct udevice *dev;
int alias;
- pr_debug("%s: boot_ctx=0x%x => boot_mode=%x, instance=%d forced=%x\n",
-__func__, boot_ctx, boot_mode, instance, forced_mode);
+ log_debug("%s: boot_ctx=0x%x => boot_mode=%x, instance=%d forced=%x\n",
+ __func__, boot_ctx, boot_mode, instance, forced_mode);
switch (boot_mode & TAMP_BOOT_DEVICE_MASK) {
case BOOT_SERIAL_UART:
if (instance > ARRAY_SIZE(serial_addr))
@@ -509,7 +512,7 @@ static void setup_boot_mode(void)
env_set("boot_instance", "0");
break;
default:
- pr_debug("unexpected boot mode = %x\n", boot_mode);
+ log_debug("unexpected boot mode = %x\n", boot_mode);
break;
}
@@ -536,7 +539,7 @@ static void setup_boot_mode(void)
case BOOT_NORMAL:
break;
default:
- pr_debug("unexpected forced boot mode = %x\n", forced_mode);
+ log_debug("unexpected forced boot mode = %x\n", forced_mode);
break;
}
@@ -576,14 +579,13 @@ __weak int setup_mac_address(void)
enetaddr[i] = ((uint8_t *))[i];
if (!is_valid_ethaddr(enetaddr)) {
- pr_err("invalid MAC address in OTP %pM\n", enetaddr);
+ log_err("invalid MAC address in OTP %pM\n", enetaddr);
return -EINVAL;
}
- pr_debug("OTP MAC address = %pM\n", enetaddr);
+ log_debug("OTP MAC address = %pM\n", enetaddr);
ret = eth_env_set_enetaddr("ethaddr", enetaddr);
if (ret)
- pr_err("Failed to set mac address %pM from OTP: %d\n",
- enetaddr, ret);
+ log_err("Failed to set mac address %pM from OTP: %d\n",
enetaddr, ret);
#endif
return 0;
diff --git a/arch/arm/mach-stm32mp/dram_init.c
b/arch/arm/mach-stm32mp/dram_init.c
index 0e8ce63f4a..32b177bb79 100644
--- a/arch/arm/mach-stm32mp/dram_init.c
+++ b/arch/arm/mach-stm32mp/dram_init.c
@@ -3,6 +3,8 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY LOGC_ARCH
+
#include
#include
#include
@@ -21,15 +23,15 @@ int dram_init(void)
Re: [PATCH v8 5/9] usb: add MediaTek USB3 DRD driver
On 10/14/20 9:08 AM, Chunfeng Yun wrote: > This patch adds support for the MediaTek USB3 DRD controller, > its host side is based on xHCI, this driver supports device mode > and host mode. This one does not apply, can you rebase just this one on top of usb/next and resend ? I picked the other patches into there already, so you don't have to resend the whole series. [...] > +#define MU3D_EP_TXCR0(epnum)(U3D_TX1CSR0 + (((epnum) - 1) * 0x10)) > +#define MU3D_EP_TXCR1(epnum)(U3D_TX1CSR1 + (((epnum) - 1) * 0x10)) > +#define MU3D_EP_TXCR2(epnum)(U3D_TX1CSR2 + (((epnum) - 1) * 0x10)) > + > +#define MU3D_EP_RXCR0(epnum)(U3D_RX1CSR0 + (((epnum) - 1) * 0x10)) > +#define MU3D_EP_RXCR1(epnum)(U3D_RX1CSR1 + (((epnum) - 1) * 0x10)) > +#define MU3D_EP_RXCR2(epnum)(U3D_RX1CSR2 + (((epnum) - 1) * 0x10)) #define[space] please, use consistently. > +#define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10)) > +#define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10)) > +#define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10)) [...]
[PATCH] dt-bindings: arm64: versal: Add clk and power headers
Add power and reset headers to be sources by Versal dtses. Signed-off-by: Michal Simek --- include/dt-bindings/clock/xlnx-versal-clk.h | 123 ++ include/dt-bindings/power/xlnx-versal-power.h | 40 ++ 2 files changed, 163 insertions(+) create mode 100644 include/dt-bindings/clock/xlnx-versal-clk.h create mode 100644 include/dt-bindings/power/xlnx-versal-power.h diff --git a/include/dt-bindings/clock/xlnx-versal-clk.h b/include/dt-bindings/clock/xlnx-versal-clk.h new file mode 100644 index ..264d634d226e --- /dev/null +++ b/include/dt-bindings/clock/xlnx-versal-clk.h @@ -0,0 +1,123 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 Xilinx Inc. + * + */ + +#ifndef _DT_BINDINGS_CLK_VERSAL_H +#define _DT_BINDINGS_CLK_VERSAL_H + +#define PMC_PLL1 +#define APU_PLL2 +#define RPU_PLL3 +#define CPM_PLL4 +#define NOC_PLL5 +#define PLL_MAX6 +#define PMC_PRESRC 7 +#define PMC_POSTCLK8 +#define PMC_PLL_OUT9 +#define PPLL 10 +#define NOC_PRESRC 11 +#define NOC_POSTCLK12 +#define NOC_PLL_OUT13 +#define NPLL 14 +#define APU_PRESRC 15 +#define APU_POSTCLK16 +#define APU_PLL_OUT17 +#define APLL 18 +#define RPU_PRESRC 19 +#define RPU_POSTCLK20 +#define RPU_PLL_OUT21 +#define RPLL 22 +#define CPM_PRESRC 23 +#define CPM_POSTCLK24 +#define CPM_PLL_OUT25 +#define CPLL 26 +#define PPLL_TO_XPD27 +#define NPLL_TO_XPD28 +#define APLL_TO_XPD29 +#define RPLL_TO_XPD30 +#define EFUSE_REF 31 +#define SYSMON_REF 32 +#define IRO_SUSPEND_REF33 +#define USB_SUSPEND34 +#define SWITCH_TIMEOUT 35 +#define RCLK_PMC 36 +#define RCLK_LPD 37 +#define WDT38 +#define TTC0 39 +#define TTC1 40 +#define TTC2 41 +#define TTC3 42 +#define GEM_TSU43 +#define GEM_TSU_LB 44 +#define MUXED_IRO_DIV2 45 +#define MUXED_IRO_DIV4 46 +#define PSM_REF47 +#define GEM0_RX48 +#define GEM0_TX49 +#define GEM1_RX50 +#define GEM1_TX51 +#define CPM_CORE_REF 52 +#define CPM_LSBUS_REF 53 +#define CPM_DBG_REF54 +#define CPM_AUX0_REF 55 +#define CPM_AUX1_REF 56 +#define QSPI_REF 57 +#define OSPI_REF 58 +#define SDIO0_REF 59 +#define SDIO1_REF 60 +#define PMC_LSBUS_REF 61 +#define I2C_REF62 +#define TEST_PATTERN_REF 63 +#define DFT_OSC_REF64 +#define PMC_PL0_REF65 +#define PMC_PL1_REF66 +#define PMC_PL2_REF67 +#define PMC_PL3_REF68 +#define CFU_REF69 +#define SPARE_REF 70 +#define NPI_REF71 +#define HSM0_REF 72 +#define HSM1_REF 73 +#define SD_DLL_REF 74 +#define FPD_TOP_SWITCH 75 +#define FPD_LSBUS 76 +#define ACPU 77 +#define DBG_TRACE 78 +#define DBG_FPD79 +#define LPD_TOP_SWITCH
[PATCH V2 11/12] doc: board: Convert i.MX6UL 14x14 EVK README to reST
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan --- doc/board/freescale/index.rst | 1 + .../board/freescale/mx6ul_14x14_evk.rst | 62 --- 2 files changed, 40 insertions(+), 23 deletions(-) rename board/freescale/mx6ul_14x14_evk/README => doc/board/freescale/mx6ul_14x14_evk.rst (65%) diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst index 716bb1e3ac..046a839a52 100644 --- a/doc/board/freescale/index.rst +++ b/doc/board/freescale/index.rst @@ -16,3 +16,4 @@ Freescale imxrt1050-evk mx6sabreauto mx6sabresd + mx6ul_14x14_evk diff --git a/board/freescale/mx6ul_14x14_evk/README b/doc/board/freescale/mx6ul_14x14_evk.rst similarity index 65% rename from board/freescale/mx6ul_14x14_evk/README rename to doc/board/freescale/mx6ul_14x14_evk.rst index 70eb86efba..8298bf8e1e 100644 --- a/board/freescale/mx6ul_14x14_evk/README +++ b/doc/board/freescale/mx6ul_14x14_evk.rst @@ -1,11 +1,18 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +mx6ul_14x14_evk +=== + How to use U-Boot on Freescale MX6UL 14x14 EVK --- - Build U-Boot for MX6UL 14x14 EVK: -$ make mrproper -$ make mx6ul_14x14_evk_defconfig -$ make +.. code-block:: bash + + $ make mrproper + $ make mx6ul_14x14_evk_defconfig + $ make This will generate the SPL image called SPL and the u-boot.img. @@ -14,35 +21,38 @@ This will generate the SPL image called SPL and the u-boot.img. - Flash the SPL image into the micro SD card: -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1 conv=notrunc; sync +.. code-block:: bash + + sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1 conv=notrunc; sync - Flash the u-boot.img image into the micro SD card: -sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69 conv=notrunc; sync +.. code-block:: bash -- Jumper settings: + sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69 conv=notrunc; sync -SW601: 0 0 1 0 -Sw602: 1 0 +- Jumper settings:: + + SW601: 0 0 1 0 + Sw602: 1 0 where 0 means bottom position and 1 means top position (from the switch label numbers reference). - Connect the USB cable between the EVK and the PC for the console. -(The USB console connector is the one close the push buttons) + The USB console connector is the one close the push buttons -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. +- Insert the micro SD card in the board, power it up and U-Boot messages should come up. 2. Booting via Serial Download Protocol (SDP) - The mx6ulevk board can boot from USB OTG port using the SDP, target will enter in SDP mode in case an SD Card is not connect or boot switches are -set as below: +set as below:: -Sw602: 0 1 -SW601: x x x x + Sw602: 0 1 + SW601: x x x x The following tools can be used to boot via SDP, for both tools you must connect an USB cable in USB OTG port. @@ -54,13 +64,15 @@ https://github.com/NXPmicro/mfgtools The following script should be created to boot SPL + u-boot-dtb.img binaries: - $ cat uuu_script -uuu_version 1.1.4 +.. code-block:: bash + + $ cat uuu_script + uuu_version 1.1.4 -SDP: boot -f SPL -SDPU: write -f u-boot-dtb.img -addr 0x877fffc0 -SDPU: jump -addr 0x877fffc0 -SDPU: done + SDP: boot -f SPL + SDPU: write -f u-boot-dtb.img -addr 0x877fffc0 + SDPU: jump -addr 0x877fffc0 + SDPU: done Please note that the address above is calculated based on SYS_TEXT_BASE address: @@ -68,7 +80,9 @@ Please note that the address above is calculated based on SYS_TEXT_BASE address: Power on the target and run the following command from U-Boot root directory: - $ sudo ./uuu uuu_script +.. code-block:: bash + + $ sudo ./uuu uuu_script - Method 2: imx usb loader tool (imx_usb): @@ -78,5 +92,7 @@ https://github.com/boundarydevices/imx_usb_loader Build the source code and run the following commands from U-Boot root directory: - $ sudo ./imx_usb SPL - $ sudo ./imx_usb u-boot-dtb.img +.. code-block:: bash + + $ sudo ./imx_usb SPL + $ sudo ./imx_usb u-boot-dtb.img -- 2.28.0
[PATCH V2 09/12] doc: board: Convert i.MX6 Sabreauto README to reST
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan
---
board/freescale/mx6sabreauto/README | 82 --
doc/board/freescale/index.rst| 1 +
doc/board/freescale/mx6sabreauto.rst | 100 +++
3 files changed, 101 insertions(+), 82 deletions(-)
delete mode 100644 board/freescale/mx6sabreauto/README
create mode 100644 doc/board/freescale/mx6sabreauto.rst
diff --git a/board/freescale/mx6sabreauto/README
b/board/freescale/mx6sabreauto/README
deleted file mode 100644
index 710026a05e..00
--- a/board/freescale/mx6sabreauto/README
+++ /dev/null
@@ -1,82 +0,0 @@
-How to use and build U-Boot on mx6sabreauto
-
-mx6sabreauto_defconfig target supports mx6q/mx6dl/mx6qp sabreauto variants.
-
-In order to build it:
-
-$ make mx6sabreauto_defconfig
-
-$ make
-
-This will generate the SPL and u-boot-dtb.img binaries.
-
-- Flash the SPL binary into the SD card:
-
-$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 conv=notrunc && sync
-
-- Flash the u-boot-dtb.img binary into the SD card:
-
-$ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 conv=notrunc && sync
-
-Booting via Falcon mode
-
-Write in mx6sabreauto_defconfig the following define below:
-
-CONFIG_SPL_OS_BOOT=y
-
-In order to build it:
-
-$ make mx6sabreauto_defconfig
-
-$ make
-
-This will generate the SPL image called SPL and the u-boot-dtb.img.
-
-- Flash the SPL image into the SD card:
-
-$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 conv=notrunc && sync
-
-- Flash the u-boot-dtb.img image into the SD card:
-
-$ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 conv=notrunc && sync
-
-Create a FAT16 boot partition to store uImage and the dtb file, then copy the
files there:
-
-$ sudo cp uImage /media/boot
-
-$ sudo cp imx6dl-sabreauto.dtb /media/boot
-
-Create a partition for root file system and extract it there:
-
-$ sudo tar xvf rootfs.tar.gz -C /media/root
-
-The SD card must have enough space for raw "args" and "kernel".
-To configure Falcon mode for the first time, on U-Boot do the following
commands:
-
-- Load dtb file from boot partition:
-
-# load mmc 0:1 ${fdt_addr} imx6dl-sabreauto.dtb
-
-- Load kernel image from boot partition:
-
-# load mmc 0:1 ${loadaddr} uImage
-
-- Write kernel at 2MB offset:
-
-# mmc write ${loadaddr} 0x1000 0x4000
-
-- Setup kernel bootargs:
-
-# setenv bootargs "console=ttymxc3,115200 root=/dev/mmcblk0p1 rootfstype=ext4
rootwait quiet rw"
-
-- Prepare args:
-
-# spl export fdt ${loadaddr} - ${fdt_addr}
-
-- Write args 1MB data (0x800 sectors) to 1MB offset (0x800 sectors)
-
-# mmc write 1800 0x800 0x800
-
-- Restart the board and then SPL binary will launch the kernel directly.
diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst
index c9d7411875..cc079cadce 100644
--- a/doc/board/freescale/index.rst
+++ b/doc/board/freescale/index.rst
@@ -14,3 +14,4 @@ Freescale
imx8qxp_mek
imxrt1020-evk
imxrt1050-evk
+ mx6sabreauto
diff --git a/doc/board/freescale/mx6sabreauto.rst
b/doc/board/freescale/mx6sabreauto.rst
new file mode 100644
index 00..fe4cd9d214
--- /dev/null
+++ b/doc/board/freescale/mx6sabreauto.rst
@@ -0,0 +1,100 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+mx6sabreauto
+
+
+How to use and build U-Boot on mx6sabreauto
+---
+
+mx6sabreauto_defconfig target supports mx6q/mx6dl/mx6qp sabreauto variants.
+
+In order to build it:
+
+.. code-block:: bash
+
+ $ make mx6sabreauto_defconfig
+ $ make
+
+This will generate the SPL and u-boot-dtb.img binaries.
+
+- Flash the SPL binary into the SD card:
+
+.. code-block:: bash
+
+ $ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 conv=notrunc && sync
+
+- Flash the u-boot-dtb.img binary into the SD card:
+
+.. code-block:: bash
+
+ $ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 conv=notrunc && sync
+
+Booting via Falcon mode
+---
+
+Write in mx6sabreauto_defconfig the following define below:
+
+CONFIG_SPL_OS_BOOT=y
+
+In order to build it:
+
+.. code-block:: bash
+
+ $ make mx6sabreauto_defconfig
+ $ make
+
+This will generate the SPL image called SPL and the u-boot-dtb.img.
+
+- Flash the SPL image into the SD card:
+
+.. code-block:: bash
+
+ $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 conv=notrunc && sync
+
+- Flash the u-boot-dtb.img image into the SD card:
+
+.. code-block:: bash
+
+ $ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 conv=notrunc && sync
+
+Create a FAT16 boot partition to store uImage and the dtb file, then copy the
files there:
+
+.. code-block:: bash
+
+ $ sudo cp uImage /media/boot
+ $ sudo cp imx6dl-sabreauto.dtb /media/boot
+
+Create a partition for root file system and extract it there:
+
+.. code-block:: bash
+
+ $ sudo tar xvf rootfs.tar.gz -C /media/root
+
+The SD card must have enough space
[PATCH V2 08/12] doc: board: Convert i.MXRT1050 EVK README to reST
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan --- board/freescale/imxrt1050-evk/README | 31 doc/board/freescale/imxrt1050-evk.rst | 41 +++ doc/board/freescale/index.rst | 1 + 3 files changed, 42 insertions(+), 31 deletions(-) delete mode 100644 board/freescale/imxrt1050-evk/README create mode 100644 doc/board/freescale/imxrt1050-evk.rst diff --git a/board/freescale/imxrt1050-evk/README b/board/freescale/imxrt1050-evk/README deleted file mode 100644 index f321300246..00 --- a/board/freescale/imxrt1050-evk/README +++ /dev/null @@ -1,31 +0,0 @@ -How to use U-Boot on NXP i.MXRT1050 EVK - -- Build U-Boot for i.MXRT1050 EVK: - -$ make mrproper -$ make imxrt1050-evk_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/sdX bs=1k seek=1 conv=notrunc; sync - -- Flash the u-boot.img image into the micro SD card: - -sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128 conv=notrunc; sync - -- Jumper settings: - -SW7: 1 0 1 0 - -where 0 means bottom position and 1 means top position (from the -switch label numbers reference). - -- Connect the USB cable between the EVK and the PC for the console. -(The USB console connector is the one close the ethernet connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/doc/board/freescale/imxrt1050-evk.rst b/doc/board/freescale/imxrt1050-evk.rst new file mode 100644 index 00..c1fb48f0cd --- /dev/null +++ b/doc/board/freescale/imxrt1050-evk.rst @@ -0,0 +1,41 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imxrt1050-evk += + +How to use U-Boot on NXP i.MXRT1050 EVK +--- + +- Build U-Boot for i.MXRT1050 EVK: + +.. code-block:: bash + + $ make mrproper + $ make imxrt1050-evk_defconfig + $ make + +This will generate the SPL image called SPL and the u-boot.img. + +- Flash the SPL image into the micro SD card: + +.. code-block:: bash + + $sudo dd if=SPL of=/dev/sdX bs=1k seek=1 conv=notrunc; sync + +- Flash the u-boot.img image into the micro SD card: + +.. code-block:: bash + + $sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128 conv=notrunc; sync + +- Jumper settings:: + + SW7: 1 0 1 0 + +where 0 means bottom position and 1 means top position (from the +switch label numbers reference). + +- Connect the USB cable between the EVK and the PC for the console. + The USB console connector is the one close the ethernet connector + +- Insert the micro SD card in the board, power it up and U-Boot messages should come up. diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst index 81c4826beb..c9d7411875 100644 --- a/doc/board/freescale/index.rst +++ b/doc/board/freescale/index.rst @@ -13,3 +13,4 @@ Freescale imx8mq_evk imx8qxp_mek imxrt1020-evk + imxrt1050-evk -- 2.28.0
[PATCH V2 10/12] doc: board: Convert i.MX6 Sabresd README to reST
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan
---
board/freescale/mx6sabresd/README | 114 -
doc/board/freescale/index.rst | 1 +
doc/board/freescale/mx6sabresd.rst | 132 +
3 files changed, 133 insertions(+), 114 deletions(-)
delete mode 100644 board/freescale/mx6sabresd/README
create mode 100644 doc/board/freescale/mx6sabresd.rst
diff --git a/board/freescale/mx6sabresd/README
b/board/freescale/mx6sabresd/README
deleted file mode 100644
index 974b0be175..00
--- a/board/freescale/mx6sabresd/README
+++ /dev/null
@@ -1,114 +0,0 @@
-How to use and build U-Boot on mx6sabresd
--
-
-The following methods can be used for booting mx6sabresd boards:
-
-1. Booting from SD card
-
-2. Booting from eMMC
-
-3. Booting via Falcon mode (SPL launches the kernel directly)
-
-
-1. Booting from SD card via SPL
-
-mx6sabresd_defconfig target supports mx6q/mx6dl/mx6qp sabresd variants.
-
-In order to build it:
-
-$ make mx6sabresd_defconfig
-
-$ make
-
-This will generate the SPL and u-boot-dtb.img binaries.
-
-- Flash the SPL binary into the SD card:
-
-$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 conv=notrunc && sync
-
-- Flash the u-boot-dtb.img binary into the SD card:
-
-$ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 conv=notrunc && sync
-
-
-2. Booting from eMMC
-
-
-$ make mx6sabresd_defconfig
-
-$ make
-
-This will generate the SPL and u-boot-dtb.img binaries.
-
-- Boot first from SD card as shown in the previous section
-
-In U-boot change the eMMC partition config:
-
-=> mmc partconf 2 1 0 0
-
-Mount the eMMC in the host PC:
-
-=> ums 0 mmc 2
-
-- Flash SPL and u-boot-dtb.img binaries into the eMMC:
-
-$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 conv=notrunc && sync
-$ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 conv=notrunc && sync
-
-Set SW6 to eMMC 8-bit boot: 11010110
-
-
-3. Booting via Falcon mode
---
-
-$ make mx6sabresd_defconfig
-$ make
-
-This will generate the SPL image called SPL and the u-boot-dtb.img.
-
-- Flash the SPL image into the SD card:
-
-$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 oflag=sync status=none conv=notrunc
&& sync
-
-- Flash the u-boot-dtb.img image into the SD card:
-
-$ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 oflag=sync status=none
conv=notrunc && sync
-
-Create a partition for root file system and extract it there:
-
-$ sudo tar xvf rootfs.tar.gz -C /media/root
-
-The SD card must have enough space for raw "args" and "kernel".
-To configure Falcon mode for the first time, on U-Boot do the following
commands:
-
-- Setup the IP server:
-
-# setenv serverip
-
-- Download dtb file:
-
-# dhcp ${fdt_addr} imx6q-sabresd.dtb
-
-- Download kernel image:
-
-# dhcp ${loadaddr} uImage
-
-- Write kernel at 2MB offset:
-
-# mmc write ${loadaddr} 0x1000 0x4000
-
-- Setup kernel bootargs:
-
-# setenv bootargs "console=ttymxc0,115200 root=/dev/mmcblk1p1 rootfstype=ext4
rootwait quiet rw"
-
-- Prepare args:
-
-# spl export fdt ${loadaddr} - ${fdt_addr}
-
-- Write args 1MB data (0x800 sectors) to 1MB offset (0x800 sectors)
-
-# mmc write 1800 0x800 0x800
-
-- Press KEY_VOL_UP key, power up the board and then SPL binary will
-launch the kernel directly.
diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst
index cc079cadce..716bb1e3ac 100644
--- a/doc/board/freescale/index.rst
+++ b/doc/board/freescale/index.rst
@@ -15,3 +15,4 @@ Freescale
imxrt1020-evk
imxrt1050-evk
mx6sabreauto
+ mx6sabresd
diff --git a/doc/board/freescale/mx6sabresd.rst
b/doc/board/freescale/mx6sabresd.rst
new file mode 100644
index 00..fe15ba7b79
--- /dev/null
+++ b/doc/board/freescale/mx6sabresd.rst
@@ -0,0 +1,132 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+mx6sabresd
+==
+
+How to use and build U-Boot on mx6sabresd
+-
+
+The following methods can be used for booting mx6sabresd boards:
+
+1. Booting from SD card
+
+2. Booting from eMMC
+
+3. Booting via Falcon mode (SPL launches the kernel directly)
+
+
+1. Booting from SD card via SPL
+---
+
+mx6sabresd_defconfig target supports mx6q/mx6dl/mx6qp sabresd variants.
+
+In order to build it:
+
+.. code-block:: bash
+
+ $ make mx6sabresd_defconfig
+ $ make
+
+This will generate the SPL and u-boot-dtb.img binaries.
+
+- Flash the SPL binary into the SD card:
+
+.. code-block:: bash
+
+ $ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 conv=notrunc && sync
+
+- Flash the u-boot-dtb.img binary into the SD card:
+
+.. code-block:: bash
+
+ $ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 conv=notrunc && sync
+
+2. Booting from eMMC
+
+
+.. code-block:: bash
+
+ $ make mx6sabresd_defconfig
+ $ make
+
+This will generate the SPL
[PATCH V2 06/12] doc: board: Convert i.MX8QXP MEK README to reST
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan --- board/freescale/imx8qxp_mek/README | 50 -- doc/board/freescale/imx8qxp_mek.rst | 66 + doc/board/freescale/index.rst | 1 + 3 files changed, 67 insertions(+), 50 deletions(-) delete mode 100644 board/freescale/imx8qxp_mek/README create mode 100644 doc/board/freescale/imx8qxp_mek.rst diff --git a/board/freescale/imx8qxp_mek/README b/board/freescale/imx8qxp_mek/README deleted file mode 100644 index 6f99d0e13e..00 --- a/board/freescale/imx8qxp_mek/README +++ /dev/null @@ -1,50 +0,0 @@ -U-Boot for the NXP i.MX8QXP EVK board - -Quick Start -=== - -- Build the ARM Trusted firmware binary -- Get scfw_tcm.bin and ahab-container.img -- Build U-Boot -- Flash the binary into the SD card -- Boot - -Get and Build the ARM Trusted firmware -== - -$ git clone https://source.codeaurora.org/external/imx/imx-atf -$ cd imx-atf/ -$ git checkout origin/imx_4.19.35_1.1.0 -b imx_4.19.35_1.1.0 -$ make PLAT=imx8qx bl31 - -Get scfw_tcm.bin and ahab-container.img -== - -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-1.2.7.1.bin -$ chmod +x imx-sc-firmware-1.2.7.1.bin -$ ./imx-sc-firmware-1.2.7.1.bin -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-2.3.1.bin -$ chmod +x imx-seco-2.3.1.bin -$ ./imx-seco-2.3.1.bin - -Copy the following binaries to U-Boot folder: - -$ cp imx-atf/build/imx8qx/release/bl31.bin . -$ cp imx-seco-2.3.1/firmware/seco/mx8qx-ahab-container.img ./ahab-container.img -$ cp imx-sc-firmware-1.2.7.1/mx8qx-mek-scfw-tcm.bin. - -Build U-Boot - -$ make imx8qxp_mek_defconfig -$ make flash.bin - -Flash the binary into the SD card -= - -Burn the flash.bin binary to SD card offset 32KB: - -$ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc - -Boot - -Set Boot switch SW2: 1100. diff --git a/doc/board/freescale/imx8qxp_mek.rst b/doc/board/freescale/imx8qxp_mek.rst new file mode 100644 index 00..215627cfa6 --- /dev/null +++ b/doc/board/freescale/imx8qxp_mek.rst @@ -0,0 +1,66 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8qxp_mek +=== + +U-Boot for the NXP i.MX8QXP EVK board + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +-- + +.. code-block:: bash + + $ git clone https://source.codeaurora.org/external/imx/imx-atf + $ cd imx-atf/ + $ git checkout origin/imx_4.19.35_1.1.0 -b imx_4.19.35_1.1.0 + $ make PLAT=imx8qx bl31 + +Get scfw_tcm.bin and ahab-container.img +--- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-1.2.7.1.bin + $ chmod +x imx-sc-firmware-1.2.7.1.bin + $ ./imx-sc-firmware-1.2.7.1.bin + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-2.3.1.bin + $ chmod +x imx-seco-2.3.1.bin + $ ./imx-seco-2.3.1.bin + +Copy the following binaries to U-Boot folder: + +.. code-block:: bash + + $ cp imx-atf/build/imx8qx/release/bl31.bin . + $ cp imx-seco-2.3.1/firmware/seco/mx8qx-ahab-container.img ./ahab-container.img + $ cp imx-sc-firmware-1.2.7.1/mx8qx-mek-scfw-tcm.bin . + +Build U-Boot + + +.. code-block:: bash + + $ make imx8qxp_mek_defconfig + $ make flash.bin + +Flash the binary into the SD card +- + +Burn the flash.bin binary to SD card offset 32KB: + +.. code-block:: bash + + $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc + +Boot + +Set Boot switch SW2: 1100. diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst index 5c10c95b93..6cd352565f 100644 --- a/doc/board/freescale/index.rst +++ b/doc/board/freescale/index.rst @@ -11,3 +11,4 @@ Freescale imx8mn_evk imx8mp_evk imx8mq_evk + imx8qxp_mek -- 2.28.0
[PATCH V2 12/12] doc: board: Convert i.MX6ULL EVK README to reST
Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Peng Fan --- doc/board/freescale/index.rst | 1 + .../board/freescale/mx6ullevk.rst | 29 +-- 2 files changed, 21 insertions(+), 9 deletions(-) rename board/freescale/mx6ullevk/README => doc/board/freescale/mx6ullevk.rst (66%) diff --git a/doc/board/freescale/index.rst b/doc/board/freescale/index.rst index 046a839a52..313cf409a6 100644 --- a/doc/board/freescale/index.rst +++ b/doc/board/freescale/index.rst @@ -17,3 +17,4 @@ Freescale mx6sabreauto mx6sabresd mx6ul_14x14_evk + mx6ullevk diff --git a/board/freescale/mx6ullevk/README b/doc/board/freescale/mx6ullevk.rst similarity index 66% rename from board/freescale/mx6ullevk/README rename to doc/board/freescale/mx6ullevk.rst index 47a35f61a2..a26248a1e3 100644 --- a/board/freescale/mx6ullevk/README +++ b/doc/board/freescale/mx6ullevk.rst @@ -1,26 +1,37 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +mx6ullevk += + How to use U-Boot on Freescale MX6ULL 14x14 EVK --- +--- - First make sure you have installed the dtc package (device tree compiler): -$ sudo apt-get install device-tree-compiler +.. code-block:: bash + + $ sudo apt-get install device-tree-compiler - Build U-Boot for MX6ULL 14x14 EVK: -$ make mrproper -$ make mx6ull_14x14_evk_defconfig -$ make +.. code-block:: bash + + $ make mrproper + $ make mx6ull_14x14_evk_defconfig + $ make This generates the u-boot-dtb.imx image in the current directory. - Flash the u-boot-dtb.imx image into the micro SD card: -$ sudo dd if=u-boot-dtb.imx of=/dev/sdb bs=1K seek=1 conv=notrunc && sync +.. code-block:: bash + + $ sudo dd if=u-boot-dtb.imx of=/dev/sdb bs=1K seek=1 conv=notrunc && sync -- Jumper settings: +- Jumper settings:: -SW601: 0 0 1 0 -Sw602: 1 0 + SW601: 0 0 1 0 + Sw602: 1 0 Where 0 means bottom position and 1 means top position (from the switch label numbers reference). -- 2.28.0
[PATCH] spi: zynq_spi: Use clk subsystem to get reference spi clk
From: T Karthik Reddy
Remove fixed reference clk used by plat->frequency and use clk
subsystem to get reference clk. As per spi dt bindings
"spi-max-frequency" property should be used by the slave devices.
This property is read by spi-uclass driver for the slave device.
So avoid reading above property from the platform driver.
Signed-off-by: T Karthik Reddy
Signed-off-by: Michal Simek
---
drivers/spi/zynq_spi.c | 34 +++---
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index 9923931e36ec..c26df182f6ba 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -79,17 +80,10 @@ static int zynq_spi_ofdata_to_platdata(struct udevice *bus)
plat->regs = dev_read_addr_ptr(bus);
- /* FIXME: Use 250MHz as a suitable default */
- plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
- 25000);
plat->deactivate_delay_us = fdtdec_get_int(blob, node,
"spi-deactivate-delay", 0);
plat->activate_delay_us = fdtdec_get_int(blob, node,
"spi-activate-delay", 0);
- plat->speed_hz = plat->frequency / 2;
-
- debug("%s: regs=%p max-frequency=%d\n", __func__,
- plat->regs, plat->frequency);
return 0;
}
@@ -128,13 +122,39 @@ static int zynq_spi_probe(struct udevice *bus)
{
struct zynq_spi_platdata *plat = dev_get_platdata(bus);
struct zynq_spi_priv *priv = dev_get_priv(bus);
+ struct clk clk;
+ unsigned long clock;
+ int ret;
priv->regs = plat->regs;
priv->fifo_depth = ZYNQ_SPI_FIFO_DEPTH;
+ ret = clk_get_by_name(bus, "ref_clk", );
+ if (ret < 0) {
+ dev_err(dev, "failed to get clock\n");
+ return ret;
+ }
+
+ clock = clk_get_rate();
+ if (IS_ERR_VALUE(clock)) {
+ dev_err(dev, "failed to get rate\n");
+ return clock;
+ }
+
+ ret = clk_enable();
+ if (ret && ret != -ENOSYS) {
+ dev_err(dev, "failed to enable clock\n");
+ return ret;
+ }
+
/* init the zynq spi hw */
zynq_spi_init_hw(priv);
+ plat->frequency = clock;
+ plat->speed_hz = plat->frequency / 2;
+
+ debug("%s: max-frequency=%d\n", __func__, plat->speed_hz);
+
return 0;
}
--
2.28.0
[PATCH 21/33] mailbox: stm32-ipcc: migrate trace to dev and log macro
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay
---
drivers/mailbox/stm32-ipcc.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbox/stm32-ipcc.c
index 81a4115986..990b853d34 100644
--- a/drivers/mailbox/stm32-ipcc.c
+++ b/drivers/mailbox/stm32-ipcc.c
@@ -3,6 +3,8 @@
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
*/
+#define LOG_CATEGORY UCLASS_MAILBOX
+
#include
#include
#include
@@ -44,11 +46,11 @@ static int stm32_ipcc_request(struct mbox_chan *chan)
{
struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
- debug("%s(chan=%p)\n", __func__, chan);
+ dev_dbg(chan->dev, "chan=%p\n", chan);
if (chan->id >= ipcc->n_chans) {
- debug("%s failed to request channel: %ld\n",
- __func__, chan->id);
+ dev_dbg(chan->dev, "failed to request channel: %ld\n",
+ chan->id);
return -EINVAL;
}
@@ -57,7 +59,7 @@ static int stm32_ipcc_request(struct mbox_chan *chan)
static int stm32_ipcc_free(struct mbox_chan *chan)
{
- debug("%s(chan=%p)\n", __func__, chan);
+ dev_dbg(chan->dev, "chan=%p\n", chan);
return 0;
}
@@ -66,7 +68,7 @@ static int stm32_ipcc_send(struct mbox_chan *chan, const void
*data)
{
struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
- debug("%s(chan=%p, data=%p)\n", __func__, chan, data);
+ dev_dbg(chan->dev, "chan=%p, data=%p\n", chan, data);
if (readl(ipcc->reg_proc + IPCC_XTOYSR) & BIT(chan->id))
return -EBUSY;
@@ -83,7 +85,7 @@ static int stm32_ipcc_recv(struct mbox_chan *chan, void *data)
u32 val;
int proc_offset;
- debug("%s(chan=%p, data=%p)\n", __func__, chan, data);
+ dev_dbg(chan->dev, "chan=%p, data=%p\n", chan, data);
/* read 'channel occupied' status from other proc */
proc_offset = ipcc->proc_id ? -IPCC_PROC_OFFST : IPCC_PROC_OFFST;
@@ -104,7 +106,7 @@ static int stm32_ipcc_probe(struct udevice *dev)
struct clk clk;
int ret;
- debug("%s(dev=%p)\n", __func__, dev);
+ dev_dbg(dev, "\n");
addr = dev_read_addr(dev);
if (addr == FDT_ADDR_T_NONE)
--
2.17.1
[PATCH 23/33] phy: stm32-usbphyc: migrate trace to dev and log macro
Change pr_debug to log_debug or dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay
---
drivers/phy/phy-stm32-usbphyc.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
index 9d4296d649..2b69514b3a 100644
--- a/drivers/phy/phy-stm32-usbphyc.c
+++ b/drivers/phy/phy-stm32-usbphyc.c
@@ -3,6 +3,8 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
+#define LOG_CATEGORY UCLASS_PHY
+
#include
#include
#include
@@ -97,8 +99,8 @@ static int stm32_usbphyc_pll_init(struct stm32_usbphyc
*usbphyc)
u32 usbphyc_pll;
if ((clk_rate < PLL_INFF_MIN_RATE) || (clk_rate > PLL_INFF_MAX_RATE)) {
- pr_debug("%s: input clk freq (%dHz) out of range\n",
-__func__, clk_rate);
+ log_debug("input clk freq (%dHz) out of range\n",
+ clk_rate);
return -EINVAL;
}
@@ -115,8 +117,8 @@ static int stm32_usbphyc_pll_init(struct stm32_usbphyc
*usbphyc)
writel(usbphyc_pll, usbphyc->base + STM32_USBPHYC_PLL);
- pr_debug("%s: input clk freq=%dHz, ndiv=%d, frac=%d\n", __func__,
-clk_rate, pll_params.ndiv, pll_params.frac);
+ log_debug("input clk freq=%dHz, ndiv=%d, frac=%d\n",
+ clk_rate, pll_params.ndiv, pll_params.frac);
return 0;
}
@@ -153,7 +155,7 @@ static int stm32_usbphyc_phy_init(struct phy *phy)
true : false;
int ret;
- pr_debug("%s phy ID = %lu\n", __func__, phy->id);
+ dev_dbg(phy->dev, "phy ID = %lu\n", phy->id);
/* Check if one phy port has already configured the pll */
if (pllen && stm32_usbphyc_is_init(usbphyc))
goto initialized;
@@ -199,7 +201,7 @@ static int stm32_usbphyc_phy_exit(struct phy *phy)
struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id;
int ret;
- pr_debug("%s phy ID = %lu\n", __func__, phy->id);
+ dev_dbg(phy->dev, "phy ID = %lu\n", phy->id);
usbphyc_phy->init = false;
/* Check if other phy port requires pllen */
@@ -238,7 +240,7 @@ static int stm32_usbphyc_phy_power_on(struct phy *phy)
struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id;
int ret;
- pr_debug("%s phy ID = %lu\n", __func__, phy->id);
+ dev_dbg(phy->dev, "phy ID = %lu\n", phy->id);
if (usbphyc_phy->vdd) {
ret = regulator_set_enable(usbphyc_phy->vdd, true);
if (ret)
@@ -256,7 +258,7 @@ static int stm32_usbphyc_phy_power_off(struct phy *phy)
struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id;
int ret;
- pr_debug("%s phy ID = %lu\n", __func__, phy->id);
+ dev_dbg(phy->dev, "phy ID = %lu\n", phy->id);
usbphyc_phy->powered = false;
if (stm32_usbphyc_is_powered(usbphyc))
--
2.17.1
[PATCH 22/33] i2c: stm32f7_i2c: migrate trace to dev and log macro
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay
---
drivers/i2c/stm32f7_i2c.c | 74 +++
1 file changed, 37 insertions(+), 37 deletions(-)
diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index 2f60911549..a407cc02ab 100644
--- a/drivers/i2c/stm32f7_i2c.c
+++ b/drivers/i2c/stm32f7_i2c.c
@@ -3,6 +3,8 @@
* (C) Copyright 2017 STMicroelectronics
*/
+#define LOG_CATEGORY UCLASS_I2C
+
#include
#include
#include
@@ -11,10 +13,10 @@
#include
#include
#include
+#include
+#include
#include
#include
-
-#include
#include
#include
@@ -346,7 +348,7 @@ static int stm32_i2c_wait_flags(struct stm32_i2c_priv
*i2c_priv,
*status = readl(>isr);
while (!(*status & flags)) {
if (get_timer(time_start) > CONFIG_SYS_HZ) {
- debug("%s: i2c timeout\n", __func__);
+ log_debug("i2c timeout\n");
return -ETIMEDOUT;
}
@@ -369,7 +371,7 @@ static int stm32_i2c_check_end_of_message(struct
stm32_i2c_priv *i2c_priv)
return ret;
if (status & STM32_I2C_ISR_BERR) {
- debug("%s: Bus error\n", __func__);
+ log_debug("Bus error\n");
/* Clear BERR flag */
setbits_le32(>icr, STM32_I2C_ICR_BERRCF);
@@ -378,7 +380,7 @@ static int stm32_i2c_check_end_of_message(struct
stm32_i2c_priv *i2c_priv)
}
if (status & STM32_I2C_ISR_ARLO) {
- debug("%s: Arbitration lost\n", __func__);
+ log_debug("Arbitration lost\n");
/* Clear ARLO flag */
setbits_le32(>icr, STM32_I2C_ICR_ARLOCF);
@@ -387,7 +389,7 @@ static int stm32_i2c_check_end_of_message(struct
stm32_i2c_priv *i2c_priv)
}
if (status & STM32_I2C_ISR_NACKF) {
- debug("%s: Receive NACK\n", __func__);
+ log_debug("Receive NACK\n");
/* Clear NACK flag */
setbits_le32(>icr, STM32_I2C_ICR_NACKCF);
@@ -535,8 +537,8 @@ static int stm32_i2c_compute_solutions(struct
stm32_i2c_setup *setup,
if (sdadel_max < 0)
sdadel_max = 0;
- debug("%s: SDADEL(min/max): %i/%i, SCLDEL(Min): %i\n", __func__,
- sdadel_min, sdadel_max, scldel_min);
+ log_debug("SDADEL(min/max): %i/%i, SCLDEL(Min): %i\n",
+ sdadel_min, sdadel_max, scldel_min);
/* Compute possible values for PRESC, SCLDEL and SDADEL */
for (p = 0; p < STM32_PRESC_MAX; p++) {
@@ -572,7 +574,7 @@ static int stm32_i2c_compute_solutions(struct
stm32_i2c_setup *setup,
}
if (list_empty(solutions)) {
- pr_err("%s: no Prescaler solution\n", __func__);
+ log_err("no Prescaler solution\n");
ret = -EPERM;
}
@@ -656,7 +658,7 @@ static int stm32_i2c_choose_solution(struct stm32_i2c_setup
*setup,
}
if (!sol_found) {
- pr_err("%s: no solution at all\n", __func__);
+ log_err("no solution at all\n");
ret = -EPERM;
}
@@ -686,23 +688,22 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv
*i2c_priv,
specs = get_specs(setup->speed_freq);
if (specs == ERR_PTR(-EINVAL)) {
- pr_err("%s: speed out of bound {%d}\n", __func__,
- setup->speed_freq);
+ log_err("speed out of bound {%d}\n",
+ setup->speed_freq);
return -EINVAL;
}
if (setup->rise_time > specs->rise_max ||
setup->fall_time > specs->fall_max) {
- pr_err("%s :timings out of bound Rise{%d>%d}/Fall{%d>%d}\n",
- __func__,
- setup->rise_time, specs->rise_max,
- setup->fall_time, specs->fall_max);
+ log_err("timings out of bound Rise{%d>%d}/Fall{%d>%d}\n",
+ setup->rise_time, specs->rise_max,
+ setup->fall_time, specs->fall_max);
return -EINVAL;
}
if (setup->dnf > STM32_I2C_DNF_MAX) {
- pr_err("%s: DNF out of bound %d/%d\n", __func__,
- setup->dnf, STM32_I2C_DNF_MAX);
+ log_err("DNF out of bound %d/%d\n",
+ setup->dnf, STM32_I2C_DNF_MAX);
return -EINVAL;
}
@@ -715,10 +716,10 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv
*i2c_priv,
if (ret)
goto exit;
- debug("%s: Presc: %i, scldel: %i, sdadel: %i, scll: %i, sclh: %i\n",
- __func__, output->presc,
- output->scldel, output->sdadel,
- output->scll, output->sclh);
+
[PATCH 20/33] reset: stm32-reset: migrate trace to dev and log macro
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed).
Signed-off-by: Patrick Delaunay
---
drivers/reset/stm32-reset.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c
index 64a11cfcfc..c3af06c6f5 100644
--- a/drivers/reset/stm32-reset.c
+++ b/drivers/reset/stm32-reset.c
@@ -4,6 +4,8 @@
* Author(s): Patrice Chotard, for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_RESET
+
#include
#include
#include
@@ -12,6 +14,7 @@
#include
#include
#include
+#include
#include
/* reset clear offset for STM32MP RCC */
@@ -36,8 +39,9 @@ static int stm32_reset_assert(struct reset_ctl *reset_ctl)
struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
int offset = reset_ctl->id % BITS_PER_LONG;
- debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
- reset_ctl->id, bank, offset);
+
+ dev_dbg(reset_ctl->dev, "reset id = %ld bank = %d offset = %d)\n",
+ reset_ctl->id, bank, offset);
if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
/* reset assert is done in rcc set register */
@@ -53,8 +57,9 @@ static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
int offset = reset_ctl->id % BITS_PER_LONG;
- debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
- reset_ctl->id, bank, offset);
+
+ dev_dbg(reset_ctl->dev, "reset id = %ld bank = %d offset = %d)\n",
+ reset_ctl->id, bank, offset);
if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
/* reset deassert is done in rcc clr register */
--
2.17.1
[PATCH 29/33] video: stm32_ltdc: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.
Signed-off-by: Patrick Delaunay
---
drivers/video/stm32/stm32_ltdc.c | 33 +---
1 file changed, 18 insertions(+), 15 deletions(-)
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 7fff735930..c5c990cc73 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -5,6 +5,8 @@
* Yannick Fertre for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_VIDEO
+
#include
#include
#include
@@ -176,13 +178,13 @@ static u32 stm32_ltdc_get_pixel_format(enum
video_log2_bpp l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
- pr_warn("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+ log_warning("warning %dbpp not supported yet, %dbpp instead\n",
+ VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
- debug("%s: %d bpp -> ltdc pf %d\n", __func__, VNBITS(l2bpp), pf);
+ log_debug("%d bpp -> ltdc pf %d\n", VNBITS(l2bpp), pf);
return (u32)pf;
}
@@ -249,7 +251,7 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv
*priv,
/* Signal polarities */
val = 0;
- debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+ log_debug("timing->flags 0x%08x\n", timings->flags);
if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
@@ -379,8 +381,8 @@ static int stm32_ltdc_probe(struct udevice *dev)
dev_warn(dev, "fail to set pixel clock %d hz\n",
timings.pixelclock.typ);
- debug("%s: Set pixel clock req %d hz get %ld hz\n", __func__,
- timings.pixelclock.typ, clk_get_rate());
+ dev_dbg(dev, "Set pixel clock req %d hz get %ld hz\n",
+ timings.pixelclock.typ, clk_get_rate());
ret = reset_get_by_index(dev, 0, );
if (ret) {
@@ -394,12 +396,13 @@ static int stm32_ltdc_probe(struct udevice *dev)
if (IS_ENABLED(CONFIG_VIDEO_BRIDGE)) {
ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, );
if (ret)
- debug("No video bridge, or no backlight on bridge\n");
+ dev_dbg(dev,
+ "No video bridge, or no backlight on bridge\n");
if (bridge) {
ret = video_bridge_attach(bridge);
if (ret) {
- dev_err(dev, "fail to attach bridge\n");
+ dev_err(bridge, "fail to attach bridge\n");
return ret;
}
}
@@ -414,12 +417,12 @@ static int stm32_ltdc_probe(struct udevice *dev)
priv->crop_h = timings.vactive.typ;
priv->alpha = 0xFF;
- debug("%s: %dx%d %dbpp frame buffer at 0x%lx\n", __func__,
- timings.hactive.typ, timings.vactive.typ,
- VNBITS(priv->l2bpp), uc_plat->base);
- debug("%s: crop %d,%d %dx%d bg 0x%08x alpha %d\n", __func__,
- priv->crop_x, priv->crop_y, priv->crop_w, priv->crop_h,
- priv->bg_col_argb, priv->alpha);
+ dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
+ timings.hactive.typ, timings.vactive.typ,
+ VNBITS(priv->l2bpp), uc_plat->base);
+ dev_dbg(dev, "crop %d,%d %dx%d bg 0x%08x alpha %d\n",
+ priv->crop_x, priv->crop_y, priv->crop_w, priv->crop_h,
+ priv->bg_col_argb, priv->alpha);
/* Configure & start LTDC */
stm32_ltdc_set_mode(priv, );
@@ -457,7 +460,7 @@ static int stm32_ltdc_bind(struct udevice *dev)
uc_plat->size = CONFIG_VIDEO_STM32_MAX_XRES *
CONFIG_VIDEO_STM32_MAX_YRES *
(CONFIG_VIDEO_STM32_MAX_BPP >> 3);
- debug("%s: frame buffer max size %d bytes\n", __func__, uc_plat->size);
+ dev_dbg(dev, "frame buffer max size %d bytes\n", uc_plat->size);
return 0;
}
--
2.17.1
[PATCH 25/33] spi: stm32_qspi: migrate trace to dev and log macro
Change debug/pr_* to log_* or dev_* macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay
---
drivers/spi/stm32_qspi.c | 46 ++--
1 file changed, 25 insertions(+), 21 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index a53b941410..d46adcb19a 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -7,6 +7,8 @@
* STM32 QSPI driver
*/
+#define LOG_CATEGORY UCLASS_SPI
+
#include
#include
#include
@@ -136,7 +138,7 @@ static int _stm32_qspi_wait_for_not_busy(struct
stm32_qspi_priv *priv)
!(sr & STM32_QSPI_SR_BUSY),
STM32_BUSY_TIMEOUT_US);
if (ret)
- pr_err("busy timeout (stat:%#x)\n", sr);
+ log_err("busy timeout (stat:%#x)\n", sr);
return ret;
}
@@ -154,9 +156,9 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv
*priv,
sr & STM32_QSPI_SR_TCF,
STM32_QSPI_CMD_TIMEOUT_US);
if (ret) {
- pr_err("cmd timeout (stat:%#x)\n", sr);
+ log_err("cmd timeout (stat:%#x)\n", sr);
} else if (readl(>regs->sr) & STM32_QSPI_SR_TEF) {
- pr_err("transfer error (stat:%#x)\n", sr);
+ log_err("transfer error (stat:%#x)\n", sr);
ret = -EIO;
}
@@ -198,7 +200,7 @@ static int _stm32_qspi_poll(struct stm32_qspi_priv *priv,
sr & STM32_QSPI_SR_FTF,
STM32_QSPI_FIFO_TIMEOUT_US);
if (ret) {
- pr_err("fifo timeout (len:%d stat:%#x)\n", len, sr);
+ log_err("fifo timeout (len:%d stat:%#x)\n", len, sr);
return ret;
}
@@ -246,10 +248,10 @@ static int stm32_qspi_exec_op(struct spi_slave *slave,
u8 mode = STM32_QSPI_CCR_IND_WRITE;
int timeout, ret;
- debug("%s: cmd:%#x mode:%d.%d.%d.%d addr:%#llx len:%#x\n",
- __func__, op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth,
- op->dummy.buswidth, op->data.buswidth,
- op->addr.val, op->data.nbytes);
+ dev_dbg(slave->dev, "cmd:%#x mode:%d.%d.%d.%d addr:%#llx len:%#x\n",
+ op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth,
+ op->dummy.buswidth, op->data.buswidth,
+ op->addr.val, op->data.nbytes);
ret = _stm32_qspi_wait_for_not_busy(priv);
if (ret)
@@ -320,7 +322,7 @@ abort:
writel(STM32_QSPI_FCR_CTCF, >regs->fcr);
if (ret || timeout)
- pr_err("%s ret:%d abort timeout:%d\n", __func__, ret, timeout);
+ dev_err(slave->dev, "ret:%d abort timeout:%d\n", ret, timeout);
return ret;
}
@@ -353,8 +355,8 @@ static int stm32_qspi_probe(struct udevice *bus)
if (priv->mm_size > STM32_QSPI_MAX_MMAP_SZ)
return -EINVAL;
- debug("%s: regs=<0x%p> mapped=<0x%p> mapped_size=<0x%lx>\n",
- __func__, priv->regs, priv->mm_base, priv->mm_size);
+ dev_dbg(bus, "regs=<0x%p> mapped=<0x%p> mapped_size=<0x%lx>\n",
+ priv->regs, priv->mm_base, priv->mm_size);
ret = clk_get_by_index(bus, 0, );
if (ret < 0)
@@ -475,8 +477,8 @@ static int stm32_qspi_set_speed(struct udevice *bus, uint
speed)
STM32_QSPI_DCR_CSHT_MASK << STM32_QSPI_DCR_CSHT_SHIFT,
csht << STM32_QSPI_DCR_CSHT_SHIFT);
- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs,
- (qspi_clk / (prescaler + 1)));
+ dev_dbg(bus, "regs=%p, speed=%d\n", priv->regs,
+ (qspi_clk / (prescaler + 1)));
return 0;
}
@@ -485,6 +487,7 @@ static int stm32_qspi_set_mode(struct udevice *bus, uint
mode)
{
struct stm32_qspi_priv *priv = dev_get_priv(bus);
int ret;
+ const char *str_rx, *str_tx;
ret = _stm32_qspi_wait_for_not_busy(priv);
if (ret)
@@ -500,21 +503,22 @@ static int stm32_qspi_set_mode(struct udevice *bus, uint
mode)
if (mode & SPI_CS_HIGH)
return -ENODEV;
- debug("%s: regs=%p, mode=%d rx: ", __func__, priv->regs, mode);
-
if (mode & SPI_RX_QUAD)
- debug("quad, tx: ");
+ str_rx = "quad";
else if (mode & SPI_RX_DUAL)
- debug("dual, tx: ");
+ str_rx = "dual";
else
- debug("single, tx: ");
+ str_rx = "single";
if (mode & SPI_TX_QUAD)
- debug("quad\n");
+ str_tx = "quad";
else if (mode & SPI_TX_DUAL)
- debug("dual\n");
+ str_tx = "dual";
else
- debug("single\n");
+
[PATCH 26/33] mtd: stm32_fmc2: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.
Signed-off-by: Patrick Delaunay
---
drivers/mtd/nand/raw/stm32_fmc2_nand.c | 40 --
1 file changed, 19 insertions(+), 21 deletions(-)
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 47fe61090d..9624583b8c 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -4,12 +4,15 @@
* Author: Christophe Kerello
*/
+#define LOG_CATEGORY UCLASS_MTD
+
#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -324,7 +327,7 @@ static int stm32_fmc2_nfc_ham_calculate(struct mtd_info
*mtd, const u8 *data,
ret = readl_poll_timeout(nfc->io_base + FMC2_SR, sr,
sr & FMC2_SR_NWRF, FMC2_TIMEOUT_5S);
if (ret < 0) {
- pr_err("Ham timeout\n");
+ log_err("Ham timeout\n");
return ret;
}
@@ -409,7 +412,7 @@ static int stm32_fmc2_nfc_bch_calculate(struct mtd_info
*mtd, const u8 *data,
ret = readl_poll_timeout(nfc->io_base + FMC2_BCHISR, bchisr,
bchisr & FMC2_BCHISR_EPBRF, FMC2_TIMEOUT_5S);
if (ret < 0) {
- pr_err("Bch timeout\n");
+ log_err("Bch timeout\n");
return ret;
}
@@ -457,7 +460,7 @@ static int stm32_fmc2_nfc_bch_correct(struct mtd_info *mtd,
u8 *dat,
ret = readl_poll_timeout(nfc->io_base + FMC2_BCHISR, bchisr,
bchisr & FMC2_BCHISR_DERF, FMC2_TIMEOUT_5S);
if (ret < 0) {
- pr_err("Bch timeout\n");
+ log_err("Bch timeout\n");
return ret;
}
@@ -795,26 +798,24 @@ static int stm32_fmc2_nfc_parse_child(struct
stm32_fmc2_nfc *nfc, ofnode node)
nand->ncs /= sizeof(u32);
if (!nand->ncs) {
- pr_err("Invalid reg property size\n");
+ log_err("Invalid reg property size\n");
return -EINVAL;
}
ret = ofnode_read_u32_array(node, "reg", cs, nand->ncs);
if (ret < 0) {
- pr_err("Could not retrieve reg property\n");
+ log_err("Could not retrieve reg property\n");
return -EINVAL;
}
for (i = 0; i < nand->ncs; i++) {
if (cs[i] >= FMC2_MAX_CE) {
- pr_err("Invalid reg value: %d\n",
- nand->cs_used[i]);
+ log_err("Invalid reg value: %d\n", nand->cs_used[i]);
return -EINVAL;
}
if (nfc->cs_assigned & BIT(cs[i])) {
- pr_err("Cs already assigned: %d\n",
- nand->cs_used[i]);
+ log_err("Cs already assigned: %d\n", nand->cs_used[i]);
return -EINVAL;
}
@@ -837,12 +838,12 @@ static int stm32_fmc2_nfc_parse_dt(struct udevice *dev,
nchips++;
if (!nchips) {
- pr_err("NAND chip not defined\n");
+ log_err("NAND chip not defined\n");
return -EINVAL;
}
if (nchips > 1) {
- pr_err("Too many NAND chips defined\n");
+ log_err("Too many NAND chips defined\n");
return -EINVAL;
}
@@ -918,24 +919,21 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev)
addr = dev_read_addr_index(dev, mem_region);
if (addr == FDT_ADDR_T_NONE) {
- pr_err("Resource data_base not found for cs%d",
- chip_cs);
+ dev_err(dev, "Resource data_base not found for cs%d",
chip_cs);
return ret;
}
nfc->data_base[chip_cs] = addr;
addr = dev_read_addr_index(dev, mem_region + 1);
if (addr == FDT_ADDR_T_NONE) {
- pr_err("Resource cmd_base not found for cs%d",
- chip_cs);
+ dev_err(dev, "Resource cmd_base not found for cs%d",
chip_cs);
return ret;
}
nfc->cmd_base[chip_cs] = addr;
addr = dev_read_addr_index(dev, mem_region + 2);
if (addr == FDT_ADDR_T_NONE) {
- pr_err("Resource addr_base not found for cs%d",
- chip_cs);
+ dev_err(dev, "Resource addr_base not found for cs%d",
chip_cs);
return ret;
}
nfc->addr_base[chip_cs] = addr;
@@ -985,14 +983,14 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev)
* ECC sector size = 512
*/
if (chip->ecc.mode != NAND_ECC_HW) {
- pr_err("Nand_ecc_mode is not
[PATCH 30/33] video: stm32_dsi: migrate trace to dev and log macro
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.
Signed-off-by: Patrick Delaunay
---
drivers/video/stm32/stm32_dsi.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index 9d5abacc2b..dcec0edafc 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -8,6 +8,8 @@
* drivers/gpu/drm/stm/dw_mipi_dsi-stm.c.
*/
+#define LOG_CATEGORY UCLASS_VIDEO_BRIDGE
+
#include
#include
#include
@@ -133,7 +135,7 @@ static enum dsi_color dsi_color_from_mipi(u32 fmt)
case MIPI_DSI_FMT_RGB565:
return DSI_RGB565_CONF1;
default:
- pr_err("MIPI color invalid, so we use rgb888\n");
+ log_err("MIPI color invalid, so we use rgb888\n");
}
return DSI_RGB888;
}
@@ -213,14 +215,14 @@ static int dsi_phy_init(void *priv_data)
u32 val;
int ret;
- debug("Initialize DSI physical layer\n");
+ dev_dbg(dev, "Initialize DSI physical layer\n");
/* Enable the regulator */
dsi_set(dsi, DSI_WRPCR, WRPCR_REGEN | WRPCR_BGREN);
ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_RRS,
TIMEOUT_US);
if (ret) {
- debug("!TIMEOUT! waiting REGU\n");
+ dev_dbg(dev, "!TIMEOUT! waiting REGU\n");
return ret;
}
@@ -229,7 +231,7 @@ static int dsi_phy_init(void *priv_data)
ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_PLLLS,
TIMEOUT_US);
if (ret) {
- debug("!TIMEOUT! waiting PLL\n");
+ dev_dbg(dev, "!TIMEOUT! waiting PLL\n");
return ret;
}
@@ -242,8 +244,8 @@ static void dsi_phy_post_set_mode(void *priv_data, unsigned
long mode_flags)
struct udevice *dev = device->dev;
struct stm32_dsi_priv *dsi = dev_get_priv(dev);
- debug("Set mode %p enable %ld\n", dsi,
- mode_flags & MIPI_DSI_MODE_VIDEO);
+ dev_dbg(dev, "Set mode %p enable %ld\n", dsi,
+ mode_flags & MIPI_DSI_MODE_VIDEO);
if (!dsi)
return;
@@ -325,8 +327,8 @@ static int dsi_get_lane_mbps(void *priv_data, struct
display_timing *timings,
*lane_mbps = pll_out_khz / 1000;
- debug("pll_in %ukHz pll_out %ukHz lane_mbps %uMHz\n",
- pll_in_khz, pll_out_khz, *lane_mbps);
+ dev_dbg(dev, "pll_in %ukHz pll_out %ukHz lane_mbps %uMHz\n",
+ pll_in_khz, pll_out_khz, *lane_mbps);
return 0;
}
--
2.17.1
[PATCH 28/33] serial: stm32: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay --- drivers/serial/serial_stm32.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index cab0db2c96..f5450f4ea9 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -4,6 +4,8 @@ * Author(s): Vikas Manocha, for STMicroelectronics. */ +#define LOG_CATEGORY UCLASS_SERIAL + #include #include #include @@ -13,6 +15,7 @@ #include #include #include +#include #include #include #include "serial_stm32.h" -- 2.17.1
[PATCH] cmd: Add a 'misc' command to access miscellaneous devices
From: Bin Meng
Enable the command "misc" for accessing miscellaneous devices with
a MISC uclass driver. The command provides listing all MISC devices
as well as read and write functionalities via their drivers.
Signed-off-by: Bin Meng
---
This patch depends on
http://patchwork.ozlabs.org/project/uboot/list/?series=207559
cmd/Kconfig | 8
cmd/Makefile | 1 +
cmd/misc.c | 134 +++
3 files changed, 143 insertions(+)
create mode 100644 cmd/misc.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d4427a7..257d548 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1025,6 +1025,14 @@ config CMD_LSBLK
Print list of available block device drivers, and for each, the list
of known block devices.
+config CMD_MISC
+ bool "misc"
+ depends on MISC
+ help
+ Enable the command "misc" for accessing miscellaneous devices with
+ a MISC uclass driver. The command provides listing all MISC devices
+ as well as read and write functionalities via their drivers.
+
config CMD_MMC
bool "mmc"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index c536a3e..4b46798 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -94,6 +94,7 @@ obj-$(CONFIG_CMD_MEMORY) += mem.o
obj-$(CONFIG_CMD_IO) += io.o
obj-$(CONFIG_CMD_MFSL) += mfsl.o
obj-$(CONFIG_CMD_MII) += mii.o
+obj-$(CONFIG_CMD_MISC) += misc.o
obj-$(CONFIG_CMD_MDIO) += mdio.o
obj-$(CONFIG_CMD_SLEEP) += sleep.o
obj-$(CONFIG_CMD_MMC) += mmc.o
diff --git a/cmd/misc.c b/cmd/misc.c
new file mode 100644
index 000..653deed
--- /dev/null
+++ b/cmd/misc.c
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020 Wind River Systems, Inc.
+ *
+ * Author:
+ * Bin Meng
+ *
+ * A command interface to access misc devices with MISC uclass driver APIs.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+enum misc_op {
+ MISC_OP_READ,
+ MISC_OP_WRITE
+};
+
+static char *misc_op_str[] = {
+ "read",
+ "write"
+};
+
+static int do_misc_list(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[])
+{
+ struct udevice *dev;
+
+ printf("Device Index Driver\n");
+ printf("-\n");
+ for (uclass_first_device(UCLASS_MISC, );
+dev;
+uclass_next_device()) {
+ printf("%-20s %5d %10s\n", dev->name, dev->seq,
+ dev->driver->name);
+ }
+
+ return 0;
+}
+
+static int do_misc_op(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[], enum misc_op op)
+{
+ int (*misc_op)(struct udevice *, int, void *, int);
+ struct udevice *dev;
+ int offset;
+ void *buf;
+ int size;
+ int ret;
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, argv[0], );
+ if (ret) {
+ printf("Unable to find device %s\n", argv[0]);
+ return ret;
+ }
+
+ offset = simple_strtoul(argv[1], NULL, 16);
+ buf = (void *)simple_strtoul(argv[2], NULL, 16);
+ size = simple_strtoul(argv[3], NULL, 16);
+
+ if (op == MISC_OP_READ)
+ misc_op = misc_read;
+ else
+ misc_op = misc_write;
+
+ ret = misc_op(dev, offset, buf, size);
+ if (ret < 0) {
+ if (ret == -ENOSYS) {
+ printf("The device does not support %s\n",
+ misc_op_str[op]);
+ ret = 0;
+ }
+ } else {
+ if (ret == size)
+ ret = 0;
+ else
+ printf("Partially %s %d bytes\n", misc_op_str[op], ret);
+ }
+
+ return ret;
+}
+
+static int do_misc_read(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[])
+{
+ return do_misc_op(cmdtp, flag, argc, argv, MISC_OP_READ);
+}
+
+static int do_misc_write(struct cmd_tbl *cmdtp, int flag,
+int argc, char *const argv[])
+{
+ return do_misc_op(cmdtp, flag, argc, argv, MISC_OP_WRITE);
+}
+
+static struct cmd_tbl misc_commands[] = {
+ U_BOOT_CMD_MKENT(list, 0, 1, do_misc_list, "", ""),
+ U_BOOT_CMD_MKENT(read, 4, 1, do_misc_read, "", ""),
+ U_BOOT_CMD_MKENT(write, 4, 1, do_misc_write, "", ""),
+};
+
+static int do_misc(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[])
+{
+ struct cmd_tbl *misc_cmd;
+ int ret;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+ misc_cmd = find_cmd_tbl(argv[1], misc_commands,
+ ARRAY_SIZE(misc_commands));
+ argc -= 2;
+ argv += 2;
+ if (!misc_cmd || argc != misc_cmd->maxargs)
+ return CMD_RET_USAGE;
+
+ ret = misc_cmd->cmd(misc_cmd, flag, argc, argv);
+
+ return
Re: [PATCH v9] usb: add MediaTek USB3 DRD driver
On 10/14/20 2:29 PM, Chunfeng Yun wrote: > On Wed, 2020-10-14 at 12:56 +0200, Marek Vasut wrote: >> On 10/14/20 10:50 AM, Chunfeng Yun wrote: >>> This patch adds support for the MediaTek USB3 DRD controller, >>> its host side is based on xHCI, this driver supports device mode >>> and host mode. >> >> This patch doesn't seem to apply to u-boot-usb/next , and also, >> u-boot-usb/next does not build: > > There is error: > aarch64: + mt8512_bm1_emmc > +aarch64-linux-ld.bfd: drivers/usb/gadget/udc/built-in.o: in function > `usb_gadget_handle_interrupts': > +drivers/usb/gadget/udc/udc-uclass.c:56: undefined reference to > `dm_usb_gadget_handle_interrupts' > > It seems that the gadget of mtu3 is not enabled, but the default mode is > gadget mode, not sure why not works. > > I sent a patch to try to fix it: > > https://patchwork.ozlabs.org/project/uboot/patch/1602678229-19372-1-git-send-email-chunfeng@mediatek.com/ > configs: mt8512: enable device mode of mtu3 explicitly > > > Sorry for inconvenience That's fine, but can you please rebase this on usb/next and resend, so I can apply it ? Also, you can use either of the travis/gitlab CI to build-test the patches before submitting them.
Re: [PATCH v2] configs: mt8512: enable device mode of mtu3 explicitly
On Wed, 2020-10-14 at 15:01 +0200, Marek Vasut wrote:
> On 10/14/20 2:54 PM, Chunfeng Yun wrote:
> > Set CONFIG_USB_MTU3_GADGET=y to enable device mode explicitly,
> > try to avoid build error:
> > "undefined reference to `dm_usb_gadget_handle_interrupts'"
> >
> > Fixes: 764751784727 ("configs: mt8512: enable fastboot and USB host related
> > configs")
>
> Should I just squash this into ^ that commit in usb/next ?
Fine to me if it can fix the build error, thanks
Re: [PATCH v2 3/3] arm64: dts: a3720: add support for espressobin with populated emmc
On Wednesday 14 October 2020 10:45:33 Pali Rohár wrote: > On Wednesday 14 October 2020 10:37:57 Andre Heider wrote: > > On 14/10/2020 10:21, Pali Rohár wrote: > > > > > > > > > > > diff --git a/doc/README.marvell b/doc/README.marvell > > > > > index 5416bc3035..be07f31f8c 100644 > > > > > --- a/doc/README.marvell > > > > > +++ b/doc/README.marvell > > > > > @@ -43,8 +43,11 @@ Build Procedure > > > > >In order to prevent this, the required device-tree MUST be > > > > > set during compilation. > > > > >All device-tree files are located in ./arch/arm/dts/ > > > > > folder. > > > > > - For other DB boards (MacchiatoBin, EspressoBin and 3700 DB > > > > > board) compile u-boot with > > > > > - just default device-tree from defconfig using: > > > > > + For the EspressoBin board with populated eMMC device use > > > > > + # make DEVICE_TREE=armada-3720-espressobin-emmc > > > > > + > > > > > + For other DB boards (MacchiatoBin, EspressoBin without soldered > > > > > eMMC and 3700 DB board) > > > > > + compile u-boot with just default device-tree from defconfig > > > > > using: > > > > > > Hello! Does not it really make sense to do autodetection of eMMC > > > presence and enable it in U-Boot code only when needed and therefore > > > avoid having two DTS files and needs for specifying DEVICE_TREE variable > > > and therefore variant of Espressobin, as I stated in previous emails? > > > > > > I think this just complicates build process... E.g. we already have a > > > code in U-Boot which detects V5 vs V7 variant. > > > > I still like the idea, but I'm still hesitating to just enable the emmc > > everywhere. There's the issue with powering down the emmc block if it's not > > populated. How would that work once we switch to atf for comphy control? > > Is there issue with powering it down? I just do not know about it. And > could we fix it? > > > From a different angle: If we could just do that, why does Linux have > > different devicetrees? > > I do not know exact answer, so I just guess two reasons: > > 1) historic, nobody wanted to think about it, so rather created > secondary DTS > > 2) linux driver model does not have API and solution how to do this > auto-detection and in case of absence, turn blocks off and reconfigure > it. > > IIRC similar problem was with MOX (also based on A3720) and final > solution is that kernel has only one DTB and U-Boot "modifies" it prior > booting kernel, based on autodetection which U-Boot did. Similarly like > MAC address of MTD partitions are put into espressobin DTB prior booting > kernel. MOX has uSD slot for uSD card and SDIO slot for SDIO wifi card, both removable. Standard product configuration does not contain SDIO wifi card, but kernel's DTS file have it enabled by default: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts So it is really problem to enable eMMC by default on espressobin?
[PATCH 0/3] xilinx: board: Add support for board eeproms
Hi, Based on discussion with Rob we should be using nvmem alias to pointing to eeprom which stores information about device. ZynqMP boards are using format which is based on offset. The code is reading it and setup environment variables based on it. They can be used within scripts to automate different behavior for specific boards. Thanks, Michal Michal Simek (3): dm: core: Add support for getting node from aliases xilinx: board: Read the whole eeprom not just offset xilinx: board: Add support for additional card detection board/xilinx/common/board.c | 242 ++- board/xilinx/common/board.h | 2 + board/xilinx/versal/board.c | 3 + board/xilinx/zynqmp/zynqmp.c | 3 + drivers/core/ofnode.c| 22 include/dm/ofnode.h | 22 test/dm/ofnode.c | 22 7 files changed, 315 insertions(+), 1 deletion(-) -- 2.28.0
[PATCH 2/3] xilinx: board: Read the whole eeprom not just offset
Starts to use new way how eeproms should be referenced.
Reference is done via nvmem alias nodes. When this new way is specified
code itself read the eeprom and decode xilinx legacy format and fill struct
xilinx_board_description. Then based on information present there board_*
variables are setup.
If variables are saved and content can't be changed information is just
shown on console.
Signed-off-by: Michal Simek
---
board/xilinx/common/board.c | 205 ++-
board/xilinx/common/board.h | 2 +
board/xilinx/versal/board.c | 3 +
board/xilinx/zynqmp/zynqmp.c | 3 +
4 files changed, 212 insertions(+), 1 deletion(-)
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index b0f60c40a5c8..0aed84546d41 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * (C) Copyright 2014 - 2019 Xilinx, Inc.
+ * (C) Copyright 2014 - 2020 Xilinx, Inc.
* Michal Simek
*/
@@ -11,7 +11,11 @@
#include
#include
#include
+#include
#include "board.h"
+#include
+#include
+#include
#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
@@ -41,6 +45,180 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
}
#endif
+#define EEPROM_HEADER_MAGIC0xdaaddeed
+#define EEPROM_HDR_MANUFACTURER_LEN16
+#define EEPROM_HDR_NAME_LEN16
+#define EEPROM_HDR_REV_LEN 8
+#define EEPROM_HDR_SERIAL_LEN 20
+#define EEPROM_HDR_NO_OF_MAC_ADDR 4
+#define EEPROM_HDR_ETH_ALENETH_ALEN
+
+struct xilinx_board_description {
+ u32 header;
+ char manufacturer[EEPROM_HDR_MANUFACTURER_LEN + 1];
+ char name[EEPROM_HDR_NAME_LEN + 1];
+ char revision[EEPROM_HDR_REV_LEN + 1];
+ char serial[EEPROM_HDR_SERIAL_LEN + 1];
+ u8 mac_addr[EEPROM_HDR_NO_OF_MAC_ADDR][EEPROM_HDR_ETH_ALEN + 1];
+};
+
+static struct xilinx_board_description *board_info;
+
+#define XILINX_I2C_DETECTION_BITS 8
+
+/* Variable which stores pointer to array which stores eeprom content */
+struct xilinx_legacy_format {
+ char board_sn[18]; /* 0x0 */
+ char unused0[14]; /* 0x12 */
+ char eth_mac[6]; /* 0x20 */
+ char unused1[170]; /* 0x26 */
+ char board_name[11]; /* 0xd0 */
+ char unused2[5]; /* 0xdc */
+ char board_revision[3]; /* 0xe0 */
+ char unused3[29]; /* 0xe3 */
+};
+
+static void xilinx_eeprom_legacy_cleanup(char *eeprom, int size)
+{
+ int i;
+ char byte;
+
+ for (i = 0; i < size; i++) {
+ byte = eeprom[i];
+
+ /* Remove all ffs and spaces */
+ if (byte == 0xff || byte == ' ')
+ eeprom[i] = 0;
+
+ /* Convert strings to lower case */
+ if (byte >= 'A' && byte <= 'Z')
+ eeprom[i] = byte + 'a' - 'A';
+ }
+}
+
+static int xilinx_read_eeprom_legacy(struct udevice *dev, char *name,
+struct xilinx_board_description *desc)
+{
+ int ret, size;
+ struct xilinx_legacy_format *eeprom_content;
+ bool eth_valid = false;
+
+ size = sizeof(*eeprom_content);
+
+ eeprom_content = calloc(1, size);
+ if (!eeprom_content)
+ return -ENOMEM;
+
+ debug("%s: I2C EEPROM read pass data at %p\n", __func__,
+ eeprom_content);
+
+ ret = dm_i2c_read(dev, 0, (uchar *)eeprom_content, size);
+ if (ret) {
+ debug("%s: I2C EEPROM read failed\n", __func__);
+ free(eeprom_content);
+ return ret;
+ }
+
+ xilinx_eeprom_legacy_cleanup((char *)eeprom_content, size);
+
+ printf("Xilinx I2C Legacy format at %s:\n", name);
+ printf(" Board name:\t%s\n", eeprom_content->board_name);
+ printf(" Board rev:\t%s\n", eeprom_content->board_revision);
+ printf(" Board SN:\t%s\n", eeprom_content->board_sn);
+
+ eth_valid = is_valid_ethaddr((const u8 *)eeprom_content->eth_mac);
+ if (eth_valid)
+ printf(" Ethernet mac:\t%pM\n", eeprom_content->eth_mac);
+
+ /* Terminating \0 chars ensure end of string */
+ strcpy(desc->name, eeprom_content->board_name);
+ strcpy(desc->revision, eeprom_content->board_revision);
+ strcpy(desc->serial, eeprom_content->board_sn);
+ if (eth_valid)
+ memcpy(desc->mac_addr[0], eeprom_content->eth_mac, ETH_ALEN);
+
+ desc->header = EEPROM_HEADER_MAGIC;
+
+ free(eeprom_content);
+
+ return ret;
+}
+
+static bool xilinx_detect_legacy(u8 *buffer)
+{
+ int i;
+ char c;
+
+ for (i = 0; i < XILINX_I2C_DETECTION_BITS; i++) {
+ c = buffer[i];
+
+ if (c < '0' || c > '9')
+ return false;
+ }
+
+ return true;
+}
+
+static int xilinx_read_eeprom_single(char *name,
+
[PATCH 3/3] xilinx: board: Add support for additional card detection
The most of Xilinx evaluation boards have FMC connectors which contain
small eeprom for card identification. That's why read content of eeprom and
record it.
Also generate cardX_ variables for easier script handling.
Signed-off-by: Michal Simek
---
board/xilinx/common/board.c | 85 ++---
1 file changed, 61 insertions(+), 24 deletions(-)
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 0aed84546d41..0d0c21ca3d40 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -62,7 +62,8 @@ struct xilinx_board_description {
u8 mac_addr[EEPROM_HDR_NO_OF_MAC_ADDR][EEPROM_HDR_ETH_ALEN + 1];
};
-static struct xilinx_board_description *board_info;
+static int highest_id = -1;
+static struct xilinx_board_description **board_info;
#define XILINX_I2C_DETECTION_BITS 8
@@ -191,15 +192,16 @@ static int xilinx_read_eeprom_single(char *name,
__maybe_unused int xilinx_read_eeprom(void)
{
- int id, highest_id;
+ int id, ret;
char name_buf[8]; /* 8 bytes should be enough for nvmem+number */
+ struct xilinx_board_description *desc;
highest_id = dev_read_alias_highest_id("nvmem");
/* No nvmem aliases present */
if (highest_id < 0)
return -EINVAL;
- board_info = calloc(1, sizeof(*board_info));
+ board_info = calloc(1, sizeof(desc) * highest_id);
if (!board_info)
return -ENOMEM;
@@ -209,12 +211,28 @@ __maybe_unused int xilinx_read_eeprom(void)
for (id = 0; id <= highest_id; id++) {
snprintf(name_buf, sizeof(name_buf), "nvmem%d", id);
+ /* Alloc structure */
+ desc = board_info[id];
+ if (!desc) {
+ desc = calloc(1, sizeof(*desc));
+ if (!desc)
+ return -ENOMEM;
+
+ board_info[id] = desc;
+ }
+
/* Ignoring return value for supporting multiple chips */
- xilinx_read_eeprom_single(name_buf, board_info);
+ ret = xilinx_read_eeprom_single(name_buf, desc);
+ if (ret) {
+ free(desc);
+ board_info[id] = NULL;
+ }
}
- if (board_info->header != EEPROM_HEADER_MAGIC)
- free(board_info);
+ /*
+* Consider to clean board_info structure when board/cards are not
+* detected.
+*/
return 0;
}
@@ -253,10 +271,23 @@ void *board_fdt_blob_setup(void)
}
#endif
+static int env_set_by_index(const char *name, int index, char *data)
+{
+ char var[32];
+
+ if (!index)
+ sprintf(var, "board_%s", name);
+ else
+ sprintf(var, "card%d_%s", index, name);
+
+ return env_set(var, data);
+}
+
int board_late_init_xilinx(void)
{
u32 ret = 0;
- int i;
+ int i, id, macid = 0;
+ struct xilinx_board_description *desc;
phys_size_t bootm_size = gd->ram_size;
if (CONFIG_IS_ENABLED(ARCH_ZYNQ))
@@ -267,27 +298,33 @@ int board_late_init_xilinx(void)
ret |= env_set_addr("bootm_low", (void *)gd->ram_base);
ret |= env_set_addr("bootm_size", (void *)bootm_size);
- if (board_info) {
- if (board_info->manufacturer)
- ret |= env_set("manufacturer",
- board_info->manufacturer);
- if (board_info->name)
- ret |= env_set("board_name", board_info->name);
- if (board_info->revision)
- ret |= env_set("board_rev", board_info->revision);
- if (board_info->serial)
- ret |= env_set("board_serial", board_info->serial);
-
- for (i = 0; i < EEPROM_HDR_NO_OF_MAC_ADDR; i++) {
- if (!board_info->mac_addr[i])
- continue;
+ for (id = 0; id <= highest_id; id++) {
+ desc = board_info[id];
+ if (desc && desc->header == EEPROM_HEADER_MAGIC) {
+ if (desc->manufacturer[0])
+ ret |= env_set_by_index("manufacturer", id,
+ desc->manufacturer);
+ if (desc->name[0])
+ ret |= env_set_by_index("name", id,
+ desc->name);
+ if (desc->revision[0])
+ ret |= env_set_by_index("rev", id,
+ desc->revision);
+ if (desc->serial[0])
+ ret |= env_set_by_index("serial", id,
+ desc->serial);
if (!CONFIG_IS_ENABLED(NET))
Re: [PATCH v2] configs: mt8512: enable device mode of mtu3 explicitly
On 10/14/20 3:03 PM, Chunfeng Yun wrote:
> On Wed, 2020-10-14 at 15:01 +0200, Marek Vasut wrote:
>> On 10/14/20 2:54 PM, Chunfeng Yun wrote:
>>> Set CONFIG_USB_MTU3_GADGET=y to enable device mode explicitly,
>>> try to avoid build error:
>>> "undefined reference to `dm_usb_gadget_handle_interrupts'"
>>>
>>> Fixes: 764751784727 ("configs: mt8512: enable fastboot and USB host related
>>> configs")
>>
>> Should I just squash this into ^ that commit in usb/next ?
> Fine to me if it can fix the build error, thanks
So, can you please test it and then send me all the patches you want me
to apply and possibly add a note in them if they should be squashed
somewhere ?
Thanks
[PATCH 1/3] dm: core: Add support for getting node from aliases
Add support for getting a node/property from aliases.
The similar functionality is provided for chosen node and this
implemenatation is copy of it.
Signed-off-by: Michal Simek
---
drivers/core/ofnode.c | 22 ++
include/dm/ofnode.h | 22 ++
test/dm/ofnode.c | 22 ++
3 files changed, 66 insertions(+)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 7d1b89514c7d..a68076bf3517 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -476,6 +476,28 @@ ofnode ofnode_get_chosen_node(const char *name)
return ofnode_path(prop);
}
+const void *ofnode_read_aliases_prop(const char *propname, int *sizep)
+{
+ ofnode node;
+
+ node = ofnode_path("/aliases");
+
+ return ofnode_read_prop(node, propname, sizep);
+}
+
+ofnode ofnode_get_aliases_node(const char *name)
+{
+ const char *prop;
+
+ prop = ofnode_read_aliases_prop(name, NULL);
+ if (!prop)
+ return ofnode_null();
+
+ debug("%s: node_path: %s\n", __func__, prop);
+
+ return ofnode_path(prop);
+}
+
int ofnode_get_child_count(ofnode parent)
{
ofnode child;
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 4b7af3705601..ced7f6ffb250 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -605,6 +605,28 @@ const char *ofnode_read_chosen_string(const char
*propname);
*/
ofnode ofnode_get_chosen_node(const char *propname);
+/**
+ * ofnode_read_aliases_prop() - get the value of a aliases property
+ *
+ * This looks for a property within the /aliases node and returns its value
+ *
+ * @propname: Property name to look for
+ * @sizep: Returns size of property, or FDT_ERR_... error code if function
+ * returns NULL
+ * @return property value if found, else NULL
+ */
+const void *ofnode_read_aliases_prop(const char *propname, int *sizep);
+
+/**
+ * ofnode_get_aliases_node() - get a referenced node from the aliases node
+ *
+ * This looks up a named property in the aliases node and uses that as a path
to
+ * look up a code.
+ *
+ * @return the referenced node if present, else ofnode_null()
+ */
+ofnode ofnode_get_aliases_node(const char *propname);
+
struct display_timing;
/**
* ofnode_decode_display_timing() - decode display timings
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 01ac3c2094c8..fb1ceb131805 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -207,6 +207,28 @@ static int dm_test_ofnode_read_chosen(struct
unit_test_state *uts)
}
DM_TEST(dm_test_ofnode_read_chosen, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+static int dm_test_ofnode_read_aliases(struct unit_test_state *uts)
+{
+ const void *val;
+ ofnode node;
+ int size;
+
+ node = ofnode_get_aliases_node("eth3");
+ ut_assert(ofnode_valid(node));
+ ut_asserteq_str("sbe5", ofnode_get_name(node));
+
+ node = ofnode_get_aliases_node("unknown");
+ ut_assert(!ofnode_valid(node));
+
+ val = ofnode_read_aliases_prop("spi0", );
+ ut_assertnonnull(val);
+ ut_asserteq(7, size);
+ ut_asserteq_str("/spi@0", (const char *)val);
+
+ return 0;
+}
+DM_TEST(dm_test_ofnode_read_aliases, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
static int dm_test_ofnode_get_child_count(struct unit_test_state *uts)
{
ofnode node, child_node;
--
2.28.0
Re: [PATCH v2] configs: mt8512: enable device mode of mtu3 explicitly
On 10/14/20 2:54 PM, Chunfeng Yun wrote:
> Set CONFIG_USB_MTU3_GADGET=y to enable device mode explicitly,
> try to avoid build error:
> "undefined reference to `dm_usb_gadget_handle_interrupts'"
>
> Fixes: 764751784727 ("configs: mt8512: enable fastboot and USB host related
> configs")
Should I just squash this into ^ that commit in usb/next ?
Re: [PATCH 03/32] x86: Add a layout for Chrome OS verified boot
Hi Bin, On Sun, 27 Sep 2020 at 22:26, Simon Glass wrote: > > Add definitions for part of the vboot context used with verified boot. > > Signed-off-by: Simon Glass > --- > > arch/x86/include/asm/acpi/vbnv_layout.h | 38 + > 1 file changed, 38 insertions(+) > create mode 100644 arch/x86/include/asm/acpi/vbnv_layout.h Any thoughts on this series? Regards, SImon
[PATCH] mx6: peripheral clock from oscillator
In order to be able to run the I2C bus at 400Khz, the chip errata[1] recommends that the peripheral clock runs out of the 24MHz oscillator. [1] Rev 2, 10/2019, ERR007805 Signed-off-by: Jorge Ramirez-Ortiz --- arch/arm/mach-imx/mx6/soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index e129286065..1da250bbcd 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -469,7 +469,7 @@ int arch_cpu_init(void) } /* Set perclk to source from OSC 24MHz */ - if (is_mx6sl()) + if (is_mx6sl() || is_mx6ull()) setbits_le32(>cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK); imx_wdog_disable_powerdown(); /* Disable PDE bit of WMCR register */ -- 2.17.1
Re: [PATCH v2 05/22] log: Use CONFIG_IS_ENABLED() for LOG_TEST
Hi Sean, On Mon, 12 Oct 2020 at 10:56, Sean Anderson wrote: > > On 10/11/20 11:35 PM, Simon Glass wrote: > > On Sat, 10 Oct 2020 at 13:43, Sean Anderson wrote: > >> > >> Checkpatch complains about using #ifdef for CONFIG variables. > >> > >> Signed-off-by: Sean Anderson > >> --- > >> > >> (no changes since v1) > >> > >> cmd/log.c | 4 ++-- > >> test/log/log_test.c | 2 +- > >> 2 files changed, 3 insertions(+), 3 deletions(-) > >> > > > > You can ignore this warning. > > > > Perhaps it should be downgraded to a check instead of a warning? > That sounds like a good idea. There are quite a few places where #if is needed, despite this useful exhortation. Regards, Simon
Re: [PATCH v9] usb: add MediaTek USB3 DRD driver
On 10/14/20 10:50 AM, Chunfeng Yun wrote: > This patch adds support for the MediaTek USB3 DRD controller, > its host side is based on xHCI, this driver supports device mode > and host mode. This patch doesn't seem to apply to u-boot-usb/next , and also, u-boot-usb/next does not build: https://gitlab.denx.de/u-boot/custodians/u-boot-usb/-/jobs/163995
Re: [PATCH v9] usb: add MediaTek USB3 DRD driver
On Wed, 2020-10-14 at 12:56 +0200, Marek Vasut wrote: > On 10/14/20 10:50 AM, Chunfeng Yun wrote: > > This patch adds support for the MediaTek USB3 DRD controller, > > its host side is based on xHCI, this driver supports device mode > > and host mode. > > This patch doesn't seem to apply to u-boot-usb/next , and also, > u-boot-usb/next does not build: There is error: aarch64: + mt8512_bm1_emmc +aarch64-linux-ld.bfd: drivers/usb/gadget/udc/built-in.o: in function `usb_gadget_handle_interrupts': +drivers/usb/gadget/udc/udc-uclass.c:56: undefined reference to `dm_usb_gadget_handle_interrupts' It seems that the gadget of mtu3 is not enabled, but the default mode is gadget mode, not sure why not works. I sent a patch to try to fix it: https://patchwork.ozlabs.org/project/uboot/patch/1602678229-19372-1-git-send-email-chunfeng@mediatek.com/ configs: mt8512: enable device mode of mtu3 explicitly Sorry for inconvenience > > https://gitlab.denx.de/u-boot/custodians/u-boot-usb/-/jobs/163995
Re: [PATCH v2] drivers: serial: probe all uart devices
Hi Vabhav,
On 14.10.20 13:15, Vabhav Sharma (OSS) wrote:
Hi Stefan,
Sorry for delayed reply, Occupied with high priority task
-Original Message-
From: Stefan Roese
Sent: Wednesday, September 30, 2020 10:46 AM
To: Vabhav Sharma (OSS) ;
andre.przyw...@arm.com; u-boot@lists.denx.de; s...@chromium.org
Cc: Vabhav Sharma
Subject: Re: [PATCH v2] drivers: serial: probe all uart devices
On 29.09.20 19:26, Vabhav Sharma wrote:
From: Vabhav Sharma
U-Boot DM model probe only single device at a time which is enabled
and configured using device tree or platform data method.
PL011 UART IP is SBSA compliant and firmware does the serial port
set-up, initialization and let the kernel use UART port for sending
and receiving characters.
Normally software talk to one serial port time but some LayerScape
platform require all the UART devices enabled in Linux for various use
case.
Adding support to probe all enabled serial devices like SBSA compliant
PL011 UART ports probe and initialization by firmware.
Signed-off-by: Vabhav Sharma
---
v2:
Incorporated Stefan review comment, Update #ifdef with macro
if (IS_ENABLED)..
Better, thanks. But...
---
---
drivers/serial/Kconfig | 17 +
drivers/serial/serial-uclass.c | 30 ++
2 files changed, 47 insertions(+)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index
e344677..b2e30f1 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -134,6 +134,23 @@ config SERIAL_SEARCH_ALL
If unsure, say N.
+config SERIAL_PROBE_ALL
+ bool "Probe all available serial devices"
+ depends on DM_SERIAL
+ default n
+ help
+ The serial subsystem only probe for single serial device,
+ but does not probe for other remaining serial devices.
+ With this option set,we make probing and searching for
+ all available devices optional.
+ Normally, U-Boot talk to one serial port at a time but SBSA
+ compliant UART devices like PL011 require initialization
+ by firmware and let the kernel use serial port for sending
+ and receiving the characters.
+
+ If probing is not required for all remaining available
+ devices other than default current console device, say N.
+
config SPL_DM_SERIAL
bool "Enable Driver Model for serial drivers in SPL"
depends on DM_SERIAL && SPL_DM
diff --git a/drivers/serial/serial-uclass.c
b/drivers/serial/serial-uclass.c index 0027625..d303a66 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -86,6 +86,11 @@ static void serial_find_console_or_panic(void)
uclass_first_device(UCLASS_SERIAL, );
if (dev) {
gd->cur_serial_dev = dev;
+ if (IS_ENABLED(CONFIG_SERIAL_PROBE_ALL)) {
+ /* Scanning uclass to probe all devices */
+ for (; dev; uclass_next_device())
+ ;
+ }
return;
}
} else if (CONFIG_IS_ENABLED(OF_CONTROL) && blob) { @@ -96,11
+101,21 @@ static void serial_find_console_or_panic(void)
if (np
&& !uclass_get_device_by_ofnode(UCLASS_SERIAL,
np_to_ofnode(np), )) {
gd->cur_serial_dev = dev;
+ if (IS_ENABLED(CONFIG_SERIAL_PROBE_ALL))
{
+ /* Scanning uclass to probe devices
*/
+ for (; dev; uclass_next_device())
+ ;
+ }
This code sequence (incl. gd->cur_serial_dev = dev;) is repeated multiple
times (below as well). Could you instead move this into a function and call
this function to reduce code and binary size?
I understand.
Checked and found that 56 bytes of code is added (including enabling
the macro on LS platform)
Intended to define it earlier but defining one line of code in a
function cause more overhead (function call, Stack operations,
Pointer arithmetic) in execution time.
So you did measure a penalty in bootup time with this code moved
into a function? I would have thought that this is neglectable.
Tradeoff is to choose between Function overhead Vs Binary Size, What
is your suggestion
My vote is for the function. Mainly not because of the smaller image
size, but because of the smaller source code base, being easier to
maintain (IMHO).
Thanks,
Stefan
Thanks,
Stefan
return;
}
} else {
if (!serial_check_stdout(blob, )) {
gd->cur_serial_dev = dev;
+ if (IS_ENABLED(CONFIG_SERIAL_PROBE_ALL))
{
+
Re: [PATCH] configs: mt8512: enable device mode of mtu3 explicitly
On Wed, Oct 14, 2020 at 8:24 PM Chunfeng Yun wrote:
>
> Set CONFIG_USB_MTU3_GADGET=y to enable it explicitly,
> try to avoid build error:
> "undefined reference to `dm_usb_gadget_handle_interrupts'"
>
> fixes: 311412ead0 ("configs: mt8512: enable fastboot and USB host related
> configs")
This should be "Fixes:" followed by 12 digit commit id
I can't find 311412ead0 in my tree
>
> Signed-off-by: Chunfeng Yun
> ---
> configs/mt8512_bm1_emmc_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/configs/mt8512_bm1_emmc_defconfig
> b/configs/mt8512_bm1_emmc_defconfig
> index aaf59f52a8..c25a42cd3d 100644
> --- a/configs/mt8512_bm1_emmc_defconfig
> +++ b/configs/mt8512_bm1_emmc_defconfig
> @@ -53,6 +53,7 @@ CONFIG_DM_USB=y
> CONFIG_DM_USB_GADGET=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_MTU3=y
> +CONFIG_USB_MTU3_GADGET=y
> # CONFIG_USB_MTU3_HOST is not set
> CONFIG_USB_STORAGE=y
> CONFIG_USB_GADGET=y
Regards,
Bin
Re: [PATCH] configs: mt8512: enable device mode of mtu3 explicitly
On Wed, 2020-10-14 at 20:33 +0800, Bin Meng wrote:
> On Wed, Oct 14, 2020 at 8:24 PM Chunfeng Yun
> wrote:
> >
> > Set CONFIG_USB_MTU3_GADGET=y to enable it explicitly,
> > try to avoid build error:
> > "undefined reference to `dm_usb_gadget_handle_interrupts'"
> >
> > fixes: 311412ead0 ("configs: mt8512: enable fastboot and USB host related
> > configs")
>
> This should be "Fixes:" followed by 12 digit commit id
Ok
>
> I can't find 311412ead0 in my tree
Sorry, I used my local change id, will use one got from u-boot-usb/next
branch
>
> >
> > Signed-off-by: Chunfeng Yun
> > ---
> > configs/mt8512_bm1_emmc_defconfig | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/configs/mt8512_bm1_emmc_defconfig
> > b/configs/mt8512_bm1_emmc_defconfig
> > index aaf59f52a8..c25a42cd3d 100644
> > --- a/configs/mt8512_bm1_emmc_defconfig
> > +++ b/configs/mt8512_bm1_emmc_defconfig
> > @@ -53,6 +53,7 @@ CONFIG_DM_USB=y
> > CONFIG_DM_USB_GADGET=y
> > CONFIG_USB_XHCI_HCD=y
> > CONFIG_USB_MTU3=y
> > +CONFIG_USB_MTU3_GADGET=y
> > # CONFIG_USB_MTU3_HOST is not set
> > CONFIG_USB_STORAGE=y
> > CONFIG_USB_GADGET=y
>
> Regards,
> Bin
[PATCH 1/3] rockchip: efuse: add support for RK3288 non-secure efuse
From: Francis Fan
Extend rockchip efuse driver with support for RK3288 non-secure efuse.
Signed-off-by: Francis Fan
Signed-off-by: Cody Xie
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-efuse.c | 91 +--
1 file changed, 87 insertions(+), 4 deletions(-)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 46ce6305fe..20423544d9 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -27,6 +27,17 @@
#define RK3399_STROBE BIT(1)
#define RK3399_CSB BIT(0)
+#define RK3288_A_SHIFT 6
+#define RK3288_A_MASK 0x3ff
+#define RK3288_NFUSES 32
+#define RK3288_BYTES_PER_FUSE 1
+#define RK3288_PGENBBIT(3)
+#define RK3288_LOAD BIT(2)
+#define RK3288_STROBE BIT(1)
+#define RK3288_CSB BIT(0)
+
+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int
size);
+
struct rockchip_efuse_regs {
u32 ctrl; /* 0x00 efuse control register */
u32 dout; /* 0x04 efuse data out register */
@@ -53,7 +64,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
*/
struct udevice *dev;
- u8 fuses[128];
+ u8 fuses[128] = {0};
int ret;
/* retrieve the device */
@@ -77,7 +88,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
}
U_BOOT_CMD(
- rk3399_dump_efuses, 1, 1, dump_efuses,
+ rockchip_dump_efuses, 1, 1, dump_efuses,
"Dump the content of the efuses",
""
);
@@ -127,10 +138,59 @@ static int rockchip_rk3399_efuse_read(struct udevice
*dev, int offset,
return 0;
}
+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+ struct rockchip_efuse_regs *efuse =
+ (struct rockchip_efuse_regs *)plat->base;
+ u8 *buffer = buf;
+ int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE;
+
+ if (size > (max_size - offset))
+ size = max_size - offset;
+
+ /* Switch to read mode */
+ writel(RK3288_LOAD | RK3288_PGENB, >ctrl);
+ udelay(1);
+
+ while (size--) {
+ writel(readl(>ctrl) &
+ (~(RK3288_A_MASK << RK3288_A_SHIFT)),
+ >ctrl);
+ /* set addr */
+ writel(readl(>ctrl) |
+ ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
+ >ctrl);
+ udelay(1);
+ /* strobe low to high */
+ writel(readl(>ctrl) |
+ RK3288_STROBE, >ctrl);
+ ndelay(60);
+ /* read data */
+ *buffer++ = readl(>dout);
+ /* reset strobe to low */
+ writel(readl(>ctrl) &
+ (~RK3288_STROBE), >ctrl);
+ udelay(1);
+ }
+
+ /* Switch to standby mode */
+ writel(RK3288_PGENB | RK3288_CSB, >ctrl);
+
+ return 0;
+}
+
static int rockchip_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
- return rockchip_rk3399_efuse_read(dev, offset, buf, size);
+ EFUSE_READ efuse_read = NULL;
+
+ efuse_read = (EFUSE_READ)dev_get_driver_data(dev);
+ if (!efuse_read)
+ return -ENOSYS;
+
+ return (*efuse_read)(dev, offset, buf, size);
}
static const struct misc_ops rockchip_efuse_ops = {
@@ -146,7 +206,30 @@ static int rockchip_efuse_ofdata_to_platdata(struct
udevice *dev)
}
static const struct udevice_id rockchip_efuse_ids[] = {
- { .compatible = "rockchip,rk3399-efuse" },
+ {
+ .compatible = "rockchip,rk3066a-efuse",
+ .data = (ulong)_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3188-efuse",
+ .data = (ulong)_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3228-efuse",
+ .data = (ulong)_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3288-efuse",
+ .data = (ulong)_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3368-efuse",
+ .data = (ulong)_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3399-efuse",
+ .data = (ulong)_rk3399_efuse_read,
+ },
{}
};
--
2.17.1
[PATCH] doc: dfu: fix typo in README.dfu
Fix "ram" typos for serial flash Signed-off-by: Chance.Yang --- doc/README.dfu | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/README.dfu b/doc/README.dfu index 4b9f883540..be53b5b393 100644 --- a/doc/README.dfu +++ b/doc/README.dfu @@ -121,7 +121,7 @@ Commands: "sf" (serial flash : NOR) cmd: dfu 0 sf each element in "dfu_alt_info" = - ramraw access to sf device + rawraw access to sf device partraw acces to partition partubiraw acces to ubi partition -- 2.17.1
RE: [PATCH v2 3/5] pinctrl: renesas: r8a77965: Add R8A774B1 PFC support
Hi Marek, > Subject: Re: [PATCH v2 3/5] pinctrl: renesas: r8a77965: Add R8A774B1 PFC > support > > On 10/13/20 8:30 PM, Biju Das wrote: > > Hi, > > [...] > > On 10/13/20 10:52 AM, Biju Das wrote: > > Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N > > (r8a77965), however it doesn't have several automotive specific > > peripherals. Add a r8a77965 specific pin groups/functions along > > with common pin groups/functions for supporting both r8a77965 and > > r8a774b1 > SoC. > > Would it make sense to ifdef out the R8A774B1 extras if > CONFIG_PINCTRL_PFC_R8A774B1 is not enabled and in turn also the > R8A77965 extras if CONFIG_PINCTRL_PFC_R8A77965 is not enabled, so > >> the > resulting U-Boot binary isn't bloated with the unused tables ? > >>> > >>> By default, all IP's in R8A774B1 will be present in R8A77965 SoC. > >>> So the > >> extras is only for R8A77965. > >>> > >>> Code will be much cleaner, if we maintain same structure like linux > >>> [1]. Otherwise we need to add #ifdef CONFIG_PINCTRL_PFC_R8A77965 > for > >> the DRIF IP/.automotive all over the places in this file. > >>> So please advise. > >> > >> Check with the linux maintainers please, surely there should be some > >> way to separate the extras in a way that's not too hard to maintain, > >> and thus reduce the resulting binary size. For U-Boot, that is quite > >> important already, I think the TFA can only load 1 MiB binary in total. > > > > I agree for bootloader size is important. So I will add macros as per your > suggestion (we don't need to look into linux for this). > > The PFC tables and clock tables are the same between U-Boot and Linux, so if > you only change them in U-Boot, it will make it hard to synchronize the tables > later with Linux again. Please fix this in Linux and synchronize to U-Boot. I have posted a patch for optimizing pin control size for RZ/G2N in Linux [1] [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20201014110238.9600-1-biju.das...@bp.renesas.com/ This approach will save ~ 6KB=(3x 2KB/SoC) of memory on RZ/G2[HMN] u-boot with multi dtb support. 1) By compiling out Automotive parts $ size drivers/pinctrl/renesas/pfc-r8a77965.o textdata bss dec hex filename 46141 0 0 46141b43d drivers/pinctrl/renesas/pfc-r8a77965.o 2) without patch $ size drivers/pinctrl/renesas/pfc-r8a77965.o textdata bss dec hex filename 48191 0 0 48191bc3f drivers/pinctrl/renesas/pfc-r8a77965.o Cheers, Biju
Re: [PATCH v3] net: Add NIC controller driver for OcteonTX2
On 26.08.20 14:37, Stefan Roese wrote:
From: Suneel Garapati
Adds support for Network Interface controllers found on
OcteonTX2 SoC platforms.
Signed-off-by: Suneel Garapati
Signed-off-by: Stefan Roese
Cc: Joe Hershberger
---
Series-changes: 3
- Add SoB from Stefan
- Remove spdx.org line from comment
- Remove inclusion of common.h header
- Order header file inclusion
- Misc minor checkpatch fixes
Series-changes: 1
- Change patch subject
- Rebased on latest TOT
- Removed inclusion of common.h
Applied to u-boot-marvell/master
Thanks,
Stefan
drivers/net/Kconfig| 17 +
drivers/net/Makefile |2 +
drivers/net/octeontx2/Makefile |8 +
drivers/net/octeontx2/cgx.c| 296
drivers/net/octeontx2/cgx.h| 105 +++
drivers/net/octeontx2/cgx_intf.c | 715 ++
drivers/net/octeontx2/cgx_intf.h | 448 +++
drivers/net/octeontx2/lmt.h| 49 ++
drivers/net/octeontx2/nix.c| 831 +
drivers/net/octeontx2/nix.h| 353 +
drivers/net/octeontx2/nix_af.c | 1102
drivers/net/octeontx2/npc.h| 90 +++
drivers/net/octeontx2/rvu.h| 119 +++
drivers/net/octeontx2/rvu_af.c | 171 +
drivers/net/octeontx2/rvu_common.c | 71 ++
drivers/net/octeontx2/rvu_pf.c | 116 +++
16 files changed, 4493 insertions(+)
create mode 100644 drivers/net/octeontx2/Makefile
create mode 100644 drivers/net/octeontx2/cgx.c
create mode 100644 drivers/net/octeontx2/cgx.h
create mode 100644 drivers/net/octeontx2/cgx_intf.c
create mode 100644 drivers/net/octeontx2/cgx_intf.h
create mode 100644 drivers/net/octeontx2/lmt.h
create mode 100644 drivers/net/octeontx2/nix.c
create mode 100644 drivers/net/octeontx2/nix.h
create mode 100644 drivers/net/octeontx2/nix_af.c
create mode 100644 drivers/net/octeontx2/npc.h
create mode 100644 drivers/net/octeontx2/rvu.h
create mode 100644 drivers/net/octeontx2/rvu_af.c
create mode 100644 drivers/net/octeontx2/rvu_common.c
create mode 100644 drivers/net/octeontx2/rvu_pf.c
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 26ea53d346..6e758f5581 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -414,6 +414,15 @@ config NET_OCTEONTX
help
You must select Y to enable network device support for
OcteonTX SoCs. If unsure, say n
+
+config NET_OCTEONTX2
+ bool "OcteonTX2 Ethernet support"
+ depends on ARCH_OCTEONTX2
+ select OCTEONTX2_CGX_INTF
+ help
+ You must select Y to enable network device support for
+ OcteonTX2 SoCs. If unsure, say n
+
config OCTEONTX_SMI
bool "OcteonTX SMI Device support"
depends on ARCH_OCTEONTX || ARCH_OCTEONTX2
@@ -421,6 +430,14 @@ config OCTEONTX_SMI
You must select Y to enable SMI controller support for
OcteonTX or OcteonTX2 SoCs. If unsure, say n
+config OCTEONTX2_CGX_INTF
+ bool "OcteonTX2 CGX ATF interface support"
+ depends on ARCH_OCTEONTX2
+ default y if ARCH_OCTEONTX2
+ help
+ You must select Y to enable CGX ATF interface support for
+ OcteonTX2 SoCs. If unsure, say n
+
config PCH_GBE
bool "Intel Platform Controller Hub EG20T GMAC driver"
depends on DM_ETH && DM_PCI
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index bee9680f76..c07b5ad698 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -66,7 +66,9 @@ obj-$(CONFIG_SMC9) += smc9.o
obj-$(CONFIG_SMC911X) += smc911x.o
obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o
obj-$(CONFIG_NET_OCTEONTX) += octeontx/
+obj-$(CONFIG_NET_OCTEONTX2) += octeontx2/
obj-$(CONFIG_OCTEONTX_SMI) += octeontx/smi.o
+obj-$(CONFIG_OCTEONTX2_CGX_INTF) += octeontx2/cgx_intf.o
obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o
obj-$(CONFIG_ULI526X) += uli526x.o
obj-$(CONFIG_VSC7385_ENET) += vsc7385.o
diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
new file mode 100644
index 00..c9300727ae
--- /dev/null
+++ b/drivers/net/octeontx2/Makefile
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier:GPL-2.0
+#
+# Copyright (C) 2018 Marvell International Ltd.
+#
+
+obj-$(CONFIG_NET_OCTEONTX2) += cgx.o nix_af.o nix.o rvu_pf.o \
+ rvu_af.o rvu_common.o
+
diff --git a/drivers/net/octeontx2/cgx.c b/drivers/net/octeontx2/cgx.c
new file mode 100644
index 00..ff2ebc25ce
--- /dev/null
+++ b/drivers/net/octeontx2/cgx.c
@@ -0,0 +1,296 @@
+// SPDX-License-Identifier:GPL-2.0
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "cgx.h"
+
+char lmac_type_to_str[][8] = {
+ "SGMII",
+ "XAUI",
+ "RXAUI",
+ "10G_R",
+ "40G_R",
+ "RGMII",
+ "QSGMII",
+ "25G_R",
+ "50G_R",
+
Re: [PATCH v3 00/27] Add DM support for omap PWM backlight
On 11.10.20 14:13, Dario Binacchi wrote: > The series was born from the need to manage the PWM backlight of the > display connected to my beaglebone board. To hit the target, I had to > develop drivers for PWM management which in turn relied on drivers for > managing timers and clocks, all developed according to the driver model. > My intention was to use the SoC-specific API only at strictly necessary > points in the code. My previous patches for migrating the AM335x display > driver to the driver model had required the implementation of additional > functions outside the concerns of the driver, (settings for dividing the > pixel clock rate, configuring the display DPLL rate, ) not being > able to use the API of the related clock drivers. This series shouldn't > have repeated the same kind of mistake. Furthermore, I also wanted to fix > that kind of forced choice. Almost everything should have been accessible > via the driver model API. In the series there are also some patches that > could be submitted separately, but which I have however inserted to avoid > applying future patches to incorporate them. > With this last consideration, I hope I have convincingly justified the > large number of patches in the series. > > The patch enabling address translation into a CPU physical address from > device-tree even in case of crossing levels with #size-cells = <0>, is > crucial for the series. The previous implementation was unable to > perform the address translation required by the am33xx device tree. > I tried to apply in a conservative way as few changes as possible and > to verify the execution of all the tests already developed, as well as > the new ones I added for the new feature. > > As recommended by Grygorii Strashko I have removed some patches to > upload them in new different series: > - [v2,01/30] clk: remove a redundant header > - [v2,03/30] arch: sandbox: fix typo in clk.h > - [v2,20/30] video: backlight: fix pwm's duty cycle calculation > - [v2,21/30] video: backlight: fix pwm data structure description > - [v2,22/30] dm: core: improve uclass_get_device_by_phandle_id() description > - [v2,23/30] gpio: fix gpio_request_by_name() description > > Grygorii suggested to remove also other patches that I have kept in the > series to allow anyone who wants to be able to test it. Moreover after > the addition of a patch that has largely changed the device tree. The > patches removed are the one and only ones that do not affect the series > in any way. I hope that the next version of this series will require > only minimal changes allowing me to split it according to Grygorii's > suggestions. > I must be missing something as this patch series does not apply without errors to U-Boot master: error: drivers/clk/clk-ti-am3-dpll-x2.c: No such file or directory error: drivers/clk/clk-ti-am3-dpll.c: No such file or directory error: drivers/clk/clk-ti-ctrl.c: No such file or directory error: drivers/clk/clk-ti-divider.c: No such file or directory error: drivers/clk/clk-ti-gate.c: No such file or directory error: drivers/clk/clk-ti-mux.c: No such file or directory error: drivers/clk/clk-ti.c: No such file or directory error: drivers/clk/clk-ti.h: No such file or directory error: drivers/video/tilcdc-panel.c: No such file or directory error: drivers/video/tilcdc-panel.h: No such file or directory error: drivers/video/tilcdc.c: No such file or directory error: drivers/video/tilcdc.h: No such file or directory Does it probably depend on some other patches? regards, Felix
RE: [PATCH v2] drivers: serial: probe all uart devices
Hi Simon,
Apology for delayed reply, Got occupied due to other business deliverables
> -Original Message-
> From: Simon Glass
> Sent: Wednesday, September 30, 2020 10:15 PM
> To: Vabhav Sharma (OSS)
> Cc: Andre Przywara ; U-Boot Mailing List b...@lists.denx.de>; Stefan Roese ; Vabhav Sharma
>
> Subject: Re: [PATCH v2] drivers: serial: probe all uart devices
>
> Hi Vabhav,
>
> On Tue, 29 Sep 2020 at 11:33, Vabhav Sharma
> wrote:
> >
> > From: Vabhav Sharma
> >
> > U-Boot DM model probe only single device at a time which is enabled
> > and configured using device tree or platform data method.
> >
> > PL011 UART IP is SBSA compliant and firmware does the serial port
> > set-up, initialization and let the kernel use UART port for sending
> > and receiving characters.
> >
> > Normally software talk to one serial port time but some LayerScape
> > platform require all the UART devices enabled in Linux for various use
> > case.
> >
> > Adding support to probe all enabled serial devices like SBSA compliant
> > PL011 UART ports probe and initialization by firmware.
> >
> > Signed-off-by: Vabhav Sharma
> > ---
> > v2:
> >Incorporated Stefan review comment, Update #ifdef with macro
> >if (IS_ENABLED)..
> > ---
> > ---
> > drivers/serial/Kconfig | 17 +
> > drivers/serial/serial-uclass.c | 30 ++
> > 2 files changed, 47 insertions(+)
> >
> > diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index
> > e344677..b2e30f1 100644
> > --- a/drivers/serial/Kconfig
> > +++ b/drivers/serial/Kconfig
> > @@ -134,6 +134,23 @@ config SERIAL_SEARCH_ALL
> >
> > If unsure, say N.
> >
> > +config SERIAL_PROBE_ALL
> > + bool "Probe all available serial devices"
> > + depends on DM_SERIAL
> > + default n
>
> not needed
>
> > + help
> > + The serial subsystem only probe for single serial device,
> > + but does not probe for other remaining serial devices.
> > + With this option set,we make probing and searching for
> > + all available devices optional.
> > + Normally, U-Boot talk to one serial port at a time but SBSA
> > + compliant UART devices like PL011 require initialization
> > + by firmware and let the kernel use serial port for sending
> > + and receiving the characters.
> > +
> > + If probing is not required for all remaining available
> > + devices other than default current console device, say N.
> > +
> > config SPL_DM_SERIAL
> > bool "Enable Driver Model for serial drivers in SPL"
> > depends on DM_SERIAL && SPL_DM diff --git
> > a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
> > index 0027625..d303a66 100644
> > --- a/drivers/serial/serial-uclass.c
> > +++ b/drivers/serial/serial-uclass.c
> > @@ -86,6 +86,11 @@ static void serial_find_console_or_panic(void)
> > uclass_first_device(UCLASS_SERIAL, );
> > if (dev) {
> > gd->cur_serial_dev = dev;
> > + if (IS_ENABLED(CONFIG_SERIAL_PROBE_ALL)) {
> > + /* Scanning uclass to probe all devices */
> > + for (; dev; uclass_next_device())
> > + ;
>
> Please put this into a function in drivers/core/uclass.c since this is a
> useful
> function. E.g. uclass_probe_all(enum uclass_id)
>
> Also you could use device_foreach_child_probe().
>
> Can you put this in the only caller of serial_find_console_or_panic() instead?
>
Ok, Let me check the above the above functions feasibility to probe serial ports
> Do you ever have a situation where there is no serial console in U-Boot but
> you still want to probe everything? If so, a better place might be at the end
> of dm_init_and_scan().
I see, Situation is rare but possible as SBSA compliance required
initialization by firmware.
>
> Finally, do you want to do this in SPL as well, or is it enough to just do it
> in U-
> Boot proper? If the latter you could use
>
> if (CONFIG_IS_ENABLED(SERIAL_PROBE_ALL)) { // do it } Regards, Simon,
Ok, Both are possible as per the requirement.
Current changes target PL011 UART IP which is SBSA compliant and accordingly
used Serial uclass functions to do the needful.
RE: [PATCH v2] drivers: serial: probe all uart devices
Hi Stefan,
Sorry for delayed reply, Occupied with high priority task
> -Original Message-
> From: Stefan Roese
> Sent: Wednesday, September 30, 2020 10:46 AM
> To: Vabhav Sharma (OSS) ;
> andre.przyw...@arm.com; u-boot@lists.denx.de; s...@chromium.org
> Cc: Vabhav Sharma
> Subject: Re: [PATCH v2] drivers: serial: probe all uart devices
>
> On 29.09.20 19:26, Vabhav Sharma wrote:
> > From: Vabhav Sharma
> >
> > U-Boot DM model probe only single device at a time which is enabled
> > and configured using device tree or platform data method.
> >
> > PL011 UART IP is SBSA compliant and firmware does the serial port
> > set-up, initialization and let the kernel use UART port for sending
> > and receiving characters.
> >
> > Normally software talk to one serial port time but some LayerScape
> > platform require all the UART devices enabled in Linux for various use
> > case.
> >
> > Adding support to probe all enabled serial devices like SBSA compliant
> > PL011 UART ports probe and initialization by firmware.
> >
> > Signed-off-by: Vabhav Sharma
> > ---
> > v2:
> > Incorporated Stefan review comment, Update #ifdef with macro
> > if (IS_ENABLED)..
>
> Better, thanks. But...
>
> > ---
> > ---
> > drivers/serial/Kconfig | 17 +
> > drivers/serial/serial-uclass.c | 30 ++
> > 2 files changed, 47 insertions(+)
> >
> > diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index
> > e344677..b2e30f1 100644
> > --- a/drivers/serial/Kconfig
> > +++ b/drivers/serial/Kconfig
> > @@ -134,6 +134,23 @@ config SERIAL_SEARCH_ALL
> >
> > If unsure, say N.
> >
> > +config SERIAL_PROBE_ALL
> > + bool "Probe all available serial devices"
> > + depends on DM_SERIAL
> > + default n
> > + help
> > + The serial subsystem only probe for single serial device,
> > + but does not probe for other remaining serial devices.
> > + With this option set,we make probing and searching for
> > + all available devices optional.
> > + Normally, U-Boot talk to one serial port at a time but SBSA
> > + compliant UART devices like PL011 require initialization
> > + by firmware and let the kernel use serial port for sending
> > + and receiving the characters.
> > +
> > + If probing is not required for all remaining available
> > + devices other than default current console device, say N.
> > +
> > config SPL_DM_SERIAL
> > bool "Enable Driver Model for serial drivers in SPL"
> > depends on DM_SERIAL && SPL_DM
> > diff --git a/drivers/serial/serial-uclass.c
> > b/drivers/serial/serial-uclass.c index 0027625..d303a66 100644
> > --- a/drivers/serial/serial-uclass.c
> > +++ b/drivers/serial/serial-uclass.c
> > @@ -86,6 +86,11 @@ static void serial_find_console_or_panic(void)
> > uclass_first_device(UCLASS_SERIAL, );
> > if (dev) {
> > gd->cur_serial_dev = dev;
> > + if (IS_ENABLED(CONFIG_SERIAL_PROBE_ALL)) {
> > + /* Scanning uclass to probe all devices */
> > + for (; dev; uclass_next_device())
> > + ;
> > + }
> > return;
> > }
> > } else if (CONFIG_IS_ENABLED(OF_CONTROL) && blob) { @@ -96,11
> > +101,21 @@ static void serial_find_console_or_panic(void)
> > if (np
> && !uclass_get_device_by_ofnode(UCLASS_SERIAL,
> > np_to_ofnode(np), )) {
> > gd->cur_serial_dev = dev;
> > + if (IS_ENABLED(CONFIG_SERIAL_PROBE_ALL))
> {
> > + /* Scanning uclass to probe devices
> */
> > + for (; dev; uclass_next_device())
> > + ;
> > + }
>
> This code sequence (incl. gd->cur_serial_dev = dev;) is repeated multiple
> times (below as well). Could you instead move this into a function and call
> this function to reduce code and binary size?
I understand.
Checked and found that 56 bytes of code is added (including enabling the macro
on LS platform)
Intended to define it earlier but defining one line of code in a function cause
more overhead (function call, Stack operations, Pointer arithmetic) in
execution time.
Tradeoff is to choose between Function overhead Vs Binary Size, What is your
suggestion
>
> Thanks,
> Stefan
>
> > return;
> > }
> > } else {
> > if (!serial_check_stdout(blob, )) {
> > gd->cur_serial_dev = dev;
> > + if (IS_ENABLED(CONFIG_SERIAL_PROBE_ALL))
> {
> > + /* Scanning uclass to probe devices
> */
> > + for (; dev; uclass_next_device())
> > +
[PATCH 3/3] rockchip: dts: rk3288: enable efuse node
Enable efuse node so that boards can use cpu id in efuse as a source for
serial# and ethaddr.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3288.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 22bb06cec5..381391360c 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -919,8 +919,7 @@
efuse: efuse@ffb4 {
compatible = "rockchip,rk3288-efuse";
- reg = <0xffb4 0x1>;
- status = "disabled";
+ reg = <0xffb4 0x20>;
};
gic: interrupt-controller@ffc01000 {
--
2.17.1
[PATCH 0/3] rockchip: efuse: add RK3288/RK3328 support
This extends rockchip efuse driver with support for RK3288 and RK3328. Patch 1 and 2 was picked from vendor u-boot and updated to work with mainline u-boot. Patch 3 updates and enable the efuse node in rk3288.dtsi. This makes it possible to get a persisted ethaddr using: CONFIG_MISC=y CONFIG_MISC_INIT_R=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_SHA256=y Best regards, Jonas Francis Fan (1): rockchip: efuse: add support for RK3288 non-secure efuse Jonas Karlman (1): rockchip: dts: rk3288: enable efuse node Joseph Chen (1): rockchip: efuse: add support for RK3328 non-secure efuse arch/arm/dts/rk3288.dtsi | 3 +- drivers/misc/rockchip-efuse.c | 158 +- 2 files changed, 155 insertions(+), 6 deletions(-) -- 2.17.1
[PATCH] configs: mt8512: enable device mode of mtu3 explicitly
Set CONFIG_USB_MTU3_GADGET=y to enable it explicitly,
try to avoid build error:
"undefined reference to `dm_usb_gadget_handle_interrupts'"
fixes: 311412ead0 ("configs: mt8512: enable fastboot and USB host related
configs")
Signed-off-by: Chunfeng Yun
---
configs/mt8512_bm1_emmc_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/mt8512_bm1_emmc_defconfig
b/configs/mt8512_bm1_emmc_defconfig
index aaf59f52a8..c25a42cd3d 100644
--- a/configs/mt8512_bm1_emmc_defconfig
+++ b/configs/mt8512_bm1_emmc_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_MTU3=y
+CONFIG_USB_MTU3_GADGET=y
# CONFIG_USB_MTU3_HOST is not set
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
--
2.18.0
[PATCH 2/3] rockchip: efuse: add support for RK3328 non-secure efuse
From: Joseph Chen
Extend rockchip efuse driver with support for RK3328 non-secure efuse.
Signed-off-by: Joseph Chen
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-efuse.c | 67 +++
1 file changed, 67 insertions(+)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 20423544d9..9b5a525322 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
#include
#define RK3399_A_SHIFT 16
@@ -36,6 +37,13 @@
#define RK3288_STROBE BIT(1)
#define RK3288_CSB BIT(0)
+#define RK3328_INT_STATUS 0x0018
+#define RK3328_DOUT0x0020
+#define RK3328_AUTO_CTRL 0x0024
+#define RK3328_INT_FINISH BIT(0)
+#define RK3328_AUTO_ENBBIT(0)
+#define RK3328_AUTO_RD BIT(1)
+
typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int
size);
struct rockchip_efuse_regs {
@@ -46,6 +54,10 @@ struct rockchip_efuse_regs {
u32 jtag_pass; /* 0x10 JTAG password */
u32 strobe_finish_ctrl;
/* 0x14 efuse strobe finish control register */
+ u32 int_status;/* 0x18 */
+ u32 reserved; /* 0x1c */
+ u32 dout2; /* 0x20 */
+ u32 auto_ctrl; /* 0x24 */
};
struct rockchip_efuse_platdata {
@@ -181,6 +193,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev,
int offset,
return 0;
}
+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+ struct rockchip_efuse_regs *efuse =
+ (struct rockchip_efuse_regs *)plat->base;
+ unsigned int addr_start, addr_end, addr_offset, addr_len;
+ u32 out_value, status;
+ u8 *buffer;
+ int ret = 0, i = 0, j = 0;
+
+ /* Max non-secure Byte */
+ if (size > 32)
+ size = 32;
+
+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
+ offset += 96;
+ addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) /
+ RK3399_BYTES_PER_FUSE;
+ addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) /
+ RK3399_BYTES_PER_FUSE;
+ addr_offset = offset % RK3399_BYTES_PER_FUSE;
+ addr_len = addr_end - addr_start;
+
+ buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE);
+ if (!buffer)
+ return -ENOMEM;
+
+ for (j = 0; j < addr_len; j++) {
+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+ >auto_ctrl);
+ udelay(5);
+ status = readl(>int_status);
+ if (!(status & RK3328_INT_FINISH)) {
+ ret = -EIO;
+ goto err;
+ }
+ out_value = readl(>dout2);
+ writel(RK3328_INT_FINISH, >int_status);
+
+ memcpy([i], _value, RK3399_BYTES_PER_FUSE);
+ i += RK3399_BYTES_PER_FUSE;
+ }
+ memcpy(buf, buffer + addr_offset, size);
+err:
+ free(buffer);
+
+ return ret;
+}
+
static int rockchip_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
@@ -226,6 +289,10 @@ static const struct udevice_id rockchip_efuse_ids[] = {
.compatible = "rockchip,rk3368-efuse",
.data = (ulong)_rk3288_efuse_read,
},
+ {
+ .compatible = "rockchip,rk3328-efuse",
+ .data = (ulong)_rk3328_efuse_read,
+ },
{
.compatible = "rockchip,rk3399-efuse",
.data = (ulong)_rk3399_efuse_read,
--
2.17.1
[PATCH v2] configs: mt8512: enable device mode of mtu3 explicitly
Set CONFIG_USB_MTU3_GADGET=y to enable device mode explicitly,
try to avoid build error:
"undefined reference to `dm_usb_gadget_handle_interrupts'"
Fixes: 764751784727 ("configs: mt8512: enable fastboot and USB host related
configs")
Signed-off-by: Chunfeng Yun
---
v2: change fixes info suggested by Bin
---
configs/mt8512_bm1_emmc_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/mt8512_bm1_emmc_defconfig
b/configs/mt8512_bm1_emmc_defconfig
index aaf59f52a8..c25a42cd3d 100644
--- a/configs/mt8512_bm1_emmc_defconfig
+++ b/configs/mt8512_bm1_emmc_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_MTU3=y
+CONFIG_USB_MTU3_GADGET=y
# CONFIG_USB_MTU3_HOST is not set
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
--
2.18.0
[PATCH v3] pinctrl: renesas: pfc-r8a77990: Sync PFC tables with Linux 5.9
Sync the R8A77990 SoC PFC tables with Linux 5.9 , commit bbf5c979011a.
Signed-off-by: Lad Prabhakar
Reviewed-by: Biju Das
---
v2->v3
* Synced with Linux 5.9 instead of 5.8.
* Updated commit message.
v1->v2
* Updated commit message
* Synced with Linux 5.8 instead of 5.9.rc4
v1: https://patchwork.ozlabs.org/project/uboot/patch/
20200917150256.29721-1-prabhakar.mahadev-lad...@bp.renesas.com/
---
drivers/pinctrl/renesas/pfc-r8a77990.c | 57 ++
1 file changed, 30 insertions(+), 27 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c
b/drivers/pinctrl/renesas/pfc-r8a77990.c
index de22e49ebe..b13fc0ba63 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -217,8 +217,8 @@
#define IP2_11_8 FM(AVB_MDC) F_(0, 0)F_(0,
0)F_(0, 0)F_(0, 0)F_(0, 0)
F_(0, 0)F_(0, 0)F_(0, 0)F_(0, 0) F_(0, 0) F_(0, 0)
F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2_15_12 FM(BS_N)FM(PWM0_A)
FM(AVB_MAGIC) FM(VI4_CLK) F_(0, 0)
FM(TX3_C) F_(0, 0)FM(VI5_CLK_B) F_(0, 0)F_(0, 0) F_(0,
0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2_19_16 FM(RD_N)FM(PWM1_A)
FM(AVB_LINK)FM(VI4_FIELD) F_(0, 0)
FM(RX3_C) FM(FSCLKST2_N_A) FM(VI5_DATA0_B) F_(0, 0) F_(0, 0) F_(0,
0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP2_23_20 FM(RD_WR_N) FM(SCL7_A)
FM(AVB_AVTP_MATCH_A)FM(VI4_VSYNC_N) FM(TX5_B)
FM(SCK3_C) FM(PWM5_A) F_(0, 0)F_(0, 0)F_(0, 0) F_(0,
0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP2_27_24 FM(EX_WAIT0)FM(SDA7_A)
FM(AVB_AVTP_CAPTURE_A) FM(VI4_HSYNC_N) FM(RX5_B)
FM(PWM6_A) F_(0, 0)F_(0, 0)F_(0, 0)F_(0, 0) F_(0,
0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2_23_20 FM(RD_WR_N) FM(SCL7_A)
FM(AVB_AVTP_MATCH) FM(VI4_VSYNC_N) FM(TX5_B)
FM(SCK3_C) FM(PWM5_A) F_(0, 0)F_(0, 0)F_(0, 0) F_(0,
0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP2_27_24 FM(EX_WAIT0)FM(SDA7_A)
FM(AVB_AVTP_CAPTURE)FM(VI4_HSYNC_N) FM(RX5_B)
FM(PWM6_A) F_(0, 0)F_(0, 0)F_(0, 0)F_(0, 0) F_(0,
0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2_31_28 FM(A0) FM(IRQ0)
FM(PWM2_A) FM(MSIOF3_SS1_B)FM(VI5_CLK_A)
FM(DU_CDE) FM(HRX3_D) FM(IERX)FM(QSTB_QHE)F_(0, 0) F_(0,
0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3_3_0FM(A1) FM(IRQ1)
FM(PWM3_A) FM(DU_DOTCLKIN1)FM(VI5_DATA0_A)
FM(DU_DISP_CDE) FM(SDA6_B) FM(IETX)FM(QCPV_QDE)F_(0, 0) F_(0,
0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3_7_4FM(A2) FM(IRQ2)
FM(AVB_AVTP_PPS)FM(VI4_CLKENB) FM(VI5_DATA1_A)
FM(DU_DISP) FM(SCL6_B) F_(0, 0)FM(QSTVB_QVE) F_(0, 0) F_(0,
0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -433,6 +433,8 @@ FM(IP12_31_28) IP12_31_28 FM(IP13_31_28)
IP13_31_28 FM(IP14_31_28) IP14_31_28 FM
#define MOD_SEL0_1_0 REV4(FM(SEL_SPEED_PULSE_IF_0),
FM(SEL_SPEED_PULSE_IF_1), FM(SEL_SPEED_PULSE_IF_2), F_(0, 0))
/* MOD_SEL1 */ /* 0 */ /* 1 */
/* 2 */ /* 3 */ /* 4 */
/* 5 */ /* 6 */ /* 7 */
+#define MOD_SEL1_31FM(SEL_SIMCARD_0)
FM(SEL_SIMCARD_1)
+#define MOD_SEL1_30FM(SEL_SSI2_0) FM(SEL_SSI2_1)
#define MOD_SEL1_29FM(SEL_TIMER_TMU_0)
FM(SEL_TIMER_TMU_1)
#define MOD_SEL1_28FM(SEL_USB_20_CH0_0)
FM(SEL_USB_20_CH0_1)
#define MOD_SEL1_26FM(SEL_DRIF2_0) FM(SEL_DRIF2_1)
@@ -453,7 +455,8 @@ FM(IP12_31_28) IP12_31_28 FM(IP13_31_28)
IP13_31_28 FM(IP14_31_28) IP14_31_28 FM
#define PINMUX_MOD_SELS\
\
-MOD_SEL0_30_29 \
+ MOD_SEL1_31 \
+MOD_SEL0_30_29 MOD_SEL1_30 \
MOD_SEL1_29 \
MOD_SEL0_28MOD_SEL1_28 \
MOD_SEL0_27_26 \
@@ -619,7 +622,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP2_23_20, RD_WR_N),
PINMUX_IPSR_MSEL(IP2_23_20, SCL7_A, SEL_I2C7_0),
-
Re: [PATCH] env: sf: add support for env erase
On 10/9/20 7:00 PM, Sean Anderson wrote: On 10/9/20 12:43 PM, Harry Waschkeit wrote: Hi Sean, thanks for your try and sorry for the inconvenience my beginner's mistakes have caused :-( It is definitely no good idea to use copy with patch data, I should have guessed that beforehand ... You *can* do it, you just have to configure your mail client correctly. However, it gets pretty tedious when you have a lot of patches :) Yeah, guess so ... ;-/ I suggest configuring git send-email. If you are going to be making more patch series, also check out tools/patman. I'll definitely have a look at that, sooner or later. Anyway, concerning the complaints from checkpatch.pl: I indeed ran checkpatch.pl on my patch prior to sending it - the real one, not the one as pasted into the mail ;-/ The alignment warnings simply result from the fact that I adhered to the style used in that file already, you can easily verify that by running checkpatch.pl on the complete file. Please keep new code in the correct style. For example, you have + ret = spi_flash_read(env_flash, saved_offset, +saved_size, saved_buffer); which is aligned properly, but later on you have + ret = spi_flash_read(env_flash, saved_offset, + saved_size, saved_buffer); which is not. Ok, got it. For the warnings with "IS_ENABLED(CONFIG...)" I don't see what I could do to get around them: all three occurrences are about compiling functions into the code depending on CONFIG_CMD_ERASEENV. Two times it is the new function env_sf_erase(), one variant for normal and the other for redundand environment handling. The third time it is used to define this new method into the structure U_BOOT_ENV_LOCATION(sf). The macro IS_ENABLED can be used both in C code and in preprocessor directives. See include/linux/kconfig.h for details. Hmm, that's strange, I tried that one but the complaints remained. Chances are I did something wrong so I will have a look at kconfig.h to get also around that. The sign-off problem I guess is probably caused by the check not accepting name in reverse order, isn't it? Yes. The format is "First Last ". This will be the easiest part then :-) Anyway, I will change my user.name to match the order in the mail address so next patch is hopefully correct. So please let me know what else I should do beside sending a properly formatted patch ;-/ See below. I will take care of that before resending my patch (v2 then, right?). Yes. On 10/9/20 3:55 PM, Sean Anderson wrote: On 10/8/20 1:27 PM, Harry Waschkeit wrote: Command "env erase" didn't work even though CONFIG_CMD_ERASEENV was defined, because serial flash environment routines didn't implement erase method. Signed-off-by: Waschkeit, Harry --- Hi Harry, I wanted to test out your patch, but I couldn't get it to apply. It appears that your mail program has replaced the tabs with spaces, so git can't figure out how to apply it. I tried to fix it by performing the substitutions s/^\(.\) /\1\t/g s//\t/g but it still wouldn't apply. In addition, checkpatch has a few warnings: $ scripts/checkpatch.pl env-sf-add-support-for-env-erase.patch WARNING: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where possible #152: FILE: env/sf.c:149: +#ifdef CONFIG_CMD_ERASEENV WARNING: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where possible #240: FILE: env/sf.c:318: +#ifdef CONFIG_CMD_ERASEENV CHECK: Alignment should match open parenthesis #260: FILE: env/sf.c:338: +ret = spi_flash_read(env_flash, saved_offset, +saved_size, saved_buffer); CHECK: Alignment should match open parenthesis #269: FILE: env/sf.c:347: +ret = spi_flash_erase(env_flash, CONFIG_ENV_OFFSET, +sector * CONFIG_ENV_SECT_SIZE); CHECK: Alignment should match open parenthesis #276: FILE: env/sf.c:354: +ret = spi_flash_write(env_flash, saved_offset, +saved_size, saved_buffer); WARNING: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where possible #307: FILE: env/sf.c:437: +#if defined(CONFIG_CMD_ERASEENV) && defined(CONFIG_ENV_ADDR) WARNING: Missing Signed-off-by: line by nominal patch author 'Harry Waschkeit ' total: 0 errors, 4 warnings, 3 checks, 158 lines checked NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace. env-sf-add-support-for-env-erase.patch has style problems, please review. NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX MULTISTATEMENT_MACRO_USE_DO_WHILE NETWORKING_BLOCK_COMMENT_STYLE PREFER_ETHER_ADDR_COPY USLEEP_RANGE NOTE: If any of the errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS. Please fix these issues and resend, thanks! --Sean env/sf.c | 130
Re: [PATCH] video: rockchip: Add missing dpcd_write() call to link_train_ce()
On Tue, Oct 13, 2020 at 09:54:55AM -0600, Simon Glass wrote:
> Hi Alper,
>
> On Tue, 13 Oct 2020 at 09:01, Alper Nebi Yasak
> wrote:
> >
> > On 12/10/2020 06:34, Simon Glass wrote:
> > > On Tue, 6 Oct 2020 at 14:40, Alper Nebi Yasak
> > > wrote:
> > >>
> > >> Found this by comparing it to the coreboot driver, a form of this call
> > >> was introduced there in their commit b9a7877568cf ("rockchip/*: refactor
> > >> edp driver"). This is copy-pasted from U-Boot's link_train_cr() slightly
> > >> above it.
> > >>
> > >> Signed-off-by: Alper Nebi Yasak
> > >
> > > Reviewed-by: Simon Glass
> >
> > Simon, I noticed the coreboot driver is GPL-2.0-only, but the U-Boot
> > driver is GPL-2.0+, is that a problem for this patch?
> >
> > They also seem to be almost the same especially in their earlier
> > revisions (even had the same typos in some comments). It could be good
> > to sync the two drivers to pick improvements from it e.g. support for
> > rk3399 (though there's an RFC series for that [1]), but the license
> > difference makes it difficult. Could the coreboot parts be relicensed to
> > GPL-2.0+ by Google and/or Rockchip? Alternatively, is it OK to change
> > the U-Boot one to GPL-2.0-only to sync things from coreboot?
>
> I think it is OK to change the file to GPL2. I'm not sure if changing
> coreboot parts to 2.0+ is an option. I believe the use of 2+ in U-Boot
> is for fairly narrow reasons, but I'm not sure if that is documented
> anywhere.
>
> +Tom Rini might have a comment
Ugh. In so far as anything can be re-licensed, who did it all
originally? I suspect coreboot isn't interested in 2.0+ but we can do
2.0-only.
--
Tom
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Re: [PATCH V2 00/12] imx: doc update
On Wed, Oct 14, 2020 at 05:11:58PM +0800, Peng Fan wrote: > V2: > Migrate README to doc/board/freescale > patch 1 is not changed. Thanks for doing this! -- Tom signature.asc Description: PGP signature
Re: [PATCH] mtd: spi-nor-ids: Add Winbond W25M512JV flash entry
On Thu, Sep 17, 2020 at 3:50 PM Lad Prabhakar
wrote:
>
> Add Winbond W25M512JV flash device description.
>
> Linux already has the flash entry present. A snippet below:
> { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024...},
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Biju Das
> ---
> drivers/mtd/spi/spi-nor-ids.c | 1 +
> 1 file changed, 1 insertion(+)
>
Gentle ping.
Cheers,
Prabhakar
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index 114ebacde1..4ed997706a 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -314,6 +314,7 @@ const struct flash_info spi_nor_ids[] = {
> { INFO("w25q64cv", 0xef4017, 0, 64 * 1024, 128, SECT_4K |
> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K |
> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> { INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K |
> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> + { INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K |
> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> #endif
> #ifdef CONFIG_SPI_FLASH_XMC
> /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
> --
> 2.17.1
>
[PATCH v3 2/2] clk: renesas: Add R8A774E1 clock tables
This sync's the RZ/G2H clock tables with mainline linux 5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das
Reviewed-by: Lad Prabhakar
---
V2->V3
* Synced with Linux 5.9.
* Updated commit message.
V1->V2
* Rebased to u-boot-sh master.
---
arch/arm/mach-rmobile/Kconfig.64| 1 +
drivers/clk/renesas/Kconfig | 6 +
drivers/clk/renesas/Makefile| 1 +
drivers/clk/renesas/r8a774e1-cpg-mssr.c | 358
4 files changed, 366 insertions(+)
create mode 100644 drivers/clk/renesas/r8a774e1-cpg-mssr.c
diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index 2bf17ddc24..59cb072096 100644
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -11,6 +11,7 @@ config R8A774B1
config R8A774E1
bool "Renesas SoC R8A774E1"
+ imply CLK_R8A774E1
config R8A7795
bool "Renesas SoC R8A7795"
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index 00a173b8c8..44afcecbfa 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -61,6 +61,12 @@ config CLK_R8A774B1
help
Enable this to support the clocks on Renesas R8A774B1 SoC.
+config CLK_R8A774E1
+ bool "Renesas R8A774E1 clock driver"
+ depends on CLK_RCAR_GEN3
+ help
+ Enable this to support the clocks on Renesas R8A774E1 SoC.
+
config CLK_R8A7795
bool "Renesas R8A7795 clock driver"
depends on CLK_RCAR_GEN3
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 2e8d796f89..da353e811d 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -2,6 +2,7 @@ obj-$(CONFIG_CLK_RENESAS) += renesas-cpg-mssr.o
obj-$(CONFIG_CLK_RCAR_GEN2) += clk-rcar-gen2.o
obj-$(CONFIG_CLK_R8A774A1) += r8a774a1-cpg-mssr.o
obj-$(CONFIG_CLK_R8A774B1) += r8a774b1-cpg-mssr.o
+obj-$(CONFIG_CLK_R8A774E1) += r8a774e1-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7791) += r8a7791-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
diff --git a/drivers/clk/renesas/r8a774e1-cpg-mssr.c
b/drivers/clk/renesas/r8a774e1-cpg-mssr.c
new file mode 100644
index 00..6cce007aa1
--- /dev/null
+++ b/drivers/clk/renesas/r8a774e1-cpg-mssr.c
@@ -0,0 +1,358 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * r8a774e1 Clock Pulse Generator / Module Standby and Software Reset
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ *
+ * Based on r8a7795-cpg-mssr.c
+ *
+ * Copyright (C) 2015 Glider bvba
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+
+#include "renesas-cpg-mssr.h"
+#include "rcar-gen3-cpg.h"
+
+enum clk_ids {
+ /* Core Clock Outputs exported to DT */
+ LAST_DT_CORE_CLK = R8A774E1_CLK_CANFD,
+
+ /* External Input Clocks */
+ CLK_EXTAL,
+ CLK_EXTALR,
+
+ /* Internal Core Clocks */
+ CLK_MAIN,
+ CLK_PLL0,
+ CLK_PLL1,
+ CLK_PLL2,
+ CLK_PLL3,
+ CLK_PLL4,
+ CLK_PLL1_DIV2,
+ CLK_PLL1_DIV4,
+ CLK_S0,
+ CLK_S1,
+ CLK_S2,
+ CLK_S3,
+ CLK_SDSRC,
+ CLK_RPCSRC,
+ CLK_RINT,
+
+ /* Module Clocks */
+ MOD_CLK_BASE
+};
+
+static const struct cpg_core_clk r8a774e1_core_clks[] = {
+ /* External Clock Inputs */
+ DEF_INPUT("extal", CLK_EXTAL),
+ DEF_INPUT("extalr", CLK_EXTALR),
+
+ /* Internal Core Clocks */
+ DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
+ DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
+ DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
+ DEF_BASE(".pll2", CLK_PLL2, CLK_TYPE_GEN3_PLL2, CLK_MAIN),
+ DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
+ DEF_BASE(".pll4", CLK_PLL4, CLK_TYPE_GEN3_PLL4, CLK_MAIN),
+
+ DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
+ DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s0",CLK_S0,CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s1",CLK_S1,CLK_PLL1_DIV2, 3, 1),
+ DEF_FIXED(".s2",CLK_S2,CLK_PLL1_DIV2, 4, 1),
+ DEF_FIXED(".s3",CLK_S3,CLK_PLL1_DIV2, 6, 1),
+ DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
+ DEF_BASE(".rpcsrc", CLK_RPCSRC, CLK_TYPE_GEN3_RPCSRC, CLK_PLL1),
+
+ DEF_BASE("rpc", R8A774E1_CLK_RPC, CLK_TYPE_GEN3_RPC,
+CLK_RPCSRC),
+ DEF_BASE("rpcd2", R8A774E1_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,
+R8A774E1_CLK_RPC),
+
+ DEF_GEN3_OSC(".r", CLK_RINT, CLK_EXTAL, 32),
+
+ /* Core Clock Outputs */
+ DEF_GEN3_Z("z", R8A774E1_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0,
2, 8),
+ DEF_GEN3_Z("z2",R8A774E1_CLK_Z2,CLK_TYPE_GEN3_Z,
Re: [PATCH 2/2] spl: Add SPL_SERIAL as requirement for SDP_USB_SDP
On Tue, Sep 29, 2020 at 11:14:29PM -0300, Otavio Salvador wrote: > The USB SDP protocol require the SPL serial support to allow the build > to succeed. > > Signed-off-by: Otavio Salvador Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 1/3] global_data.h: convert GD_FLG_* to enum
On Mon, Oct 05, 2020 at 08:30:08AM +0200, Heinrich Schuchardt wrote: > Sphinx documentation is only available for enums not for #defines. > Anyway it is better to keep related definitions in an enum. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 2/2] checkpatch.pl: Make CONFIG_IS_ENABLED(CONFIG_*) an error
On Mon, Oct 05, 2020 at 09:57:30AM +0300, Alper Nebi Yasak wrote: > CONFIG_IS_ENABLED() takes the kconfig name without the CONFIG_ prefix, > e.g. CONFIG_IS_ENABLED(CLK) for CONFIG_CLK. Make including the prefix > an error in checkpatch.pl so calls in the wrong format aren't > accidentally reintroduced. > > Signed-off-by: Alper Nebi Yasak > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v5 1/3] cmd: Add command to display or save Linux PStore dumps
On Fri, Mar 20, 2020 at 10:59:22AM +0100, Frédéric Danis wrote: > This patch adds a new pstore command allowing to display or save ramoops > logs (oops, panic, console, ftrace and user) generated by a previous > kernel crash. > PStore parameters can be set in U-Boot configuration file, or at run-time > using "pstore set" command. Records size should be the same as the ones > used by kernel, and should be a power of 2. > This command allows: > - to display uncompressed logs > - to save compressed or uncompressed logs, compressed logs are saved as a > compressed stream, it may need some work to be able to decompress it, > e.g. adding a fake header: > "printf "\x1f\x8b\x08\x00\x00\x00\x00\x00\x00\x00" | > cat - dmesg-ramoops-0.enc.z | gzip -dc" > - ECC part is not used to check memory corruption > - only 1st FTrace log is displayed or saved > > Signed-off-by: Frédéric Danis > Cc: Tom Rini > Cc: Heinrich Schuchardt > Cc: Wolfgang Denk > Cc: Heiko Schocher Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] bootm: add {arch,board}_preboot_os() to bootm.h
On Tue, Sep 15, 2020 at 01:58:11AM +0200, Heinrich Schuchardt wrote: > Functions that are used in multiple C modules should be defined in an > include. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Michael Walle Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 2/3] global_data.h: add Sphinx documentation
On Mon, Oct 05, 2020 at 08:30:09AM +0200, Heinrich Schuchardt wrote: > Add the missing Sphinx documentation for struct global_data and > gd_board_type(). > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 3/3] doc: global data pointer
On Mon, Oct 05, 2020 at 08:30:10AM +0200, Heinrich Schuchardt wrote: > Add the description of the global data pointer to the generated HTML > documentation. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 1/2] treewide: Fix wrong CONFIG_IS_ENABLED() handling
On Mon, Oct 05, 2020 at 09:57:29AM +0300, Alper Nebi Yasak wrote:
> CONFIG_IS_ENABLED() takes the kconfig name without the CONFIG_ prefix,
> e.g. CONFIG_IS_ENABLED(CLK) for CONFIG_CLK. Some of these were being
> fixed every now and then, see:
>
> commit 71ba2cb0d678 ("board: stm32mp1: correct CONFIG_IS_ENABLED usage
> for LED")
> commit a5ada25e4213 ("rockchip: clk: fix wrong CONFIG_IS_ENABLED
> handling")
> commit 5daf6e56d36c ("common: console: Fix duplicated CONFIG in silent
> env callback")
> commit 48bfc31b6484 ("MIPS: bootm: Fix broken boot_env_legacy codepath")
>
> Fix all files found by `git grep "CONFIG_IS_ENABLED(CONFIG"` by running
> ':%s/CONFIG_IS_ENABLED(CONFIG_\(\w+\))/CONFIG_IS_ENABLED(\1)/g' in vim.
>
> Signed-off-by: Alper Nebi Yasak
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Re: [PATCH v2] net: e1000: add defaults for i210 TX/RX PBSIZE
On Tue, Oct 06, 2020 at 04:08:35PM +0200, Christian Gmeiner wrote: > Set the defaults on probe for the packet buffer size registers > for the i210. > > The TX/RX PBSIZE register of the i210 resets to its default value > only at power-on - see Intel Ethernet Controller I210 Datasheet rev 3.5 > chapter 8.3 'Internal Packet Buffer Size Registers'. > > If something (another driver, another OS, etc.) modifies this register > from its default value, the e1000 driver doesn't function correctly. It > detects a hang of the transmitter and continuously resets the adapter. > Here we set this value to its default when resetting the i210 to > resolve this issue. > > Signed-off-by: Christian Gmeiner Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v5 2/3] test: Add PStore command tests
On Fri, Mar 20, 2020 at 10:59:23AM +0100, Frédéric Danis wrote: > Add PStore command to sandbox and sandbox64 defconfigs. > Add test checking: > - 'pstore display' of all records > - 'pstore display' only the 2nd dump record > - 'pstore save' of all records > > Signed-off-by: Frédéric Danis > Cc: Tom Rini > Cc: Heinrich Schuchardt > Cc: Wolfgang Denk > Cc: Heiko Schocher With the test files supplied off-list and some minor changes to ensure it works reliably with separate source/build/run directories: Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] doc: Sphinx.override_domain() deprecated
On Tue, Oct 06, 2020 at 05:56:59PM +0200, Heinrich Schuchardt wrote: > Sphinx.override_domain() is deprecated since Sphinx 1.8 and removed in > Sphinx 3. > > Use Sphinx.add_domain(, override=True) instead. > > Signed-off-by: Heinrich Schuchardt Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v5 3/3] cmd: Fixup DT to pass PStore Ramoops parameters
On Fri, Mar 20, 2020 at 10:59:24AM +0100, Frédéric Danis wrote: > To simplify configuration and keep synchronized the PStore/Ramoops between > U-Boot and the Linux kernel, this commit dynamically adds the Ramoops > parameters defined in the U-Boot session to the Device Tree. > > Signed-off-by: Frédéric Danis > Cc: Tom Rini > Cc: Heinrich Schuchardt > Cc: Wolfgang Denk > Cc: Heiko Schocher Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
[PATCH v3 1/2] clk: renesas: Add R8A774B1 clock tables
This sync's the RZ/G2N clock tables with mainline linux 5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das
Reviewed-by: Lad Prabhakar
---
V2->V3
* Synced with Linux 5.9.
* Updated commit message.
V1->V2
* Rebased to u-boot-sh master.
---
arch/arm/mach-rmobile/Kconfig.64| 1 +
drivers/clk/renesas/Kconfig | 6 +
drivers/clk/renesas/Makefile| 1 +
drivers/clk/renesas/r8a774b1-cpg-mssr.c | 336
4 files changed, 344 insertions(+)
create mode 100644 drivers/clk/renesas/r8a774b1-cpg-mssr.c
diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index 0d55b74c42..2bf17ddc24 100644
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -7,6 +7,7 @@ config R8A774A1
config R8A774B1
bool "Renesas SoC R8A774B1"
+ imply CLK_R8A774B1
config R8A774E1
bool "Renesas SoC R8A774E1"
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index 284e2138b3..00a173b8c8 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -55,6 +55,12 @@ config CLK_R8A774A1
help
Enable this to support the clocks on Renesas R8A774A1 SoC.
+config CLK_R8A774B1
+ bool "Renesas R8A774B1 clock driver"
+ depends on CLK_RCAR_GEN3
+ help
+ Enable this to support the clocks on Renesas R8A774B1 SoC.
+
config CLK_R8A7795
bool "Renesas R8A7795 clock driver"
depends on CLK_RCAR_GEN3
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index dd599b757e..2e8d796f89 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_CLK_RENESAS) += renesas-cpg-mssr.o
obj-$(CONFIG_CLK_RCAR_GEN2) += clk-rcar-gen2.o
obj-$(CONFIG_CLK_R8A774A1) += r8a774a1-cpg-mssr.o
+obj-$(CONFIG_CLK_R8A774B1) += r8a774b1-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7791) += r8a7791-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
diff --git a/drivers/clk/renesas/r8a774b1-cpg-mssr.c
b/drivers/clk/renesas/r8a774b1-cpg-mssr.c
new file mode 100644
index 00..7b6947b5b9
--- /dev/null
+++ b/drivers/clk/renesas/r8a774b1-cpg-mssr.c
@@ -0,0 +1,336 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * r8a774b1 Clock Pulse Generator / Module Standby and Software Reset
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ *
+ * Based on r8a7796-cpg-mssr.c
+ *
+ * Copyright (C) 2016 Glider bvba
+ */
+
+#include
+#include
+#include
+
+#include
+
+#include "renesas-cpg-mssr.h"
+#include "rcar-gen3-cpg.h"
+
+enum clk_ids {
+ /* Core Clock Outputs exported to DT */
+ LAST_DT_CORE_CLK = R8A774B1_CLK_CANFD,
+
+ /* External Input Clocks */
+ CLK_EXTAL,
+ CLK_EXTALR,
+
+ /* Internal Core Clocks */
+ CLK_MAIN,
+ CLK_PLL0,
+ CLK_PLL1,
+ CLK_PLL3,
+ CLK_PLL4,
+ CLK_PLL1_DIV2,
+ CLK_PLL1_DIV4,
+ CLK_S0,
+ CLK_S1,
+ CLK_S2,
+ CLK_S3,
+ CLK_SDSRC,
+ CLK_RINT,
+
+ /* Module Clocks */
+ MOD_CLK_BASE
+};
+
+static const struct cpg_core_clk r8a774b1_core_clks[] = {
+ /* External Clock Inputs */
+ DEF_INPUT("extal", CLK_EXTAL),
+ DEF_INPUT("extalr", CLK_EXTALR),
+
+ /* Internal Core Clocks */
+ DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
+ DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
+ DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
+ DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
+ DEF_BASE(".pll4", CLK_PLL4, CLK_TYPE_GEN3_PLL4, CLK_MAIN),
+
+ DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
+ DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s0",CLK_S0,CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s1",CLK_S1,CLK_PLL1_DIV2, 3, 1),
+ DEF_FIXED(".s2",CLK_S2,CLK_PLL1_DIV2, 4, 1),
+ DEF_FIXED(".s3",CLK_S3,CLK_PLL1_DIV2, 6, 1),
+ DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
+
+ DEF_GEN3_OSC(".r", CLK_RINT, CLK_EXTAL, 32),
+
+ /* Core Clock Outputs */
+ DEF_GEN3_Z("z", R8A774B1_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0,
2, 8),
+ DEF_FIXED("ztr",R8A774B1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
+ DEF_FIXED("ztrd2", R8A774B1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
+ DEF_FIXED("zt", R8A774B1_CLK_ZT,CLK_PLL1_DIV2, 4, 1),
+ DEF_FIXED("zx", R8A774B1_CLK_ZX,CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED("s0d1", R8A774B1_CLK_S0D1, CLK_S0, 1, 1),
+ DEF_FIXED("s0d2", R8A774B1_CLK_S0D2, CLK_S0, 2, 1),
+ DEF_FIXED("s0d3", R8A774B1_CLK_S0D3, CLK_S0, 3, 1),
+
[PATCH v3 0/2] Add Clock driver support for RZ/G2[HN] SoC's
Add Clock driver support for RZ/G2[HN] SoC's. This patches are based on u-boot-sh master. Biju Das (2): clk: renesas: Add R8A774B1 clock tables clk: renesas: Add R8A774E1 clock tables arch/arm/mach-rmobile/Kconfig.64| 2 + drivers/clk/renesas/Kconfig | 12 + drivers/clk/renesas/Makefile| 2 + drivers/clk/renesas/r8a774b1-cpg-mssr.c | 336 ++ drivers/clk/renesas/r8a774e1-cpg-mssr.c | 358 5 files changed, 710 insertions(+) create mode 100644 drivers/clk/renesas/r8a774b1-cpg-mssr.c create mode 100644 drivers/clk/renesas/r8a774e1-cpg-mssr.c -- 2.17.1
Re: [PATCH 2/2] env/ext4.c: allow loading from an EXT4 partition on the MMC boot device
On Tue, Aug 04, 2020 at 10:05:47AM +0100, David Woodhouse wrote: > This parallels what I added for FAT in commit 6731bef6966, allowing the > environment to be found in a specific partition on the device that the > board's mmc_get_env_dev() returns. On the Banana Pi R2 that means the > device that U-Boot was loaded from; either the internal eMMC or an SD > card. > > Signed-off-by: David Woodhouse Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/2] mmc: remove duplicate mmc_get_env_dev() implementations
On Tue, Aug 04, 2020 at 10:05:46AM +0100, David Woodhouse wrote: > Since it's so trivial I could just about tolerate this when there were only > two copies of it. But now there are about to be three. > > Signed-off-by: David Woodhouse Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] spl: Avoid printing boot device if silent console is enabled
On Thu, Sep 03, 2020 at 02:25:15PM -0300, Otavio Salvador wrote: > Signed-off-by: Otavio Salvador > Reviewed-by: Tom Rini > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] time: Fix get_ticks being non-monotonic
On Wed, Sep 09, 2020 at 04:24:56PM -0400, Sean Anderson wrote: > get_ticks does not always succeed. Sometimes it can be called before the > timer has been initialized. If it does, it returns a negative errno. > This causes the timer to appear non-monotonic, because the value will > become much smaller after the timer is initialized. > > No users of get_ticks which I checked handle errors of this kind. Further, > functions like tick_to_time mangle the result of get_ticks, making it very > unlikely that one could check for an error without suggesting a patch such > as this one. > > This patch panics if we ever get an error. There are two cases in which > this can occur. The first is if we couldn't find/probe the timer for some > reason. One reason for this is if the timer is not available so early. This > likely indicates misconfiguration. Another reason is that the timer has an > invalid/missing device tree binding. In this case, panicing is also > correct. The second case covers errors calling get_count. This can only > occur if the timer is missing a get_count function (or on RISC-V, but that > should be fixed soon). > > Fixes: c8a7ba9e6a5 > Signed-off-by: Sean Anderson > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 1/3] test: sharpen button label unit test
On Mon, Sep 14, 2020 at 12:50:54PM +0200, Heinrich Schuchardt wrote: > Using different strings for the device tree node labels and the label > property of buttons sharpens the button label unit test. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Philippe Reynes Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 3/3] cmd/button: return button status
On Mon, Sep 14, 2020 at 12:50:56PM +0200, Heinrich Schuchardt wrote: > To make the button command useful in a shell script it should return the > status of the button: > > * 0 (true) - pressed, on > * 1 (false) - not pressed, off > > The button command takes only one argument. Correct maxargs. > > Adjust the Python unit test. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Philippe Reynes Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] arm: enable DM_RNG on QEMU by default
On Sat, Sep 19, 2020 at 07:55:35AM +0200, Heinrich Schuchardt wrote: > The EFI_RNG_PROTOCOL is needed for address randomization in Linux. > We should provide it by default on QEMU. > > Reported-by: François Ozog > Signed-off-by: Heinrich Schuchardt Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] cmd: fat: Use do_save() for fatwrite
On Tue, Sep 29, 2020 at 08:13:00AM +0100, Lad Prabhakar wrote: > do_save() function defined in fs.c also supports FAT file system > re-use the same for fatwrite command. > > Signed-off-by: Lad Prabhakar > Reviewed-by: Biju Das > --- > cmd/fat.c | 43 +-- > 1 file changed, 1 insertion(+), 42 deletions(-) This causes a bunch of the FAT tests in test/py/ to fail, please investigate and re-post, thanks. -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 2/3] drivers: gpio: keep output value for input on sandbox
On Mon, Sep 14, 2020 at 12:50:55PM +0200, Heinrich Schuchardt wrote: > For testing purposes keep the output value when switching to input. > This allows us to manipulate the input value via the gpio command. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Philippe Reynes Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v4 07/27] rockchip: Enable building a SPI ROM image on bob
Hello,
> On 11 Oct 2020, at 16:39, Emmanuel Vadot wrote:
>
>
> Hi Simon,
>
> On Sun, 19 Jul 2020 13:55:58 -0600
> Simon Glass wrote:
>
>> Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot
>> produces a ROM for bob.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> Changes in v4:
>> - Use CONFIG_ROCKCHIP_SPI_IMAGE to select the image
>>
>> arch/arm/dts/rk3399-gru-u-boot.dtsi | 4
>> arch/arm/dts/rk3399-gru.dtsi | 2 +-
>> arch/arm/dts/rk3399-u-boot.dtsi | 27 +++
>> arch/arm/mach-rockchip/rk3399/Kconfig | 2 ++
>> 4 files changed, 34 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi
>> b/arch/arm/dts/rk3399-gru-u-boot.dtsi
>> index 7bddc3acdb..390ac2bb5a 100644
>> --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
>> @@ -4,3 +4,7 @@
>> */
>>
>> #include "rk3399-u-boot.dtsi"
>> +
>> +_flash {
>> +u-boot,dm-pre-reloc;
>> +};
>> diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi
>> index 7ac88392f2..f9c5bb607b 100644
>> --- a/arch/arm/dts/rk3399-gru.dtsi
>> +++ b/arch/arm/dts/rk3399-gru.dtsi
>> @@ -537,7 +537,7 @@ ap_i2c_audio: {
>> pinctrl-names = "default", "sleep";
>> pinctrl-1 = <_sleep>;
>>
>> -spiflash@0 {
>> +spi_flash: spiflash@0 {
>> compatible = "jedec,spi-nor";
>> reg = <0>;
>>
>> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi
>> b/arch/arm/dts/rk3399-u-boot.dtsi
>> index 8237782408..ecd230c720 100644
>> --- a/arch/arm/dts/rk3399-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
>> @@ -4,11 +4,14 @@
>> */
>> #define USB_CLASS_HUB9
>>
>> +#include "rockchip-u-boot.dtsi"
>> +
>> / {
>> aliases {
>> mmc0 =
>> mmc1 =
>> pci0 =
>> +spi1 =
>
> I don't really understand why but this added alias break spi flash
> detection on rockpro64.
> Removing it make it work again.
I've noticed the same problem - rockpro64 already had an alias
spi0 =
so after this change there are spi0 and spi1 aliases pointing to
In U-Boot proper, that seems to cause the SPI flash to appear on bus 1
rather than the former bus 0, e.g. sf probe 1:0 works but sf probe 0:0
doesn't.
So I tried removing the spi0 alias and setting CONFIG_SF_DEFAULT_BUS=1
which fixed the flash detection in U-Boot proper, but now the SPL can't
load U-Boot from SPI flash - it fails with an "Invalid bus 1 (err=-19)"
It seems like SPL doesn't pay attention to the spi1 alias in the same
way that U-boot proper does, I haven't yet figured out why.
>
> Cheers,
>
>> };
>>
>> cic: syscon@ff62 {
>> @@ -57,6 +60,30 @@
>>
>> };
>>
>> +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
>> + {
>> +rom {
>> +filename = "u-boot.rom";
>> +size = <0x40>;
>> +pad-byte = <0xff>;
>> +
>> +mkimage {
>> +args = "-n rk3399 -T rkspi";
>> +u-boot-spl {
>> +};
>> +};
>> +u-boot-img {
>> +offset = <0x4>;
>> +};
>> +u-boot {
>> +offset = <0x30>;
>> +};
>> +fdtmap {
>> +};
>> +};
>> +};
>> +#endif
>> +
>> {
>> u-boot,dm-pre-reloc;
>> };
>> diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig
>> b/arch/arm/mach-rockchip/rk3399/Kconfig
>> index 254b9c5b4d..17628f9171 100644
>> --- a/arch/arm/mach-rockchip/rk3399/Kconfig
>> +++ b/arch/arm/mach-rockchip/rk3399/Kconfig
>> @@ -5,6 +5,8 @@ choice
>>
>> config TARGET_CHROMEBOOK_BOB
>> bool "Asus Flip C101PA Chromebook (RK3399)"
>> +select HAS_ROM
>> +select ROCKCHIP_SPI_IMAGE
>> help
>>Bob is a small RK3299-based device similar in apperance to Minnie.
>>It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 10.1",
>> --
>> 2.28.0.rc0.105.gf9edc3c819-goog
>>
>
>
> --
> Emmanuel Vadot
Re: [PATCH] video: rockchip: Add missing dpcd_write() call to link_train_ce()
On 14/10/2020 18:24, Tom Rini wrote:
> On Tue, Oct 13, 2020 at 09:54:55AM -0600, Simon Glass wrote:
>> I think it is OK to change the file to GPL2. I'm not sure if changing
>> coreboot parts to 2.0+ is an option. I believe the use of 2+ in U-Boot
>> is for fairly narrow reasons, but I'm not sure if that is documented
>> anywhere.
>>
>> +Tom Rini might have a comment
>
> Ugh. In so far as anything can be re-licensed, who did it all
> originally? I suspect coreboot isn't interested in 2.0+ but we can do
> 2.0-only.
For this patch, coreboot commit b9a7877568cf ("rockchip/*: refactor edp
driver") introduces the related change to src/soc/rockchip/common/edp.c
renamed from .../rk3288/edp.c, which was introduced at coreboot commit
40f558e8f4f7 ("rockchip: support display").
$ git shortlog -s -e b9a7877568cf -- src/soc/rockchip/{common,rk3288}/edp.c
> 2 Julius Werner
> 1 Lin Huang
> 1 Patrick Georgi
> 1 Patrick Georgi
> 4 huang lin
The sign-offs are:
$ git log b9a7877568cf -- src/soc/rockchip/{common,rk3288}/edp.c \
| grep -i "Signed-off-by:" | sort -u
>Original-Signed-off-by: huang lin
>Original-Signed-off-by: Julius Werner
>Original-Signed-off-by: Lin Huang
>Signed-off-by: Patrick Georgi
>Signed-off-by: Stefan Reinauer
That file at that refactor-commit has two more fixes I'm interested in,
and it's not the only file things could be ported from. If I run the
above on a wider list of files upto current master I get 16 authors or
20 signoffs with duplicates (including e.g. original-signed-off-by),
most of them either @google.com, @chromium.org, or @rock-chips.com.
$ git shortlog -s -e --
src/soc/rockchip/{common,rk3288,rk3399}/{include/soc/,include/,}{edp,vop,display,mipi}{.c,.h}
> 1 Angel Pons
> 1 Arthur Heymans
> 3 David Hendricks
> 1 Ege Mihmanli
>15 Elyes HAOUAS
> 1 Jacob Garber
> 7 Julius Werner
> 1 Kyösti Mälkki
>13 Lin Huang
> 1 Martin Roth
> 2 Nickey Yang
> 1 Patrick Georgi
> 3 Patrick Georgi
> 2 Shunqian Zheng
> 2 Yakir Yang
> 5 huang lin
$ git log --
src/soc/rockchip/{common,rk3288,rk3399}/{include/soc/,include/,}{edp,vop,display,mipi}{.c,.h}
\
| grep -i "Signed-off-by:" | sort -u
>Original-Signed-off-by: David Hendricks
>Original-Signed-off-by: huang lin
>Original-Signed-off-by: Julius Werner
>Original-Signed-off-by: Lin Huang
>Original-Signed-off-by: Shunqian Zheng
>Original-Signed-off-by: Yakir Yang
>Signed-off-by: Angel Pons
>Signed-off-by: Arthur Heymans
>Signed-off-by: Ege Mihmanli
>Signed-off-by: Elyes HAOUAS
>Signed-off-by: Jacob Garber
>Signed-off-by: Julius Werner
>Signed-off-by: Kyösti Mälkki
>Signed-off-by: Lin Huang
>Signed-off-by: Martin Roth
>Signed-off-by: Nickey Yang
>Signed-off-by: Patrick Georgi
>Signed-off-by: Patrick Georgi
>Signed-off-by: Patrick Georgi
>Signed-off-by: Stefan Reinauer
(There's also hdmi{.c,.h} licensed w/ GPL-2.0-or-later, and clock{.c,.h}
for which the U-Boot counterpart is already "GPL-2.0" assuming thats
GPL-2.0-only, so I've excluded both.)
Re: [PATCH] video: rockchip: Add missing dpcd_write() call to link_train_ce()
Hi,
On Wed, 14 Oct 2020 at 09:24, Tom Rini wrote:
>
> On Tue, Oct 13, 2020 at 09:54:55AM -0600, Simon Glass wrote:
> > Hi Alper,
> >
> > On Tue, 13 Oct 2020 at 09:01, Alper Nebi Yasak
> > wrote:
> > >
> > > On 12/10/2020 06:34, Simon Glass wrote:
> > > > On Tue, 6 Oct 2020 at 14:40, Alper Nebi Yasak
> > > > wrote:
> > > >>
> > > >> Found this by comparing it to the coreboot driver, a form of this call
> > > >> was introduced there in their commit b9a7877568cf ("rockchip/*:
> > > >> refactor
> > > >> edp driver"). This is copy-pasted from U-Boot's link_train_cr()
> > > >> slightly
> > > >> above it.
> > > >>
> > > >> Signed-off-by: Alper Nebi Yasak
> > > >
> > > > Reviewed-by: Simon Glass
> > >
> > > Simon, I noticed the coreboot driver is GPL-2.0-only, but the U-Boot
> > > driver is GPL-2.0+, is that a problem for this patch?
> > >
> > > They also seem to be almost the same especially in their earlier
> > > revisions (even had the same typos in some comments). It could be good
> > > to sync the two drivers to pick improvements from it e.g. support for
> > > rk3399 (though there's an RFC series for that [1]), but the license
> > > difference makes it difficult. Could the coreboot parts be relicensed to
> > > GPL-2.0+ by Google and/or Rockchip? Alternatively, is it OK to change
> > > the U-Boot one to GPL-2.0-only to sync things from coreboot?
> >
> > I think it is OK to change the file to GPL2. I'm not sure if changing
> > coreboot parts to 2.0+ is an option. I believe the use of 2+ in U-Boot
> > is for fairly narrow reasons, but I'm not sure if that is documented
> > anywhere.
> >
> > +Tom Rini might have a comment
>
> Ugh. In so far as anything can be re-licensed, who did it all
> originally? I suspect coreboot isn't interested in 2.0+ but we can do
> 2.0-only.
Well I think the Rockchip engineers wrote it originally, so perhaps
they can just relicense when contributing to another project.
Regards,
Simon
Re: [PATCH] video: rockchip: Add missing dpcd_write() call to link_train_ce()
On Wed, Oct 14, 2020 at 09:58:28PM +0300, Alper Nebi Yasak wrote:
> On 14/10/2020 18:24, Tom Rini wrote:
> > On Tue, Oct 13, 2020 at 09:54:55AM -0600, Simon Glass wrote:
> >> I think it is OK to change the file to GPL2. I'm not sure if changing
> >> coreboot parts to 2.0+ is an option. I believe the use of 2+ in U-Boot
> >> is for fairly narrow reasons, but I'm not sure if that is documented
> >> anywhere.
> >>
> >> +Tom Rini might have a comment
> >
> > Ugh. In so far as anything can be re-licensed, who did it all
> > originally? I suspect coreboot isn't interested in 2.0+ but we can do
> > 2.0-only.
>
> For this patch, coreboot commit b9a7877568cf ("rockchip/*: refactor edp
> driver") introduces the related change to src/soc/rockchip/common/edp.c
> renamed from .../rk3288/edp.c, which was introduced at coreboot commit
> 40f558e8f4f7 ("rockchip: support display").
>
> $ git shortlog -s -e b9a7877568cf --
> src/soc/rockchip/{common,rk3288}/edp.c
> > 2 Julius Werner
> > 1 Lin Huang
> > 1 Patrick Georgi
> > 1 Patrick Georgi
> > 4 huang lin
>
> The sign-offs are:
>
> $ git log b9a7877568cf -- src/soc/rockchip/{common,rk3288}/edp.c \
> | grep -i "Signed-off-by:" | sort -u
> >Original-Signed-off-by: huang lin
> >Original-Signed-off-by: Julius Werner
> >Original-Signed-off-by: Lin Huang
> >Signed-off-by: Patrick Georgi
> >Signed-off-by: Stefan Reinauer
>
> That file at that refactor-commit has two more fixes I'm interested in,
> and it's not the only file things could be ported from. If I run the
> above on a wider list of files upto current master I get 16 authors or
> 20 signoffs with duplicates (including e.g. original-signed-off-by),
> most of them either @google.com, @chromium.org, or @rock-chips.com.
>
> $ git shortlog -s -e --
> src/soc/rockchip/{common,rk3288,rk3399}/{include/soc/,include/,}{edp,vop,display,mipi}{.c,.h}
> > 1 Angel Pons
> > 1 Arthur Heymans
> > 3 David Hendricks
> > 1 Ege Mihmanli
> >15 Elyes HAOUAS
> > 1 Jacob Garber
> > 7 Julius Werner
> > 1 Kyösti Mälkki
> >13 Lin Huang
> > 1 Martin Roth
> > 2 Nickey Yang
> > 1 Patrick Georgi
> > 3 Patrick Georgi
> > 2 Shunqian Zheng
> > 2 Yakir Yang
> > 5 huang lin
>
> $ git log --
> src/soc/rockchip/{common,rk3288,rk3399}/{include/soc/,include/,}{edp,vop,display,mipi}{.c,.h}
> \
> | grep -i "Signed-off-by:" | sort -u
> >Original-Signed-off-by: David Hendricks
> >Original-Signed-off-by: huang lin
> >Original-Signed-off-by: Julius Werner
> >Original-Signed-off-by: Lin Huang
> >Original-Signed-off-by: Shunqian Zheng
> >Original-Signed-off-by: Yakir Yang
> >Signed-off-by: Angel Pons
> >Signed-off-by: Arthur Heymans
> >Signed-off-by: Ege Mihmanli
> >Signed-off-by: Elyes HAOUAS
> >Signed-off-by: Jacob Garber
> >Signed-off-by: Julius Werner
> >Signed-off-by: Kyösti Mälkki
> >Signed-off-by: Lin Huang
> >Signed-off-by: Martin Roth
> >Signed-off-by: Nickey Yang
> >Signed-off-by: Patrick Georgi
> >Signed-off-by: Patrick Georgi
> >Signed-off-by: Patrick Georgi
> >Signed-off-by: Stefan Reinauer
>
> (There's also hdmi{.c,.h} licensed w/ GPL-2.0-or-later, and clock{.c,.h}
> for which the U-Boot counterpart is already "GPL-2.0" assuming thats
> GPL-2.0-only, so I've excluded both.)
Right, sorry. I mean, on the U-Boot side, where did things come from?
I wonder how we got a different license text, and perhaps if we
shouldn't just re-port the coreboot code over as a clean/clear way to
re-license it to GPL-2.0-only.
--
Tom
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