Re: stm32 rtems_counter_delay_nanoseconds() longer
>
> printf("one tick has us %u\n",
> rtems_configuration_get_microseconds_per_tick());
> rtems_counter_ticks ticks = rtems_counter_nanoseconds_to_ticks(1000);
> printf("delay 1000ns ticks_cnt %u\n", ticks);
one tick has us 1000
delay 1000ns ticks_cnt 1000
is rtems_counter_nanoseconds_to_ticks wrong?
On Mon, Jul 8, 2019 at 9:33 AM Jython wrote:
> ok, thanks! i have read it, then im not sure CPU_Counter_ticks is system
> tick ?
>
> On Mon, Jul 8, 2019 at 8:53 AM Chris Johns wrote:
>
>> On 8/7/19 10:49 am, Jython wrote:
>> > hi, the size of tick is |CONFIGURE_MICROSECONDS_PER_TICK| ?
>>
>> I suggest you take a moment and read the configuration section of the user
>> manual. The tick entry is ...
>>
>>
>> https://docs.rtems.org/branches/master/c-user/configuring_a_system.html#configure-microseconds-per-tick
>>
>> If this entry is not clear please let us know or even better send us a
>> patch to
>> the documentation.
>>
>> Thanks
>> Chris
>>
>
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Re: stm32 rtems_counter_delay_nanoseconds() longer
ok, thanks! i have read it, then im not sure CPU_Counter_ticks is system tick ? On Mon, Jul 8, 2019 at 8:53 AM Chris Johns wrote: > On 8/7/19 10:49 am, Jython wrote: > > hi, the size of tick is |CONFIGURE_MICROSECONDS_PER_TICK| ? > > I suggest you take a moment and read the configuration section of the user > manual. The tick entry is ... > > > https://docs.rtems.org/branches/master/c-user/configuring_a_system.html#configure-microseconds-per-tick > > If this entry is not clear please let us know or even better send us a > patch to > the documentation. > > Thanks > Chris > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
Re: stm32 rtems_counter_delay_nanoseconds() longer
hi, the size of tick is CONFIGURE_MICROSECONDS_PER_TICK ?
On Sat, Jul 6, 2019 at 12:22 AM Gedare Bloom wrote:
> On Thu, Jul 4, 2019 at 2:45 AM Jython wrote:
> >
> > is there someone could help me
> >
> I can give you some guesses.
>
> > On Sun, Jun 30, 2019 at 2:36 PM Jython wrote:
> >>
> >> a 21ms counter in fact more than 10s, see log , my rtc 10s wake up
> >>
> >> static void Delay_ms(x)
> >> {
> >> #if 0
> ... // delete noise
> >> #endif
> >> volatile int i;
> >> int us_cnt = 1000*x;
> From what you said, probably x=21, and us_cnt = 21000
>
> >> printf("delay x %dms us_cnt %d\n", x, us_cnt);
> >> for(i = 0; i < us_cnt; i++)
> >> rtems_counter_delay_nanoseconds(1000);
> You make 21000 calls to this function with 1000ns (1 us) per call. You
> should debug what is happening during a call to
> rtems_counter_delay_nanoseconds(1000).
>
> Some things to be aware of. The function does not disable interrupts
> or task switches, so if you have other tasks/interrupts, they may be
> scheduled and cause your delay to be even longer than you anticipate.
>
> I would check what is the granularity of your processor ability to
> tell time. That is, what is the size of a "tick". This function will
> convert the nanosecond argument to some number of ticks, and then
> delay at least that many ticks. One possibility is that your tick is
> around 500 microseconds, so each call you make is really becoming
> rtems_counter_delay_ticks(1) ==
> rtems_counter_delay_nanoseconds(50). Thus, delay about .0005
> seconds per call * 21000 calls = 10.5 seconds.
>
> >>
> >> printf("end delay\n");
> >> }
> >>
> >>
> >> [14:33:18.242]ÊÕ¡û¡ôflash_buf 32 00 00 00
> >> write page index 50
> >> log_page_no = 50
> >> before while
> >> loop begin
> >> dtr set 0
> >> baud 9600 at UART1_ChangeBaud
> >> USART_WordLength_8b
> >> USART_StopBits_1
> >> delay x 21ms us_cnt 21000
> >>
> >> [14:33:21.055]ÊÕ¡û¡ôafter clr isr 0033
> >>
> >> [14:33:31.056]ÊÕ¡û¡ôafter clr isr 0033
> >>
> >> [14:33:32.759]ÊÕ¡û¡ôend delay
> >> Lenggui_ClrBuffer begin okflag 0
> >>
> >>
> >>
> > ___
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> > users@rtems.org
> > http://lists.rtems.org/mailman/listinfo/users
>
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Re: stm32 rtems_counter_delay_nanoseconds() longer
is there someone could help me
On Sun, Jun 30, 2019 at 2:36 PM Jython wrote:
> a 21ms counter in fact more than 10s, see log , my rtc 10s wake up
>
> static void Delay_ms(x)
> {
> #if 0
> int int_num = 0;
>
> if(x % 10 == 0)
> {
> int_num = x / 10;
> }
> else
> {
> int_num = x / 10 + 1;
> }
> //printf("delay x %d int_num %d\n", x, int_num);
> rtems_task_wake_after(int_num);
> #endif
> volatile int i;
> int us_cnt = 1000*x;
> printf("delay x %dms us_cnt %d\n", x, us_cnt);
> for(i = 0; i < us_cnt; i++)
> rtems_counter_delay_nanoseconds(1000);
>
> printf("end delay\n");
> }
>
>
> [14:33:18.242]ÊÕ¡û¡ôflash_buf 32 00 00 00
> write page index 50
> log_page_no = 50
> before while
> loop begin
> dtr set 0
> baud 9600 at UART1_ChangeBaud
> USART_WordLength_8b
> USART_StopBits_1
> delay x 21ms us_cnt 21000
>
> [14:33:21.055]ÊÕ¡û¡ôafter clr isr 0033
>
> [14:33:31.056]ÊÕ¡û¡ôafter clr isr 0033
>
> [14:33:32.759]ÊÕ¡û¡ôend delay
> Lenggui_ClrBuffer begin okflag 0
>
>
>
>
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stm32 Interrupt Profiling
does stm32 rtems4.11 support Interrupt Profiling? ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
stm32 rtems_counter_delay_nanoseconds() longer
a 21ms counter in fact more than 10s, see log , my rtc 10s wake up
static void Delay_ms(x)
{
#if 0
int int_num = 0;
if(x % 10 == 0)
{
int_num = x / 10;
}
else
{
int_num = x / 10 + 1;
}
//printf("delay x %d int_num %d\n", x, int_num);
rtems_task_wake_after(int_num);
#endif
volatile int i;
int us_cnt = 1000*x;
printf("delay x %dms us_cnt %d\n", x, us_cnt);
for(i = 0; i < us_cnt; i++)
rtems_counter_delay_nanoseconds(1000);
printf("end delay\n");
}
[14:33:18.242]ÊÕ¡û¡ôflash_buf 32 00 00 00
write page index 50
log_page_no = 50
before while
loop begin
dtr set 0
baud 9600 at UART1_ChangeBaud
USART_WordLength_8b
USART_StopBits_1
delay x 21ms us_cnt 21000
[14:33:21.055]ÊÕ¡û¡ôafter clr isr 0033
[14:33:31.056]ÊÕ¡û¡ôafter clr isr 0033
[14:33:32.759]ÊÕ¡û¡ôend delay
Lenggui_ClrBuffer begin okflag 0
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Re: function declare
so it is rtems build requirement?
On Thu, Jun 27, 2019 at 2:53 AM Mr. Andrei Chichak
wrote:
> Assume that you are using C and C has a facility to bind together object
> modules from different files.
>
> You define a function in one file, it has a bunch of parameters and
> doesn’t return anything.
>
> In another file you use that function but don’t have a prototype that
> tells the compiler anything about the function.
>
> Now assume that the compiler was written in 1972, and doesn’t benefit from
> things like mind reading.
>
> C assumes, by default, that *a function has one integer parameter and
> returns an integer, unless otherwise told*. What other choices has it
> got? Nothing really.
>
> So in later versions of C, they introduced a thing called a prototype that
> gives the compiler a hint about the parameters and return values of a
> function.
>
> All that you needed was to take your function header, put a semicolon on
> the end and paste it before the call to the function and the compiler would
> have done what you wanted instead of what you said.
>
> Better yet, take that prototype and put it into a header file and whenever
> you want to call the function, put in an include statement, the compiler
> get’s the information about the parameters and return values, and overrides
> the *int func( int)* default nature.
>
> A
>
> On 2019-June-26, at 12:41 AM, Jython wrote:
>
> I have a function named *oled_write_temp* in a.c, if i dont declare it
> in a.h , then i will get the wrong supply value in the function within main
> call, why?
>
> if i declare it in a.h, then all is right
>
> void oled_write_temp(float set_temp, const float supply, float return_temp)
>> {
>>
>> int base_x = 12, base_y = 60;
>>
>> char buffer[20] = {0};
>>
>> *printf("supply_temp %f at %s\n", supply, __FUNCTION__);*
>>
>> snprintf(buffer, 20, "SUPPLY:%.2f", supply);
>> printf("supply_temp string %s\n", buffer);
>>
>> oled_clear_area(base_x, base_y + 16, 122, base_y + 32);
>> OLED_ShowString(base_x, base_y + 16, buffer, 16, 1);
>>
>> memset(buffer, 0, sizeof(buffer));
>> snprintf(buffer, 20, "RETURN:%.2f", return_temp);
>> OLED_ShowString(base_x, base_y + 36, buffer, 16, 1);
>>
>> memset(buffer, 0, sizeof(buffer));
>> snprintf(buffer, 20, "SET :%.2f", set_temp);
>> OLED_ShowString(base_x, base_y + 56, buffer, 16, 1);
>>
>> }
>>
>
> ps: watch line *printf("supply_temp %f at %s\n", supply, __FUNCTION__);*
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>
>
>
>
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how to use rtems_interrupt_handler_install properly?
I have used rtems_interrupt_handler_install for usart like https://imgur.com/dqbiXcg but im not sure exactly how to use it, before usart_initialize(2) or inside usart_initialize(2)? ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
function declare
I have a function named *oled_write_temp* in a.c, if i dont declare it in
a.h , then i will get the wrong supply value in the function within main
call, why?
if i declare it in a.h, then all is right
void oled_write_temp(float set_temp, const float supply, float return_temp)
> {
>
> int base_x = 12, base_y = 60;
>
> char buffer[20] = {0};
>
> *printf("supply_temp %f at %s\n", supply, __FUNCTION__);*
>
> snprintf(buffer, 20, "SUPPLY:%.2f", supply);
> printf("supply_temp string %s\n", buffer);
>
> oled_clear_area(base_x, base_y + 16, 122, base_y + 32);
> OLED_ShowString(base_x, base_y + 16, buffer, 16, 1);
>
> memset(buffer, 0, sizeof(buffer));
> snprintf(buffer, 20, "RETURN:%.2f", return_temp);
> OLED_ShowString(base_x, base_y + 36, buffer, 16, 1);
>
> memset(buffer, 0, sizeof(buffer));
> snprintf(buffer, 20, "SET :%.2f", set_temp);
> OLED_ShowString(base_x, base_y + 56, buffer, 16, 1);
>
> }
>
ps: watch line *printf("supply_temp %f at %s\n", supply, __FUNCTION__);*
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Re: stm32 external SRAM
>
> printf("data test return %04x\n", memTestDataBus(0x6802));
>
>
> printf("addr bus test return %04x\n", memTestAddressBus(0x6800,
> 1024*1024));
memtest all passed at application mode,
when SRAM init function moves to bsp_start_hook_1 then not work
Can i do init_main_osc in bsp_start_hook_1?
On Tue, Jun 18, 2019 at 1:25 PM Christian Mauderer <
christian.maude...@embedded-brains.de> wrote:
> On 18/06/2019 07:17, Jython wrote:
> > void SRAM_fsmc_setup(void)
> > {
> > unsigned char FSMC_Bank;
> > int i = 0;
> >
> > // enable port clk
> > RCC_AHB1ENR |= 0x0f << 3;
> > RCC_AHB3ENR |= 1; // enable fsmc clock
> >
> > // af A0-A18
> > stm32f4_gpio_config temp = STM32F4_PIN_FSMC(5, 0,
> > STM32F4_GPIO_AF_FSMC);
> >
> >
> > for(i = 0; i < 6; i++) //pf0-5
> > {
> >
> >
> > temp.fields.pin_first = STM32F4_GPIO_PIN(5, i);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(5, i);
> > stm32f4_gpio_set_config();
> > }
> >
> > // A6 PF12
> > temp.fields.pin_first = STM32F4_GPIO_PIN(5, 12);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(5, 12);
> > stm32f4_gpio_set_config();
> >
> > // A7 PF13
> > temp.fields.pin_first = STM32F4_GPIO_PIN(5, 13);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(5, 13);
> > stm32f4_gpio_set_config();
> >
> > // A8 PF14
> > temp.fields.pin_first = STM32F4_GPIO_PIN(5, 14);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(5, 14);
> > stm32f4_gpio_set_config();
> >
> > // A9 PF15
> > temp.fields.pin_first = STM32F4_GPIO_PIN(5, 15);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(5, 15);
> > stm32f4_gpio_set_config();
> >
> >
> > // PG0-5A10-A15
> > for(i = 0; i < 6; i++)
> > {
> > temp.fields.pin_first = STM32F4_GPIO_PIN(6, i);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(6, i);
> > stm32f4_gpio_set_config();
> >
> > }
> >
> >
> > // a16 - pd11
> > temp.fields.pin_first = STM32F4_GPIO_PIN(3, 11);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(3, 11);
> > stm32f4_gpio_set_config();
> >
> > //A17
> > temp.fields.pin_first = STM32F4_GPIO_PIN(3, 12);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(3, 12);
> > stm32f4_gpio_set_config();
> > //A18
> > temp.fields.pin_first = STM32F4_GPIO_PIN(3, 13);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(3, 13);
> > stm32f4_gpio_set_config();
> >
> > // address bus end
> >
> >
> > // dbus setting
> > // D0 PD14
> > temp.fields.pin_first = STM32F4_GPIO_PIN(3, 14);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(3, 14);
> > stm32f4_gpio_set_config();
> >
> > // D1 PD15
> > temp.fields.pin_first = STM32F4_GPIO_PIN(3, 15);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(3, 15);
> > stm32f4_gpio_set_config();
> >
> > // D2 PD0
> > temp.fields.pin_first = STM32F4_GPIO_PIN(3, 0);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(3, 0);
> > stm32f4_gpio_set_config();
> >
> > // D3 PD1
> > temp.fields.pin_first = STM32F4_GPIO_PIN(3, 1);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(3, 1);
> > stm32f4_gpio_set_config();
> >
> > // D4-12 Pe7
> > for(i = 4; i < 13; i++)
> > {
> > temp.fields.pin_first = STM32F4_GPIO_PIN(4, i+3);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(4, i+3);
> > stm32f4_gpio_set_config();
> > }
> >
> > // d13 14 15 pd8
> > for(i = 13; i < 16; i++)
> > {
> > temp.fields.pin_first = STM32F4_GPIO_PIN(3, i-5);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(3, i-5);
> > stm32f4_gpio_set_config();
> >
> > }
> >
> >
> > //pg10 ne3
> > temp.fields.pin_first = STM32F4_GPIO_PIN(6, 10);
> > temp.fields.pin_last = STM32F4_GPIO_PIN(6, 10);
> > stm32f4_gpio_set_config();
> >
> > //NBL pe0 pe1
> >
Re: stm32f4 __wfi
this is the configure:
#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
#define CONFIGURE_APPLICATION_NEEDS_RTC_DRIVER
#define CONFIGURE_MAXIMUM_TASKS 5
#define CONFIGURE_MAXIMUM_TIMERS3
#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
#define CONFIGURE_STACK_CHECKER_ENABLED
#define CONFIGURE_INIT_TASK_STACK_SIZE (RTEMS_MINIMUM_STACK_SIZE * 2)
#define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 20
#define CONFIGURE_INIT
On Mon, Jun 24, 2019 at 7:01 PM Christian Mauderer <
christian.maude...@embedded-brains.de> wrote:
> On 24/06/2019 11:36, Jython wrote:
> > now i have changed to RTC wakeup, my key press can wake up the board,
> >
> > //rtems_stack_checker_report_usage();
> >
> > PWR_EnterSTOPMode(1, 1);
> >
> > init_main_osc();
> > usleep(10);
> > printf("RCC_CFGR %02x\n", RCC_CFGR & 0xff);
> >
> >
> > so i think sleep function can't be wake up by EXTI
>
> Did you disable some time-specific functionality in your applications
> configuration? For example a
> CONFIGURE_APPLICATION_DOES_NOT_NEED_CLOCK_DRIVER.
>
> >
> >
> > On Mon, Jun 24, 2019 at 3:44 PM Christian Mauderer
> > > <mailto:christian.maude...@embedded-brains.de>> wrote:
> >
> > On 24/06/2019 02:47, Jython wrote:
> > > that's to say EXTI wakes up from sleep function because interrupt
> > > handler log out
> > > but _CPU_Thread_Idle_body does not exit ? want to know what is the
> > > sleep/idle exit condition?
> >
> > The idle task is the task with the lowest priority. So it runs if no
> > other higher priority task (basically every task) is in the position
> to
> > run. In your case, your main task has been send to sleep with the
> > `sleep(10)` call. It should become active again after 10 seconds.
> >
> > I vaguely remember that there was something about disabling some
> timing
> > mechanisms in your system. If you disabled the wrong parts, a
> sleep(10)
> > might never wake up again because it's missing it's timer that
> > determines whether 10 seconds passed. In that case you might want to
> > wait for some synchronization object instead (a signal, a mutex, some
> > event, ...) that you send from your interrupt.
> >
> > PS: I re-added the user list on CC. I hope that is OK for you.
> >
> > Best regards
> >
> > Christian
> >
> > >
> > > On Fri, Jun 21, 2019 at 7:09 PM Christian Mauderer
> > > > <mailto:christian.maude...@embedded-brains.de>
> > > <mailto:christian.maude...@embedded-brains.de
> > <mailto:christian.maude...@embedded-brains.de>>> wrote:
> > >
> > > On 21/06/2019 11:53, Jython wrote:
> > > > i got it , i have coded some low power applications with
> > > stm32cube last
> > > > year,
> > > > may i just want to know more about the sleep and why it does
> not
> > > stop by
> > > > EXTI , maybe i need to rewrite sleep function ?
> > >
> > > `sleep()` just suspends your current task. So you will reach
> > (after a
> > > task switch) the idle loop.
> > >
> > > >
> > > > On Fri, Jun 21, 2019 at 3:16 PM Christian Mauderer
> > > > > <mailto:christian.maude...@embedded-brains.de>
> > > <mailto:christian.maude...@embedded-brains.de
> > <mailto:christian.maude...@embedded-brains.de>>
> > > > <mailto:christian.maude...@embedded-brains.de
> > <mailto:christian.maude...@embedded-brains.de>
> > > <mailto:christian.maude...@embedded-brains.de
> > <mailto:christian.maude...@embedded-brains.de>>>> wrote:
> > > >
> > > > On 21/06/2019 02:58, Jython wrote:
> > > > >
> > > > > handler
> > > https://gist.github.com/goog/7bf5ec55139a3ed43e36be5b2eee318b
> > > >
> > > > There are some things that I would strongly discourage
> > in that
> > > interrupt
> > > > handler (printk as long as it is not only a temporary
> debug
> > > output,
> > > > delay, ...) but it shouldn't be the problem. I assume
> >
Re: stm32f4 __wfi
now i have changed to RTC wakeup, my key press can wake up the board,
//rtems_stack_checker_report_usage();
>
> PWR_EnterSTOPMode(1, 1);
>
> init_main_osc();
> usleep(10);
> printf("RCC_CFGR %02x\n", RCC_CFGR & 0xff);
>
so i think sleep function can't be wake up by EXTI
On Mon, Jun 24, 2019 at 3:44 PM Christian Mauderer <
christian.maude...@embedded-brains.de> wrote:
> On 24/06/2019 02:47, Jython wrote:
> > that's to say EXTI wakes up from sleep function because interrupt
> > handler log out
> > but _CPU_Thread_Idle_body does not exit ? want to know what is the
> > sleep/idle exit condition?
>
> The idle task is the task with the lowest priority. So it runs if no
> other higher priority task (basically every task) is in the position to
> run. In your case, your main task has been send to sleep with the
> `sleep(10)` call. It should become active again after 10 seconds.
>
> I vaguely remember that there was something about disabling some timing
> mechanisms in your system. If you disabled the wrong parts, a sleep(10)
> might never wake up again because it's missing it's timer that
> determines whether 10 seconds passed. In that case you might want to
> wait for some synchronization object instead (a signal, a mutex, some
> event, ...) that you send from your interrupt.
>
> PS: I re-added the user list on CC. I hope that is OK for you.
>
> Best regards
>
> Christian
>
> >
> > On Fri, Jun 21, 2019 at 7:09 PM Christian Mauderer
> > > <mailto:christian.maude...@embedded-brains.de>> wrote:
> >
> > On 21/06/2019 11:53, Jython wrote:
> > > i got it , i have coded some low power applications with
> > stm32cube last
> > > year,
> > > may i just want to know more about the sleep and why it does not
> > stop by
> > > EXTI , maybe i need to rewrite sleep function ?
> >
> > `sleep()` just suspends your current task. So you will reach (after a
> > task switch) the idle loop.
> >
> > >
> > > On Fri, Jun 21, 2019 at 3:16 PM Christian Mauderer
> > > > <mailto:christian.maude...@embedded-brains.de>
> > > <mailto:christian.maude...@embedded-brains.de
> > <mailto:christian.maude...@embedded-brains.de>>> wrote:
> > >
> > > On 21/06/2019 02:58, Jython wrote:
> > > >
> > > > handler
> > https://gist.github.com/goog/7bf5ec55139a3ed43e36be5b2eee318b
> > >
> > > There are some things that I would strongly discourage in that
> > interrupt
> > > handler (printk as long as it is not only a temporary debug
> > output,
> > > delay, ...) but it shouldn't be the problem. I assume that you
> > already
> > > checked, that you are testing for the right flag in the first
> > if. So I
> > > would expect that you get your debug output if your interrupt
> > occurs.
> > >
> > > >
> > > > the main loop code
> > > >
> https://gist.github.com/goog/d83786e0eb2c97ad3126ded1987b5078
> > >
> > > Same again: Some details but nothing that I would see as a
> > cause for
> > > your problem.
> > >
> > > >
> > > > when i pressed key, printf("loop begin\n"); does not print
> > immediately
> > > > so the sleep function does not break
> > >
> > > Note that printf is a interrupt driven print. So if you have
> > problems
> > > with _some_ interrupts not waking up your device you might not
> > get an
> > > output or maybe only a "l".
> > >
> > > I agree with the mail from "groups chichak.ca
> > <http://chichak.ca> <http://chichak.ca>".
> > > It's a problem that is
> > > very chip specific and not really a RTEMS specific one. So it
> > might
> > > would be a good idea to search for "STM32 not waking up" in
> the ST
> > > forums.
> > >
> > > >
> > > >
> > > >
> > > > On Thu, Jun 20, 2019 at 10:47 PM Christian Mauderer
> > > mailto:l...@c-mauderer.de>
> > <mailto:l...@c-mauderer.de <mailto:l...@c-mauderer.de>>
> > &
Re: stm32f4 __wfi
i got it , i have coded some low power applications with stm32cube last
year,
may i just want to know more about the sleep and why it does not stop by
EXTI , maybe i need to rewrite sleep function ?
On Fri, Jun 21, 2019 at 3:16 PM Christian Mauderer <
christian.maude...@embedded-brains.de> wrote:
> On 21/06/2019 02:58, Jython wrote:
> >
> > handler https://gist.github.com/goog/7bf5ec55139a3ed43e36be5b2eee318b
>
> There are some things that I would strongly discourage in that interrupt
> handler (printk as long as it is not only a temporary debug output,
> delay, ...) but it shouldn't be the problem. I assume that you already
> checked, that you are testing for the right flag in the first if. So I
> would expect that you get your debug output if your interrupt occurs.
>
> >
> > the main loop code
> > https://gist.github.com/goog/d83786e0eb2c97ad3126ded1987b5078
>
> Same again: Some details but nothing that I would see as a cause for
> your problem.
>
> >
> > when i pressed key, printf("loop begin\n"); does not print immediately
> > so the sleep function does not break
>
> Note that printf is a interrupt driven print. So if you have problems
> with _some_ interrupts not waking up your device you might not get an
> output or maybe only a "l".
>
> I agree with the mail from "groups chichak.ca". It's a problem that is
> very chip specific and not really a RTEMS specific one. So it might
> would be a good idea to search for "STM32 not waking up" in the ST forums.
>
> >
> >
> >
> > On Thu, Jun 20, 2019 at 10:47 PM Christian Mauderer > <mailto:l...@c-mauderer.de>> wrote:
> >
> > On 20/06/2019 16:43, Jython wrote:
> > > sleep function at the ending of loop, the loop did not begin
> > intermediate
> >
> > So just that I understand it correctly: Your have a loop in a task
> that
> > sends your processor to sleep at the end of the loop. Then you wake
> up
> > the processor via an interrupt and the interrupt handler is executed.
> > But you don't reach the loop again?
> >
> > I think I remember some discussion where you wanted to put a sleep
> into
> > your idle loop? Maybe you have a double sleep?
> >
> > >
> > > On Thursday, June 20, 2019, Christian Mauderer > <mailto:l...@c-mauderer.de>
> > > <mailto:l...@c-mauderer.de <mailto:l...@c-mauderer.de>>> wrote:
> > >
> > > On 20/06/2019 13:25, Jython wrote:
> > > > do have service routine, handler can printk log,
> > SLEEPONEXIT is 0
> > >
> > > So your handler is called? But it seems that the processor
> > wakes up
> > > then. How does the "won't stop sleep mode" look like?
> > >
> > > >
> > > > On Thu, Jun 20, 2019 at 5:19 PM Christian Mauderer
> > > mailto:l...@c-mauderer.de>
> > <mailto:l...@c-mauderer.de <mailto:l...@c-mauderer.de>>
> > > > <mailto:l...@c-mauderer.de <mailto:l...@c-mauderer.de>
> > <mailto:l...@c-mauderer.de <mailto:l...@c-mauderer.de>>>> wrote:
> > > >
> > > > On 20/06/2019 10:57, Jython wrote:
> > > > > a GPIO EXTI line,
> > > > > rtems idle phrase called __wfi, does it make stm32
> enter
> > > standby mode?
> > > > > so key can not wake up it from sleep function
> > > >
> > > > Please take a look at the reference manual of your chip.
> > Most
> > > likely
> > > > it's "RM0090 Rev 18" but make sure that's the right part
> > number:
> > > >
> > > >
> > > https://www.st.com/resource/en/reference_manual/dm00031020.pdf
> > > <
> https://www.st.com/resource/en/reference_manual/dm00031020.pdf>
> > > >
> > > > On page 127 there is a description of "Entering
> > low-power mode":
> > > >
> > > > "Low-power modes are entered by the MCU by executing
> the
> > > WFI (Wait
> > > > For Interrupt), or WFE (Wait for Event)
> instructions, or
> > > when the
> > > > SLEEPONEXIT bit in the Cortex ®-M4 with FPU System
> > Control
> > > &
Re: stm32f4 __wfi
handler https://gist.github.com/goog/7bf5ec55139a3ed43e36be5b2eee318b
the main loop code
https://gist.github.com/goog/d83786e0eb2c97ad3126ded1987b5078
when i pressed key, printf("loop begin\n"); does not print immediately
so the sleep function does not break
On Thu, Jun 20, 2019 at 10:47 PM Christian Mauderer
wrote:
> On 20/06/2019 16:43, Jython wrote:
> > sleep function at the ending of loop, the loop did not begin intermediate
>
> So just that I understand it correctly: Your have a loop in a task that
> sends your processor to sleep at the end of the loop. Then you wake up
> the processor via an interrupt and the interrupt handler is executed.
> But you don't reach the loop again?
>
> I think I remember some discussion where you wanted to put a sleep into
> your idle loop? Maybe you have a double sleep?
>
> >
> > On Thursday, June 20, 2019, Christian Mauderer > <mailto:l...@c-mauderer.de>> wrote:
> >
> > On 20/06/2019 13:25, Jython wrote:
> > > do have service routine, handler can printk log, SLEEPONEXIT is 0
> >
> > So your handler is called? But it seems that the processor wakes up
> > then. How does the "won't stop sleep mode" look like?
> >
> > >
> > > On Thu, Jun 20, 2019 at 5:19 PM Christian Mauderer
> > mailto:l...@c-mauderer.de>
> > > <mailto:l...@c-mauderer.de <mailto:l...@c-mauderer.de>>> wrote:
> > >
> > > On 20/06/2019 10:57, Jython wrote:
> > > > a GPIO EXTI line,
> > > > rtems idle phrase called __wfi, does it make stm32 enter
> > standby mode?
> > > > so key can not wake up it from sleep function
> > >
> > > Please take a look at the reference manual of your chip. Most
> > likely
> > > it's "RM0090 Rev 18" but make sure that's the right part
> number:
> > >
> > >
> > https://www.st.com/resource/en/reference_manual/dm00031020.pdf
> > <https://www.st.com/resource/en/reference_manual/dm00031020.pdf>
> > >
> > > On page 127 there is a description of "Entering low-power
> mode":
> > >
> > > "Low-power modes are entered by the MCU by executing the
> > WFI (Wait
> > > For Interrupt), or WFE (Wait for Event) instructions, or
> > when the
> > > SLEEPONEXIT bit in the Cortex ®-M4 with FPU System Control
> > > register is set on Return from ISR."
> > >
> > > There is also a description for "Exiting low-power mode". For
> > WFI "any
> > > peripheral interrupt acknowledged by the NVIC can wake up the
> > device."
> > > So your interrupt has to be set up.
> > >
> > > Your code seems to enable the interrupt. But have you
> registered a
> > > interrupt service routine? Otherwise you might get problems
> > with an
> > > unhandled interrupt on wakeup.
> > >
> > > I only skimmed through the power controller chapter. But it
> > seems that
> > > if you have SLEEPDEEP bit set, you will enter a deeper sleep
> mode
> > > where peripheral clocks can be disabled. In that state it's
> > possible
> > > that only special pins (like the WKUP) can wake up the
> processor
> > > again. Please have a detailed look at that chapter to find out
> all
> > > traps.
> > >
> > > Best regards
> > >
> > > Christian
> > >
> > > >
> > > >
> > > > void keys_init()
> > > > {
> > > > // config gpio
> > > > stm32f4_gpio_set_config(_key1); // PA12
> > > > stm32f4_gpio_set_config(_key2);
> > > > stm32f4_gpio_set_config(_key3);
> > > > stm32f4_gpio_set_config(_key4);
> > > >
> > > >
> > > > // SYSCFGEN and exit map
> > > > (*(uint32_t*)0x40023844) |= 1<<14;
> > > >
> > > > SYSCFG_EXTICR3 = 0;
> > > > SYSCFG_EXTICR4 = 0;
> > > >
> > > >
> > > >
> > > > // EXIT INIT
> >
Re: stm32f4 __wfi
sleep function at the ending of loop, the loop did not begin intermediate
On Thursday, June 20, 2019, Christian Mauderer wrote:
> On 20/06/2019 13:25, Jython wrote:
> > do have service routine, handler can printk log, SLEEPONEXIT is 0
>
> So your handler is called? But it seems that the processor wakes up
> then. How does the "won't stop sleep mode" look like?
>
> >
> > On Thu, Jun 20, 2019 at 5:19 PM Christian Mauderer > <mailto:l...@c-mauderer.de>> wrote:
> >
> > On 20/06/2019 10:57, Jython wrote:
> > > a GPIO EXTI line,
> > > rtems idle phrase called __wfi, does it make stm32 enter standby
> mode?
> > > so key can not wake up it from sleep function
> >
> > Please take a look at the reference manual of your chip. Most likely
> > it's "RM0090 Rev 18" but make sure that's the right part number:
> >
> > https://www.st.com/resource/en/reference_manual/dm00031020.pdf
> >
> > On page 127 there is a description of "Entering low-power mode":
> >
> > "Low-power modes are entered by the MCU by executing the WFI
> (Wait
> > For Interrupt), or WFE (Wait for Event) instructions, or when the
> > SLEEPONEXIT bit in the Cortex ®-M4 with FPU System Control
> > register is set on Return from ISR."
> >
> > There is also a description for "Exiting low-power mode". For WFI
> "any
> > peripheral interrupt acknowledged by the NVIC can wake up the
> device."
> > So your interrupt has to be set up.
> >
> > Your code seems to enable the interrupt. But have you registered a
> > interrupt service routine? Otherwise you might get problems with an
> > unhandled interrupt on wakeup.
> >
> > I only skimmed through the power controller chapter. But it seems
> that
> > if you have SLEEPDEEP bit set, you will enter a deeper sleep mode
> > where peripheral clocks can be disabled. In that state it's possible
> > that only special pins (like the WKUP) can wake up the processor
> > again. Please have a detailed look at that chapter to find out all
> > traps.
> >
> > Best regards
> >
> > Christian
> >
> > >
> > >
> > > void keys_init()
> > > {
> > > // config gpio
> > > stm32f4_gpio_set_config(_key1); // PA12
> > > stm32f4_gpio_set_config(_key2);
> > > stm32f4_gpio_set_config(_key3);
> > > stm32f4_gpio_set_config(_key4);
> > >
> > >
> > > // SYSCFGEN and exit map
> > > (*(uint32_t*)0x40023844) |= 1<<14;
> > >
> > > SYSCFG_EXTICR3 = 0;
> > > SYSCFG_EXTICR4 = 0;
> > >
> > >
> > >
> > > // EXIT INIT
> > > EXTI_IMR |= (1<<12);
> > > EXTI_RTSR |= (1<<12);
> > >
> > > EXTI_IMR |= (1<<11);
> > > EXTI_RTSR |= (1<<11);
> > >
> > > EXTI_IMR |= (1<<10);
> > > EXTI_RTSR |= (1<<10);
> > >
> > > EXTI_IMR |= (1<<9);
> > > EXTI_RTSR |= (1<<9);
> > >
> > >
> > > //NVIC_Init
> > > //NVIC it group2
> > >
> > > SCB_AIRCR = 0x05FA | 0x500;
> > > // ip Interrupt priority register x
> > >
> > > //(*(volatile uint8_t*)0xE000E417) = 0xe0; //23
> > > //(*(volatile uint8_t*)0xE000E428) = 0xe0; // 40
> > > (*(volatile uint8_t*)0xE000E417) = 0x50; //23
> > > (*(volatile uint8_t*)0xE000E428) = 0x50; // 40
> > >
> > >
> > >
> > > // 23 40 Interrupt set-enable register x (NVIC_ISERx)
> > > // nvic enable interrupter number
> > > // 0xE000E100
> > > (*(volatile uint32_t*)0xE000E100) |= (1<<23);
> > > (*(volatile uint32_t *)0xE000E104) |= (1<< (40%32));
> > > }
> > >
> > >
> > > On Thu, Jun 20, 2019 at 4:05 PM Christian Mauderer
> > mailto:l...@c-mauderer.de>
> > > <mailto:l...@c-mauderer.de <mailto:l...@c-mauderer.de>>> wrote:
> > >
> > >
Re: stm32f4 __wfi
do have service routine, handler can printk log, SLEEPONEXIT is 0
On Thu, Jun 20, 2019 at 5:19 PM Christian Mauderer
wrote:
> On 20/06/2019 10:57, Jython wrote:
> > a GPIO EXTI line,
> > rtems idle phrase called __wfi, does it make stm32 enter standby mode?
> > so key can not wake up it from sleep function
>
> Please take a look at the reference manual of your chip. Most likely
> it's "RM0090 Rev 18" but make sure that's the right part number:
>
> https://www.st.com/resource/en/reference_manual/dm00031020.pdf
>
> On page 127 there is a description of "Entering low-power mode":
>
> "Low-power modes are entered by the MCU by executing the WFI (Wait
> For Interrupt), or WFE (Wait for Event) instructions, or when the
> SLEEPONEXIT bit in the Cortex ®-M4 with FPU System Control
> register is set on Return from ISR."
>
> There is also a description for "Exiting low-power mode". For WFI "any
> peripheral interrupt acknowledged by the NVIC can wake up the device."
> So your interrupt has to be set up.
>
> Your code seems to enable the interrupt. But have you registered a
> interrupt service routine? Otherwise you might get problems with an
> unhandled interrupt on wakeup.
>
> I only skimmed through the power controller chapter. But it seems that
> if you have SLEEPDEEP bit set, you will enter a deeper sleep mode
> where peripheral clocks can be disabled. In that state it's possible
> that only special pins (like the WKUP) can wake up the processor
> again. Please have a detailed look at that chapter to find out all
> traps.
>
> Best regards
>
> Christian
>
> >
> >
> > void keys_init()
> > {
> > // config gpio
> > stm32f4_gpio_set_config(_key1); // PA12
> > stm32f4_gpio_set_config(_key2);
> > stm32f4_gpio_set_config(_key3);
> > stm32f4_gpio_set_config(_key4);
> >
> >
> > // SYSCFGEN and exit map
> > (*(uint32_t*)0x40023844) |= 1<<14;
> >
> > SYSCFG_EXTICR3 = 0;
> > SYSCFG_EXTICR4 = 0;
> >
> >
> >
> > // EXIT INIT
> > EXTI_IMR |= (1<<12);
> > EXTI_RTSR |= (1<<12);
> >
> > EXTI_IMR |= (1<<11);
> > EXTI_RTSR |= (1<<11);
> >
> > EXTI_IMR |= (1<<10);
> > EXTI_RTSR |= (1<<10);
> >
> > EXTI_IMR |= (1<<9);
> > EXTI_RTSR |= (1<<9);
> >
> >
> > //NVIC_Init
> > //NVIC it group2
> >
> > SCB_AIRCR = 0x05FA | 0x500;
> > // ip Interrupt priority register x
> >
> > //(*(volatile uint8_t*)0xE000E417) = 0xe0; //23
> > //(*(volatile uint8_t*)0xE000E428) = 0xe0; // 40
> > (*(volatile uint8_t*)0xE000E417) = 0x50; //23
> > (*(volatile uint8_t*)0xE000E428) = 0x50; // 40
> >
> >
> >
> > // 23 40 Interrupt set-enable register x (NVIC_ISERx)
> > // nvic enable interrupter number
> > // 0xE000E100
> > (*(volatile uint32_t*)0xE000E100) |= (1<<23);
> > (*(volatile uint32_t *)0xE000E104) |= (1<< (40%32));
> > }
> >
> >
> > On Thu, Jun 20, 2019 at 4:05 PM Christian Mauderer > <mailto:l...@c-mauderer.de>> wrote:
> >
> > On 20/06/2019 05:28, Jython wrote:
> > > hi, it seems that exit key interrupt won't stop sleep mode, why?
> > >
> > > [...]
> > >
> >
> > What do you mean by "exit key interrupt"? I don't know the STM32F4
> that
> > well. So please give some more details.
> >
> > I would expect that either only specific interrupt sources can wake
> up
> > the processor from a deep sleep mode or that you can configure which
> > peripherals are still active. If your "exit key" is a GPIO line with
> > interrupt capability you should have a look at whether the module is
> > still active.
> >
> > Best regards
> >
> > Christian
> >
> > ___
> > users mailing list
> > users@rtems.org <mailto:users@rtems.org>
> > http://lists.rtems.org/mailman/listinfo/users
> >
>
>
___
users mailing list
users@rtems.org
http://lists.rtems.org/mailman/listinfo/users
Re: stm32f4 __wfi
a GPIO EXTI line,
rtems idle phrase called __wfi, does it make stm32 enter standby mode?
so key can not wake up it from sleep function
void keys_init()
> {
> // config gpio
> stm32f4_gpio_set_config(_key1); // PA12
> stm32f4_gpio_set_config(_key2);
> stm32f4_gpio_set_config(_key3);
> stm32f4_gpio_set_config(_key4);
>
>
> // SYSCFGEN and exit map
> (*(uint32_t*)0x40023844) |= 1<<14;
>
> SYSCFG_EXTICR3 = 0;
> SYSCFG_EXTICR4 = 0;
>
>
>
> // EXIT INIT
> EXTI_IMR |= (1<<12);
> EXTI_RTSR |= (1<<12);
>
> EXTI_IMR |= (1<<11);
> EXTI_RTSR |= (1<<11);
>
> EXTI_IMR |= (1<<10);
> EXTI_RTSR |= (1<<10);
>
> EXTI_IMR |= (1<<9);
> EXTI_RTSR |= (1<<9);
>
>
> //NVIC_Init
> //NVIC it group2
>
> SCB_AIRCR = 0x05FA | 0x500;
> // ip Interrupt priority register x
>
> //(*(volatile uint8_t*)0xE000E417) = 0xe0; //23
> //(*(volatile uint8_t*)0xE000E428) = 0xe0; // 40
> (*(volatile uint8_t*)0xE000E417) = 0x50; //23
> (*(volatile uint8_t*)0xE000E428) = 0x50; // 40
>
>
>
> // 23 40 Interrupt set-enable register x (NVIC_ISERx)
> // nvic enable interrupter number
> // 0xE000E100
> (*(volatile uint32_t*)0xE000E100) |= (1<<23);
> (*(volatile uint32_t *)0xE000E104) |= (1<< (40%32));
> }
>
On Thu, Jun 20, 2019 at 4:05 PM Christian Mauderer
wrote:
> On 20/06/2019 05:28, Jython wrote:
> > hi, it seems that exit key interrupt won't stop sleep mode, why?
> >
> > [...]
> >
>
> What do you mean by "exit key interrupt"? I don't know the STM32F4 that
> well. So please give some more details.
>
> I would expect that either only specific interrupt sources can wake up
> the processor from a deep sleep mode or that you can configure which
> peripherals are still active. If your "exit key" is a GPIO line with
> interrupt capability you should have a look at whether the module is
> still active.
>
> Best regards
>
> Christian
>
> ___
> users mailing list
> users@rtems.org
> http://lists.rtems.org/mailman/listinfo/users
>
___
users mailing list
users@rtems.org
http://lists.rtems.org/mailman/listinfo/users
Re: stm32 external SRAM
>
> void SRAM_fsmc_setup(void)
> {
> unsigned char FSMC_Bank;
> int i = 0;
>
> // enable port clk
> RCC_AHB1ENR |= 0x0f << 3;
> RCC_AHB3ENR |= 1; // enable fsmc clock
>
> // af A0-A18
> stm32f4_gpio_config temp = STM32F4_PIN_FSMC(5, 0,
> STM32F4_GPIO_AF_FSMC);
>
>
> for(i = 0; i < 6; i++) //pf0-5
> {
>
>
> temp.fields.pin_first = STM32F4_GPIO_PIN(5, i);
> temp.fields.pin_last = STM32F4_GPIO_PIN(5, i);
> stm32f4_gpio_set_config();
> }
>
> // A6 PF12
> temp.fields.pin_first = STM32F4_GPIO_PIN(5, 12);
> temp.fields.pin_last = STM32F4_GPIO_PIN(5, 12);
> stm32f4_gpio_set_config();
>
> // A7 PF13
> temp.fields.pin_first = STM32F4_GPIO_PIN(5, 13);
> temp.fields.pin_last = STM32F4_GPIO_PIN(5, 13);
> stm32f4_gpio_set_config();
>
> // A8 PF14
> temp.fields.pin_first = STM32F4_GPIO_PIN(5, 14);
> temp.fields.pin_last = STM32F4_GPIO_PIN(5, 14);
> stm32f4_gpio_set_config();
>
> // A9 PF15
> temp.fields.pin_first = STM32F4_GPIO_PIN(5, 15);
> temp.fields.pin_last = STM32F4_GPIO_PIN(5, 15);
> stm32f4_gpio_set_config();
>
>
> // PG0-5A10-A15
> for(i = 0; i < 6; i++)
> {
> temp.fields.pin_first = STM32F4_GPIO_PIN(6, i);
> temp.fields.pin_last = STM32F4_GPIO_PIN(6, i);
> stm32f4_gpio_set_config();
>
> }
>
>
> // a16 - pd11
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 11);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 11);
> stm32f4_gpio_set_config();
>
> //A17
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 12);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 12);
> stm32f4_gpio_set_config();
> //A18
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 13);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 13);
> stm32f4_gpio_set_config();
>
> // address bus end
>
>
> // dbus setting
> // D0 PD14
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 14);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 14);
> stm32f4_gpio_set_config();
>
> // D1 PD15
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 15);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 15);
> stm32f4_gpio_set_config();
>
> // D2 PD0
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 0);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 0);
> stm32f4_gpio_set_config();
>
> // D3 PD1
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 1);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 1);
> stm32f4_gpio_set_config();
>
> // D4-12 Pe7
> for(i = 4; i < 13; i++)
> {
> temp.fields.pin_first = STM32F4_GPIO_PIN(4, i+3);
> temp.fields.pin_last = STM32F4_GPIO_PIN(4, i+3);
> stm32f4_gpio_set_config();
> }
>
> // d13 14 15 pd8
> for(i = 13; i < 16; i++)
> {
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, i-5);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, i-5);
> stm32f4_gpio_set_config();
>
> }
>
>
> //pg10 ne3
> temp.fields.pin_first = STM32F4_GPIO_PIN(6, 10);
> temp.fields.pin_last = STM32F4_GPIO_PIN(6, 10);
> stm32f4_gpio_set_config();
>
> //NBL pe0 pe1
> temp.fields.pin_first = STM32F4_GPIO_PIN(4, 0);
> temp.fields.pin_last = STM32F4_GPIO_PIN(4, 0);
> stm32f4_gpio_set_config();
>
> temp.fields.pin_first = STM32F4_GPIO_PIN(4, 1);
> temp.fields.pin_last = STM32F4_GPIO_PIN(4, 1);
> stm32f4_gpio_set_config();
>
> //pd4 NOE
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 4);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 4);
> stm32f4_gpio_set_config();
>
> //pd5 NWE
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 5);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 5);
> stm32f4_gpio_set_config();
>
> //pd6 NWAIT
> temp.fields.pin_first = STM32F4_GPIO_PIN(3, 6);
> temp.fields.pin_last = STM32F4_GPIO_PIN(3, 6);
> stm32f4_gpio_set_config();
>
>
>
> //The SRAM is connected to the second FSMC BANK (NE2)
> FSMC_Bank = 1;
>
> STM32_FSMC_BCR3 |= 1<<12;
> STM32_FSMC_BCR3 |= 1<<4; //16bit
>
> //
> STM32_FSMC_BTR3 |= 1<<8; // Data-phase duration DATAST
> //STM32_FSMC_BTR3 |= ~(uint32_t)(1<<4);
> //STM32_FSMC_BTR3 &= ~(uint32_t)1;
> STM32_FSMC_BTR3 &= 0xff00;
>
>
> STM32_FSMC_BWTR3 = 0x0FFF;
> STM32_FSMC_BCR3 |= 1; //memory bank enable
>
> #if 0
> /
> FSMC_Bank1->BTCR[FSMC_Bank+1] = (FSMC_BTR2_ADDSET_1) | (FSMC_BTR2_DATAST_0
Re: stm32 external SRAM
my linkscmd is https://gist.github.com/goog/aad6dae4c418255dd6fb2b23bf2e6f08
void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
> {
> SRAM_fsmc_setup();
> bsp_start_copy_sections();
> bsp_start_clear_bss();
>
> /* At this point we can use objects outside the .start section */
> }
>
but now my code run disordered
On Mon, Jun 17, 2019 at 2:45 PM Christian Mauderer <
christian.maude...@embedded-brains.de> wrote:
> If you put any sections into the external RAM that need initialization,
> you have to init the RAM before the BSP copies it's sections. The STM32
> BSP copies it's sections in bsp_start_hook_1(). So either put it in
> bsp_start_hook_0 or in bsp_start_hook_1 before the copy_section calls.
> Attention: You can't use much in these functions. They are in a very
> early initialization stage. So be careful what you put there.
>
> If you only want malloc to allocate memory from there, there might is a
> later point where you can do that.
>
> On 17/06/2019 08:32, Jython wrote:
> > Thank you and the example! that is to say put extern sram init in
> > bsp_start( void ) function?
> >
> > On Mon, Jun 17, 2019 at 1:04 PM Christian Mauderer
> > > <mailto:christian.maude...@embedded-brains.de>> wrote:
> >
> > On 17/06/2019 03:05, Jython wrote:
> > > STM32:
> > > 112KB at 2000
> > > 16KB at 2001 C000
> > >
> > > external sram : 1MB at 0x6800
> > >
> > > does MEMORY layout support RAM2?
> >
> > Hello Jython,
> >
> > you can distribute the regions to the two RAMs. For example this BSP
> > does that:
> >
> >
> https://git.rtems.org/rtems/tree/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore
> >
> > Please note that you have to take a detailed look at what is used
> till
> > your external RAM initialization run and what not. But if you put
> your
> > external RAM initialization in an early enough step, you shouldn't
> get
> > problems with that.
> >
> > Best regards
> >
> > Christian
> >
> > >
> > > On Fri, Jun 14, 2019 at 10:13 PM Christian Mauderer
> > > > <mailto:christian.maude...@embedded-brains.de>
> > > <mailto:christian.maude...@embedded-brains.de
> > <mailto:christian.maude...@embedded-brains.de>>> wrote:
> > >
> > > If you have already added the chip and it is initialized
> > during startup,
> > > you most likely have to add a section for it in your linker
> > command
> > > file. Depending on where your internal RAM is located and
> > where the
> > > external one is: If they are continuous that can be enough.
> > >
> > > Best regards
> > >
> > > Christian
> > >
> > > On 14/06/2019 04:42, Jython wrote:
> > > > we have added 1M ram by FSMC, and want to manage it by
> > system malloc
> > > > controler
> > > >
> > > > On Fri, Jun 14, 2019 at 10:26 AM Mr. Andrei Chichak
> > > mailto:gro...@chichak.ca>
> > <mailto:gro...@chichak.ca <mailto:gro...@chichak.ca>>
> > > > <mailto:gro...@chichak.ca <mailto:gro...@chichak.ca>
> > <mailto:gro...@chichak.ca <mailto:gro...@chichak.ca>>>> wrote:
> > > >
> > > > A 407 doesn’t normally have external RAM.
> > > >
> > > > ARMs have flash at 0 and the 407 has RAM at 0x2000
> > as you
> > > > discussed earlier.
> > > >
> > > > If you want to work with external flash or RAM, you have
> > to set up
> > > > the FSMC or FMC to support it, but that isn’t a part of
> > the dev
> > > > board that Sebastian used for the BSP port.
> > > >
> > > > The external memory is going to be very specific to your
> > board.
> > > > Which board are you working with?
> > > >
> > > > A
> > > >
> > > > > On 2019-June-13, at 06:23, Christian Mauderer
> > > > > <mailto:christian.maude...@embedded-brains.de>
> > > <mailto:christian.maude...@embedded-brains.de
> > <mailto:christi
Re: stm32 external SRAM
Thank you and the example! that is to say put extern sram init in bsp_start( void ) function? On Mon, Jun 17, 2019 at 1:04 PM Christian Mauderer < christian.maude...@embedded-brains.de> wrote: > On 17/06/2019 03:05, Jython wrote: > > STM32: > > 112KB at 2000 > > 16KB at 2001 C000 > > > > external sram : 1MB at 0x6800 > > > > does MEMORY layout support RAM2? > > Hello Jython, > > you can distribute the regions to the two RAMs. For example this BSP > does that: > > > https://git.rtems.org/rtems/tree/bsps/arm/lpc32xx/start/linkcmds.lpc32xx_phycore > > Please note that you have to take a detailed look at what is used till > your external RAM initialization run and what not. But if you put your > external RAM initialization in an early enough step, you shouldn't get > problems with that. > > Best regards > > Christian > > > > > On Fri, Jun 14, 2019 at 10:13 PM Christian Mauderer > > > <mailto:christian.maude...@embedded-brains.de>> wrote: > > > > If you have already added the chip and it is initialized during > startup, > > you most likely have to add a section for it in your linker command > > file. Depending on where your internal RAM is located and where the > > external one is: If they are continuous that can be enough. > > > > Best regards > > > > Christian > > > > On 14/06/2019 04:42, Jython wrote: > > > we have added 1M ram by FSMC, and want to manage it by system > malloc > > > controler > > > > > > On Fri, Jun 14, 2019 at 10:26 AM Mr. Andrei Chichak > > mailto:gro...@chichak.ca> > > > <mailto:gro...@chichak.ca <mailto:gro...@chichak.ca>>> wrote: > > > > > > A 407 doesn’t normally have external RAM. > > > > > > ARMs have flash at 0 and the 407 has RAM at 0x2000 as you > > > discussed earlier. > > > > > > If you want to work with external flash or RAM, you have to > set up > > > the FSMC or FMC to support it, but that isn’t a part of the dev > > > board that Sebastian used for the BSP port. > > > > > > The external memory is going to be very specific to your board. > > > Which board are you working with? > > > > > > A > > > > > > > On 2019-June-13, at 06:23, Christian Mauderer > > > > <mailto:christian.maude...@embedded-brains.de> > > > <mailto:christian.maude...@embedded-brains.de > > <mailto:christian.maude...@embedded-brains.de>>> wrote: > > > > > > > > On 05/06/2019 02:55, Jython wrote: > > > >> Hello! > > > >> > > > >> 2. In the normal (non-debugging) case, the linker > > script still > > > >>places the > > > >> > > > >>.text section near zero, but places the start of the > > .data and > > > .bss > > > >>sections at the start location of the MPC555's internal > > RAM. The > > > >>system startup code then configures the external RAM just > > > after the > > > >>internal RAM in memory, forming one large block from the > > two RAM > > > >>devices. > > > >> > > > >> from https://devel.rtems.org/wiki/TBR/BSP/Ss555 > > > >> > > > >> but i dont know how to configure the external RAM just > > after the > > > >> internal RAM in memory? > > > >> hope you could give me some guide! > > > >> > > > >> > > > > > > > > Hello Jython, > > > > > > > > the documentation you linked is for an MPC. But your subject > > line > > > > mentions an STM32. What controller / BSP are you using? > > > > > > > > Best regards > > > > > > > > Christian Mauderer > > > > -- > > > > > > > > embedded brains GmbH > > > > Herr Christian Mauderer > > > > Dornierstr. 4 &
Re: stm32 external SRAM
STM32: 112KB at 2000 16KB at 2001 C000 external sram : 1MB at 0x6800 does MEMORY layout support RAM2? On Fri, Jun 14, 2019 at 10:13 PM Christian Mauderer < christian.maude...@embedded-brains.de> wrote: > If you have already added the chip and it is initialized during startup, > you most likely have to add a section for it in your linker command > file. Depending on where your internal RAM is located and where the > external one is: If they are continuous that can be enough. > > Best regards > > Christian > > On 14/06/2019 04:42, Jython wrote: > > we have added 1M ram by FSMC, and want to manage it by system malloc > > controler > > > > On Fri, Jun 14, 2019 at 10:26 AM Mr. Andrei Chichak > <mailto:gro...@chichak.ca>> wrote: > > > > A 407 doesn’t normally have external RAM. > > > > ARMs have flash at 0 and the 407 has RAM at 0x2000 as you > > discussed earlier. > > > > If you want to work with external flash or RAM, you have to set up > > the FSMC or FMC to support it, but that isn’t a part of the dev > > board that Sebastian used for the BSP port. > > > > The external memory is going to be very specific to your board. > > Which board are you working with? > > > > A > > > > > On 2019-June-13, at 06:23, Christian Mauderer > > > <mailto:christian.maude...@embedded-brains.de>> wrote: > > > > > > On 05/06/2019 02:55, Jython wrote: > > >> Hello! > > >> > > >> 2. In the normal (non-debugging) case, the linker script still > > >>places the > > >> > > >>.text section near zero, but places the start of the .data and > > .bss > > >>sections at the start location of the MPC555's internal RAM. > The > > >>system startup code then configures the external RAM just > > after the > > >>internal RAM in memory, forming one large block from the two > RAM > > >>devices. > > >> > > >> from https://devel.rtems.org/wiki/TBR/BSP/Ss555 > > >> > > >> but i dont know how to configure the external RAM just after the > > >> internal RAM in memory? > > >> hope you could give me some guide! > > >> > > >> > > > > > > Hello Jython, > > > > > > the documentation you linked is for an MPC. But your subject line > > > mentions an STM32. What controller / BSP are you using? > > > > > > Best regards > > > > > > Christian Mauderer > > > -- > > > > > > embedded brains GmbH > > > Herr Christian Mauderer > > > Dornierstr. 4 > > > D-82178 Puchheim > > > Germany > > > email: christian.maude...@embedded-brains.de > > <mailto:christian.maude...@embedded-brains.de> > > > Phone: +49-89-18 94 741 - 18 > > > Fax: +49-89-18 94 741 - 08 > > > PGP: Public key available on request. > > > > > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des > EHUG. > > > ___ > > > users mailing list > > > users@rtems.org <mailto:users@rtems.org> > > > http://lists.rtems.org/mailman/listinfo/users > > > > > > ___ > > users mailing list > > users@rtems.org > > http://lists.rtems.org/mailman/listinfo/users > > > > -- > > embedded brains GmbH > Herr Christian Mauderer > Dornierstr. 4 > D-82178 Puchheim > Germany > email: christian.maude...@embedded-brains.de > Phone: +49-89-18 94 741 - 18 > Fax: +49-89-18 94 741 - 08 > PGP: Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
Re: stm32 external SRAM
we have added 1M ram by FSMC, and want to manage it by system malloc controler On Fri, Jun 14, 2019 at 10:26 AM Mr. Andrei Chichak wrote: > A 407 doesn’t normally have external RAM. > > ARMs have flash at 0 and the 407 has RAM at 0x2000 as you discussed > earlier. > > If you want to work with external flash or RAM, you have to set up the > FSMC or FMC to support it, but that isn’t a part of the dev board that > Sebastian used for the BSP port. > > The external memory is going to be very specific to your board. Which > board are you working with? > > A > > > On 2019-June-13, at 06:23, Christian Mauderer < > christian.maude...@embedded-brains.de> wrote: > > > > On 05/06/2019 02:55, Jython wrote: > >> Hello! > >> > >> 2. In the normal (non-debugging) case, the linker script still > >>places the > >> > >>.text section near zero, but places the start of the .data and .bss > >>sections at the start location of the MPC555's internal RAM. The > >>system startup code then configures the external RAM just after the > >>internal RAM in memory, forming one large block from the two RAM > >>devices. > >> > >> from https://devel.rtems.org/wiki/TBR/BSP/Ss555 > >> > >> but i dont know how to configure the external RAM just after the > >> internal RAM in memory? > >> hope you could give me some guide! > >> > >> > > > > Hello Jython, > > > > the documentation you linked is for an MPC. But your subject line > > mentions an STM32. What controller / BSP are you using? > > > > Best regards > > > > Christian Mauderer > > -- > > > > embedded brains GmbH > > Herr Christian Mauderer > > Dornierstr. 4 > > D-82178 Puchheim > > Germany > > email: christian.maude...@embedded-brains.de > > Phone: +49-89-18 94 741 - 18 > > Fax: +49-89-18 94 741 - 08 > > PGP: Public key available on request. > > > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > ___ > > users mailing list > > users@rtems.org > > http://lists.rtems.org/mailman/listinfo/users > > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
Re: stm32 external SRAM
HI, im using stm32f407 On Thu, Jun 13, 2019 at 8:23 PM Christian Mauderer < christian.maude...@embedded-brains.de> wrote: > On 05/06/2019 02:55, Jython wrote: > > Hello! > > > > 2. In the normal (non-debugging) case, the linker script still > > places the > > > > .text section near zero, but places the start of the .data and .bss > > sections at the start location of the MPC555's internal RAM. The > > system startup code then configures the external RAM just after the > > internal RAM in memory, forming one large block from the two RAM > > devices. > > > > from https://devel.rtems.org/wiki/TBR/BSP/Ss555 > > > > but i dont know how to configure the external RAM just after the > > internal RAM in memory? > > hope you could give me some guide! > > > > > > Hello Jython, > > the documentation you linked is for an MPC. But your subject line > mentions an STM32. What controller / BSP are you using? > > Best regards > > Christian Mauderer > -- > > embedded brains GmbH > Herr Christian Mauderer > Dornierstr. 4 > D-82178 Puchheim > Germany > email: christian.maude...@embedded-brains.de > Phone: +49-89-18 94 741 - 18 > Fax: +49-89-18 94 741 - 08 > PGP: Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
stm32 external SRAM
Hello! >1. In the normal (non-debugging) case, the linker script still places >the > > .text section near zero, but places the start of the .data and .bss > sections at the start location of the MPC555's internal RAM. The system > startup code then configures the external RAM just after the internal RAM > in memory, forming one large block from the two RAM devices. > from https://devel.rtems.org/wiki/TBR/BSP/Ss555 but i dont know how to configure the external RAM just after the internal RAM in memory? hope you could give me some guide! ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
stm32f4 memory length
MEMORY {
RAM_INT : ORIGIN = 0x2000, LENGTH = 192k
ROM_INT : ORIGIN = 0x, LENGTH = 1M
}
im using the f407 has 192k ram,
the original is *LENGTH = 128k*,
but if i changed it to 192k, the board cant boot, why?
___
users mailing list
users@rtems.org
http://lists.rtems.org/mailman/listinfo/users
stm32 external flash database
how to use a database like sqlite on RTEMS? stm32f4 has 192kb ram ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
Re: assertion "first != _Chain_Tail( _queues[ index ] )"
finally i find it's usleep call causes that
while(retry && ((RCC_BDCR & 0x02) == 0)) // External low-speed oscillator
> ready
> {
> retry--;
>
> usleep(5000);
> #if 0
> volatile int k = 0;
> (void)k;
> int j;
> for(j = 0; j < 1000; j++)
> k = k + 1;
> #endif
> }
>
On Wed, May 22, 2019 at 2:54 AM Gedare Bloom wrote:
> This just covers up some bug. When the system overhead increased to check
> the stack contents, it might modify the timing enough to obscure a race
> condition. Since the stack checker didn't report anything, you probably
> don't have a blown task stack. (But you could still have a function stack
> overflow.)
>
>
> On Fri, May 17, 2019, 4:21 AM Jython wrote:
>
>> thanks a lot!
>> when i add #define CONFIGURE_STACK_CHECKER_ENABLED
>> problem disappeared, but i still dont understand how it happend
>>
>> On Fri, May 17, 2019 at 6:00 PM Sebastian Huber <
>> sebastian.hu...@embedded-brains.de> wrote:
>>
>>> On 17/05/2019 11:58, Jython wrote:
>>> > hi, Huber! how to debug general stack corruption?
>>>
>>> The first thing is to turn on the stack checker.
>>>
>>> --
>>> Sebastian Huber, embedded brains GmbH
>>>
>>> Address : Dornierstr. 4, D-82178 Puchheim, Germany
>>> Phone : +49 89 189 47 41-16
>>> Fax : +49 89 189 47 41-09
>>> E-Mail : sebastian.hu...@embedded-brains.de
>>> PGP : Public key available on request.
>>>
>>> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
>>>
>>> ___
>> users mailing list
>> users@rtems.org
>> http://lists.rtems.org/mailman/listinfo/users
>
> ___
> users mailing list
> users@rtems.org
> http://lists.rtems.org/mailman/listinfo/users
___
users mailing list
users@rtems.org
http://lists.rtems.org/mailman/listinfo/users
Re: assertion "first != _Chain_Tail( _queues[ index ] )"
thanks a lot! when i add #define CONFIGURE_STACK_CHECKER_ENABLED problem disappeared, but i still dont understand how it happend On Fri, May 17, 2019 at 6:00 PM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 17/05/2019 11:58, Jython wrote: > > hi, Huber! how to debug general stack corruption? > > The first thing is to turn on the stack checker. > > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
Re: assertion "first != _Chain_Tail( _queues[ index ] )"
hi, Huber! how to debug general stack corruption? On Fri, May 17, 2019 at 5:54 PM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > Hello, > > the most likely reasons are misconfigured interrupt priorities or some > general memory/stack corruption. > > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
Re: assertion "first != _Chain_Tail( _queues[ index ] )"
when comment #define CONFIGURE_APPLICATION_NEEDS_RTC_DRIVER then no problem On Fri, May 17, 2019 at 5:52 PM Jython wrote: > HI, ALL! > I coded the rtc driver for stm32 (which have no backup battery),when > power off MCU then power on , got > assertion "first != _Chain_Tail( _queues[ index ] )" failed: file > "../../cpukit/../../../stm32f4/lib/include/rtems/score/schedulerpriorityimpl.h", > line 166, function: _Scheduler_priority_Ready_queue_first > > i dont know how to debug it. the code is here > https://gist.github.com/goog/10950e57bfaf5489a3572ce87a971fe9 > hope you could give me some help! > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
a stm32f407 application
HI, ALL! i have written it within two months https://github.com/goog/rttest ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
delay 10ms
HI ALL what i want is to delay 10ms meanwhile enable usart interrupt handler rtems_task_wake_after i think it should work, what if usleep? ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
how to debug _Scheduler_priority_Ready_queue_first
assertion "first != _Chain_Tail( _queues[ index ] )" failed: file "../../cpukit/../../../stm32f4/lib/include/rtems/score/schedulerpriorityimpl.h", line 166, function: _Scheduler_priority_Ready_queue_first ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
interrupt handler
HI, ALL! now i use this mode for interrupt in rtems status = rtems_interrupt_handler_install( STM32F4_IRQ_USART2, "SP2", RTEMS_INTERRUPT_UNIQUE, (rtems_interrupt_handler) USART2_handler, NULL ); for usart i must to make function O0 to make it work well now for rtc wakeup , it happened some weird thing, it loop in it https://lists.rtems.org/pipermail/users/2019-April/033176.html i dont know where is the problem maybe i miss something important ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
Re: stm32f4 __wfi
Thanks for your quick reply!
the system will wake up every tick, why? does it effect the RTC wakeup?
i am also debugging the rtc wakeup, have posted a mail
https://lists.rtems.org/pipermail/users/2019-April/033176.html
On Wed, Apr 24, 2019 at 4:48 PM Christian Mauderer <
christian.maude...@embedded-brains.de> wrote:
> There is the wfi in the Idle body. So as soon as all your tasks are
> sleeping (via sleep(), rtems_task_wake_after(), waiting for some signals
> or similar functions) wfi will be called.
>
> Note that there most likely is a lot of potential in the drivers to save
> power. Also note that the system will wake up every tick. So depending
> on your configuration the power consumption will vary.
>
> Am 24.04.19 um 10:44 schrieb Jython:
> > i searched it by add -i
> >
> > 56794:d040 <_CPU_Thread_Idle_body>:
> > 56795-#ifdef ARM_MULTILIB_HAS_WFI
> > 56796-
> > 56797:void *_CPU_Thread_Idle_body( uintptr_t ignored )
> > 56798-{
> > 56799- while ( true ) {
> > 56800-__asm__ volatile ("wfi");
> > 56801-d040:bf30 wfi
> > 56802- }
> > 56803:d042:e7fd b.nd040 <_CPU_Thread_Idle_body>
> > 56804-
> > 56805-d044 :
> > 56806-int rtems_filesystem_default_close(
> > 56807- rtems_libio_t *iop
> > 56808-)
> > 56809-{
> > 56810- return 0;
> > 56811-}
> > 56812-d044:2000 movsr0, #0
> > 56813-d046:4770 bxlr
> >
> >
> > that's to say when i want to enter low power i just need to call sleep
> > or rtems_task_wake_after or just while(1); ?
> >
> > On Wed, Apr 24, 2019 at 4:36 PM Christian Mauderer
> > > <mailto:christian.maude...@embedded-brains.de>> wrote:
> >
> > For some reason your grep hasn't found the _CPU_Thread_Idle_body.
> It's
> > possible that the stm32f4 uses some other function for that also I
> don't
> > know why.
> >
> > For example for the xilinx_zynq_a9_qemu BSP the disassembled idle
> body
> > looks like follows:
> >
> > void *_CPU_Thread_Idle_body( uintptr_t ignored )
> > {
> >11d70: b480push{r7}
> >11d72: b083sub sp, #12
> >11d74: af00add r7, sp, #0
> > 11d76: 6078str r0, [r7, #4]
> > while ( true ) {
> > #ifdef ARM_MULTILIB_HAS_WFI
> > __asm__ volatile ("wfi");
> >11d78: bf30wfi
> >11d7a: e7fdb.n 11d78
> > <_CPU_Thread_Idle_body+0x8>
> >
> > Am 24.04.19 um 10:25 schrieb Jython:
> > > arm-rtems4.11-objdump -dS hello.exe | grep idle --color=auto -n -B
> > 5 -A 12
> > >
> > > there is no idle function which calls wfi command
> > > // log
> > > 508-
> > > 509-
> > > 510-
> > > 511-}
> > > 512-
> > > 513:if((*USART2_SR) & (1<<4)) // idle
> > > 514- 3aa:4b13 ldrr3, [pc, #76]; (3f8
> > > )
> > > 515- 3ac:681b ldrr3, [r3, #0]
> > > 516- 3ae:681b ldrr3, [r3, #0]
> > > 517- 3b0:f003 0310 and.wr3, r3, #16
> > > 518- 3b4:2b00 cmpr3, #0
> > > 519- 3b6:d00a beq.n3ce
> > > 520-{
> > > 521://printk("idle ");
> > > 522-
> > > 523-temp = (*USART2_SR);
> > > 524- 3b8:4b0f ldrr3, [pc, #60]; (3f8
> > > )
> > > 525- 3ba:681b ldrr3, [r3, #0]
> > > 526- 3bc:681b ldrr3, [r3, #0]
> > > 527- 3be:60fb strr3, [r7, #12]
> > > 528-temp = (*USART2_DR);
> > > 529- 3c0:4b0f ldrr3, [pc, #60]; (400
> > > )
> > > 530- 3c2:681b ldrr3, [r3, #0]
> > > 531- 3c4:681b ldrr3, [r3, #0]
> > > 532- 3c6:60fb strr3, [r7, #12]
> > > 533-//temp = temp;
> > > --
> > > 627-
> > > 628-
> > > 629-
> > > 630-}
> > > 631-
> > > 632:if((*USART3_SR) & (1<<4)) // idle
> > > 633- 44c:4b12 ldrr3, [pc, #72]
Re: stm32f4 __wfi
i searched it by add -i
56794:d040 <_CPU_Thread_Idle_body>:
56795-#ifdef ARM_MULTILIB_HAS_WFI
56796-
56797:void *_CPU_Thread_Idle_body( uintptr_t ignored )
56798-{
56799- while ( true ) {
56800-__asm__ volatile ("wfi");
56801-d040:bf30 wfi
56802- }
56803:d042:e7fd b.nd040 <_CPU_Thread_Idle_body>
56804-
56805-d044 :
56806-int rtems_filesystem_default_close(
56807- rtems_libio_t *iop
56808-)
56809-{
56810- return 0;
56811-}
56812-d044:2000 movsr0, #0
56813-d046:4770 bxlr
that's to say when i want to enter low power i just need to call sleep or
rtems_task_wake_after or just while(1); ?
On Wed, Apr 24, 2019 at 4:36 PM Christian Mauderer <
christian.maude...@embedded-brains.de> wrote:
> For some reason your grep hasn't found the _CPU_Thread_Idle_body. It's
> possible that the stm32f4 uses some other function for that also I don't
> know why.
>
> For example for the xilinx_zynq_a9_qemu BSP the disassembled idle body
> looks like follows:
>
> void *_CPU_Thread_Idle_body( uintptr_t ignored )
> {
>11d70: b480push{r7}
>11d72: b083sub sp, #12
>11d74: af00add r7, sp, #0
>11d76: 6078str r0, [r7, #4]
> while ( true ) {
> #ifdef ARM_MULTILIB_HAS_WFI
> __asm__ volatile ("wfi");
>11d78: bf30wfi
>11d7a: e7fd b.n 11d78 <_CPU_Thread_Idle_body+0x8>
>
> Am 24.04.19 um 10:25 schrieb Jython:
> > arm-rtems4.11-objdump -dS hello.exe | grep idle --color=auto -n -B 5 -A
> 12
> >
> > there is no idle function which calls wfi command
> > // log
> > 508-
> > 509-
> > 510-
> > 511-}
> > 512-
> > 513:if((*USART2_SR) & (1<<4)) // idle
> > 514- 3aa:4b13 ldrr3, [pc, #76]; (3f8
> > )
> > 515- 3ac:681b ldrr3, [r3, #0]
> > 516- 3ae:681b ldrr3, [r3, #0]
> > 517- 3b0:f003 0310 and.wr3, r3, #16
> > 518- 3b4:2b00 cmpr3, #0
> > 519- 3b6:d00a beq.n3ce
> > 520-{
> > 521://printk("idle ");
> > 522-
> > 523-temp = (*USART2_SR);
> > 524- 3b8:4b0f ldrr3, [pc, #60]; (3f8
> > )
> > 525- 3ba:681b ldrr3, [r3, #0]
> > 526- 3bc:681b ldrr3, [r3, #0]
> > 527- 3be:60fb strr3, [r7, #12]
> > 528-temp = (*USART2_DR);
> > 529- 3c0:4b0f ldrr3, [pc, #60]; (400
> > )
> > 530- 3c2:681b ldrr3, [r3, #0]
> > 531- 3c4:681b ldrr3, [r3, #0]
> > 532- 3c6:60fb strr3, [r7, #12]
> > 533-//temp = temp;
> > --
> > 627-
> > 628-
> > 629-
> > 630-}
> > 631-
> > 632:if((*USART3_SR) & (1<<4)) // idle
> > 633- 44c:4b12 ldrr3, [pc, #72]; (498
> > )
> > 634- 44e:681b ldrr3, [r3, #0]
> > 635- 450:681b ldrr3, [r3, #0]
> > 636- 452:f003 0310 and.wr3, r3, #16
> > 637- 456:2b00 cmpr3, #0
> > 638- 458:d00a beq.n470
> > 639-{
> > 640://printk("idle ");
> > 641-
> > 642-temp = (*USART3_SR);
> > 643- 45a:4b0f ldrr3, [pc, #60]; (498
> > )
> > 644- 45c:681b ldrr3, [r3, #0]
> > 645- 45e:681b ldrr3, [r3, #0]
> > 646- 460:60fb strr3, [r7, #12]
> > 647-temp = (*USART3_DR);
> > 648- 462:4b0f ldrr3, [pc, #60]; (4a0
> > )
> > 649- 464:681b ldrr3, [r3, #0]
> > 650- 466:681b ldrr3, [r3, #0]
> > 651- 468:60fb strr3, [r7, #12]
> > 652-
> > --
> > 26329-
> > 26330-if (newTail == tty->rawOutBuf.Head) {
> > 26331- /*
> > 26332- * Buffer has become empty
> > 26333- */
> > 26334: tty->rawOutBufState = rob_idle;
> > 26335-69a0:f880 5094 strb.wr5, [r0, #148]; 0x94
> > 26336- (*tty->handler.write) (ctx, NULL, 0);
> > 26337-69a4:f8d4 30c4 ldr.wr3, [r4, #196]; 0xc4
> > 26338-69a8:4670 movr0, lr
> > 26339-69aa:4629 movr1, r5
> > 26340-69ac:462a movr2, r5
&g
Re: stm32f4 __wfi
9857- }
49858-}
49859-b9f4:b009 addsp, #36; 0x24
49860-b9f6:bdf0 pop{r4, r5, r6, r7, pc}
49861-b9f8:200042c0 .word0x200042c0
49862-b9fc:000183c0 .word0x000183c0
49863-ba00:200011c0 .word0x200011c0
49864-ba04:200011bc .word0x200011bc
49865-ba08:0001847c .word0x0001847c
49866-ba0c:20004640 .word0x20004640
49867-ba10:49444c45 .word0x49444c45
--
54093- const Scheduler_Control *scheduler,
54094- Thread_Control *the_thread,
54095- Per_CPU_Control *cpu
54096-)
54097-{
54098: ( *scheduler->Operations.start_idle )( scheduler, the_thread, cpu );
54099-c7de:4809 ldrr0, [pc, #36]; (c804
<_Thread_Start+0x50>)
54100- _Thread_Ready( the_thread );
54101-} else {
54102- const Scheduler_Control *scheduler = _Scheduler_Get_by_CPU( cpu
);
54103-
54104- if ( scheduler != NULL ) {
54105-the_thread->current_state = STATES_READY;
54106-c7e0:2200 movsr2, #0
54107-c7e2:612a strr2, [r5, #16]
54108-c7e4:6b43 ldrr3, [r0, #52]; 0x34
54109-c7e6:4629 movr1, r5
54110-c7e8:9a05 ldrr2, [sp, #20]
On Wed, Apr 24, 2019 at 2:59 PM Christian Mauderer <
christian.maude...@embedded-brains.de> wrote:
> Am 24.04.19 um 02:35 schrieb Jython:
> > yes, I need to do low power for stm32f4
> > will this line work __asm__ volatile ("wfi");?
>
> That line should be correct. Please note that the instruction is already
> used in the armv7 idle thread:
>
>
> https://git.rtems.org/rtems/tree/cpukit/score/cpu/arm/armv7-thread-idle.c#n32
>
> The stm32f4 is a Cortex-M4 so it's quite likely that this routine is
> used. You can check by doing an "arm-rtems5-objdump -dS" on your file
> and search for the idle body.
>
> With kind regards
>
> Christian
>
> >
> >
> > On Tue, Apr 23, 2019 at 10:28 PM Christian Mauderer
> > > <mailto:christian.maude...@embedded-brains.de>> wrote:
> >
> > Am 22.04.19 um 09:47 schrieb Jython:
> > > HI, ALL!
> > > wfi
> >
> http://www.keil.com/support/man/docs/armcc/armcc_chr1359125004400.htm
> > > how can i call the arm __wfi?
> > >
> > > ___
> > > users mailing list
> > > users@rtems.org <mailto:users@rtems.org>
> > > http://lists.rtems.org/mailman/listinfo/users
> > >
> >
> > Hello Jython,
> >
> > WFI is an assembler instruction. The Keil wrapper isn't available in
> > gcc. I know of no direct replacement. Most likely you need a gcc
> inline
> > assembly for that.
> >
> > May I ask why you would need "wfi"? If you use a operating system,
> the
> > system typically handles such low level stuff for you. The only
> > application that springs to mind for that instruction is overwriting
> the
> > idle loop to save energy.
> >
> > Best regards
> >
> > Christian
> >
> > --
> >
> > embedded brains GmbH
> > Herr Christian Mauderer
> > Dornierstr. 4
> > D-82178 Puchheim
> > Germany
> > email: christian.maude...@embedded-brains.de
> > <mailto:christian.maude...@embedded-brains.de>
> > Phone: +49-89-18 94 741 - 18
> > Fax: +49-89-18 94 741 - 08
> > PGP: Public key available on request.
> >
> > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
> >
>
> --
>
> embedded brains GmbH
> Herr Christian Mauderer
> Dornierstr. 4
> D-82178 Puchheim
> Germany
> email: christian.maude...@embedded-brains.de
> Phone: +49-89-18 94 741 - 18
> Fax: +49-89-18 94 741 - 08
> PGP: Public key available on request.
>
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
>
___
users mailing list
users@rtems.org
http://lists.rtems.org/mailman/listinfo/users
stm32f4 wakeup interrupt
HI, ALL!
why the code stuck in wakeup handler while the RTC gets time work fine
i have checked some days, but no register error found, i suspect that the
handler function is the issue
// code
rtems_isr rtc_wakeup_handler(rtems_vector_number vector)
{
uint32_t STM32F4_RTC_ISR = (*(volatile uint32_t *)(0x4000280C));
// clear 10bit
if(STM32F4_RTC_ISR & (1<<10))
{
//printk("wak\n");
STM32F4_RTC_ISR &= ~(1<<10);
STM32F4_RTC_ISR &= 0xfbff;
}
volatile uint32_t EXIT_PR = *(volatile uint32_t*)0x40013C14;
printk("before clr %08x\n", EXIT_PR);
EXIT_PR |= 1<<22;
int i;
for(i = 0; i < 1000; i++) i = i + 1 - 1;
printk(" %08x\n", EXIT_PR);
}
the printed log attached, why the EXIT_PR bit22 not cleared
rtc
after while BDCR 8103
BDCR 8103
after rtc_write_enable
enter init mode
prer 007F00FF
isr value 0413
Secs 6Mins 6Hours 23Days 19Months 4Years 2019
final CR 4405
prer 007F00FF
create timer ok
create uart timer ok
interrupt ok
interrupt ok
usart3 interrupt installed ok
rtc interrupt installed ok
wakeup block begin
will sett wutr
before set CR 4005
after clear alarma WUCKSEL CR value 4005
WUTR 0032
**CR 4405
isr value 0033
clear line 22 exit flag
1s ticks 100
stack check 0
Stack usage by thread
ID NAMELOW HIGH CURRENT AVAILABLE USED
0x09010001 IDLE 0020006F60 - 0020007F5F 0020007F00 4080 Unavailable
0x0A010001 UI1 0020007F88 - 002000AF87 002000AD90 12272 Unavailable
isr level 0
usart 3 gps init
usart read buf len 44
cmd reply:
RDY
+CPIN: READY
SMS DONE
AT
OK
usart read buf len 11
cmd reply: ATE0
OK
usart read buf len 25
cmd reply:
460024985206706
OK
usart read buf len 6
cmd reply:
OK
usart read buf len 21
csq reply:
+CSQ: 27,99
OK
usart read buf len 95
csq reply:
+CPSI:
LTE,Online,460-00,0x27BD,46372353,372,EUTRAN-BAND40,38950,5,5,-77,-912,-635,22
OK
usart read buf len 42
csq reply:
+COPS: 0,0,"CHINA MOBILE CMCC",7
OK
usart read buf len 21
cereg reply:
+CEREG: 0,1
OK
usart read buf len 21
csq reply:
OK
+NETOPEN: 0
usart read buf len 32
csq reply:
+IPADDR: 10.88.169.109
OK
command AT+CIPOPEN=0,"TCP","monitor.iok.la",18327
usart read buf len 23
ipopen reply:
OK
+CIPOPEN: 0,0
usart read buf len 6
IPHEAD reply:
OK
tcp_send_data function begin
usart read buf len 21
usart read buf len 3
0d 0a
ipsend reply:
>
ready to send data
usart read buf len 25
send tcp data reply:
OK
+CIPSEND: 0,5,5
tcp_send_data function end
tcp_send_data ok
gps frame GPRMC,094423.00,A,2232.27251,N,11401.13288,E,0.145,,210319,,,A at
get_gps_data
before while
usart3 read buf len 300
Secs 35Mins 6Hours 23Days 19Months 4Years 2019
Secs 35Mins 6Hours 23Days 19Months 4Years 2019
Secs 36Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 144
Secs 36Mins 6Hours 23Days 19Months 4Years 2019
Secs 37Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 144
Secs 37Mins 6Hours 23Days 19Months 4Years 2019
Secs 37Mins 6Hours 23Days 19Months 4Years 2019
Secs 38Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 144
Secs 38Mins 6Hours 23Days 19Months 4Years 2019
Secs 39Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 170
Secs 39Mins 6Hours 23Days 19Months 4Years 2019
Secs 39Mins 6Hours 23Days 19Months 4Years 2019
Secs 40Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 144
Secs 40Mins 6Hours 23Days 19Months 4Years 2019
Secs 41Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 144
Secs 41Mins 6Hours 23Days 19Months 4Years 2019
Secs 41Mins 6Hours 23Days 19Months 4Years 2019
Secs 42Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 144
Secs 42Mins 6Hours 23Days 19Months 4Years 2019
Secs 43Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 170
Secs 43Mins 6Hours 23Days 19Months 4Years 2019
Secs 43Mins 6Hours 23Days 19Months 4Years 2019
Secs 44Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 144
Secs 44Mins 6Hours 23Days 19Months 4Years 2019
Secs 45Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 144
Secs 45Mins 6Hours 23Days 19Months 4Years 2019
Secs 45Mins 6Hours 23Days 19Months 4Years 2019
Secs 46Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 144
Secs 46Mins 6Hours 23Days 19Months 4Years 2019
Secs 47Mins 6Hours 23Days 19Months 4Years 2019
Secs 47Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 170
Secs 47Mins 6Hours 23Days 19Months 4Years 2019
Secs 48Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 170
Secs 48Mins 6Hours 23Days 19Months 4Years 2019
Secs 49Mins 6Hours 23Days 19Months 4Years 2019
Secs 49Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 170
Secs 49Mins 6Hours 23Days 19Months 4Years 2019
Secs 50Mins 6Hours 23Days 19Months 4Years 2019
usart3 read buf len 170
Secs 50Mins 6Hours 23Days 19Months 4Years 2019
Secs 51Mins 6Hours 23Days 19Months 4Years 2019
Secs 51Mins
Re: stm32f4 __wfi
yes, I need to do low power for stm32f4
will this line work __asm__ volatile ("wfi");?
On Tue, Apr 23, 2019 at 10:28 PM Christian Mauderer <
christian.maude...@embedded-brains.de> wrote:
> Am 22.04.19 um 09:47 schrieb Jython:
> > HI, ALL!
> > wfi
> http://www.keil.com/support/man/docs/armcc/armcc_chr1359125004400.htm
> > how can i call the arm __wfi?
> >
> > ___
> > users mailing list
> > users@rtems.org
> > http://lists.rtems.org/mailman/listinfo/users
> >
>
> Hello Jython,
>
> WFI is an assembler instruction. The Keil wrapper isn't available in
> gcc. I know of no direct replacement. Most likely you need a gcc inline
> assembly for that.
>
> May I ask why you would need "wfi"? If you use a operating system, the
> system typically handles such low level stuff for you. The only
> application that springs to mind for that instruction is overwriting the
> idle loop to save energy.
>
> Best regards
>
> Christian
>
> --
>
> embedded brains GmbH
> Herr Christian Mauderer
> Dornierstr. 4
> D-82178 Puchheim
> Germany
> email: christian.maude...@embedded-brains.de
> Phone: +49-89-18 94 741 - 18
> Fax: +49-89-18 94 741 - 08
> PGP: Public key available on request.
>
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
>
___
users mailing list
users@rtems.org
http://lists.rtems.org/mailman/listinfo/users
stm32f4 __wfi
HI, ALL! wfi http://www.keil.com/support/man/docs/armcc/armcc_chr1359125004400.htm how can i call the arm __wfi? ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
after add rtc.c
HI, ALL! according to https://www.mail-archive.com/devel@rtems.org/msg03132.html i add a rtc.c file for stm32f4 have added below two lines at makefile.am //RTC libbsp_a_SOURCES += rtc.c libbsp_a_SOURCES += ../../shared/tod.c x - libi2cio_a-i2c-sc620.o x - libi2cio_a-spi-memdrv.o x - libi2cio_a-spi-flash-m25p40.o x - libi2cio_a-spi-fram-fm25l256.o x - libi2cio_a-spi-sd-card.o x - libdisplay_a-disp_hcms29xx.o x - libdisplay_a-font_hcms29xx.o ls o-optimize/*.o > o-optimize/librtemsbsp.a-list ls o-optimize/*.rel >> o-optimize/librtemsbsp.a-list ls: cannot access o-optimize/*.rel: No such file or directory make[3]: [o-optimize/librtemsbsp.a] Error 2 (ignored) arm-rtems4.11-ar rc o-optimize/librtemsbsp.a @o-optimize/librtemsbsp.a-list rm -f o-optimize/librtemsbsp.a-list o-optimize/*.o o-optimize/*.rel arm-rtems4.11-ranlib o-optimize/librtemsbsp.a but the build have some ignored errors, so does it matter ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
Re: build command
no build error, Just want to make sure command is OK i am new to RTEMS On Thu, Apr 18, 2019 at 1:28 PM Chris Johns wrote: > On 18/4/19 1:36 pm, Jython wrote: > > what's the correct and complete command to build the system after > changes under > > the bsp directory like > > \rtems-4.11.3\rtems-4.11.3\c\src\lib\libbsp\arm\stm32f4 > > > > what i do is : bootstrap -c , bootstrap -p , ./bootstrap then configure > and make > > but sometime i think not build completely > > You would need to provide some output indicating the issue for us to help. > > Chris > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
stm32f4 RTC driver
HI, ALL! is there a stm32f4 RTC driver? how to use the RTC? ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
build command
what's the correct and complete command to build the system after changes under the bsp directory like \rtems-4.11.3\rtems-4.11.3\c\src\lib\libbsp\arm\stm32f4 what i do is : bootstrap -c , bootstrap -p , ./bootstrap then configure and make but sometime i think not build completely ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
when enable idle interrupt uart does not work
HI, ALL AND JOEL!
i am debugging the stm32 uart, found that the idle interrupt will effect
the RX
have cleared the idle flag by pragma
but now i can not receive uart data, i don't know what's the error
uint32_t *USART2_SR = (uint32_t *)0x40004400;
uint32_t *USART2_DR = (uint32_t *)0x40004404;
#pragma GCC push_options
#pragma GCC optimize ("O0")
rtems_isr USART2_handler(rtems_vector_number vector)
{
uint32_t temp = temp;
uint32_t SR = *USART2_SR;
if((*USART2_SR) & (1<<5))
{
//printk("into int\n");
if(uart2_index < 100)
uart2_buf[uart2_index++] = (uint8_t)(*USART2_DR)&0xff;
else
temp = *USART2_DR;
//printk("%02X ", uart2_buf[uart2_index - 1]);
}
if((*USART2_SR) & (1<<4)) // idle
{
//printk("idle ");
temp = (*USART2_SR);
temp = (*USART2_DR);
//temp = temp;
uart2_rev_flag = 1;
//printk("fla %08X", *USART2_SR);
}
if((*USART2_SR) & (1<<3))
{
//int temp = (*USART2_DR)&0xff;
temp = *USART2_SR;
temp = *USART2_DR;
}
//temp = (*USART2_SR);
//temp = (*USART2_DR);
}
#pragma GCC pop_options
my history mail post link
https://lists.rtems.org/pipermail/users/2019-April/033147.html
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http://lists.rtems.org/mailman/listinfo/users
Re: always idle interrupt
log many, the SR idle flag does not be cleared Stack usage by thread ID NAMELOW HIGH CURRENT AVAILABLE USED 0x09010001 IDLE 0020006C40 - 0020007C3F 0020007BE0 4080 Unavailable 0x0A010001 UI1 0020007C68 - 002000AC67 002000AB88 12272 Unavailable isr level 0 usart_initialize begin [18:53:18.444]ÊÕ¡û¡ôidle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla 00D0idle fla On Tue, Apr 16, 2019 at 3:56 PM Jython wrote: > the idle flag is not cleared , so does it relate to code optimizations? > how to make it O0 > > On Tue, Apr 16, 2019 at 3:08 PM Jython wrote: > >> HI, ALL! >> the stm32 usart2 code is here >> https://gist.github.com/goog/3da34a64eff11902579df333cfd1d863 >> why it always enter the idle interrupt and printk log outputs >> i almost could not find the error point, someone of you would help me? >> > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
Re: always idle interrupt
the idle flag is not cleared , so does it relate to code optimizations? how to make it O0 On Tue, Apr 16, 2019 at 3:08 PM Jython wrote: > HI, ALL! > the stm32 usart2 code is here > https://gist.github.com/goog/3da34a64eff11902579df333cfd1d863 > why it always enter the idle interrupt and printk log outputs > i almost could not find the error point, someone of you would help me? > ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
always idle interrupt
HI, ALL! the stm32 usart2 code is here https://gist.github.com/goog/3da34a64eff11902579df333cfd1d863 why it always enter the idle interrupt and printk log outputs i almost could not find the error point, someone of you would help me? ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
_Scheduler_priority_Ready_queue_first assert fail
No, later i know returrned 0 is OK, so how to debug the scheduler problem? ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
_Scheduler_priority_Ready_queue_first assert fail
HI, ALL, specially Huber! when i press interrupt key, i got error about scheduler, how to solve the problem? [09:42:04.496]ÊÕ¡û¡ôthe console count 3 create timer ok interrupt ok [09:42:05.001]ÊÕ¡û¡ô1s ticks 100 [09:42:09.996]ÊÕ¡û¡ôstack check 0 Stack usage by thread ID NAMELOW HIGH CURRENT AVAILABLE USED 0x09010001 IDLE 0020006BC0 - 0020007BBF 0020007B60 4080 Unavailable 0x0A010001 UI1 0020007BE8 - 002000CBE7 002000CB80 20464 Unavailable 0 0 0 0 0 0 0 0 0 0 before while [09:42:20.974]ÊÕ¡û¡ôkey pressed [09:42:21.209]ÊÕ¡û¡ôassertion "first != _Chain_Tail( _queues[ index ] )" failed: file "../../cpukit/../../../stm32f4/lib/include/rtems/score/schedulerpriorityimpl.h", line 166, function: _Scheduler_priority_Ready_queue_first ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
stm32f4 key external interrupt
HI, ALL! I want to implement a key function, have coded some like https://gist.github.com/goog/5e5b484430328d3c1153b474ce147079 using the 'stm32f4_gpio_set_config' and register settings , but does not work either, so hope some guy could give me some guide! thanks! ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
project add files
HI, ALL my file tree log is here https://gist.github.com/goog/36cab05f82aba548a432d616fc3c2cbe build log // ../../../../../../../rtems-4.11.3/c/src/../../testsuites/samples/hello/init.c:301:5: warning: nested extern declaration of 'rtems_stack_checker_report_usage' [-Wnested-externs] ../../../../../../../rtems-4.11.3/c/src/../../testsuites/samples/hello/init.c: At top level: ../../../../../../../rtems-4.11.3/c/src/../../testsuites/samples/hello/init.c:80:14: warning: 'i2c_read' declared 'static' but never defined [-Wunused-function] static uint8 i2c_read(int fd, uint8 reg, uint8 *val); ^ ../../../../../../../rtems-4.11.3/c/src/../../testsuites/samples/hello/init.c:81:14: warning: 'printarray' declared 'static' but never defined [-Wunused-function] static uint8 printarray(uint8 Array[], uint8 Num); ^ mv -f .deps/init.Tpo .deps/init.Po arm-rtems4.11-gcc -B../../../../../stm32f4/lib/ -specs bsp_specs -qrtems -march=armv7-m -mthumb -O2 -g -Wall -Wmissing-prototypes -Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs -march=armv7-m -mthumb -o hello.exe init.o init.o: In function `Init': /home/cheng/stm32f4/arm-rtems4.11/c/stm32f4/testsuites/samples/hello/../../../../../../../rtems-4.11.3/c/src/../../testsuites/samples/hello/init.c:271: undefined reference to `OLED_Init' collect2: error: ld returned 1 exit status make[6]: *** [hello.exe] Error 1 make[6]: Leaving directory `/home/cheng/stm32f4/arm-rtems4.11/c/stm32f4/testsuites/samples/hello' make[5]: *** [all-local] Error 1 make[5]: Leaving directory `/home/cheng/stm32f4/arm-rtems4.11/c/stm32f4/testsuites/samples' make[4]: *** [all] Error 2 make[4]: Leaving directory `/home/cheng/stm32f4/arm-rtems4.11/c/stm32f4/testsuites/samples' make[3]: *** [all-recursive] Error 1 make[3]: Leaving directory `/home/cheng/stm32f4/arm-rtems4.11/c/stm32f4/testsuites' make[2]: *** [all-recursive] Error 1 the 'OLED_Init' function in oled.c and also declare in oled.h as extern void OLED_Init(void); dont know why it happened ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
i2c eeprom example for stm32
HI, ALL! the init file is here https://gist.github.com/goog/4040cb50f2681137cf3c5721eff59f4c but the fstat return so big in size, tthe read return a -1, you could see it at the second gist content waitting for your help! ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
code halt but no error log
HI! my code is here: https://github.com/goog/rttest/blob/master/init.c I have enabled uart2 and uart3 in configure.ac under stm32f4 , but https://github.com/goog/rttest/blob/255eede89d71dcf2654b2cf370e3a0bfe83cb9dd/init.c#L341 does not return, log also does not be printed so i dont know how to do it. hope you could help me! below is the log i got, uart2 log com, uart3 for app uart2 print *** i2c test begin *** create timer ok [16:06:41.769]ÊÕ¡û¡ôbefore oprator com3 Stack usage by thread ID NAMELOW HIGH CURRENT AVAILABLE USED 0x09010001 IDLE 0020005510 - 002000650F 00200064B0 4080 Unavailable 0x0A010001 UI1 0020006518 - 0020007517 0020007410 4080 Unavailable ux_uart_init begin ___ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
