Re: [USRP-users] X310 Power before Transmit
My mistake, I'm using a UBX daughterboard with the X310 and was checking the DAC_ENABLE pin in the FPGA. I figured DAC_ENABLE might toggle whenever there is data to transmit, but it wasn't the case. On Mon, Feb 25, 2019 at 10:44 AM Marcus D Leech wrote: > I’m confused. There is no AD9361 on the X310. > > Sent from my iPhone > > > On Feb 25, 2019, at 10:02 AM, Alexander Olihovik via USRP-users < > usrp-users@lists.ettus.com> wrote: > > > > Hi all, > > > > I modified the X310's FPGA to toggle a GPIO pin immediately once it sees > TX data, and delay the TX data by a fixed number of samples. Using an > oscilloscope, I found that everything works as expected, but there is an > initial spike of RF power that precedes the GPIO trigger and the RF signal. > Has anyone else experienced this? Is there anything I can set my GPIO > trigger on to start before the power spike? I also tried triggering the > GPIO pin on DAC_ENABLE, but it seems this signal goes high and stays high > once the AD9361 is initialized, and not only when the DAC is about to push > out data. > > > > Best regards, > > Alex > > ___ > > USRP-users mailing list > > USRP-users@lists.ettus.com > > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > -- *Alex OlihovikUniversity of Virginia 2013BS Electrical EngineeringBS Computer engineeringano...@virginia.edu * ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] EXTERNAL: USRP-users Digest, Vol 102, Issue 22
On number 1: I was basically asking, is that 75ppb number accurate for a cold boot up having never been locked? If I turn on the device and tune to 1Ghz, could I expect the device to accurately tune to and stay within +/- 75Hz of 1Ghz. On number 2: If I do not have a gps lock, I do not get a true value returned for the ref_locked sensor. Does the gpsdo not put out a 10Mhz ref unless it has a lock? I have the check for ref_locked sensor in a while loop right now on a B200 with a gpsdo installed without a gps lock and it just sits there never getting lock. Message: 2 Date: Sat, 23 Feb 2019 17:41:28 -0500 From: "Marcus D. Leech" To: usrp-users@lists.ettus.com Subject: Re: [USRP-users] Using GPSDO with gps lock Message-ID: <5c71cc18.9090...@gmail.com> Content-Type: text/plain; charset=windows-1252; format=flowed On 02/23/2019 04:04 PM, Sirkin, Joshua F. via USRP-users wrote: > I had a question about the TCXO GPSDO module for the B200/B210. I am > interested in using it without a gps lock as a better clock than the tcxo > that is internal to the bare board. I am only interested in frequency > stability, not time of day. If I did use it in this way, I had a few > questions: > > 1) The spec on it says that it is 75ppb over temperature in unlock > condition. That is the only data point I can find about using it unlocked. > Do you have any better numbers on what should be expected for frequency > stability cold booting the device without ever giving it any gps if I select > my reference source as external? What numbers are you looking for? > 2) Is the ref_locked sensor value for aligning the GPSDO to a gps > reference? Can I skip the ref locked check if I am not using gps? The "ref_locked" sensor tells you when the reference PLL has achieved lock to an external source. This usually happens within milliseconds of the "external source" (whether that's the GPSDO or an external 10MHz reference) being present. > 3) I believe I read somewhere that the GPSDO uses the same 10MHz lines as > the REF in. What happens if I have a 10Mhz source hooked up while the gpsdo > module is installed when I do not have a gps lock? What would happen if a > 10Mhz input was hooked up while I did have a gps lock? There are electrical cross-talk issues between the GPSDO's 10MHz line and the external reference line. So, if you plan to use an external reference, you should remove the GPSDO module from the board. > > > This message is intended only for the use of the individual or entity to > which it is addressed and may contain ZETA Associates confidential or > proprietary information. If you are not the intended recipient, any use, > dissemination, or distribution of this communication is prohibited. If you > have received this communication in error, please notify the sender and > delete all copies. > > ___ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com This message is intended only for the use of the individual or entity to which it is addressed and may contain ZETA Associates confidential or proprietary information. If you are not the intended recipient, any use, dissemination, or distribution of this communication is prohibited. If you have received this communication in error, please notify the sender and delete all copies. ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] X310 Power before Transmit
I’m confused. There is no AD9361 on the X310. Sent from my iPhone > On Feb 25, 2019, at 10:02 AM, Alexander Olihovik via USRP-users > wrote: > > Hi all, > > I modified the X310's FPGA to toggle a GPIO pin immediately once it sees TX > data, and delay the TX data by a fixed number of samples. Using an > oscilloscope, I found that everything works as expected, but there is an > initial spike of RF power that precedes the GPIO trigger and the RF signal. > Has anyone else experienced this? Is there anything I can set my GPIO trigger > on to start before the power spike? I also tried triggering the GPIO pin on > DAC_ENABLE, but it seems this signal goes high and stays high once the AD9361 > is initialized, and not only when the DAC is about to push out data. > > Best regards, > Alex > ___ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[USRP-users] X310 Power before Transmit
Hi all, I modified the X310's FPGA to toggle a GPIO pin immediately once it sees TX data, and delay the TX data by a fixed number of samples. Using an oscilloscope, I found that everything works as expected, but there is an initial spike of RF power that precedes the GPIO trigger and the RF signal. Has anyone else experienced this? Is there anything I can set my GPIO trigger on to start before the power spike? I also tried triggering the GPIO pin on DAC_ENABLE, but it seems this signal goes high and stays high once the AD9361 is initialized, and not only when the DAC is about to push out data. Best regards, Alex ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com