Re: [Xen-devel] [PATCH V6 06/10] tools/libxl: Set 'reg' of cpu node equal to MPIDR affinity for domU
On Mon, 2015-06-01 at 20:56 +0800, Chen Baozi wrote: From: Chen Baozi baoz...@gmail.com According to ARM CPUs bindings, the reg field should match the MPIDR's affinity bits. We will use AFF0 and AFF1 when constructing the reg value of the guest at the moment, for it is enough for the current max vcpu number. Signed-off-by: Chen Baozi baoz...@gmail.com Reviewed-by: Julien Grall julien.gr...@citrix.com Actually, please ignore previous ack. [...] +uint64_t mpidr_aff; [...] +name = GCSPRINTF(cpu@%lx, mpidr_aff); The correct format specifier for a uint64_t is %PRIx64, otherwise you will break 32 bit build. With that changed you can put the ack back... Ian. res = fdt_begin_node(fdt, name); if (res) return res; @@ -297,7 +307,7 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int nr_cpus, res = fdt_property_string(fdt, enable-method, psci); if (res) return res; -res = fdt_property_regs(gc, fdt, 1, 0, 1, (uint64_t)i); +res = fdt_property_regs(gc, fdt, 1, 0, 1, mpidr_aff); if (res) return res; res = fdt_end_node(fdt); ___ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
Re: [Xen-devel] [PATCH V6 06/10] tools/libxl: Set 'reg' of cpu node equal to MPIDR affinity for domU
On Mon, 2015-06-01 at 20:56 +0800, Chen Baozi wrote: From: Chen Baozi baoz...@gmail.com According to ARM CPUs bindings, the reg field should match the MPIDR's affinity bits. We will use AFF0 and AFF1 when constructing the reg value of the guest at the moment, for it is enough for the current max vcpu number. Signed-off-by: Chen Baozi baoz...@gmail.com Reviewed-by: Julien Grall julien.gr...@citrix.com Acked-by: Ian Campbell ian.campb...@citrix.com ___ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
[Xen-devel] [PATCH V6 06/10] tools/libxl: Set 'reg' of cpu node equal to MPIDR affinity for domU
From: Chen Baozi baoz...@gmail.com
According to ARM CPUs bindings, the reg field should match the MPIDR's
affinity bits. We will use AFF0 and AFF1 when constructing the reg value
of the guest at the moment, for it is enough for the current max vcpu
number.
Signed-off-by: Chen Baozi baoz...@gmail.com
Reviewed-by: Julien Grall julien.gr...@citrix.com
---
tools/libxl/libxl_arm.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/tools/libxl/libxl_arm.c b/tools/libxl/libxl_arm.c
index c5088c4..16f4158 100644
--- a/tools/libxl/libxl_arm.c
+++ b/tools/libxl/libxl_arm.c
@@ -272,6 +272,7 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int
nr_cpus,
const struct arch_info *ainfo)
{
int res, i;
+uint64_t mpidr_aff;
res = fdt_begin_node(fdt, cpus);
if (res) return res;
@@ -283,7 +284,16 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int
nr_cpus,
if (res) return res;
for (i = 0; i nr_cpus; i++) {
-const char *name = GCSPRINTF(cpu@%d, i);
+const char *name;
+
+/*
+ * According to ARM CPUs bindings, the reg field should match
+ * the MPIDR's affinity bits. We will use AFF0 and AFF1 when
+ * constructing the reg value of the guest at the moment, for it
+ * is enough for the current max vcpu number.
+ */
+mpidr_aff = (i 0x0f) | (((i 4) 0xff) 8);
+name = GCSPRINTF(cpu@%lx, mpidr_aff);
res = fdt_begin_node(fdt, name);
if (res) return res;
@@ -297,7 +307,7 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int
nr_cpus,
res = fdt_property_string(fdt, enable-method, psci);
if (res) return res;
-res = fdt_property_regs(gc, fdt, 1, 0, 1, (uint64_t)i);
+res = fdt_property_regs(gc, fdt, 1, 0, 1, mpidr_aff);
if (res) return res;
res = fdt_end_node(fdt);
--
2.1.4
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