Re: [Xen-devel] [PATCH v4 00/15] Add support for Hygon Dhyana Family 18h processor

2019-04-03 Thread Jan Beulich
>>> On 03.04.19 at 17:21,  wrote:
> On 2019/4/3 0:15, Jan Beulich wrote:
>> On 02.04.19 at 18:00,  wrote:
>>> On 2019/4/2 23:14, Andrew Cooper wrote:
 On 30/03/2019 10:40, Pu Wen wrote:
> This patch series have been applied and tested successfully on Hygon
> Dhyana processor, also been tested on AMD EPYC (family 17h) processor.
> It works fine and makes no harm to the existing code.
 One thing I don't see in this series is anything about microcode
 loading.  Presumably you'll follow the AMD patchloading mechanism, with
 a blob you provide yourself?
>>> When the Hygon patchloading mechanism is practicable and it's necessary
>>> to load the Hygon microcode outside of BIOS, we'll send the patchloading
>>> patches to Xen and Linux mailing lists.
>> 
>> I suppose both Intel and AMD had this same intention of ucode loading
>> being a firmware job only, and we see where we are right now. As long
>> as updated firmware does not become available in a timely manner (or
>> perhaps not at all, because of a vendor considering a certain system
>> EOL), there's going to be a need to be able to load it from the OS.
> 
> It's reasonable. But I'll not put the microcode loading patch in this
> series, and will sent it individually later after sufficiently tested.

Fine with me, but Andrew will speak for himself.

> Or just add Hygon vendor checking to follow the AMD patchloading
> mechanism right now and do the adjustment for Hygon if needed in the
> future?

I'd prefer not to see this "blindly" enabled. As you say, it should
be tested. If no other changes are needed, the patch will be
easy to created and process.

Jan



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Re: [Xen-devel] [PATCH v4 00/15] Add support for Hygon Dhyana Family 18h processor

2019-04-03 Thread Pu Wen
On 2019/4/3 0:15, Jan Beulich wrote:
> On 02.04.19 at 18:00,  wrote:
>> On 2019/4/2 23:14, Andrew Cooper wrote:
>>> On 30/03/2019 10:40, Pu Wen wrote:
 This patch series have been applied and tested successfully on Hygon
 Dhyana processor, also been tested on AMD EPYC (family 17h) processor.
 It works fine and makes no harm to the existing code.
>>> One thing I don't see in this series is anything about microcode
>>> loading.  Presumably you'll follow the AMD patchloading mechanism, with
>>> a blob you provide yourself?
>> When the Hygon patchloading mechanism is practicable and it's necessary
>> to load the Hygon microcode outside of BIOS, we'll send the patchloading
>> patches to Xen and Linux mailing lists.
> 
> I suppose both Intel and AMD had this same intention of ucode loading
> being a firmware job only, and we see where we are right now. As long
> as updated firmware does not become available in a timely manner (or
> perhaps not at all, because of a vendor considering a certain system
> EOL), there's going to be a need to be able to load it from the OS.

It's reasonable. But I'll not put the microcode loading patch in this
series, and will sent it individually later after sufficiently tested.
Or just add Hygon vendor checking to follow the AMD patchloading
mechanism right now and do the adjustment for Hygon if needed in the
future?

-- 
Regards,
Pu Wen

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Re: [Xen-devel] [PATCH v4 00/15] Add support for Hygon Dhyana Family 18h processor

2019-04-02 Thread Jan Beulich
>>> On 02.04.19 at 18:00,  wrote:
> On 2019/4/2 23:14, Andrew Cooper wrote:
>> On 30/03/2019 10:40, Pu Wen wrote:
>>> This patch series have been applied and tested successfully on Hygon
>>> Dhyana processor, also been tested on AMD EPYC (family 17h) processor.
>>> It works fine and makes no harm to the existing code.
>>>
>>> Reference:
>>> [1] 
> https://www.amd.com/system/files/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh 
> .pdf
>> 
>> One thing I don't see in this series is anything about microcode
> 
> Right now Hygon load microcode in BIOS.
> 
>> loading.  Presumably you'll follow the AMD patchloading mechanism, with
>> a blob you provide yourself?
> 
> We are exploring the Hygon patchloading mechanism, which will employ 
> most of the functions of AMD's. We also try to make the Hygon microcode 
> blob be compatible with the AMD one.
> 
> When the Hygon patchloading mechanism is practicable and it's necessary 
> to load the Hygon microcode outside of BIOS, we'll send the patchloading 
> patches to Xen and Linux mailing lists.

I suppose both Intel and AMD had this same intention of ucode loading
being a firmware job only, and we see where we are right now. As long
as updated firmware does not become available in a timely manner (or
perhaps not at all, because of a vendor considering a certain system
EOL), there's going to be a need to be able to load it from the OS.

Jan



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Re: [Xen-devel] [PATCH v4 00/15] Add support for Hygon Dhyana Family 18h processor

2019-04-02 Thread Pu Wen

On 2019/4/2 23:14, Andrew Cooper wrote:

On 30/03/2019 10:40, Pu Wen wrote:

This patch series have been applied and tested successfully on Hygon
Dhyana processor, also been tested on AMD EPYC (family 17h) processor.
It works fine and makes no harm to the existing code.

Reference:
[1] 
https://www.amd.com/system/files/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf


One thing I don't see in this series is anything about microcode


Right now Hygon load microcode in BIOS.


loading.  Presumably you'll follow the AMD patchloading mechanism, with
a blob you provide yourself?


We are exploring the Hygon patchloading mechanism, which will employ 
most of the functions of AMD's. We also try to make the Hygon microcode 
blob be compatible with the AMD one.


When the Hygon patchloading mechanism is practicable and it's necessary 
to load the Hygon microcode outside of BIOS, we'll send the patchloading 
patches to Xen and Linux mailing lists.


Thx.

--
Regards,
Pu Wen

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Re: [Xen-devel] [PATCH v4 00/15] Add support for Hygon Dhyana Family 18h processor

2019-04-02 Thread Andrew Cooper
On 30/03/2019 10:40, Pu Wen wrote:
> As a new x86 CPU vendor, Chengdu Haiguang IC Design Co., Ltd (Hygon)
> is a joint venture between AMD and Haiguang Information Technology Co.,
> Ltd., aims at providing high performance x86 processors for China
> server market.
>
> The first generation Hygon processor(Dhyana) originates from AMD
> technology and shares most of the architecture with AMD's family 17h,
> but with different CPU vendor ID("HygonGenuine") and family series
> number 18h (Hygon negotiated with AMD to make sure that only Hygon
> will use family 18h).
>
> To enable support of Xen to Hygon Dhyana CPU, add a new vendor type
> (X86_VENDOR_HYGON, with value of 5), and share most of the code with
> AMD family 17h.
>
> The MSRs and CPUIDs which are used by this patch series are all defined
> in this PPR[1].
>
> This patch series have been applied and tested successfully on Hygon
> Dhyana processor, also been tested on AMD EPYC (family 17h) processor.
> It works fine and makes no harm to the existing code.
>
> Reference:
> [1] 
> https://www.amd.com/system/files/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf

One thing I don't see in this series is anything about microcode
loading.  Presumably you'll follow the AMD patchloading mechanism, with
a blob you provide yourself?

~Andrew

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