[jira] [Comment Edited] (CALCITE-6188) Multi-query optimization

[ https://issues.apache.org/jira/browse/CALCITE-6188?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel=17803376#comment-17803376 ] Jay Narale edited comment on CALCITE-6188 at 1/5/24 1:18 AM: - Not sure

[jira] [Comment Edited] (CALCITE-6188) Multi-query optimization

[ https://issues.apache.org/jira/browse/CALCITE-6188?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel=17803376#comment-17803376 ] Jay Narale edited comment on CALCITE-6188 at 1/5/24 1:15 AM: - Not sure

[jira] [Comment Edited] (CALCITE-6188) Multi-query optimization

[ https://issues.apache.org/jira/browse/CALCITE-6188?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel=17803376#comment-17803376 ] Jay Narale edited comment on CALCITE-6188 at 1/5/24 1:15 AM: - Not sure

[jira] [Commented] (CALCITE-6188) Multi-query optimization

[ https://issues.apache.org/jira/browse/CALCITE-6188?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel=17803376#comment-17803376 ] Jay Narale commented on CALCITE-6188: - Not sure if it is the same but currently we treat

[jira] [Comment Edited] (CALCITE-6188) Multi-query optimization

[ https://issues.apache.org/jira/browse/CALCITE-6188?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel=17803368#comment-17803368 ] Jay Narale edited comment on CALCITE-6188 at 1/5/24 12:55 AM: -- We

[jira] [Commented] (CALCITE-6188) Multi-query optimization

[ https://issues.apache.org/jira/browse/CALCITE-6188?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel=17803368#comment-17803368 ] Jay Narale commented on CALCITE-6188: - We in Presto have recently supported CTE materialization

Re: [RE-wrenches] Recommendations for A/B battery switch

. Jay > On Jan 3, 2024, at 3:04 PM, Ron Young via RE-wrenches > wrote: > > Hi Wrenches & Happy New Year! > > I have a client who wants to switch between two 24v 800 a/h battery banks. I > know this isn’t a recommended strategy and have advised him accordingl

Re: [PATCH] Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole"

   Signed-off-by: Felix Kuehling >     Acked-by: Christian König >     Tested-by: Emily Deng >     Signed-off-by: Alex Deucher > > > FWIW, I built a plain 6.6 kernel, and was not able to reproduce the > crash with some simple tests. > > Regards, >   Felix > > >> >> So I agree, let's revert it. >> >> Reviewed-by: Jay Cornwall

Re: [Histonet] Embedding

My lab uses trained lemurs, so I certainly hope not. Virus-free.www.avast.com

[protobuf] Protocol Buffers with Ruby

I am not a ruby person, but the project requires ruby. I have a 6 year old piece of code I am attempting to update. I have recompiled the protobuf files and protoc decodes a captured input stream correctly; however, the code no longer works. I wrote a very simple ruby program to show the

Re: [PATCH] Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole"

On 1/3/2024 09:19, Alex Deucher wrote: > + Jay, Felix > > On Wed, Jan 3, 2024 at 5:16 AM Kaibo Ma wrote: >> >> That commit causes NULL pointer dereferences in dmesgs when >> running applications using ROCm, including clinfo, blender, >> and PyTorch, since v6.6.

REMINDER: Please take the IETF Community Survey

to the confirmation email. This survey will close on Monday 22 January 2024. Thanks in advance for your time! [1] https://www.ietf.org/blog/launch-of-the-ietf-community-survey-2023/ -- Jay Daley IETF Executive Director exec-direc...@ietf.org

[openmp] [clang] [libc] [mlir] [lldb] [flang] [llvm] [AMDGPU] GFX12 global_atomic_ordered_add_b64 instruction and intrinsic (PR #76149)

https://github.com/jayfoad closed https://github.com/llvm/llvm-project/pull/76149 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[Lldb-commits] [openmp] [clang] [libc] [mlir] [lldb] [flang] [llvm] [AMDGPU] GFX12 global_atomic_ordered_add_b64 instruction and intrinsic (PR #76149)

https://github.com/jayfoad closed https://github.com/llvm/llvm-project/pull/76149 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[clang] [openmp] [flang] [lldb] [libc] [mlir] [llvm] [AMDGPU] GFX12 global_atomic_ordered_add_b64 instruction and intrinsic (PR #76149)

jayfoad wrote: Ping! https://github.com/llvm/llvm-project/pull/76149 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[Lldb-commits] [clang] [openmp] [flang] [lldb] [libc] [mlir] [llvm] [AMDGPU] GFX12 global_atomic_ordered_add_b64 instruction and intrinsic (PR #76149)

jayfoad wrote: Ping! https://github.com/llvm/llvm-project/pull/76149 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Slackbuilds-users] I need a uid/gid for a SlackBuild

et on each, so I plan to submit for this week, but I'd like to secure the UID/GID in advance. Thanks all, and Happy New Year! -- Jay Lanagan ___ SlackBuilds-users mailing list SlackBuilds-users@slackbuilds.org https://lists.slackbuilds.org/mailma

Re: CI for ports

This is great to hear! Thank you, Moin! Regards, Janky Jay, III On 12/28/23 06:09PM, Moin Rahman wrote: On Dec 29, 2023, at 2:07 AM, Rozhuk Ivan wrote: Hi! Can we please have at least BASIC continues integration for ports? Just check that it can be build and if tests exist then it run

[cayugabirds-l] Ithaca and Cayuga Lake rarities

on the lake, was photographed towards the north end of Cayuga Lake yesterday: https://ebird.org/checklist/S157022327 Jay -- (copy & paste any URL below, then modify any text "_DOT_" to a period ".") Cayugabirds-L List Info: NortheastBirding_DOT_com/Ca

Re: [VOTE] Release Apache DolphinScheduler 3.1.9

lid. > > [ ] Checksums and PGP signatures are valid. > > [ ] Source code artifacts have correct names matching the current release. > > [ ] LICENSE and NOTICE files are correct for each DolphinScheduler repo. > > [ ] All files have license headers if necessary. > > [ ] No compiled archives bundled in source archive. > > > > > > > > -- > > Best Wish > > — Kerwin (zhuangchong) > > -- Best Wish —Jay Chung

Re: RETRY - was ARR and CSVQUERY

> Peter Relson > > z/OS Core Technology Design > > > > > > -- > > For IBM-MAIN subscribe / signoff / archive access instructions, > > send email to lists...@listserv.u

[cctalk] Sorbus Micro Handbook 1990 Update

I have been scanning in a lot of manuals that I have that relate to computers that are not in my collectiion, but which may be unique, or nearly so. Today I scanned in the Sorbus Micro Handbook 1990 Update, which has information provided to Sorbus FEs who might service various microcomputers.

[cayugabirds-l] Long-tailed Duck, Cayuga Inlet (Ithaca)

If anyone would like an uncharacteristically good (for Ithaca) view of a male Long-tailed Duck, there is currently one sleeping next to the docks at the Johnson Boat Yard, close to the dock at the north side of the farmers market, with a good view across from Cass Park as well. -- (copy & paste

[lldb] [llvm] [mlir] [openmp] [libc] [flang] [clang] [AMDGPU] GFX12 global_atomic_ordered_add_b64 instruction and intrinsic (PR #76149)

https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/76149 >From b14a554a15e4de88c9afc428f9c6898090e6eb23 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Thu, 21 Dec 2023 12:00:26 + Subject: [PATCH] [AMDGPU] GFX12 global_atomic_ordered_add_b64 instruct

[Lldb-commits] [lldb] [llvm] [mlir] [openmp] [libc] [flang] [clang] [AMDGPU] GFX12 global_atomic_ordered_add_b64 instruction and intrinsic (PR #76149)

https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/76149 >From b14a554a15e4de88c9afc428f9c6898090e6eb23 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Thu, 21 Dec 2023 12:00:26 + Subject: [PATCH] [AMDGPU] GFX12 global_atomic_ordered_add_b64 instruct

[clang] [llvm] Reapply "InstCombine: Introduce SimplifyDemandedUseFPClass"" (PR #74056)

jayfoad wrote: > The referenced issue violates the spec for finite-only math only by > using a return value for a constant infinity. You mean this issue? https://github.com/llvm/llvm-project/commit/5a36904c515b#commitcomment-129847939 Can you explain how your patch "broke" it? If you return

Re: [VoiceOps] T-Mobile SMS Non-Compliance Fines - A Violation of the TCPA / Section 230?

for every SMS that violates these three tiers of unwanted messaging: [snip] This sounds kind of like Mr. T deciding to fine T-Mobile $10,000 a day for having a name that starts with "T". How would he collect, or would he just pity the fools that came up with the idea? -- Jay He

Re: Are The Packages Gone Again?

something that we can do with pkgin? Or do we have to wait until you (or someone like you) put the packages in a publicly-accessible repository? They're still missing from https://cdn.netbsd.org/pub/pkgsrc/packages/NetBSD/amd64/10.0_2023Q3/All/ and from http://ftp.netbsd.org/pub/pkgsrc/packages/NetB

Re: Are The Packages Gone Again?

7.tgz > I was able to reinstall ghostscript (as I stated). The others -- ImageMagick6, atril, gv, libspectre and okular -- are gone. I checked a few minutes ago, and they are still gone. Does anyone know why? Does anyone know when they will be back? Jay F. Shachter

[flang] [clang-tools-extra] [lld] [llvm] [compiler-rt] [lldb] [libc] [libcxx] [clang] [AMDGPU] Use alias info to relax waitcounts for LDS DMA (PR #74537)

jayfoad wrote: > > How does this work in a case like this? > > ``` > > call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr > > addrspace(3) @lds.3, i32 4, i32 0, i32 0, i32 0, i32 0) > > call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr > > addrspace(3) %ptr, i32 4,

[Lldb-commits] [flang] [clang-tools-extra] [lld] [llvm] [compiler-rt] [lldb] [libc] [libcxx] [clang] [AMDGPU] Use alias info to relax waitcounts for LDS DMA (PR #74537)

jayfoad wrote: > > How does this work in a case like this? > > ``` > > call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr > > addrspace(3) @lds.3, i32 4, i32 0, i32 0, i32 0, i32 0) > > call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr > > addrspace(3) %ptr, i32 4,

[llvm] [libcxx] [lldb] [clang] [lld] [flang] [compiler-rt] [clang-tools-extra] [libc] [AMDGPU] Use alias info to relax waitcounts for LDS DMA (PR #74537)

jayfoad wrote: How does this work in a case like this? ``` call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr addrspace(3) @lds.3, i32 4, i32 0, i32 0, i32 0, i32 0) call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr addrspace(3) %ptr, i32 4, i32 0, i32 0, i32 0, i32

[Lldb-commits] [llvm] [libcxx] [lldb] [clang] [lld] [flang] [compiler-rt] [clang-tools-extra] [libc] [AMDGPU] Use alias info to relax waitcounts for LDS DMA (PR #74537)

jayfoad wrote: How does this work in a case like this? ``` call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr addrspace(3) @lds.3, i32 4, i32 0, i32 0, i32 0, i32 0) call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, ptr addrspace(3) %ptr, i32 4, i32 0, i32 0, i32 0, i32

[flang] [llvm] [clang-tools-extra] [clang] [libcxx] [libc] [compiler-rt] [AMDGPU] Produce better memoperand for LDS DMA (PR #75247)

jayfoad wrote: > Use PoisonValue instead of nullptr for load memop as a Value. What is the effect of that? I thought nullptr was supposed to represent an unknown value, so you have to conservatively assume it might alias with anything. https://github.com/llvm/llvm-project/pull/75247

Are The Packages Gone Again?

, as they were earlier this year? Are they being rebuilt? And why I am being punished, when I have not sinned? As always, thank you in advance for any and all replies. Jay F. Shachter 6424 North Whipple Street Chicago IL 60645-4111 (1-773)7613784 landline

[kdeconnect] [Bug 477104] KDE Connect crashes after Bluetooth headphones power off

https://bugs.kde.org/show_bug.cgi?id=477104 Eddi-Jay Ohlms changed: What|Removed |Added Status|REPORTED|NEEDSINFO Resolution

Uodate on "make check" fail bug reported by me on 29 November 2023 -- works on M3 iMac

4-inch iMac (Apple Silicon M3), running macOS Sonoma 14.2. That is the same sequence of commands that led to the failure originally reported. I have not yet updated my Intel Macintosh to Sonoma: When I do, I will repeat the attempt to install and check, and report what happ

[clang] [RISCV] Implement multi-lib reuse rule for RISC-V bare-metal toolchain (PR #73765)

jayfoad wrote: The new test is crashing in my Release+Asserts build: ``` FAIL: Clang :: Driver/riscv-toolchain-gcc-multilib-reuse.c (1081 of 1081) TEST 'Clang :: Driver/riscv-toolchain-gcc-multilib-reuse.c' FAILED Exit Code: 2 Command Output (stderr):

Re: [PossibleSpam] UTF-8 chars

ersion of xterm that supported UTF-8. That was a long time ago; on my system, xterm now also supports UTF-8. Maybe on your system you have to install uxterm. Jay F. Shachter 6424 North Whipple Street Chicago IL 60645-4111

[llvm] [flang] [compiler-rt] [lld] [libcxx] [clang] [libcxxabi] [clang-tools-extra] [lldb] [AMDGPU] GFX12: select @llvm.prefetch intrinsic (PR #74576)

@@ -3164,6 +3164,18 @@ def : GCNPat < (as_i1timm $bound_ctrl)) >; +class SMPrefetchGetPcPat : GCNPat < jayfoad wrote: This pattern also interprets the "address" argument as being an offset from PC, so it should also be removed from

[Lldb-commits] [llvm] [flang] [compiler-rt] [lld] [libcxx] [clang] [libcxxabi] [clang-tools-extra] [lldb] [AMDGPU] GFX12: select @llvm.prefetch intrinsic (PR #74576)

@@ -3164,6 +3164,18 @@ def : GCNPat < (as_i1timm $bound_ctrl)) >; +class SMPrefetchGetPcPat : GCNPat < jayfoad wrote: This pattern also interprets the "address" argument as being an offset from PC, so it should also be removed from

[Lldb-commits] [lld] [compiler-rt] [libc] [clang] [libcxx] [lldb] [flang] [mlir] [llvm] [clang-tools-extra] [AMDGPU] GFX12: Add Split Workgroup Barrier (PR #74836)

@@ -684,6 +684,51 @@ s_rndne_f16 s5, 0xfe0b s_rndne_f16 s5, 0x3456 // GFX12: encoding: [0xff,0x6e,0x85,0xbe,0x56,0x34,0x00,0x00] +s_barrier_signal -2 jayfoad wrote: Missing `s_get_barrier_state` tests in this file?

[lld] [compiler-rt] [libc] [clang] [libcxx] [lldb] [flang] [mlir] [llvm] [clang-tools-extra] [AMDGPU] GFX12: Add Split Workgroup Barrier (PR #74836)

@@ -684,6 +684,51 @@ s_rndne_f16 s5, 0xfe0b s_rndne_f16 s5, 0x3456 // GFX12: encoding: [0xff,0x6e,0x85,0xbe,0x56,0x34,0x00,0x00] +s_barrier_signal -2 jayfoad wrote: Missing `s_get_barrier_state` tests in this file?

[clang] [AArch64][SME2] Add SQRSHRN, UQRSHRN, SQRSHRUN builtins for SME2, SVE2p1 (PR #75325)

jayfoad wrote: > Please remember to add a suitable `REQUIRES:` line to these new codegen tests I've added one in 50e78de76a5e77e15ddea48dfb520d6bbcbc1c45 https://github.com/llvm/llvm-project/pull/75325 ___ cfe-commits mailing list

[clang] 50e78de - [AArch64][SME2] Add REQUIRES to new test

Author: Jay Foad Date: 2023-12-14T13:20:37Z New Revision: 50e78de76a5e77e15ddea48dfb520d6bbcbc1c45 URL: https://github.com/llvm/llvm-project/commit/50e78de76a5e77e15ddea48dfb520d6bbcbc1c45 DIFF: https://github.com/llvm/llvm-project/commit/50e78de76a5e77e15ddea48dfb520d6bbcbc1c45.diff LOG

[clang] [AArch64][SME2] Add SQRSHRN, UQRSHRN, SQRSHRUN builtins for SME2, SVE2p1 (PR #75325)

jayfoad wrote: Please remember to add a suitable `REQUIRES:` line to these new codegen tests, or put them in an `ARM` subdirectory with a suitable `lit.local.cfg`! This new test is failing in non-ARM builds with: ``` FAIL: Clang :: CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qrshr.c (5567 of

Re: [RE-wrenches] SMA TL-22 insulation resistance error

I think that using a megger etc to test the panels and wires is what I’d do before I yanked out  all the Wires. They are not that expensive anymore and maybe possible to rent one?JayOn Dec 13, 2023, at 8:53 AM, Dave Tedeyan via RE-wrenches wrote:Hi All,I am curious to hear if anyone else has run

Re: [RE-wrenches] 48 V DC temp sensing relay

Hi Drake Try this one. I get a lot of equipment from supply house. Since you need on with temp rise it’s an AC type. This one will do 8 amps at 120v so a small amp dc fan won’t hurt the relay. Jay https://www.supplyhouse.com/White-Rodgers-1609-101-Refrigeration-Temperature-Control-30

[clang-tools-extra] [llvm] [lldb] [libcxx] [compiler-rt] [libc] [flang] [clang] [lld] [AMDGPU] Use alias info to relax waitcounts for LDS DMA (PR #74537)

@@ -0,0 +1,154 @@ +; RUN: llc -march=amdgcn -mcpu=gfx900 < %s | FileCheck %s --check-prefixeses=GCN,GFX9 +; RUN: llc -march=amdgcn -mcpu=gfx1030 < %s | FileCheck %s --check-prefixeses=GCN,GFX10 jayfoad wrote: > --check-prefixeses That's what happens when you

[Lldb-commits] [clang-tools-extra] [llvm] [lldb] [libcxx] [compiler-rt] [libc] [flang] [clang] [lld] [AMDGPU] Use alias info to relax waitcounts for LDS DMA (PR #74537)

@@ -0,0 +1,154 @@ +; RUN: llc -march=amdgcn -mcpu=gfx900 < %s | FileCheck %s --check-prefixeses=GCN,GFX9 +; RUN: llc -march=amdgcn -mcpu=gfx1030 < %s | FileCheck %s --check-prefixeses=GCN,GFX10 jayfoad wrote: > --check-prefixeses That's what happens when you

[jenkins-infra/jenkins.io] ba12a4: Fixed The aspect ratio of large images isn't prese...

Branch: refs/heads/master Home: https://github.com/jenkins-infra/jenkins.io Commit: ba12a4d6a697f1b92f643147093e1c7d2423881b https://github.com/jenkins-infra/jenkins.io/commit/ba12a4d6a697f1b92f643147093e1c7d2423881b Author: Jay-oao <121299537+jay-...@users.noreply.github.

[llvm] [clang] [clang-tools-extra] [Clang][AArch64] Add fix vector types to header into SVE (PR #73258)

@@ -0,0 +1,134 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 + +// RUN: %clang_cc1 -DSVE_HEADER -triple aarch64 -target-feature +sve -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s +// RUN: %clang_cc1

[clang] effd47e - [Clang][AArch64] Add REQUIRES to new test

Author: Jay Foad Date: 2023-12-13T10:49:52Z New Revision: effd47ed45e3badd756103346a7c3b9e1e939e5e URL: https://github.com/llvm/llvm-project/commit/effd47ed45e3badd756103346a7c3b9e1e939e5e DIFF: https://github.com/llvm/llvm-project/commit/effd47ed45e3badd756103346a7c3b9e1e939e5e.diff LOG

[Slackbuilds-users] rdfind

removal, just would like to bring attention to this. Cheers, — Jay Lanagan ___ SlackBuilds-users mailing list SlackBuilds-users@slackbuilds.org https://lists.slackbuilds.org/mailman/listinfo/slackbuilds-users Archives

Re: [RE-wrenches] Mate 3s with legacy FX inverters

Agreed to all said. Numerous systems with mate 3/3s and every inverter and stacking is all fine. New hub 10:3 required. MX CC don’t appear on the mate 3/s. Few of my systems are on optics so can’t comment on that. JayOn Dec 12, 2023, at 1:15 PM, Roland Shackelford via RE-wrenches wrote:We have

[clamav-users] How to respond to request?

may be low on memory     So, thought the best way to respond is tp poost tis question in the mailing list.   Question: Any other action needed/desired?   Thanks in advance! Jay   notes

[RE-wrenches] Hydraulic KO tool

there that should work for a holes. Just thought I’d check to see if anyone has any suggestions. Thx Jay ___ List sponsored by Redwood Alliance Pay optional member dues here: http://re-wrenches.org List Address: RE-wrenches@lists.re-wrenches.org Change

[llvm] [flang] [clang] [lld] [clang-tools-extra] [libcxx] [lldb] [libc] [compiler-rt] [GlobalISel] Add G_PREFETCH (PR #74863)

https://github.com/jayfoad closed https://github.com/llvm/llvm-project/pull/74863 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[Lldb-commits] [llvm] [flang] [clang] [lld] [clang-tools-extra] [libcxx] [lldb] [libc] [compiler-rt] [GlobalISel] Add G_PREFETCH (PR #74863)

https://github.com/jayfoad closed https://github.com/llvm/llvm-project/pull/74863 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[lld] [clang] [compiler-rt] [lldb] [libcxx] [flang] [libc] [clang-tools-extra] [llvm] [GlobalISel] Add G_PREFETCH (PR #74863)

https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/74863 >From e406c734609d3cd1ae436084c42c1c63d8af2795 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Fri, 8 Dec 2023 14:08:09 + Subject: [PATCH 1/2] [GlobalISel] Add G_PREFETCH --- .../CodeGen/GlobalI

[Lldb-commits] [lld] [clang] [compiler-rt] [lldb] [libcxx] [flang] [libc] [clang-tools-extra] [llvm] [GlobalISel] Add G_PREFETCH (PR #74863)

https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/74863 >From e406c734609d3cd1ae436084c42c1c63d8af2795 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Fri, 8 Dec 2023 14:08:09 + Subject: [PATCH 1/2] [GlobalISel] Add G_PREFETCH --- .../CodeGen/GlobalI

Detective Quest : The Crystal Slipper CE - Full PreCracked - Fox Cheat Codes

Detective Quest: The Crystal Slipper CE - Full PreCracked - Fox Cheat CodesIf you are looking for a thrilling hidden object game with a fairy tale twist, you might want to check out Detective Quest: The Crystal Slipper CE - Full PreCracked - Fox. This game is based on the classic story of

Re: [Intel-wired-lan] [PATCH iwl-next] ice: alter feature support check for SRIOV and LAG

t;> > index 280994ee5933..b47cd43ae871 100644 >> > --- a/drivers/net/ethernet/intel/ice/ice_lag.c >> > +++ b/drivers/net/ethernet/intel/ice/ice_lag.c >> > @@ -1981,6 +1981,8 @@ int ice_init_lag(struct ice_pf *pf) >> >int n, err; >> > >> &g

Re: [mailop] [ADMIN] I'm going for a lie down

deration, please. Wait; this list has moderation? :-) Best of luck; we're really good at this sort of thing these days... Cheers, -- jra -- Jay R. Ashworth Baylink j...@baylink.com Designer The Things I Think RFC

Shopping_Performance report has duplicate rows in it. How do i combine those duplicates, and their data together?

Hello, I am a new javascript programmer using Google Ads Scripts to fetch data from our client's Google Merchant Center (product shopping ads data), process that data, then use in optimizing their campaign(s). I am using the Shopping Performance Report api

[compiler-rt] [flang] [lldb] [lld] [clang] [llvm] [libcxxabi] [libcxx] [clang-tools-extra] [AMDGPU] GFX12: select @llvm.prefetch intrinsic (PR #74576)

@@ -959,6 +967,32 @@ def : GCNPat < } } // let OtherPredicates = [HasShaderCyclesRegister] +def SIMM24bitPtr : ImmLeaf (Imm);}] +>; + +multiclass SMPrefetchPat { + def : GCNPat < +(smrd_prefetch (SMRDImm i64:$sbase, i32:$offset), timm, timm, (i32 cache_type)), +

[Lldb-commits] [compiler-rt] [flang] [lldb] [lld] [clang] [llvm] [libcxxabi] [libcxx] [clang-tools-extra] [AMDGPU] GFX12: select @llvm.prefetch intrinsic (PR #74576)

@@ -959,6 +967,32 @@ def : GCNPat < } } // let OtherPredicates = [HasShaderCyclesRegister] +def SIMM24bitPtr : ImmLeaf (Imm);}] +>; + +multiclass SMPrefetchPat { + def : GCNPat < +(smrd_prefetch (SMRDImm i64:$sbase, i32:$offset), timm, timm, (i32 cache_type)), +

[Yahoo-eng-team] [Bug 2029335] Re: [centos-9-stream] jobs fails as nova-compute stuck at libvirt connect since systemd-252-16.el9

Marking invalid, impacted Ironic but fix was in devstack. ** Changed in: ironic Status: New => Invalid -- You received this bug notification because you are a member of Yahoo! Engineering Team, which is subscribed to neutron. https://bugs.launchpad.net/bugs/2029335 Title:

[Touch-packages] [Bug 2026757] Re: dnsmasq on Ubuntu Jammy crashes on neutron-dhcp-agent updates

Noting that there's very little action Ironic can take on this bug, but marking it triaged to get it out of our dashboard. If there's anything Ironic contributors or CI can do to move this forward, please let us know. ** Changed in: ironic Status: New => Triaged -- You received this bug

[Lldb-commits] [llvm] [libcxxabi] [clang-tools-extra] [lldb] [clang] [lld] [compiler-rt] [flang] [libcxx] [AMDGPU] GFX12: select @llvm.prefetch intrinsic (PR #74576)

@@ -959,6 +967,32 @@ def : GCNPat < } } // let OtherPredicates = [HasShaderCyclesRegister] +def SIMM24bitPtr : ImmLeaf (Imm);}] +>; + +multiclass SMPrefetchPat { + def : GCNPat < +(smrd_prefetch (SMRDImm i64:$sbase, i32:$offset), timm, timm, (i32 cache_type)), +

[llvm] [libcxxabi] [clang-tools-extra] [lldb] [clang] [lld] [compiler-rt] [flang] [libcxx] [AMDGPU] GFX12: select @llvm.prefetch intrinsic (PR #74576)

@@ -959,6 +967,32 @@ def : GCNPat < } } // let OtherPredicates = [HasShaderCyclesRegister] +def SIMM24bitPtr : ImmLeaf (Imm);}] +>; + +multiclass SMPrefetchPat { + def : GCNPat < +(smrd_prefetch (SMRDImm i64:$sbase, i32:$offset), timm, timm, (i32 cache_type)), +

Re: Outside plant - prewire customer demarc preference

for a wifi access point is colocated with the NID/ONT/CPE, you're doing it wrong. -- Jay Hennigan - j...@west.net Network Engineering - CCIE #7880 503 897-8550 - WB6RDV

[clang] [AArch64][SME2] Add _x2/_x4 svqrshr builtins. (PR #74100)

jayfoad wrote: I committed a fix for builds that do not enable AArch64: fb2b907fbd2c9ac25077dae01d777d884e09a7a4 https://github.com/llvm/llvm-project/pull/74100 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[clang] fb2b907 - [AArch64][SME2] Add REQUIRES to new test

Author: Jay Foad Date: 2023-12-07T17:42:37Z New Revision: fb2b907fbd2c9ac25077dae01d777d884e09a7a4 URL: https://github.com/llvm/llvm-project/commit/fb2b907fbd2c9ac25077dae01d777d884e09a7a4 DIFF: https://github.com/llvm/llvm-project/commit/fb2b907fbd2c9ac25077dae01d777d884e09a7a4.diff LOG

Re: [RBW] 1st world commuting dilemma

one of your “nice” bikes to such abuse. I’d be tempted to set up the Surly with studded tires for when it’s really gnarly out, and ride one of the Rivs when the roads are clear and/or the weather is clement. Jay LonnerBellingham, WASent from my Atari 400On Dec 7, 2023, at 8:38 AM, Josiah Anderson

[lld] [mlir] [clang-tools-extra] [libcxxabi] [lldb] [flang] [compiler-rt] [openmp] [libcxx] [clang] [llvm] [AMDGPU] Add GFX12 encoding for VINTERP instructions (PR #74616)

https://github.com/jayfoad closed https://github.com/llvm/llvm-project/pull/74616 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[Lldb-commits] [lld] [mlir] [clang-tools-extra] [libcxxabi] [lldb] [flang] [compiler-rt] [openmp] [libcxx] [clang] [llvm] [AMDGPU] Add GFX12 encoding for VINTERP instructions (PR #74616)

https://github.com/jayfoad closed https://github.com/llvm/llvm-project/pull/74616 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[flang] [clang] [libcxxabi] [lld] [lldb] [mlir] [llvm] [clang-tools-extra] [openmp] [compiler-rt] [libcxx] [AMDGPU] Add GFX12 encoding for VINTERP instructions (PR #74616)

https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/74616 >From 69580e5f77514fecf0aabe2a80c98881f9bd7288 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Tue, 7 Feb 2023 16:27:27 + Subject: [PATCH 1/2] [AMDGPU] Add GFX12 encoding for VINTERP instructi

[Lldb-commits] [flang] [clang] [libcxxabi] [lld] [lldb] [mlir] [llvm] [clang-tools-extra] [openmp] [compiler-rt] [libcxx] [AMDGPU] Add GFX12 encoding for VINTERP instructions (PR #74616)

https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/74616 >From 69580e5f77514fecf0aabe2a80c98881f9bd7288 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Tue, 7 Feb 2023 16:27:27 + Subject: [PATCH 1/2] [AMDGPU] Add GFX12 encoding for VINTERP instructi

[llvm] [lldb] [mlir] [libcxx] [openmp] [flang] [libcxxabi] [compiler-rt] [clang] [AMDGPU] Add GFX12 encoding for VINTERP instructions (PR #74616)

https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/74616 >From 69580e5f77514fecf0aabe2a80c98881f9bd7288 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Tue, 7 Feb 2023 16:27:27 + Subject: [PATCH 1/2] [AMDGPU] Add GFX12 encoding for VINTERP instructi

[Lldb-commits] [llvm] [lldb] [mlir] [libcxx] [openmp] [flang] [libcxxabi] [compiler-rt] [clang] [AMDGPU] Add GFX12 encoding for VINTERP instructions (PR #74616)

https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/74616 >From 69580e5f77514fecf0aabe2a80c98881f9bd7288 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Tue, 7 Feb 2023 16:27:27 + Subject: [PATCH 1/2] [AMDGPU] Add GFX12 encoding for VINTERP instructi

Re: [RBW] WTT for Nitto seat posts (lugged 26.8, 2-bolt 27.2)

I think the Nitto S84 lugged seatpost has only ever been manufactured in 27.2mm. It’s one of the reasons that many of us are frustrated that so many Riv models require a 26.8mm seatpost. If you’re looking for more setback IRD is probably the way to go. Jay LonnerBellingham, WASent from my Atari

[clang] [clang-format] Fix a bug in `git-clang-format --binary` (PR #74293)

https://github.com/jayfoad approved this pull request. LGTM but the commit message should really explain what problem this fixes instead of just saying "rework". https://github.com/llvm/llvm-project/pull/74293 ___ cfe-commits mailing list

[clang] [clang][dataflow] Retrieve members from accessors called using member… (PR #73978)

jayfoad wrote: Hi, on my Release+Asserts build this is causing: ``` FAIL: Clang-Unit :: Analysis/FlowSensitive/./ClangAnalysisFlowSensitiveTests/32/38 (134 of 658) TEST 'Clang-Unit :: Analysis/FlowSensitive/./ClangAnalysisFlowSensitiveTests/32/38' FAILED

Re: Is Pip Available On OpenBSD? -- Sunday Afternoon Followup

in advance for any and all replies. Jay F. Shachter 6424 North Whipple Street Chicago IL 60645-4111 (1-773)7613784 landline (1-410)99

Is Pip Available On OpenBSD?

4.208.0, whereas I need at least version 6.292.0) without building it from source? I haven't upgraded to OpenBSD 7.4 yet and am still running 7.3, if that makes a difference. Thank you in advance for any and all replies. Jay F. Shachter 6424 North Whipple Street Chicago IL

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Re: Outside plant - prewire customer demarc preference

with for low voltage applications. -- Jay Hennigan - j...@west.net Network Engineering - CCIE #7880 503 897-8550 - WB6RDV

[chrono] Re: Some problems in the chrono: : sensor module

Hi Eric， To be honest, I don't know how to install it, I think I installed it in C++ (not fully installed), and then pychrono can use the sensor module. In fact, I am also very confused.I have successfully installed it once so far. I'm so sorry. Jay 在2023年11月29日星期三 UTC+8 21:09:05 写道： >

Re: [VOTE] Release Apache CouchDB 3.3.3

signature: ok checksum: match make check: pass make release: ok fauxton verify install: pass env: macOS 13.6.2 erlang 25.3.2 elixir 1.13.4-otp-25 python 3.12.0 spidermonkey 91 +1 On Fri, Dec 1, 2023 at 10:09 AM Jiahui Li wrote: > Hi, > > +1 > > Signature: ok > Checksums:

Re: [EVDL] consumer reports EV reliability

we have owned it (3 separate subsystem problems, + several recalls). So I'm willing to believe that non-leaf EV's and HEV's / PHEV's have had issues, especially as manufacturers are starting up new models/lines with new technology. Jay ___ Address

[chrono] Re: The camera's field of view is the opposite

Thank you very much for your reply. I have another question for you. Is it possible to use depth camera in pychrono? 在2023年11月30日星期四 UTC+8 07:51:58 写道： > Hello Jay, > > I've looked into it and it seems like the issue is that the Irrlicht > visualizer and Chrono::Sensor samples

Re: Web UI access

on, damage, misuse, insertion of viruses and malicious code. The > content of this message is neither binding on this Company nor to be > understood as creating any obligation on its part except where provided for > an agreement. Thank you for your cooperation.* *” * > -- Best Wish —Jay Chung

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