Re: [PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

在 2018年11月28日，00:11，Alex Deucher 写道： > > On Tue, Nov 27, 2018 at 4:56 AM Christian König > wrote: >> >> Am 27.11.18 um 02:47 schrieb Zhang, Jerry(Junwei): >> >> On 11/26/18 5:28 PM, Christian König wrote: >> >> Am 26.11.18 um 03:38 schrieb Zhang, Jerry(Junwei): >> >> On 11/24/18 3:32 AM,

[PATCH] drm/amd/display: fix uninitialized symbol 'id' in bios_parser_get_src_obj

From: Young Xiao See commit a8f976473196 ("drm/amd/display: Bunch of smatch error and warning fixes in DC") for detail. Signed-off-by: Young Xiao --- drivers/gpu/drm/amd/display/dc/bios/bios_parser.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [PATCH 8/8] drm/amdgpu: Moved doorbell structures to seperate file

On Mon, Nov 26, 2018 at 12:29 PM Oak Zeng wrote: > > Move doorbell structures, enum definitions and helper functions > from amdgpu.h to amdgpu_doorbell.h. No functional change > > Change-Id: I09f7b84869b6d3c688b7a2506ff78d62b3de23f5 > Signed-off-by: Oak Zeng Reviewed-by: Alex Deucher > --- >

Re: [PATCH 7/8] drm/amdgpu: Use asic specific doorbell index instead of macro definition

On Mon, Nov 26, 2018 at 12:29 PM Oak Zeng wrote: > > Change-Id: I84475efcfb482c474fccb133010abb5df5f4 > Signed-off-by: Oak Zeng > Suggested-by: Felix Kuehling > Suggested-by: Alex Deucher With a patch description added: Reviewed-by: Alex Deucher > --- >

Re: [PATCH 6/8] drm/amdgpu: Call doorbell index init on device initialization

On Mon, Nov 26, 2018 at 12:29 PM Oak Zeng wrote: > > Also call functioin amdgpu_device_doorbell_init after > amdgpu_device_ip_early_init because the former depends > on the later to set up asic-specific init_doorbell_index > function > > Change-Id: I2f004bbbe2565035460686f4fc16e86b77a2a9b5 >

Re: [PATCH 5/8] drm/amdgpu: Doorbell layout for vega20 and future asic

On Mon, Nov 26, 2018 at 12:29 PM Oak Zeng wrote: > > v2: Use enum definition instead of hardcoded value > > Change-Id: I04d22fb717ac50483c0835f160a2e860e344f358 > Signed-off-by: Oak Zeng > Suggested-by: Felix Kuehling > Suggested-by: Alex Deucher With a patch description added: Reviewed-by:

Re: [PATCH 4/8] drm/amdgpu: Doorbell index initialization for ASICs before vega10

On Mon, Nov 26, 2018 at 12:29 PM Oak Zeng wrote: > > v2: Use enum definition instead of hardcoded number > > Change-Id: Id64eb98f5b1c24b51eb2fd5a083086fc3515813d > Signed-off-by: Oak Zeng > Suggested-by: Felix Kuehling > Suggested-by: Alex Deucher With a patch description added: Reviewed-by:

Re: [PATCH 3/8] drm/amdgpu: Vega10 doorbell index initialization

On Mon, Nov 26, 2018 at 5:51 PM Oak Zeng wrote: > > v2: Use enum definition instead of hardcoded value > v3: Remove unused enum definition > > Change-Id: Ib72058337f0aa53adfc6c6aae5341a7cd665111a > Signed-off-by: Oak Zeng > Suggested-by: Felix Kuehling > Suggested-by: Alex Deucher

Re: [PATCH 1/8] drm/amdgpu: Add field in amdgpu_dev to hold reserved doorbell index

On Mon, Nov 26, 2018 at 12:29 PM Oak Zeng wrote: > > This is a preparation work to make reserved doorbell index per device, > instead of using a global macro definition. By doing this, we can easily > change doorbell layout for future ASICs while not affecting ASICs in > production. > >

Re: [PATCH 2/8] drm/amdgpu: Add asic func interface to init doorbell index

On Mon, Nov 26, 2018 at 12:29 PM Oak Zeng wrote: > > Change-Id: I7e8a9c9dfd4f3bd0902679a1771c1a043ece2674 > Signed-off-by: Oak Zeng With a patch description added, Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git

RE: [PATCH] drm/amdgpu: add the checking to avoid NULL pointer dereference

-Original Message- From: amd-gfx On Behalf Of Christian König Sent: Tuesday, November 27, 2018 1:52 AM To: Sharma, Deepak ; Zhou, David(ChunMing) ; Koenig, Christian ; Sharma, Deepak ; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH] drm/amdgpu: add the checking to avoid NULL

Re: [PATCH] drm/amdgpu: add the checking to avoid NULL pointer dereference

Thanks David , I did backport the drm patch to my kernel after that I am not getting -ENOMEM from amdgpu_cs_ioctl while running tests so have not been able to test patch to handle signaled fence. As this issue is hard to reproduce , will give some more try. But yes the problem is there and

Re: [PATCH 1/2] drm/amd/display: Use private obj helpers for dm_atomic_state

On 11/27/18 4:20 PM, Li, Sun peng (Leo) wrote: > > > On 2018-11-22 12:34 p.m., Nicholas Kazlauskas wrote: >> [Why] >> Two non-blocking commits in succession can result in a sequence where >> the same dc->current_state is queried for both commits. >> >> 1. 1st commit -> check -> commit -> swaps

Re: [PATCH 1/2] drm/amd/display: Use private obj helpers for dm_atomic_state

On 2018-11-22 12:34 p.m., Nicholas Kazlauskas wrote: > [Why] > Two non-blocking commits in succession can result in a sequence where > the same dc->current_state is queried for both commits. > > 1. 1st commit -> check -> commit -> swaps atomic state -> queues work > 2. 2nd commit -> check ->

[PATCH 2/6] drm/amdgpu: make amdgpu_ctx_init more robust

Only set up the scheduling entities if the rings are valid. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 83 - 1 file changed, 61 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

[PATCH 4/6] drm/amdgpu: convert amdgpu_ctx_init to use the new helper

Use the new helper to get the valid ring count and array. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 62 ++--- 1 file changed, 2 insertions(+), 60 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

[PATCH 6/6] drm/amdgpu: don't expose entities that are not valid for a ctx

If a particular engine is not available, don't expose its scheduling entity. This will cause the CS ioctl to fail rather than trying to use an uninitialized ring if a particular IP is not available. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 13 ++---

[PATCH 3/6] drm/amdgpu: add amdgpu_ring_get_valid_rings helper

Returns the number of valid rings (i.e., ready for work) for a particular engine type. Optionally returns an array of rings as well. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 95 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 + 2

[PATCH 1/6] drm/amdgpu: add VCN JPEG support amdgpu_ctx_num_entities

Looks like it was missed when setting support was added. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index

[PATCH 5/6] drm/amdgpu: convert amdgpu_hw_ip_info to use new helper

Use the new helper to get the number of rings. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 38 +++-- 1 file changed, 3 insertions(+), 35 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

Re: [PATCH] drm/amd/display: Fix compile error with ACPI disabled

On 2018-11-27 11:18 a.m., David Francis wrote: > The fallback code for getting default backlight caps was using > the wrong variable name. Fix it. > > Fixes: > https://lists.freedesktop.org/archives/dri-devel/2018-November/197752.html > Signed-off-by: David Francis Reviewed-by: Harry Wentland

Re: [PATCH] pci: fix incorrect value returned from pcie_get_speed_cap

On Tue, Nov 27, 2018 at 11:49:43AM -0500, Mikulas Patocka wrote: > On Mon, 26 Nov 2018, Bjorn Helgaas wrote: > > On Mon, Nov 19, 2018 at 06:47:04PM -0600, Bjorn Helgaas wrote: > > > On Tue, Oct 30, 2018 at 12:36:08PM -0400, Mikulas Patocka wrote: > > > > The macros PCI_EXP_LNKCAP_SLS_*GB are

Re: [PATCH RFC 5/5] drm/amdgpu: Add accounting of buffer object creation request via DRM cgroup

Ah I see. Thank you for the clarification. Regards, Kenny On Tue, Nov 27, 2018 at 3:31 PM Christian König wrote: > > Am 27.11.18 um 19:15 schrieb Kenny Ho: > > Hey Christian, > > > > Sorry for the late reply, I missed this for some reason. > > > > On Wed, Nov 21, 2018 at 5:00 AM Christian König

Re: [PATCH RFC 5/5] drm/amdgpu: Add accounting of buffer object creation request via DRM cgroup

Am 27.11.18 um 19:15 schrieb Kenny Ho: Hey Christian, Sorry for the late reply, I missed this for some reason. On Wed, Nov 21, 2018 at 5:00 AM Christian König wrote: diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index 370e9a5536ef..531726443104 100644 ---

Re: [PATCH] drm/amd/display: Fix compile error with ACPI disabled

Acked-by: Alex Deucher From: amd-gfx on behalf of David Francis Sent: Tuesday, November 27, 2018 11:18:14 AM To: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org Cc: Francis, David Subject: [PATCH] drm/amd/display: Fix compile error with ACPI

Re: How to use vce1 in Radeon Pro WX5100

On Tue, Nov 27, 2018 at 10:51 AM Sunnanyong (Nanyong Sun, Intelligent Computing Solution Development Dep) wrote: > > Hi all， > > I found two vce block under /sys/kernel/debug/dri/1/amdgpu_ring_vce0 & > amdgpu_ring_vce1. > > when I use ffmpeg to do H.264 encoding , I use “umr –top” and

Re: [PATCH] drm/amd/display: Fix NULL ptr when calculating refresh rate

Reviewed-by: Bhawanpreet Lakha From: amd-gfx on behalf of Jerry (Fangzhi) Zuo Sent: November 27, 2018 1:45:54 PM To: amd-gfx@lists.freedesktop.org; Wentland, Harry; Lakha, Bhawanpreet Cc: Zuo, Jerry Subject: [PATCH] drm/amd/display: Fix NULL ptr when

Re: [PATCH] pci: fix incorrect value returned from pcie_get_speed_cap

On Mon, 26 Nov 2018, Bjorn Helgaas wrote: > On Mon, Nov 19, 2018 at 06:47:04PM -0600, Bjorn Helgaas wrote: > > On Tue, Oct 30, 2018 at 12:36:08PM -0400, Mikulas Patocka wrote: > > > The macros PCI_EXP_LNKCAP_SLS_*GB are values, not bit masks. We must mask > > > the register and compare it

Re: [PATCH] drm/amd/display: limit high pixel clock modes on ST/CZ

This is for the devices with type-c ports. Wherein the signal type is same 32 (DISPLAY PORT) for both HDMI and DP monitors connected to the system via type-c dongles/convertors. Regards, Shirish S Get Outlook for Android From: Deucher,

[PATCH] drm/amd/display: Fix NULL ptr when calculating refresh rate

Calculate preferred refresh rate only when preferred mode exists. Signed-off-by: Jerry (Fangzhi) Zuo --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

[PATCH v3 3/3] drm/amdgpu: Refactor GPU reset for XGMI hive case v3

For XGMI hive case do reset in steps where each step iterates over all devs in hive. This especially important for asic reset since all PSP FW in hive must come up within a limited time (around 1 sec) to properply negotiate the link. Do this by refactoring amdgpu_device_gpu_recover and

[PATCH v3 1/3] drm/amdgpu: Refactor amdgpu_xgmi_add_device v3

This is prep work for updating each PSP FW in hive after GPU reset. Split into build topology SW state and update each PSP FW in the hive. Save topology and count of XGMI devices for reuse. v2: Create seperate header for XGMI. v3: Rebase Signed-off-by: Andrey Grodzovsky ---

[PATCH v3 0/3] Add support for XGMI hive reset

This set of patches adds support to reset entire XGMI hive when reset is required. Patches 1-2 refactoring a bit the XGMI infrastructure as preparaton for the actual hive reset change. Patch 5 is GPU reset/recovery refactored to support XGMI hive reset. Andrey Grodzovsky (3): drm/amdgpu:

Re: [PATCH] drm/amd/display: limit high pixel clock modes on ST/CZ

Is this a DP to HDMI adapter? I think 4k@60 should be valid on DP in general on ST/CZ, but Harry or Leo should comment. Alex From: S, Shirish Sent: Tuesday, November 27, 2018 3:58:12 AM To: Deucher, Alexander; Li, Sun peng (Leo); Wentland, Harry Cc:

Re: [PATCH RFC 5/5] drm/amdgpu: Add accounting of buffer object creation request via DRM cgroup

Hey Christian, Sorry for the late reply, I missed this for some reason. On Wed, Nov 21, 2018 at 5:00 AM Christian König wrote: > > diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h > > index 370e9a5536ef..531726443104 100644 > > --- a/include/uapi/drm/amdgpu_drm.h > >

[PATCH] drm/amd/display: Fix compile error with ACPI disabled

The fallback code for getting default backlight caps was using the wrong variable name. Fix it. Fixes: https://lists.freedesktop.org/archives/dri-devel/2018-November/197752.html Signed-off-by: David Francis --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++-- 1 file changed, 2

[PATCH] drm: radeon: fix overflow on 32bit systems

From: Young Xiao the type mem->start is unsigned long, so this can overflow on 32bit system, since the type addr is uint64_t. Signed-off-by: Young Xiao --- drivers/gpu/drm/radeon/radeon_vm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/radeon_vm.c

How to use vce1 in Radeon Pro WX5100

Hi all， I found two vce block under /sys/kernel/debug/dri/1/amdgpu_ring_vce0 & amdgpu_ring_vce1. when I use ffmpeg to do H.264 encoding , I use “umr �Ctop” and press “c” to show the VCE loading, and I found that only vce0 had loading , and vce1 always be 0%, like this: VCE Bits: VCE0 =>

[PATCH] drm/amd/pp: fix spelling mistake "dependancy" -> "dependency"

From: Colin Ian King There are spelling mistakes in PP_ASSERT_WITH_CODE messages, fix these. Signed-off-by: Colin Ian King --- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

RE: [Intel-gfx] [PATCH RFC 2/5] cgroup: Add mechanism to register vendor specific DRM devices

On Tue, Nov 27, 2018 at 4:46 AM Joonas Lahtinen wrote: > I think a more abstract property "% of GPU (processing power)" might > be a more universal approach. One can then implement that through > subdividing the resources or timeslicing them, depending on the GPU > topology. > > Leasing 1/8th,

Re: [PATCH v7 3/5] drm: Document variable refresh properties

On 2018-11-27 4:22 a.m., Daniel Vetter wrote: > On Mon, Nov 12, 2018 at 04:12:10PM +, Wentland, Harry wrote: >> On 2018-11-08 9:43 a.m., Nicholas Kazlauskas wrote: >>> These include the drm_connector 'vrr_capable' and the drm_crtc >>> 'vrr_enabled' properties. >>> >>> Signed-off-by: Nicholas

Re: [PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

Am 27.11.18 um 02:47 schrieb Zhang, Jerry(Junwei): On 11/26/18 5:28 PM, Christian König wrote: Am 26.11.18 um 03:38 schrieb Zhang, Jerry(Junwei): On 11/24/18 3:32 AM, Deucher, Alexander wrote: Is this required? Are the harvesting fuses incorrect?  If the blocks are harvested, we should bail

Re: [PATCH] drm/amdgpu: add the checking to avoid NULL pointer dereference

Am 27.11.18 um 01:40 schrieb Deepak Sharma: On 11/26/18 1:57 AM, Zhou, David(ChunMing) wrote: -Original Message- From: Christian König Sent: Monday, November 26, 2018 5:23 PM To: Sharma, Deepak ; Zhou, David(ChunMing) ; Koenig, Christian ; amd-gfx@lists.freedesktop.org Subject: Re:

Re: [Intel-gfx] [PATCH RFC 2/5] cgroup: Add mechanism to register vendor specific DRM devices

Quoting Kasiviswanathan, Harish (2018-11-26 22:59:30) > Thanks Tejun,Eric and Christian for your replies. > > We want GPUs resource management to work seamlessly with containers and > container orchestration. With the Intel / bpf based approach this is not > possible. > > From your response

Re: [PATCH 2/2] drm/amdgpu: Avoid endless loop in GPUVM fragment processing

Am 26.11.18 um 23:01 schrieb Kuehling, Felix: Don't bounce back to the root level for fragment processing, because huge pages are not supported at that level. This is unlikely to happen with the default VM size on Vega, but can be exposed by limiting the VM size with the amdgpu.vm_size module

Re: [PATCH RFC 2/5] cgroup: Add mechanism to register vendor specific DRM devices

Hi Harish, Am 26.11.18 um 21:59 schrieb Kasiviswanathan, Harish: > Thanks Tejun,Eric and Christian for your replies. > > We want GPUs resource management to work seamlessly with containers and > container orchestration. With the Intel / bpf based approach this is not > possible. I think one

Re: [PATCH 1/2] drm/amdgpu: Cast to uint64_t before left shift

Am 26.11.18 um 23:01 schrieb Kuehling, Felix: Avoid potential integer overflows with left shift in huge-page mapping code by casting the operand to uin64_t first. Signed-off-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 8 1 file changed, 4 insertions(+), 4

Re: [PATCH v7 3/5] drm: Document variable refresh properties

On Mon, Nov 12, 2018 at 04:12:10PM +, Wentland, Harry wrote: > On 2018-11-08 9:43 a.m., Nicholas Kazlauskas wrote: > > These include the drm_connector 'vrr_capable' and the drm_crtc > > 'vrr_enabled' properties. > > > > Signed-off-by: Nicholas Kazlauskas > > Cc: Harry Wentland > > Cc:

Re: [PATCH v7 3/5] drm: Document variable refresh properties

On 2018-11-26 10:49 p.m., Wentland, Harry wrote: > On 2018-11-12 12:05 p.m., Kazlauskas, Nicholas wrote: >> On 11/12/18 11:12 AM, Wentland, Harry wrote: >>> On 2018-11-08 9:43 a.m., Nicholas Kazlauskas wrote: These include the drm_connector 'vrr_capable' and the drm_crtc 'vrr_enabled'

RE: [PATCH] drm/amd/display: limit high pixel clock modes on ST/CZ

However, while using Type-C connectors noted that the signal type is actually SIGNAL_TYPE_DISPLAY_PORT and found that the check was missing. Hence have added the same in https://patchwork.freedesktop.org/patch/264033/ Regards, Shirish S From: S, Shirish Sent: Tuesday, November 27, 2018 9:54 AM

[PATCH] drm/amd/display: Disable 4k@60 on DP as well for DCE11

This patch extends the below patch to apply DP signal type, for exactly the same reasons it was disabled for HDMI. "1a0e348 drm/amd/display: Disable 4k 60 HDMI on DCE11" Signed-off-by: Shirish S --- drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 4 1 file changed, 4 insertions(+)

[PATCH] drm/amd/amdgpu: Test for PCI root bus before assuming bus->self

From: Young_X If we assign an amd device to a virtual mechine, we can no longer assume a fixed hardware topology, like the GPU having a parent device. This patch simply adds pci_is_root_bus() tests to avoid passing a NULL pointer to PCI access functions. See commit