need to clear bo glob and mem glob during their release
otherwise their member value would be wrongly used in the
next glob init stage and lead to wild pointer access problems:
1) kobj.state_initialized is 1
2) ttm_bo_glob.bo_count isn't cleared and referenced via it
on member "swap_lru" would
From: Marek Olšák
Signed-off-by: Marek Olšák
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 1f38d6fc1fe3..f9462ad2a314 100644
--- a/drivers
From: Marek Olšák
Signed-off-by: Marek Olšák
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 1f38d6fc1fe3..7daa2a8f1c08 100644
--- a/drivers/gpu/drm/amd/amdgp
Hi Alex,
On 6/4/2019 9:43 PM, Alex Deucher wrote:
> On Tue, Jun 4, 2019 at 12:07 PM S, Shirish wrote:
>> [What]
>> readptr read always returns zero, since most likely
>> UVD block is either power or clock gated.
>>
>> [How]
>> fetch rptr after amdgpu_ring_alloc() which informs
>> the power manage
From: Flora Cui
[ Upstream commit 379109351f4f6f2405cf54e7a296055f589c3ad1 ]
otherwise screen corrupts during modprobe.
Signed-off-by: Flora Cui
Reviewed-by: Feifei Xu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 1 +
1 file changed, 1
On 2019-06-04 16:13, Yang, Philip wrote:
> HMM provides new APIs and helps in kernel 5.2-rc1 to simplify driver
> path. The old hmm APIs are deprecated and will be removed in future.
>
> Below are changes in driver:
>
> 1. Change hmm_vma_fault to hmm_range_register and hmm_range_fault which
> suppo
On 2019-06-04 16:15, Alex Deucher wrote:
> On Tue, Jun 4, 2019 at 4:12 PM Kuehling, Felix wrote:
>> There haven't been any objections to these changes. Does anyone want to
>> add their Acked-by before I submit?
> Series is:
> Acked-by: Alex Deucher
>
> I wonder if there is a chance to share any c
On Thu, May 30, 2019 at 02:08:21AM +0200, Yrjan Skrimstad wrote:
> This driver currently contains a repeated 500ms blocking delay call
> which causes frequent major buffer underruns in PulseAudio. This patch
> fixes this issue by replacing the blocking delay with a non-blocking
> sleep call.
I see
On Tue, Jun 4, 2019 at 4:12 PM Kuehling, Felix wrote:
>
> There haven't been any objections to these changes. Does anyone want to
> add their Acked-by before I submit?
Series is:
Acked-by: Alex Deucher
I wonder if there is a chance to share any code down the road with the
context priority stuff
HMM provides new APIs and helps in kernel 5.2-rc1 to simplify driver
path. The old hmm APIs are deprecated and will be removed in future.
Below are changes in driver:
1. Change hmm_vma_fault to hmm_range_register and hmm_range_fault which
supports range with multiple vmas, remove the multiple vma
There haven't been any objections to these changes. Does anyone want to
add their Acked-by before I submit?
Thanks,
Felix
On 2019-05-28 18:38, Kuehling, Felix wrote:
> New feature: queue priorities
>
> The eviction state logic change is preparation for some debugger support
> we're working on
On 2019-06-04 3:21 p.m., Nicholas Kazlauskas wrote:
> [Why]
> Unlike our regular connectors, MST connectors don't start off with
> an initial connector state. This causes a NULL pointer dereference to
> occur when attaching the bpc property since it tries to modify the
> connector state.
>
> We
[Why]
Unlike our regular connectors, MST connectors don't start off with
an initial connector state. This causes a NULL pointer dereference to
occur when attaching the bpc property since it tries to modify the
connector state.
We need an initial connector state on the connector to avoid the crash.
On 2019-06-04 3:16 p.m., Alex Deucher wrote:
> On Tue, Jun 4, 2019 at 12:57 PM Zhu, James wrote:
>> EDC counts are related to instance and se. They are not the same
>> for different type of EDC. EDC clearing are changed to base on
>> individual EDC's instance and SE number.
>>
>> Signed-off-by: J
On Tue, Jun 4, 2019 at 12:57 PM Zhu, James wrote:
>
> EDC counts are related to instance and se. They are not the same
> for different type of EDC. EDC clearing are changed to base on
> individual EDC's instance and SE number.
>
> Signed-off-by: James Zhu
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v
Regards,
Oak
-Original Message-
From: amd-gfx On Behalf Of Kuehling,
Felix
Sent: Tuesday, June 4, 2019 2:47 PM
To: Christian König ;
dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/ttm: fix ttm_bo_unreserve
On 2019-06-04 11:23, Christian König
On 2019-06-04 11:23, Christian König wrote:
> Since we now keep BOs on the LRU we need to make sure
> that they are removed when they are pinned.
>
> Signed-off-by: Christian König
> ---
> include/drm/ttm/ttm_bo_driver.h | 14 ++
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
Looks straightforward
Reviewed-by: David Francis
From: amd-gfx on behalf of Nicholas
Kazlauskas
Sent: June 3, 2019 1:44:37 PM
To: amd-gfx@lists.freedesktop.org
Cc: Li, Sun peng (Leo); Wentland, Harry; Kazlauskas, Nicholas
Subject: [PATCH v2] drm/amd/display:
On 2019/05/31, Koenig, Christian wrote:
> Am 29.05.19 um 18:29 schrieb Emil Velikov:
> > On 2019/05/29, Koenig, Christian wrote:
> >> Am 29.05.19 um 15:03 schrieb Emil Velikov:
> >>> On 2019/05/29, Dave Airlie wrote:
> On Wed, 29 May 2019 at 02:47, Emil Velikov
> wrote:
> > On 2019/
We should ensure mqd data take effect when gpu reset.
Otherwise, it will rasie ring ib tests failure.
Signed-off-by: Yintian Tao
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/dri
This option is no longer needed. The default code paths
are now the only option.
v2: Add HPAGE support and a default for non contiguous maps
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 ---
drivers/g
EDC counts are related to instance and se. They are not the same
for different type of EDC. EDC clearing are changed to base on
individual EDC's instance and SE number.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 85 +--
drivers/gpu/drm/am
On Tue, Jun 4, 2019 at 4:46 PM Alex Deucher wrote:
>
> On Mon, Jun 3, 2019 at 11:36 AM Daniel Vetter wrote:
> >
> > On Thu, May 30, 2019 at 12:09 AM Alex Deucher wrote:
> > >
> > > Hi Dave, Daniel,
> > >
> > > New stuff for 5.3:
> > > - Add new thermal sensors for vega asics
> > > - Various RAS
On Tue, Jun 4, 2019 at 12:07 PM S, Shirish wrote:
>
> [What]
> readptr read always returns zero, since most likely
> UVD block is either power or clock gated.
>
> [How]
> fetch rptr after amdgpu_ring_alloc() which informs
> the power management code that the block is about to be
> used and hence t
Thanks Christian.
Have sent the patch for uvd & vcn.
(https://patchwork.freedesktop.org/patch/308575/)
Regards,
Shirish S
-Original Message-
From: Christian König
Sent: Tuesday, June 4, 2019 4:38 PM
To: S, Shirish ; Deucher, Alexander
; Koenig, Christian ;
jerry.zh...@amd.com; Deng,
[What]
readptr read always returns zero, since most likely
UVD block is either power or clock gated.
[How]
fetch rptr after amdgpu_ring_alloc() which informs
the power management code that the block is about to be
used and hence the gating is turned off.
Signed-off-by: Louis Li
Signed-off-by: Sh
We need reset compute ring wptr to zero when gpu reset
in order to prevent CP hang.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 2e9cac
Yes, you are right the error message is at wrong place.
May I just remove this message?
Best Regards
Yintian Tao
发件人: Koenig, Christian
发送时间: 2019年6月4日 23:22:00
收件人: Tao, Yintian; amd-gfx@lists.freedesktop.org
主题: Re: 答复: [PATCH] drm/amdgpu: no need fbcon und
Since we now keep BOs on the LRU we need to make sure
that they are removed when they are pinned.
Signed-off-by: Christian König
---
include/drm/ttm/ttm_bo_driver.h | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/tt
Am 04.06.19 um 17:16 schrieb Tao, Yintian:
Hi Christian
But when amdgpu driver is unloading, it will call this function.
And driver unloading is an legal case under SR-IOV.
Do you mean PCIe device removal indicates the unplug the real device?
Yes, exactly and that is not supported.
Sounds
Hi Christian
But when amdgpu driver is unloading, it will call this function.
And driver unloading is an legal case under SR-IOV.
Do you mean PCIe device removal indicates the unplug the real device?
Best Regards
Yitnian Tao
发件人: Christian K?nig
发送时间: 20
On Mon, Jun 3, 2019 at 11:36 AM Daniel Vetter wrote:
>
> On Thu, May 30, 2019 at 12:09 AM Alex Deucher wrote:
> >
> > Hi Dave, Daniel,
> >
> > New stuff for 5.3:
> > - Add new thermal sensors for vega asics
> > - Various RAS fixes
> > - Add sysfs interface for memory interface utilization
> > - U
Am 04.06.19 um 15:49 schrieb StDenis, Tom:
This option is no longer needed. The default code paths
are now the only option.
NAK, we still need the functionality. It just doesn't needs to be
configurable, but rather use the CPU defaults.
Christian.
Signed-off-by: Tom St Denis
---
drive
Am 04.06.19 um 15:43 schrieb Yintian Tao:
Under Sriov, there is no need of the support for fbcon.
NAK, that error message is not related to fbcon but means that PCIe
device removal is not supported.
Christian.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 +
This option is no longer needed. The default code paths
are now the only option.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 8
drivers/gpu/d
Under Sriov, there is no need of the support for fbcon.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 1f38d6f..2
Le 30 mai 2019 à 18:01, Harry Wentland a écrit :
>
> On 2019-05-27 10:58 a.m., Gaël HERMET wrote:
>> Hi,
>>
>> I have been facing an issue with my 5K display (iiyama ProLite
>> XB2779QQS-S1).
>>
>> It works fine as long as it is the only active monitor, as soon as I
>> activate another monitor
On Tue, Jun 4, 2019 at 1:24 PM Koenig, Christian
wrote:
>
> Am 04.06.19 um 12:50 schrieb Michel Dänzer:
> > On 2019-05-28 10:03 a.m., Koenig, Christian wrote:
> >> I rather think that we should go down the route of completely dropping
> >> command submission and buffer allocation through the prima
On Tue, Jun 4, 2019 at 3:02 PM Jason Gunthorpe wrote:
>
> On Tue, Jun 04, 2019 at 02:45:32PM +0200, Andrey Konovalov wrote:
> > On Tue, Jun 4, 2019 at 2:27 PM Jason Gunthorpe wrote:
> > >
> > > On Tue, Jun 04, 2019 at 02:18:19PM +0200, Andrey Konovalov wrote:
> > > > On Mon, Jun 3, 2019 at 7:46 P
On Tue, Jun 04, 2019 at 02:45:32PM +0200, Andrey Konovalov wrote:
> On Tue, Jun 4, 2019 at 2:27 PM Jason Gunthorpe wrote:
> >
> > On Tue, Jun 04, 2019 at 02:18:19PM +0200, Andrey Konovalov wrote:
> > > On Mon, Jun 3, 2019 at 7:46 PM Jason Gunthorpe wrote:
> > > >
> > > > On Mon, Jun 03, 2019 at 0
On Tue, Jun 4, 2019 at 2:27 PM Jason Gunthorpe wrote:
>
> On Tue, Jun 04, 2019 at 02:18:19PM +0200, Andrey Konovalov wrote:
> > On Mon, Jun 3, 2019 at 7:46 PM Jason Gunthorpe wrote:
> > >
> > > On Mon, Jun 03, 2019 at 06:55:14PM +0200, Andrey Konovalov wrote:
> > > > This patch is a part of a ser
On Tue, Jun 04, 2019 at 02:18:19PM +0200, Andrey Konovalov wrote:
> On Mon, Jun 3, 2019 at 7:46 PM Jason Gunthorpe wrote:
> >
> > On Mon, Jun 03, 2019 at 06:55:14PM +0200, Andrey Konovalov wrote:
> > > This patch is a part of a series that extends arm64 kernel ABI to allow to
> > > pass tagged use
On Mon, Jun 3, 2019 at 7:46 PM Jason Gunthorpe wrote:
>
> On Mon, Jun 03, 2019 at 06:55:14PM +0200, Andrey Konovalov wrote:
> > This patch is a part of a series that extends arm64 kernel ABI to allow to
> > pass tagged user pointers (with the top byte set to something else other
> > than 0x00) as
On Mon, Jun 3, 2019 at 8:17 PM Khalid Aziz wrote:
>
> On 6/3/19 11:29 AM, Christoph Hellwig wrote:
> > On Mon, Jun 03, 2019 at 11:24:35AM -0600, Khalid Aziz wrote:
> >> On 6/3/19 11:06 AM, Andrey Konovalov wrote:
> >>> On Mon, Jun 3, 2019 at 7:04 PM Khalid Aziz wrote:
> Andrey,
>
>
Am 04.06.19 um 12:50 schrieb Michel Dänzer:
> On 2019-05-28 10:03 a.m., Koenig, Christian wrote:
>> I rather think that we should go down the route of completely dropping
>> command submission and buffer allocation through the primary node for
>> non master clients. And then as next step at some po
Am 04.06.19 um 10:36 schrieb S, Shirish:
From: Louis Li
[What]
vce ring test fails consistently during resume in s3 cycle, due to
mismatch read & write pointers.
On debug/analysis its found that rptr to be compared is not being
correctly updated/read, which leads to this failure.
Below is the f
On 2019-05-28 10:03 a.m., Koenig, Christian wrote:
>
> I rather think that we should go down the route of completely dropping
> command submission and buffer allocation through the primary node for
> non master clients. And then as next step at some point drop support for
> authentication/flink
Reviewed-by: Evan Quan
> -Original Message-
> From: Liang, Prike
> Sent: 2019年6月4日 10:35
> To: amd-gfx@lists.freedesktop.org; Huang, Ray ;
> Quan, Evan
> Cc: Liang, Prike
> Subject: [PATCH v2 2/2] drm/amd/amdgpu: add RLC firmware to support
> raven1 refresh
>
> Use SMU firmware version
From: Louis Li
[What]
vce ring test fails consistently during resume in s3 cycle, due to
mismatch read & write pointers.
On debug/analysis its found that rptr to be compared is not being
correctly updated/read, which leads to this failure.
Below is the failure signature:
[drm:amdgpu_vce_r
On Mon, 3 Jun 2019 13:56:05 -0300
Helen Koike wrote:
> Hello,
>
> I'm re-sending this series with the acked by in the msm patch and
> updating the docs in the last patch, the rest is the same.
>
> v3 link: https://patchwork.kernel.org/project/dri-devel/list/?series=91353
Series queued to drm-
From: Huang, Ray
Sent: Tuesday, June 4, 2019 1:37 PM
To: Xiao, Jack; amd-gfx@lists.freedesktop.org; Deucher, Alexander; Zhang,
Hawking
Cc: Xiao, Jack; Wang, Kevin(Yang); Quan, Evan; Gui, Jack; Gao, Likun
Subject: RE: [PATCH] drm/amd/powerplay: add smu message mute
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