[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Jiansong Chen
-Original Message-
From: amd-gfx On Behalf Of Likun Gao
Sent: Tuesday, September 22, 2020 11:17 AM
To: amd-gfx@lists.freedesktop.org
Cc: Gao, Likun ; Feng, Kenneth ;
Zhang, Hawking
Subject: [PATCH]
From: Likun Gao
Update driver if file for sienna cichlid.
Signed-off-by: Likun Gao
Change-Id: I295edda90d156c4cea742e62fab696afb6cd1366
---
drivers/gpu/drm/amd/pm/inc/smu11_driver_if_sienna_cichlid.h | 4 ++--
drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 2 +-
2 files
[AMD Public Use]
Thanks Monk.
Take a look at this patch it almost exclude all the rlc callback function from
guest sriov sequence. That's why I would suggest we even don't initialize any
rlc callback function for sriov while check the function pointer before access
it.
Regarding CG/PG
POLL_REGMEM_ADDR_LO/HI are in byte but umr_reg_name() expects register address
in dword
Signed-off-by: Xiaojie Yuan
---
src/lib/ring_decode.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/lib/ring_decode.c b/src/lib/ring_decode.c
index a74229d..b5838d1 100644
---
> -Original Message-
> From: Kasiviswanathan, Harish
> Sent: Monday, September 21, 2020 8:52 PM
> To: Kim, Jonathan ; amd-gfx@lists.freedesktop.org
> Subject: RE: [PATCH 2/3] drm/amdgpu: add per device user friendly xgmi
> events for vega20
>
> [AMD Official Use Only - Internal
I think the main problem is RLCG is not an independent IP block but embedded in
GFX block, so that make it hard to cut off from amdgpu for SRIOV
But I think we still have chance to introduce one more layer between GFX and
RLCG and redundant RLCG functions for SRIOV
(except the part that some
Yeah, Let's have a deep discussion regarding RLCG logic
-邮件原件-
发件人: Zhang, Hawking
发送时间: 2020年9月22日 10:04
收件人: Zhang, Hawking ; Khaire, Rohit
; amd-gfx@lists.freedesktop.org; Liu, Monk
抄送: Xiao, Jack ; Xu, Feifei ; Wang,
Kevin(Yang) ; Li, Rong (Zero) ; Min,
Frank ; Yuan, Xiaojie
[AMD Public Use]
If most bare metal sequence is bypassed from guest side, why we don't create
sriov specific ip block and initialize in set_ip_block phase. In such way, we
can have clean code base for both bare metal and sriov guest.
Now the amdgpu_sriov_vf is almost everywhere in amdgpu
[AMD Public Use]
You shall by pass get_rev_id function call, instead of adding the check in the
callback function.
For each hw generation, there could be several callback function implementation
depending on whether the mmRCC_DEV0_EPF0_STRAP0 can be re-used.
It's error prone if we just take
[AMD Public Use]
Similar as the RLC
If the engine is not allowed to access from the guest (or most bare metal
programming sequence is not allowed in guest environment), we shall consider to
disable it from high level, instead of adding amdgpu_sriov_vf(adev) everywhere.
Regards,
Hawking
[AMD Public Use]
Add @Liu, Monk for a more reasonable approach if any.
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Zhang,
Hawking
Sent: Tuesday, September 22, 2020 10:02
To: Khaire, Rohit ; amd-gfx@lists.freedesktop.org
Cc: Xiao, Jack ; Xu, Feifei ; Wang,
[AMD Public Use]
This is really not a sustainable approach -- add amdgpu_sriov_vf(adev) check
for every callback function.
If RLC is not allowed to access from guest, we shall not initialize
gfx.rlc.funcs for sriov guest..., while check the function pointer before
invoke the function.
I
[AMD Official Use Only - Internal Distribution Only]
Few comments inline.
-Original Message-
From: Kim, Jonathan
Sent: Thursday, September 17, 2020 2:15 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kasiviswanathan, Harish ; Kim, Jonathan
; Kim, Jonathan
Subject: [PATCH 2/3] drm/amdgpu:
[Why]
Clang can't compile dcn30_optc.o with '-mpreferred-stack-boundary=4'
[How]
use '-mstack-alignment=4' if Clang is CC and '-mpreferred-stack-boundary=4'
if CC is not Clang
Signed-off-by: Anthony Benware
---
drivers/gpu/drm/amd/display/dc/dcn30/Makefile | 4
1 file changed, 4
"warning" in print statement. Fixed locally.
On Mon, Sep 21, 2020 at 5:20 PM Alex Deucher wrote:
>
> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_crat.c: In function
> ‘kfd_create_crat_image_virtual’:
> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_crat.c:1391:12: warning: format ‘%d’
> expects
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_crat.c: In function
‘kfd_create_crat_image_virtual’:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_crat.c:1391:12: warning: format ‘%d’
expects argument of type ‘int’, but argument 3 has type ‘size_t’ {aka ‘long
unsigned int’} [-Wformat=]
1391 |
[AMD Public Use]
Adding more reviewers to cc.
Rohit
-Original Message-
From: Khaire, Rohit
Sent: September 3, 2020 5:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Khaire, Rohit
Subject: [PATCH] drm/amdgpu: Fix L1 policy violations (PSP) on sienna cichlid
SRIOV
Signed-off-by: Rohit
Signed-off-by: Rohit Khaire
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 128 ++---
1 file changed, 70 insertions(+), 58 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
index 34ccf376ee45..6fb5588fc0b6 100644
---
Signed-off-by: Rohit Khaire
---
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
index 7429f30398b9..4f611cd68940 100644
---
Signed-off-by: Rohit Khaire
---
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
index 7429f30398b9..78cb48bafa4c 100644
---
[AMD Public Use]
Hi Alex,
I discussed this with my team, we are fine with PCI_REVISION_ID for SRIOV.
I am resending my patch with the change you suggested.
Thanks
Rohit
-Original Message-
From: Alex Deucher
Sent: September 14, 2020 1:16 AM
To: Khaire, Rohit
Cc: amd-gfx list
Applied with fixed up whitespace.
Thanks,
Alex
On Tue, Sep 15, 2020 at 3:45 AM Christian König
wrote:
>
> Am 15.09.20 um 09:18 schrieb Sudheesh Mavila:
> > SMU10_UMD_PSTATE_PEAK_FCLK value should not be used to set the DPM.
> >
> > Change suggested by evan.q...@amd.com
>
> Can't say
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Tuesday, September 22, 2020 12:54 AM
To: Chauhan, Madhav ; amd-gfx@lists.freedesktop.org
Cc: Surampalli, Kishore ; Patel, Mihir
; Sharma, Shashank ; Deucher,
Alexander ; Saleem, Athar
Subject: Re: [PATCH] drm/amdgpu: Add
On Mon, Sep 21, 2020 at 9:14 AM Bernard Zhao wrote:
>
> Static function dal_ddc_i2c_payloads_destroy is only called
> in dal_ddc_service_query_ddc_data, the parameter is
> , there is no point NULL risk, so no need to check.
> This change is to make the code run a bit fast.
>
How about just
Applied. Thanks!
Alex
On Mon, Sep 21, 2020 at 9:14 AM Liu Shixin wrote:
>
> Simplify the return expression.
>
> Signed-off-by: Liu Shixin
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git
Applied. Thanks!
Alex
On Mon, Sep 21, 2020 at 9:14 AM Liu Shixin wrote:
>
> Simplify the return expression.
>
> Signed-off-by: Liu Shixin
> ---
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git
Applied. Thanks!
Alex
On Mon, Sep 21, 2020 at 9:14 AM Qinglang Miao wrote:
>
> Simplify the return expression.
>
> Signed-off-by: Qinglang Miao
> ---
> drivers/gpu/drm/amd/amdgpu/cik_ih.c | 7 +--
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 ++
> 2 files changed, 3
Applied. Thanks!
Alex
On Mon, Sep 21, 2020 at 9:14 AM Qinglang Miao wrote:
>
> Simplify the return expression.
>
> Signed-off-by: Qinglang Miao
> ---
> drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git
Am 21.09.20 um 21:18 schrieb Madhav Chauhan:
UID is helpful while doing analysis of BO allocated
by a process.
Looks like a bit overkill to me, why not get the uid from the process info?
Christian.
Signed-off-by: Madhav Chauhan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 6 +-
1
UID is helpful while doing analysis of BO allocated
by a process.
Signed-off-by: Madhav Chauhan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
[AMD Public Use]
Reviewed-by: Alex Deucher
From: Quan, Evan
Sent: Sunday, September 20, 2020 10:47 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
Subject: [PATCH] drm/amd/pm: correct the pmfw version check for Navi14
Otherwise, that
[AMD Public Use]
Series is:
Reviewed-by: Alex Deucher
From: Quan, Evan
Sent: Sunday, September 20, 2020 10:49 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
Subject: [PATCH 2/2] drm/amd/pm: drop redundant watermarks bitmap setting
On Mon, 21 Sep 2020 10:03:32 +0200
Samuel Iglesias Gonsálvez wrote:
> Hi all,
>
> Huge thanks again to the entire team from Intel, for their great work
> organizing XDC 2020, our first virtual conference!
>
> As usual we're looking for feedback on both XDC itself, and the CFP
> process and
From: Ryan Taylor
Added IP block section to amdgpu.rst.
Added more documentation to amd_ip_funcs.
Created documentation for amd_ip_block_type.
v2: Provides a more detailed DOC section on IP blocks.
v3: Clarifies the IP block list. Adds info on IP block enumeration.
Signed-off-by: Ryan Taylor
[AMD Public Use]
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Kent Russell
Sent: Monday, September 21, 2020 10:27 AM
To: amd-gfx@lists.freedesktop.org
Cc: Russell, Kent
Subject: [PATCH] drm/amdkfd: Use kvmalloc instead of kmalloc for VCRAT
Since
On 2020-09-21 4:40 p.m., Sasha Levin wrote:
From: Michel Dänzer
[ Upstream commit 2f228aab21bbc74e90e267a721215ec8be51daf7 ]
Don't check drm_crtc_state::active for this either, per its
documentation in include/drm/drm_crtc.h:
* Hence drivers must not consult @active in their various
*
From: Bhawanpreet Lakha
[ Upstream commit 4cdd7b332ed139b1e37faeb82409a14490adb644 ]
[Why]
Previously we were only calling add_topology when hdcp was being enabled.
Now we call add_topology by default so the ERROR messages are printed if
the firmware is not loaded.
This error message is not
From: Dennis Li
[ Upstream commit 087d764159996ae378b08c0fdd557537adfd6899 ]
In the resume stage of GPU recovery, start_cpsch will call pm_init
which set pm->allocated as false, cause the next pm_release_ib has
no chance to release ib memory.
Add pm_release_ib in stop_cpsch which will be
From: Dennis Li
[ Upstream commit 087d764159996ae378b08c0fdd557537adfd6899 ]
In the resume stage of GPU recovery, start_cpsch will call pm_init
which set pm->allocated as false, cause the next pm_release_ib has
no chance to release ib memory.
Add pm_release_ib in stop_cpsch which will be
From: Bhawanpreet Lakha
[ Upstream commit 875d369d8f75275d30e59421602d9366426abff7 ]
[Why]
DTM topology updates happens by default now. This results in DTM
warnings when hdcp is not even being enabled. This spams the dmesg
and doesn't effect normal display functionality so it is better to log
From: Dennis Li
[ Upstream commit 087d764159996ae378b08c0fdd557537adfd6899 ]
In the resume stage of GPU recovery, start_cpsch will call pm_init
which set pm->allocated as false, cause the next pm_release_ib has
no chance to release ib memory.
Add pm_release_ib in stop_cpsch which will be
From: Jun Lei
[ Upstream commit c4790a8894232f39c25c7c546c06efe074e63384 ]
[why]
Recent characterization shows increased stutter latencies on some SKUs,
leading to underflow.
[how]
Update SOC params to account for this worst case latency.
Signed-off-by: Jun Lei
Acked-by: Aurabindo Pillai
From: Michel Dänzer
[ Upstream commit 2f228aab21bbc74e90e267a721215ec8be51daf7 ]
Don't check drm_crtc_state::active for this either, per its
documentation in include/drm/drm_crtc.h:
* Hence drivers must not consult @active in their various
* _mode_config_funcs.atomic_check callback to reject
From: Michel Dänzer
[ Upstream commit 2f228aab21bbc74e90e267a721215ec8be51daf7 ]
Don't check drm_crtc_state::active for this either, per its
documentation in include/drm/drm_crtc.h:
* Hence drivers must not consult @active in their various
* _mode_config_funcs.atomic_check callback to reject
From: Jun Lei
[ Upstream commit c4790a8894232f39c25c7c546c06efe074e63384 ]
[why]
Recent characterization shows increased stutter latencies on some SKUs,
leading to underflow.
[how]
Update SOC params to account for this worst case latency.
Signed-off-by: Jun Lei
Acked-by: Aurabindo Pillai
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Stanley.Yang
Sent: Monday, September 21, 2020 21:48
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Chen, Guchun ;
Clements, John ; Li, Dennis ; Zhou1,
Tao ; Yang, Stanley
Subject: [PATCH
First off, I think you all did a fantastic job. I felt that things
ran very smoothly and, as far as the talks themselves go, I think it
went almost as smoothly as an in-person XDC. I'm really quite
impressed. I do have a couple pieces of more nuanced feedback:
1. I think we were maybe a bit
Since we're dynamically allocating the CPU VCRAT, use kvmalloc in case
the allocation size is huge.
Signed-off-by: Kent Russell
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
GCEA/MMHUB EA error should not result to DF freeze, this is
fixed in next generation, but for some reasons the GCEA/MMHUB
EA error will result to DF freeze in previous generation,
diver should avoid to indicate GCEA/MMHUB EA error as hw fatal
error in kernel message by read GCEA/MMHUB err status
Simplify the return expression.
Signed-off-by: Liu Shixin
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index
Static function dal_ddc_i2c_payloads_destroy is only called
in dal_ddc_service_query_ddc_data, the parameter is
, there is no point NULL risk, so no need to check.
This change is to make the code run a bit fast.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
Simplify the return expression.
Signed-off-by: Qinglang Miao
---
drivers/gpu/drm/amd/amdgpu/cik_ih.c | 7 +--
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 ++
2 files changed, 3 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_ih.c
Simplify the return expression.
Signed-off-by: Qinglang Miao
---
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
index 4b746584a..1c22d8393 100644
Simplify the return expression.
Signed-off-by: Liu Shixin
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 5400cac02087..cb9e9e5afa5a 100644
Hi all,
Huge thanks again to the entire team from Intel, for their great work
organizing XDC 2020, our first virtual conference!
As usual we're looking for feedback on both XDC itself, and the CFP
process and program selection. Both about what was great and should be
kept for next year's
Hi
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This commit has been processed because it contains a "Fixes:" tag
fixing commit: 33b3ad3788ab ("drm/radeon: handle PCIe root ports with
addressing limitations").
The bot has tested the following trees: v5.8.10, v5.4.66.
v5.8.10: Build OK!
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On Fri, Sep 18, 2020 at 01:12:21PM -0400, Rodrigo Vivi wrote:
> On Fri, Sep 18, 2020 at 11:03:12AM -0400, Alex Deucher wrote:
> > On Fri, Sep 18, 2020 at 9:25 AM Daniel Vetter
> > wrote:
> > >
> > > Hi all,
> > >
> > > These are the leftovers of the leftovers of my initial drmm series to
> > >
[AMD Official Use Only - Internal Distribution Only]
Hi Monk,
Just for debugging, we don't need to remove those amdgpu_sriov_vf, it won't
affect the mcbp disable.
Best wishes
Emily Deng
>-Original Message-
>From: Liu, Monk
>Sent: Monday, September 21, 2020 4:02 PM
>To: Deng,
[AMD Official Use Only - Internal Distribution Only]
Looks you missed many places, e.g.:
866 if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) {
867 bo_va = fpriv->csa_va;
868 BUG_ON(!bo_va);
869 r = amdgpu_vm_bo_update(adev, bo_va, false);
870 if (r)
For debug convenient, reuse mcbp parameter for sriov mcbp
Signed-off-by: Emily.Deng
Change-Id: If1222b2c050376feefb8fed4be58b4b87d36bd77
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 5 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
[AMD Official Use Only - Internal Distribution Only]
Hi Monk,
Good suggestion, will send out patch again.
Best wishes
Emily Deng
>-Original Message-
>From: Liu, Monk
>Sent: Monday, September 21, 2020 1:37 PM
>To: Deng, Emily ; amd-gfx@lists.freedesktop.org
>Cc: Deng, Emily
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