On 2/3/23 19:34, Ville Syrjälä wrote:
On Fri, Feb 03, 2023 at 09:25:38PM +0200, Ville Syrjälä wrote:
On Fri, Feb 03, 2023 at 08:56:55PM +0200, Ville Syrjälä wrote:
On Fri, Feb 03, 2023 at 01:28:20PM -0500, Harry Wentland wrote:
On 2/3/23 11:00, Ville Syrjälä wrote:
On Fri, Feb 03, 2023 a
Hey Alex,
On 03/02/2023 23:07, Alex Deucher wrote:
On Fri, Feb 3, 2023 at 4:54 PM Shashank Sharma wrote:
From: Alex Deucher
This patch intorduces new UAPI/IOCTL for usermode graphics
queue. The userspace app will fill this structure and request
the graphics driver to add a graphics work queu
On Fri, Feb 3, 2023 at 4:54 PM Shashank Sharma wrote:
>
> From: Alex Deucher
>
> This patch intorduces new UAPI/IOCTL for usermode graphics
> queue. The userspace app will fill this structure and request
> the graphics driver to add a graphics work queue for it. The
> output of this UAPI is a que
Hi Dave, Daniel,
More stuff for 6.3. Mostly bug fixes.
The following changes since commit aebd8f0c6f8280ba35bc989f4a9ea47469d3589a:
Merge v6.2-rc6 into drm-next (2023-01-31 12:23:23 +0100)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm
From: Shashank Sharma
MQD describes the properies of a user queue to the HW, and allows it to
accurately configure the queue while mapping it in GPU HW. This patch
adds:
- A new header file which contains the userqueue MQD definition for
V11 graphics engine.
- A new function which fills it with
The FW expects us to allocate atleast one page as context space to
process gang, process, shadow, GDS and FW_space related work. This
patch creates some object for the same, and adds an IP specific
functions to do this.
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
---
d
From: Shashank Sharma
This patch adds new fptrs to prepare the usermode queue to be
mapped or unmapped into the HW. After this mapping, the queue
will be ready to accept the workload.
V1: Addressed review comments from Alex on the RFC patch series
- Map/Unmap should be IP specific.
Cc: Alex
From: Arvind Yadav
This patch adds 20 ms of busy-waiting delay after mapping the
usermode queue in MES HW. It was observed during the testing that
this delay is required for expected results.
Cc: Alex Deucher
Cc: Christian König
Cc: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/g
From: Shashank Sharma
The doorbell patches, being reviewed here, are requied for Usermode
queues:
https://patchwork.freedesktop.org/series/113669/
This hack patch adds a doorbell IOCTL just to test the usermode
queues functionality, and must not be merged.
Cc: Alex Deucher
Cc: Christian König
From: Shashank Sharma
A Memory queue descriptor (MQD) of a userqueue defines it in the harware's
context. As the method of formation of a MQD, and its format can vary between
different graphics IPs, we need gfx GEN specific handlers to create MQDs.
This patch:
- Introduces MQD hander functions f
From: Shashank Sharma
This patch adds skeleton code for usermode queue creation. It
typically contains:
- A new structure to keep all the user queue data in one place.
- An IOCTL function to create/free a usermode queue.
- A function to generate unique index for the queue.
- A queue context manag
From: Shashank Sharma
This patch series introduces AMDGPU usermode graphics queues.
User queues is a method of GPU workload submission into the graphics
hardware without any interaction with kernel/DRM schedulers. In this
method, a userspace graphics application can create its own workqueue
and s
From: Alex Deucher
This patch intorduces new UAPI/IOCTL for usermode graphics
queue. The userspace app will fill this structure and request
the graphics driver to add a graphics work queue for it. The
output of this UAPI is a queue id.
This UAPI maps the queue into GPU, so the graphics app can s
On 2/3/23 14:34, Ville Syrjälä wrote:
> On Fri, Feb 03, 2023 at 09:25:38PM +0200, Ville Syrjälä wrote:
>> On Fri, Feb 03, 2023 at 08:56:55PM +0200, Ville Syrjälä wrote:
>>> On Fri, Feb 03, 2023 at 01:28:20PM -0500, Harry Wentland wrote:
On 2/3/23 11:00, Ville Syrjälä wrote:
>
On Fri, Feb 03, 2023 at 09:25:38PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 03, 2023 at 08:56:55PM +0200, Ville Syrjälä wrote:
> > On Fri, Feb 03, 2023 at 01:28:20PM -0500, Harry Wentland wrote:
> > >
> > >
> > > On 2/3/23 11:00, Ville Syrjälä wrote:
> > > > On Fri, Feb 03, 2023 at 10:24:52AM -0
On 2/3/23 14:25, Ville Syrjälä wrote:
> On Fri, Feb 03, 2023 at 08:56:55PM +0200, Ville Syrjälä wrote:
>> On Fri, Feb 03, 2023 at 01:28:20PM -0500, Harry Wentland wrote:
>>>
>>>
>>> On 2/3/23 11:00, Ville Syrjälä wrote:
On Fri, Feb 03, 2023 at 10:24:52AM -0500, Harry Wentland wrote:
>
>
Applied. Thanks. I forgot to add it to the commit when I pushed it,
but for posterity,
Fixes: 3bd68b32c911 ("drm/amdgpu: fix pipeline sync v2:)
Alex
On Fri, Feb 3, 2023 at 11:53 AM Bert Karwatzki wrote:
>
> Here is the fix for (send again to test if I can get it right with
> Evolution)
> Bug:
On Fri, Feb 03, 2023 at 08:56:55PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 03, 2023 at 01:28:20PM -0500, Harry Wentland wrote:
> >
> >
> > On 2/3/23 11:00, Ville Syrjälä wrote:
> > > On Fri, Feb 03, 2023 at 10:24:52AM -0500, Harry Wentland wrote:
> > >>
> > >>
> > >> On 2/3/23 10:19, Ville Syrj
On 2/3/23 13:56, Ville Syrjälä wrote:
> On Fri, Feb 03, 2023 at 01:28:20PM -0500, Harry Wentland wrote:
>>
>>
>> On 2/3/23 11:00, Ville Syrjälä wrote:
>>> On Fri, Feb 03, 2023 at 10:24:52AM -0500, Harry Wentland wrote:
On 2/3/23 10:19, Ville Syrjälä wrote:
> On Fri, Feb 03, 20
From: Alex Deucher
This patch does the following:
- Removes doorbell ptr from adev.
- Moves doorbell.num_doorbells into mman.num_doorbells.
- Introduces a kernel bo for doorbell management in form of
mman.doorbell_kernel_bo.
This bo holds the doorbell space now.
- Introduces mman.doorbell_bo_s
From: Alex Deucher
This patch does the following:
- Removes doorbell ptr from adev.
- Moves doorbell.num_doorbells into mman.num_doorbells.
- Introduces a kernel bo for doorbell management in form of
mman.doorbell_kernel_bo.
This bo holds the doorbell space now.
- Introduces mman.doorbell_bo_s
From: Shashank Sharma
This patch adds a domain input variable for amdgpu_bo_create_kernel_at,
so that it could be used for both VRAM and DOORBELL domains objects. It
also adds supporting code for existing callers.
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |
From: Shashank Sharma
This patch adds a domain input variable for amdgpu_bo_create_kernel_at,
so that it could be used for both VRAM and DOORBELL domains objects. It
also adds supporting code for existing callers.
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |
From: Alex Deucher
This patch initializes doorbell pool with bar manager, which will
divide all the doorbell memory into pages.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
From: Alex Deucher
This patch adds section for doorbell memory in memory status
reporting functions like vm/bo_get_memory.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 +
From: Shashank Sharma
This patch initializes doorbell pool with bar manager, which will
divide all the doorbell memory into pages.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 11 +++
1 file changed, 11 insertions(+)
diff --
From: Alex Deucher
This patch adds section for doorbell memory in memory status
reporting functions like vm/bo_get_memory.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 +
From: Alex Deucher
This patch adds changes to accommodate the new GEM/TTM domain
for doorbell memory.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 19 ++--
drivers/g
From: Alex Deucher
To consolidate it with vram handling.
Signed-off-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 96 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 64 +++
2 files changed, 71 insertions(+), 89 d
From: Alex Deucher
This patch renames aper_base and aper_size parameters (in adev->gmc),
to vram_aper_base and vram_aper_size, to differentiate it from the
doorbell BAR.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 +-
drivers
From: Alex Deucher
This patch adds changes to accommodate the new GEM/TTM domain
for doorbell memory.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 19 ++--
drivers/g
From: Alex Deucher
This patch:
- moves the doorbell.ptr variable to mman structure
- renames it to doorbell_aper_base_kaddr for better readability;
This change is to make doorbell's ttm management similar to vram's.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/d
From: Alex Deucher
This patch moves doorbell info into adev->gmc structure, to align
with vram info. This will prepare structures for proper ttm management
of the doorbell BAR.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 8 +++
From: Alex Deucher
Adjust the code to handle doorbell BARs as well as VRAM.
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.c | 101
drivers/gpu/drm/amd/amdgpu/amdgpu_bar_mgr.h | 1 +
drivers/gpu/drm/amd/amdgpu/am
From: Alex Deucher
Rename the VRAM manager functions so they can be resused to manage
doorbell BAR as well.
Cc: Christian Koenig
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
From: Alex Deucher
To differentiate it from the doorbell BAR.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 14 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h| 2 +-
drivers/gpu/drm/amd/amdg
From: Alex Deucher
Rename the files.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
.../gpu/drm/amd/amdgpu/{amdgpu_vram_mgr.c => amdgpu_bar_mgr.c} | 0
.../gpu/drm/amd/amdgpu/{amdgpu_vram_mgr.h => amdgpu_bar_mgr.h} | 0
drivers/gpu/drm
From: Alex Deucher
Signed-off-by: Alex Deucher
---
include/uapi/drm/amdgpu_drm.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 4038abe8505a..fd1c65d78ded 100644
--- a/include/uapi/drm/amdgpu_drm.h
++
From: Shashank Sharma
This patch series re-designs the current doorbell handling of the AMDGPU
driver and prepares it for Usermode queues. The fundamental changes are:
- Introduce and accommodate a new GEM domain for doorbells.
- Prepare the AMDGPU ttm backend for handling doorbell memory.
- Ren
On Fri, Feb 03, 2023 at 01:28:20PM -0500, Harry Wentland wrote:
>
>
> On 2/3/23 11:00, Ville Syrjälä wrote:
> > On Fri, Feb 03, 2023 at 10:24:52AM -0500, Harry Wentland wrote:
> >>
> >>
> >> On 2/3/23 10:19, Ville Syrjälä wrote:
> >>> On Fri, Feb 03, 2023 at 09:39:42AM -0500, Harry Wentland wrote
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 4fafd96910add124586b549ad005dcd179de8a18 Add linux-next specific
files for 20230203
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202301301801.y5o08tqx-...@intel.com
https
On 2/3/23 11:00, Ville Syrjälä wrote:
> On Fri, Feb 03, 2023 at 10:24:52AM -0500, Harry Wentland wrote:
>>
>>
>> On 2/3/23 10:19, Ville Syrjälä wrote:
>>> On Fri, Feb 03, 2023 at 09:39:42AM -0500, Harry Wentland wrote:
On 2/3/23 07:59, Sebastian Wick wrote:
> On Fri, Feb 3, 20
From: Rob Clark
If userspace calls the AMDGPU_CS ioctl from multiple threads, because
the vm is global to the drm_file, you can end up with multiple threads
racing in amdgpu_vm_clear_freed(). So the freed list should be
protected with the status_lock, similar to other vm lists.
Fixes: d38ceaf99
Here is the fix for (send again to test if I can get it right with
Evolution)
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2360
From 6e064c9565ef0da890f3fcb2a4f6a8cd44a12fdb Mon Sep 17 00:00:00 2001
From: Bert Karwatzki
Date: Thu, 2 Feb 2023 19:50:27 +0100
Subject: [PATCH] Fix memory leak
On 2/3/23 10:43, Hamza Mahfooz wrote:
Currently, it is likely that we will read the relevant LTTPR caps after
link training has completed (which can cause garbage data to be read),
however according to the DP 2.0 spec that should be done before link
training has commenced. So, instead of reading
On Fri, Feb 03, 2023 at 10:24:52AM -0500, Harry Wentland wrote:
>
>
> On 2/3/23 10:19, Ville Syrjälä wrote:
> > On Fri, Feb 03, 2023 at 09:39:42AM -0500, Harry Wentland wrote:
> >>
> >>
> >> On 2/3/23 07:59, Sebastian Wick wrote:
> >>> On Fri, Feb 3, 2023 at 11:40 AM Ville Syrjälä
> >>> wrote:
>
Currently, it is likely that we will read the relevant LTTPR caps after
link training has completed (which can cause garbage data to be read),
however according to the DP 2.0 spec that should be done before link
training has commenced. So, instead of reading the registers on demand,
use the values
From: Jingwen Zhu
[Why]
This is a workaround for an dcn3.15 hang
that happens if otg dispclk is ramped while
otg is on and stream enc is off. But this
w/a should not trigger when we have a dig active.
[How]
Avoid disable otg when dig was disabled.
[Note]
Reapplying commit 82dca8576d14f3dcb775b3
From: Aric Cyr
This version brings along the following:
- FW 0.0.153.0
- Code re-organize for dc_link.c
- Bug fixes on rotation, DRR and more
- DCN314 domain power control moved to dmcub
Acked-by: Qingqing Zhuo
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file cha
From: Nicholas Kazlauskas
[Why]
DOMAIN power gating control is now required to be done via firmware
due to interlock with other power features. This is to avoid
intermittent issues in the LB memories.
[How]
If the firmware supports the command then use the new firmware as
the sequence can avoid
From: Hans de Goede
Remove CONFI_BACKLIGHT_CLASS_DEVICE ifdef
that was accidently introduced back.
Reviewed-by: Hamza Mahfooz
Acked-by: Qingqing Zhuo
Signed-off-by: Hans de Goede
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ---
1 file changed, 3 del
From: Anthony Koo
[Why&How]
- Reduce reserved size from 9 to 8 dwords to reduce structure size
and allow the union dmub_rb_cmd to fit into max 64-bytes cmd size
Reviewed-by: Aric Cyr
Acked-by: Qingqing Zhuo
Signed-off-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 2 +-
From: Alvin Lee
[Description]
- Single 4K60 playing YUV420 MPO video blocks P-State because
the required VRatio for prefetch is too high (luma plane for
YUV420 is 1bpe, so swath height is 16 and prefetch requires
more lines)
- Allow max vratio per plane to be 7.9 for single display YUV420
From: "Leo (Hanghong) Ma"
[Why && How]
Add support to read manufacturer OUI
and device id from HDMI SCDC.
Reviewed-by: Wenjing Liu
Acked-by: Qingqing Zhuo
Signed-off-by: Leo (Hanghong) Ma
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 17
drivers/gpu/drm/amd/display/dc/
From: Wesley Chalmers
[WHY]
DRR and Pipe cannot be updated on
the same frame, or else underflow will
occur.
Reviewed-by: Jun Lei
Acked-by: Qingqing Zhuo
Signed-off-by: Wesley Chalmers
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 15 +++
drivers/gpu/drm/amd/display/dc/d
From: Aurabindo Pillai
[Why&How]
Fix the null pointer dererefence error when rotating the monitor on
a DCN32 variant, which causes a call trace like:
[ 42.469548] RIP: 0010:dcn20_program_front_end_for_ctx.cold+0x68/0x435
[amdgpu]
[ 42.477140] Code: c1 4c 01 e8 48 8b b0 f0 01 00 00 e8 b6 1c
From: Wesley Chalmers
[WHY]
If HUBP FP2 (VTG register) is higher than OTG FP2 (implicit), then
underflow can occur.
Since VTG is not double-buffered, there is risk of underflow when
raising FP2 if VBLANK is hit before programming and unlocking OTG is
completed.
It appears that if HUBP FP2 is lo
From: Wesley Chalmers
[WHY]
Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a
pipe commit can cause underflow.
[HOW]
Defer all DPP adjustment requests till optimized_required is false.
Reviewed-by: Jun Lei
Acked-by: Qingqing Zhuo
Signed-off-by: Wesley Chalmers
---
driv
This DC patchset brings improvements in multiple areas. In summary, we have:
- DC 3.2.222
- FW 0.0.153.0
- Code re-organize for dc_link.c
- Bug fixes on rotation, DRR and more
- DCN314 domain power control moved to dmcub
Cc: Daniel Wheeler
---
Alvin Lee (1):
drm/amd/display: Set max vratio
On 2/3/23 10:19, Ville Syrjälä wrote:
> On Fri, Feb 03, 2023 at 09:39:42AM -0500, Harry Wentland wrote:
>>
>>
>> On 2/3/23 07:59, Sebastian Wick wrote:
>>> On Fri, Feb 3, 2023 at 11:40 AM Ville Syrjälä
>>> wrote:
On Fri, Feb 03, 2023 at 02:07:44AM +, Joshua Ashton wrote:
> Use
On Fri, Feb 03, 2023 at 09:39:42AM -0500, Harry Wentland wrote:
>
>
> On 2/3/23 07:59, Sebastian Wick wrote:
> > On Fri, Feb 3, 2023 at 11:40 AM Ville Syrjälä
> > wrote:
> >>
> >> On Fri, Feb 03, 2023 at 02:07:44AM +, Joshua Ashton wrote:
> >>> Userspace has no way of controlling or knowing
On Fri, Feb 03, 2023 at 11:34:02AM +0200, Jani Nikula wrote:
> On Wed, 25 Jan 2023, Jim Cromie wrote:
> > Hi everyone,
> >
> > In v6.1 DRM_USE_DYNAMIC_DEBUG=y has a regression enabling drm.debug in
> > drivers at modprobe.
>
> I realize we haven't actually addressed the regression in any way yet,
On 2/2/23 21:07, Joshua Ashton wrote:
> Userspace has no way of controlling or knowing the pixel encoding
> currently, so there is no way for it to ever get the right values here.
>
> When we do add pixel_encoding control from userspace,we can pick the
> right value for the colorimetry packet b
On 2/3/23 07:59, Sebastian Wick wrote:
> On Fri, Feb 3, 2023 at 11:40 AM Ville Syrjälä
> wrote:
>>
>> On Fri, Feb 03, 2023 at 02:07:44AM +, Joshua Ashton wrote:
>>> Userspace has no way of controlling or knowing the pixel encoding
>>> currently, so there is no way for it to ever get the rig
On Fri, Feb 03, 2023 at 02:52:50PM +0100, Sebastian Wick wrote:
> On Fri, Feb 3, 2023 at 2:35 PM Ville Syrjälä
> wrote:
> >
> > On Fri, Feb 03, 2023 at 01:59:07PM +0100, Sebastian Wick wrote:
> > > On Fri, Feb 3, 2023 at 11:40 AM Ville Syrjälä
> > > wrote:
> > > >
> > > > On Fri, Feb 03, 2023 at
On Fri, Feb 3, 2023 at 2:35 PM Ville Syrjälä
wrote:
>
> On Fri, Feb 03, 2023 at 01:59:07PM +0100, Sebastian Wick wrote:
> > On Fri, Feb 3, 2023 at 11:40 AM Ville Syrjälä
> > wrote:
> > >
> > > On Fri, Feb 03, 2023 at 02:07:44AM +, Joshua Ashton wrote:
> > > > Userspace has no way of controlli
On Fri, Feb 03, 2023 at 01:59:07PM +0100, Sebastian Wick wrote:
> On Fri, Feb 3, 2023 at 11:40 AM Ville Syrjälä
> wrote:
> >
> > On Fri, Feb 03, 2023 at 02:07:44AM +, Joshua Ashton wrote:
> > > Userspace has no way of controlling or knowing the pixel encoding
> > > currently, so there is no wa
Nope, that is not related to any hw state.
It's simply not allowed to free up resources during suspend since those
can't be acquired again during resume.
We had a couple of cases now where this was wrong. If you get a warning
from that please fix the code which tried to free something during
Am 02.02.23 um 20:02 schrieb Bert Karwatzki:
I hope I got it right this time:
Here is the fix for
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2360
From 6e064c9565ef0da890f3fcb2a4f6a8cd44a12fdb Mon Sep 17 00:00:00 2001
From: Bert Karwatzki
Date: Thu, 2 Feb 2023 19:50:27 +0100
Subject:
On Fri, Feb 3, 2023 at 11:40 AM Ville Syrjälä
wrote:
>
> On Fri, Feb 03, 2023 at 02:07:44AM +, Joshua Ashton wrote:
> > Userspace has no way of controlling or knowing the pixel encoding
> > currently, so there is no way for it to ever get the right values here.
>
> That applies to a lot of the
On Fri, Feb 3, 2023 at 12:10 AM Bert Karwatzki wrote:
>
> I hope I got it right this time:
> Here is the fix for
> Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2360
>
> From 6e064c9565ef0da890f3fcb2a4f6a8cd44a12fdb Mon Sep 17 00:00:00 2001
> From: Bert Karwatzki
> Date: Thu, 2 Feb 2023 19
On Fri, Feb 03, 2023 at 02:07:44AM +, Joshua Ashton wrote:
> Userspace has no way of controlling or knowing the pixel encoding
> currently, so there is no way for it to ever get the right values here.
That applies to a lot of the other values as well (they are
explicitly RGB or YCC). The idea
On Wed, 25 Jan 2023, Jim Cromie wrote:
> Hi everyone,
>
> In v6.1 DRM_USE_DYNAMIC_DEBUG=y has a regression enabling drm.debug in
> drivers at modprobe.
I realize we haven't actually addressed the regression in any way yet,
and any distro enabling DYNAMIC_DEBUG || DYNAMIC_DEBUG_CORE will have
DRM_
Add missing GetPptLimit message mapping.
Signed-off-by: Evan Quan
Change-Id: Ic4edfa3153988721a6ee66dd69a1d4ca8a5ea45c
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
b/drivers/gpu/
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