[Public]
-Original Message-
From: Chen, Guchun
Sent: Friday, March 24, 2023 3:26 PM
To: Huang, Tim ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Ma, Li ; Du, Xiaojian
; Huang, Tim
Subject: RE: [PATCH] drm/amd/pm: re-enable the gfx imu when smu resume
>
[Public]
-Original Message-
From: Quan, Evan
Sent: Friday, March 24, 2023 3:17 PM
To: Huang, Tim ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Ma, Li ; Du, Xiaojian
; Huang, Tim
Subject: RE: [PATCH] drm/amd/pm: re-enable the gfx imu when smu resume
[AMD
[AMD Official Use Only - General]
The notifier block is embedded in smu context of a device. If there are 4
devices and 3 of them are interested, they register using the notifier block
within their smu context. Notifier is called in a chain and when received they
use the container_of to get
From: Le Ma
Hack the gc 9.0 reg offset for initial support
v2: squash in header switch (Alex)
Signed-off-by: Le Ma
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 471
From: Le Ma
Initialize gfxhub1.2 and mmhub1.8 function calls
Signed-off-by: Le Ma
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git
From: Hawking Zhang
Add GMC IP handling for GC 9.4.3
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
From: Le Ma
Hack the mmhub 1.7 reg offset for initial support
v2: squash in header switch, CG funcs (Alex)
Signed-off-by: Le Ma
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c | 477
Add GMC (Graphics Memory Controller) support for
GMC 9.4.3 which contains mmhub 1.8 and gfxhub
1.2. Patches 1-3, 6 are register headers which
are too big for the mailing list.
Hawking Zhang (6):
drm/amdgpu: add athub v1_8_0 ip headers
drm/amdgpu: add osssys v4_4_2 ip headers
drm/amdgpu:
From: Hawking Zhang
Initialize various gmc sw/hw settings/configurations
for GC 9.4.3.
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git
From: Hawking Zhang
Set family for GC 9.4.3
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
Add support for NBIO 7.9. The first patch is
just register headers and is too big for the
mailing list.
Hawking Zhang (3):
drm/amdgpu: add nbio v7_9_0 ip headers
drm/amdgpu: add nbio v7_9 support
drm/amdgpu: init nbio v7_9 callbacks
drivers/gpu/drm/amd/amdgpu/Makefile | 3
From: Hawking Zhang
v7_9 is a new nbio generation ip.
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile| 3 +-
drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c | 369 +
From: Hawking Zhang
switch to the new nbio generation for NBIO 7.9.0.
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 5 +
1 file changed, 5 insertions(+)
diff --git
On Tue, Mar 21, 2023 at 5:33 AM Thomas Zimmermann wrote:
>
> Hi
>
> Am 20.03.23 um 16:23 schrieb Alex Deucher:
> > On Mon, Mar 20, 2023 at 11:19 AM Thomas Zimmermann
> > wrote:
> >>
> >> Hi
> >>
> >> Am 20.03.23 um 16:11 schrieb Christian König:
> >>> Am 17.03.23 um 10:20 schrieb Thomas
[AMD Official Use Only - General]
Hi Rodrigo and Harry,
There was a typo in the third line of the pseudo-patch I wrote in the previous
email. Here is the fixed version:
#define DP_EDP_GENERAL_CAP_20x703
# define DP_EDP_OVERDRIVE_ENGINE_ENABLED (1 << 0)
+# define
On 3/24/23 14:19, Markus Elfring wrote:
May longer identifiers (or even the complete SHA-1 ID) occasionally also
be tolerated for the tag “Fixes”?
How do you think about the proposed change possibilities?
Well, the hash length is restricted by convention (see
./scripts/checkpatch.pl in the
>> The label “cleanup” was used to jump to another pointer check despite of
>> the detail in the implementation of the function
>> “dm_validate_stream_and_context”
>> that it was determined already that corresponding variables contained
>> still null pointers.
>>
>> 1. Thus return directly if
>>
[AMD Official Use Only - General]
> -Original Message-
> From: Lazar, Lijo
> Sent: Thursday, March 23, 2023 21:29
> To: Limonciello, Mario ; Yang, WenYou
> ; Deucher, Alexander
> ; Koenig, Christian
> ; Pan, Xinhui
> Cc: Li, Ying ; Liu, Kun ; Liang,
> Richard qi ;
Hi Markus,
On 3/24/23 11:42, Markus Elfring wrote:
Date: Sat, 18 Mar 2023 16:21:32 +0100
The label “cleanup” was used to jump to another pointer check despite of
the detail in the implementation of the function
“dm_validate_stream_and_context”
that it was determined already that corresponding
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: e5dbf24e8b9e6aa0a185d86ce46a7a9c79ebb40f Add linux-next specific
files for 20230324
Warning reports:
https://lore.kernel.org/oe-kbuild-all/202303011456.wepem0zn-...@intel.com
https
Hi,
On 23/03/2023 23:34, kernel test robot wrote:
> tree/branch:
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
> branch HEAD: 7c4a254d78f89546d0e74a40617ef24c6151c8d1 Add linux-next
> specific files for 20230323
>
> Error/Warning reports:
>
>
Date: Sat, 18 Mar 2023 16:21:32 +0100
The label “cleanup” was used to jump to another pointer check despite of
the detail in the implementation of the function
“dm_validate_stream_and_context”
that it was determined already that corresponding variables contained
still null pointers.
1. Thus
Am 23.03.23 um 20:05 schrieb Mikhail Gavrilov:
On Tue, Mar 21, 2023 at 11:47 PM Christian König
wrote:
Hi Mikhail,
That looks like a reference counting issue to me.
I'm going to take a look, but we have already fixed one of those recently.
Probably best that you try this on drm-fixes, just
On Thu, Mar 23, 2023 at 12:19:39PM -0400, Alex Deucher wrote:
> Hi Dave, Daniel,
>
> Fixes for 6.3.
>
> The following changes since commit e8d018dd0257f744ca50a729e3d042cf2ec9da65:
>
> Linux 6.3-rc3 (2023-03-19 13:27:55 -0700)
>
> are available in the Git repository at:
>
>
> -Original Message-
> From: amd-gfx On Behalf Of Tim
> Huang
> Sent: Friday, March 24, 2023 3:08 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Zhang, Yifan
> ; Ma, Li ; Du, Xiaojian
> ; Huang, Tim
> Subject: [PATCH] drm/amd/pm: re-enable the gfx imu when smu
[AMD Official Use Only - General]
> -Original Message-
> From: amd-gfx On Behalf Of Tim
> Huang
> Sent: Friday, March 24, 2023 3:08 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Zhang, Yifan
> ; Ma, Li ; Du, Xiaojian
> ; Huang, Tim
> Subject: [PATCH] drm/amd/pm:
If the gfx imu is poweroff when suspend, then
it need to be re-enabled when resume.
Signed-off-by: Tim Huang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 40 ---
1 file changed, 28 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
[AMD Official Use Only - General]
> -Original Message-
> From: Yuan, Perry
> Sent: Thursday, March 23, 2023 10:21 AM
> To: Yang, WenYou ; Deucher, Alexander
> ; Koenig, Christian
> ; Pan, Xinhui
> Cc: Liang, Richard qi ; Li, Ying
> ; Liu, Kun ; amd-
> g...@lists.freedesktop.org; Yang,
From: Aric Cyr
This DC version brings along:
- Enable FPO optimization
- Support for 6.75 GBps link rate
- Fixes to underflow, black screen and more
Acked-by: Qingqing Zhuo
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Anthony Koo
- New parameter to define extra vblank stretch required when
doing FPO + Vactive
- Pass in pipe index for FPO
Reviewed-by: Alvin Lee
Acked-by: Qingqing Zhuo
Signed-off-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 14 +++---
1 file changed,
From: Alvin Lee
[Description]
Assign the correct info now that FW headers are promoted
Acked-by: Qingqing Zhuo
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git
From: Peichen Huang
[Why]
Some dock and mst monitor don't like to receive ClearPayloadIdTable
when mst_en is set to 0. And it doesn't make sense to do so in source
side, either.
[How]
Not send ClearyPayloadIdTable if mst_en is 0
Reviewed-by: George Shen
Acked-by: Qingqing Zhuo
Signed-off-by:
From: Alvin Lee
[Description]
Enable optimization for preferring FPO if it achieves
a lower voltage level
Reviewed-by: George Shen
Acked-by: Qingqing Zhuo
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c | 2 +-
From: Alvin Lee
[Description]
If transitioning from an FPO config -> FPO config, we want
to keep cursor P-State force disallowed. Any other transition
from FPO config -> non FPO config should unforce the cursor
P-State disallow
Reviewed-by: Wesley Chalmers
Acked-by: Qingqing Zhuo
From: Artem Grishin
[Why]
The 6.75 GBps link rate is part of the new eDP specification
version 1.5 is going to be supported in the future.
Since this standard is very new and there are no existing 6.75 GBps
panels on the market yet, we should put a condition in the driver
on enabling this
From: Alvin Lee
[Description]
* Pass in pipe index for FPO cmd to DMCUB
- This change will pass in the pipe index for each stream
that is using FPO
- This change is in preparation to enable FPO + VActive
* Use per pipe P-State force for FPO
- For FPO, instead of using max watermarks value
From: Artem Grishin
[Why]
The latest eDP spec version 1.5 defines a new generic link
rate of 6.75 Gbps/Lane, which needs to be supported in the driver.
[How]
Added new element to the dc_link_rate enum
Reviewed-by: Charlene Liu
Acked-by: Qingqing Zhuo
Signed-off-by: Artem Grishin
---
From: Ayush Gupta
[Why]
Observing underflow on dcn30+ system config at 4k144hz
[How]
We set the UCLK hardmax on AC/DC switch if softmax is enabled
and also on boot. While booting up the UCLK Hardmax is set
to softmax before the init sequence and the init sequence
resets the hardmax to UCLK max
As part of the FAMS work, we need code infrastructure in DC.
dcn30_fpu.c changes went missing during previous upstream
activity.
Reviewed-by: Rodrigo Siqueira
Acked-by: Qingqing Zhuo
Signed-off-by: Qingqing Zhuo
---
.../drm/amd/display/dc/dml/dcn30/dcn30_fpu.c | 53 ---
1
From: Taimur Hassan
[Why & How]
Needed to get certain EDID to light up during TMDS compliance.
Reviewed-by: Charlene Liu
Acked-by: Qingqing Zhuo
Signed-off-by: Taimur Hassan
---
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Dmytro Laktyushkin
[Why & How]
w/a for dcn315 inconsistent smu clock.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Qingqing Zhuo
Signed-off-by: Dmytro Laktyushkin
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c | 5 +
1 file changed, 5 insertions(+)
diff --git
From: Charlene Liu
[why]
HW delta follow up
Reviewed-by: Chris Park
Reviewed-by: Jun Lei
Reviewed-by: Jerry Zuo
Acked-by: Qingqing Zhuo
Signed-off-by: Charlene Liu
---
.../amd/display/dc/dcn32/dcn32_dio_stream_encoder.c | 10 +-
From: Martin Leung
[Why & How]
when trying to fix a nullptr dereference on VMs,
accidentally doubly allocated memory for the non VM
case. removed the extra link_srv creation since
dc_construct_ctx is called in both VM and non VM cases
Also added a proper fail check for if kzalloc fails
Cc:
From: Alvin Lee
[Descrtipion]
- Driver hardcoded FCLK P-State latency was incorrect
- Use the value provided by PMFW header instead
Reviewed-by: Nevenko Stupar
Reviewed-by: Jun Lei
Acked-by: Qingqing Zhuo
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 2
From: Nicholas Kazlauskas
[Why]
DPP Root clock optimization when combined with 4to1 MPC combine results
in the screen turning black.
This is because the DPPCLK is stopped during the middle of an
optimize_bandwidth sequence during commit_minimal_transition without
going through plane power
From: Alvin Lee
[Description]
- On high refresh rate DRR displays that support VBLANK naturally,
UCLK could be idling at DPM1 instead of DPM0 since it doesn't use
FPO
- To achieve DPM0, enable FPO on these configs even though it can
support P-State without FPO
- Default disable for now,
From: Nicholas Kazlauskas
[Why]
While scanning the top_pipe connections we can run into a case where
the bottom pipe is still connected to a top_pipe but with a NULL
plane_state.
[How]
Treat a NULL plane_state the same as the plane being invisible for
pipe cursor disable logic.
Cc:
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
- Enable FPO optimization
- Support for 6.75 GBps link rate
- Fixes to underflow, black screen and more
Cc: Daniel Wheeler
---
Alvin Lee (6):
drm/amd/display: Enable FPO for configs that could reduce vlevel
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