tested-by: jingwen chen
Signed-off-by: Monk Liu
Signed-off-by: jingwen chen
---
drivers/gpu/drm/scheduler/sched_main.c | 24
1 file changed, 4 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
n)
tested-by: jingwen
Signed-off-by: Monk Liu
---
drivers/gpu/drm/scheduler/sched_main.c | 26 +-
1 file changed, 9 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index a2a9536..3e0b
tested-by: jingwen chen
Signed-off-by: Monk Liu
Signed-off-by: jingwen chen
---
drivers/gpu/drm/scheduler/sched_main.c | 24
1 file changed, 4 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
scheduler in job_timeout to serial the handling
of scheduler and job_timeout.
2)drop the bad job's del and insert in scheduler due to above serialization
(no race issue anymore with the serialization)
tested-by: jingwen
Signed-off-by: Monk Liu
---
drivers/gpu/drm/scheduler/sched_m
scheduler in job_timeout to serial the handling
of scheduler and job_timeout.
2)drop the bad job's del and insert in scheduler due to above serialization
(no race issue anymore with the serialization)
Signed-off-by: Monk Liu
---
drivers/gpu/drm/scheduler/sched_main.c | 25 ++---
1 fi
a previous job signaled.
v2:
further cleanup the logic, and do the TDR timer cancelling if the signaled job
is the last one in its scheduler.
Signed-off-by: Monk Liu
---
drivers/gpu/drm/scheduler/sched_main.c | 29 -
1 file changed, 20 insertions(+), 9 deletions
a previous job signaled.
Signed-off-by: Monk Liu
---
drivers/gpu/drm/scheduler/sched_main.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index a2a9536..fb27025 100644
--- a/drivers/gpu/drm
(the config like HQD addr, ring size, is easily changed if we alter
the sched_hw_submission)
the fix is we must inactive KIQ first before touching any
of its registgers
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu
hypervisor driver to set this paramter
automatically thus no need for user to configure it through
modprobe in virtual machine
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
configuration (the config
like HQD addr, ring size, is easily changed if we alter
the sched_hw_submission)
the fix is we must inactive KIQ first before touching any
of its registgers
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +++
1 file changed, 3 insertions
to configure it through
modprobe in virtual machine
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 4 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c| 52
to configure it through
modprobe in virtual machine
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 4 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c| 52
affects gfx 8/9/10
v2:
refine namings
v3:
choose queues for each ring to that try best to cross pipes evenly.
TODO:
in the future we will let hypervisor driver to set this paramter
automatically thus no need for user to configure it through
modprobe in virtual machine
Signed-off-by: Monk Liu
:
this paramter only affects gfx 8/9/10
TODO:
in the future we will let hypervisor driver to set this paramter
automatically thus no need for user to configure it through
modprobe in virtual machine
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd
what:
KCQ cost many clocks during world switch which impacts a lot to multi-VF
performance
how:
introduce a paramter to control the number of KCQ to avoid performance
drop if there is no KQC needed
notes:
this paramter only affects gfx 8/9/10
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd
the delayed_init routine at the bottom of device_init
to avoid driver loading done prior to the IB test completes
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd
:
make IB test synchronize with driver init thus it won't still running
when we shutdown the VM.
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 29 -
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
still need to call system_enable_features for one vf mode
but need to block the SMU request from SRIOV case and allows
the software side change pass in "smu_v11_0_system_features_control"
by this patlch the pp_dpm_mclk/sclk now shows correct output
Signed-off-by: Monk Liu
Singed-off
to 5s to satisfy WHOLE GPU reset which need 3+ seconds to
finish
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h | 2 +-
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h
b
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 3d601d5..810141f 100644
--- a/drivers/gpu/drm/amd/amdgpu
because nv12 SRIOV support one vf mode
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 995bdec..9c42316 100644
--- a/drivers/gpu/drm/amd
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 8a579ce..909ef08 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers
for MI100 + ASICS, we always support SW_SMU for bare-metal
and for SRIOV one_vf_mode
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
b/drivers/gpu
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/soc15_common.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index c893c64..56d02aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
+++ b
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 48 --
1 file changed, 28 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 49e2e43..c762deb 100644
--- a/drivers
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 12 +++-
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 6 +++-
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 49 +-
3 files changed, 52 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 88b4e56..2bb1e0c 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 0afd610..b4b0242 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu
1) drop the headers from AI in mxgpu_nv.c, should refer to mxgpu_nv.h
2) the IDH_EVENT_MAX is not used and not aligned with host side
so drop it
3) the IDH_TEXT_MESSAG was provided in host but not defined in guest
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h | 3
r the adev->virt.ops all settle done, and the perfect place is in
amdgpu_discovery_reg_base_init()
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 16
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 10 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_
new idh_request and ihd_event to prepare for the
new handshake protocol implementation later
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h
b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h
by this new handshake host side can prepare vbios/ip-discovery
and pf exchange data upon recieving this request without
stopping world switch.
this way the world switch is less impacted by VF's exclusive mode
request
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 19
if host support new handshake we only need to enter
fullaccess_mode in ip_init() part, otherwise we need
to do it before reading vbios (becuase host prepares vbios
for VF only after received REQ_GPU_INIT event under
legacy handshake)
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu
isters.
HW team confirm us all MAILBOX registers will be at the same
offset for all ASICs, no IP discovery needed for those registers
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 52 +++
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h | 18 ++-
1) modify xgpu_nv_send_access_requests to support
new idh request
2) introduce new function: req_gpu_init_data() which
is used to notify host to prepare vbios/ip-discovery/pfvf exchange
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 13 +
drivers/gpu/drm/amd
those two headers are not needed for ip discovery
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 27d8ae1..37e1fcf
1) SRIOV guest KMD doesn't care training buffer
2) if we resered training buffer that will overlap with IP discovery
reservation because training buffer is at vram_size - 0x8000 and
IP discovery is at ()vram_size - 0x1 => vram_size -1)
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amd
).
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 33 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 6
drivers/gpu/
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index f0128f7..0a95b13 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b
what changed:
1)provide new implementation interface for the rlcg access path
2)put SQ_CMD/SQ_IND_INDEX to GFX9 RLCG path to let debugfs's reg_op
function can access reg that need RLCG path help
now even debugfs's reg_op can used to dump wave.
tested-by: Monk Liu
tested-by: Zhou pengju
Signed
we can let RLCG
to serve the register access even through UMR (via debugfs interface)
the current implementation cannot achieve that goal because it can only
hardcode everywhere, but UMR only pass "offset" as varable to driver
tested-by: Monk Liu
tested-by: Zhou pengju
Signed-off-by: Z
switch to new RLCG access path, and drop the legacy
WREG32_RLC macros
tested-by: Monk Liu
tested-by: Zhou pengju
Signed-off-by: Zhou pengju
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 30 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 5
we can let RLCG
to serve the register access even through UMR (via debugfs interface)
the current implementation cannot achieve that goal because it can only
hardcode everywhere, but UMR only pass "offset" as varable to driver
tested-by: Monk Liu
tested-by: Zhou pengju
Signed-off-by: Z
switch to new RLCG access path, and drop the legacy
WREG32_RLC macros
tested-by: Monk Liu
tested-by: Zhou pengju
Signed-off-by: Zhou pengju
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 30 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 5
and disable MC resum in VCN2.0 as well
those are not concerned by VF driver
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm/amd/amdgpu
one dec ring and one enc ring
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 231 +-
1 file changed, 228 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index c387c81
this a patch that port from SRIOV project branch
to fix those IB/RING test fail on VCN 2.0 rings
Signed-off-by: Darlington Opara
Signed-off-by: Jiange Zhao
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 3 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
will not be able for GFX pipe 0. That’s
why I skip setting of state for gfx pipe 1 as decided by all driver
team
fix:
since CP team won't help us to debug any issues that related with
gfx pipe1, so based on above reason, let's skip gfx ring 1 (pipe1)
even for both bare-metal and SRIOV
Signed-off-by: Monk
,
GFX IB test is a runtime work, so it is forbidden
to use scrach_reg0/1/2/3 during IB test period
note:
Although we can only have this change for SRIOV, but
looks it doesn't worth the effort to differentiate
bare-metal with SRIOV on the GFX ib test
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd
1)for gfx IB test we shouldn't insert DE meta data
2)we should make sure IB test finished before we
send event 3 to hypervisor otherwise the IDLE from
event 3 will preempt IB test, which is not designed
as a compatible structure for MCBP
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu
for bare-metal we alawys need to load sys/sos/kdb
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 3494966..51839ab
switch bug.
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 8
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index
ucode under SRIOV, otherwise PSP would report
error
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu
fix system memory leak regression introduced
by this previous change of 201331 - Single VF Mode Test
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
b
Signed-off-by: Monk Liu
---
src/lib/umr_read_pm4_stream.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/lib/umr_read_pm4_stream.c b/src/lib/umr_read_pm4_stream.c
index 60bea49..317b638 100644
--- a/src/lib/umr_read_pm4_stream.c
+++ b/src/lib/umr_read_pm4_stream.c
@@ -325,6 +325,9
Signed-off-by: Monk Liu
---
src/lib/umr_read_pm4_stream.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/lib/umr_read_pm4_stream.c b/src/lib/umr_read_pm4_stream.c
index 60bea49..317b638 100644
--- a/src/lib/umr_read_pm4_stream.c
+++ b/src/lib/umr_read_pm4_stream.c
@@ -325,6 +325,9
interrupt.
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
index 0d8767e..1c3a7d4 100644
--- a/drivers/gpu/drm/amd/amdgpu
KIQ way to do register
access and stuck there, because KIQ probably won't work by that time
(e.g. you already made GFX hang)
so the best way right now is to simply remove it.
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 --
1 file changed, 2 deletions(-)
diff --git
to block this sequence:
if we do pre_reset() before VF FLR, it would go KIQ way to do register
access and stuck there, because KIQ probably won't work by that time
(e.g. you already made GFX hang)
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 --
drivers/gpu/drm/amd
still need to init csb even for SRIOV
v2:
drop init_pg() for gfx10 at all since
PG and GFX off feature will be fully controled
by RLC and SMU fw for gfx10
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 38 ++
1 file changed, 11 insertions
To align with the scheme from gfx9
disabling GFX ring after VM shutdown could avoid
garbage data be fetched to GFX RB which may lead
to unnecessary screw up on GFX
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu
still need to init csb even for SRIOV
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 74edfd9..230e8af 100644
To align with the scheme from gfx9:
without disabling gfx ring in hw_fini we would
hit GFX hang if a guest VM is destroyed suddenly
when running a game
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd
of gfx7/8 as well
v3:
use bo_create_kernel instead of bo_create_reserved for CSB
otherwise the bo_free_kernel() on CSB is not aligned and
would led to its internal reserve pending there forever
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c | 10 +-
drivers/gpu/drm/amd
of gfx7/8 as well
remove all those useless code for gfx9/10
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c | 8 -
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 58 +
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 ++
drivers/gpu/drm/amd/amdgpu
of gfx7/8 as well
remove all those useless code for gfx9/10
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c | 8 -
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 58 +
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 ++
drivers/gpu/drm/amd/amdgpu
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 80 +-
1 file changed, 41 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 879c0a1..a56cba9 100644
--- a/drivers
kernel would report a warning on double unpin
on the csb BO because we unpin it during hw_fini
but actually we don't need to pin/unpin it during
hw_init/fini since it is created with kernel pinned
remove all those useless code for gfx9/10
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu
otherwse the flush_gpu_tlb will hang if we unload the
KMD becuase the schedulers already stopped
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd
still need to init csb even for SRIOV
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4d6df35..879c0a1 100644
since we don't have RLCG ucode loading and no SRlist as well
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 96a6b00
other client's access on
the same page, thus the deadlock could be avoided
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 1 +
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++
drivers/gpu/drm/amd/amdgpu/umc_v6_0.c | 37
other client's access on
the same page, thus the deadlock could be avoided
Signed-off-by: Monk Liu
Change-Id: Iaf6eb2a20a4785ec8440e64d5e0cae67aa0603da
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu
for SOC15/vega10 the BACO reset & mode1 would introduce vram lost
in high end address range, current kmd's vram lost checking cannot
catch it since it only check very ahead visible frame buffer
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm
for SOC15/vega10 the BACO reset would introduce vram lost in
the high end address range and current kmd's vram lost
checking cannot catch it since it only check visible frame buffer
TODO:
to confirm if mode1/2 reset would introduce vram lost
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd
since it is needed by bare-metal
v3:
drop the change in reinit_early_sriov, just clear all block's status.hw
in the head place and set the status.hw after hw_init done is enough
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 59 +++---
1 file
since it is needed by bare-metal
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 77 +++---
1 file changed, 48 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
previously the ucode loading of PSP was repreated, one executed in
phase_1 init/re-init/resume and the other in fw_loading routine
Avoid this double loading by clearing ip_blocks.status.hw in suspend or reset
prior to the FW loading and any block's hw_init/resume
Signed-off-by: Monk Liu
registers should also be skipped
for VEGA10 SRIOV.
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 --
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 45 --
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 13 -
drivers/gpu/drm/amd/amdgpu
for SRIOV the SOS fw of PSP is loaded in hypervisor thus
guest won't tell the version of it, and judging feature by
reading the sos fw version in guest side is completely wrong
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
don't commit sdma vm job if no updates needed and free
the ib
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
It's incorrect to do soft reset for SRIOV, when GFX
hang the WREG would stuck there becuase it goes KIQ way.
the GPU reset counter is incorrect: always increase twice
for each timedout
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 2 +-
1 file changed, 1 insertion
uot; would hit out of bound array accessing
bug
Signed-off-by: Monk Liu
---
drivers/gpu/drm/ttm/ttm_bo.c | 2 ++
drivers/gpu/drm/ttm/ttm_memory.c | 8
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index c7de667..6434
only report once per TMO job and the timer would
be restarted upon the job finished if it's just slow.
Suggested-by: Christian König
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c| 12 +++-
include/drm/gpu_scheduler.h| 1 +
3 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
we don't need duplicated IB's timeout error message reported endlessly,
just one report per timedout IB is enough
Signed-off-by: Monk Liu
---
drivers/gpu/drm/scheduler/sched_main.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm
should use amdgpu_bo_map, otherwise you'll hit NULL
pointer bug if with amdgpu_bo_kptr
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
b/drivers/gpu/drm/amd
Signed-off-by: Monk Liu
---
drivers/gpu/drm/drm_mm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 3cc5fbd..369fd9b 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -318,6 +318,8 @@ static struct drm_mm_node
r come back, with this patch this issue
could be avoided.
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 16 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 14 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 3 +--
3 files changed, 10 insertions(+),
use a flag to hold need_flush and need_pipe_sync
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 14 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 6
and differentiate it with explicit_bo flag
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 7 +--
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
b/drivers/gpu
register
don't test if NOTIFY_CMPL event in rcv_msg since it won't
recieve that message anymore
Change-Id: I17df8b4490a5b53a1cc2bd6c8f9bc3ee14c23f1a
Signed-off-by: Monk Liu <monk@amd.com>
---
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 196 ++
drivers/gpu/drm/amd/amd
de after we received
FLR_NOTIFY from host side, this can prevent innocent app wrongly succesed
to open amdgpu dri device.
FLR_NOFITY is received due to an IDLE hang detected from hypervisor side
which indicating GPU is already die in this VF.
Change-Id: I17df8b4490a5b53a1cc2bd6c8f9bc3ee14c23f1a
Sig
mailbox register can be accessed with a byte boundry according
to BIF team, so this patch prepares register byte access
and will be used by following patches
Change-Id: I1e84f1c6e8e75dc42eb5be09c492fa5e7eb7502a
Signed-off-by: Monk Liu <monk@amd.com>
---
drivers/gpu/drm/amd/amdgpu/am
de after we received
FLR_NOTIFY from host side, this can prevent innocent app wrongly succesed
to open amdgpu dri device.
FLR_NOFITY is received due to an IDLE hang detected from hypervisor side
which indicating GPU is already die in this VF.
Change-Id: I17df8b4490a5b53a1cc2bd6c8f9bc3ee14c23f1a
Sig
Change-Id: If6a979ba9fd6c923b82212f35f07a9ff31c86767
Signed-off-by: Monk Liu <monk@amd.com>
---
drivers/dma-buf/reservation.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c
index 314eb10..29b7e45
to catch error that may schedule in atomic context early on
Change-Id: I49dec7c55470011729b7fa7d3e1ecfe1f38ed89f
Signed-off-by: Monk Liu <monk@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/
mailbox register can be accessed with a byte boundry according
to BIF team, so this patch prepares register byte access
and will be used by following patches
Change-Id: I1e84f1c6e8e75dc42eb5be09c492fa5e7eb7502a
Signed-off-by: Monk Liu <monk@amd.com>
---
drivers/gpu/drm/amd/amdgpu/am
Change-Id: If6a979ba9fd6c923b82212f35f07a9ff31c86767
Signed-off-by: Monk Liu <monk@amd.com>
---
drivers/dma-buf/reservation.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c
index 375de41..9b875267
bo_do_create will unreserve in in the end if @resv
is NULL, which cause the following bo_create_shadow
run without lock held on @resv
Change-Id: Iaad24b8aea60522f25188874ab9d5c5f13f1a941
Signed-off-by: Monk Liu <monk@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 ++
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