[PATCH 2/2] drm/amdgpu/psp: Fix can't detect psp INVOKE command failed

There isn't ucode when executing INVOKE command, so current code can't check the failure of INVOKE command. Remove the ucode check. Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers

[PATCH 1/2] drm/amdgpu/psp: Fix to get wrong xgmi session id

xGMI session id should get from response buffer, correct it. Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 8fab0d6..2f126ea7

[PATCH 2/3] drm/amdgpu/psp: Add support VMR ring for VF

PSP only support VMR ring for SRIOV vf since v45 and all commands will be send to VMR ring for executing. VMR ring use C2PMSG 101 ~ 103 instead of C2PMSG 64 ~ 71. Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 18 +-- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 1

[PATCH 3/3] drm/amdgpu/psp: Destroy psp ring when doing gpu reset

PSP ring need to be destroy before starting reinit for vf. This patche move it from hypervisor driver into guest. Signed-off-by: Xiangliang Yu Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu

[PATCH 1/3] drm/amdgpu/psp: Get psp fw version through reading register

If PSP FW is running already, driver will not load PSP FW again and skip it. So psp fw version is not correct if reading it from FW binary file, need to get right version from register. Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 4 +++- 1 file changed, 3

[PATCH 2/2] drm/amdgpu: Exclude MM engines for vega20 virtual device

From: Frank Min Temporary disable UVD/VCE block if is virtual device Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/soc15.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm

[PATCH 1/2] drm/amdgpu: add vega20 sriov capability detection

From: Frank Min Add sriov capability detection for vega20, then can check if device is virtual device. Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 15 +-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers

[PATCH] drm/amdgpu/gfx8: Fix compute ring failure after resetting

Do ring clear before ring test, otherwise compute ring test will fail after gpu resetting. Signed-off-by: Xiangliang.Yu --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git

[PATCH] drm/amdgpu: fix kernel hang when starting VNC server

After starting VNC server or running CTS test, kernel will hang and can see below call trace: [961816] INFO: task khugepaged:42 blocked for more than 120 seconds. [968581] Tainted: G OE 4.13.0 #1 [973495] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this

[PATCH] drm/amdgpu: Fix driver reloading failure

SRIOV doesn't implement PMC capability of PCIe, so it can't update power state by reading PMC register. Currently, amdgpu driver doesn't disable pci device when removing driver, the enable_cnt of pci device will not be decrease to 0. When reloading driver, pci_enable_device will do nothing as

[PATCH] drm/amdgpu/vce4: remove interrupt mask clearance for SRIOV

For SRIOV, the clearance has been moved to firmware. So don't need it any more. Signed-off-by: Xiangliang.Yu --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

[PATCH 1/2] drm/amdgpu/sdma3: Enable sdma wptr polling for SRIOV

When hypervisor triggering FLR for one of VFs, need to enable sdma wptr polling to avoid missing wptr update if enabling doorbell. Signed-off-by: Xiangliang.Yu --- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 17 - 1 file changed, 16 insertions(+), 1

[PATCH 1/1] drm/ttm: Fix accounting error when fail to get pages for pool

When fail to get needed page for pool, need to put allocated pages into pool. But current code has a miscalculation of allocated pages, correct it. Signed-off-by: Xiangliang.Yu --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[PATCH 5/8] drm/amdgpu: According hardware design revert vce and uvd doorbell assignment

From: Frank Min Now uvd doorbell is from 0xf8-0xfb and vce doorbell is from 0xfc-0xff Signed-off-by: Frank Min Signed-off-by: Xiangliang.Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 18 +-

[PATCH 3/8] drm/amdgpu/vce4: Remove vce interrupt enable related code for sriov

From: Frank Min Interrupt enable is contained in vce init table and this register could not be accessed in secure ASICs, so just remove it. Signed-off-by: Frank Min Signed-off-by: Xiangliang.Yu ---

[PATCH] drm/amdgpu/dce_virtual: remove error message for vega10

Vega10 also support virtual display, remove the error message. Signed-off-by: Xiangliang.Yu --- drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c

[PATCH 8/8] drm/amdgpu/sdma4: Enable sdma poll mem addr on vega10 for SRIOV

From: Frank Min While doing flr on VFs, there is possibility to lost the doorbell writing for sdma, so enable poll mem for sdma, then sdma fw would check the pollmem holding wptr. Signed-off-by: Frank Min Signed-off-by: Xiangliang.Yu

[PATCH 4/8] drm/amdgpu: Skip uvd and vce ring test for SRIOV

From: Frank Min Since rptr would not be accessed on later secure asics in sriov, remove the ring test. Signed-off-by: Frank Min Signed-off-by: Xiangliang.Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 4 ++--

[PATCH 7/8] drm/amdgpu/uvd7: optimize uvd initialization sequence for SRIOV

From: Frank Min 1.Since in sriov there is no need of decoding, so skip the related code; 2.Vcpu boot up and umc enable need to take at the end of the init sequence; Signed-off-by: Frank Min Signed-off-by: Xiangliang.Yu ---

[PATCH 6/8] drm/amdgpu/vce4: optimize vce 4.0 init table sequence for SRIOV

From: Frank Min Optimize init table sequence for sriov. Signed-off-by: Frank Min Signed-off-by: Xiangliang.Yu --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH 2/8] drm/amdgpu: Enable uvd and vce gpu re-init for SRIOV gpu reset

From: Frank Min Add uvd and vce re-init after gpu reset. Signed-off-by: Frank Min Signed-off-by: Xiangliang.Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 3 +--

[PATCH 1/8] drm/amdgpu: Clear vce ring wptr for SRIOV

From: Frank Min MMSCH FW need to get the wptr from 0 after it get the mailbox request from driver, since every time kick the mailbox, mmsch thinks that it is the first time engine start to initialize. Signed-off-by: Frank Min Signed-off-by: Xiangliang.Yu

[PATCH] drm/amdgpu: reduce the time of reading VBIOS

From: Xiangliang Yu <xiangliang...@amd.com> Change ioremap mode from noncache to write combine and it will reduce the read vbios time from 188ms to 8ms. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Xiangliang.Yu <xiangliang...@amd.com> --- drivers/

[PATCH] drm/amdgpu: correct clock info for SRIOV

amdgpu default clk value for SRIOV and non-dpm cases. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/

[PATCH 4/6] drm/amdgpu/psp: Do not load asd for SRIOV

If psp version doesn't match asd version, asd loading will be failed. Add workaround to bypass it for sriov. Signed-off-by: Daniel Wang <daniel.wa...@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 7 +++ 1 fil

[PATCH 6/6] drm/amdgpu: clean doorbell after sending init table to mmsch

From: Frank Min <frank@amd.com> According to HW design, need to clean doorbell after setup MMSCH table. Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 1 + drivers/gpu/drm/amd

[PATCH 5/6] drm/amdgpu/virt: change AI ack-irq message to debug level

Change message to debug level as VI does. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c

[PATCH 1/6] drm/amdgpu: fix mutex list null pointer reference

From: Pixel Ding <pixel.d...@amd.com> Fix NULL pointer reference. Signed-off-by: Pixel Ding <pixel.d...@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff -

[PATCH 03/11] drm/amdgpu/psp: skip loading SDMA/RLCG under SRIOV VF

From: Daniel Wang <daniel.wa...@amd.com> Now GPU hypervisor will load SDMA and RLCG ucode, so skip it in guest. Signed-off-by: Daniel Wang <daniel.wa...@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 6 ++

[PATCH 11/11] drm/amdgpu/uvd7: add UVD hw init sequences for sriov

From: Frank Min <frank@amd.com> Add UVD hw init. Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 92 --- 1 file changed, 54 insertions(+), 38

[PATCH 04/11] drm/amdgpu/vce4: fix a PSP loading VCE issue

From: Daniel Wang <daniel.wa...@amd.com> Fixed PSP loading issue for sriov. Signed-off-by: Daniel Wang <daniel.wa...@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 18 +++--- 1 file changed, 15 insertio

[PATCH 10/11] drm/amdgpu/uvd7: add uvd doorbell initialization for sriov

From: Frank Min <frank@amd.com> Add UVD doorbell for SRIOV. Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 19 +++ 1 file changed, 19 insertions(+) diff --git

[PATCH 06/11] drm/amdgpu/soc15: enable UVD code path for sriov

From: Frank Min <frank@amd.com> Enable UVD block for SRIOV. Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/soc15.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/d

[PATCH 09/11] drm/amdgpu/uvd7: add sriov uvd initialization sequences

From: Frank Min <frank@amd.com> Add UVD initialization for SRIOV. Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 246 ++ 1 file changed, 246 i

[PATCH 08/11] drm/amdgpu/vce4: replaced with virt_alloc_mm_table

Used virt_alloc_mm_table function to allocate MM table memory. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 20 +++- 1 file changed, 3 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/d

[PATCH 07/11] drm/amdgpu/virt: add two functions for MM table

Add two functions to allocate & free MM table memory. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 46 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++ 2 files changed, 48 insertions(+) diff --git

[PATCH 05/11] drm/amdgpu/vce4: move mm table constructions functions into mmsch header file

From: Frank Min <frank@amd.com> Move mm table construction functions into mmsch header file so that UVD can reuse it. Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu

[PATCH 00/11] Enable UVD and PSP loading for SRIOV

/soc15: enable UVD code path for sriov drm/amdgpu/uvd7: add sriov uvd initialization sequences drm/amdgpu/uvd7: add uvd doorbell initialization for sriov drm/amdgpu/uvd7: add UVD hw init sequences for sriov Xiangliang Yu (4): drm/amdgpu/virt: bypass cg and pg setting for SRIOV drm/amdgpu

[PATCH 01/11] drm/amdgpu/virt: bypass cg and pg setting for SRIOV

GPU hypervisor cover all settings of CG and PG, so guest doesn't need to do anything. Bypass it. Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 ++ 1 file changed, 2 insertions(+)

[PATCH 02/11] drm/amdgpu/virt: change the place of virt_init_setting

Change place of virt_init_setting function so that can cover the cg and pg flags configuration. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/soc15.c | 10 +- drivers/gpu/drm/amd/amdgpu/vi.c| 10 +- 2 files changed, 10 insertions(

[PATCH 1/2] drm/amdgpu/mmhub_v1: bypass clockgating setting

For SRIOV doesn't need CG, so bypass it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c index 6

[PATCH 2/2] drm/amdgpu/gfx9: bypass clockgating setting

For SRIOV doesn't need clockgating, bypass it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index f

[PATCH 2/3] drm/amdgpu/vce4: workaround VCE ring test slow issue

Add VCE ring test slow workaround for SRIOV. Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/dr

[PATCH 3/3] drm/amdgpu/vce4: enable ring & ib test for sriov

Now VCE block can work for SRIOV, enable ring & ib test. Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c index

[PATCH 1/3] drm/amdgpu/vce4: update VCE initialization sequence for SRIOV

Update the initialization sequence of VCE to make VCE work. Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 9 ++--- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

[PATCH 5/5] drm/amdgpu/vce4: enable ring & ib test for sriov

Now VCE block can work for SRIOV, enable ring & ib test. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Frank Min <frank@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gp

[PATCH 2/5] drm/amdgpu/gmc9: add separate vmhub flush function

Add separate vmhub flush function so that other components can reuse it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Frank Min <frank@amd.com> --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 77 +-- drivers/gpu/drm/amd/amdgp

[PATCH 3/5] drm/amdgpu/vce4: workaround multi vce engine encoding hang issue

For SRIOV, multi vce engine will hang when encoding. Add VMHUB flush to workaround it, will continue to find the root cause later. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Frank Min <frank@amd.com> --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 11 +++

[PATCH 4/5] drm/amdgpu/vce4: workaround VCE ring test slow issue

Add VCE ring test slow workaround for SRIOV. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Frank Min <frank@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/dr

[PATCH 2/2] drm/amdgpu/soc15: enable psp block for SRIOV

SRIOV can support for loading ucode with PSP block, enable it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/soc15.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/

[PATCH 1/2] drm/amdgpu/psp: add check sOS sign

Confirm if sys driver and sOS are already been loaded through sOS sign register, skip loading sys driver and sOS if finding the sign. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 18 -- 1 file changed, 16 insertions

[PATCH] drm/amdgpu/gfx8: move CE meta data structure to vi_structs.h

Because different HWs have different definition for CE & DE meta data, follow mqd design to move the structures to vi_structs.h. And change the prefix from amdgpu to vi as the structures is only for VI family. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/

[PATCH 3/3] drm/amdgpu/gfx: free memory of mqd backup

Need to free mqd backup when destroying ring. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 2202f02..2

[PATCH 1/3] drm/amdgpu: change pointer of mqd_ptr to void

vi_mqd is only used by VI family but mqd_ptr is common for all ASIC, so change the pointer to void. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c| 26 +- 2 files c

[PATCH] drm/amdgpu/virt: increase mailbox timeout value

If start all VFs at same time, the GPU hypervisor need more time to handle mailbox access. Set it to five seconds according to test experience. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/mxgpu_vi.h | 2 +- 1 file changed, 1 insertion(+), 1 de

[PATCH 1/1] drm/amdgpu: fix unload driver issue for virtual display

Virtual display doesn't allocate amdgpu_encoder when initializing, so will get invaild pointer if try to free amdgpu_encoder when unloading driver. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 + 1 file changed, 1 insertion

[PATCH 1/2] drm/amdgpu: fix reboot failure issue for virtualization

Reboot process will call HW fini functions of IP blocks. For virt, need to send event three before hw fini and send event four after hw fini. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 ++ 1 file changed, 6 insertions(+)

[PATCH 2/2] drm/amdgpu/vi: fix mailbox irq mistake

For virt, freed mailbox irq should be handled in hw fini, not hw init. Correct it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/vi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/g

[V3 11/11] drm/amdgpu: do not reset gpu for virtualization

Current amdgpu reset process only works on bare-metal and for SRIOV many inside it need re-work to adapt to vf device. This is a temporary workaround to skip gpu reset. Signed-off-by: Monk Liu <monk@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/dr

[V3 10/11] drm/amdgpu/virt: disable dc

Virtualization don't need the dc, disable it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

[V3 09/11] drm/amdgpu/virt: enable virtual display

Virtual display is default setting for virtualization, enable it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/

[V3 07/11] drm/amdgpu: request/release full gpu access if device is vf

For gpu vf device, first need to request full gpu access before accessing gpu registers, and release full gpu access after the access is done. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_

[V3 08/11] drm/amdgpu/vi: add support virtualization

Call VI virtualization functions if device is Vf. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/vi.c | 34 -- 1 file changed, 32 insertions(+), 2 deletions(-) diff --g

[V3 00/11] Add support AMD GPU virtualization soultion

asic specific file to support specific asic; 3. not include KIQ patch as it has been merged into kernel; 4. not include CSA patch as monk will submit it; Xiangliang Yu (11): drm/amdgpu/ring: add two interfaces to support r/w registers with kiq drm/amdgpu/gfx8: implement emit_rreg/wreg function

[V3 04/11] drm/amdgpu/virt: use kiq to access registers

For virtualization, it is must for driver to use KIQ to access registers when it is out of GPU full access mode. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile| 2 +- drivers/gpu/dr

[V3 03/11] drm/amdgpu/virt: add runtime flag

Add new flag to define gpu runtime that is out of full gpu access. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/dr

[V3 06/11] drm/amdgpu/virt: implement VI virt operation interfaces

VI has asic specific virt support, which including mailbox and golden registers init. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Monk Liu <monk@amd.com> Signed-off-by: shaoyunl <shaoyun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile |

[V3 01/11] drm/amdgpu/ring: add two interfaces to support r/w registers with kiq

During virtual runtime, need to send command to kiq ring to read/write GPU registers. Add two interface to support the two actions. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Monk Linu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++

[V3 05/11] drm/amdgpu/virt: add high level interfaces for virt

Add high level interfaces that is not relate to specific asic. So asic files just need to implement the interfaces to support virtualization. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu

[V3 02/11] drm/amdgpu/gfx8: implement emit_rreg/wreg function

Implement emit_rreg/wreg function for kiq ring. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 3 ++- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c| 37 2 f

[V2 04/11] drm/amdgpu/virt: use kiq to access registers

For virtualization, it is must for driver to use KIQ to access registers when it is out of GPU full access mode. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile| 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++ drivers/gpu/d

[V2 08/11] drm/amdgpu/vi: add support virtualization

Call VI virtualization functions if device is Vf. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/vi.c | 34 -- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/d

[V2 11/11] drm/amdgpu: do not reset gpu for virtualization

Current job timeout setting is not fit for virtualization, so it will cause job timeout sometimes. Add workaround for this when timeout happen. Signed-off-by: Monk Liu <monk@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_

[V2 10/11] drm/amdgpu/virt: disable dc

Virtualization don't need the dc, disable it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

[V2 03/11] drm/amdgpu/virt: add runtime flag

Add new flag to define gpu runtime that is out of full gpu access. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/

[V2 07/11] drm/amdgpu: request/release full gpu access if device is vf

For gpu vf device, first need to request full gpu access before accessing gpu registers, and release full gpu access after the access is done. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 + drivers/gpu/drm/amd/

[V2 09/11] drm/amdgpu/virt: enable virtual display

Virtual display is default setting for virtualization, enable it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/

[V2 02/11] drm/amdgpu/gfx8: implement emit_rreg/wreg function

Implement emit_rreg/wreg function for kiq ring. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 3 ++- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c| 37 2 files changed, 39 insertions(+), 1 deletion(-) diff

[V2 06/11] drm/amdgpu/virt: implement VI virt operation interfaces

VI has asic specific virt support, which including mailbox and golden registers init. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 3 + drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c

[V2 01/11] drm/amdgpu/ring: add two interfaces to support r/w registers with kiq

During virtual runtime, need to send command to kiq ring to read/write GPU registers. Add two interface to support the two actions. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 2 ++ 2

[V2 00/11] Add support AMD GPU virtualization soultion

as monk will submit it; Xiangliang Yu (11): drm/amdgpu/ring: add two interfaces to support r/w registers with kiq drm/amdgpu/gfx8: implement emit_rreg/wreg function drm/amdgpu/virt: add runtime flag drm/amdgpu/virt: use kiq to access registers drm/amdgpu/virt: add high level interfaces

[V2 05/11] drm/amdgpu/virt: add high level interfaces for virt

Add high level interfaces that is not relate to specific asic. So asic files just need to implement the interfaces to support virtualization. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 57 drivers/g

[V2 2/2] drm/amdgpu: remove detect_hw_virtualization interface

Call detection function driectly, so remove the interface. V2: ci and si also need to call the detec function. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 -- drivers/gpu/drm/amd/amdgpu/cik.c| 3 ++- drivers/gpu/drm/amd/amdgp

[V2 1/2] drm/amdgpu/vi: move virtualization detection forward

Move the detection forward into vi_set_ip_blocks function, then add ip blocks virtualization need if device is VF. V2: add ip blocks according to asic type. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/vi.c | 24 +--- 1 file chang

[PATCH 2/2] drm/amdgpu: remove detect_hw_virtualization interface

Don't use the interface anymore, remove it. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 -- drivers/gpu/drm/amd/amdgpu/cik.c| 7 --- drivers/gpu/drm/amd/amdgpu/si.c | 7 --- 3 files changed, 16 deletions(-) diff

[PATCH] drm/amdgpu/virt: rename fieldes of virtualization structure

Use acronym to rename fields to make easy to spell out. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 14 +++--- drivers/g

[PATCH 1/1] drm/amdgpu/gfx8: add support kernel interface queue(KIQ)

Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 13 + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 643 +- drivers/gpu/drm/amd/amdgpu/vid.h | 2 + 3 files changed, 656 insertions(+), 2 deletions(-) diff --git a

[PATCH 1/1] drm/amdgpu/gfx8: add support kernel interface queue(KIQ)

KIQ is queue-memory based initialization method: setup KIQ queue firstly, then send command to KIQ to setup other queues, without accessing registers. For virtualization, need KIQ to access virtual function registers when running on guest mode. Signed-off-by: Xiangliang Yu <xiangliang...@amd.

[PATCH 16/23] drm/amdgpu: add flag to indicate VF runtime state

Liu <monk@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 5 + drivers/gpu/drm/amd/mxgpu/mxgpu_mb.c | 3 +++ 3 files changed, 14 insertions(+) diff --git a

[PATCH 11/23] drm/amdgpu: implement context save area(CSA) feature

CSA is need by world switch. This patch implement CSA feature and bind it to each VM, so hardware can save the state into the area and restore it when running again. Signed-off-by: Monk Liu <monk@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/dr

[PATCH 05/23] drm/amdgpu/gfx8: add support KIQ for FIJI/TONGA chips

FIJI/TONGA chips must enable KIQ feature to support virtualization. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> Signed-off-by: Monk Liu <monk@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 237 +- 1 file changed, 236 insertions(+)

[PATCH 01/23] drm/amdgpu: add support kernel interface queue(KIQ)

KIQ is queue-memory based initialization method: setup KIQ queue firstly, then send command to KIQ to setup other queues, without accessing registers. For virtualization, need KIQ to access virtual function registers when running on guest mode. Signed-off-by: Xiangliang Yu <xiangliang...@amd.

[PATCH 04/23] drm/amdgpu: add new structure for KIQ memory allcation

KIQ need three memory spaces: interrupt, ring and buffer object. If want to setup KIQ, must to allocate related memory firstly. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drive

[PATCH 17/23] drm/amdgpu: export vi common ip block

GPU virtualization component need vim common ip block and the block was also public before. Export it again. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/vi.c | 2 +- drivers/gpu/drm/amd/amdgpu/vi.h | 2 +- 2 files changed, 2 insertions(+), 2 del

[PATCH 07/23] drm/amdgpu: create new directory for GPU virtualization

-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 3 +- drivers/gpu/drm/amd/mxgpu/amd_mxgpu.c| 104 +++ drivers/gpu/drm/amd/mxgpu/amd_mxgpu.h| 37 +++ 4

[PATCH 03/23] drm/amdgpu: export KIQ interfaces

Export KIQ interfaces so that others components can use the interfaces to setup queues. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 20 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgp

[PATCH 00/23] Add support AMD GPU virtualization soultion

different hardware; In the end, the patch series is support serval virtualization features: 1. Support CSA feature; 2. Support Mailbox communication with GPU hypervisor; 3. Support KIQ feature; Xiangliang Yu (23): drm/amdgpu: add support kernel interface queue(KIQ) drm/amdgpu: add kiq

[V2 6/6] drm/amd/powerplay: Fix potential NULL pointer issue

If doesn't enable dpm, the powerplay will not allocate memory for hw management. So, hw_init_power_state_table function will reference NULL pointer when resetting. Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 4 ++-- 1 file chan

[V2 5/6] drm/amdgpu: Don't touch GFX hw during HW fini

For SR-IOV client, driver shouldn't touch the GFX hw during HW fini, otherwise, gfx will fail to start after rebooting guest os. Signed-off-by: shaoyunl <shaoyun@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 1

[V2 2/6] drm/amd/powerplay: cut digest part

For virtualization, FW size need to cut its digest part. Signed-off-by: Frank Min <frank@amd.com> Signed-off-by: Monk Liu <monk@amd.com> Signed-off-by: Xiangliang Yu <xiangliang...@amd.com> --- drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 4 1 file cha

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