[PATCH v2 1/2] drm/amdgpu: export test ib debugfs interface

As Christian and David's suggestion, submit the test ib ring debug interfaces. It's useful for debugging with the command submission without VM case. Signed-off-by: Huang Rui --- V1 -> V2: - park the scheduler thread for each ring to avoid conflict with commands from active

Re: [PATCH 2/2] drm/amdgpu: export test ring debugfs interface

On Wed, May 10, 2017 at 10:56 PM, Huang Rui wrote: > On Thu, May 11, 2017 at 10:41:42AM +0800, Deucher, Alexander wrote: >> > -Original Message- >> > From: Deucher, Alexander >> > Sent: Wednesday, May 10, 2017 10:38 PM >> > To: Huang, Ray; amd-gfx@lists.freedesktop.org;

Re: [PATCH 1/1] amdgpu: move asic id table to a separate file

On 11/05/17 06:10 AM, Li, Samuel wrote: > Also attach a sample ids file for reference. The names are from marketing, not > related to source code and no reviews necessary here:) Just because it's not source code doesn't mean no review is necessary. :) > It can be put in directory

[PATCH 1/1] amdgpu: move asic id table to a separate file

From: Xiaojie Yuan Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9 Signed-off-by: Samuel Li --- amdgpu/Makefile.am | 2 + amdgpu/Makefile.sources | 2 +- amdgpu/amdgpu_asic_id.c | 198 +++

Re: FW: [PATCH] drm/amdgpu: reduce amdgpu_device_resume() time

On Wed, May 10, 2017 at 5:20 AM, S, Shirish wrote: > From: Shirish S > > amdgpu_device_resume() has a high time consuming > call of amdgpu_late_init() which sets the clock_gating > state of all IP blocks and is blocking. > This patch defers only this setting

(radeon?) WARNING: drivers/gpu/drm/drm_irq.c:1195 drm_vblank_put (v4.11-12441-g56868a4)

Hi, I just tested v4.11-12441-g56868a4 on HP xw6600 with radeon graphics, and I'm seeing the following WARNING triggered constantly. I have not seen this earlier e.g. with the distro kernel 4.10.13-200.fc25.x86_64 $ lspci|grep -i amd 60:00.0 VGA compatible controller: Advanced Micro Devices,

RE: [PATCH 000/117] Raven Support

> -Original Message- > From: Christian König [mailto:deathsim...@vodafone.de] > Sent: Wednesday, May 10, 2017 3:29 PM > To: Alex Deucher; amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander > Subject: Re: [PATCH 000/117] Raven Support > > Am 10.05.2017 um 20:45 schrieb Alex Deucher: >

Re: Support for amdgpu VM update via CPU on large-bar systems

[HK]: From Compute perspective, all validations are synchronous. PT/PD BOs are validated when restored after evictions. However, the clearing of PT/PD BOs during creation are still done by GPU which mandates the waiting. [HK]: I am not clear on how to modify amdgpu_bo_kmap(). The function

RE: [PATCH] drm/amdgpu: fix fundamental suspend/resume issue

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Christian König > Sent: Wednesday, May 10, 2017 2:09 PM > To: amd-gfx@lists.freedesktop.org > Subject: [PATCH] drm/amdgpu: fix fundamental suspend/resume issue > > From: Christian König

[PATCH 117/117] drm/amdgpu: add RAVEN pci id

From: Chunming Zhou Add the RAVEN pci id. Signed-off-by: Chunming Zhou Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 +++ 1 file changed, 3

[PATCH 107/117] drm/amdgpu/powerplay/raven: add smu block and enable powerplay

From: Chunming Zhou Add the ip block and enable powerplay on raven. Reviewed-by: Hawking Zhang Signed-off-by: Chunming Zhou Signed-off-by: Alex Deucher ---

[PATCH 108/117] drm/amd: Add DCN ivsrcids (v2)

From: Andrey Grodzovsky v2: squash in some updates (Alex) Signed-off-by: Andrey Grodzovsky Acked-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 090/117] drm/amdgpu: add vcn enc ring type and functions

From: Leo Liu Add the ring function callbacks for the encode rings. Signed-off-by: Leo Liu Reviewed-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 103/117] drm/amd/powerplay: add raven support in smumgr. (v2)

From: Rex Zhu smumgr provides the interface for interacting with the smu firmware which handles power management. v2: squash in updates (Alex) Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang

[PATCH 097/117] drm/amdgpu: update vcn decode create msg

From: Leo Liu Based on new vcn firmware interface changes Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 15 +-- 1

[PATCH 101/117] drm/amdgpu: add raven related define in pptable.h.

From: Rex Zhu Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/include/pptable.h | 57

[PATCH 098/117] drm/amdgpu/vcn: add sw clock gating

From: Huang Rui Add sw controlled clockgating for VCN. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 080/117] drm/amdgpu/vcn: implement ib tests with new message buffer interface

From: Leo Liu Signed-off-by: Leo Liu Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 40 - 1 file changed, 24

[PATCH 081/117] uapi/drm: add AMDGPU_HW_IP_VCN_DEC for decode CS

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- include/uapi/drm/amdgpu_drm.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH 075/117] drm/amdgpu: move vcn ring test to amdgpu_vcn.c

From: Leo Liu Hope it will be generic for vcn later Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 36

[PATCH 070/117] drm/amdgpu: add vcn decode ring type and functions

From: Leo Liu Add the ring function callbacks for the decode ring. Signed-off-by: Leo Liu Acked-by: Chunming Zhou Acked-by: Hawking Zhang Signed-off-by: Alex Deucher ---

[PATCH 089/117] drm/amdgpu: add vcn enc rings

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 5 +

[PATCH 082/117] uapi/drm: add AMDGPU_HW_IP_VCN_ENC for encode CS

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- include/uapi/drm/amdgpu_drm.h | 3 ++- 1 file

[PATCH 078/117] drm/amdgpu: implement vcn start RB command

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 21 - 1 file changed, 20 insertions(+), 1

[PATCH 086/117] drm/amdgpu: implement new vcn cache window programming

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 34 -- 1 file changed, 16

[PATCH 091/117] drm/amdgpu: add vcn enc irq support

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 28

[PATCH 092/117] drm/amdgpu: enable vcn encode ring tests

From: Leo Liu Wire up the callback and enable them. Signed-off-by: Leo Liu Reviewed-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 073/117] drm/amdgpu: move amdgpu_vcn structure to vcn header

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 26 +-

[PATCH 071/117] drm/amdgpu: add vcn irq functions

From: Leo Liu Signed-off-by: Leo Liu Acked-by: Chunming Zhou Acked-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 32

[PATCH 083/117] drm/amdgpu: add AMDGPU_HW_IP_VCN_DEC to info query

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 9 + 1 file changed, 9 insertions(+) diff --git

[PATCH 074/117] drm/amdgpu: re-group the functions in amdgpu_vcn.c

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 140 1 file changed, 70

[PATCH 067/117] drm/amdgpu: add encode tests for vcn

From: Leo Liu Add encode ring and ib tests. Signed-off-by: Leo Liu Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher ---

[PATCH 084/117] drm/amdgpu: get cs support of AMDGPU_HW_IP_VCN_DEC

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git

[PATCH 085/117] drm/amdgpu: Disable uvd and vce free handles for raven

From: Leo Liu Not required on raven. Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 -- 1 file changed, 4 insertions(+),

[PATCH 079/117] drm/amdgpu: implement insert end ring function for vcn decode

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-)

[PATCH 068/117] drm/amdgpu: add vcn ip block functions (v2)

From: Leo Liu Fill in the core VCN 1.0 setup functionality. v2: squash in fixup (Alex) Signed-off-by: Leo Liu Acked-by: Chunming Zhou Acked-by: Hawking Zhang Signed-off-by: Alex Deucher

[PATCH 052/117] drm/amdgpu: enable MC MGCG and LS for raven

From: Huang Rui Signed-off-by: Huang Rui Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 4 +++- 1

[PATCH 044/117] drm/amdgpu/gfx9: add enable/disable funcs for cp power gating

From: Hawking Zhang Used to enable/disable cp powergating. Signed-off-by: Hawking Zhang Reviewed-by: Alex Deucher Reviewed-by: Huang Rui Signed-off-by: Alex Deucher ---

[PATCH 064/117] drm/amdgpu: register the psp v10 function pointers at psp sw_init

From: Huang Rui Add the psp 10.0 callbacks for PSP. Signed-off-by: Huang Rui Reviewed-by: Alex Deucher Acked-by: Chunming Zhou Signed-off-by: Alex Deucher ---

[PATCH 058/117] drm/amdgpu: enable sdma power gating for raven

From: Huang Rui Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +- 1 file

[PATCH 047/117] drm/amdgpu/gfx9: allow updating gfx mgpg state

From: Hawking Zhang Wire up the functions to control medium grained powergating. Signed-off-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 050/117] drm/amdgpu/gmc9: change fb offset sequence so that used wider

From: Chunming Zhou Initialize the values earlier. Signed-off-by: Chunming Zhou Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 11 +-- 1

[PATCH 034/117] drm/amdgpu/gfx9: add chip name for raven when initializing microcode

From: Chunming Zhou Fetch the correct ucode for raven. Signed-off-by: Chunming Zhou Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 +++ 1 file

[PATCH 056/117] drm/amdgpu: init sdma power gating for raven

From: Huang Rui Initialize sdma for powergating. Signed-off-by: Huang Rui Reviewed-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher ---

[PATCH 051/117] drm/amdgpu: add raven clock gating and light sleep for mmhub

From: Huang Rui Signed-off-by: Huang Rui Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 50

[PATCH 010/117] ASoC: AMD: Add ACP3x system resume pm op

From: Maruthi Srinivas Bayyavarapu When audio usecase in progress and system wide suspend happens, ACP will be powered off and when system resumes, for audio usecase to continue, all the runtime configuration data needs to be programmed again. Added 'resume'pm call

[PATCH 005/117] ASoC: AMD: handle ACP3x i2s watermark interrupt

From: Maruthi Srinivas Bayyavarapu whenever audio data equal to I2S fifo watermark level is produced/consumed, interrupt is generated. Amount of data is equal to half of ALSA ring buffer size. Acknowledge the interrupt. Signed-off-by: Maruthi Bayyavarapu

[PATCH 006/117] ASoC: AMD: add ACP3x PCM driver DMA ops

From: Maruthi Srinivas Bayyavarapu ACP3x has a DMA controller to access system memory. This controller transfers data from/to system memory to/from ACP internal fifo. The patch adds PCM driver DMA operations. Signed-off-by: Maruthi Bayyavarapu

[PATCH 004/117] ASoC: AMD: add ACP3x PCM platform driver

From: Maruthi Srinivas Bayyavarapu PCM platform driver binds to the platform device creatd by ACP3x PCI device. PCM driver registers ALSA DMA and CPU DAI components with ASoC framework. Signed-off-by: Maruthi Bayyavarapu Signed-off-by:

[PATCH 002/117] ASoC: AMD: add ACP3.0 PCI driver

From: Maruthi Srinivas Bayyavarapu ACP 3.0 is a PCI audio device. This patch adds PCI driver to bind to this device and get PCI resources. Signed-off-by: Maruthi Bayyavarapu Signed-off-by: Alex Deucher ---

[PATCH] drm/amdgpu: fix fundamental suspend/resume issue

From: Christian König Reinitializing the VM manager during suspend/resume is a very very bad idea since all the VMs are still active and kicking. This can lead to random VM faults after resume when new processes become the same client ID assigned. Signed-off-by:

[PATCH libdrm 1/3] amdgpu: add raven family id

From: Hawking Zhang Signed-off-by: Hawking Zhang Signed-off-by: Chunming Zhou Reviewed-by: Junwei Zhang Signed-off-by: Alex Deucher --- include/drm/amdgpu_drm.h | 1 + 1 file

[PATCH libdrm 2/3] amdgpu/drm: add AMDGPU_HW_IP_VCN_DEC

From: Leo Liu Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- include/drm/amdgpu_drm.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

RE: [PATCH xf86-video-amdgpu] Remove unused struct members from drmmode_display.h

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Michel Dänzer > Sent: Wednesday, May 10, 2017 5:14 AM > To: amd-gfx@lists.freedesktop.org > Subject: [PATCH xf86-video-amdgpu] Remove unused struct members from > drmmode_display.h > > From:

RE: [PATCH xf86-video-ati] Apply gamma correction to HW cursor

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Michel Dänzer > Sent: Wednesday, May 10, 2017 4:25 AM > To: amd-gfx@lists.freedesktop.org > Subject: [PATCH xf86-video-ati] Apply gamma correction to HW cursor > > From: Michel Dänzer

[PATCH umr] add new vega10 DIDs

--- src/lib/discover_by_did.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/lib/discover_by_did.c b/src/lib/discover_by_did.c index 2e06d5092847..7ecd7f353c92 100644 --- a/src/lib/discover_by_did.c +++ b/src/lib/discover_by_did.c @@ -221,7 +221,9 @@ static const struct { {

[PATCH 1/2] drm/radeon: move vga_switcheroo registration

Move the registration later to avoid a possible race between driver initialization and a vga_switcheroo request. bug: https://bugzilla.redhat.com/show_bug.cgi?id=1411034 Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon.h| 2 ++

RE: [PATCH 4/4] drm/amdgpu/SRIOV:implement guilty job TDR (V2)

>Because stopping all the scheduler threads takes a moment and it is entirely >possible that the job finishes within that time. Sounds reasonable, but instead not, because if so why not increase timed_out value to + 0.5 sec ? that should cover the time on stop all schedulers, So the point is we

Re: [PATCH 01/11] drm/ttm: cleanup coding style in ttm_bo_api.h

Ping, could anybody take a look at this set? Thanks, Christian. Am 27.04.2017 um 18:23 schrieb Christian König: From: Christian König Extern is the default for function declerations anyway and this solves a bunch of 80char per line issues. Signed-off-by: Christian

Re: [PATCH 0/3] GPU-DRM-Radeon: Fine-tuning for three function implementations

Am 10.05.2017 um 02:23 schrieb Michel Dänzer: On 03/05/17 09:46 PM, Christian König wrote: Am 02.05.2017 um 22:04 schrieb SF Markus Elfring: From: Markus Elfring Date: Tue, 2 May 2017 22:00:02 +0200 Three update suggestions were taken into account from static

RE: [PATCH 4/4] drm/amdgpu/SRIOV:implement guilty job TDR (V2)

> Checking a second time is pointless since it can't signal any more after > calling amd_sched_hw_job_reset(). [ML] you seems not response to me … I of cause know fence cannot signal after hw_job_reset() …. My question is , before you call hw_job_reset(), why you want to check the fence ? why

Re: [PATCH 4/4] drm/amdgpu/SRIOV:implement guilty job TDR (V2)

Am 10.05.2017 um 12:05 schrieb Liu, Monk: [ML] yes, but we cannot guarantee the job is 100% really hang when entering gpu_reset(), we can only trust our amdgpu_job_timeout as a deadline for each job. You approach that check the fence first before charge it as guilty/hang is incorrect looks

FW: [PATCH] drm/amdgpu: reduce amdgpu_device_resume() time

From: Shirish S amdgpu_device_resume() has a high time consuming call of amdgpu_late_init() which sets the clock_gating state of all IP blocks and is blocking. This patch defers only this setting of clock gating state operation to post resume of amdgpu driver but ideally

RE: [PATCH 4/4] drm/amdgpu/SRIOV:implement guilty job TDR (V2)

I mean letting it signal when we force the hardware fence to complete will work as well, but I still think that this isn't as clean as signaling it manually. Please also see the helper function the Intel guys introduced drm_fence_set_error(), we will run into a BUG_ON if we can't guarantee the

Re: [PATCH 1/3] drm/amdgpu: add sched sync for amdgpu job v2

Am 10.05.2017 um 11:42 schrieb Chunming Zhou: this is an improvement for previous patch, the sched_sync is to store fence that could be skipped as scheduled, when job is executed, we didn't need pipeline_sync if all fences in sched_sync are signalled, otherwise insert pipeline_sync still. v2:

RE: [PATCH 4/4] drm/amdgpu/SRIOV:implement guilty job TDR (V2)

[ML] yes, but we cannot guarantee the job is 100% really hang when entering gpu_reset(), we can only trust our amdgpu_job_timeout as a deadline for each job. You approach that check the fence first before charge it as guilty/hang is incorrect looks to me because why you not check it twice,

[PATCH xf86-video-amdgpu] Don't enable DRI3 without glamor

From: Michel Dänzer Can't work currently. Fixes crash when trying to run a DRI3 client when glamor isn't enabled. Bugzilla: https://bugs.freedesktop.org/100968 Signed-off-by: Michel Dänzer --- src/amdgpu_kms.c | 5 - 1 file changed, 4

[PATCH 3/3] drm/amdgpu: id reset count only is updated when used end v2

before that, we have function to check if reset happens by using reset count. v2: always update reset count after vm flush Change-Id: I2e941dd35295d4210d57a9593d39b5ee9021be9f Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 3 +-- 1 file changed, 1

[PATCH xf86-video-amdgpu] Remove unused struct members from drmmode_display.h

From: Michel Dänzer Signed-off-by: Michel Dänzer --- src/drmmode_display.c | 1 - src/drmmode_display.h | 3 --- 2 files changed, 4 deletions(-) diff --git a/src/drmmode_display.c b/src/drmmode_display.c index 5b2431495..9996d2f70 100644 ---

[PATCH xf86-video-ati] Simplify tracking of PRIME scanout pixmap

From: Michel Dänzer Remember the shared pixmap passed to drmmode_set_scanout_pixmap for each CRTC, and just compare against that. Fixes leaving stale entries in ScreenRec::pixmap_dirty_list under some circumstances, which would usually result in use-after-free and a

[PATCH xf86-video-ati 2/2] Use reference counting for tracking KMS framebuffer lifetimes

From: Michel Dänzer References are held by the pixmaps corresponding to the FBs (so the same KMS FB can be reused as long as the pixmap exists) and by the CRTCs scanning out from them (so a KMS FB is only destroyed once it's not being scanned out anymore, preventing

[PATCH xf86-video-ati 1/2] Pass pixmap instead of handle to radeon_do_pageflip

From: Michel Dänzer This brings us in line with amdgpu and prepares for the following change, no functional change intended. (Ported from amdgpu commit e463b849f3e9d7b69e64a65619a22e00e78d297b) v2: * Be more consistent with the amdgpu code, which should make porting

Re: [PATCH 1/4] drm/amdgpu: add sched sync for amdgpu job

On 2017年05月10日 16:50, Christian König wrote: Am 10.05.2017 um 10:38 schrieb zhoucm1: On 2017年05月10日 16:26, Christian König wrote: Am 10.05.2017 um 09:31 schrieb Chunming Zhou: this is an improvement for previous patch, the sched_sync is to store fence that could be skipped as scheduled,

Re: [PATCH 1/4] drm/amdgpu: add sched sync for amdgpu job

Am 10.05.2017 um 10:38 schrieb zhoucm1: On 2017年05月10日 16:26, Christian König wrote: Am 10.05.2017 um 09:31 schrieb Chunming Zhou: this is an improvement for previous patch, the sched_sync is to store fence that could be skipped as scheduled, when job is executed, we didn't need

Re: [PATCH 1/4] drm/amdgpu: add sched sync for amdgpu job

On 2017年05月10日 16:26, Christian König wrote: Am 10.05.2017 um 09:31 schrieb Chunming Zhou: this is an improvement for previous patch, the sched_sync is to store fence that could be skipped as scheduled, when job is executed, we didn't need pipeline_sync if all fences in sched_sync are

Re: [PATCH 2/4] drm/amdgpu: make pipeline sync be in same place

Am 10.05.2017 um 09:31 schrieb Chunming Zhou: Change-Id: I0ccfa0e6de0cddbcca8dd85f2862240bc5ca02b3 Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 - drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 6 +++---

Re: [PATCH 1/4] drm/amdgpu: add sched sync for amdgpu job

Am 10.05.2017 um 09:31 schrieb Chunming Zhou: this is an improvement for previous patch, the sched_sync is to store fence that could be skipped as scheduled, when job is executed, we didn't need pipeline_sync if all fences in sched_sync are signalled, otherwise insert pipeline_sync still.

[PATCH xf86-video-ati] Apply gamma correction to HW cursor

From: Michel Dänzer The display hardware CLUT we're currently using for gamma correction doesn't affect the HW cursor, so we have to apply it manually when uploading the HW cursor data. This currently only works in depth 24/32. (Ported from amdgpu commit

Re: [PATCH 3/4] drm/amdgpu: id reset count only is updated when used end

Am 10.05.2017 um 09:31 schrieb Chunming Zhou: before that, we have function to check if reset happens by using reset count. Change-Id: I2e941dd35295d4210d57a9593d39b5ee9021be9f Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 ++-- 1 file

Re: [PATCH 4/4] drm/amdgpu: check whether the vmid can be reused first

NAK, it is intentionally done like this to avoid starvation of processes. In other words we assign a VMID only when there is at least one free. Regards, Christian. Am 10.05.2017 um 09:31 schrieb Chunming Zhou: Change-Id: If24a62b9c3097c9b040225ab0e768145b7a3db1e Signed-off-by: Chunming Zhou

Re: [PATCH 4/4] drm/amdgpu: check whether the vmid can be reused first

On 05/10/2017 03:31 PM, Chunming Zhou wrote: Change-Id: If24a62b9c3097c9b040225ab0e768145b7a3db1e Signed-off-by: Chunming Zhou I had same idea when read this code before. Reviewed-by: Junwei Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 92

[PATCH 4/4] drm/amdgpu: check whether the vmid can be reused first

Change-Id: If24a62b9c3097c9b040225ab0e768145b7a3db1e Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 92 +- 1 file changed, 47 insertions(+), 45 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

[PATCH 3/4] drm/amdgpu: id reset count only is updated when used end

before that, we have function to check if reset happens by using reset count. Change-Id: I2e941dd35295d4210d57a9593d39b5ee9021be9f Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git