It's not a high priority as I'm not aware of any applications that
actually make use of the cache information.
Which raises the question why we have done this in the first place? When
nobody is using it could we just remove the interface?
Regards,
Christian.
Am 16.04.19 um 05:24 schrieb Kueh
Under SRIOV, we need disable DRIVER_ATOMIC.
Otherwise, it will trigger WARN_ON at drm_universal_plane_init.
Change-Id: I96a78d6e45b3a67ab9b9534e7071ae5daacc0f4f
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu
On x86 we use the apicid to associate caches with CPU cores. See the Thunk code
in libhsakmt/src/topology.c (static void find_cpu_cache_siblings()). If we used
a different way to identify CPU cores, I think that would break. This code in
the Thunk is x86-specific as it uses the CPUID instruction
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
hersen wu
Sent: Monday, April 15, 2019 10:18 PM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
Cc: Wu, Hersen
Subject: [PATCH 1/2] SWDEV-183622 4k@60hz dp mon
With comments of Nicholas and Alex addressed, the patch is reviewed-by: Evan
Quan
> -Original Message-
> From: amd-gfx On Behalf Of
> Kazlauskas, Nicholas
> Sent: Monday, April 15, 2019 10:12 PM
> To: Deucher, Alexander ; Wu, Hersen
> ; amd-gfx@lists.freedesktop.org; Feng, Kenneth
>
>
Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of Liu,
> Shaoyun
> Sent: Monday, April 15, 2019 11:25 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, Shaoyun
> Subject: [PATCH] drm/powerplay : send SMC message to set XGMI pstate
>
> Send message with parameter
Andrey Grodzovsky writes:
> From: Christian König
>
> We now destroy finished jobs from the worker thread to make sure that
> we never destroy a job currently in timeout processing.
> By this we avoid holding lock around ring mirror list in drm_sched_stop
> which should solve a deadlock reported
On 4/15/19 3:43 PM, Andrey Grodzovsky wrote:
> Signed-off-by: Andrey Grodzovsky
> Reviewed-by: Nicholas Kazlauskas
Nitpicks:
Put the current commit message (with the spelling mistake in
accidentally fixed) in the body of the commit and give the commit title
something a little more descriptive
Also reject TDRs if another one already running.
v2:
Stop all schedulers across device and entire XGMI hive before
force signaling HW fences.
Avoid passing job_signaled to helper fnctions to keep all the decision
making about skipping HW reset in one place.
v3:
Fix SW sched. hang after non HW res
Signed-off-by: Andrey Grodzovsky
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/a
From: Christian König
Don't block others while waiting for the fences to finish, concurrent
submission is perfectly valid in this case and holding the lock can
prevent killed applications from terminating.
Signed-off-by: Christian König
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd
For later driver's reference to see if the fence is signaled.
v2: Move parent fence put to resubmit jobs.
Signed-off-by: Andrey Grodzovsky
Reviewed-by: Christian König
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/dri
From: Christian König
We now destroy finished jobs from the worker thread to make sure that
we never destroy a job currently in timeout processing.
By this we avoid holding lock around ring mirror list in drm_sched_stop
which should solve a deadlock reported by a user.
v2: Remove unused variable
On Mon, Apr 15, 2019 at 8:56 PM Koenig, Christian
wrote:
>
> Am 15.04.19 um 20:54 schrieb Dave Airlie:
> >> Well, I've got commit rights as well.
> >>
> >> Going to remove the warning, add your rb and push everything if nobody
> >> objects in the next hour or so.
> > So this got committed and is i
Am 15.04.19 um 20:54 schrieb Dave Airlie:
>> Well, I've got commit rights as well.
>>
>> Going to remove the warning, add your rb and push everything if nobody
>> objects in the next hour or so.
> So this got committed and is in my -next tree, but where is the
> userspace and igt tests?
I was wait
> Well, I've got commit rights as well.
>
> Going to remove the warning, add your rb and push everything if nobody
> objects in the next hour or so.
So this got committed and is in my -next tree, but where is the
userspace and igt tests?
There needs to be a functional mesa userspace and a set of
On 2019-04-12 1:30 p.m., Ville Syrjälä wrote:
> On Fri, Apr 12, 2019 at 12:05:29PM -0400, sunpeng...@amd.com wrote:
>> From: Leo Li
>>
>> Hi all,
>>
>> This is a follup to this change made by Ville to add MST aux nodes:
>> https://github.com/vsyrjala/linux/commit/cac63f799ee2f5fbbe4f0a375383f13
Am 15.04.19 um 17:11 schrieb Andrey Grodzovsky:
For later driver's reference to see if the fence is signaled.
v2: Move parent fence put to resubmit jobs.
Signed-off-by: Andrey Grodzovsky
Reviewed-by: Christian König
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file ch
Am 15.04.19 um 16:23 schrieb boyuan.zh...@amd.com:
From: Boyuan Zhang
All encode ibs must be dword aligned for address/size.
It's been working because all ib based addresses are normally page aligned,
and all encode FW interface structure sizes are dword aligned. However, it might
cause issue
Hi, Kenneth, Ray,
Would you please help review this change?
Thanks,
Hersen
-Original Message-
From: hersen wu
Sent: Monday, April 15, 2019 10:18 AM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
Cc: Wu, Hersen
Subject: [PATCH 1/2] SWDEV-183622 4k@60hz dp monitor always flick
Send message with parameter to SMC to set xgmi pstate
Change-Id: I5d90cffd63690f31f0df62c206b263d300f14234
Signed-off-by: shaoyunl
---
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
On 4/15/19 11:11 AM, Michel Dänzer wrote:
> On 2019-04-15 4:27 p.m., Nicholas Kazlauskas wrote:
>> DC and DM already support DRM_FORMAT_RGB565, it's just missing from the
>> list of valid formats.
>>
>> Cc: Harry Wentland
>> Cc: Leo Li
>> Signed-off-by: Nicholas Kazlauskas
>> ---
>> drivers/gp
On 4/15/19 2:46 AM, Koenig, Christian wrote:
I agree this would be good in case of amdgpu_device_pre_asic_reset
because we can totally skip this function if guilty job already
signaled, but for amdgpu_device_post_asic_reset it crates complications
because drm_sched_start is right in the middle th
was accidentaly removed during one of DALs code merges.
Signed-off-by: Andrey Grodzovsky
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_
On 2019-04-15 4:27 p.m., Nicholas Kazlauskas wrote:
> DC and DM already support DRM_FORMAT_RGB565, it's just missing from the
> list of valid formats.
>
> Cc: Harry Wentland
> Cc: Leo Li
> Signed-off-by: Nicholas Kazlauskas
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
> 1 f
For later driver's reference to see if the fence is signaled.
v2: Move parent fence put to resubmit jobs.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/scheduler/sched_main.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_m
From: Christian König
Don't block others while waiting for the fences to finish, concurrent
submission is perfectly valid in this case and holding the lock can
prevent killed applications from terminating.
Signed-off-by: Christian König
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd
From: Christian König
We now destroy finished jobs from the worker thread to make sure that
we never destroy a job currently in timeout processing.
By this we avoid holding lock around ring mirror list in drm_sched_stop
which should solve a deadlock reported by a user.
v2: Remove unused variable
Also reject TDRs if another one already running.
v2:
Stop all schedulers across device and entire XGMI hive before
force signaling HW fences.
Avoid passing job_signaled to helper fnctions to keep all the decision
making about skipping HW reset in one place.
Signed-off-by: Andrey Grodzovsky
---
On Mon, Apr 15, 2019 at 10:28 AM Nicholas Kazlauskas
wrote:
>
> DC and DM already support DRM_FORMAT_RGB565, it's just missing from the
> list of valid formats.
>
> Cc: Harry Wentland
> Cc: Leo Li
> Signed-off-by: Nicholas Kazlauskas
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/displa
DC and DM already support DRM_FORMAT_RGB565, it's just missing from the
list of valid formats.
Cc: Harry Wentland
Cc: Leo Li
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/
From: Boyuan Zhang
All encode ibs must be dword aligned for address/size.
It's been working because all ib based addresses are normally page aligned,
and all encode FW interface structure sizes are dword aligned. However, it might
cause issue when UMD tries to align size based on alignment repor
[WHY] clock unit mis-match between caller DC and SMU interface.
dc pass lock in mhz. the same unit as smu. no covert is needed.
[HOW] remove covert_10k_to_mhz in smu interface
this fixes corruption issue with 4k @60 display and stutter
mode enable
Signed-off-by: hersen wu
---
On 4/15/19 10:00 AM, Deucher, Alexander wrote:
> Maybe mention that this fixes issues with stutter mode and 4k. With that,
> Acked-by: Alex Deucher
>
> *From:* amd-gfx on behalf of
> hersen wu
> *Sent:* Monday, April 15,
Ok, will do it.
Regards,
Oak
-Original Message-
From: amd-gfx On Behalf Of Koenig,
Christian
Sent: Monday, April 15, 2019 4:06 AM
To: Zeng, Oak ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Kuehling, Felix
; Keely, Sean
Subject: Re: [PATCH 1/2] drm/amdgpu: Remap hdp coheren
Maybe mention that this fixes issues with stutter mode and 4k. With that,
Acked-by: Alex Deucher
From: amd-gfx on behalf of hersen wu
Sent: Monday, April 15, 2019 9:52 AM
To: amd-gfx@lists.freedesktop.org; Feng, Kenneth
Cc: Wu, Hersen
Subject: [PATCH] SWDEV-183
[WHY] clock unit mis-match between caller DC and SMU interface.
dc pass lock in mhz. the same unit as smu. no covert is needed.
[HOW] remove covert_10k_to_mhz in smu interface
Signed-off-by: hersen wu
---
.../gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 17 ++---
1 file chang
Hi Oak,
well, we make the function pointer structures constant is exactly to
prevent those scenarios.
Background is that multiple GPU can use the same function pointer
structure, but with different register offsets. So what you do here is
actually illegal and could break in some cases.
Easies
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