Hi Zhenneng,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on linus/master v5.19 next-20220811]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest
On 2022-08-11 17:49, Alex Deucher wrote:
On Thu, Aug 11, 2022 at 5:11 PM Rodrigo Siqueira
wrote:
We have some old code associated with DML, which we had plans to use,
but at some point, we just moved away from it. This commit removes the
dml_wrapper* files since they are not used anymore.
On 2022-08-11 17:49, Alex Deucher wrote:
On Thu, Aug 11, 2022 at 3:56 PM Rodrigo Siqueira
wrote:
We got a report from Stephen/Michael that the PowerPC build was failing
with the following error:
ld: drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.o uses hard float,
After removing some code for fixing the PowerPC compilation, we had some
leftover functions that are not used anymore. This commit drops
optc3_fpu_set_vrr_m_const since we don't need it anymore.
Signed-off-by: Rodrigo Siqueira
---
.../drm/amd/display/dc/dml/dcn30/dcn30_fpu.c | 77
On Thu, Aug 11, 2022 at 5:11 PM Rodrigo Siqueira
wrote:
>
> We have some old code associated with DML, which we had plans to use,
> but at some point, we just moved away from it. This commit removes the
> dml_wrapper* files since they are not used anymore.
>
> Reported-by: Magali Lemes
>
On Thu, Aug 11, 2022 at 3:56 PM Rodrigo Siqueira
wrote:
>
> We got a report from Stephen/Michael that the PowerPC build was failing
> with the following error:
>
> ld: drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.o uses hard float,
> drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o uses
We have some old code associated with DML, which we had plans to use,
but at some point, we just moved away from it. This commit removes the
dml_wrapper* files since they are not used anymore.
Reported-by: Magali Lemes
Signed-off-by: Rodrigo Siqueira
---
On 11/08/2022 04:34, David Gow wrote:
On Thu, Aug 11, 2022 at 8:40 AM Tales Aparecida
wrote:
From: Maíra Canal
KUnit unifies the test structure and provides helper tools that simplify
the development of tests. Basic use case allows running tests as regular
processes, which makes easier to
Fixes five checkpatch warnings:
CHECK: Please don't use multiple blank lines
+
+
ERROR: Macros with complex values should be enclosed in parentheses
+#define MAX_I64 \
+ (int64_t)((1ULL << 63) - 1)
WARNING: Missing a blank line after declarations
+ struct bw_fixed res;
+
From: David Gow
The definition of MIN_I64 in bw_fixed.c can cause gcc to whinge about
integer overflow, because it is treated as a positive value, which is
then negated. The temporary positive value is not necessarily
representable.
This causes the following warning:
Hi,
This series fixes an error accused by GCC and some checkpatch warnings.
The first patch of this series fixes an error reported and fixed by
David Gow (thanks!) at [1], where the macro MIN_I64 was used for the
first time and warned about an integer overflow.
The fix uses a similar syntax from
We got a report from Stephen/Michael that the PowerPC build was failing
with the following error:
ld: drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.o uses hard float,
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o uses soft float
ld: failed to merge target specific data of file
Hi Kent,
First of all, thanks for your feedback.
See my comments inline.
On 2022-08-11 12:02, Russell, Kent wrote:
[AMD Official Use Only - General]
I noticed that you added DCE and VCE/UVD prefixes in the columns, but not GC or
SDMA.
E.g.
CHIP DCE GC
On systems that support SMT (hyperthreading) schedule the bottom half of
the KFD interrupt handler on the same core. This makes it possible to
reserve a core for interrupt handling and have the bottom half run on
that same core.
On systems without SMT, pick another core in the same NUMA node, as
On Thu, Aug 11, 2022 at 2:00 PM Hamza Mahfooz wrote:
>
> Need to protect DSC code with CONFIG_DRM_AMD_DC_DCN.
> Fixes the following build errors on arm64:
> ERROR: modpost: "dc_dsc_get_policy_for_timing"
> [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
> ERROR: modpost:
On Thu, 11 Aug 2022 at 20:00, Hamza Mahfooz wrote:
>
> Need to protect DSC code with CONFIG_DRM_AMD_DC_DCN.
> Fixes the following build errors on arm64:
> ERROR: modpost: "dc_dsc_get_policy_for_timing"
> [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
> ERROR: modpost:
On Thu, Aug 11, 2022 at 7:00 PM Hamza Mahfooz wrote:
>
> Need to protect DSC code with CONFIG_DRM_AMD_DC_DCN.
> Fixes the following build errors on arm64:
> ERROR: modpost: "dc_dsc_get_policy_for_timing"
> [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
> ERROR: modpost:
Need to protect DSC code with CONFIG_DRM_AMD_DC_DCN.
Fixes the following build errors on arm64:
ERROR: modpost: "dc_dsc_get_policy_for_timing"
[drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost: "dc_dsc_compute_bandwidth_range"
[drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
On Thu, Aug 11, 2022 at 6:16 PM Alex Deucher wrote:
>
> On Thu, Aug 11, 2022 at 1:11 PM Sudip Mukherjee (Codethink)
> wrote:
> >
> > Hi All,
> >
> > Not sure if it has been reported, builds of riscv, alpha, s390, arm,
> > arm64, xtensa, mips, csky allmodco
[Public]
> -Original Message-
> From: amd-gfx On Behalf Of Jani
> Nikula
> Sent: Thursday, August 4, 2022 5:55 AM
> To: Jouni Högander ; dri-
> de...@lists.freedesktop.org; intel-...@lists.freedesktop.org; amd-
> g...@lists.freedesktop.org
> Cc: Siqueira, Rodrigo ; Li, Roman
> ; Manasi
Hi All,
Not sure if it has been reported, builds of riscv, alpha, s390, arm,
arm64, xtensa, mips, csky allmodconfig have failed to build next-20220811
with the error:
ERROR: modpost: "dc_dsc_compute_bandwidth_range"
[drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERRO
On Thu, Aug 11, 2022 at 1:11 PM Sudip Mukherjee (Codethink)
wrote:
>
> Hi All,
>
> Not sure if it has been reported, builds of riscv, alpha, s390, arm,
> arm64, xtensa, mips, csky allmodconfig have failed to build next-20220811
> with the error:
>
> ERROR: modpost: "d
On Wed, Aug 03, 2022 at 04:13:05PM -0400, Jason Baron wrote:
>
>
> On 8/3/22 15:56, jim.cro...@gmail.com wrote:
> > On Wed, Jul 20, 2022 at 9:32 AM Jim Cromie wrote:
> >>
> >
> >> Hi Jason, Greg, DRM-folk,
> >>
> >> This adds 'typed' "class FOO" support to dynamic-debug, where 'typed'
> >>
On 2022-08-11 11:34, Kim, Jonathan wrote:
[Public]
-Original Message-
From: Kuehling, Felix
Sent: August 11, 2022 11:19 AM
To: amd-gfx@lists.freedesktop.org; Kim, Jonathan
Subject: Re: [PATCH] drm/amdgpu: fix reset domain xgmi hive info reference
leak
Am 2022-08-11 um 09:42
On Thu, Aug 11, 2022 at 12:24 PM Hamza Mahfooz wrote:
>
> Need to protect DSC code with CONFIG_DRM_AMD_DC_DCN.
> Fixes the following build errors on arm64:
> ERROR: modpost: "dc_dsc_get_policy_for_timing"
> [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
> ERROR: modpost:
Need to protect DSC code with CONFIG_DRM_AMD_DC_DCN.
Fixes the following build errors on arm64:
ERROR: modpost: "dc_dsc_get_policy_for_timing"
[drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost: "dc_dsc_compute_bandwidth_range"
[drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
From: Xiaohui Zhang
[ Upstream commit 0381ac3ca2e727d4dfb7264d9416a8ba6bb6c18b ]
Similar to the handling of amdgpu_sa_bo_next_hole in commit 6a15f3ff19a8
("drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole"),
we thought a patch might be needed here as well.
The entries were
From: Xiaohui Zhang
[ Upstream commit feb54650bae25f2a2adfc493e3e254e7c27a3fba ]
Similar to the handling of amdgpu_mode_dumb_create in commit 54ef0b5461c0
("drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()"),
we thought a patch might be needed here as well.
args->size is a u64.
From: Xiaohui Zhang
[ Upstream commit 0381ac3ca2e727d4dfb7264d9416a8ba6bb6c18b ]
Similar to the handling of amdgpu_sa_bo_next_hole in commit 6a15f3ff19a8
("drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole"),
we thought a patch might be needed here as well.
The entries were
From: Xiaohui Zhang
[ Upstream commit 0381ac3ca2e727d4dfb7264d9416a8ba6bb6c18b ]
Similar to the handling of amdgpu_sa_bo_next_hole in commit 6a15f3ff19a8
("drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole"),
we thought a patch might be needed here as well.
The entries were
From: Xiaohui Zhang
[ Upstream commit feb54650bae25f2a2adfc493e3e254e7c27a3fba ]
Similar to the handling of amdgpu_mode_dumb_create in commit 54ef0b5461c0
("drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()"),
we thought a patch might be needed here as well.
args->size is a u64.
From: Xiaohui Zhang
[ Upstream commit 0381ac3ca2e727d4dfb7264d9416a8ba6bb6c18b ]
Similar to the handling of amdgpu_sa_bo_next_hole in commit 6a15f3ff19a8
("drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole"),
we thought a patch might be needed here as well.
The entries were
From: Xiaohui Zhang
[ Upstream commit feb54650bae25f2a2adfc493e3e254e7c27a3fba ]
Similar to the handling of amdgpu_mode_dumb_create in commit 54ef0b5461c0
("drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()"),
we thought a patch might be needed here as well.
args->size is a u64.
From: Rahul Kumar
[ Upstream commit 1c4dae3e4639540fb567e570cc56a3c292afb6fe ]
We observed hard hang due to NULL derefrence This issue is seen after
running system all the time after two or three days
struct dc *dc = plane_state->ctx->dc; Randomly in long run we found
plane_state or
From: Shah Dharati
[ Upstream commit b840b64bc8ed3fc46f6d6aa7f97c43862a33bea5 ]
[Why & How]
For a some specific monitors, when connected on boot or hot plug,
monitor flash for 1/2 seconds can happen during first HDCP query
operation. Ading some delay in the init sequence for these monitors
From: Xiaohui Zhang
[ Upstream commit feb54650bae25f2a2adfc493e3e254e7c27a3fba ]
Similar to the handling of amdgpu_mode_dumb_create in commit 54ef0b5461c0
("drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()"),
we thought a patch might be needed here as well.
args->size is a u64.
From: Xiaohui Zhang
[ Upstream commit 0381ac3ca2e727d4dfb7264d9416a8ba6bb6c18b ]
Similar to the handling of amdgpu_sa_bo_next_hole in commit 6a15f3ff19a8
("drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole"),
we thought a patch might be needed here as well.
The entries were
From: Duncan Ma
[ Upstream commit d4965c53b95d7533dfc2309d2fc25838bd33220e ]
[Why]
When switching from 1 pipe to 4to1 mpc combine,
DppDtoClk aren't enabled for the disabled pipes
pior to programming the pipes. Upon optimizing
bandwidth, DppDto are enabled causing intermittent
underflow.
[How]
From: Wayne Lin
[ Upstream commit 453b0016a054df0f442fda8a145b97a33816cab9 ]
[Why]
Once mst topology is constructed, later on new connected monitors
are reported to source by CSN message. Within CSN, there is no
carried info of DPCD_REV comparing to LINK_ADDRESS reply. As the
result, we might
From: Philip Yang
[ Upstream commit 0593ad215359d51514c1e6c81ce28ea598efed6b ]
If process has signal pending, mmu_notifier_get_locked fails and calls
ops->free_notifier, kfd_process_free_notifier will schedule
kfd_process_wq_release as process refcount is 1, but process structure
is already
[AMD Official Use Only - General]
I noticed that you added DCE and VCE/UVD prefixes in the columns, but not GC or
SDMA.
E.g.
CHIP DCE GC VCE
SDMA
BONAIRE DCE 8 7VCE 2 / UVD 4.21
For consistency, should we
From: Nicholas Kazlauskas
[ Upstream commit bc19909f19fdc8253d720d11c948935786fbfa08 ]
[Why]
In the case where we don't support DMUB aux but we have DPIA links
in the configuration we might try to message AUX using the legacy
path - where DDC pin is NULL. This causes a NULL pointer dereference.
From: "Stanley.Yang"
[ Upstream commit e0e146d5567317d6ba7d0169bed55d1d9ea05a61 ]
It should not init whole ras bad page framework on sriov guest side
due to it is handled on host side.
Signed-off-by: Stanley.Yang
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
From: Rahul Kumar
[ Upstream commit 1c4dae3e4639540fb567e570cc56a3c292afb6fe ]
We observed hard hang due to NULL derefrence This issue is seen after
running system all the time after two or three days
struct dc *dc = plane_state->ctx->dc; Randomly in long run we found
plane_state or
From: Darren Powell
[ Upstream commit ceb180361e3851007547c55035cd1de03f108f75 ]
[v2]
simplified fix after Lijo's feedback
removed clocks.num_levels from calculation of loop count
removed unsafe accesses to shim table freq_values
retained corner case output only min,now if
From: Shah Dharati
[ Upstream commit b840b64bc8ed3fc46f6d6aa7f97c43862a33bea5 ]
[Why & How]
For a some specific monitors, when connected on boot or hot plug,
monitor flash for 1/2 seconds can happen during first HDCP query
operation. Ading some delay in the init sequence for these monitors
From: Xiaohui Zhang
[ Upstream commit 0381ac3ca2e727d4dfb7264d9416a8ba6bb6c18b ]
Similar to the handling of amdgpu_sa_bo_next_hole in commit 6a15f3ff19a8
("drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole"),
we thought a patch might be needed here as well.
The entries were
From: Xiaohui Zhang
[ Upstream commit feb54650bae25f2a2adfc493e3e254e7c27a3fba ]
Similar to the handling of amdgpu_mode_dumb_create in commit 54ef0b5461c0
("drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()"),
we thought a patch might be needed here as well.
args->size is a u64.
From: Duncan Ma
[ Upstream commit d4965c53b95d7533dfc2309d2fc25838bd33220e ]
[Why]
When switching from 1 pipe to 4to1 mpc combine,
DppDtoClk aren't enabled for the disabled pipes
pior to programming the pipes. Upon optimizing
bandwidth, DppDto are enabled causing intermittent
underflow.
[How]
From: Wayne Lin
[ Upstream commit 453b0016a054df0f442fda8a145b97a33816cab9 ]
[Why]
Once mst topology is constructed, later on new connected monitors
are reported to source by CSN message. Within CSN, there is no
carried info of DPCD_REV comparing to LINK_ADDRESS reply. As the
result, we might
From: David Zhang
[ Upstream commit 6cc5c77300afbb285c4f41e04f3435ae3c484c40 ]
[why]
When DC driver send PSR exit dmub command to DMUB FW, it might not
wait until PSR exit. Then it may hit the following deadlock situation.
1. DC driver send HW LOCK command to DMUB FW due to frame update
2. DMUB
From: Philip Yang
[ Upstream commit 74097f9fd2f5ebdae04fcba59da345386415cbf3 ]
Move process queues cleanup to deferred work kfd_process_wq_release, to
avoid potential deadlock circular locking warning:
WARNING: possible circular locking dependency detected
the existing
From: Philip Yang
[ Upstream commit 0593ad215359d51514c1e6c81ce28ea598efed6b ]
If process has signal pending, mmu_notifier_get_locked fails and calls
ops->free_notifier, kfd_process_free_notifier will schedule
kfd_process_wq_release as process refcount is 1, but process structure
is already
From: lin cao
[ Upstream commit 748262eb400e809aa13e3485f4983c3db3d0ebb3 ]
In the case of SRIOV, the register smnMp1_PMI_3_FIFO will get an invalid
value which will cause the "shift out of bound". In Ubuntu22.04, this
issue will be checked an related call trace will be reported in dmesg.
From: Alex Deucher
[ Upstream commit 0a94608f0f7de9b1135ffea3546afe68eafef57f ]
Drop execute.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2085
Reviewed-by: Guchun Chen
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
From: Dmytro Laktyushkin
[ Upstream commit 8a077d9caa3a274de36ee2fe7b608041f5690343 ]
This w/a has a bad interaction with seamless boot toggling an
active stream. Most panels recover, however some fail leading
to display corruption.
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
In the DCN code, we constantly talk about hardware pipeline, pipeline,
or even just pipes, which is a concept that is not obvious to everyone.
For this reason, this commit expands the DCN overview explanation by
adding a new section that describes what a pipeline is from the DCN
perspective.
Multiple plane overlay is a feature supported by AMD hardware, but it
has specific details that deserve proper documentation. This commit
introduces a documentation that describes some of the features,
limitations, and use cases for this feature. Part of this documentation
came from some
Amdgpu driver is used in an extensive range of devices, and each ASIC
has some specific configuration. As a result of this variety, sometimes
it is hard to identify the correct block that might cause the issue.
This commit expands the amdgpu kernel-doc to alleviate this issue by
introducing one
This patchset introduces some new AMDGPU documentation. You will find:
1. A CSV table that maps which component version is part of some ASIC
families. This can be useful to narrow down bugs;
2. Some explanation about AMD Display Pipeline;
3. An explanation of Multiple Plane Overlay, which can
From: Fangzhi Zuo
[ Upstream commit 22676bc500c27d987a0b42cbe162aebf783f1c38 ]
[Why]
Unexpected change of aux hw mapping causes dmub soft hang when
initiate aux transation at wrong aux channel.
ddc_channel stands for hw dp aux index which is from vbios,
but link_index is pure software concept
From: Nicholas Kazlauskas
[ Upstream commit bc19909f19fdc8253d720d11c948935786fbfa08 ]
[Why]
In the case where we don't support DMUB aux but we have DPIA links
in the configuration we might try to message AUX using the legacy
path - where DDC pin is NULL. This causes a NULL pointer dereference.
From: "Stanley.Yang"
[ Upstream commit e0e146d5567317d6ba7d0169bed55d1d9ea05a61 ]
It should not init whole ras bad page framework on sriov guest side
due to it is handled on host side.
Signed-off-by: Stanley.Yang
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
From: Rahul Kumar
[ Upstream commit 1c4dae3e4639540fb567e570cc56a3c292afb6fe ]
We observed hard hang due to NULL derefrence This issue is seen after
running system all the time after two or three days
struct dc *dc = plane_state->ctx->dc; Randomly in long run we found
plane_state or
From: Darren Powell
[ Upstream commit ceb180361e3851007547c55035cd1de03f108f75 ]
[v2]
simplified fix after Lijo's feedback
removed clocks.num_levels from calculation of loop count
removed unsafe accesses to shim table freq_values
retained corner case output only min,now if
From: Shah Dharati
[ Upstream commit b840b64bc8ed3fc46f6d6aa7f97c43862a33bea5 ]
[Why & How]
For a some specific monitors, when connected on boot or hot plug,
monitor flash for 1/2 seconds can happen during first HDCP query
operation. Ading some delay in the init sequence for these monitors
From: Xiaohui Zhang
[ Upstream commit 0381ac3ca2e727d4dfb7264d9416a8ba6bb6c18b ]
Similar to the handling of amdgpu_sa_bo_next_hole in commit 6a15f3ff19a8
("drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole"),
we thought a patch might be needed here as well.
The entries were
From: Xiaohui Zhang
[ Upstream commit feb54650bae25f2a2adfc493e3e254e7c27a3fba ]
Similar to the handling of amdgpu_mode_dumb_create in commit 54ef0b5461c0
("drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()"),
we thought a patch might be needed here as well.
args->size is a u64.
From: Rodrigo Siqueira
[ Upstream commit c55300ad4a1814bac9191a4d2c7b0d74273aec7c ]
GCC throw warnings for the function dcn20_update_bounding_box due to its
frame size that looks like this:
error: the frame size of 1936 bytes is larger than 1024 bytes
[-Werror=frame-larger-than=]
This
From: Duncan Ma
[ Upstream commit d4965c53b95d7533dfc2309d2fc25838bd33220e ]
[Why]
When switching from 1 pipe to 4to1 mpc combine,
DppDtoClk aren't enabled for the disabled pipes
pior to programming the pipes. Upon optimizing
bandwidth, DppDto are enabled causing intermittent
underflow.
[How]
From: Wayne Lin
[ Upstream commit 453b0016a054df0f442fda8a145b97a33816cab9 ]
[Why]
Once mst topology is constructed, later on new connected monitors
are reported to source by CSN message. Within CSN, there is no
carried info of DPCD_REV comparing to LINK_ADDRESS reply. As the
result, we might
From: David Zhang
[ Upstream commit 6cc5c77300afbb285c4f41e04f3435ae3c484c40 ]
[why]
When DC driver send PSR exit dmub command to DMUB FW, it might not
wait until PSR exit. Then it may hit the following deadlock situation.
1. DC driver send HW LOCK command to DMUB FW due to frame update
2. DMUB
From: Philip Yang
[ Upstream commit 74097f9fd2f5ebdae04fcba59da345386415cbf3 ]
Move process queues cleanup to deferred work kfd_process_wq_release, to
avoid potential deadlock circular locking warning:
WARNING: possible circular locking dependency detected
the existing
From: Philip Yang
[ Upstream commit 0593ad215359d51514c1e6c81ce28ea598efed6b ]
If process has signal pending, mmu_notifier_get_locked fails and calls
ops->free_notifier, kfd_process_free_notifier will schedule
kfd_process_wq_release as process refcount is 1, but process structure
is already
From: lin cao
[ Upstream commit 748262eb400e809aa13e3485f4983c3db3d0ebb3 ]
In the case of SRIOV, the register smnMp1_PMI_3_FIFO will get an invalid
value which will cause the "shift out of bound". In Ubuntu22.04, this
issue will be checked an related call trace will be reported in dmesg.
From: Alex Deucher
[ Upstream commit 0a94608f0f7de9b1135ffea3546afe68eafef57f ]
Drop execute.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2085
Reviewed-by: Guchun Chen
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
From: xinhui pan
[ Upstream commit cc3cb791f19ad0c4f951f38c98aa513b042ab329 ]
Queue would be freed when create_queue_cpsch fails
So lets do queue cleanup otherwise various list and memory issues
happen.
Signed-off-by: xinhui pan
Reviewed-by: Philip Yang
Signed-off-by: Alex Deucher
From: Dmytro Laktyushkin
[ Upstream commit 8a077d9caa3a274de36ee2fe7b608041f5690343 ]
This w/a has a bad interaction with seamless boot toggling an
active stream. Most panels recover, however some fail leading
to display corruption.
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
From: Fangzhi Zuo
[ Upstream commit 22676bc500c27d987a0b42cbe162aebf783f1c38 ]
[Why]
Unexpected change of aux hw mapping causes dmub soft hang when
initiate aux transation at wrong aux channel.
ddc_channel stands for hw dp aux index which is from vbios,
but link_index is pure software concept
[Public]
> -Original Message-
> From: Kuehling, Felix
> Sent: August 11, 2022 11:19 AM
> To: amd-gfx@lists.freedesktop.org; Kim, Jonathan
> Subject: Re: [PATCH] drm/amdgpu: fix reset domain xgmi hive info reference
> leak
>
> Am 2022-08-11 um 09:42 schrieb Jonathan Kim:
> > When an xgmi
From: Nicholas Kazlauskas
[ Upstream commit bc19909f19fdc8253d720d11c948935786fbfa08 ]
[Why]
In the case where we don't support DMUB aux but we have DPIA links
in the configuration we might try to message AUX using the legacy
path - where DDC pin is NULL. This causes a NULL pointer dereference.
From: "Stanley.Yang"
[ Upstream commit e0e146d5567317d6ba7d0169bed55d1d9ea05a61 ]
It should not init whole ras bad page framework on sriov guest side
due to it is handled on host side.
Signed-off-by: Stanley.Yang
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
From: Rahul Kumar
[ Upstream commit 1c4dae3e4639540fb567e570cc56a3c292afb6fe ]
We observed hard hang due to NULL derefrence This issue is seen after
running system all the time after two or three days
struct dc *dc = plane_state->ctx->dc; Randomly in long run we found
plane_state or
From: Darren Powell
[ Upstream commit ceb180361e3851007547c55035cd1de03f108f75 ]
[v2]
simplified fix after Lijo's feedback
removed clocks.num_levels from calculation of loop count
removed unsafe accesses to shim table freq_values
retained corner case output only min,now if
From: Philip Yang
[ Upstream commit ab8529b0cdb271d9b222cbbddb2641f3fca5df8f ]
After queue unmap or remove from MES successfully, free queue sysfs
entries, doorbell and remove from queue list. Otherwise, application may
destroy queue again, cause below kernel warning or crash backtrace.
For
From: Shah Dharati
[ Upstream commit b840b64bc8ed3fc46f6d6aa7f97c43862a33bea5 ]
[Why & How]
For a some specific monitors, when connected on boot or hot plug,
monitor flash for 1/2 seconds can happen during first HDCP query
operation. Ading some delay in the init sequence for these monitors
From: Xiaohui Zhang
[ Upstream commit 0381ac3ca2e727d4dfb7264d9416a8ba6bb6c18b ]
Similar to the handling of amdgpu_sa_bo_next_hole in commit 6a15f3ff19a8
("drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole"),
we thought a patch might be needed here as well.
The entries were
From: Rodrigo Siqueira
[ Upstream commit c55300ad4a1814bac9191a4d2c7b0d74273aec7c ]
GCC throw warnings for the function dcn20_update_bounding_box due to its
frame size that looks like this:
error: the frame size of 1936 bytes is larger than 1024 bytes
[-Werror=frame-larger-than=]
This
From: Xiaohui Zhang
[ Upstream commit feb54650bae25f2a2adfc493e3e254e7c27a3fba ]
Similar to the handling of amdgpu_mode_dumb_create in commit 54ef0b5461c0
("drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()"),
we thought a patch might be needed here as well.
args->size is a u64.
From: Duncan Ma
[ Upstream commit d4965c53b95d7533dfc2309d2fc25838bd33220e ]
[Why]
When switching from 1 pipe to 4to1 mpc combine,
DppDtoClk aren't enabled for the disabled pipes
pior to programming the pipes. Upon optimizing
bandwidth, DppDto are enabled causing intermittent
underflow.
[How]
From: Duncan Ma
[ Upstream commit 0c56705d8aae9696348cc320b71d531ede001b79 ]
[Why]
In 3-way mpo pipes, there is a case that we
overbook the CRB buffer size. At rare instances,
overbooking the crb will cause underflow. This only
happens when det_size changes dynamically
based on pipe_cnt.
[How]
From: Wayne Lin
[ Upstream commit 453b0016a054df0f442fda8a145b97a33816cab9 ]
[Why]
Once mst topology is constructed, later on new connected monitors
are reported to source by CSN message. Within CSN, there is no
carried info of DPCD_REV comparing to LINK_ADDRESS reply. As the
result, we might
From: David Zhang
[ Upstream commit 6cc5c77300afbb285c4f41e04f3435ae3c484c40 ]
[why]
When DC driver send PSR exit dmub command to DMUB FW, it might not
wait until PSR exit. Then it may hit the following deadlock situation.
1. DC driver send HW LOCK command to DMUB FW due to frame update
2. DMUB
Am 2022-08-11 um 09:42 schrieb Jonathan Kim:
When an xgmi node is added to the hive, it takes another hive
reference for its reset domain.
This extra reference was not dropped on device removal from the
hive so drop it.
Signed-off-by: Jonathan Kim
---
Am 2022-08-10 um 19:41 schrieb Felix Kuehling:
On systems that support SMT (hyperthreading) schedule the bottom half of
the KFD interrupt handler on the same core. This makes it possible to
reserve a core for interrupt handling and have the bottom half run on
that same core.
On systems without
On Thu, Aug 11, 2022 at 10:16 AM Liu, Shaoyun wrote:
>
> [AMD Official Use Only - General]
>
> From HW point of view , the maximum VF number can reach 16 instead of 12 .
> Although currently no product will use the 16 VFs together, not sure about
> the future.
> You can added Acked-by me.
[AMD Official Use Only - General]
>From HW point of view , the maximum VF number can reach 16 instead of 12 .
>Although currently no product will use the 16 VFs together, not sure about
>the future.
You can added Acked-by me. I will let Alex & Christion decide whether accept
this change.
On Thu, Aug 11, 2022 at 7:32 AM Zhenneng Li wrote:
>
> When using amdgpu for e8860, the monitor sometimes haven't any signal,
> and the kernel reports some errors:
> [ 17.317302][ 2] [ T1045] [drm:amdgpu_atombios_dp_link_train [amdgpu]]
> *ERROR* channel eq failed: 5 tries
> [ 17.326963][ 2]
When an xgmi node is added to the hive, it takes another hive
reference for its reset domain.
This extra reference was not dropped on device removal from the
hive so drop it.
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 3 +++
1 file changed, 3 insertions(+)
diff
On 8/11/22 04:37, David Gow wrote:
On Thu, Aug 11, 2022 at 8:41 AM Tales Aparecida
wrote:
From: Maíra Canal
Add unit test to the SubVP feature in order to avoid possible
regressions and assure the code robustness.
Signed-off-by: Maíra Canal
Signed-off-by: Tales Aparecida
---
FYI:
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