On 2018-01-30 12:36 PM, Nicolai Hähnle wrote:
> On 30.01.2018 12:34, Michel Dänzer wrote:
>> On 2018-01-30 12:28 PM, Christian König wrote:
>>> Am 30.01.2018 um 12:02 schrieb Michel Dänzer:
>>>> On 2018-01-30 11:40 AM, Christian König wrote:
>>>>>
On 2018-02-08 10:15 AM, Chunming Zhou wrote:
> On 2018年02月08日 17:09, Michel Dänzer wrote:
>> On 2018-02-08 09:32 AM, Chunming Zhou wrote:
>>> it will be used to check if the driver needs swiotlb
>>>
>>> Change-Id: Idbe47af8f12032d4803bb3d47273e807f19169c3
>&g
)
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On 2018-02-09 07:01 AM, Chunming Zhou wrote:
> On 2018年02月08日 17:13, Chunming Zhou wrote:
>> On 2018年02月08日 17:01, Michel Dänzer wrote:
>>>
>>> this change completely broke radeonsi due to memory management errors
>>> (see valgrind output for glxgears bel
From: Michel Dänzer <michel.daen...@amd.com>
If the latter fails, Xorg will call AMDGPUFreeScreen_KMS, which calls
the former.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/amdgpu_kms.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
From: Michel Dänzer <michel.daen...@amd.com>
This can happen if PreInit fails early.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/amdgpu_kms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amdgpu_kms.c b/src/amdgpu_kms.c
index 7dc9e22a
From: Michel Dänzer <michel.daen...@amd.com>
DRI clients can use depth 32 pixmaps while the screen is depth 24, in
which case page flipping would fail.
Reported-by: Mario Kleiner <mario.kleiner...@gmail.com>
(Ported from radeon commit 733f606dd6ca8350e6e7f0858bfff5454ddc98ed)
From: Mario Kleiner <mario.kleiner...@gmail.com>
This allows to en-/disable some functions depending on individual screen
settings.
Prep work for more efficient depth 30 support.
Suggested-by: Michel Dänzer <michel.daen...@amd.com>
Signed-off-by: Mario Kleiner <mario.klein
From: Hawking Zhang <hawking.zh...@amd.com>
Signed-off-by: Hawking Zhang <hawking.zh...@amd.com>
[ Michel Dänzer:
* Require Xorg >= 1.19.99.1 for depth 30, otherwise it can't work with glamor
* Update manpage, per radeon commit
574bfab4bf1fcd95163a8f33cea2889189429d30 ]
Signed
From: Qiang Yu <qiang...@amd.com>
gamma set is disabled in kernel driver when deep color.
Enable it will confuse the user.
Signed-off-by: Qiang Yu <qiang...@amd.com>
[ Michel Dänzer: Align drmmode_pre_init change with radeon commit
1f1d4b1fa7d4b22dd8553f7e71251bf17ca7a7b1 ]
fferent drivers, so this is
not possible.
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From: Michel Dänzer <michel.daen...@amd.com>
Instead of not starting up at all.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/amdgpu_kms.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/amdgpu_kms.c b/src/amdgpu_kms.c
ind
h like the same amdgpu_bo, and cosequently the same TTM BO being
> shared by two GEM objects and two devices.
amdgpu_gem_prime_foreign_bo doesn't exist in amd-staging-drm-next, let
alone upstream. Even on current internal branches, it's no longer used
for dma-buf import AFAICT.
-
From: Michel Dänzer <michel.daen...@amd.com>
Corresponding to amdgpu commit 6aee5770fb913713bb1b9a1af8f0d0892a66f21a.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
man/radeon.man | 2 +-
src/radeon_kms.c | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff
From: Michel Dänzer <michel.daen...@amd.com>
It crashes if info == NULL.
(Ported from amdgpu commits fb8444e731765588c0ff1e9053c1c7b73f5f0907 &
cfccf4c4e7e5c73fe4040fabeb1b43283cf29b33)
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/r
From: Michel Dänzer <michel.daen...@amd.com>
It's safe now.
(Ported from amdgpu commit c9bd1399a13cea2e1331af2c826ca054b88db071)
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/radeon_kms.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/src/radeon
From: Michel Dänzer <michel.daen...@amd.com>
If the latter fails, Xorg will call RADEONFreeScreen_KMS, which calls
the former.
(Ported from amdgpu commit 103b7285845b786929fb509083c57e074c48f9be)
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/radeo
From: Michel Dänzer <michel.daen...@amd.com>
This reverts commit a23d1ff700d486138c624c2023d8d251c73709af.
pAMDGPUEnt cannot be NULL anymore here now that we no longer call
AMDGPUFreeRec directly from AMDGPUPreInit_KMS.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/
On 2018-02-09 03:44 AM, Chunming Zhou wrote:
> it will be used to check if the driver needs swiotlb
> v2: Don't use inline, instead, move function to drm_memory.c (Mechel Daenzer
> <mic...@daenzer.net>)
Typo in my first name. With that fixed,
Reviewed-by: Michel Dänzer <mich
On 2018-02-15 10:05 PM, Harry Wentland wrote:
> On 2018-02-15 12:49 PM, Michel Dänzer wrote:
>> From: Michel Dänzer <michel.daen...@amd.com>
>>
>> If we fail to find or set the mode for a CRTC, keep trying for the
>> remaining CRTCs, and only return FALSE if we fa
From: Michel Dänzer <michel.daen...@amd.com>
Instead of not starting up at all.
Corresponding to amdgpu commit 37c7260bdef3a53b0f0295a531f33938e9aad8cf.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/radeon_glamor.c | 8
src/radeon_kms.c| 9 --
From: Michel Dänzer <michel.daen...@amd.com>
If we fail to find or set the mode for a CRTC, keep trying for the
remaining CRTCs, and only return FALSE if we failed for all CRTCs that
should be on.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/drmmode_di
From: Michel Dänzer <michel.daen...@amd.com>
We know it's depth 30, need to have xf86DrvMsg fill it in.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/radeon_kms.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/radeon_kms.c b/src/radeon
rt by sharing the dmesg output, and maybe also the kernel build
configuration file.
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Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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On 2018-02-21 10:18 AM, Bas Vermeulen wrote:
> On Wed, Feb 21, 2018 at 10:06 AM, Michel Dänzer <mic...@daenzer.net
> <mailto:mic...@daenzer.net>> wrote:
>
> > My question is, what do I need to do to correctly initialize the E8860
> > board on my powerpc m
in big endian mode
(CONFIG_CPU_BIG_ENDIAN=y), doesn't it? If so, be warned that this is
just the tip of the iceberg. The Mesa radeonsi driver doesn't work on
big endian hosts yet, fixing that would involve a lot of work and pain.
And without that, you won't be able to actually use any hardware
acceleration.
--
On 2018-02-22 09:29 AM, Christian König wrote:
> We have a global dummy page in TTM, use that one instead of allocating a
> new one.
>
> Signed-off-by: Christian König <christian.koe...@amd.com>
Reviewed-by: Michel Dänzer <michel.daen...@amd.com>
--
From: Michel Dänzer <michel.daen...@amd.com>
This might avoid modeset failures in some cases where a CRTC which isn't
used by Xorg was enabled before.
(Ported from amdgpu commit e3aae7a24296f640c0153d1459f3e0820485468a)
Signed-off-by: Michel Dänzer <michel.daen...@amd.com&
every property provided by the kernel, sending
changes to DIX so it can track things as well.
Signed-off-by: Keith Packard <kei...@keithp.com>
(Ported from xserver commit a12485ed846b852ca14d17d1e58c8b0f2399e577,
slightly modifying logic to reduce indentation depth)
Signed-off-by: Michel Dänzer
From: Daniel Martin <consume.no...@gmail.com>
Replace the various loops to lookup drmModeProperty(Blob)s by
introducing helper functions.
Signed-off-by: Daniel Martin <consume.no...@gmail.com>
(Ported from xserver commit f44935cdb7321af242ce9f242975f096807b97f7)
Signed-off-by: M
should
be very hard to hit.
Signed-off-by: Daniel Martin <consume.no...@gmail.com>
(Ported from xserver commit 6804875662363764683a86c1614e4cf3cc70a20a)
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/drmmode_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
740))
> rdev->need_dma32 = true;
> +#ifdef CONFIG_PPC64
> + if ((rdev->flags & (RADEON_IS_PCI | RADEON_IS_PCIE)) &&
Cedar is (like all Radeons from the last decade) always PCIe, so this
flags check is redundant FWIW.
--
Earthli
self is
always PCIe, and treated accordingly by the driver.
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Libre software enthusiast | Mesa and X developer
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From: Michel Dänzer <michel.daen...@amd.com>
This might avoid modeset failures in some cases where a CRTC which isn't
used by Xorg was enabled before.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/drmmode_display.c | 33 +
1 file
From: Michel Dänzer <michel.daen...@amd.com>
If we fail to find or set the mode for a CRTC, keep trying for the
remaining CRTCs, and only return FALSE if we failed for all CRTCs that
should be on.
(Ported from amdgpu commit f5ac5f385f41d1547cfd7ccc8bb35a537a8fffeb)
Signed-off-by: Michel
nth. I'm planning to change the versioning scheme to be year based,
i.e. the next release will be 18.0, then 18.1, then probably 19.0 etc.
Same for xf86-video-ati. Any concerns or comments?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast
On 2018-02-16 03:18 PM, Harry Wentland wrote:
> On 2018-02-16 03:29 AM, Michel Dänzer wrote:
>> On 2018-02-15 10:05 PM, Harry Wentland wrote:
>>> On 2018-02-15 12:49 PM, Michel Dänzer wrote:
>>>> From: Michel Dänzer <michel.daen...@amd.com>
>>>>
&g
From: Michel Dänzer <michel.daen...@amd.com>
If we fail to find or set the mode for a CRTC, keep trying for the
remaining CRTCs, and only return FALSE if we failed for all CRTCs that
should be on.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
v2:
Print warning messages
CONFIG_MTRR and CONFIG_X86_PAT for better performance
> \
>thanks to write-combining
> +#endif
>
> if (bo->flags & RADEON_GEM_GTT_WC)
> DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for
> "
>
Merged on the internal amd-sta
From: Michel Dänzer <michel.daen...@amd.com>
For consistency with other DCE generations.
HPD IRQs appear to be working fine.
Signed-off-by: Michel Dänzer <mic...@daenzer.net>
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 2
On 2017-12-27 09:49 PM, Mario Kleiner wrote:
> On 12/27/2017 12:56 PM, Michel Dänzer wrote:
>> On 2017-12-23 07:07 AM, Mario Kleiner wrote:
>>> The hardware gamma luts get bypassed at color
>>> depth 30 anyway, so skip their setup.
>>>
>>> Al
On 2017-12-22 02:49 AM, Mario Kleiner wrote:
> On 12/19/2017 09:58 AM, Michel Dänzer wrote:
>> On 2017-12-18 11:36 PM, Mario Kleiner wrote:
>>> The size of the X-Server pScreenPriv->PreAllocIndices
>>> array allocated within xf86HandleColormaps() is given
>&
From: Michel Dänzer <michel.daen...@amd.com>
And bail if xf86_cursors_init fails.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/amdgpu_kms.c | 44 +---
1 file changed, 25 insertions(+), 19 deletions(-)
diff --git a/src/amdgpu
From: Michel Dänzer <michel.daen...@amd.com>
And use this to determine when we cannot use page flipping for DRI
clients. We previously did this based on whether the HW cursor cannot
be used on at least one CRTC, which had at least two issues:
* Even while the HW cursor cannot be used,
700 (8 cores, 16
threads) system with 16 GB of RAM.
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sure, but I suspect these messages are harmless, given that
things are otherwise presumably still working as well as they were before.
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Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_
lidPicture =>
createSourcePicture in xserver/render/picture.c).
I'll just take v1 of this patch with Fredrik's Signed-off-by (thanks).
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_
ichel.
>
> Signed-off-by: Mario Kleiner <mario.kleiner...@gmail.com>
Reviewed-by: Michel Dänzer <michel.daen...@amd.com>
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast
From: Michel Dänzer <michel.daen...@amd.com>
And use this to determine when we cannot use page flipping for DRI
clients. We previously did this based on whether the HW cursor cannot
be used on at least one CRTC, which had at least two issues:
* Even while the HW cursor cannot be used,
From: Michel Dänzer <michel.daen...@amd.com>
And bail if xf86_cursors_init fails.
(Ported from amdgpu commit dfccaa7043ccb157a1f8be7313123792bb7e7001)
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
src/radeon_kms.c | 44 +---
1
xf86CrtcFuncsRec::gamma_set = NULL in this case, to
prevent the X server from wasting work calculating gamma tables that
will never be used.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X develope
On 2018-01-02 10:57 AM, He, Roger wrote:
> Original Message-
> From: Michel Dänzer [mailto:mic...@daenzer.net]
> Sent: Wednesday, December 27, 2017 4:58 PM
> To: He, Roger <hongbo...@amd.com>; Koenig, Christian
> <christian.koe...@amd.com>; Grodzovsky, Andrey
mic_commit_tail+0xbfc/0xe58 [amdgpu])
> ...
Does the problem also occur if you disable DC with amdgpu.dc=0 on the
kernel command line?
Does it also happen with a kernel built from the amd-staging-drm-next
branch instead of drm-next-4.16?
--
Earthling Michel Dänzer |
pposed to do, and kills the broken application.
>
> As I understand it, this change is adds artificial limitations to
> workaround a bug in a user mode test.
I'm afraid it's not that simple. While triggering the OOM killer might
be acceptable or even expected, hard hangs aren't.
--
Ea
in
> atomic_commit_tail()")
> Signed-off-by: Lyude Paul
> Cc: Michel Dänzer
> Reported-by: Michel Dänzer
Actually, it was reported by Tom St Denis . With
that fixed,
Acked-by: Michel Dänzer
(needs review by DC folks)
--
Earthling Michel Dänzer |
From: Michel Dänzer
start / last / max_entries are numbers of GPU pages, pfn / count are
numbers of CPU pages. Convert between them accordingly.
Fixes badness on systems with > 4K page size.
Cc: sta...@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106258
Repor
From: Michel Dänzer
We were only storing the FB provided by the client, but on CRTCs with
TearFree enabled, we use a separate FB. This could cause
drmmode_flip_handler to fail to clear drmmode_crtc->flip_pending, which
could result in a hang when waiting for the pending flip to complete. We
w
From: Michel Dänzer
Not doing this resulted in falling back to software for DRI3 client
presentation operations with ShadowPrimary.
(Ported from amdgpu commit 2989d40ef74d9966e8e8df2ef7727b2cc48d4960)
Signed-off-by: Michel Dänzer
---
src/radeon_dri3.c | 1 +
1 file changed, 1 insertion
From: Michel Dänzer
Inspired by the modesetting driver.
(Ported from radeon commit db28d35ce9fd07a2a4703f3df0633d4c8291ff9b)
Signed-off-by: Michel Dänzer
---
src/amdgpu_glamor.c | 32 ++--
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/src
From: Michel Dänzer
The allocated size can be (at least?) as large as megabytes, and
there's no need for it to be physically contiguous.
May avoid spurious failures to initialize / suspend the corresponding
block while there's memory pressure.
Bugzilla: https://bugs.freedesktop.org/107432
On 2018-08-03 01:34 PM, Christian König wrote:
> This way we can always find a BO structure by its handle.
>
> Signed-off-by: Christian König
In the shortlog, should be "handle table" instead of "lockup table"?
With that fixed, the series is
Reviewed-by: Mich
From: Michel Dänzer
Instead of the Xorg version. This should allow glamor backported from
xserver >= 1.20 to work with older Xorg versions.
Signed-off-by: Michel Dänzer
---
src/amdgpu_glamor.c | 8
src/amdgpu_kms.c| 20
2 files changed, 16 insertions(+),
From: Michel Dänzer
Instead of processing DRM events directly from drmHandleEvent's
callbacks, there are three phases:
1. drmHandleEvent is called, and signalled events are re-queued to
_signalled lists from its callbacks.
2. Signalled page flip completion events are processed.
3. Signalled
From: Michel Dänzer
This is to avoid submitting more flips while we are waiting for pending
ones to complete.
Signed-off-by: Michel Dänzer
---
v2:
* Rebased on top of new patch 2.5
src/amdgpu_drm_queue.c | 41 +++--
src/amdgpu_drm_queue.h | 1 +
src
From: Michel Dänzer
Inspired by the modesetting driver.
Fixes screen pixmap corruption with Xorg < 1.20, and as a bonus,
simplifies the code slightly.
Bugzilla: https://bugs.freedesktop.org/107385
Signed-off-by: Michel Dänzer
---
src/radeon_glamor.c | 28
1 f
On 2018-07-27 11:33 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> Inspired by the modesetting driver.
>
> Fixes screen pixmap corruption with Xorg < 1.20, and as a bonus,
> simplifies the code slightly.
Unfortunately, turns out this patch as is breaks compilation
TM patches need to be sent to the dri-devel list as well for review.
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Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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From: Michel Dänzer
Inspired by the modesetting driver.
Fixes screen pixmap corruption with Xorg < 1.20, and as a bonus,
simplifies the code slightly.
v2:
* Now doesn't break with xserver 1.20
Bugzilla: https://bugs.freedesktop.org/107385
Signed-off-by: Michel Dänzer
---
src/radeon_glamo
On 2018-07-27 03:39 PM, Christian König wrote:
> Otherwise we silently don't use a BO list when the handle is invalid.
>
> Signed-off-by: Christian König
Reviewed-by: Michel Dänzer
--
Earthling Michel Dänzer | http://www.amd.com
Libre software e
From: Michel Dänzer
We were only storing the FB provided by the client, but on CRTCs with
TearFree enabled, we use a separate FB. This could cause
drmmode_flip_handler to fail to clear drmmode_crtc->flip_pending, which
could result in a hang when waiting for the pending flip to complete. We
w
On 2018-07-30 08:12 PM, Alex Deucher wrote:
> On Fri, Jul 27, 2018 at 12:04 PM, Michel Dänzer wrote:
>> From: Michel Dänzer
>>
>> We were only storing the FB provided by the client, but on CRTCs with
>> TearFree enabled, we use a separate FB. This could cause
>
ble *table, uint32_t
> key)
> +{
> + return table->values[key];
> +}
Typo: Should be "lookup", not "lockup".
Maybe these should check that key < table->max_key, to prevent memory
outside of the table from getting corrupted by buggy caller
*shared_handle = bo->handle;
> return 0;
This is a bit unfortunate, amdgpu_bo_handle_type_kms_noimport only just
landed this week for the 2.4.93 release, now it'll already be useless
noise... A bit more coordination would have been nice. :)
Anyway, with the typo in pat
if (!dc_is_dp_signal(link->connector_signal))
> + return false;
> default:
> break;
> }
>
Could this be problematic with VGA connectors? AFAIR e.g. KVM switches
can cause trouble with retrievin
CPU
speculatively executing the following code assuming idx <
ARRAY_SIZE(data.states), and extracting information from the incorrectly
speculated code via side channels.
I'm not sure if that's actually possible in this case, but better safe
than sorry?
--
Earthling M
CONFIG_DRM_AMD_DC_DCN1_0 to be accidentally disabled on X86 again. If it
is reinstated, it should be strictly derived from other options, not
changeable by the user.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X d
From: Michel Dänzer
Arithmetic using void* pointers isn't defined by the C standard, only as
a GCC extension. Avoids compiler warnings:
../../amdgpu/amdgpu_bo.c: In function ‘amdgpu_find_bo_by_cpu_mapping’:
../../amdgpu/amdgpu_bo.c:554:48: warning: pointer of type ‘void *’ used in
arithmetic
From: Michel Dänzer
The compiler points out that an int doesn't work as intended if
dev->bo_handles.max_key > INT_MAX:
../../amdgpu/amdgpu_bo.c: In function ‘amdgpu_find_bo_by_cpu_mapping’:
../../amdgpu/amdgpu_bo.c:550:16: warning: comparison of integer expressions of
different sign
On 2018-08-15 03:07 AM, Zhang, Jerry (Junwei) wrote:
> On 08/14/2018 05:58 PM, Michel Dänzer wrote:
>> From: Michel Dänzer
>>
>> Arithmetic using void* pointers isn't defined by the C standard, only as
>> a GCC extension. Avoids compiler warnings:
>>
>>
From: Michel Dänzer
Arithmetic using void* pointers isn't defined by the C standard, only as
a GCC extension. Avoids compiler warnings:
../../amdgpu/amdgpu_bo.c: In function ‘amdgpu_find_bo_by_cpu_mapping’:
../../amdgpu/amdgpu_bo.c:554:48: warning: pointer of type ‘void *’ used in
arithmetic
On 2018-08-10 09:06 AM, Johannes Hirte wrote:
> On 2018 Jul 27, Michel Dänzer wrote:
>> From: Michel Dänzer
>>
>> We were only storing the FB provided by the client, but on CRTCs with
>> TearFree enabled, we use a separate FB. This could cause
>> drmmode_flip_hand
From: Michel Dänzer
Instead of processing DRM events directly from drmHandleEvent's
callbacks, there are three phases:
1. drmHandleEvent is called, and signalled events are re-queued to
_signalled lists from its callbacks.
2. Signalled page flip completion events are processed.
3. Signalled
From: Michel Dänzer
Replacing the drmmode_crtc_wait_pending_event macro.
(Ported from amdgpu commit 6029794e8a35417faf825491a89b85f713c77fc1)
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 21 -
src/radeon_drm_queue.c | 13 +
src/radeon_drm_queue.h
From: Michel Dänzer
Not needed anymore with the more robust mechanisms for preventing nested
drmHandleEvent calls introduced in the previous changes.
(Ported from amdgpu commit 85cd8eef0cbed7b409b07f58d76dacd34aa3ddea)
Signed-off-by: Michel Dänzer
---
src/drmmode_display.h | 8
src
From: Michel Dänzer
And make radeon_drm_queue_handler not directly accessible outside of
radeon_drm_queue.c.
(Ported from amdgpu commit 0148283984c77f7a6e97026edc3093497547e0a4)
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 4
src/radeon_dri2.c | 14 --
src
From: Michel Dänzer
Replacing the drmmode_crtc_wait_pending_event macro.
(Ported from amdgpu commit 6029794e8a35417faf825491a89b85f713c77fc1)
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 18 --
src/drmmode_display.h | 4
src/radeon_drm_queue.c | 41
From: Michel Dänzer
We were always using the handle of the client provided FB, which
prevented RandR transforms from working, and could result in a black
screen.
Fixes: 740f0850f1e4 "Store FB for each CRTC in drmmode_flipdata_rec"
(Ported from amd
support for display engine
>
> config DEBUG_KERNEL_DC
> bool "Enable kgdb break in DC"
>
Thanks Leo, Alex, Arnd et al for taking care of this! Apologies for the
trouble caused by my change, and for not helping much with the solution
(I
From: Michel Dänzer
We were always using the handle of the client provided FB, which
prevented RandR transforms from working, and could result in a black
screen.
Fixes: 9b6782c821e0 "Store FB for each CRTC in drmmode_flipdata_rec"
Signed-off-by: Michel Dänzer
---
src/drmmode_dis
e 4.19
release. The relevant fixes were marked for backporting to stable, so
they should appear in future 4.18.y releases as well.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
default "0x"
> + help
> + Modify this option to disable any IP block of amdgpu.
As I said before, IMO this doesn't belong upstream, as it's a workaround
for a downstream issue.
Also, this isn't generally usable on a system with multiple GPUs
supported by a
e
there, or the driver is built into the kernel, but the firmware isn't
built into the kernel.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
___
amd-gf
On 2018-08-23 2:59 p.m., Zhu, Rex wrote:
>> From: Michel Dänzer
>> On 2018-08-23 11:24 a.m., Rex Zhu wrote:
>>> Forgot to add vce pg support via smu for Kaveri/Mullins.
>>>
>>> Regresstion issue caused by
>>> 'commit 561a5c83
From: Michel Dänzer
Although normally it only warns about it, under some circumstances,
aclocal can error out if this directory doesn't exist.
Signed-off-by: Michel Dänzer
---
.gitignore| 5 -
m4/.gitignore | 5 +
2 files changed, 5 insertions(+), 5 deletions(-)
create mode
From: Michel Dänzer
Older versions of autoconf only supported the former.
Signed-off-by: Michel Dänzer
---
configure.ac | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index 444862f3b..b6da673ea 100644
--- a/configure.ac
+++ b/configure.ac
From: Michel Dänzer
It means to stop using the shared pixmap backing.
Fixes crash when changing PRIME slave output configuration.
Signed-off-by: Michel Dänzer
---
src/radeon_bo_helper.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/radeon_bo_helper.c b/src/radeon_bo_helper.c
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
src/radeon.h | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/src/radeon.h b/src/radeon.h
index 1a1edb1ba..b1d5f5af4 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -772,11 +772,15 @@ static inline Bool
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
src/radeon_exa.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 93c2f056c..268155ed7 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -296,11 +296,12 @@ Bool
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
src/radeon_glamor.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/radeon_glamor.c b/src/radeon_glamor.c
index c733d192d..bffc89ec6 100644
--- a/src/radeon_glamor.c
+++ b/src/radeon_glamor.c
@@ -402,11 +402,13
fy_message_to_smu(adev, PPSMC_MSG_UVDPowerON);
This comment still seems inconsistent with the code.
Apart from that, this series is
Tested-by: Michel Dänzer
Thanks!
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast |
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