lt
> Cc: VMware Graphics
> Cc: Sinclair Yeh
> Cc: Thomas Hellstrom
> Cc: Tony Cheng
> Cc: Shirish S
> Cc: Mikita Lipski
> Cc: Bhawanpreet Lakha
> Cc: David Francis
> Cc: Anthony Koo
> Cc: Jeykumar Sankaran
> Cc: Jordan Crouse
> Cc: Bruce Wang
>
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/bios/bios_parser.c | 4 +--
.../drm/amd/display/dc/bios/bios_parser2.c| 8 ++---
drivers/gpu/drm/amd/display/dc/core/dc.c | 10 +++---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 8 ++---
.../gpu/drm/amd/display/dc/core
Kazlauskas
Reviewed-by: Sun peng Li
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c| 6 --
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 9 ++---
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b
it will be
registered before we create the entries.
Signed-off-by: Mikita Lipski
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display
This DC patchset brings improvements in multiple areas. In summary, we
have:
* Some adjustments in Renoir register
* Enhancements in DMUB
* Some code cleanup
* Improvements and fixes in debugfs
Alvin Lee (1):
drm/amd/display: Changes in dc to allow full update in some cases
Anthony Koo (3):
base address to hard code value to avoid memory overlap
with cw1.
5. Change polling phy init done to infinite loop to avoid dcn hang when
dmcub uC stalled.
6. Add dmcub FW dis-assembly file to repositatory for debug purpose.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Rod
.
Signed-off-by: Stylon Wang
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 31 +++
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu
the register specific for the chroma size
Signed-off-by: Joseph Gravenor
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21
From: "David (Dingchen) Zhang"
[why]
need to send immediate SDP message via debugfs on Navi board.
[how]
hook up the DCN1x encoder function of sending immediate sdp
message to DCN2.
Signed-off-by: David (Dingchen) Zhang
Reviewed-by: Harry Wentland
Acked-by: Rodrigo Siqueira
---
d
ODM is required for DSC.
[how]
- Use a copy of the current state for modified DSC config validation
- Set the update type to FULL_UPDATE to correctly validate and set the
actual state used for committing the streams
Signed-off-by: Nikola Cornij
Reviewed-by: Dmytro Laktyushkin
Acked-by: Rodrigo
.
[How]
- increase required margin from 50 to 60
Signed-off-by: Joshua Aberback
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c | 2 +-
.../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c| 2 +-
2 files changed, 2
stream. Compare current
reg values with the converted DML output. Log mismatches when found.
Signed-off-by: Jaehyun Chung
Reviewed-by: Alvin Lee
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 18 +-
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
.../gpu
-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 21
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 74ffe53eb49d..03e2842cb573 100644
From: "Leo (Hanghong) Ma"
[Why]
For debug purpose, we need to check HUBP_CLOCK_ENABLE in DTN
log debugfs on Navi.
[How]
Add related register read in dcn20_hubp.c.
Signed-off-by: Leo (Hanghong) Ma
Reviewed-by: Harry Wentland
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/
From: abdoulaye berthe
Signed-off-by: abdoulaye berthe
Reviewed-by: Wenjing Liu
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 92 +++
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 48 --
drivers/gpu/drm/amd/display/dc/dc_link.h
of the pte row height and those where
it is not
Signed-off-by: Joseph Gravenor
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21
From: Nikola Cornij
[why]
In SST mode no idle pattern will be generated after link training if
DIG FE is not connected to DIG BE.
Signed-off-by: Nikola Cornij
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4
1 file changed, 4
to the proper
setting once the meta address is valid.
Signed-off-by: Samson Tam
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 27
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers
the
selection between different color space.
Signed-off-by: Wenjing Liu
Reviewed-by: Nikola Cornij
Acked-by: Rodrigo Siqueira
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 1 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 39
-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h | 2 ++
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h
b/drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h
HDR multiplier and determine whether to use it or
the 3dlut's multiplier before sending the surface update to dc. Send
multiplier to dc in fixed31_32 format, dc then converts it to hw format.
Signed-off-by: Michael Strauss
Reviewed-by: Krunoslav Kovac
Acked-by: Rodrigo Siqueira
---
drivers/gpu
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 4c6c2fcc6a96
to where it was.
For MST connectors we should initialize debugfs entries in connector
register function after the connector is registered.
Signed-off-by: Mikita Lipski
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 15
From: Hugo Hu
[Why]
Background color only takes effect in bottommost mpcc.
[How]
Update background color in bottommost mpcc.
Signed-off-by: Hugo Hu
Reviewed-by: Yongqiang Sun
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 19 +--
1 file
From: Anthony Koo
[Why]
Unused register in the code
[How]
Remove unused register
Signed-off-by: Anthony Koo
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers
From: Alvin Lee
Changes in dc to allow for different cases where full update is
required.
Signed-off-by: Alvin Lee
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 22 +++
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 2
From: Samson Tam
[Why]
Hanging on RV for DTN driver verifier
[How]
Roll back change and investigate further
Signed-off-by: Samson Tam
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 27
1 file changed, 27 deletions
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 2e6b3ecd564d
we need to reprogram hardware.
[How]
Add helpers to the DMUB service to check hardware initialization state.
DM will hook it up later.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h | 11
From: Nicholas Kazlauskas
[Why]
We need some extra dmub_cmd_type for NV10
[How]
Add command table functions in DMUB firmware.
Signed-off-by: Nicholas Kazlauskas
Signed-off-by: Xiong Yan
Reviewed-by: Tony Cheng
Acked-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm
From: Ilya Bakoulin
[Why]
Need to be able to enable native 422 for debugging purposes.
[How]
Add new dc_debug_options bool and check it in the get_dsc_enc_caps
function.
Signed-off-by: Ilya Bakoulin
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc
From: abdoulaye berthe
Signed-off-by: abdoulaye berthe
Reviewed-by: George Shen
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
b
From: Qingqing Zhuo
YQ should be limited range for all cases.
Signed-off-by: Qingqing Zhuo
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd
From: Camille Cho
[Why]
A hardcoded number is used today
[How]
Add definition for number of BL data points
Signed-off-by: Camille Cho
Reviewed-by: Anthony Koo
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dm_services_types.h | 3 ++-
1 file changed, 2 insertions(+), 1
-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 6c6f5640234c..39cc71bedf69 100644
into the dmjub_dcn20.c file and rename them.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 59 ---
.../gpu/drm/amd/display/dmub/src/dmub_dcn21.c | 97 +--
.../gpu/drm/amd/display/dmub/src
stream
[How]
When drvier try to disable stream, add link status condition
Signed-off-by: Paul Hsieh
Reviewed-by: Anthony Koo
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 11 +--
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c| 11
From: Derek Lai
[Why]
After read the 3rd Edid blocks, we will reset segment to 0,
which causes this VR fail to read Edid successfully.
[How]
Skip to reset segment to 0 for this VR device.
Signed-off-by: Derek Lai
Reviewed-by: Aric Cyr
Acked-by: Anthony Koo
Acked-by: Rodrigo Siqueira
igned-off-by: Samson Tam
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 57 ++-
1 file changed, 54 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/
to minimum available array index.
Signed-off-by: Noah Abradjian
Reviewed-by: Yongqiang Sun
Acked-by: Rodrigo Siqueira
---
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 20 +--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21
the current ones.
Signed-off-by: Sung Lee
Reviewed-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
.../amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 16 ++--
.../amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h | 2 +-
.../amd/display/dc/clk_mgr/dcn21
From: Anthony Koo
[Why]
eDP is internal link and link loss is unexpected.
It is typically going to be PSR related errors, which is
handled separately.
[How]
Check for eDP and skip check for link loss
Signed-off-by: Anthony Koo
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers
s for each OPTC instance
and piece them together when programming ODM combine mode.
Signed-off-by: Nikola Cornij
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_optc.c| 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git
Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 113 +-
drivers/gpu/drm/amd/display/dc/dc_types.h | 7 +-
2 files changed, 74 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display
From: Eric Yang
[Why]
Need previously implemented chroma vp wa to work for rotation cases.
[How]
Implement rotation specific wa.
Signed-off-by: Eric Yang
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 3 +-
.../gpu/drm/amd/display
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 91b60a549d35
From: abdoulaye berthe
[Why]
DCN21 and DCN2 extended timeout support cap is not set correctly.
[How]
Set extended timeout support for ASIC families to their right values.
Signed-off-by: abdoulaye berthe
Reviewed-by: Martin Leung
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc
From: Hugo Hu
Signed-off-by: Hugo Hu
Reviewed-by: Abdoulaye Berthe
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
b/drivers/gpu/drm
only if it is not -1.
Signed-off-by: Josip Pavic
Reviewed-by: Krunoslav Kovac
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/modules/color/color_gamma.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/modules/color/color_gamma.c
From: Sung Lee
[Why]
Previous formula for calculating DPP CLK DTO was
hard to understand.
[How]
Replace with easier to understand formula that produces
same results.
Signed-off-by: Sung Lee
Reviewed-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
.../gpu/drm
From: Aric Cyr
Fix manual trigger source correctly be TRIGA for DCN2
rather than MANUAL_FLOW.
Signed-off-by: Aric Cyr
Reviewed-by: Anthony Koo
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 8 +---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h | 1
compatibility since this resides in the DMUB service.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dmub/inc/dmub_srv.h | 4 +-
.../gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 25 +++-
.../gpu/drm/amd/display/dmub/src/dmub_dcn20.h
-by: Anthony Koo
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 44 ---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 3 +-
2 files changed, 2 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers
optimizations.
Signed-off-by: Amanda Liu
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
.../amd/display/modules/freesync/freesync.c | 32 +++
.../amd/display/modules/inc/mod_freesync.h| 1 +
2 files changed, 20 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu
From: Roman Li
[Why]
Some 10bit eDP panels don't lightup after we cap bpc to 8.
[How]
Set default max_bpc to 16 for edp connector type.
Signed-off-by: Roman Li
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++---
1
so will have the
correct number.
Signed-off-by: Noah Abradjian
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/driv
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 39 ++--
1 file changed, 36 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 39fe38cb39b6
will be invalid so those
should be cleared.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Roman Li
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 196 +++---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 7 +
2 files changed, 128 insertions
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Fixes on DCN2, bounding box calcs, regamma, and other;
* Enhancements in DMUB;
* Improvements on DCN20/21, freesync, DSC and others.
Aidan Yang (1):
drm/amd/display: Disable integerscaling for downscale and MPO
metadata struct to the end of the data firmware that describes
fw_state_size and some reserved area for future use.
Drop the tracebuffer and firmware state headers since they can differ
per version.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
From: Joshua Aberback
[Why]
For some use cases we need to be able to adjust the maximum target bpp
allowed by DSC policy.
[How]
New interface dc_dsc_policy_set_max_target_bpp_limit
Signed-off-by: Joshua Aberback
Reviewed-by: Nikola Cornij
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd
for all theoretical pipes (including
disabled ones).
Signed-off-by: Noah Abradjian
Reviewed-by: Yongqiang Sun
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 ++-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c| 2 +-
2 files changed, 3
From: Dale Zhao
[Why]:
According to eDP spec, max T7 delay should be 50 ms. Current code uses 300
retry counters may not be accurate enough for different panels.
[How]:
Use absolute time stamp to achive accurate delay.
Signed-off-by: Dale Zhao
Reviewed-by: Anthony Koo
Acked-by: Rodrigo
-by: Samson Tam
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
---
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 51 +--
1 file changed, 36 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
b/drivers/gpu/drm/amd/display/dc/dcn10
, ..., 1/16pix).
Signed-off-by: Nikola Cornij
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dc_dsc.h | 3 ++-
drivers/gpu/drm/amd/display/dc/dsc
From: Charlene Liu
Add warmup escape support, for diags, in a way that is possible to
choose a new or an existing sequence. For achieving this goal, this
commit adds separated MCIF buffer as VCN request.
Signed-off-by: Charlene Liu
Reviewed-by: Chris Park
Acked-by: Rodrigo Siqueira
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 5c48111deabc
.
Update from proper index of clock_limits[]
Signed-off-by: Sung Lee
Reviewed-by: Yongqiang Sun
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21
Signed-off-by: Abdoulaye Berthe
Signed-off-by: Rodrigo Siqueira
---
include/drm/drm_dp_helper.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 51ecb5112ef8..b2057009aabc 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm
Tested-by: Rodrigo Siqueira
On 02/11, Alex Deucher wrote:
> To cover DCN 2.x.
>
> Signed-off-by: Alex Deucher
> ---
> .../drm/amd/display/dc/bios/command_table_helper2.c | 13 +++--
> 1 file changed, 3 insertions(+), 10 deletions(-)
>
> diff --git a/driver
Tested-by: Rodrigo Siqueira
On 02/11, Alex Deucher wrote:
> It's used by more than just DCN2.0. Fixes missing symbol when
> amdgpu is built without DCN support.
>
> Signed-off-by: Alex Deucher
> ---
> .../gpu/drm/amd/display/dc/core/dc_resource.c| 16 +
Tested-by: Rodrigo Siqueira
On 02/11, Alex Deucher wrote:
> to cover dcn2.x related headers.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 4 ++--
> drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c | 2 +-
> drivers/gpu/dr
On 03/04, Kazlauskas, Nicholas wrote:
> On 2020-03-03 6:27 p.m., Rodrigo Siqueira wrote:
> > From: Martin Leung
> >
> > [why]
> > nv14 previously inherited soc bb from generic dcn 2, did not match
> > watermark values according to memory team
> >
> >
changed, 30 insertions(+), 34 deletions(-)
>
> --
> 2.25.0
>
--
Rodrigo Siqueira
https://siqueira.tech
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Hi,
Thanks for your patch, everything lgtm.
Reviewed-by: Rodrigo Siqueira
On 03/02, Melissa Wen wrote:
> The dpp2_get_optimal_number_of_taps function is never used. Removing just for
> code cleaning up.
>
> Signed-off-by: Melissa Wen
> ---
> .../gpu/drm/amd/display/dc
. The effect of
this is that we report the wrong DCC caps.
[How]
Use viewport width in the horizontal swath size calculation and viewport
height in the vertical swath size calculation.
Signed-off-by: Josip Pavic
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc
filter out modes that don't have enough bandwidth. To do this, we
take the screen width and align it to 1024(8k 60)
Signed-off-by: Joseph Gravenor
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 4 ++--
.../gpu/drm/amd/display/dc/dcn10
From: Wyatt Wood
[Why]
We want to be able to enable PSR on DMCUB, and fallback to
DMCU when necessary.
[How]
Move psr_on_dmub flag from dc_debug_options to dc_config.
Signed-off-by: Wyatt Wood
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h
From: Michael Strauss
[WHY]
Freesync borderless is not meant to be enabled on any APUs
[HOW]
Add is_apu cap to dcn21_resource_construct for correct recognition
Signed-off-by: Michael Strauss
Reviewed-by: Yongqiang Sun
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn21
From: Roman Li
[Why]
Typo in amdgpu_dm error message:
"Failed to found connector for link!"
[How]
1. Replace with:
"Failed to find connector for link!"
2. Fix indentation checkpatch warnings.
Signed-off-by: Roman Li
Reviewed-by: Zhan Liu
Acked-by: Rodrigo Siqueira
From: Wyatt Wood
[Why]
Moving ABM from DMCU to DMCUB.
[How]
Add ABM command structs.
Signed-off-by: Wyatt Wood
Reviewed-by: Anthony Koo
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 52 +++
.../drm/amd/display/dmub/inc/dmub_cmd_dal.h | 9
plane.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 6 ++
.../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 15 ++-
.../gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 3 ++-
.../drm/amd
Acked-by: Rodrigo Siqueira
Acked-by: Tony Cheng
---
.../gpu/drm/amd/display/modules/hdcp/hdcp.c | 12 +++
.../gpu/drm/amd/display/modules/hdcp/hdcp.h | 21 ++--
.../drm/amd/display/modules/hdcp/hdcp_psp.c | 32 +--
3 files changed, 33 insertions(+), 32 deletions
after ODM combine.
[how]
Add is_odm in dsc config. Set ICH_RESET_AT_END_OF_LINE = 0xF if either
is_odm or number of slice per DSC engine is greater than 1.
Signed-off-by: Wenjing Liu
Reviewed-by: Nikola Cornij
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
From: Eric Bernstein
[Why]
Logger mask was updated to uint64_t, however default mask definition was
not updated for unsigned long long
[How]
Update DC_DEFAULT_LOG_MASK to support uint64_t type
Signed-off-by: Eric Bernstein
Reviewed-by: Dmytro Laktyushkin
Acked-by: Rodrigo Siqueira
From: abdoulaye berthe
[Why]
Some lttpr devices do not work properly when lttpr mode is configured
after link settings.
[How]
Move lttpr configuration before lane settings.
Signed-off-by: abdoulaye berthe
Reviewed-by: Wenjing Liu
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Improvements on link training
* fixes on odm, dcc, and logger
* Improvements on DMCUB
Aric Cyr (1):
drm/amd/display: 3.2.75
Bhawanpreet Lakha (1):
drm/amd/display: Clear link settings on MST disable
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 32dec3257d5b
Signed-off-by: Martin Leung
Reviewed-by: David Galiffi
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
b/drivers/gpu/drm/amd
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index
and re-authenticate.
Signed-off-by: George Shen
Reviewed-by: Wenjing Liu
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_transition.c | 3 +++
drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | 3 ++-
2 files changed, 5 insertions(+), 1 deletion
pected and not throw the warning
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Hersen Wu
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_type
From: Sung Lee
[WHY & HOW]
In order to correctly intepret clock table, num_states is also needed.
This field did not get moved with clock_table but should next to it for
easier access/viewing.
Signed-off-by: Sung Lee
Reviewed-by: Eric Yang
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm
-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 32 ++-
1 file changed, 24 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index c805bec18044..c81f55b28497
Thomas
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 11 ++-
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 6 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 3 +++
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 1
Lee
Reviewed-by: Yongqiang Sun
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21
program a
horizontal offset of its x position to form a continous pattern when
pieced together.
Signed-off-by: Wenjing Liu
Reviewed-by: Nikola Cornij
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 40 +++
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c
From: Nikola Cornij
Disabling FEC for specific monitors is sometimes required for debugging
while in the monitor bringup phase
Signed-off-by: Nikola Cornij
Reviewed-by: Alvin Lee
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 3 +++
drivers/gpu/drm/amd
.
Signed-off-by: Wenjing Liu
Reviewed-by: Ashley Thomas
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
index
1 - 100 of 1463 matches
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