On 2023-07-10 16:17, Alex Deucher wrote:
On Mon, Jul 10, 2023 at 3:27 PM Bhawanpreet Lakha
wrote:
This patch set introduces Freesync Panel Replay capability on DCN 3.1.4
and newer. Replay has been verified to be working with these patches (in
house)
These patches are enabling panel replay
Handle replay related hpd irqs
Signed-off-by: Bhawanpreet Lakha
---
.../dc/link/protocols/link_dp_irq_handler.c | 66 +++
1 file changed, 66 insertions(+)
diff --git
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
b/drivers/gpu/drm/amd/display/dc/link
Add Replay calls to clk_mgr updates (just like PSR)
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
- Setup replay config on device init.
- Enable replay if feature is enabled (prioritize replay over PSR, since
it can be enabled in more usecases)
- Add debug masks to enable replay on supported ASICs
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23
We need certain conditions for replay to be enabled, so create an
interface in DM to enable/disable replay.
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/Makefile| 2 +-
.../amd/display/amdgpu_dm/amdgpu_dm_replay.c | 176 ++
.../amd/display
We need to make sure that the panel supports replay.
This info is inside the amd vsdb (vendor specific data block). Create a
function to parse the block and read the replay_mode bit.
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 44
Add various functions for replay, such as construct, destroy, enable
get_state, and copy_setting etc. These functions communicate with the
firmware to setup and enable panel replay
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dce/Makefile | 2 +-
.../gpu/drm/amd
- Add checks for Cursor update and dirty rects (sending updates to dmub)
- Add checks for dc_notify_vsync, and fbc and subvp
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc.c| 6 ++
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
Read DP_SINK_PR_PIXEL_DEVIATION_PER_LINE and
DP_SINK_PR_MAX_NUMBER_OF_DEVIATION_LINE
Signed-off-by: Bhawanpreet Lakha
---
.../amd/display/dc/link/protocols/link_dp_capability.c | 10 ++
drivers/gpu/drm/amd/display/include/dpcd_defs.h| 2 ++
2 files changed, 12 insertions
Update infopackets for replay
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c | 4
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd
,
Bhawan
Bhawanpreet Lakha (10):
drm/amd/display: Add structs for Freesync Panel Replay
drm/amd/display: Add Functions to enable Freesync Panel Replay
drm/amd/display: Add Freesync Panel DM code
drm/amd/display: Read replay data from sink
drm/amd/display: Get replay info from VSDB
drm/amd
and Sink remaining timing synchronized, Replay can be activated
in more UI scenarios.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 4 +
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 29 ++
drivers/gpu/drm/amd/display/dc/dc_types.h | 41 ++
.../drm/amd
We need to make sure that the panel supports replay.
This info is inside the amd vsdb (vendor specific data block). Create a
function to parse the block and read the replay_mode bit.
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 37
- Setup replay config on device init.
- Enable replay if feature is enabled and psr is not going to be enabled
- Add debug masks to enable replay on supported ASICs
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 19 +++
.../amd/display
We need certain conditions for replay to be enabled, so create an
interface in DM to enable/disable replay.
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/Makefile| 2 +-
.../amd/display/amdgpu_dm/amdgpu_dm_replay.c | 183 ++
.../amd/display
Add various functions for replay, such as construct, destroy, enable
get_state, and copy_setting etc. These functions communicate with the
firmware to setup and enable panel replay
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dce/Makefile | 2 +-
.../gpu/drm/amd
Read DP_SINK_PR_PIXEL_DEVIATION_PER_LINE and
DP_SINK_PR_MAX_NUMBER_OF_DEVIATION_LINE
Signed-off-by: Bhawanpreet Lakha
---
.../amd/display/dc/link/protocols/link_dp_capability.c | 10 ++
drivers/gpu/drm/amd/display/include/dpcd_defs.h| 4 +++-
2 files changed, 13 insertions
and Sink remaining timing synchronized, Replay can be activated
in more UI scenarios.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 3 +
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 29 ++
drivers/gpu/drm/amd/display/dc/dc_types.h | 41 ++
.../gpu/drm
.
Regards,
Bhawan
Bhawanpreet Lakha (6):
drm/amd/display: Add structs for Freesync Panel Replay
drm/amd/display: Add Functions to enable Freesync Panel Replay
drm/amd/display: Add Freesync Panel DM code
drm/amd/display: Read replay data from sink
drm/amd/display: Enable Replay
.
Reviewed-by: Wenjing Liu
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index
From: Bhawanpreet Lakha
[Why]
we save the prev_dppclk value using "dpp_inst" but when reading this
value we use the index "i". In a case where a pipe is fused off we can
end up reading the incorrect instance because i != dpp_inst in this
case.
[How]
read the prev_dppclk us
From: George Shen
[Why]
Certain LTTPR require special workarounds in order to comply
with DP specifications.
[How]
Implement vendor specific sequences via DPCD writes to
vendor-specific LTTPR registers.
Reviewed-by: Jun Lei
Reviewed-by: Wenjing Liu
Acked-by: Bhawanpreet Lakha
Signed-off
From: "Shen, George"
[Why]
VS and PE requested by repeater should not persist for the sink.
[How]
Clear DPCD lane settings after repeater link training finishes.
Reviewed-by: Wesley Chalmers
Acked-by: Bhawanpreet Lakha
Signed-off-by: George Shen
---
drivers/gpu/drm/amd/displ
From: Aric Cyr
This version brings along the following:
- FW promotion to 0.0.95
- DSC fixes for supported Docks
- Fixes eDP display issue
- Vendor LTTR workarounds
- Fixes Tiled display audio issue
Signed-off-by: Aric Cyr
Acked-by: Bhawanpreet.Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h |
Kazlauskas
Acked-by: Bhawanpreet Lakha
Signed-off-by: Mikita Lipski
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 44 +++
1 file changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
b/drivers/gpu/drm/amd/display/amdgpu_dm
From: Anthony Koo
Signed-off-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
Reviewed-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd
From: George Shen
[Why]
Certain display configurations require an extra delay before
reading lane status with certain LTTPR.
[How]
Add temporary workaround to force AUX RD interval to
16ms for CR and EQ. Needs to be refactored later.
Reviewed-by: Jun Lei
Acked-by: Bhawanpreet Lakha
Signed
Acked-by: Bhawanpreet Lakha
Signed-off-by: George Shen
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 44 +++
drivers/gpu/drm/amd/display/dc/dc_link.h | 1 +
2 files changed, 26 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core
on a USB4 dock is set
during detection of the dock and only cleared when the USB4 dock is
disconnected.
Reviewed-by: Jun Lei
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
Signed-off-by: Jimmy Kizito
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 16 +++
.../gpu/drm/amd
From: Michael Strauss
[WHY]
Allow changing DET size with debug flag for testing purposes
Reviewed-by: Nicholas Kazlauskas
Acked-by: Bhawanpreet Lakha
Signed-off-by: Michael Strauss
---
drivers/gpu/drm/amd/display/dc/dc.h | 12
.../gpu/drm/amd/display/dc/dcn31
From: Evgenii Krasnikov
[HOW]
Add function to be used for early eDP power on
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
Signed-off-by: Evgenii Krasnikov
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 11 +++
drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h | 1
values changed.
Reviewed-by: Jun Lei
Acked-by: Bhawanpreet Lakha
Signed-off-by: Mustapha Ghaddar
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core
-by: Bhawanpreet Lakha
Signed-off-by: Brandon Syu
---
.../gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
b/drivers/gpu/drm/amd/display/dc/dce110
From: Dale Zhao
[Why]
Using the hdmi_disable option doesnt disable 6GB bandwidth
[How]
Add debug.hdmi20_disable flage when checking 6GB enable or not.
Reviewed-by: Chris Park
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
Signed-off-by: Dale Zhao
---
drivers/gpu/drm/amd/display/dc/dce
.
Reviewed-by: Jun Lei
Reviewed-by: Mustapha Ghaddar
Acked-by: Bhawanpreet Lakha
Signed-off-by: meenakshikumar somasundaram
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 35 +++-
.../gpu/drm/amd/display/dc/core/dc_resource.c | 54 +++
drivers/gpu/drm/amd/display/dc/dc.h
From: Stylon Wang
[Why + How]
Enable P010 for SDR video applications.
Reviewed-by: Nicholas Kazlauskas
Reviewed-by: Bhawanpreet Lakha
Acked-by: Bhawanpreet Lakha
Signed-off-by: Stylon Wang
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 2 +-
drivers/gpu/drm/amd/display/dc
by a CONFIG
that cannot be set by the user and shouldn't need to be.
Check for specific branch device IDs to device whether to enable
the workaround for multiple display scenarios.
Reviewed-by: Hersen Wu
Acked-by: Bhawanpreet Lakha
Signed-off-by: Nicholas Kazlauskas
---
.../display/amdgpu_dm
This DC patchset brings improvements in multiple areas. In summary, we have:
- FW promotion to 0.0.95
- DSC fixes for supported Docks
- Fixes eDP display issue
- Vendor LTTR workarounds
- Fixes Tiled display audio issue
Anthony Koo (1):
drm/amd/display: [FW Promotion] Release 0.0.95
Aric Cyr
[Why]
The dm struct is only being used if DCN config is defined and this
causes a unused variable warning if DCN option is not set.
[How]
Remove the compile flag so the variable is used (there also seems to be
a duplicate guard due to a bad rebase) so remove the outer guard to fix
the warning.
From: Harry Wentland
[Why]
DC needs to communicate with PM FW through GPU memory. In order
to do so we need to be able to allocate memory from within DC.
[How]
Call amdgpu_bo_create_kernel to allocate GPU memory and use a
list in amdgpu_display_manager to track our allocations so we
can clean
Update the function for idle optimizations
-remove hardcoded size
-enable no memory-request case
-add cursor copy
-update mall eligibility check case
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Joshua Aberback
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +
.../drm/amd/display
[Why]
Currently we use the maximum possible cursor cache size when deciding if we
should attempt to enable MALL, but this prevents us from enabling the
feature for certain key use cases.
[How]
- consider cursor bpp when calculating if the cursor fits
Signed-off-by: Bhawanpreet Lakha
Signed-off
uncomment watermark set d
Signed-off-by: Bhawanpreet Lakha
---
.../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc
There is some missing mall code, this series updates the code.
-enable watermark programming
-dynamic cursor cache
-updates to mall eligibility check
Bhawanpreet Lakha (3):
drm/amd/display: Enable programing of MALL watermarks
drm/amd/display: Dynamic cursor cache size for MALL eligibility
for DCN
Fixes: 06d5652541c3 ("drm/amd/display: enable idle optimizations for linux
(MALL stutter)")
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/a
: 06d5652541c3 ("drm/amd/display: enable idle optimizations for linux
(MALL stutter)")
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/g
tions for linux
(MALL stutter)")
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_
From: Joshua Aberback
We need these to support PSR on DCN302
Signed-off-by: Joshua Aberback
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302
: Ib1e14a84ee2e8c6e057072128693449665012584
Signed-off-by: Bhawanpreet Lakha
Acked-by: Alex Deucher
Reviewed-by: Nick Kazlauskas
---
drivers/gpu/drm/amd/display/Kconfig | 6 +
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 22 +++
.../gpu/drm/amd/display/amdgpu_dm
From: Joshua Aberback
[How]
- use dc interface instead of hwss interface in cursor functions, to keep
dc->idle_optimizations_allowed updated
- add dc interface to check if idle optimizations might apply to a plane
Change-Id: I130107b6428b4afd73a1a177ef0f8125e0d877e6
Signed-off-by: Joshua
dpcs reg are missing for dcn302 link encoder regs list, so add them.
Just like dcn3
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
b/drivers
[Why]
These comments are helpful in understanding which case each if
statement handles.
[How]
Add comments for state transitions (9 possible cases)
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Zhan Liu
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 26 +--
1 file changed
eep track of when to enable or
disable HDCP
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Zhan Liu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 15 +++
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 3 +++
2 files changed, 14 insertions(+), 4 deletions(-)
diff --
There is a delta in the dmub code
- add boot options
- add boot status
- remove unused auto_load_is_done func pointer
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 20 +-
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 3 ++-
.../gpu/drm/amd
Signed-off-by: Bhawanpreet Lakha
---
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 43 +++
1 file changed, 6 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index b3
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 2b0a2b93994b..74cbaf212698 100644
--- a/drivers/gpu/drm/amd
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 03e88dbf92be..edd2d6bd1d86 100644
--- a/drivers/gpu
Signed-off-by: Bhawanpreet Lakha
---
.../amd/display/dc/dcn302/dcn302_resource.c | 58 +--
1 file changed, 1 insertion(+), 57 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
index
Some setups will fail to build. So copy dcn301 makefile setup
which is known to work
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/dcn302/Makefile| 29 +++
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/Makefile
b
These function pointers are missing from dcn30_init
.calc_vupdate_position
.set_pipe
So add them
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
b
;)
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Bhawanpreet Lakha
---
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 61 +++
1 file changed, 49 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
b/drivers/gpu/drm/amd/displa
From: Dmytro Laktyushkin
At the moment on flip opp reassignment does not work in all cases
for non root pipes.
This change simply makes sure we prefer pipes not used previously
when splitting in dcn3.
Signed-off-by: Dmytro Laktyushkin
Acked-by: Bhawanpreet Lakha
---
.../drm/amd/display/dc
new surface
programming behaviour")
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
in
-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h
b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_log.h
index d3192b9d0c3d..47f8ee2832ff 100644
dpcs reg are missing for dcn3 link encoder regs list, so add them.
Also remove
DPCSTX_DEBUG_CONFIG and RDPCSTX_DEBUG_CONFIG as they are unused and
cause compile errors for dcn3
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h | 2 --
drivers/gpu
Without this, enabling dsc will cause a nullptr
Reviewed-by: Mikita Lipski
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
b/drivers/gpu/drm/amd
[Why]
In certain cases the crtc can be NULL and returning -EINVAL causes
atomic check to fail when it shouln't. This leads to valid
configurations failing because atomic check fails.
[How]
Don't early return if crtc is null
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm
This field is not defined for DCN3
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h | 1 +
.../include/asic_reg/dcn/dcn_3_0_0_sh_mask.h | 22 +++
2 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h
call psp_int_ta_microcode() to parse the ta firmware.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index
Use the same case as sienna_cichlid
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index d488d250805d..e16874f30d5d
Use DCN21 functions instead of DCE110
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
b/drivers/gpu/drm/amd/display/dc/dcn30
[Why]
Currently navy_flounder is using sienna_cichlid_dmcub.bin.
[How]
Create a seperate define so navy_flounder will use its own firmware.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff
call psp_int_ta_microcode() to parse the ta firmware.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 423386272920
This mask is missing for dcn3 so add it from dcn20.
enc2_set_dynamic_metadata() trys to sets this and we get a
generic_reg warning since the mask is not defined.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h | 1 +
1 file changed, 1
From: Alvin Lee
Get the values from VBIOS table
Signed-off-by: Alvin Lee
Signed-off-by: Bhawanpreet Lakha
---
.../drm/amd/display/dc/bios/bios_parser2.c| 98 +++
.../gpu/drm/amd/display/dc/dc_bios_types.h| 1 +
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 7
-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 182 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 +
2 files changed, 182 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd
interrupts
resume
-Edit cached state to force full update
-Commit cached state from suspend
-Build stream and plane updates from the cached state
-Commit stream/plane updates
-Enable interrupts
-Release DC lock
Signed-off-by: Bhawanpreet Lakha
[Why]
Query the hdcp caps of a link, it is useful and can be reported to the user
[How]
Create a query function and call it during link detect
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 56
drivers/gpu/drm/amd/display/dc/dc.h
Add debugfs to get HDCP capability. This is also useful for
kms_content_protection igt test.
Use:
cat /sys/kernel/debug/dri/0/DP-1/hdcp_sink_capability
cat /sys/kernel/debug/dri/0/HDMI-A-1/hdcp_sink_capability
Signed-off-by: Bhawanpreet Lakha
---
.../amd/display/amdgpu_dm
It is not being used, so remove it
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/modules/hdcp/hdcp.h | 2 --
.../drm/amd/display/modules/hdcp/hdcp_psp.c | 29 ---
2 files changed, 31 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h
[Why]
The buffer used when calling psp is a shared buffer. If we have multiple calls
at the same time we can overwrite the buffer.
[How]
Add mutex to guard the shared buffer.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +
drivers/gpu/drm/amd/amdgpu
seconds after the display is lit, but some displays need a
bit more time.
[How]
Increase delay to 3 second before we start authentication.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
[Why]
-We need to cancel future callbacks/watchdogs events when a callback/watchdog
event happens
[How]
-fix typo in event_callback()
-cancel callback, not watchdog
-cancel watchdog events in event_watchdog_timer().
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display
versions on init
-Original Message-
From: amd-gfx On Behalf Of
Bhawanpreet Lakha
Sent: 2020/February/24, Monday 2:45 PM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
; Zhang, Hawking
Cc: Lakha, Bhawanpreet
Subject: [PATCH] drm/amdgpu: log TA versions on init
It is helpful to know
On 2020-02-24 4:15 p.m., Harry Wentland wrote:
On 2020-02-24 2:55 p.m., Bhawanpreet Lakha wrote:
Add debugfs to get HDCP capability. This is also useful for
kms_content_protection igt test.
Use:
cat /sys/kernel/debug/dri/0/DP-1/hdcp_sink_capability
cat /sys/kernel/debug/dri
Add debugfs to get HDCP capability. This is also useful for
kms_content_protection igt test.
Use:
cat /sys/kernel/debug/dri/0/DP-1/hdcp_sink_capability
cat /sys/kernel/debug/dri/0/HDMI-A-1/hdcp_sink_capability
Signed-off-by: Bhawanpreet Lakha
---
.../amd/display/amdgpu_dm
It is helpful to know what version the TA's are for debugging
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index
Thanks.
Reviewed-by: Bhawanpreet Lakha
On 2020-02-19 9:24 a.m., Alex Deucher wrote:
Use the existence of the workqueue itself to determine when to
enable HDCP features rather than sprinkling asic checks all over
the code. Also add a check for the existence of the hdcp
workqueue in the irq
there was a type in the terminate command.
We should be calling psp_dtm_unload() instead of psp_hdcp_unload()
Fixes: 143f2305 ("drm/amdgpu: psp DTM init"
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 26 -
1 file c
From: Wenjing Liu
[why]
HDCP DTM needs to be aware of the upto date display topology
information in order to validate hardware consistency.
[how]
update HDCP DTM on update_stream_config call.
Signed-off-by: Wenjing Liu
Reviewed-by: Jun Lei
---
.../gpu/drm/amd/display/modules/hdcp/hdcp.c |
-msg_in is not needed for enabling encryption.
-Use hdcp2_set_encryption instead of hdcp1_enable_encryption for hdcp2.2
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c | 7 +--
1 file changed, 1 insertion(+), 6
Summary of changes
*handle revoked receivers
*don't retry if revoked
*fix rx_caps check typo
*fix enable encryption call to psp for 2.2
*update DTM right after HW programming
Bhawanpreet Lakha (3):
drm/amd/display: Handle revoked receivers
drm/amd/display: fix backwards byte order in rx_caps
[Why]
PSP added a new return code for revoked receivers (SRM). We need to
handle that so we don't retry hdcp
This is already being handled on windows
[How]
Add the enums to psp interface header and handle them.
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Nicholas Kazlauskas
---
.../drm/amd
We were using incorrect byte order after we started using the drm_defines
So fix it.
Fixes: 02837a91ae75 ("drm/amd/display: add and use defines from drm_hdcp.h")
Signed-off-by: JinZe.Xu
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Wenjing Liu
---
drivers/gpu/drm/amd/display/mo
From: Wenjing Liu
[why]
According to the specs when bksv or ksv list fails SRM check,
HDCP TX should abort hdcp immediately.
However with the current code HDCP will be reattampt upto 4 times.
[how]
Add the logic that stop HDCP retry if bksv or ksv list
is revoked.
Signed-off-by: Wenjing Liu
From: Harry Wentland
[Why]
Hubp needs to know whether a buffer is being scanned out from the trusted
memory zone or not.
[How]
Check for the TMZ flag on the amdgpu_bo and set the tmz_surface flag in
dc_plane_address accordingly.
Signed-off-by: Harry Wentland
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Bhawanpreet Lakha
On 2020-02-05 1:38 p.m., Dan Carpenter wrote:
These frees need to be re-ordered so that we don't dereference "hdcp_work"
right after it's freed. Also in hdcp_create_workqueue() there is a
problem that "hdcp_work" can be NULL if the allocati
From: Joseph Gravenor
[why]
not turning off the mst hub before detection on reboot
causes us to not be able to light up displays with mst hook
[how]
on hw init, see if any displays are lit up. if so, turn them off
Signed-off-by: Joseph Gravenor
Reviewed-by: Eric Yang
Acked-by: Bhawanpreet
From: Yongqiang Sun
[Why]
hyperV flag should be passed from dm to DC, and override the
nv12 flip workaround flag.
[How]
Add flag to phy address config struct and pass the value in dm.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd
From: Aric Cyr
[Why]
Engine can be NULL in some cases, so we must not acquire it.
[How]
Check for NULL engine before acquiring.
Signed-off-by: Aric Cyr
Reviewed-by: Harry Wentland
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 2 +-
1 file changed, 1
1 - 100 of 779 matches
Mail list logo
