l Vetter ; Liu, Charlene
> ; Lei, Jun ; Guo Zhengkui
> ; Liu, Zhan ; José Expósito
> ; open list:AMD DISPLAY CORE g...@lists.freedesktop.org>; open list:DRM DRIVERS de...@lists.freedesktop.org>; open list
> Cc: zhengkui_...@outlook.com
> Subject: [PATCH] drm/amd/display:
[Public]
> -Original Message-
> From: amd-gfx On Behalf Of Agustin
> Gutierrez
> Sent: 2022/January/28, Friday 6:07 PM
> To: amd-gfx@lists.freedesktop.org; Gutierrez, Agustin
>
> Cc: Gutierrez, Agustin
> Subject: [PATCH] drm/amd/display: Update watermark values for DCN301
>
> [Why]
[Public]
After giving it a second thought, I will apply a similar patch on internal
branch first, then get it promoted to external branch. This patch is abandoned.
Thanks,
Zhan
> -Original Message-
> From: Liu, Zhan
> Sent: 2022/January/27, Thursday 9:51 PM
>
[Public]
[Why]
Even if can_apply_edp_fast_boot is set to 1 at boot, this flag will
be cleared to 0 at S3 resume. However, we still need to keep Vdd on
at S3 resume. Turning eDP Vdd off at resume will result in black
screen at S3 resume.
[How]
Don't turn eDP Vdd off when there is an existing eDP
[Public]
Thank you all for the review. I've found a better solution here, so I will
retire this patch, and re-submit a different one.
Thanks,
Zhan
> -Original Message-
> From: Liu, Zhan
> Sent: 2022/January/19, Wednesday 5:24 PM
> To: Liu, Zhan ; amd-gfx@lists.freedesk
[Public]
Apologize for sending out the patch with the wrong sensitivity a few seconds
ago. I've updated sensitivity policy to "Public" here.
Thanks,
Zhan
> -Original Message-
> From: amd-gfx On Behalf Of Liu, Zhan
> Sent: 2022/January/19, Wednesday 5:
[Public]
Apologize for sending out the patch with the wrong email sensitivity policy a
few seconds ago. I've updated sensitivity policy to "Public".
Thanks,
Zhan
> -Original Message-
> From: amd-gfx On Behalf Of Liu, Zhan
> Sent: 2022/January/19, Wednesday 5:
[Public]
[Why]
FIFO reset is only necessary for fast boot sequence, where otg is disabled
and dig fe is enabled when changing dispclk. Fast boot is only enabled
on embedded displays.
[How]
Change FIFO reset condition to "embedded display only".
Signed-off-by: Zhan Liu
---
[AMD Official Use Only]
[Why]
Current FIFO reset delay for dcn10 is 100us, which is too long
and will fail atomic flip. As a result, there will be no display
on boot.
[How]
Shorten delay time to 1us. This also aligns with FIFO reset delay
on other ASICs.
Signed-off-by: Zhan Liu
---
[AMD Official Use Only]
[Why]
DCN301 has seamless boot enabled. With MPC split enabled
at the same time, system will hang.
[How]
Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have
ODM combine enabled on DCN301, pipe split is not necessary here.
Signed-off-by: Zhan Liu
---
[Public]
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2021/October/01, Friday 10:31 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH] drm/amdgpu/display: fold DRM_AMD_DC_DCN201 into
> DRM_AMD_DC_DCN
>
> No need for a separate
[Public]
> -Original Message-
> From: Alex Deucher
> Sent: 2021/September/27, Monday 4:50 PM
> To: Liu, Zhan
> Cc: amd-gfx@lists.freedesktop.org; Liu, Charlene ;
> Wentland, Harry ; Deucher, Alexander
> ; Lei, Jun ; Pillai,
> Aurabindo
> Subject: Re: [PATCH
[Public]
This patch set brings cyan skillfish display support
Charlene Liu / Zhan Liu (2):
drm/amdgpu: add cyan_skillfish asic header files
drm/amd/display: add cyan_skillfish display support
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +
drivers/gpu/drm/amd/amdgpu
[Public]
> -Original Message-
> From: Liu, Zhan
> Sent: 2021/August/13, Friday 3:21 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Cornij, Nikola ; Liu, Zhan
> ; Logush, Oliver
> Subject: [PATCH] drm/amd/display: Use DCN30 watermark calc for DCN301
>
>
> [why
[AMD Official Use Only]
[why]
dcn301_calculate_wm_and_dl() causes flickering when external monitor is
connected.
This issue has been fixed before by commit 0e4c0ae59d7e
("drm/amdgpu/display: drop dcn301_calculate_wm_and_dl for now"), however
part of the fix was gone after commit 2cbcb78c9ee5
[Public]
[Why]
Sometimes, DP receiver chip power-controlled externally by an
Embedded Controller could be treated and used as eDP,
if it drives mobile display. In this case,
we shouldn't be doing power-sequencing, hence we can skip
waiting for T7-ready and T9-ready."
[How]
Added a feature mask
[AMD Public Use]
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2021/March/26, Friday 4:58 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH] drm/amdgpu/vangogh: don't check for dpm in
> is_dpm_running when in suspend
>
> Do the
[AMD Public Use]
> -Original Message-
> From: Alex Deucher
> Sent: 2021/March/26, Friday 5:01 PM
> To: Deucher, Alexander
> Cc: Liu, Zhan ; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu/swsmu: don't bail early on hw_setup on
> resume
>
>
[AMD Official Use Only - Internal Distribution Only]
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2021/March/26, Friday 12:38 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH] drm/amdgpu/swsmu: don't bail early on hw_setup on
> -Original Message-
> From: Daniel Vetter
> Sent: 2021/January/07, Thursday 12:33 PM
> To: Koenig, Christian
> Cc: Liu, Zhan ; amd-gfx@lists.freedesktop.org; Cornij,
> Nikola ; Wang, Chao-kai (Stylon)
> ; Wang, Chao-kai (Stylon)
> ; dri-de...@lists.fre
[AMD Official Use Only - Internal Distribution Only]
> -Original Message-
> From: Liu, Zhan
> Sent: 2021/January/06, Wednesday 10:04 AM
> To: Bas Nieuwenhuizen ; Mario Kleiner
>
> Cc: dri-devel ; amd-gfx list g...@lists.freedesktop.org>; Deucher, Alexan
[AMD Official Use Only - Internal Distribution Only]
> -Original Message-
> From: Liu, Zhan
> Sent: 2021/January/04, Monday 3:46 PM
> To: Bas Nieuwenhuizen ; Mario Kleiner
>
> Cc: dri-devel ; amd-gfx list g...@lists.freedesktop.org>; Deucher, Alexander
> ; Dani
[AMD Official Use Only - Internal Distribution Only]
+ Ville
On Sat, Jan 2, 2021 at 4:31 PM Mario Kleiner wrote:
>
> On Sat, Jan 2, 2021 at 3:02 PM Bas Nieuwenhuizen
> wrote:
> >
> > With modifiers one can actually have different format_info structs
> > for the same format, which now matters
+ Joseph
Hi Joseph,
Would you like to help me review this change? This was a follow-up on the
discussion we had earlier this year.
Thanks,
Zhan
> -Original Message-
> From: Liu, Zhan
> Sent: 2020/April/16, Thursday 3:24 PM
> To: amd-gfx@lists.freedesktop.org; Liu, Zha
[AMD Official Use Only - Internal Distribution Only]
From: amd-gfx on behalf of Shirish S
Sent: Thursday, April 2, 2020 5:15 AM
To: Deucher, Alexander ; Wentland, Harry
; Li, Sun peng (Leo)
Cc: amd-gfx@lists.freedesktop.org ; S, Shirish
Subject: [PATCH] drm/amd/display: re-order asic
> -Original Message-
> From: amd-gfx On Behalf Of Liu,
> Zhan
> Sent: 2020/February/27, Thursday 1:40 PM
> To: Melissa Wen ; Wentland, Harry
> ; Li, Sun peng (Leo) ;
> Deucher, Alexander ; Koenig, Christian
> ; Zhou, David(ChunMing)
> ; David Airlie ; Daniel
> -Original Message-
> From: amd-gfx On Behalf Of
> Melissa Wen
> Sent: 2020/February/26, Wednesday 5:08 PM
> To: Wentland, Harry ; Li, Sun peng (Leo)
> ; Deucher, Alexander
> ; Koenig, Christian
> ; Zhou, David(ChunMing)
> ; David Airlie ; Daniel Vetter
> ; Rodrigo Siqueira
> Cc:
> -Original Message-
> From: Liu, Zhan
> Sent: 2020/February/25, Tuesday 10:10 AM
> To: Alex Deucher ; Wentland, Harry
>
> Cc: amd-gfx list ; Maling list - DRI
> developers ; Deucher, Alexander
> ; Broadworth, Mark
>
> Subject: RE: [PATCH 13/15] drm/amdg
> -Original Message-
> From: Alex Deucher
> Sent: 2020/February/25, Tuesday 9:07 AM
> To: Wentland, Harry
> Cc: amd-gfx list ; Maling list - DRI
> developers ; Deucher, Alexander
> ; Broadworth, Mark
> ; Liu, Zhan
> Subject: Re: [PATCH 13/15] drm/amdgpu/
> -Original Message-
> From: amd-gfx On Behalf Of
> Bhawanpreet Lakha
> Sent: 2020/February/24, Monday 2:45 PM
> To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> ; Zhang, Hawking
>
> Cc: Lakha, Bhawanpreet
> Subject: [PATCH] drm/amdgpu: log TA versions on init
>
> It is
> -Original Message-
> From: Liu, Zhan
> Sent: 2020/February/14, Friday 11:01 AM
> To: Nathan Chancellor ; Wentland, Harry
> ; Li, Sun peng (Leo) ;
> Deucher, Alexander ; Koenig, Christian
> ; Zhou, David(ChunMing)
>
> Cc: clang-built-li.
> -Original Message-
> From: dri-devel On Behalf Of
> Nathan Chancellor
> Sent: 2020/February/14, Friday 1:30 AM
> To: Wentland, Harry ; Li, Sun peng (Leo)
> ; Deucher, Alexander
> ; Koenig, Christian
> ; Zhou, David(ChunMing)
>
> Cc: clang-built-li...@googlegroups.com; Nathan
> -Original Message-
> From: Alex Deucher
> Sent: 2020/February/12, Wednesday 11:05 AM
> To: Liu, Zhan
> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
>
> Subject: Re: [PATCH 3/3] drm/amdgpu/display move get_num_odm_splits()
> into dc_resource.c
>
&
Please find my reply inline.
Thanks,
Zhan
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2020/February/11, Tuesday 11:33 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH 3/3] drm/amdgpu/display move get_num_odm_splits() into
>
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2020/February/11, Tuesday 11:33 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH 2/3] drm/amdgpu/display: extend DCN guards
>
> to cover dcn2.x related headers.
>
>
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2020/February/11, Tuesday 11:33 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH 1/3] drm/amdgpu/display: extend DCN guard in
> dal_bios_parser_init_cmd_tbl_helper2
>
> To cover
> -Original Message-
> From: amd-gfx On Behalf Of
> mikita.lip...@amd.com
> Sent: 2020/January/31, Friday 10:00 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Lipski, Mikita
> ; Wentland, Harry
> Subject: [PATCH] drm/amd/display: Fix a typo when computing dsc
>
yet, so it shouldn’t related to amdgpu.
BTW, your new findings
(https://gist.github.com/Kreyren/3e55e9a754e58956e1690e38b1888de7) gives me
404. Please fix the link. Good luck!
Warm regards,
Zhan
From: Jacob Hrbek
Sent: 2020/January/30, Thursday 5:55 PM
To: Liu, Zhan ; amd-gfx
Hi Jacob,
Thant you for your bug reporting.
I saw you attached xorg.log, which is great. Could you also grab dmesg.log via
SSH?
Thanks,
Zhan
From: amd-gfx On Behalf Of Jacob Hrbek
Sent: 2020/January/30, Thursday 12:18 PM
To: amd-gfx@lists.freedesktop.org
Subject: Suspecting corrupted VBIOS
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2020/January/13, Monday 1:42 PM
> To: amd-gfx list
> Cc: Deucher, Alexander
> Subject: Re: [PATCH] drm/amdgpu/df3.6: remove unused variable
>
> Ping?
>
> Alex
>
> On Fri, Jan 10, 2020 at 7:22 PM Alex Deucher
> -Original Message-
> From: amd-gfx On Behalf Of
> Christian König
> Sent: 2020/January/10, Friday 10:02 AM
> To: Siqueira, Rodrigo ; amd-
> g...@lists.freedesktop.org
> Cc: Li, Sun peng (Leo) ; Cheng, Tony
> ; Tsai, Martin ; Lakha,
> Bhawanpreet ; Wentland, Harry
>
> Subject: Re:
+ amd-gfx@lists.freedesktop.org
Hi there,
Thank you for your bug report (though from your email address seems like you
are a robot :p)
Since it's an amdgpu related bug, please also add amd-gfx@lists.freedesktop.org
for better visibility.
Thanks,
Zhan
> -Original Message-
> From:
Hi there,
Thank you for raising this question. Here are my two cents that came from my
own experience:
>From what you mentioned in the community thread, you tried multiple kernel
>versions on vanilla Manjaro. However, it seems like you didn't upgrade any
>user-mode driver, and I suspect
Ping...
> -Original Message-
> From: Liu, Zhan
> Sent: 2019/December/13, Friday 11:50 AM
> To: amd-gfx@lists.freedesktop.org; Wu, Hersen ;
> Deucher, Alexander ; Wang, Kevin(Yang)
> ; Quan, Evan ; Yin, Tianci
> (Rico)
> Cc: Liu, Zhan
> Subject: [PATCH]
> -Original Message-
> From: Arnd Bergmann
> Sent: 2019/December/10, Tuesday 3:31 PM
> To: Wentland, Harry ; Li, Sun peng (Leo)
> ; Deucher, Alexander
> ; Koenig, Christian
> ; Zhou, David(ChunMing)
> ; David Airlie ; Daniel Vetter
> ; Liu, Zhan
> C
I've seen a few people reported this issue on Freedesktop/Bugzilla. For example:
https://bugs.freedesktop.org/show_bug.cgi?id=24.
They all experienced this issue while playing games. The higher GPU clock is,
the more frequent issue can be reproduced.
Also, some Reddit users pointed out all
> -Original Message-
> From: amd-gfx On Behalf Of
> Timothy Pearson
> Sent: 2019/December/05, Thursday 4:58 PM
> To: amd-gfx
> Subject: [PATCH] [RFC v2] amdgpu: Enable full DCN support on POWER
>
> DCN requires floating point support to operate. Add the appropriate
> x86/ppc64 guards
> -Original Message-
> From: Alex Deucher
> Sent: 2019/December/05, Thursday 5:13 PM
> To: Liu, Zhan
> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
>
> Subject: Re: [PATCH] drm/amdgpu/display: add fallthrough comment
>
> On Thu, Dec 5, 2019
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2019/December/05, Thursday 4:39 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH] drm/amdgpu/display: add fallthrough comment
>
> To avoid a compiler warning.
>
> Signed-off-by:
> -Original Message-
> From: amd-gfx On Behalf Of
> Rodrigo Siqueira
> Sent: 2019/December/05, Thursday 8:59 AM
> To: =dri-de...@lists.freedesktop.org; linux-ker...@vger.kernel.org; amd-
> g...@lists.freedesktop.org
> Cc: Li, Sun peng (Leo) ; Berthe, Abdoulaye
> ; Jani Nikula ;
>
> -Original Message-
> From: amd-gfx On Behalf Of
> Emily Deng
> Sent: 2019/November/30, Saturday 5:42 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deng, Emily
> Subject: [PATCH] drm/amdgpu/sriov: No need the event 3 and 4 now
>
> As will call unload kms when initialize fail, and the
> -Original Message-
> From: amd-gfx On Behalf Of
> Wayne Lin
> Sent: 2019/December/01, Sunday 10:59 PM
> To: dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org
> Cc: Zuo, Jerry ; Wentland, Harry
> ; Kazlauskas, Nicholas
> ; Lin, Wayne
> Subject: [PATCH] drm/dp_mst: Correct
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2019/November/27, Wednesday 3:57 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH] drm/amdgpu: move CS secure flag next the structs where it's
> used
>
> So it's not mixed up with
> -Original Message-
> From: amd-gfx On Behalf Of
> Christian König
> Sent: 2019/November/26, Tuesday 5:10 AM
> To: Jules Irenge ; Deucher, Alexander
>
> Cc: Zhou, David(ChunMing) ; airl...@linux.ie;
> linux-ker...@vger.kernel.org; amd-gfx@lists.freedesktop.org; dri-
>
> -Original Message-
> From: amd-gfx On Behalf Of
> Christian König
> Sent: 2019/November/26, Tuesday 5:10 AM
> To: Jules Irenge ; Deucher, Alexander
>
> Cc: Zhou, David(ChunMing) ; airl...@linux.ie;
> linux-ker...@vger.kernel.org; amd-gfx@lists.freedesktop.org; dri-
>
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2019/November/26, Tuesday 9:51 AM
> To: amd-gfx list
> Cc: Deucher, Alexander
> Subject: Re: [PATCH] drm/amdgpu: move pci handling out of pm ops
>
> Ping? I've tested this on all the cards I have access to.
>
Reviewed-by: Zhan Liu
> -Original Message-
> From: amd-gfx On Behalf Of
> Xiaojie Yuan
> Sent: 2019/November/26, Tuesday 4:44 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Xiao, Jack ; Yuan, Xiaojie
> ; Zhang, Hawking
> Subject: [PATCH] drm/amdgpu/gfx10: remove outdated comments
>
>
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Zhan Liu
From: amd-gfx on behalf of Bhawanpreet
Lakha
Sent: Monday, November 25, 2019 10:40:24 AM
To: amd-gfx@lists.freedesktop.org
Cc: Lakha, Bhawanpreet
Subject: [PATCH] drm/amd/display:
Looks good to me.
Reviewed-by: Zhan Liu
> -Original Message-
> From: amd-gfx On Behalf Of
> Yong Zhao
> Sent: 2019/November/21, Thursday 4:25 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhao, Yong
> Subject: [PATCH] drm/amdkfd: Remove duplicate functions
> update_mqd_hiq()
>
> The
Hi Martin,
Probably you are missing a building package. You can give it another try after
installing the following tools:
sudo apt install kernel-package libncurses5-dev pkg-config libssl-dev
libelf-dev build-essential bison flex
Could you also elaborate more on what building errors
Thank you Nick for the advice. I just reverted the original commit.
Zhan
> -Original Message-
> From: Kazlauskas, Nicholas
> Sent: 2019/November/04, Monday 11:53 AM
> To: Liu, Zhan ; amd-gfx@lists.freedesktop.org; Wu,
> Hersen
> Subject: Re: [PATCH] drm/amd/displa
[Why]
The root cause of Navi14 HDMI pink screen issue has been found.
There is no need to set DIG_MODE twice anymore.
[How]
Remove "setting DIG_MODE" twice workaround.
Signed-off-by: Zhan Liu
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 9 -
1 file changed, 9 deletions(-)
diff
Thank you Hersen. Please check the updated patch:
From: Liu, Zhan
Sent: Friday, November 1, 2019 9:18 PM
To: amd-gfx@lists.freedesktop.org; Kazlauskas, Nicholas
; Lakha, Bhawanpreet ;
Li, Roman ; Liu, Zhan ; Siqueira, Rodrigo
; Wentland, Harry ; Wu,
Hersen ; Zuo, Jerry
Cc: Yeh, Eagle
From: Zhan liu
Date: Fri, 1 Nov 2019 21:10:17 -0400
Subject: [PATCH] drm/amd/display: Add ENGINE_ID_DIGD condition check for Navi14
[Why]
Navi10 has 6 PHY, but Navi14 only has 5 PHY, that is
because there is no ENGINE_ID_DIGD in Navi14. Without
this patch, many HDMI related issues (e.g. HDMI S3
[PATCH] drm/amd/display: Change Navi14's DWB flag to 1
[Why]
DWB (Display Writeback) flag needs to be enabled as 1, or system
will throw out a few warnings when creating dcn20 resource pool.
Also, Navi14's dwb setting needs to match Navi10's,
which has already been set to 1.
[How]
Change value
Thx! Will do it.
Zhan
From: Kazlauskas, Nicholas
Sent: 2019/October/17, Thursday 4:51 PM
To: Liu, Zhan ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/amd/display: Modify display link stream setup
sequence.
This is actually setting DIG mode a second time, right? I don't think
[Why]
This patch is for fixing Navi14 pink screen issue. With this
patch, stream->link->link_enc->funcs->setup will be called
twice: this will make sure GC_SEND is set to 1. Though we
still need to look into why the issue only happens on
Linux, but not on Windows side.
[How]
Call
Inline.
> -Original Message-
> From: Kazlauskas, Nicholas
> Sent: 2019/October/17, Thursday 9:37 AM
> To: Liu, Zhan ; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amd/display: Modify display link stream setup
> sequence.
>
> On 2019-10-17 12:
From: Zhan Liu
[Why]
When a specific kind of connector is detected,
DC needs to set the attribute of the stream.
This step needs to be done before enabling link,
or some bugs (e.g. display won't light up)
will be observed.
[How]
Setting the attribute of the stream first, then
enabling stream.
Looks good to me.
Reviewed-by: Zhan Liu
-Original Message-
From: amd-gfx On Behalf Of
roman...@amd.com
Sent: 2019/October/04, Friday 3:45 PM
To: amd-gfx@lists.freedesktop.org
Cc: Berthe, Abdoulaye ; Liu, Zhan ;
Li, Roman ; Wentland, Harry ;
Deucher, Alexander ; Lakha, Bhawanpreet
Reviewed-by: Zhan Liu
-Original Message-
From: amd-gfx On Behalf Of
sunpeng...@amd.com
Sent: Monday, July 15, 2019 5:21 PM
To: amd-gfx@lists.freedesktop.org
Cc: Li, Sun peng (Leo) ; Kazlauskas, Nicholas
Subject: [PATCH 87/87] drm/amd/display: Force uclk to max for every state
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