Re: [PATCH 8/8] drm/amdgpu: trace vm hub druing flush as well

On 2017-04-11 04:45 AM, Christian König wrote: Am 07.04.2017 um 18:52 schrieb Andres Rodriguez: s/druing/during in subject On 2017-04-07 12:11 PM, Christian König wrote: From: Christian König Trace on which hub we are doing the flush. Signed-off-by: Christian

Re: [PATCH 7/8] drm/amdgpu: trace the vmhub in grab_id as well

On Tue, Apr 11, 2017 at 4:44 AM, Christian König wrote: > From: Christian König > > Trace on which VMHUB we assigned an VMID. > > Signed-off-by: Christian König > Reviewed-by: Andres Rodriguez

Re: [PATCH 8/8] drm/amdgpu: trace vm hub during flush as well v2

On Tue, Apr 11, 2017 at 4:44 AM, Christian König wrote: > From: Christian König > > Trace on which hub we are doing the flush. > > v2: fix typo in commit message > > Signed-off-by: Christian König Reviewed-by: Alex

Re: [PATCH 5/8] drm/amdgpu: assign VM invalidation engine manually v2

On Tue, Apr 11, 2017 at 4:44 AM, Christian König wrote: > From: Christian König > > For Vega10 we have 18 VM invalidation engines for each VMHUB. > > Start to assign them manually to the rings. > > v2: add a BUG_ON if we use to many engines > >

Re: [PATCH 2/4] PCI: add functionality for resizing resources v2

Hi Bjorn, first of all sorry for the delay, had been busy with other stuff in the last few weeks. Am 24.03.2017 um 22:34 schrieb Bjorn Helgaas: + release_child_resources(res); Doesn't this recursively release *all* child resources? There could be BARs from several

RE: [PATCH 2/3] drm/amdgpu/vce4: workaround VCE ring test slow issue

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Tuesday, April 11, 2017 3:31 AM > To: amd-gfx@lists.freedesktop.org > Cc: Min, Frank; Yu, Xiangliang > Subject: [PATCH 2/3] drm/amdgpu/vce4: workaround VCE ring test

Re: [RfC PATCH] drm: fourcc byteorder: brings header file comments in line with reality.

On Tue, Apr 11, 2017 at 3:31 AM, Pekka Paalanen wrote: > On Mon, 10 Apr 2017 12:10:14 -0400 > Ilia Mirkin wrote: > >> On Mon, Apr 10, 2017 at 11:09 AM, Pekka Paalanen wrote: > >> > I also wonder if a real BE machine could have

Re: [PATCH 7/8] drm/amdgpu: trace the vmhub in grab_id as well

On 2017-04-07 12:11 PM, Christian König wrote: From: Christian König Trace on which VMHUB we assigned an VMID. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 17 ++---

Re: [PATCH 3/8] drm/amdgpu: split VMID management by VMHUB

On Tue, Apr 11, 2017 at 4:44 AM, Christian König wrote: > From: Christian König > > This way GFX and MM won't fight for VMIDs any more. > > Initially disabled since we need to stop flushing all HUBS > at the same time as well. > > Signed-off-by:

RE: [PATCH] drm/amdgpu: set cpg doorbeel for fiji and polaris.

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Rex Zhu > Sent: Tuesday, April 11, 2017 9:52 AM > To: amd-gfx@lists.freedesktop.org > Cc: Zhu, Rex > Subject: [PATCH] drm/amdgpu: set cpg doorbeel for fiji and polaris. Good catch! Typo in

Re: [PATCH] drm: Harmonize CIK ASIC support in radeon and amdgpu (v2)

Am 11.04.2017 um 18:05 schrieb Felix Kuehling: On 17-04-11 12:01 AM, Michel Dänzer wrote: One issue with this per-driver enable_cik option is that if the user only enables it in the driver where it's disabled by default, without also disabling it in the driver where it's enabled by default,

[PATCH] drm/radeon: force the UVD DPB into VRAM as well

From: Christian König Seems to be mandatory for WMV playback. Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=100510 Signed-off-by: Christian König --- drivers/gpu/drm/radeon/radeon_cs.c | 10 ++

Re: [PATCH] drm: Harmonize CIK ASIC support in radeon and amdgpu (v2)

On 17-04-10 09:42 PM, Michel Dänzer wrote: > On 11/04/17 08:29 AM, Felix Kuehling wrote: >> I tested this with Hawaii on the KFD branch and >> DRM_CIK_BOTH_DEFAULT_AMDGPU. Both modules get loaded, but radeon doesn't >> initialize the device. Amdgpu works with kfdtest. > Did radeon print the "CIK

Re: [PATCH 1/3] drm/radeon: Make CIK support in Radeon conditional (v2)

On 17-04-10 09:39 PM, Michel Dänzer wrote: > On 11/04/17 03:13 AM, Felix Kuehling wrote: >> On 17-04-09 09:28 PM, Michel Dänzer wrote: >>> On 10/04/17 09:56 AM, Michel Dänzer wrote: On 08/04/17 05:15 AM, Felix Kuehling wrote: > Advertise CIK PCI IDs only when they are not supported by

Re: [PATCH 2/8] drm/amdgpu: drop VMID per ring tracking

On Tue, Apr 11, 2017 at 4:44 AM, Christian König wrote: > From: Christian König > > David suggested this a long time ago, instead of checking > each ring just walk over all the VMIDs in reverse LRU order. > > Signed-off-by: Christian König

Re: [PATCH] drm: Harmonize CIK ASIC support in radeon and amdgpu (v2)

On 04/11/2017 12:16 PM, Christian König wrote: Am 11.04.2017 um 18:05 schrieb Felix Kuehling: On 17-04-11 12:01 AM, Michel Dänzer wrote: One issue with this per-driver enable_cik option is that if the user only enables it in the driver where it's disabled by default, without also disabling

[PATCH umr] Add the ability to update the register/bitfield database at runtime. (v2)

The syntax is fairly simple but the parser isn't really robust so don't feed it garbage. It will happily eat whitespace between tokens so you can indent however you want. Each command starts with "add", "edit", or "del" and then "bit" or "reg" followed by a path and then an address or start/stop

Re: [PATCH 3/4] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors

Am 24.03.2017 um 16:47 schrieb Bjorn Helgaas: On Mon, Mar 13, 2017 at 01:41:35PM +0100, Christian König wrote: From: Christian König Most BIOS don't enable this because of compatibility reasons. Can you give any more details here? Without more hints, it's hard to

Re: [PATCH] drm: Harmonize CIK ASIC support in radeon and amdgpu (v2)

On 17-04-11 12:01 AM, Michel Dänzer wrote: > One issue with this per-driver enable_cik option is that if the user > only enables it in the driver where it's disabled by default, without > also disabling it in the driver where it's enabled by default, it's back > to the current situation where both

Re: [PATCH 05/26] drm/amdgpu: unify MQD programming sequence for kfd and amdgpu

The amdgpu_amdkfd code you're modifying has changed a lot on the KFD branch. I'm not sure it's worth fixing on the amdgpu branch. We'll largely replace it when we upstream KFD changes. I spotted an obvious bug in your patch, but it was also broken before. See inline [FK]. On 17-04-06 02:21 AM,

RE: [PATCH] drm/radeon: force the UVD DPB into VRAM as well

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Christian König > Sent: Tuesday, April 11, 2017 1:22 PM > To: amd-gfx@lists.freedesktop.org > Cc: jan.burgme...@unicon-software.com > Subject: [PATCH] drm/radeon: force the UVD DPB into VRAM

Re: [PATCH 22/26] drm/amdgpu: implement ring set_priority for gfx_v8 compute v5

On Thu, Apr 6, 2017 at 2:21 AM, Andres Rodriguez wrote: > Programming CP_HQD_QUEUE_PRIORITY enables a queue to take priority over > other queues on the same pipe. Multiple queues on a pipe are timesliced > so this gives us full precedence over other queues. > > Programming

Re: [PATCH] drm: Harmonize CIK ASIC support in radeon and amdgpu (v2)

On 11/04/17 10:38 AM, Michel Dänzer wrote: > On 11/04/17 08:21 AM, Felix Kuehling wrote: >> Provide convenient compile time and boot time options for selecting >> CIK ASIC support in either or both drivers. >> >> v2: git add missing files > > [...] > >> diff --git a/drivers/gpu/drm/Kconfig

Re: [PATCH 8/8] amdgpu: use sync file for shared semaphores (v2.1)

On 12 April 2017 at 12:49, Mao, David wrote: > But how to handle the semaphore wait in the vkQueuePresentkHR? The problem here is that really we'd want the presenting process to do the signal once it submits the work for actual presentations (be that the X server DDX or

Re: [PATCH 1/3] drm/radeon: Make CIK support in Radeon conditional (v2)

On 12/04/17 01:13 AM, Felix Kuehling wrote: > On 17-04-10 09:39 PM, Michel Dänzer wrote: >> On 11/04/17 03:13 AM, Felix Kuehling wrote: >>> On 17-04-09 09:28 PM, Michel Dänzer wrote: On 10/04/17 09:56 AM, Michel Dänzer wrote: > On 08/04/17 05:15 AM, Felix Kuehling wrote: >> Advertise

Re: [PATCH 8/8] amdgpu: use sync file for shared semaphores (v2.1)

On 11 April 2017 at 22:42, Chris Wilson wrote: > On Tue, Apr 11, 2017 at 01:22:20PM +1000, Dave Airlie wrote: >> +static int amdgpu_sem_lookup_and_sync(struct amdgpu_cs_parser *p, >> + uint32_t handle) >> +{ >> + int r; >> +

Re: [PATCH 8/8] amdgpu: use sync file for shared semaphores (v2.1)

On 12 April 2017 at 12:36, Mao, David wrote: > Does it means we have to submit command to trigger the semaphore wait/signal? Yes, but I think that should be fine, we need to submit a job to the scheduler to get the waits to happen or to have a fence to fill into the signals.

Re: [PATCH 15/26] drm/amdgpu: avoid KIQ clashing with compute or KFD queues

See comment inline [FK]. On 17-04-06 02:21 AM, Andres Rodriguez wrote: > Instead of picking an arbitrary queue for KIQ, search for one according > to policy. The queue must be unused. > > Also report the KIQ as an unavailable resource to KFD. > > In testing I ran into KCQ initialization issues

[PATCH] drm/amdgpu: Add kernel parameter to manage memory error handling.

Currently allows Carrizo EDC to be turned off. davep 0001-drm-amdgpu-Add-kernel-parameter-to-manage-memory-err.patch Description: 0001-drm-amdgpu-Add-kernel-parameter-to-manage-memory-err.patch ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org

RE: [PATCH 2/3] drm/amdgpu/vce4: workaround VCE ring test slow issue

> > -Original Message- > > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > > Of Xiangliang Yu > > Sent: Tuesday, April 11, 2017 3:31 AM > > To: amd-gfx@lists.freedesktop.org > > Cc: Min, Frank; Yu, Xiangliang > > Subject: [PATCH 2/3] drm/amdgpu/vce4: workaround VCE

Re: [PATCH 21/26] drm/amdgpu: convert srbm lock to a spinlock v2

On Thu, Apr 6, 2017 at 2:21 AM, Andres Rodriguez wrote: > Replace adev->srbm_mutex with a spinlock adev->srbm_lock > > v2: rebased on 4.12 and included gfx9 > Signed-off-by: Andres Rodriguez Maybe move this one up to the front of the series so it can be

RE: [PATCH 8/8] amdgpu: use sync file for shared semaphores (v2.1)

But how to handle the semaphore wait in the vkQueuePresentkHR? Thanks. Best Regards, David -Original Message- From: Dave Airlie [mailto:airl...@gmail.com] Sent: Wednesday, April 12, 2017 10:44 AM To: Mao, David Cc: amd-gfx@lists.freedesktop.org;

Re: [PATCH 8/8] amdgpu: use sync file for shared semaphores (v2.1)

On 12 April 2017 at 13:34, Mao, David wrote: > My point is it is reasonable to split the semaphore signal/wait with the > command submission. > For the signal ioctl, we could just pick the last fence in the same schedule > context, and we don't need to ask for a explicit

RE: [PATCH 8/8] amdgpu: use sync file for shared semaphores (v2.1)

=> we'd really want to pass a semaphore between the X server and client to do this perfectly. Do you means that you want X to signal the semaphore that waited by client, through special version of xsync? We use pretty complex tricks to build synchronization logic upon the event and shm fence.

Re: [PATCH] drm/amdgpu: Add kernel parameter to manage memory error handling.

Hi Dave, Please send patches inline instead of as attachments, ideally using git send-email. > @@ -212,6 +213,9 @@ module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444); > MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power > gating)"); > module_param_named(pg_mask,

RE: [PATCH 8/8] amdgpu: use sync file for shared semaphores (v2.1)

My point is it is reasonable to split the semaphore signal/wait with the command submission. For the signal ioctl, we could just pick the last fence in the same schedule context, and we don't need to ask for a explicit flush or a dummy submission trick. The spec guarantee the signal always

Re: [PATCH 01/26] drm/amdgpu: refactor MQD/HQD initialization v2

On Thu, Apr 6, 2017 at 2:21 AM, Andres Rodriguez wrote: > The MQD programming sequence currently exists in 3 different places. > Refactor it to absorb all the duplicates. > > The success path remains mostly identical except for a slightly > different order in the non-kiq case.

Re: [PATCH 16/26] drm/amdgpu: new queue policy, take first 2 queues of each pipe

What about GFX9? See one more comment inline [FK]. On 17-04-06 02:21 AM, Andres Rodriguez wrote: > Instead of taking the first pipe and giving the rest to kfd, take the > first 2 queues of each pipe. > > Effectively, amdgpu and amdkfd own the same number of queues. But > because the queues are

Re: [PATCH] Add support for high priority scheduling in amdgpu v8

I replied to patch 5 with an observation. But I think that code was broken before your change. The order of patches 7 and 8 should be reversed. Otherwise you break radeon before you fix it. See my comments on patch 9, 15 and 16 in separate emails. With those comments addressed: 1-4, 10, 13-14

Re: [PATCH] drm: Harmonize CIK ASIC support in radeon and amdgpu (v2)

On 12/04/17 01:05 AM, Felix Kuehling wrote: > On 17-04-11 12:01 AM, Michel Dänzer wrote: >> One issue with this per-driver enable_cik option is that if the user >> only enables it in the driver where it's disabled by default, without >> also disabling it in the driver where it's enabled by

RE: [PATCH 8/8] amdgpu: use sync file for shared semaphores (v2.1)

Does it means we have to submit command to trigger the semaphore wait/signal? Best Regards, David -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Dave Airlie Sent: Tuesday, April 11, 2017 11:22 AM To: amd-gfx@lists.freedesktop.org;

[PATCH 1/8] sync_file: add type/flags to sync file object creation.

From: Dave Airlie This allows us to create sync files with different semantics, and clearly define the interoperation between them it also provides flags to allow for tweaks on those semantics. This provides a validation interface for drivers that accept types from userspace

drm sync objects (vn+1)

Okay another day, another sync object patchset. In my drm-syncobj branch. This round should: a) address the amdgpu CS ERESTARTSYS failure case, I've reworked the sync_file/syncobj/amdgpu bits to have a lookup and just replace in separate phases and just do the wait lookup and sync, then later

[PATCH 5/8] sync_file: add support for a semaphore object (v2)

From: Dave Airlie This object can be used to implement the Vulkan semaphores. The object behaviour differs from fence, in that you can replace the underlying fence, and you cannot merge semaphores. v2: change replace fence API to have a return value, don't allow polling on

[PATCH 6/8] drm/syncobj: add semaphore support helpers. (v2)

From: Dave Airlie This just adds two helper interfaces to bridge the gap from drivers to sync_file for the semaphore objects. These will be used by the amdgpu driver. v2: drop one of the APIs and replace with a fence lookup to make the amdgpu api more robust.

[PATCH 8/8] amdgpu: use sync file for shared semaphores (v3)

From: Dave Airlie This creates a new command submission chunk for amdgpu to add wait and signal sync objects around the submission. Sync objects are managed via the drm syncobj ioctls. The command submission interface is enhanced with two new chunks, one for semaphore

[PATCH 4/8] sync_file: add a mutex to protect fence and callback members. (v4)

From: Dave Airlie This patch allows the underlying fence in a sync_file to be changed or set to NULL. This isn't currently required but for Vulkan semaphores we need to be able to swap and reset the fence. In order to faciliate this, it uses rcu to protect the fence, along

[PATCH 7/8] amdgpu/cs: split out fence dependency checking

From: Dave Airlie This just splits out the fence depenency checking into it's own function to make it easier to add semaphore dependencies. Reviewed-by: Christian König Signed-off-by: Dave Airlie ---

[PATCH 2/8] sync_file: export some interfaces needed by drm sync objects.

From: Dave Airlie These are just alloc and fdget interfaces needed by the drm sync objects code. Reviewed-by: Christian König Reviewed-by: Daniel Vetter Signed-off-by: Dave Airlie ---

[PATCH] drm/amdgpu/gfx8: move CP_PQ_STATUS after doorbell range setting

I'm not sure if the order matters, but it seems like it makes more sense to set this after the range is programmed. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git

Re: [PATCH 01/26] drm/amdgpu: refactor MQD/HQD initialization v2

On Thu, Apr 6, 2017 at 2:21 AM, Andres Rodriguez wrote: > The MQD programming sequence currently exists in 3 different places. > Refactor it to absorb all the duplicates. > > The success path remains mostly identical except for a slightly > different order in the non-kiq case.

Re: [PATCH] drm/amdgpu: fix to add buffer funcs check

Am 11.04.2017 um 04:58 schrieb Huang Rui: This patch fixes the case when buffer funcs is empty and bo evict is executing. It must double check buffer funcs, otherwise, a NULL pointer dereference kernel panic will be encountered. BUG: unable to handle kernel NULL pointer dereference at

Re: [PATCH 5/8] sync_file: add support for a semaphore object

On Tue, Apr 11, 2017 at 01:22:17PM +1000, Dave Airlie wrote: > From: Dave Airlie > > This object can be used to implement the Vulkan semaphores. > > The object behaviour differs from fence, in that you can > replace the underlying fence, and you cannot merge semaphores. > >

Re: [PATCH 1/3] drm/amdgpu/vce4: update VCE initialization sequence for SRIOV

Am 11.04.2017 um 09:30 schrieb Xiangliang Yu: Update the initialization sequence of VCE to make VCE work. Signed-off-by: Frank Min Acked-by: Christian König for the whole series. --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 9 ++--- 1

[PATCH 3/3] drm/amdgpu/vce4: enable ring & ib test for sriov

Now VCE block can work for SRIOV, enable ring & ib test. Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c index

[PATCH 1/3] drm/amdgpu/vce4: update VCE initialization sequence for SRIOV

Update the initialization sequence of VCE to make VCE work. Signed-off-by: Frank Min --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 9 ++--- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

Re: [RfC PATCH] drm: fourcc byteorder: brings header file comments in line with reality.

On Mon, 10 Apr 2017 12:10:14 -0400 Ilia Mirkin wrote: > On Mon, Apr 10, 2017 at 11:09 AM, Pekka Paalanen wrote: > > I also wonder if a real BE machine could have different results than > > the virtual machine. > > I have a PPC G5 with an AGP

[PATCH 2/3] drm/amdgpu/vce4: workaround VCE ring test slow issue

Add VCE ring test slow workaround for SRIOV. Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git

Re: [PATCH 1/2] drm/amdgpu: fix spelling in header comment

Am 10.04.2017 um 21:43 schrieb Alex Deucher: Signed-off-by: Alex Deucher Reviewed-by: Christian König for both. --- include/uapi/drm/amdgpu_drm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [PATCH 1/2] drm/amdgpu/gfx7: enable cp/rlc ints after we disable clockgating

Am 10.04.2017 um 23:45 schrieb Alex Deucher: Even if we disable clockgating, we still need to make sure the cp/rlc interrupts are enabled for powergating which might still be enabled. Signed-off-by: Alex Deucher Acked-by: Christian König

Re: [PATCH] drm/amdgpu: fix to add buffer funcs check

On Tue, Apr 11, 2017 at 02:53:27PM +0800, Christian König wrote: > Am 11.04.2017 um 04:58 schrieb Huang Rui: > > This patch fixes the case when buffer funcs is empty and bo evict is > > executing. It must double check buffer funcs, otherwise, a NULL > > pointer dereference kernel panic will be

[PATCH 6/8] drm/amdgpu: allow concurrent VM flushes

From: Christian König Enable concurrent VM flushes for Vega10. Signed-off-by: Christian König Acked-by: Alex Deucher Reviewed-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |

[PATCH 2/8] drm/amdgpu: drop VMID per ring tracking

From: Christian König David suggested this a long time ago, instead of checking each ring just walk over all the VMIDs in reverse LRU order. Signed-off-by: Christian König Reviewed-by: Andres Rodriguez ---

[PATCH 5/8] drm/amdgpu: assign VM invalidation engine manually v2

From: Christian König For Vega10 we have 18 VM invalidation engines for each VMHUB. Start to assign them manually to the rings. v2: add a BUG_ON if we use to many engines Signed-off-by: Christian König Reviewed-by: Alex Deucher

[PATCH 3/8] drm/amdgpu: split VMID management by VMHUB

From: Christian König This way GFX and MM won't fight for VMIDs any more. Initially disabled since we need to stop flushing all HUBS at the same time as well. Signed-off-by: Christian König Reviewed-by: Andres Rodriguez

[PATCH 7/8] drm/amdgpu: trace the vmhub in grab_id as well

From: Christian König Trace on which VMHUB we assigned an VMID. Signed-off-by: Christian König Reviewed-by: Andres Rodriguez --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 17 ++---

[PATCH 4/8] drm/amdgpu: invalidate only the currently needed VMHUB v2

From: Christian König Drop invalidating both hubs from each engine. v2: don't use hardcoded values Signed-off-by: Christian König Reviewed-by: Alex Deucher Reviewed-by: Andres Rodriguez ---

[PATCH 1/8] drm/amdgpu: add VMHUB to ring association

From: Christian König Add the info which ring belonging to which VMHUB. Signed-off-by: Christian König Reviewed-by: Alex Deucher Reviewed-by: Andres Rodriguez ---

[PATCH 8/8] drm/amdgpu: trace vm hub during flush as well v2

From: Christian König Trace on which hub we are doing the flush. v2: fix typo in commit message Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 20 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

Re: [PATCH 1/8] drm/amdgpu: add VMHUB to ring association

On 2017年04月11日 16:45, Christian König wrote: Am 10.04.2017 um 05:41 schrieb zhoucm1: On 2017年04月08日 00:59, Andres Rodriguez wrote: Some minor nitpicks as replies to the other emails. With those fixed, this series is: Looks good to me. Does that mean I can stitch your rb on it and

Re: [PATCH 2/4] PCI: add functionality for resizing resources v2

Sorry for the delayed response, have been busy with other stuff recently. Am 13.03.2017 um 17:43 schrieb Andy Shevchenko: v2: rebase on changes in rbar support This kind of comments usually goes after --- delimiter below. That would remove it from the commit message which I don't want. +

Re: [PATCH 3/4] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors

Am 13.03.2017 um 17:49 schrieb Andy Shevchenko: On Mon, Mar 13, 2017 at 2:41 PM, Christian König wrote: Most BIOS don't enable this because of compatibility reasons. Manually enable a 64bit BAR of 64GB size so that we have enough room for PCI devices. +static void

Re: [PATCH 8/8] amdgpu: use sync file for shared semaphores (v2.1)

On Tue, Apr 11, 2017 at 01:22:20PM +1000, Dave Airlie wrote: > +static int amdgpu_sem_lookup_and_sync(struct amdgpu_cs_parser *p, > + uint32_t handle) > +{ > + int r; > + struct dma_fence *old_fence; > + > + r = drm_syncobj_swap_fences(p->filp, handle,

Re: [RfC PATCH] drm: fourcc byteorder: brings header file comments in line with reality.

Hi, > > Just let know what you need tested, I should be able to turn it around > > within a couple of days. > > That's part of my problem. I don't really know what should be tested. > What do people do with their BE machines that we should avoid breaking? For the virtual machine use case the

Re: [PATCH] drm/amdgpu: fix to add buffer funcs check

Am 11.04.2017 um 11:45 schrieb Huang Rui: On Tue, Apr 11, 2017 at 02:53:27PM +0800, Christian König wrote: Am 11.04.2017 um 04:58 schrieb Huang Rui: This patch fixes the case when buffer funcs is empty and bo evict is executing. It must double check buffer funcs, otherwise, a NULL pointer

[PATCH umr] Add the ability to update the register/bitfield database at runtime.

Support for deleting entries will be added later. The syntax is fairly simple but the parser isn't really robust so don't feed it garbage. It will happily eat whitespace between tokens so you can indent however you want. Each command starts with "add" or "edit" and then "bit" or "reg" followed

Re: [PATCH 1/8] drm/amdgpu: add VMHUB to ring association

Am 10.04.2017 um 05:41 schrieb zhoucm1: On 2017年04月08日 00:59, Andres Rodriguez wrote: Some minor nitpicks as replies to the other emails. With those fixed, this series is: Looks good to me. Does that mean I can stitch your rb on it and commit it? Thanks, Christian. David Reviewed-by: