Since the structure comes with only several bytes.
Change-Id: Ie9df0db543fdd4cf5b963a286ef40dee03c436bf
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 3 ---
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 2 +-
drivers/gpu/drm/amd/powerplay/smu_v11_0.c |
Eliminate the buffer allocation and drop the unnecessary
overdrive table uploading.
Change-Id: I8ba5383a330e6d5355cea219147500c1b4a43f47
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 2 +-
.../gpu/drm/amd/powerplay/inc/amdgpu_smu.h| 2 +-
To avoid possible memory leak.
Change-Id: I4740eac7fc2c6e934ec8f503e5a98057f0902f4a
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 2 ++
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 1 +
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 1 +
To fit common design. And this can simplify the buffer deallocation.
Change-Id: Iee682e76aadb5f34861d69d5794ced44f0a78789
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 330 ++---
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 105 ---
2 files
To make code more clean and readable by moving ASIC
specific code to its own file, more code sharing and
dropping unused code.
Change-Id: I6b299f9e98c7678b48281cbed9beb17b644bb4cc
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 213 -
These APIs internally guard they will not break ARCTURUS.
Change-Id: Ib6775c1c8c5211ea45db6c3fb604a8279411ab37
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 38 +---
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 8 ++---
2 files changed, 20
Combine and simplify the logics for setup pptable.
Change-Id: I062f15eab586050593afd960432c4c70fbdd5d41
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 17
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 66 -
Combine and simplify the logics for retrieving bootup
clocks.
Change-Id: Ifca28c454f3769dece0cc705ba054ff34db0ab60
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 4 -
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 1 -
Postpone some operations which are not must for hw setup to
late_init. Thus, code sharing is possible between hw_init/fini and
suspend/resume. Also this makes code more clean and readable.
Change-Id: Id3996fd9e2dbf2ff59d8a6032cc5f6730db1295c
Signed-off-by: Evan Quan
---
[AMD Official Use Only - Internal Distribution Only]
Ping...
Thanks,
> -Original Message-
> From: Liang, Prike
> Sent: Friday, May 29, 2020 11:28 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Huang, Ray
> ; Liang, Prike
> Subject: [PATCH] drm/amdgpu: enable renoir
From: Likun Gao
Sienna_Cichlid have 4 sdma controllers.
v2: add missing license to sdma_common.h (Alex)
v3: rebase (Alex)
v4: squash in policy fix (Alex)
v4: squash in fw_name fix
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
From: Likun Gao
Enable PPT and TDC for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Likun Gao
Same as navi10.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index
Sienna Cichlid is a GPU from AMD. This patch set adds support for it
including power management, display, kfd, interrupts, gfx, multi-media,
etc. The new register headers are really big so I haven't sent them to
the list. You can view the new patches including the register headers
on the
From: Likun Gao
Same as Navi1x.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 49 +++---
drivers/gpu/drm/amd/amdgpu/nv.c| 1 +
2 files changed, 37 insertions(+), 13 deletions(-)
diff --git
From: Likun Gao
Add gmc clockgating support for sienna_cichlid.
The athub version used for sienna_cichlid is v2.1.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 11 +--
From: Likun Gao
Add function to get smu power index for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
.../drm/amd/powerplay/sienna_cichlid_ppt.c| 21 +++
.../drm/amd/powerplay/sienna_cichlid_ppt.h| 6 ++
2
From: Likun Gao
Update sienna_cichlid register configuration for sienna_cichlid
to match the update of header files.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 369 +++--
1 file changed,
From: Likun Gao
Enable FW DSTATE for sienna_cichlid.
Enable DF CSTATE for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Likun Gao
Skip ASD FW load for sienna_cichlid currently.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 8 +---
2 files changed, 6 insertions(+), 4
From: Likun Gao
Update IH handling for sienna_cichlid
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 21 +
drivers/gpu/drm/amd/amdgpu/nv.c| 1 +
2 files changed, 18 insertions(+), 4
From: Likun Gao
Support for performance level set for sienna_cichlid.
Set standard performance level not fully support, will set to auto
performance level.
Set peak performance level not fully support, will do nothing with it.
Force clk level only support for 2 level for fine grained DPM.
From: Yong Zhao
Signed-off-by: Yong Zhao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
index
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 4 ++--
drivers/gpu/drm/amd/include/soc15_ih_clientid.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git
From: Likun Gao
Add SMU block for sienna_cichlid with psp load type.
Signed-off-by: Likun Gao
Reviewed-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index
From: Likun Gao
Add support to set default pcie parameters for sienna_cichlid.
Add support to update pcie parameters for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
.../drm/amd/powerplay/sienna_cichlid_ppt.c| 42 +++
From: Likun Gao
GFX10.3 is used for sienna_cichlid.
v2: squash in BANK_SELECT and FRAGMENT_SIZE fixes (Alex)
v3: squash in smallk update (Alex)
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index fd3b9e21a5bd..642d18e70860
From: Likun Gao
Add irq src headers for additional SDMA blocks.
v2: Add missing licenses (Alex)
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
.../include/ivsrcid/sdma2/irqsrcs_sdma2_5_0.h | 45 +++
From: Likun Gao
Removed loading duplicate instances of SDMA FW for Sienna_Cichlid,
As sienna_cichlid only use a single image for all instances.
Signed-off-by: Likun Gao
Reviewed-by: John Clements
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 99
From: Likun Gao
Enable Graphics Clock Deep Sleep for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Likun Gao
Enable uclk dpm for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4
1 file changed, 4 insertions(+)
diff --git
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 860c69cccf94..1b17fca98fef 100644
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Jack Xiao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 +
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 7 +++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
From: Likun Gao
Enable Display Clocks Dynamic Power Management (DPM) for sienna_cichlid.
Enable Display Controller Engine Fabric Clock Deep Sleep for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
From: Likun Gao
Enable LCLK DPM for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4
1 file changed, 4 insertions(+)
diff --git
From: Likun Gao
Make GFX deep sleep can be configure for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Jack Xiao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index e2d97bcdf328..a4a80aed4b96 100644
---
From: Likun Gao
Support for SOCCLK DPM for sienna_cichlid.
Use feature mask to control DPM for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 14 +++---
1 file changed, 11
From: Jack Xiao
MES ring will use the assigned doorbell index for
command submission.
Signed-off-by: Jack Xiao
Acked-by: Alex Deucher
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 2 ++
drivers/gpu/drm/amd/amdgpu/nv.c
From: Leo Liu
Sienna_Cichlid have 2 VCN instances, using different register for range
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Reviewed-by: James Zhu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 7 ++-
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
From: Likun Gao
Enable Graphics Clock (GFXCLK) Spread Spectrum for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Jack Xiao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index
From: Jack Xiao
Add a new ring type definition.
Signed-off-by: Jack Xiao
Acked-by: Alex Deucher
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Likun Gao
Support Ultra Low Voltage for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Likun Gao
Enable PSP block for firmware loading and other security
setup only when amdgpu use PSP load type to load ucode.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
1 file changed, 2 insertions(+), 1
From: Likun Gao
Add support for GC 10.3.
v2: Squash in gb_addr_config fix (Alex)
v3: Add num_pkrs support (Alex)
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 15
From: Likun Gao
Add common ip block for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Likun Gao
gpu info fw contains chip specific parameters.
v2: fix fw_name
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
From: Likun Gao
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
include/drm/amd_asic_type.h| 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
From: Likun Gao
Same as navi10.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
From: Kenneth Feng
GPO is graphics power optimizer.
SMU calculates the 16 gfxclk V/F points according to the CU numbers
and memory activity.RLC picks one of them according to the memory
speed requirements for the data transmission.
Signed-off-by: Kenneth Feng
Reviewed-by: Hawking Zhang
From: shaoyunl
amdkfd add support for sienna_cichlid virtual function
Signed-off-by: shaoyunl
Reviewed-by: Yong Zhao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: James Zhu
fix typo for vcn3/jpeg3 idle check
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Jay Cornwall
- Preserve scalar GPRs ttmp[4:11] and ttmp13
- Add single step exception during context save workaround
- Remove incorrect PC adjustment during context save
Signed-off-by: Jay Cornwall
Reviewed-by: Yong Zhao
Signed-off-by: Alex Deucher
---
From: Likun Gao
Enable the feature of FCLK Deep Sleep for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Likun Gao
Enable BACO for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
From: Jay Cornwall
The contents of macros are parsed by the assembler before conditions
have been tested. This causes assembly errors when using IP-specific
instructions in the IP-unified trap handler.
Add a preprocessing step to filter IP-specific code.
Also guard a Navi1x-specific
From: shaoyunl
SMU firmware already been loaded from host, don't enable it for now.
May need to re-work it if we want to enable the SMU for guest in the future.
Signed-off-by: shaoyunl
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Kenneth Feng
Bundle GPO with gfx DPM and enable it since gfxclk dpm
should work first then GPO works.
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4 +++-
1 file changed, 3 insertions(+), 1
From: Jay Cornwall
- Replace SQC stores with TCP stores
- Synchronize with MSG_SAVEWAVE via lgkmcnt
- HW_REG_IB_STS is now read-only
Signed-off-by: Jay Cornwall
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/amdkfd/cwsr_trap_handler.h| 844 +-
From: Le Ma
Update mes_api_def.h to match the latest mes fw.
v2: clean up coding style based on kernel standards:
- fix indentation and alignment
- break long lines
- put the opening brace last on the line
- remove unnecessary blank line and space
- replace uint(32|64) with standard
From: Likun Gao
Enable OUT OF BAND MONITER for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Boyuan Zhang
Add vcn_v3_0_pause_dpg_mode to pause/unpause DPG mode for VCN3.0
V2: update description.
Signed-off-by: Boyuan Zhang
Reviewed-by: James Zhu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 66 +++
From: Likun Gao
Enable APCC DFLL for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
From: Likun Gao
Add function to get pptable power limit for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
From: Yong Zhao
v4: drop get_tile_config, comment out other callbacks
Signed-off-by: Yong Zhao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 13 +-
.../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c | 834 ++
drivers/gpu/drm/amd/amdkfd/kfd_crat.c
From: Hawking Zhang
For Sienna_Cichlid, query fw_reserved_fb_size from vbios directly.
For navi1x, fall back to default 64K TMR size.
For pre-navi, no need to reserve tmr region in top LFB.
v2: fix TMR define (Alex)
v3: partially revert size change
Signed-off-by: Hawking Zhang
Reviewed-by:
From: "Jerry (Fangzhi) Zuo"
Signed-off-by: Jerry (Fangzhi) Zuo
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
From: Boyuan Zhang
Use indirect sram for secure DPG mode
V2: update description.
Signed-off-by: Boyuan Zhang
Reviewed-by: James Zhu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Le Ma
Pass a piece of memory to MES ucode to fill contents.
Signed-off-by: Le Ma
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 36 ++
1 file changed, 36 insertions(+)
diff --git
From: Likun Gao
Update gfx golden setting for gfx10.3.
Signed-off-by: Likun Gao
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
From: Likun Gao
Only disable 3D pipe 1 on navi1x, enable 3D pipe 1 on Sienna_Cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Feifei Xu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
From: Kenneth Feng
add HDP mgcg and ls support and verified
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Kenneth Feng
confirmed that IPH_MEM_POWER_CTRL_EN and RC_MEM_POWER_CTRL_EN
have to be set for SRAM LS/DS/SD
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
From: Boyuan Zhang
Add range for vcn instance 1 for translation for internal register offset, which
is needed for VCN3.0
V2: update description.
Signed-off-by: Boyuan Zhang
Reviewed-by: James Zhu
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
From: Likun Gao
Enable VCN dpm set for sienna_cichlid.
Enable JPEG dpm set for sienna_cichlid.
v2: squash in BACO fix (Kenneth)
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/inc/smu_types.h | 1 +
From: Likun Gao
Enable mmhub clockgating.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index
From: Kenneth Feng
mmhub pg can be obvserved from PCTL_CTRL
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c| 3 ++-
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 +++
2 files changed, 5
From: Le Ma
Statically allocated VM inv eng of gfxhub on sienna_cichlid is used up.
Also VM inv eng is no need for mes ring.
Signed-off-by: Le Ma
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 3 +++
1 file changed, 3 insertions(+)
diff
From: Boyuan Zhang
Add vcn_v3_0_clock_gating_dpg_mode to enabling clock gating in DPG mode for
VCN3.0
V2: Separate from previous patch-0002, and update description.
Signed-off-by: Boyuan Zhang
Reviewed-by: James Zhu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
From: Hersen Wu
dp/hdmi ati hda is not shown in audio settings
Signed-off-by: Hersen Wu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
sound/pci/hda/hda_intel.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index
From: Likun Gao
Enable the feature of Voltage Regulator (VR) Hot for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Likun Gao
Open GFX MGCG, CGCG and 3DCG for sienna_cichlid.
Signed-off-by: Likun Gao
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Kenneth Feng
enable athub pg and the status can be checked in
ATHUB_MISC_CNTL.
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c| 3 ++-
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 +++
2
From: Kenneth Feng
athub ls is bounded with hdp ls,verified.
Signed-off-by: Kenneth Feng
Reviewed-by: Likun Gao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Boyuan Zhang
Add vcn_v3_0_stop_dpg_mode to power off in DPG mode for VCN3.0
V2: update description.
Signed-off-by: Boyuan Zhang
Reviewed-by: James Zhu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 34 +++
1
From: Likun Gao
Update golden setting for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
From: Boyuan Zhang
Add vcn_v3_0_start_dpg_mode to setup and start VCN block in DPG mode for VCN3.0
V2: Separate from previous patch-0002, and update description.
Signed-off-by: Boyuan Zhang
Reviewed-by: James Zhu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
From: Leo Liu
for the second instance with correct index
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
From: Boyuan Zhang
Add vcn_v3_0_mc_resume_dpg_mode to resume memory controller in DPG mode for
VCN3.0
V2: Separate from previous patch-0002, and update description.
Signed-off-by: Boyuan Zhang
Reviewed-by: James Zhu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
From: Boyuan Zhang
Rename RREG32_SOC15_DPG_MODE and WREG32_SOC15_DPG_MODE for VCN1.0
These two macros are used specifically for VCN1.0, therefore rename
it from general name to VCN1.0 specific name.
Signed-off-by: Boyuan Zhang
Reviewed-by: James Zhu
Acked-by: Alex Deucher
Signed-off-by: Alex
From: Likun Gao
Enable RSMU SMN PG for sienna_cichlid.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
From: Likun Gao
Add support to force and unforce MCLK or SOCCLK to dpm limit value.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4
1 file changed, 4 insertions(+)
diff --git
From: shaoyunl
On SRIOV run time, driver shouldn't directly access invalidation registers
through MMIO.
Use kiq to submit wait_reg_mem package for the invalidation
Signed-off-by: shaoyunl
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c |
From: Likun Gao
Disable runtime pm for sienna_cichlid temporarily as BACO regression issue.
Signed-off-by: Likun Gao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Likun Gao
For Sienna_Cichlid, GFXOFF state puts gfx dpm into standby mode, then the
gfxclk can't be retireved.
Signed-off-by: Likun Gao
Reviewed-by: Kenneth Feng
Signed-off-by: Alex Deucher
---
.../drm/amd/powerplay/sienna_cichlid_ppt.c| 71 ---
1 file changed, 60
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