Am 21.08.23 um 13:16 schrieb Christian König:
Am 21.08.23 um 12:14 schrieb Arunpravin Paneer Selvam:
The way now contiguous requests are implemented such that
the size rounded up to power of 2 and the corresponding order
block picked from the freelist.
In addition to the older method, the new
[AMD Official Use Only - General]
> -Original Message-
> From: Imre Deak
> Sent: Saturday, August 19, 2023 1:46 AM
> To: Lin, Wayne
> Cc: dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org;
> ly...@redhat.com; jani.nik...@intel.com; ville.syrj...@linux.intel.com;
> Wentland,
[Public]
Thanks, Lyude!
Should I push another version to fix the indention?
> -Original Message-
> From: Lyude Paul
> Sent: Friday, August 18, 2023 6:17 AM
> To: Lin, Wayne ; dri-de...@lists.freedesktop.org;
> amd-gfx@lists.freedesktop.org
> Cc: jani.nik...@intel.com;
On 8/21/2023 11:40 PM, Alex Deucher wrote:
On Mon, Aug 21, 2023 at 1:54 PM Yadav, Arvind wrote:
On 8/21/2023 9:52 PM, Alex Deucher wrote:
On Mon, Aug 21, 2023 at 2:55 AM Arvind Yadav wrote:
This patch adds a function which will change the GPU
power profile based on a submitted job. This
current method doesn't work for GTT domain page table, change
it to support both VRAM and GTT domain.
Signed-off-by: Yifan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 6 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 2 +-
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git
To decrease VRAM pressure for APUs, put page tables to
GTT domain.
Signed-off-by: Yifan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a function which will change the GPU
power profile based on a submitted job. This can optimize
the power performance when the workload is on.
v2:
- Splitting workload_profile_set and workload_profile_put
into two separate patches.
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a suspend function that will clear the GPU
power profile before going into suspend state.
v2:
- Add the new suspend function based on review comment.
Cc: Shashank Sharma
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Arvind
Yes, that's a very good idea as well. Going to keep that link around if
anybody asks why we do this.
Christian.
Am 21.08.23 um 22:49 schrieb Felix Kuehling:
Would it make sense to include a link to a better explanation of the
underlying issue? E.g. https://lwn.net/Articles/624126/?
Regards,
On Tue, Aug 15, 2023 at 03:57:09PM -0300, André Almeida wrote:
> Given that prop changes may lead to modesetting, which would defeat the
> fast path of the async flip, refuse any atomic prop change for async
> flips in atomic API. The only exceptions are the framebuffer ID to flip
> to and the
On 8/21/23 22:02, André Almeida wrote:
> Em 17/08/2023 07:37, Michel Dänzer escreveu:
>> On 8/15/23 20:57, André Almeida wrote:
>>> From: Pekka Paalanen
>>>
>>> Specify how the atomic state is maintained between userspace and
>>> kernel, plus the special case for async flips.
>>>
>>>
On Fri, Aug 18, 2023 at 05:06:42PM -0300, André Almeida wrote:
> Create a section that specifies how to deal with DRM device resets for
> kernel and userspace drivers.
>
> Signed-off-by: André Almeida
>
> ---
>
> v7 changes:
> - s/application/graphical API contex/ in the robustness part
From: Tim Huang
[ Upstream commit 730d44e1fa306a20746ad4a85da550662aed9daa ]
For SMU v13.0.4/11, driver does not need to stop RLC for S0i3,
the firmwares will handle that properly.
Signed-off-by: Tim Huang
Reviewed-by: Mario Limonciello
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Lijo Lazar
[ Upstream commit d3de41ee5febe5c2d9989fe9810bce2bb54a3a8e ]
On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the
least significant bits for any command submission. Hence match against
the exact register value, otherwise a register value of all 0xFFs also
From: Alex Deucher
[ Upstream commit a6dea2d64ff92851e68cd4e20a35f6534286e016 ]
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Reviewed-by: Felix Kuehling
Acked-by: Christian König
Tested-by: Mike Lothian
Signed-off-by: Alex
From: Alex Deucher
[ Upstream commit 616f92d188ee7142a95a52068efdbea82645f859 ]
Use the dGPU path instead. There were a lot of platform
issues with IOMMU in general on these chips due to windows
not enabling IOMMU at the time. The dGPU path has been
used for a long time with newer APUs and
From: Alex Deucher
[ Upstream commit 091ae5473f96ced844af6ba39b94757359b12348 ]
Use the dGPU path instead. There were a lot of platform
issues with IOMMU in general on these chips due to windows
not enabling IOMMU at the time. The dGPU path has been
used for a long time with newer APUs and
From: Tim Huang
[ Upstream commit 730d44e1fa306a20746ad4a85da550662aed9daa ]
For SMU v13.0.4/11, driver does not need to stop RLC for S0i3,
the firmwares will handle that properly.
Signed-off-by: Tim Huang
Reviewed-by: Mario Limonciello
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Lijo Lazar
[ Upstream commit d3de41ee5febe5c2d9989fe9810bce2bb54a3a8e ]
On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the
least significant bits for any command submission. Hence match against
the exact register value, otherwise a register value of all 0xFFs also
From: Alex Deucher
[ Upstream commit a6dea2d64ff92851e68cd4e20a35f6534286e016 ]
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Reviewed-by: Felix Kuehling
Acked-by: Christian König
Tested-by: Mike Lothian
Signed-off-by: Alex
From: Alex Deucher
[ Upstream commit 616f92d188ee7142a95a52068efdbea82645f859 ]
Use the dGPU path instead. There were a lot of platform
issues with IOMMU in general on these chips due to windows
not enabling IOMMU at the time. The dGPU path has been
used for a long time with newer APUs and
From: Alex Deucher
[ Upstream commit 091ae5473f96ced844af6ba39b94757359b12348 ]
Use the dGPU path instead. There were a lot of platform
issues with IOMMU in general on these chips due to windows
not enabling IOMMU at the time. The dGPU path has been
used for a long time with newer APUs and
From: Lijo Lazar
[ Upstream commit d3de41ee5febe5c2d9989fe9810bce2bb54a3a8e ]
On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the
least significant bits for any command submission. Hence match against
the exact register value, otherwise a register value of all 0xFFs also
From: Alex Deucher
[ Upstream commit a6dea2d64ff92851e68cd4e20a35f6534286e016 ]
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Reviewed-by: Felix Kuehling
Acked-by: Christian König
Tested-by: Mike Lothian
Signed-off-by: Alex
From: Alex Deucher
[ Upstream commit a6dea2d64ff92851e68cd4e20a35f6534286e016 ]
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Reviewed-by: Felix Kuehling
Acked-by: Christian König
Tested-by: Mike Lothian
Signed-off-by: Alex
On Wed, 17 May 2023, Hamza Mahfooz wrote:
> Since, we are only interested in having
> drm_edid_override_connector_update(), update the value of
> connector->edid_blob_ptr. We don't care about the return value of
> drm_edid_override_connector_update() here. So, drop count.
>
> Fixes: 068553e14f86
Am 22.08.23 um 08:17 schrieb Yifan Zhang:
current method doesn't work for GTT domain page table, change
it to support both VRAM and GTT domain.
Signed-off-by: Yifan Zhang
Of hand that looks like the right thing to do, one comment below.
With that fixed feel free to add my Acked-by, but
Am 22.08.23 um 08:17 schrieb Yifan Zhang:
To decrease VRAM pressure for APUs, put page tables to
GTT domain.
Signed-off-by: Yifan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c
Hi Lijo,
The *_set function will set the GPU power profile and the *_put function
will schedule the
smu_delayed_work task after 100ms delay. This smu_delayed_work task will
clear a GPU
power profile if any new jobs are not scheduled within 100 ms. But if
any new job comes within 100ms
then
On 8/22/2023 12:01 PM, Lazar, Lijo wrote:
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a suspend function that will clear the GPU
power profile before going into suspend state.
v2:
- Add the new suspend function based on review comment.
Cc: Shashank Sharma
Cc: Christian
On 8/22/2023 11:55 AM, Lazar, Lijo wrote:
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a function which will change the GPU
power profile based on a submitted job. This can optimize
the power performance when the workload is on.
v2:
- Splitting workload_profile_set and
On 8/22/2023 5:41 PM, Yadav, Arvind wrote:
Hi Lijo,
The *_set function will set the GPU power profile and the *_put function
will schedule the
smu_delayed_work task after 100ms delay. This smu_delayed_work task will
clear a GPU
power profile if any new jobs are not scheduled within 100
On 8/22/2023 5:52 PM, Yadav, Arvind wrote:
On 8/22/2023 12:01 PM, Lazar, Lijo wrote:
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a suspend function that will clear the GPU
power profile before going into suspend state.
v2:
- Add the new suspend function based on review
On 8/22/2023 6:24 PM, Lazar, Lijo wrote:
On 8/22/2023 5:52 PM, Yadav, Arvind wrote:
On 8/22/2023 12:01 PM, Lazar, Lijo wrote:
On 8/21/2023 12:17 PM, Arvind Yadav wrote:
This patch adds a suspend function that will clear the GPU
power profile before going into suspend state.
v2:
- Add
On Thu, 10 Aug 2023 15:02:49 -0100
Melissa Wen wrote:
> From: Joshua Ashton
>
> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier =
On Mon, Aug 21, 2023 at 10:13:45PM -0500, Limonciello, Mario wrote:
> So I wonder if the right answer is to put it in drivers/net/wireless
> initially and if we come up with a need later for non wifi producers we can
> discuss moving it at that time.
Please do so.
thanks,
greg k-h
This reverts commit 0ba4a784a14592abed41873e339eab78ceb6e230.
drm_edid_override_connector_update() is *not* supposed to be used by
drivers directly.
>From the documentation:
Only to be used from drm_helper_probe_single_connector_modes() as a
fallback for when DDC probe failed during
On 2023/8/21 17:31, Christian König wrote:
Am 21.08.23 um 09:37 schrieb Su Hui:
smatch error:
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:1257
amdgpu_discovery_reg_base_init() error:
testing array offset 'adev->vcn.num_vcn_inst' after use.
change the assignment order to avoid buffer
On Thu, 10 Aug 2023 15:02:47 -0100
Melissa Wen wrote:
> Instead of relying on color block names to get the transfer function
> intention regarding encoding pixel's luminance, define supported
> Electro-Optical Transfer Functions (EOTFs) and inverse EOTFs, that
> includes pure gamma or
On Thu, 10 Aug 2023 15:02:59 -0100
Melissa Wen wrote:
> The next patch adds pre-blending degamma to AMD color mgmt pipeline, but
> pre-blending degamma caps (DPP) is currently in use to provide DRM CRTC
> atomic degamma or implict degamma on legacy gamma. Detach degamma usage
> regarging CRTC
This reverts commit dae343b343ff741d727312b2a9b03d86e64b31c5.
Dependency for reverting the next commit cleanly.
Cc: Alex Deucher
Cc: Alex Hung
Cc: Chao-kai Wang
Cc: Daniel Wheeler
Cc: Harry Wentland
Cc: Hersen Wu
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Wenchieh Chien
Cc: David Airlie
Cc:
On Tue, 22 Aug 2023, Jani Nikula wrote:
> This reverts commit 0ba4a784a14592abed41873e339eab78ceb6e230.
>
> drm_edid_override_connector_update() is *not* supposed to be used by
> drivers directly.
>
> From the documentation:
>
> Only to be used from drm_helper_probe_single_connector_modes() as
This reverts commit 550e5d23f14784e2a625c25fe0c9d498589c9256.
drm_edid_override_connector_update() is *not* supposed to be used by
drivers directly.
>From the documentation:
Only to be used from drm_helper_probe_single_connector_modes() as a
fallback for when DDC probe failed during
Over the past years I've been trying to unify the override and firmware
EDID handling as well as EDID property updates. It won't work if drivers
do their own random things.
BR,
Jani.
Cc: Alex Deucher
Cc: Alex Hung
Cc: Chao-kai Wang
Cc: Daniel Wheeler
Cc: Harry Wentland
Cc: Hersen Wu
Cc:
On Thu, 10 Aug 2023 15:03:11 -0100
Melissa Wen wrote:
> dc->caps.color.mpc.gamut_remap says there is a post-blending color block
> for gamut remap matrix for DCN3 HW family and newer versions. However,
> those drivers still follow DCN10 programming that remap stream
> gamut_remap_matrix to DPP
On Thu, 10 Aug 2023 15:02:48 -0100
Melissa Wen wrote:
> Brief documentation about pre-defined transfer function usage on AMD
> display driver and standardized EOTFs and inverse EOTFs.
>
> Co-developed-by: Harry Wentland
> Signed-off-by: Harry Wentland
> Signed-off-by: Melissa Wen
> ---
>
This reverts commit 8789989b476b5f3bb0bf1a63b5223f6e76cfd13d.
Dependency for reverting the next commit cleanly.
Cc: Alex Deucher
Cc: Alex Hung
Cc: Chao-kai Wang
Cc: Daniel Wheeler
Cc: Harry Wentland
Cc: Hersen Wu
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Wenchieh Chien
Cc: David Airlie
Cc:
On Tue, Aug 15, 2023 at 4:40 AM Mario Limonciello
wrote:
>
> This support was introduced for pre-navi3x dGPUS. The interface that
> this was wired up to isn't usable by fwupd, and no devices had a need
> to release firmware into the wild.
>
> Navi3x dGPUs introduce an interface that can flash
On 8/21/2023 4:32 PM, Felix Kuehling wrote:
On 2023-08-21 15:20, Rajneesh Bhardwaj wrote:
Rework the KFD max system memory and ttm limit to allow bigger
system memory allocations upto 63/64 of the available memory which is
controlled by ttm module params pages_limit and page_pool_size. Also
On 21/08/23 10:46, Matthew Auld wrote:
Hi,
On 21/08/2023 11:14, Arunpravin Paneer Selvam wrote:
The way now contiguous requests are implemented such that
the size rounded up to power of 2 and the corresponding order
block picked from the freelist.
In addition to the older method, the new
On 2023-08-22 9:49, Bhardwaj, Rajneesh wrote:
On 8/21/2023 4:32 PM, Felix Kuehling wrote:
On 2023-08-21 15:20, Rajneesh Bhardwaj wrote:
Rework the KFD max system memory and ttm limit to allow bigger
system memory allocations upto 63/64 of the available memory which is
controlled by ttm
[Public]
> -Original Message-
> From: Sasha Levin
> Sent: Tuesday, August 22, 2023 7:36 AM
> To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
> Cc: Deucher, Alexander ; Kuehling, Felix
> ; Koenig, Christian ;
> Mike Lothian ; Sasha Levin ; Pan,
> Xinhui ; airl...@gmail.com;
[Public]
> -Original Message-
> From: Sasha Levin
> Sent: Tuesday, August 22, 2023 7:36 AM
> To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
> Cc: Deucher, Alexander ; Kuehling, Felix
> ; Koenig, Christian ;
> Mike Lothian ; Sasha Levin ; Pan,
> Xinhui ; airl...@gmail.com;
[Public]
> -Original Message-
> From: Sasha Levin
> Sent: Tuesday, August 22, 2023 7:36 AM
> To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
> Cc: Deucher, Alexander ; Kuehling, Felix
> ; Koenig, Christian ;
> Mike Lothian ; Sasha Levin ; Pan,
> Xinhui ; airl...@gmail.com;
[Public]
> -Original Message-
> From: Sasha Levin
> Sent: Tuesday, August 22, 2023 7:36 AM
> To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
> Cc: Deucher, Alexander ; Kuehling, Felix
> ; Koenig, Christian ;
> Mike Lothian ; Sasha Levin ; Pan,
> Xinhui ; airl...@gmail.com;
[Public]
> -Original Message-
> From: Sasha Levin
> Sent: Tuesday, August 22, 2023 7:36 AM
> To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
> Cc: Deucher, Alexander ; Kuehling, Felix
> ; Koenig, Christian ;
> Mike Lothian ; Sasha Levin ; Pan,
> Xinhui ; airl...@gmail.com;
[Public]
> -Original Message-
> From: Sasha Levin
> Sent: Tuesday, August 22, 2023 7:37 AM
> To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
> Cc: Deucher, Alexander ; Kuehling, Felix
> ; Koenig, Christian ;
> Mike Lothian ; Sasha Levin ; Pan,
> Xinhui ; airl...@gmail.com;
[Public]
> -Original Message-
> From: Sasha Levin
> Sent: Tuesday, August 22, 2023 7:36 AM
> To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
> Cc: Deucher, Alexander ; Kuehling, Felix
> ; Koenig, Christian ;
> Mike Lothian ; Sasha Levin ; Pan,
> Xinhui ; airl...@gmail.com;
[Public]
> -Original Message-
> From: Sasha Levin
> Sent: Tuesday, August 22, 2023 7:37 AM
> To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
> Cc: Deucher, Alexander ; Kuehling, Felix
> ; Koenig, Christian ;
> Mike Lothian ; Sasha Levin ; Pan,
> Xinhui ; airl...@gmail.com;
On Tue, Aug 22, 2023 at 8:00 AM Christian König
wrote:
>
> Am 22.08.23 um 08:17 schrieb Yifan Zhang:
> > To decrease VRAM pressure for APUs, put page tables to
> > GTT domain.
> >
> > Signed-off-by: Yifan Zhang
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c | 2 +-
> > 1 file changed,
As made mention of in commit 099303e9a9bd ("drm/amd/display: eDP
intermittent black screen during PnP"), we need to turn off the
display's backlight before powering off an eDP display. Not doing so
will result in undefined behaviour according to the eDP spec. So, set
DCN301's
On 2023-08-22 13:03, Hamza Mahfooz wrote:
> As made mention of in commit 099303e9a9bd ("drm/amd/display: eDP
> intermittent black screen during PnP"), we need to turn off the
> display's backlight before powering off an eDP display. Not doing so
> will result in undefined behaviour according to
On 2023-08-22 06:01, Jani Nikula wrote:
Over the past years I've been trying to unify the override and firmware
EDID handling as well as EDID property updates. It won't work if drivers
do their own random things.
Let's check how to replace these references by appropriate ones or fork
the
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