Re: [Amforth] Watchdog Timer on AVR8s
I should add this is a follow-up to a thread started in 2019. Here's the archive of that thread: https://sourceforge.net/p/amforth/mailman/message/36683433/ -- Regards, Martin Nicholas. E-mail: m...@mgn.org.uk. ___ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
Re: [Amforth] Watchdog Timer on AVR8s
Hi, I've had this one brewing for some time. Looking at schemes for: AT90CAN128 & ATA6612C. Common variables between chips: WDTCSR (WDTCR), WDTOE (WDCE), WDCE, WDE. WDTCSR & WDTOE are included "For compatibility" in the CAN chip. I include this in cold.asm. It should work with the two WDTs in the chip series above as well as chips with no WDT at all: .if defined(WDTCSR) ; There's a WDT, so we reset it as per the docs. in_ temp0, WDTCSR ori temp0, (1
[Amforth] fixed D0>, updated website
Dear AmForthers, so I "jumped" and actually wrote new content to the amforth repository and project web site. D0> has been fixed. I added a new section "Opinion" to the website, sort of a blog. There I added a entry describing how I went about fixing "D0>". If you find errors, things not working as expected, or other "observations", please do not hesitate to report them on this list. Thank you. Happy Forthing, Erich -- May the Forth be with you ... ___ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
